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-rw-r--r--gdb/ChangeLog5
-rw-r--r--gdb/configure.tgt6
2 files changed, 6 insertions, 5 deletions
diff --git a/gdb/ChangeLog b/gdb/ChangeLog
index 7cf8d90..e8b81e8 100644
--- a/gdb/ChangeLog
+++ b/gdb/ChangeLog
@@ -1,5 +1,10 @@
2010-09-28 Joel Brobecker <brobecker@adacore.com>
+ * configure.tgt (sparc-*-*): Set gdb_sim to ../sim/erc32/libsim.a.
+ (sparc-*-rtems*): Delete. Now redundant with sparc-*-*.
+
+2010-09-28 Joel Brobecker <brobecker@adacore.com>
+
* NEWS: Announce Ravenscar Profile support.
2010-09-28 Joel Brobecker <brobecker@adacore.com>
diff --git a/gdb/configure.tgt b/gdb/configure.tgt
index 80cfb49..24a6bf9 100644
--- a/gdb/configure.tgt
+++ b/gdb/configure.tgt
@@ -514,15 +514,11 @@ sparc-*-solaris2* | sparcv9-*-solaris2* | sparc64-*-solaris2*)
gdb_target_obs="sparc64-tdep.o sparc64-sol2-tdep.o sparc-tdep.o \
sparc-sol2-tdep.o sol2-tdep.o solib.o solib-svr4.o"
;;
-sparc-*-rtems*)
- # Target: SPARC embedded with simulator
- gdb_target_obs="sparc-tdep.o"
- gdb_sim=../sim/erc32/libsim.a
- ;;
sparc-*-*)
# Target: SPARC
gdb_target_obs="sparc-tdep.o ravenscar-thread.o \
ravenscar-sparc-thread.o"
+ gdb_sim=../sim/erc32/libsim.a
;;
sparc64-*-*)
# Target: UltraSPARC