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-rw-r--r--gdb/testsuite/gdb.xml/extra-regs.xml18
-rw-r--r--gdb/testsuite/gdb.xml/tdesc-regs.exp5
2 files changed, 23 insertions, 0 deletions
diff --git a/gdb/testsuite/gdb.xml/extra-regs.xml b/gdb/testsuite/gdb.xml/extra-regs.xml
index 5db426b..f0db04e 100644
--- a/gdb/testsuite/gdb.xml/extra-regs.xml
+++ b/gdb/testsuite/gdb.xml/extra-regs.xml
@@ -8,9 +8,27 @@
<field name="v2" type="v2int16"/>
</union>
+ <struct id="struct1">
+ <field name="v4" type="v4int8"/>
+ <field name="v2" type="v2int16"/>
+ </struct>
+
+ <struct id="struct2" size="8">
+ <field name="f1" start="0" end="34"/>
+ <field name="f2" start="63" end="63"/>
+ </struct>
+
+ <flags id="flags" size="4">
+ <field name="X" start="0" end="0"/>
+ <field name="Y" start="2" end="2"/>
+ </flags>
+
<reg name="extrareg" bitsize="32"/>
<reg name="uintreg" bitsize="32" type="uint32"/>
<reg name="vecreg" bitsize="32" type="v4int8"/>
<reg name="unionreg" bitsize="32" type="vecint"/>
+ <reg name="structreg" bitsize="64" type="struct1"/>
+ <reg name="bitfields" bitsize="64" type="struct2"/>
+ <reg name="flags" bitsize="32" type="flags"/>
</feature>
</target>
diff --git a/gdb/testsuite/gdb.xml/tdesc-regs.exp b/gdb/testsuite/gdb.xml/tdesc-regs.exp
index 8eae0bd..f37b2f3 100644
--- a/gdb/testsuite/gdb.xml/tdesc-regs.exp
+++ b/gdb/testsuite/gdb.xml/tdesc-regs.exp
@@ -141,6 +141,11 @@ gdb_test "ptype \$vecreg" "type = int8_t \\\[4\\\]"
gdb_test "ptype \$unionreg" \
"type = union {\r\n *v4int8 v4;\r\n *v2int16 v2;\r\n}"
gdb_test "ptype \$unionreg.v4" "type = int8_t \\\[4\\\]"
+gdb_test "ptype \$structreg" \
+ "type = struct struct1 {\r\n *v4int8 v4;\r\n *v2int16 v2;\r\n}"
+gdb_test "ptype \$structreg.v4" "type = int8_t \\\[4\\\]"
+gdb_test "ptype \$bitfields" \
+ "type = struct struct2 {\r\n *uint64_t f1 : 35;\r\n *uint64_t f2 : 1;\r\n}"
load_description "core-only.xml" ""
# The extra register from the previous description should be gone.