diff options
Diffstat (limited to 'gdb/features')
| -rw-r--r-- | gdb/features/Makefile | 6 | ||||
| -rw-r--r-- | gdb/features/rs6000/power-vsx.xml | 44 | ||||
| -rw-r--r-- | gdb/features/rs6000/powerpc-vsx32.c | 198 | ||||
| -rw-r--r-- | gdb/features/rs6000/powerpc-vsx32.xml | 18 | ||||
| -rw-r--r-- | gdb/features/rs6000/powerpc-vsx32l.c | 202 | ||||
| -rw-r--r-- | gdb/features/rs6000/powerpc-vsx32l.xml | 20 | ||||
| -rw-r--r-- | gdb/features/rs6000/powerpc-vsx64.c | 198 | ||||
| -rw-r--r-- | gdb/features/rs6000/powerpc-vsx64.xml | 18 | ||||
| -rw-r--r-- | gdb/features/rs6000/powerpc-vsx64l.c | 202 | ||||
| -rw-r--r-- | gdb/features/rs6000/powerpc-vsx64l.xml | 20 |
10 files changed, 925 insertions, 1 deletions
diff --git a/gdb/features/Makefile b/gdb/features/Makefile index 378f764..9241e2a 100644 --- a/gdb/features/Makefile +++ b/gdb/features/Makefile @@ -33,7 +33,8 @@ WHICH = arm-with-iwmmxt mips-linux mips64-linux \ rs6000/powerpc-32l rs6000/powerpc-altivec32l rs6000/powerpc-e500l \ - rs6000/powerpc-64l rs6000/powerpc-altivec64l + rs6000/powerpc-64l rs6000/powerpc-altivec64l rs6000/powerpc-vsx32l \ + rs6000/powerpc-vsx64l # Record which registers should be sent to GDB by default after stop. arm-with-iwmmxt-expedite = r11,sp,pc @@ -41,9 +42,12 @@ mips-linux-expedite = r29,pc mips64-linux-expedite = r29,pc rs6000/powerpc-32l-expedite = r1,pc rs6000/powerpc-altivec32l-expedite = r1,pc +rs6000/powerpc-vsx32l-expedite = r1,pc rs6000/powerpc-e500l-expedite = r1,pc rs6000/powerpc-64l-expedite = r1,pc rs6000/powerpc-altivec64l-expedite = r1,pc +rs6000/powerpc-vsx64l-expedite = r1,pc + XSLTPROC = xsltproc outdir = ../regformats diff --git a/gdb/features/rs6000/power-vsx.xml b/gdb/features/rs6000/power-vsx.xml new file mode 100644 index 0000000..fa8121a --- /dev/null +++ b/gdb/features/rs6000/power-vsx.xml @@ -0,0 +1,44 @@ +<?xml version="1.0"?> +<!-- Copyright (C) 2008 Free Software Foundation, Inc. + + Copying and distribution of this file, with or without modification, + are permitted in any medium without royalty provided the copyright + notice and this notice are preserved. --> + +<!-- POWER7 VSX registers that do not overlap existing FP and VMX + registers. --> +<!DOCTYPE feature SYSTEM "gdb-target.dtd"> +<feature name="org.gnu.gdb.power.vsx"> + <reg name="vs0h" bitsize="64" type="uint64"/> + <reg name="vs1h" bitsize="64" type="uint64"/> + <reg name="vs2h" bitsize="64" type="uint64"/> + <reg name="vs3h" bitsize="64" type="uint64"/> + <reg name="vs4h" bitsize="64" type="uint64"/> + <reg name="vs5h" bitsize="64" type="uint64"/> + <reg name="vs6h" bitsize="64" type="uint64"/> + <reg name="vs7h" bitsize="64" type="uint64"/> + <reg name="vs8h" bitsize="64" type="uint64"/> + <reg name="vs9h" bitsize="64" type="uint64"/> + <reg name="vs10h" bitsize="64" type="uint64"/> + <reg name="vs11h" bitsize="64" type="uint64"/> + <reg name="vs12h" bitsize="64" type="uint64"/> + <reg name="vs13h" bitsize="64" type="uint64"/> + <reg name="vs14h" bitsize="64" type="uint64"/> + <reg name="vs15h" bitsize="64" type="uint64"/> + <reg name="vs16h" bitsize="64" type="uint64"/> + <reg name="vs17h" bitsize="64" type="uint64"/> + <reg name="vs18h" bitsize="64" type="uint64"/> + <reg name="vs19h" bitsize="64" type="uint64"/> + <reg name="vs20h" bitsize="64" type="uint64"/> + <reg name="vs21h" bitsize="64" type="uint64"/> + <reg name="vs22h" bitsize="64" type="uint64"/> + <reg name="vs23h" bitsize="64" type="uint64"/> + <reg name="vs24h" bitsize="64" type="uint64"/> + <reg name="vs25h" bitsize="64" type="uint64"/> + <reg name="vs26h" bitsize="64" type="uint64"/> + <reg name="vs27h" bitsize="64" type="uint64"/> + <reg name="vs28h" bitsize="64" type="uint64"/> + <reg name="vs29h" bitsize="64" type="uint64"/> + <reg name="vs30h" bitsize="64" type="uint64"/> + <reg name="vs31h" bitsize="64" type="uint64"/> +</feature> diff --git a/gdb/features/rs6000/powerpc-vsx32.c b/gdb/features/rs6000/powerpc-vsx32.c new file mode 100644 index 0000000..560b48f --- /dev/null +++ b/gdb/features/rs6000/powerpc-vsx32.c @@ -0,0 +1,198 @@ +/* THIS FILE IS GENERATED. Original: powerpc-vsx32.xml */ + +#include "defs.h" +#include "gdbtypes.h" +#include "target-descriptions.h" + +struct target_desc *tdesc_powerpc_vsx32; +static void +initialize_tdesc_powerpc_vsx32 (void) +{ + struct target_desc *result = allocate_target_description (); + struct tdesc_feature *feature; + struct type *field_type, *type; + + set_tdesc_architecture (result, bfd_scan_arch ("powerpc:common")); + + feature = tdesc_create_feature (result, "org.gnu.gdb.power.core"); + tdesc_create_reg (feature, "r0", 0, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r1", 1, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r2", 2, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r3", 3, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r4", 4, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r5", 5, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r6", 6, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r7", 7, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r8", 8, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r9", 9, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r10", 10, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r11", 11, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r12", 12, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r13", 13, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r14", 14, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r15", 15, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r16", 16, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r17", 17, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r18", 18, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r19", 19, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r20", 20, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r21", 21, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r22", 22, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r23", 23, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r24", 24, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r25", 25, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r26", 26, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r27", 27, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r28", 28, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r29", 29, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r30", 30, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r31", 31, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "pc", 64, 1, NULL, 32, "code_ptr"); + tdesc_create_reg (feature, "msr", 65, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "cr", 66, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "lr", 67, 1, NULL, 32, "code_ptr"); + tdesc_create_reg (feature, "ctr", 68, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "xer", 69, 1, NULL, 32, "uint32"); + + feature = tdesc_create_feature (result, "org.gnu.gdb.power.fpu"); + tdesc_create_reg (feature, "f0", 32, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f1", 33, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f2", 34, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f3", 35, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f4", 36, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f5", 37, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f6", 38, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f7", 39, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f8", 40, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f9", 41, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f10", 42, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f11", 43, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f12", 44, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f13", 45, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f14", 46, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f15", 47, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f16", 48, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f17", 49, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f18", 50, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f19", 51, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f20", 52, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f21", 53, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f22", 54, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f23", 55, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f24", 56, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f25", 57, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f26", 58, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f27", 59, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f28", 60, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f29", 61, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f30", 62, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f31", 63, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "fpscr", 70, 1, "float", 32, "int"); + + feature = tdesc_create_feature (result, "org.gnu.gdb.power.altivec"); + field_type = tdesc_named_type (feature, "ieee_single"); + type = init_vector_type (field_type, 4); + TYPE_NAME (type) = xstrdup ("v4f"); + tdesc_record_type (feature, type); + + field_type = tdesc_named_type (feature, "int32"); + type = init_vector_type (field_type, 4); + TYPE_NAME (type) = xstrdup ("v4i32"); + tdesc_record_type (feature, type); + + field_type = tdesc_named_type (feature, "int16"); + type = init_vector_type (field_type, 8); + TYPE_NAME (type) = xstrdup ("v8i16"); + tdesc_record_type (feature, type); + + field_type = tdesc_named_type (feature, "int8"); + type = init_vector_type (field_type, 16); + TYPE_NAME (type) = xstrdup ("v16i8"); + tdesc_record_type (feature, type); + + type = init_composite_type (NULL, TYPE_CODE_UNION); + TYPE_NAME (type) = xstrdup ("vec128"); + field_type = tdesc_named_type (feature, "uint128"); + append_composite_type_field (type, xstrdup ("uint128"), field_type); + field_type = tdesc_named_type (feature, "v4f"); + append_composite_type_field (type, xstrdup ("v4_float"), field_type); + field_type = tdesc_named_type (feature, "v4i32"); + append_composite_type_field (type, xstrdup ("v4_int32"), field_type); + field_type = tdesc_named_type (feature, "v8i16"); + append_composite_type_field (type, xstrdup ("v8_int16"), field_type); + field_type = tdesc_named_type (feature, "v16i8"); + append_composite_type_field (type, xstrdup ("v16_int8"), field_type); + TYPE_FLAGS (type) |= TYPE_FLAG_VECTOR; + tdesc_record_type (feature, type); + + tdesc_create_reg (feature, "vr0", 71, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr1", 72, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr2", 73, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr3", 74, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr4", 75, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr5", 76, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr6", 77, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr7", 78, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr8", 79, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr9", 80, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr10", 81, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr11", 82, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr12", 83, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr13", 84, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr14", 85, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr15", 86, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr16", 87, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr17", 88, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr18", 89, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr19", 90, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr20", 91, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr21", 92, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr22", 93, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr23", 94, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr24", 95, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr25", 96, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr26", 97, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr27", 98, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr28", 99, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr29", 100, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr30", 101, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr31", 102, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vscr", 103, 1, "vector", 32, "int"); + tdesc_create_reg (feature, "vrsave", 104, 1, "vector", 32, "int"); + + feature = tdesc_create_feature (result, "org.gnu.gdb.power.vsx"); + tdesc_create_reg (feature, "vs0h", 105, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "vs1h", 106, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "vs2h", 107, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "vs3h", 108, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "vs4h", 109, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "vs5h", 110, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "vs6h", 111, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "vs7h", 112, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "vs8h", 113, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "vs9h", 114, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "vs10h", 115, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "vs11h", 116, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "vs12h", 117, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "vs13h", 118, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "vs14h", 119, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "vs15h", 120, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "vs16h", 121, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "vs17h", 122, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "vs18h", 123, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "vs19h", 124, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "vs20h", 125, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "vs21h", 126, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "vs22h", 127, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "vs23h", 128, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "vs24h", 129, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "vs25h", 130, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "vs26h", 131, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "vs27h", 132, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "vs28h", 133, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "vs29h", 134, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "vs30h", 135, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "vs31h", 136, 1, NULL, 64, "uint64"); + + tdesc_powerpc_vsx32 = result; +} diff --git a/gdb/features/rs6000/powerpc-vsx32.xml b/gdb/features/rs6000/powerpc-vsx32.xml new file mode 100644 index 0000000..c216c94 --- /dev/null +++ b/gdb/features/rs6000/powerpc-vsx32.xml @@ -0,0 +1,18 @@ +<?xml version="1.0"?> +<!-- Copyright (C) 2008 Free Software Foundation, Inc. + + Copying and distribution of this file, with or without modification, + are permitted in any medium without royalty provided the copyright + notice and this notice are preserved. --> + +<!-- PowerPC UISA - a PPC processor as viewed by user-level code. A UISA-only + view of the PowerPC. Includes AltiVec and VSX vector registers. --> + +<!DOCTYPE target SYSTEM "gdb-target.dtd"> +<target> + <architecture>powerpc:common</architecture> + <xi:include href="power-core.xml"/> + <xi:include href="power-fpu.xml"/> + <xi:include href="power-altivec.xml"/> + <xi:include href="power-vsx.xml"/> +</target> diff --git a/gdb/features/rs6000/powerpc-vsx32l.c b/gdb/features/rs6000/powerpc-vsx32l.c new file mode 100644 index 0000000..bedf039 --- /dev/null +++ b/gdb/features/rs6000/powerpc-vsx32l.c @@ -0,0 +1,202 @@ +/* THIS FILE IS GENERATED. Original: powerpc-vsx32l.xml */ + +#include "defs.h" +#include "gdbtypes.h" +#include "target-descriptions.h" + +struct target_desc *tdesc_powerpc_vsx32l; +static void +initialize_tdesc_powerpc_vsx32l (void) +{ + struct target_desc *result = allocate_target_description (); + struct tdesc_feature *feature; + struct type *field_type, *type; + + set_tdesc_architecture (result, bfd_scan_arch ("powerpc:common")); + + feature = tdesc_create_feature (result, "org.gnu.gdb.power.core"); + tdesc_create_reg (feature, "r0", 0, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r1", 1, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r2", 2, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r3", 3, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r4", 4, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r5", 5, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r6", 6, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r7", 7, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r8", 8, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r9", 9, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r10", 10, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r11", 11, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r12", 12, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r13", 13, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r14", 14, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r15", 15, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r16", 16, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r17", 17, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r18", 18, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r19", 19, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r20", 20, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r21", 21, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r22", 22, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r23", 23, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r24", 24, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r25", 25, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r26", 26, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r27", 27, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r28", 28, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r29", 29, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r30", 30, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "r31", 31, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "pc", 64, 1, NULL, 32, "code_ptr"); + tdesc_create_reg (feature, "msr", 65, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "cr", 66, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "lr", 67, 1, NULL, 32, "code_ptr"); + tdesc_create_reg (feature, "ctr", 68, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "xer", 69, 1, NULL, 32, "uint32"); + + feature = tdesc_create_feature (result, "org.gnu.gdb.power.fpu"); + tdesc_create_reg (feature, "f0", 32, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f1", 33, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f2", 34, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f3", 35, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f4", 36, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f5", 37, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f6", 38, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f7", 39, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f8", 40, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f9", 41, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f10", 42, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f11", 43, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f12", 44, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f13", 45, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f14", 46, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f15", 47, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f16", 48, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f17", 49, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f18", 50, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f19", 51, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f20", 52, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f21", 53, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f22", 54, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f23", 55, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f24", 56, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f25", 57, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f26", 58, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f27", 59, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f28", 60, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f29", 61, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f30", 62, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f31", 63, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "fpscr", 70, 1, "float", 32, "int"); + + feature = tdesc_create_feature (result, "org.gnu.gdb.power.linux"); + tdesc_create_reg (feature, "orig_r3", 71, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "trap", 72, 1, NULL, 32, "int"); + + feature = tdesc_create_feature (result, "org.gnu.gdb.power.altivec"); + field_type = tdesc_named_type (feature, "ieee_single"); + type = init_vector_type (field_type, 4); + TYPE_NAME (type) = xstrdup ("v4f"); + tdesc_record_type (feature, type); + + field_type = tdesc_named_type (feature, "int32"); + type = init_vector_type (field_type, 4); + TYPE_NAME (type) = xstrdup ("v4i32"); + tdesc_record_type (feature, type); + + field_type = tdesc_named_type (feature, "int16"); + type = init_vector_type (field_type, 8); + TYPE_NAME (type) = xstrdup ("v8i16"); + tdesc_record_type (feature, type); + + field_type = tdesc_named_type (feature, "int8"); + type = init_vector_type (field_type, 16); + TYPE_NAME (type) = xstrdup ("v16i8"); + tdesc_record_type (feature, type); + + type = init_composite_type (NULL, TYPE_CODE_UNION); + TYPE_NAME (type) = xstrdup ("vec128"); + field_type = tdesc_named_type (feature, "uint128"); + append_composite_type_field (type, xstrdup ("uint128"), field_type); + field_type = tdesc_named_type (feature, "v4f"); + append_composite_type_field (type, xstrdup ("v4_float"), field_type); + field_type = tdesc_named_type (feature, "v4i32"); + append_composite_type_field (type, xstrdup ("v4_int32"), field_type); + field_type = tdesc_named_type (feature, "v8i16"); + append_composite_type_field (type, xstrdup ("v8_int16"), field_type); + field_type = tdesc_named_type (feature, "v16i8"); + append_composite_type_field (type, xstrdup ("v16_int8"), field_type); + TYPE_FLAGS (type) |= TYPE_FLAG_VECTOR; + tdesc_record_type (feature, type); + + tdesc_create_reg (feature, "vr0", 73, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr1", 74, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr2", 75, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr3", 76, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr4", 77, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr5", 78, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr6", 79, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr7", 80, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr8", 81, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr9", 82, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr10", 83, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr11", 84, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr12", 85, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr13", 86, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr14", 87, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr15", 88, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr16", 89, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr17", 90, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr18", 91, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr19", 92, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr20", 93, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr21", 94, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr22", 95, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr23", 96, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr24", 97, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr25", 98, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr26", 99, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr27", 100, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr28", 101, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr29", 102, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr30", 103, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr31", 104, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vscr", 105, 1, "vector", 32, "int"); + tdesc_create_reg (feature, "vrsave", 106, 1, "vector", 32, "int"); + + feature = tdesc_create_feature (result, "org.gnu.gdb.power.vsx"); + tdesc_create_reg (feature, "vs0h", 107, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "vs1h", 108, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "vs2h", 109, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "vs3h", 110, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "vs4h", 111, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "vs5h", 112, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "vs6h", 113, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "vs7h", 114, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "vs8h", 115, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "vs9h", 116, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "vs10h", 117, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "vs11h", 118, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "vs12h", 119, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "vs13h", 120, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "vs14h", 121, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "vs15h", 122, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "vs16h", 123, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "vs17h", 124, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "vs18h", 125, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "vs19h", 126, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "vs20h", 127, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "vs21h", 128, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "vs22h", 129, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "vs23h", 130, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "vs24h", 131, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "vs25h", 132, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "vs26h", 133, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "vs27h", 134, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "vs28h", 135, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "vs29h", 136, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "vs30h", 137, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "vs31h", 138, 1, NULL, 64, "uint64"); + + tdesc_powerpc_vsx32l = result; +} diff --git a/gdb/features/rs6000/powerpc-vsx32l.xml b/gdb/features/rs6000/powerpc-vsx32l.xml new file mode 100644 index 0000000..671141d --- /dev/null +++ b/gdb/features/rs6000/powerpc-vsx32l.xml @@ -0,0 +1,20 @@ +<?xml version="1.0"?> +<!-- Copyright (C) 2008 Free Software Foundation, Inc. + + Copying and distribution of this file, with or without modification, + are permitted in any medium without royalty provided the copyright + notice and this notice are preserved. --> + +<!-- PowerPC UISA - a PPC processor as viewed by user-level code. A UISA-only + view of the PowerPC. Includes Linux-only special "registers", AltiVec + and VSX vector registers. --> + +<!DOCTYPE target SYSTEM "gdb-target.dtd"> +<target> + <architecture>powerpc:common</architecture> + <xi:include href="power-core.xml"/> + <xi:include href="power-fpu.xml"/> + <xi:include href="power-linux.xml"/> + <xi:include href="power-altivec.xml"/> + <xi:include href="power-vsx.xml"/> +</target> diff --git a/gdb/features/rs6000/powerpc-vsx64.c b/gdb/features/rs6000/powerpc-vsx64.c new file mode 100644 index 0000000..da6b0fc --- /dev/null +++ b/gdb/features/rs6000/powerpc-vsx64.c @@ -0,0 +1,198 @@ +/* THIS FILE IS GENERATED. Original: powerpc-vsx64.xml */ + +#include "defs.h" +#include "gdbtypes.h" +#include "target-descriptions.h" + +struct target_desc *tdesc_powerpc_vsx64; +static void +initialize_tdesc_powerpc_vsx64 (void) +{ + struct target_desc *result = allocate_target_description (); + struct tdesc_feature *feature; + struct type *field_type, *type; + + set_tdesc_architecture (result, bfd_scan_arch ("powerpc:common64")); + + feature = tdesc_create_feature (result, "org.gnu.gdb.power.core"); + tdesc_create_reg (feature, "r0", 0, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r1", 1, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r2", 2, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r3", 3, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r4", 4, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r5", 5, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r6", 6, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r7", 7, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r8", 8, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r9", 9, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r10", 10, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r11", 11, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r12", 12, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r13", 13, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r14", 14, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r15", 15, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r16", 16, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r17", 17, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r18", 18, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r19", 19, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r20", 20, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r21", 21, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r22", 22, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r23", 23, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r24", 24, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r25", 25, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r26", 26, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r27", 27, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r28", 28, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r29", 29, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r30", 30, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r31", 31, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "pc", 64, 1, NULL, 64, "code_ptr"); + tdesc_create_reg (feature, "msr", 65, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "cr", 66, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "lr", 67, 1, NULL, 64, "code_ptr"); + tdesc_create_reg (feature, "ctr", 68, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "xer", 69, 1, NULL, 32, "uint32"); + + feature = tdesc_create_feature (result, "org.gnu.gdb.power.fpu"); + tdesc_create_reg (feature, "f0", 32, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f1", 33, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f2", 34, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f3", 35, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f4", 36, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f5", 37, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f6", 38, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f7", 39, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f8", 40, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f9", 41, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f10", 42, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f11", 43, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f12", 44, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f13", 45, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f14", 46, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f15", 47, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f16", 48, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f17", 49, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f18", 50, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f19", 51, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f20", 52, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f21", 53, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f22", 54, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f23", 55, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f24", 56, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f25", 57, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f26", 58, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f27", 59, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f28", 60, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f29", 61, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f30", 62, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f31", 63, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "fpscr", 70, 1, "float", 32, "int"); + + feature = tdesc_create_feature (result, "org.gnu.gdb.power.altivec"); + field_type = tdesc_named_type (feature, "ieee_single"); + type = init_vector_type (field_type, 4); + TYPE_NAME (type) = xstrdup ("v4f"); + tdesc_record_type (feature, type); + + field_type = tdesc_named_type (feature, "int32"); + type = init_vector_type (field_type, 4); + TYPE_NAME (type) = xstrdup ("v4i32"); + tdesc_record_type (feature, type); + + field_type = tdesc_named_type (feature, "int16"); + type = init_vector_type (field_type, 8); + TYPE_NAME (type) = xstrdup ("v8i16"); + tdesc_record_type (feature, type); + + field_type = tdesc_named_type (feature, "int8"); + type = init_vector_type (field_type, 16); + TYPE_NAME (type) = xstrdup ("v16i8"); + tdesc_record_type (feature, type); + + type = init_composite_type (NULL, TYPE_CODE_UNION); + TYPE_NAME (type) = xstrdup ("vec128"); + field_type = tdesc_named_type (feature, "uint128"); + append_composite_type_field (type, xstrdup ("uint128"), field_type); + field_type = tdesc_named_type (feature, "v4f"); + append_composite_type_field (type, xstrdup ("v4_float"), field_type); + field_type = tdesc_named_type (feature, "v4i32"); + append_composite_type_field (type, xstrdup ("v4_int32"), field_type); + field_type = tdesc_named_type (feature, "v8i16"); + append_composite_type_field (type, xstrdup ("v8_int16"), field_type); + field_type = tdesc_named_type (feature, "v16i8"); + append_composite_type_field (type, xstrdup ("v16_int8"), field_type); + TYPE_FLAGS (type) |= TYPE_FLAG_VECTOR; + tdesc_record_type (feature, type); + + tdesc_create_reg (feature, "vr0", 71, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr1", 72, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr2", 73, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr3", 74, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr4", 75, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr5", 76, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr6", 77, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr7", 78, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr8", 79, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr9", 80, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr10", 81, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr11", 82, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr12", 83, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr13", 84, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr14", 85, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr15", 86, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr16", 87, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr17", 88, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr18", 89, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr19", 90, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr20", 91, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr21", 92, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr22", 93, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr23", 94, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr24", 95, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr25", 96, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr26", 97, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr27", 98, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr28", 99, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr29", 100, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr30", 101, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr31", 102, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vscr", 103, 1, "vector", 32, "int"); + tdesc_create_reg (feature, "vrsave", 104, 1, "vector", 32, "int"); + + feature = tdesc_create_feature (result, "org.gnu.gdb.power.vsx"); + tdesc_create_reg (feature, "vs0h", 105, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "vs1h", 106, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "vs2h", 107, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "vs3h", 108, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "vs4h", 109, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "vs5h", 110, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "vs6h", 111, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "vs7h", 112, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "vs8h", 113, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "vs9h", 114, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "vs10h", 115, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "vs11h", 116, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "vs12h", 117, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "vs13h", 118, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "vs14h", 119, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "vs15h", 120, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "vs16h", 121, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "vs17h", 122, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "vs18h", 123, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "vs19h", 124, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "vs20h", 125, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "vs21h", 126, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "vs22h", 127, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "vs23h", 128, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "vs24h", 129, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "vs25h", 130, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "vs26h", 131, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "vs27h", 132, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "vs28h", 133, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "vs29h", 134, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "vs30h", 135, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "vs31h", 136, 1, NULL, 64, "uint64"); + + tdesc_powerpc_vsx64 = result; +} diff --git a/gdb/features/rs6000/powerpc-vsx64.xml b/gdb/features/rs6000/powerpc-vsx64.xml new file mode 100644 index 0000000..322850e --- /dev/null +++ b/gdb/features/rs6000/powerpc-vsx64.xml @@ -0,0 +1,18 @@ +<?xml version="1.0"?> +<!-- Copyright (C) 2008 Free Software Foundation, Inc. + + Copying and distribution of this file, with or without modification, + are permitted in any medium without royalty provided the copyright + notice and this notice are preserved. --> + +<!-- PowerPC UISA - a PPC processor as viewed by user-level code. A UISA-only + view of the PowerPC. Includes AltiVec and VSX vector registers. --> + +<!DOCTYPE target SYSTEM "gdb-target.dtd"> +<target> + <architecture>powerpc:common64</architecture> + <xi:include href="power64-core.xml"/> + <xi:include href="power-fpu.xml"/> + <xi:include href="power-altivec.xml"/> + <xi:include href="power-vsx.xml"/> +</target> diff --git a/gdb/features/rs6000/powerpc-vsx64l.c b/gdb/features/rs6000/powerpc-vsx64l.c new file mode 100644 index 0000000..689ca67 --- /dev/null +++ b/gdb/features/rs6000/powerpc-vsx64l.c @@ -0,0 +1,202 @@ +/* THIS FILE IS GENERATED. Original: powerpc-vsx64l.xml */ + +#include "defs.h" +#include "gdbtypes.h" +#include "target-descriptions.h" + +struct target_desc *tdesc_powerpc_vsx64l; +static void +initialize_tdesc_powerpc_vsx64l (void) +{ + struct target_desc *result = allocate_target_description (); + struct tdesc_feature *feature; + struct type *field_type, *type; + + set_tdesc_architecture (result, bfd_scan_arch ("powerpc:common64")); + + feature = tdesc_create_feature (result, "org.gnu.gdb.power.core"); + tdesc_create_reg (feature, "r0", 0, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r1", 1, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r2", 2, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r3", 3, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r4", 4, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r5", 5, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r6", 6, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r7", 7, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r8", 8, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r9", 9, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r10", 10, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r11", 11, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r12", 12, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r13", 13, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r14", 14, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r15", 15, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r16", 16, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r17", 17, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r18", 18, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r19", 19, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r20", 20, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r21", 21, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r22", 22, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r23", 23, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r24", 24, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r25", 25, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r26", 26, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r27", 27, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r28", 28, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r29", 29, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r30", 30, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "r31", 31, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "pc", 64, 1, NULL, 64, "code_ptr"); + tdesc_create_reg (feature, "msr", 65, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "cr", 66, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "lr", 67, 1, NULL, 64, "code_ptr"); + tdesc_create_reg (feature, "ctr", 68, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "xer", 69, 1, NULL, 32, "uint32"); + + feature = tdesc_create_feature (result, "org.gnu.gdb.power.fpu"); + tdesc_create_reg (feature, "f0", 32, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f1", 33, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f2", 34, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f3", 35, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f4", 36, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f5", 37, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f6", 38, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f7", 39, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f8", 40, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f9", 41, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f10", 42, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f11", 43, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f12", 44, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f13", 45, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f14", 46, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f15", 47, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f16", 48, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f17", 49, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f18", 50, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f19", 51, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f20", 52, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f21", 53, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f22", 54, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f23", 55, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f24", 56, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f25", 57, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f26", 58, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f27", 59, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f28", 60, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f29", 61, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f30", 62, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "f31", 63, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "fpscr", 70, 1, "float", 32, "int"); + + feature = tdesc_create_feature (result, "org.gnu.gdb.power.linux"); + tdesc_create_reg (feature, "orig_r3", 71, 1, NULL, 64, "int"); + tdesc_create_reg (feature, "trap", 72, 1, NULL, 64, "int"); + + feature = tdesc_create_feature (result, "org.gnu.gdb.power.altivec"); + field_type = tdesc_named_type (feature, "ieee_single"); + type = init_vector_type (field_type, 4); + TYPE_NAME (type) = xstrdup ("v4f"); + tdesc_record_type (feature, type); + + field_type = tdesc_named_type (feature, "int32"); + type = init_vector_type (field_type, 4); + TYPE_NAME (type) = xstrdup ("v4i32"); + tdesc_record_type (feature, type); + + field_type = tdesc_named_type (feature, "int16"); + type = init_vector_type (field_type, 8); + TYPE_NAME (type) = xstrdup ("v8i16"); + tdesc_record_type (feature, type); + + field_type = tdesc_named_type (feature, "int8"); + type = init_vector_type (field_type, 16); + TYPE_NAME (type) = xstrdup ("v16i8"); + tdesc_record_type (feature, type); + + type = init_composite_type (NULL, TYPE_CODE_UNION); + TYPE_NAME (type) = xstrdup ("vec128"); + field_type = tdesc_named_type (feature, "uint128"); + append_composite_type_field (type, xstrdup ("uint128"), field_type); + field_type = tdesc_named_type (feature, "v4f"); + append_composite_type_field (type, xstrdup ("v4_float"), field_type); + field_type = tdesc_named_type (feature, "v4i32"); + append_composite_type_field (type, xstrdup ("v4_int32"), field_type); + field_type = tdesc_named_type (feature, "v8i16"); + append_composite_type_field (type, xstrdup ("v8_int16"), field_type); + field_type = tdesc_named_type (feature, "v16i8"); + append_composite_type_field (type, xstrdup ("v16_int8"), field_type); + TYPE_FLAGS (type) |= TYPE_FLAG_VECTOR; + tdesc_record_type (feature, type); + + tdesc_create_reg (feature, "vr0", 73, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr1", 74, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr2", 75, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr3", 76, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr4", 77, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr5", 78, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr6", 79, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr7", 80, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr8", 81, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr9", 82, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr10", 83, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr11", 84, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr12", 85, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr13", 86, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr14", 87, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr15", 88, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr16", 89, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr17", 90, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr18", 91, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr19", 92, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr20", 93, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr21", 94, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr22", 95, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr23", 96, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr24", 97, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr25", 98, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr26", 99, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr27", 100, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr28", 101, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr29", 102, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr30", 103, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vr31", 104, 1, NULL, 128, "vec128"); + tdesc_create_reg (feature, "vscr", 105, 1, "vector", 32, "int"); + tdesc_create_reg (feature, "vrsave", 106, 1, "vector", 32, "int"); + + feature = tdesc_create_feature (result, "org.gnu.gdb.power.vsx"); + tdesc_create_reg (feature, "vs0h", 107, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "vs1h", 108, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "vs2h", 109, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "vs3h", 110, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "vs4h", 111, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "vs5h", 112, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "vs6h", 113, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "vs7h", 114, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "vs8h", 115, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "vs9h", 116, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "vs10h", 117, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "vs11h", 118, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "vs12h", 119, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "vs13h", 120, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "vs14h", 121, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "vs15h", 122, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "vs16h", 123, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "vs17h", 124, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "vs18h", 125, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "vs19h", 126, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "vs20h", 127, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "vs21h", 128, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "vs22h", 129, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "vs23h", 130, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "vs24h", 131, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "vs25h", 132, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "vs26h", 133, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "vs27h", 134, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "vs28h", 135, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "vs29h", 136, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "vs30h", 137, 1, NULL, 64, "uint64"); + tdesc_create_reg (feature, "vs31h", 138, 1, NULL, 64, "uint64"); + + tdesc_powerpc_vsx64l = result; +} diff --git a/gdb/features/rs6000/powerpc-vsx64l.xml b/gdb/features/rs6000/powerpc-vsx64l.xml new file mode 100644 index 0000000..655ae5c --- /dev/null +++ b/gdb/features/rs6000/powerpc-vsx64l.xml @@ -0,0 +1,20 @@ +<?xml version="1.0"?> +<!-- Copyright (C) 2008 Free Software Foundation, Inc. + + Copying and distribution of this file, with or without modification, + are permitted in any medium without royalty provided the copyright + notice and this notice are preserved. --> + +<!-- PowerPC UISA - a PPC processor as viewed by user-level code. A UISA-only + view of the PowerPC. Includes Linux-only special "registers", AltiVec + and VSX vector registers. --> + +<!DOCTYPE target SYSTEM "gdb-target.dtd"> +<target> + <architecture>powerpc:common64</architecture> + <xi:include href="power64-core.xml"/> + <xi:include href="power-fpu.xml"/> + <xi:include href="power64-linux.xml"/> + <xi:include href="power-altivec.xml"/> + <xi:include href="power-vsx.xml"/> +</target> |