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Diffstat (limited to 'gdb/doc/gdb.texinfo')
| -rw-r--r-- | gdb/doc/gdb.texinfo | 10 |
1 files changed, 10 insertions, 0 deletions
diff --git a/gdb/doc/gdb.texinfo b/gdb/doc/gdb.texinfo index 1ef4c8a..61c2917 100644 --- a/gdb/doc/gdb.texinfo +++ b/gdb/doc/gdb.texinfo @@ -16427,6 +16427,9 @@ The pseudo-registers go from @code{$dl0} through @code{$dl15}, and are formed by joining the even/odd register pairs @code{f0} and @code{f1} for @code{$dl0}, @code{f2} and @code{f3} for @code{$dl1} and so on. +For POWER7 processors, @value{GDB} provides a set of pseudo-registers, the 64-bit +wide Extended Floating Point Registers (@samp{f32} through @samp{f63}). + @node Controlling GDB @chapter Controlling @value{GDBN} @@ -27865,6 +27868,13 @@ The @samp{org.gnu.gdb.power.altivec} feature is optional. It should contain registers @samp{vr0} through @samp{vr31}, @samp{vscr}, and @samp{vrsave}. +The @samp{org.gnu.gdb.power.vsx} feature is optional. It should +contain registers @samp{vs0h} through @samp{vs31h}. @value{GDBN} +will combine these registers with the floating point registers +(@samp{f0} through @samp{f31}) and the altivec registers (@samp{vr0} +through @samp{vr31}} to present the 128-bit wide registers @samp{vs0} +through @samp{vs63}, the set of vector registers for POWER7. + The @samp{org.gnu.gdb.power.spe} feature is optional. It should contain registers @samp{ev0h} through @samp{ev31h}, @samp{acc}, and @samp{spefscr}. SPE targets should provide 32-bit registers in |