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Diffstat (limited to 'gdb/cris-tdep.c')
-rw-r--r--gdb/cris-tdep.c94
1 files changed, 58 insertions, 36 deletions
diff --git a/gdb/cris-tdep.c b/gdb/cris-tdep.c
index 039e24f..a8817e9 100644
--- a/gdb/cris-tdep.c
+++ b/gdb/cris-tdep.c
@@ -74,8 +74,8 @@ enum cris_num_regs
ARG2_REGNUM Contains the second parameter to a function.
ARG3_REGNUM Contains the third parameter to a function.
ARG4_REGNUM Contains the fourth parameter to a function. Rest on stack.
- SP_REGNUM Contains address of top of stack.
- PC_REGNUM Contains address of next instruction.
+ gdbarch_sp_regnum Contains address of top of stack.
+ gdbarch_pc_regnum Contains address of next instruction.
SRP_REGNUM Subroutine return pointer register.
BRP_REGNUM Breakpoint return pointer register. */
@@ -279,7 +279,7 @@ cris_sigcontext_addr (struct frame_info *next_frame)
CORE_ADDR sp;
char buf[4];
- frame_unwind_register (next_frame, SP_REGNUM, buf);
+ frame_unwind_register (next_frame, gdbarch_sp_regnum (current_gdbarch), buf);
sp = extract_unsigned_integer (buf, 4);
/* Look for normal sigtramp frame first. */
@@ -359,7 +359,7 @@ cris_sigtramp_frame_unwind_cache (struct frame_info *next_frame,
info->return_pc = 0;
info->leaf_function = 0;
- frame_unwind_register (next_frame, SP_REGNUM, buf);
+ frame_unwind_register (next_frame, gdbarch_sp_regnum (current_gdbarch), buf);
info->base = extract_unsigned_integer (buf, 4);
addr = cris_sigcontext_addr (next_frame);
@@ -385,8 +385,10 @@ cris_sigtramp_frame_unwind_cache (struct frame_info *next_frame,
it though since that will mean that the backtrace will show a PC
different from what is shown when stopped. */
info->saved_regs[IRP_REGNUM].addr = addr + (19 * 4);
- info->saved_regs[PC_REGNUM] = info->saved_regs[IRP_REGNUM];
- info->saved_regs[SP_REGNUM].addr = addr + (24 * 4);
+ info->saved_regs[gdbarch_pc_regnum (current_gdbarch)]
+ = info->saved_regs[IRP_REGNUM];
+ info->saved_regs[gdbarch_sp_regnum (current_gdbarch)].addr
+ = addr + (24 * 4);
}
else
{
@@ -413,9 +415,11 @@ cris_sigtramp_frame_unwind_cache (struct frame_info *next_frame,
This could be solved by a couple of read_memory_unsigned_integer and a
trad_frame_set_value. */
- info->saved_regs[PC_REGNUM] = info->saved_regs[ERP_REGNUM];
+ info->saved_regs[gdbarch_pc_regnum (current_gdbarch)]
+ = info->saved_regs[ERP_REGNUM];
- info->saved_regs[SP_REGNUM].addr = addr + (25 * 4);
+ info->saved_regs[gdbarch_sp_regnum (current_gdbarch)].addr
+ = addr + (25 * 4);
}
return info;
@@ -986,7 +990,8 @@ cris_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
}
/* Finally, update the SP register. */
- regcache_cooked_write_unsigned (regcache, SP_REGNUM, sp);
+ regcache_cooked_write_unsigned (regcache,
+ gdbarch_sp_regnum (current_gdbarch), sp);
return sp;
}
@@ -1180,7 +1185,7 @@ cris_scan_prologue (CORE_ADDR pc, struct frame_info *next_frame,
}
continue;
}
- else if (cris_get_operand2 (insn) == SP_REGNUM
+ else if (cris_get_operand2 (insn) == gdbarch_sp_regnum (current_gdbarch)
&& cris_get_mode (insn) == 0x0000
&& cris_get_opcode (insn) == 0x000A)
{
@@ -1193,12 +1198,13 @@ cris_scan_prologue (CORE_ADDR pc, struct frame_info *next_frame,
else if (cris_get_mode (insn) == 0x0002
&& cris_get_opcode (insn) == 0x000F
&& cris_get_size (insn) == 0x0003
- && cris_get_operand1 (insn) == SP_REGNUM)
+ && cris_get_operand1 (insn) == gdbarch_sp_regnum
+ (current_gdbarch))
{
/* movem r<regsave>,[sp] */
regsave = cris_get_operand2 (insn);
}
- else if (cris_get_operand2 (insn) == SP_REGNUM
+ else if (cris_get_operand2 (insn) == gdbarch_sp_regnum (current_gdbarch)
&& ((insn & 0x0F00) >> 8) == 0x0001
&& (cris_get_signed_offset (insn) < 0))
{
@@ -1215,7 +1221,8 @@ cris_scan_prologue (CORE_ADDR pc, struct frame_info *next_frame,
if (cris_get_mode (insn_next) == PREFIX_ASSIGN_MODE
&& cris_get_opcode (insn_next) == 0x000F
&& cris_get_size (insn_next) == 0x0003
- && cris_get_operand1 (insn_next) == SP_REGNUM)
+ && cris_get_operand1 (insn_next) == gdbarch_sp_regnum
+ (current_gdbarch))
{
regsave = cris_get_operand2 (insn_next);
}
@@ -1257,7 +1264,7 @@ cris_scan_prologue (CORE_ADDR pc, struct frame_info *next_frame,
insn_next = read_memory_unsigned_integer (pc, 2);
pc += 2;
regno = cris_get_operand2 (insn_next);
- if ((regno >= 0 && regno < SP_REGNUM)
+ if ((regno >= 0 && regno < gdbarch_sp_regnum (current_gdbarch))
&& cris_get_mode (insn_next) == PREFIX_OFFSET_MODE
&& cris_get_opcode (insn_next) == 0x000F)
{
@@ -1281,7 +1288,7 @@ cris_scan_prologue (CORE_ADDR pc, struct frame_info *next_frame,
insn_next = read_memory_unsigned_integer (pc, 2);
pc += 2;
regno = cris_get_operand2 (insn_next);
- if ((regno >= 0 && regno < SP_REGNUM)
+ if ((regno >= 0 && regno < gdbarch_sp_regnum (current_gdbarch))
&& cris_get_mode (insn_next) == PREFIX_OFFSET_MODE
&& cris_get_opcode (insn_next) == 0x0009
&& cris_get_operand1 (insn_next) == regno)
@@ -1335,7 +1342,9 @@ cris_scan_prologue (CORE_ADDR pc, struct frame_info *next_frame,
ULONGEST this_base;
/* Assume that the FP is this frame's SP but with that pushed
stack space added back. */
- frame_unwind_unsigned_register (next_frame, SP_REGNUM, &this_base);
+ frame_unwind_unsigned_register (next_frame,
+ gdbarch_sp_regnum (current_gdbarch),
+ &this_base);
info->base = this_base;
info->prev_sp = info->base + info->size;
}
@@ -1354,7 +1363,8 @@ cris_scan_prologue (CORE_ADDR pc, struct frame_info *next_frame,
/* The previous frame's SP needed to be computed. Save the computed
value. */
- trad_frame_set_value (info->saved_regs, SP_REGNUM, info->prev_sp);
+ trad_frame_set_value (info->saved_regs,
+ gdbarch_sp_regnum (current_gdbarch), info->prev_sp);
if (!info->leaf_function)
{
@@ -1372,7 +1382,8 @@ cris_scan_prologue (CORE_ADDR pc, struct frame_info *next_frame,
}
/* The PC is found in SRP (the actual register or located on the stack). */
- info->saved_regs[PC_REGNUM] = info->saved_regs[SRP_REGNUM];
+ info->saved_regs[gdbarch_pc_regnum (current_gdbarch)]
+ = info->saved_regs[SRP_REGNUM];
return pc;
}
@@ -1403,12 +1414,15 @@ crisv32_scan_prologue (CORE_ADDR pc, struct frame_info *next_frame,
}
/* The SP is assumed to be unaltered. */
- frame_unwind_unsigned_register (next_frame, SP_REGNUM, &this_base);
+ frame_unwind_unsigned_register (next_frame,
+ gdbarch_sp_regnum (current_gdbarch),
+ &this_base);
info->base = this_base;
info->prev_sp = this_base;
/* The PC is assumed to be found in SRP. */
- info->saved_regs[PC_REGNUM] = info->saved_regs[SRP_REGNUM];
+ info->saved_regs[gdbarch_pc_regnum (current_gdbarch)]
+ = info->saved_regs[SRP_REGNUM];
return pc;
}
@@ -1447,7 +1461,8 @@ static CORE_ADDR
cris_unwind_pc (struct gdbarch *gdbarch, struct frame_info *next_frame)
{
ULONGEST pc;
- frame_unwind_unsigned_register (next_frame, PC_REGNUM, &pc);
+ frame_unwind_unsigned_register (next_frame,
+ gdbarch_pc_regnum (current_gdbarch), &pc);
return pc;
}
@@ -1455,7 +1470,8 @@ static CORE_ADDR
cris_unwind_sp (struct gdbarch *gdbarch, struct frame_info *next_frame)
{
ULONGEST sp;
- frame_unwind_unsigned_register (next_frame, SP_REGNUM, &sp);
+ frame_unwind_unsigned_register (next_frame,
+ gdbarch_sp_regnum (current_gdbarch), &sp);
return sp;
}
@@ -1550,7 +1566,8 @@ cris_register_size (int regno)
/* Special register not applicable to this CRIS version. */
return 0;
}
- else if (regno >= PC_REGNUM && regno < gdbarch_num_regs (current_gdbarch))
+ else if (regno >= gdbarch_pc_regnum (current_gdbarch)
+ && regno < gdbarch_num_regs (current_gdbarch))
{
/* This will apply to CRISv32 only where there are additional registers
after the special registers (pseudo PC and support registers). */
@@ -1651,11 +1668,12 @@ crisv32_cannot_store_register (int regno)
static struct type *
cris_register_type (struct gdbarch *gdbarch, int regno)
{
- if (regno == PC_REGNUM)
+ if (regno == gdbarch_pc_regnum (current_gdbarch))
return builtin_type_void_func_ptr;
- else if (regno == SP_REGNUM || regno == CRIS_FP_REGNUM)
+ else if (regno == gdbarch_sp_regnum (current_gdbarch)
+ || regno == CRIS_FP_REGNUM)
return builtin_type_void_data_ptr;
- else if ((regno >= 0 && regno < SP_REGNUM)
+ else if ((regno >= 0 && regno < gdbarch_sp_regnum (current_gdbarch))
|| (regno >= MOF_REGNUM && regno <= USP_REGNUM))
/* Note: R8 taken care of previous clause. */
return builtin_type_uint32;
@@ -1671,9 +1689,10 @@ cris_register_type (struct gdbarch *gdbarch, int regno)
static struct type *
crisv32_register_type (struct gdbarch *gdbarch, int regno)
{
- if (regno == PC_REGNUM)
+ if (regno == gdbarch_pc_regnum (current_gdbarch))
return builtin_type_void_func_ptr;
- else if (regno == SP_REGNUM || regno == CRIS_FP_REGNUM)
+ else if (regno == gdbarch_sp_regnum (current_gdbarch)
+ || regno == CRIS_FP_REGNUM)
return builtin_type_void_data_ptr;
else if ((regno >= 0 && regno <= ACR_REGNUM)
|| (regno >= EXS_REGNUM && regno <= SPC_REGNUM)
@@ -1801,7 +1820,7 @@ crisv32_register_name (int regno)
{
return cris_special_register_name (regno);
}
- else if (regno == PC_REGNUM)
+ else if (regno == gdbarch_pc_regnum (current_gdbarch))
{
return "pc";
}
@@ -1854,11 +1873,11 @@ cris_dwarf2_frame_init_reg (struct gdbarch *gdbarch, int regnum,
struct frame_info *next_frame)
{
/* The return address column. */
- if (regnum == PC_REGNUM)
+ if (regnum == gdbarch_pc_regnum (current_gdbarch))
reg->how = DWARF2_FRAME_REG_RA;
/* The call frame address. */
- else if (regnum == SP_REGNUM)
+ else if (regnum == gdbarch_sp_regnum (current_gdbarch))
reg->how = DWARF2_FRAME_REG_CFA;
}
@@ -2090,7 +2109,8 @@ find_step_target (struct frame_info *frame, inst_env_type *inst_env)
do
{
/* Read an instruction from the client. */
- insn = read_memory_unsigned_integer (inst_env->reg[PC_REGNUM], 2);
+ insn = read_memory_unsigned_integer
+ (inst_env->reg[gdbarch_pc_regnum (current_gdbarch)], 2);
/* If the instruction is not in a delay slot the new content of the
PC is [PC] + 2. If the instruction is in a delay slot it is not
@@ -2099,12 +2119,13 @@ find_step_target (struct frame_info *frame, inst_env_type *inst_env)
Just make sure it is a valid instruction. */
if (!inst_env->delay_slot_pc_active)
{
- inst_env->reg[PC_REGNUM] += 2;
+ inst_env->reg[gdbarch_pc_regnum (current_gdbarch)] += 2;
}
else
{
inst_env->delay_slot_pc_active = 0;
- inst_env->reg[PC_REGNUM] = inst_env->delay_slot_pc;
+ inst_env->reg[gdbarch_pc_regnum (current_gdbarch)]
+ = inst_env->delay_slot_pc;
}
/* Analyse the present instruction. */
i = find_cris_op (insn, inst_env);
@@ -2144,7 +2165,8 @@ cris_software_single_step (struct frame_info *frame)
{
/* Insert at most two breakpoints. One for the next PC content
and possibly another one for a branch, jump, etc. */
- CORE_ADDR next_pc = (CORE_ADDR) inst_env.reg[PC_REGNUM];
+ CORE_ADDR next_pc =
+ (CORE_ADDR) inst_env.reg[gdbarch_pc_regnum (current_gdbarch)];
insert_single_step_breakpoint (next_pc);
if (inst_env.branch_found
&& (CORE_ADDR) inst_env.branch_break_address != next_pc)
@@ -3882,7 +3904,7 @@ cris_supply_gregset (struct regcache *regcache, elf_gregset_t *gregsetp)
/* Needed to set pseudo-register PC for CRISv32. */
/* FIXME: If ERP is in a delay slot at this point then the PC will
be wrong. Issue a warning to alert the user. */
- regcache_raw_supply (regcache, PC_REGNUM,
+ regcache_raw_supply (regcache, gdbarch_pc_regnum (current_gdbarch),
(char *)&regp[ERP_REGNUM]);
if (*(char *)&regp[ERP_REGNUM] & 0x1)
generated by cgit v1.1 at 2024-12-04 02:51:07 +0000