2 files changed, 0 insertions, 73 deletions
diff --git a/gdb/config/mn10300/mn10300.mt b/gdb/config/mn10300/mn10300.mt
index fc503bd..0b54fd5 100644
--- a/gdb/config/mn10300/mn10300.mt
+++ b/gdb/config/mn10300/mn10300.mt
@@ -1,6 +1,4 @@
 # Target: Matsushita mn10300
 TDEPFILES= mn10300-tdep.o
-TM_FILE= tm-mn10300.h
-
 SIM_OBS = remote-sim.o
 SIM = ../sim/mn10300/libsim.a
diff --git a/gdb/config/mn10300/tm-mn10300.h b/gdb/config/mn10300/tm-mn10300.h
deleted file mode 100644
index 81cfaab..0000000
--- a/gdb/config/mn10300/tm-mn10300.h
+++ /dev/null
@@ -1,71 +0,0 @@
-/* Parameters for execution on a Matsushita mn10300 processor.
-   Copyright 1996, 1997, 1998, 1999, 2000, 2001
-   Free Software Foundation, Inc.
-
-   Contributed by Geoffrey Noer <noer@cygnus.com>
-
-   This file is part of GDB.
-
-   This program is free software; you can redistribute it and/or modify
-   it under the terms of the GNU General Public License as published by
-   the Free Software Foundation; either version 2 of the License, or
-   (at your option) any later version.
-
-   This program is distributed in the hope that it will be useful,
-   but WITHOUT ANY WARRANTY; without even the implied warranty of
-   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-   GNU General Public License for more details.
-
-   You should have received a copy of the GNU General Public License
-   along with this program; if not, write to the Free Software
-   Foundation, Inc., 59 Temple Place - Suite 330,
-   Boston, MA 02111-1307, USA.  */
-
-#define GDB_MULTI_ARCH 1
-
-/* The mn10300 is little endian.  */
-#define TARGET_BYTE_ORDER_DEFAULT LITTLE_ENDIAN
-
-/* All registers are 32bits (phew!).  */
-#if !GDB_MULTI_ARCH
-#define REGISTER_SIZE 4
-#define MAX_REGISTER_RAW_SIZE 4
-#define NUM_REGS 32
-#endif
-
-#if !GDB_MULTI_ARCH
-#define REGISTER_VIRTUAL_TYPE(REG) builtin_type_int
-#endif
-
-#if !GDB_MULTI_ARCH
-#define REGISTER_BYTE(REG) ((REG) * 4)
-#define REGISTER_VIRTUAL_SIZE(REG) 4
-#define REGISTER_RAW_SIZE(REG) 4
-#endif
-
-#define D0_REGNUM 0
-#define D2_REGNUM 2
-#define D3_REGNUM 3
-#define A0_REGNUM 4
-#define A2_REGNUM 6
-#define A3_REGNUM 7
-#define MDR_REGNUM 10
-#define PSW_REGNUM 11
-#define LIR_REGNUM 12
-#define LAR_REGNUM 13
-#define MDRQ_REGNUM 14
-#define E0_REGNUM 15
-#define MCRH_REGNUM 26
-#define MCRL_REGNUM 27
-#define MCVF_REGNUM 28
-
-enum movm_register_bits {
-  movm_exother_bit = 0x01,
-  movm_exreg1_bit  = 0x02,
-  movm_exreg0_bit  = 0x04,
-  movm_other_bit   = 0x08,
-  movm_a3_bit      = 0x10,
-  movm_a2_bit      = 0x20,
-  movm_d3_bit      = 0x40,
-  movm_d2_bit      = 0x80
-};