diff options
Diffstat (limited to 'gdb/aarch64-tdep.c')
| -rw-r--r-- | gdb/aarch64-tdep.c | 17 |
1 files changed, 9 insertions, 8 deletions
diff --git a/gdb/aarch64-tdep.c b/gdb/aarch64-tdep.c index d203ebe..000540a 100644 --- a/gdb/aarch64-tdep.c +++ b/gdb/aarch64-tdep.c @@ -2417,7 +2417,7 @@ value_of_aarch64_user_reg (struct frame_info *frame, const void *baton) /* Implement the "software_single_step" gdbarch method, needed to single step through atomic sequences on AArch64. */ -static VEC (CORE_ADDR) * +static std::vector<CORE_ADDR> aarch64_software_single_step (struct regcache *regcache) { struct gdbarch *gdbarch = get_regcache_arch (regcache); @@ -2435,14 +2435,13 @@ aarch64_software_single_step (struct regcache *regcache) int bc_insn_count = 0; /* Conditional branch instruction count. */ int last_breakpoint = 0; /* Defaults to 0 (no breakpoints placed). */ aarch64_inst inst; - VEC (CORE_ADDR) *next_pcs = NULL; if (aarch64_decode_insn (insn, &inst, 1) != 0) - return NULL; + return {}; /* Look for a Load Exclusive instruction which begins the sequence. */ if (inst.opcode->iclass != ldstexcl || bit (insn, 22) == 0) - return NULL; + return {}; for (insn_count = 0; insn_count < atomic_sequence_length; ++insn_count) { @@ -2451,14 +2450,14 @@ aarch64_software_single_step (struct regcache *regcache) byte_order_for_code); if (aarch64_decode_insn (insn, &inst, 1) != 0) - return NULL; + return {}; /* Check if the instruction is a conditional branch. */ if (inst.opcode->iclass == condbranch) { gdb_assert (inst.operands[0].type == AARCH64_OPND_ADDR_PCREL19); if (bc_insn_count >= 1) - return NULL; + return {}; /* It is, so we'll try to set a breakpoint at the destination. */ breaks[1] = loc + inst.operands[0].imm.value; @@ -2477,7 +2476,7 @@ aarch64_software_single_step (struct regcache *regcache) /* We didn't find a closing Store Exclusive instruction, fall back. */ if (!closing_insn) - return NULL; + return {}; /* Insert breakpoint after the end of the atomic sequence. */ breaks[0] = loc + insn_size; @@ -2489,10 +2488,12 @@ aarch64_software_single_step (struct regcache *regcache) || (breaks[1] >= pc && breaks[1] <= closing_insn))) last_breakpoint = 0; + std::vector<CORE_ADDR> next_pcs; + /* Insert the breakpoint at the end of the sequence, and one at the destination of the conditional branch, if it exists. */ for (index = 0; index <= last_breakpoint; index++) - VEC_safe_push (CORE_ADDR, next_pcs, breaks[index]); + next_pcs.push_back (breaks[index]); return next_pcs; } |