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-rw-r--r--gas/ChangeLog13
-rw-r--r--gas/config/tc-arc.c55
-rw-r--r--gas/testsuite/gas/arc/tdpfp.d28
-rw-r--r--gas/testsuite/gas/arc/tfpuda.d28
-rw-r--r--gas/testsuite/gas/arc/tfpx.s22
5 files changed, 142 insertions, 4 deletions
diff --git a/gas/ChangeLog b/gas/ChangeLog
index b4d8ee8..53cf66a 100644
--- a/gas/ChangeLog
+++ b/gas/ChangeLog
@@ -1,3 +1,16 @@
+2016-04-05 Claudiu Zissulescu <claziss@synopsys.com>
+
+ * config/tc-arc.c (is_code_density_p): Compare directly the
+ subclass field.
+ (is_spfp_p, is_dpfp_p, is_spfp_p): Define.
+ (check_cpu_feature): New function.
+ (find_opcode_match): Use check_cpu_feature function.
+ (preprocess_operands): Likewise.
+ (md_parse_option): Use mfpuda, mdpfp, mspfp options.
+ * testsuite/gas/arc/tdpfp.d: New file.
+ * testsuite/gas/arc/tfpuda.d: Likewise.
+ * testsuite/gas/arc/tfpx.s: Likewise.
+
2016-04-05 Jiong Wang <jiong.wang@arm.com>
* config/tc-arm.c (do_neon_mac_maybe_scalar): Allow F16.
diff --git a/gas/config/tc-arc.c b/gas/config/tc-arc.c
index 40643ad..42b0f8f 100644
--- a/gas/config/tc-arc.c
+++ b/gas/config/tc-arc.c
@@ -93,7 +93,10 @@ enum arc_rlx_types
#define regno(x) ((x) & 0x3F)
#define is_ir_num(x) (((x) & ~0x3F) == 0)
-#define is_code_density_p(op) (((op)->subclass == CD1 || (op)->subclass == CD2))
+#define is_code_density_p(sc) (((sc) == CD1 || (sc) == CD2))
+#define is_spfp_p(op) (((sc) == SPX))
+#define is_dpfp_p(op) (((sc) == DPX))
+#define is_fpuda_p(op) (((sc) == DPA))
#define is_br_jmp_insn_p(op) (((op)->class == BRANCH || (op)->class == JUMP))
#define is_kernel_insn_p(op) (((op)->class == KERNEL))
@@ -1344,6 +1347,30 @@ allocate_tok (expressionS *tok, int ntok, int cidx)
return allocate_tok (tok, ntok - 1, cidx);
}
+/* Check if an particular ARC feature is enabled. */
+
+static bfd_boolean
+check_cpu_feature (insn_subclass_t sc)
+{
+ if (!(arc_features & ARC_CD)
+ && is_code_density_p (sc))
+ return FALSE;
+
+ if (!(arc_features & ARC_SPFP)
+ && is_spfp_p (sc))
+ return FALSE;
+
+ if (!(arc_features & ARC_DPFP)
+ && is_dpfp_p (sc))
+ return FALSE;
+
+ if (!(arc_features & ARC_FPUDA)
+ && is_fpuda_p (sc))
+ return FALSE;
+
+ return TRUE;
+}
+
/* Search forward through all variants of an opcode looking for a
syntax match. */
@@ -1381,7 +1408,7 @@ find_opcode_match (const struct arc_opcode *first_opcode,
if (!(opcode->cpu & arc_target))
goto match_failed;
- if (is_code_density_p (opcode) && !(arc_features & ARC_CD))
+ if (!check_cpu_feature (opcode->subclass))
goto match_failed;
got_cpu_match = 1;
@@ -1972,7 +1999,9 @@ preprocess_operands (const struct arc_opcode *opcode,
auxr = &arc_aux_regs[0];
for (j = 0; j < arc_num_aux_regs; j++, auxr++)
if (len == auxr->length
- && strcasecmp (auxr->name, p) == 0)
+ && (strcasecmp (auxr->name, p) == 0)
+ && ((auxr->subclass == NONE)
+ || check_cpu_feature (auxr->subclass)))
{
tok[i].X_op = O_constant;
tok[i].X_add_number = auxr->address;
@@ -2951,6 +2980,8 @@ md_parse_option (int c, const char *arg ATTRIBUTE_UNUSED)
/* This option has an effect only on ARC EM. */
if (arc_target & ARC_OPCODE_ARCv2EM)
arc_features |= ARC_CD;
+ else
+ as_warn (_("Code density option invalid for selected CPU"));
break;
case OPTION_RELAX:
@@ -2967,8 +2998,17 @@ md_parse_option (int c, const char *arg ATTRIBUTE_UNUSED)
case OPTION_EA:
case OPTION_MUL64:
case OPTION_SIMD:
+ /* Dummy options are accepted but have no effect. */
+ break;
+
case OPTION_SPFP:
+ arc_features |= ARC_SPFP;
+ break;
+
case OPTION_DPFP:
+ arc_features |= ARC_DPFP;
+ break;
+
case OPTION_XMAC_D16:
case OPTION_XMAC_24:
case OPTION_DSP_PACKA:
@@ -2979,10 +3019,17 @@ md_parse_option (int c, const char *arg ATTRIBUTE_UNUSED)
case OPTION_LOCK:
case OPTION_SWAPE:
case OPTION_RTSC:
- case OPTION_FPUDA:
/* Dummy options are accepted but have no effect. */
break;
+ case OPTION_FPUDA:
+ /* This option has an effect only on ARC EM. */
+ if (arc_target & ARC_OPCODE_ARCv2EM)
+ arc_features |= ARC_FPUDA;
+ else
+ as_warn (_("FPUDA invalid for selected CPU"));
+ break;
+
default:
return 0;
}
diff --git a/gas/testsuite/gas/arc/tdpfp.d b/gas/testsuite/gas/arc/tdpfp.d
new file mode 100644
index 0000000..6475ebc
--- /dev/null
+++ b/gas/testsuite/gas/arc/tdpfp.d
@@ -0,0 +1,28 @@
+#as:-mcpu=arcem -mdpfp
+#objdump: -dr
+#source: tfpx.s
+
+.*: +file format .*arc.*
+
+
+Disassembly of section .text:
+
+00000000 <.text>:
+ 0: 24aa 008c lr r4,\[770\]
+ 4: 23aa 004c lr r3,\[769\]
+ 8: 24aa 010c lr r4,\[772\]
+ c: 23aa 00cc lr r3,\[771\]
+ 10: 320c 00c1 daddh11 r1,r2,r3
+ 14: 320d 00c1 daddh12 r1,r2,r3
+ 18: 320e 00c1 daddh21 r1,r2,r3
+ 1c: 320f 00c1 daddh22 r1,r2,r3
+ 20: 3218 00c1 dexcl1 r1,r2,r3
+ 24: 3219 00c1 dexcl2 r1,r2,r3
+ 28: 3208 00c1 dmulh11 r1,r2,r3
+ 2c: 3209 00c1 dmulh12 r1,r2,r3
+ 30: 320a 00c1 dmulh21 r1,r2,r3
+ 34: 320b 00c1 dmulh22 r1,r2,r3
+ 38: 3210 00c1 dsubh11 r1,r2,r3
+ 3c: 3211 00c1 dsubh12 r1,r2,r3
+ 40: 3212 00c1 dsubh21 r1,r2,r3
+ 44: 3213 00c1 dsubh22 r1,r2,r3
diff --git a/gas/testsuite/gas/arc/tfpuda.d b/gas/testsuite/gas/arc/tfpuda.d
new file mode 100644
index 0000000..a6645a5
--- /dev/null
+++ b/gas/testsuite/gas/arc/tfpuda.d
@@ -0,0 +1,28 @@
+#as:-mcpu=arcem -mfpuda
+#objdump: -dr
+#source: tfpx.s
+
+.*: +file format .*arc.*
+
+
+Disassembly of section .text:
+
+00000000 <.text>:
+ 0: 24aa 00cc lr r4,\[771\]
+ 4: 23aa 008c lr r3,\[770\]
+ 8: 24aa 014c lr r4,\[773\]
+ c: 23aa 010c lr r3,\[772\]
+ 10: 3234 00c1 daddh11 r1,r2,r3
+ 14: 3235 00c1 daddh12 r1,r2,r3
+ 18: 3236 00c1 daddh21 r1,r2,r3
+ 1c: 3237 00c1 daddh22 r1,r2,r3
+ 20: 323c 00c1 dexcl1 r1,r2,r3
+ 24: 323d 00c1 dexcl2 r1,r2,r3
+ 28: 3230 00c1 dmulh11 r1,r2,r3
+ 2c: 3231 00c1 dmulh12 r1,r2,r3
+ 30: 3232 00c1 dmulh21 r1,r2,r3
+ 34: 3233 00c1 dmulh22 r1,r2,r3
+ 38: 3238 00c1 dsubh11 r1,r2,r3
+ 3c: 3239 00c1 dsubh12 r1,r2,r3
+ 40: 323a 00c1 dsubh21 r1,r2,r3
+ 44: 323b 00c1 dsubh22 r1,r2,r3
diff --git a/gas/testsuite/gas/arc/tfpx.s b/gas/testsuite/gas/arc/tfpx.s
new file mode 100644
index 0000000..ea722a3
--- /dev/null
+++ b/gas/testsuite/gas/arc/tfpx.s
@@ -0,0 +1,22 @@
+ lr r4,[d1h]
+ lr r3,[d1l]
+ lr r4,[d2h]
+ lr r3,[d2l]
+
+ daddh11 r1,r2,r3
+ daddh12 r1,r2,r3
+ daddh21 r1,r2,r3
+ daddh22 r1,r2,r3
+
+ dexcl1 r1,r2,r3
+ dexcl2 r1,r2,r3
+
+ dmulh11 r1,r2,r3
+ dmulh12 r1,r2,r3
+ dmulh21 r1,r2,r3
+ dmulh22 r1,r2,r3
+
+ dsubh11 r1,r2,r3
+ dsubh12 r1,r2,r3
+ dsubh21 r1,r2,r3
+ dsubh22 r1,r2,r3