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-rw-r--r--gas/ChangeLog6
-rw-r--r--gas/config/tc-aarch64.c2
-rw-r--r--gas/doc/c-aarch64.texi2
3 files changed, 10 insertions, 0 deletions
diff --git a/gas/ChangeLog b/gas/ChangeLog
index aafc95c..2986f0d 100644
--- a/gas/ChangeLog
+++ b/gas/ChangeLog
@@ -1,3 +1,9 @@
+2018-11-12 Sudakshina Das <sudi.das@arm.com>
+
+ * config/tc-aarch64.c (aarch64_features): Add "memtag"
+ as a new option.
+ * doc/c-aarch64.texi: Document the same.
+
2018-11-09 Alan Modra <amodra@gmail.com>
* config/tc-ppc.c (fixup_size): New function.
diff --git a/gas/config/tc-aarch64.c b/gas/config/tc-aarch64.c
index 4ae27f7..b9aceb2 100644
--- a/gas/config/tc-aarch64.c
+++ b/gas/config/tc-aarch64.c
@@ -8829,6 +8829,8 @@ static const struct aarch64_option_cpu_value_table aarch64_features[] = {
AARCH64_ARCH_NONE},
{"ssbs", AARCH64_FEATURE (AARCH64_FEATURE_SSBS, 0),
AARCH64_ARCH_NONE},
+ {"memtag", AARCH64_FEATURE (AARCH64_FEATURE_MEMTAG, 0),
+ AARCH64_ARCH_NONE},
{NULL, AARCH64_ARCH_NONE, AARCH64_ARCH_NONE},
};
diff --git a/gas/doc/c-aarch64.texi b/gas/doc/c-aarch64.texi
index 4941c57..f38fdf5 100644
--- a/gas/doc/c-aarch64.texi
+++ b/gas/doc/c-aarch64.texi
@@ -189,6 +189,8 @@ automatically cause those extensions to be disabled.
@tab Enable ARMv8.5-A random number instructions.
@item @code{ssbs} @tab ARMv8-A @tab ARMv8.5-A or later
@tab Enable Speculative Store Bypassing Safe state read and write.
+@item @code{memtag} @tab ARMv8.5-A @tab No
+ @tab Enable ARMv8.5-A Memory Tagging Extensions.
@end multitable
@node AArch64 Syntax