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-rw-r--r--gas/ChangeLog5
-rw-r--r--gas/testsuite/gas/aarch64/sve-movprfx_27.d14
-rw-r--r--gas/testsuite/gas/aarch64/sve-movprfx_27.s11
3 files changed, 30 insertions, 0 deletions
diff --git a/gas/ChangeLog b/gas/ChangeLog
index 3a76a05..f3fe16a 100644
--- a/gas/ChangeLog
+++ b/gas/ChangeLog
@@ -1,5 +1,10 @@
2019-07-02 Richard Sandiford <richard.sandiford@arm.com>
+ * testsuite/gas/aarch64/sve-movprfx_27.s,
+ * testsuite/gas/aarch64/sve-movprfx_27.d: New test.
+
+2019-07-02 Richard Sandiford <richard.sandiford@arm.com>
+
* testsuite/gas/aarch64/sve-movprfx_26.s: Also test FCVTZS, FCVTZU,
SCVTF, UCVTF, LSR and ASR.
* testsuite/gas/aarch64/sve-movprfx_26.d: Update accordingly.
diff --git a/gas/testsuite/gas/aarch64/sve-movprfx_27.d b/gas/testsuite/gas/aarch64/sve-movprfx_27.d
new file mode 100644
index 0000000..ef0bc9a
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sve-movprfx_27.d
@@ -0,0 +1,14 @@
+#source: sve-movprfx_27.s
+#as: -march=armv8-a+sve -I$srcdir/$subdir
+#objdump: -Dr -M notes
+
+.* file format .*
+
+Disassembly of section .*:
+
+0+ <.*>:
+[^:]+: 0420bc20 movprfx z0, z1
+[^:]+: 0590ce00 fmov z0.s, p0/m, #1.0+(e\+00)?
+[^:]+: 0420bc20 movprfx z0, z1
+[^:]+: 0590ce00 fmov z0.s, p0/m, #1.0+(e\+00)?
+[^:]+: d65f03c0 ret
diff --git a/gas/testsuite/gas/aarch64/sve-movprfx_27.s b/gas/testsuite/gas/aarch64/sve-movprfx_27.s
new file mode 100644
index 0000000..bb4d3a7
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sve-movprfx_27.s
@@ -0,0 +1,11 @@
+ .text
+ .arch armv8-a+sve
+
+f:
+ movprfx z0, z1
+ fmov z0.s, p0/m, #1.0
+
+ movprfx z0, z1
+ fcpy z0.s, p0/m, #1.0
+
+ ret