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-rw-r--r--gas/ChangeLog5
-rw-r--r--gas/config/tc-mips.c8
-rw-r--r--gas/testsuite/ChangeLog6
-rw-r--r--gas/testsuite/gas/mips/elf_arch_mips32r6.d21
-rw-r--r--gas/testsuite/gas/mips/elf_arch_mips64r6.d21
-rw-r--r--gas/testsuite/gas/mips/mips.exp2
6 files changed, 63 insertions, 0 deletions
diff --git a/gas/ChangeLog b/gas/ChangeLog
index 0bbdc63..0d6ef3b 100644
--- a/gas/ChangeLog
+++ b/gas/ChangeLog
@@ -1,3 +1,8 @@
+2014-11-05 Matthew Fortune <matthew.fortune@imgtec.com>
+
+ * config/tc-mips.c (mips_elf_final_processing): Add INSN_ISA32R6
+ and INSN_ISA64R6 support.
+
2014-11-04 Alan Modra <amodra@gmail.com>
* expr.c (expr_symbol_where): Don't use register keyword.
diff --git a/gas/config/tc-mips.c b/gas/config/tc-mips.c
index 607689b..c9266db 100644
--- a/gas/config/tc-mips.c
+++ b/gas/config/tc-mips.c
@@ -17971,6 +17971,10 @@ mips_elf_final_processing (void)
flags.isa_level = 32;
flags.isa_rev = 5;
break;
+ case INSN_ISA32R6:
+ flags.isa_level = 32;
+ flags.isa_rev = 6;
+ break;
case INSN_ISA64:
flags.isa_level = 64;
flags.isa_rev = 1;
@@ -17987,6 +17991,10 @@ mips_elf_final_processing (void)
flags.isa_level = 64;
flags.isa_rev = 5;
break;
+ case INSN_ISA64R6:
+ flags.isa_level = 64;
+ flags.isa_rev = 6;
+ break;
}
flags.gpr_size = file_mips_opts.gp == 32 ? AFL_REG_32 : AFL_REG_64;
diff --git a/gas/testsuite/ChangeLog b/gas/testsuite/ChangeLog
index 1b41cc4..4c69862 100644
--- a/gas/testsuite/ChangeLog
+++ b/gas/testsuite/ChangeLog
@@ -1,3 +1,9 @@
+2014-05-11 Matthew Fortune <matthew.fortune@imgtec.com>
+
+ * gas/mips/elf_arch_mips32r6.d: New file.
+ * gas/mips/elf_arch_mips64r6.d: New file.
+ * gas/mips/mips.exp: Run the new tests.
+
2014-10-31 Andrew Pinski <apinski@cavium.com>
Naveen H.S <Naveen.Hurugalawadi@caviumnetworks.com>
diff --git a/gas/testsuite/gas/mips/elf_arch_mips32r6.d b/gas/testsuite/gas/mips/elf_arch_mips32r6.d
new file mode 100644
index 0000000..eefba45
--- /dev/null
+++ b/gas/testsuite/gas/mips/elf_arch_mips32r6.d
@@ -0,0 +1,21 @@
+# name: ELF MIPS32r5 markings
+# source: empty.s
+# objdump: -p
+# as: -32 -march=mips32r6
+
+.*:.*file format.*elf.*mips.*
+private flags = 9.......: .*\[mips32r6\].*
+
+MIPS ABI Flags Version: 0
+
+ISA: MIPS32r6
+GPR size: 32
+CPR1 size: 64
+CPR2 size: 0
+FP ABI: Hard float \(32-bit CPU, 64-bit FPU\)
+ISA Extension: None
+ASEs:
+ None
+FLAGS 1: 0000000.
+FLAGS 2: 00000000
+
diff --git a/gas/testsuite/gas/mips/elf_arch_mips64r6.d b/gas/testsuite/gas/mips/elf_arch_mips64r6.d
new file mode 100644
index 0000000..7cdea4d
--- /dev/null
+++ b/gas/testsuite/gas/mips/elf_arch_mips64r6.d
@@ -0,0 +1,21 @@
+# name: ELF MIPS64r6 markings
+# source: empty.s
+# objdump: -p
+# as: -32 -march=mips64r6
+
+.*:.*file format.*elf.*mips.*
+private flags = a.......: .*\[mips64r6\].*
+
+MIPS ABI Flags Version: 0
+
+ISA: MIPS64r6
+GPR size: 32
+CPR1 size: 64
+CPR2 size: 0
+FP ABI: Hard float \(32-bit CPU, 64-bit FPU\)
+ISA Extension: None
+ASEs:
+ None
+FLAGS 1: 0000000.
+FLAGS 2: 00000000
+
diff --git a/gas/testsuite/gas/mips/mips.exp b/gas/testsuite/gas/mips/mips.exp
index 855e2cd..b0de13a 100644
--- a/gas/testsuite/gas/mips/mips.exp
+++ b/gas/testsuite/gas/mips/mips.exp
@@ -870,10 +870,12 @@ if { [istarget mips*-*-vxworks*] } {
run_dump_test "elf_arch_mips32r2"
run_dump_test "elf_arch_mips32r3"
run_dump_test "elf_arch_mips32r5"
+ run_dump_test "elf_arch_mips32r6"
run_dump_test "elf_arch_mips64"
run_dump_test "elf_arch_mips64r2"
run_dump_test "elf_arch_mips64r3"
run_dump_test "elf_arch_mips64r5"
+ run_dump_test "elf_arch_mips64r6"
# Verify that ASE markings are handled properly.
run_dump_test "elf_ase_mips16"