diff options
Diffstat (limited to 'gas')
| -rw-r--r-- | gas/ChangeLog | 22 | ||||
| -rw-r--r-- | gas/config/tc-a29k.c | 2 | ||||
| -rw-r--r-- | gas/config/tc-alpha.c | 70 | ||||
| -rw-r--r-- | gas/config/tc-arm.c | 139 | ||||
| -rw-r--r-- | gas/config/tc-cris.c | 2 | ||||
| -rw-r--r-- | gas/config/tc-hppa.c | 4 | ||||
| -rw-r--r-- | gas/config/tc-i370.c | 16 | ||||
| -rw-r--r-- | gas/config/tc-i386.c | 6 | ||||
| -rw-r--r-- | gas/config/tc-i860.c | 2 | ||||
| -rw-r--r-- | gas/config/tc-i960.c | 2 | ||||
| -rw-r--r-- | gas/config/tc-ia64.c | 4 | ||||
| -rw-r--r-- | gas/config/tc-m68hc11.c | 4 | ||||
| -rw-r--r-- | gas/config/tc-m68k.c | 10 | ||||
| -rw-r--r-- | gas/config/tc-m88k.c | 2 | ||||
| -rw-r--r-- | gas/config/tc-pj.c | 2 | ||||
| -rw-r--r-- | gas/config/tc-ppc.c | 18 | ||||
| -rw-r--r-- | gas/config/tc-sh.c | 2 | ||||
| -rw-r--r-- | gas/config/tc-sparc.c | 2 | ||||
| -rw-r--r-- | gas/config/tc-tahoe.c | 4 | ||||
| -rw-r--r-- | gas/config/tc-vax.c | 4 |
20 files changed, 169 insertions, 148 deletions
diff --git a/gas/ChangeLog b/gas/ChangeLog index c2b7179..7d53f5c 100644 --- a/gas/ChangeLog +++ b/gas/ChangeLog @@ -1,3 +1,25 @@ +2000-12-03 Kazu Hirata <kazu@hxi.com> + + * config/tc-a29k.c: Fix formatting. + * config/tc-alpha.c: Likewise. + * config/tc-arm.c: Likewise. + * config/tc-cris.c: Likewise. + * config/tc-hppa.c: Likewise. + * config/tc-i370.c: Likewise. + * config/tc-i386.c: Likewise. + * config/tc-i860.c: Likewise. + * config/tc-i960.c: Likewise. + * config/tc-ia64.c: Likewise. + * config/tc-m68hc11.c: Likewise. + * config/tc-m68k.c: Likewise. + * config/tc-m88k.c: Likewise. + * config/tc-pj.c: Likewise. + * config/tc-ppc.c: Likewise. + * config/tc-sh.c: Likewise. + * config/tc-sparc.c: Likewise. + * config/tc-tahoe.c: Likewise. + * config/tc-vax.c: Likewise. + 2000-12-01 Chris Demetriou <cgd@sibyte.com> * config/tc-mips.c (mips_ip): When calculating offsets, diff --git a/gas/config/tc-a29k.c b/gas/config/tc-a29k.c index 10760ab..a0c2346 100644 --- a/gas/config/tc-a29k.c +++ b/gas/config/tc-a29k.c @@ -1040,7 +1040,7 @@ CONST char *md_shortopts = ""; struct option md_longopts[] = { {NULL, no_argument, NULL, 0} }; -size_t md_longopts_size = sizeof(md_longopts); +size_t md_longopts_size = sizeof (md_longopts); int md_parse_option (c, arg) diff --git a/gas/config/tc-alpha.c b/gas/config/tc-alpha.c index d6d41c6..6a7116e 100644 --- a/gas/config/tc-alpha.c +++ b/gas/config/tc-alpha.c @@ -145,14 +145,14 @@ struct alpha_macro #if 1 #define range_signed_16(x) \ - (((offsetT)(x) >> 15) == 0 || ((offsetT)(x) >> 15) == -1) + (((offsetT) (x) >> 15) == 0 || ((offsetT) (x) >> 15) == -1) #define range_signed_32(x) \ - (((offsetT)(x) >> 31) == 0 || ((offsetT)(x) >> 31) == -1) + (((offsetT) (x) >> 31) == 0 || ((offsetT) (x) >> 31) == -1) #else -#define range_signed_16(x) ((offsetT)(x) >= -(offsetT)0x8000 && \ - (offsetT)(x) <= (offsetT)0x7FFF) -#define range_signed_32(x) ((offsetT)(x) >= -(offsetT)0x80000000 && \ - (offsetT)(x) <= (offsetT)0x7FFFFFFF) +#define range_signed_16(x) ((offsetT) (x) >= -(offsetT)0x8000 && \ + (offsetT) (x) <= (offsetT)0x7FFF) +#define range_signed_32(x) ((offsetT) (x) >= -(offsetT)0x80000000 && \ + (offsetT) (x) <= (offsetT)0x7FFFFFFF) #endif /* Macros for sign extending from 16- and 32-bits. */ @@ -160,33 +160,33 @@ struct alpha_macro but really a predicate should be found to use the non-cast forms. */ #if 1 -#define sign_extend_16(x) ((short)(x)) -#define sign_extend_32(x) ((int)(x)) +#define sign_extend_16(x) ((short) (x)) +#define sign_extend_32(x) ((int) (x)) #else -#define sign_extend_16(x) ((offsetT)(((x) & 0xFFFF) ^ 0x8000) - 0x8000) -#define sign_extend_32(x) ((offsetT)(((x) & 0xFFFFFFFF) \ +#define sign_extend_16(x) ((offsetT) (((x) & 0xFFFF) ^ 0x8000) - 0x8000) +#define sign_extend_32(x) ((offsetT) (((x) & 0xFFFFFFFF) \ ^ 0x80000000) - 0x80000000) #endif /* Macros to build tokens */ -#define set_tok_reg(t, r) (memset(&(t), 0, sizeof(t)), \ +#define set_tok_reg(t, r) (memset(&(t), 0, sizeof (t)), \ (t).X_op = O_register, \ (t).X_add_number = (r)) -#define set_tok_preg(t, r) (memset(&(t), 0, sizeof(t)), \ +#define set_tok_preg(t, r) (memset(&(t), 0, sizeof (t)), \ (t).X_op = O_pregister, \ (t).X_add_number = (r)) -#define set_tok_cpreg(t, r) (memset(&(t), 0, sizeof(t)), \ +#define set_tok_cpreg(t, r) (memset(&(t), 0, sizeof (t)), \ (t).X_op = O_cpregister, \ (t).X_add_number = (r)) -#define set_tok_freg(t, r) (memset(&(t), 0, sizeof(t)), \ +#define set_tok_freg(t, r) (memset(&(t), 0, sizeof (t)), \ (t).X_op = O_register, \ (t).X_add_number = (r)+32) -#define set_tok_sym(t, s, a) (memset(&(t), 0, sizeof(t)), \ +#define set_tok_sym(t, s, a) (memset(&(t), 0, sizeof (t)), \ (t).X_op = O_symbol, \ (t).X_add_symbol = (s), \ (t).X_add_number = (a)) -#define set_tok_const(t, n) (memset(&(t), 0, sizeof(t)), \ +#define set_tok_const(t, n) (memset(&(t), 0, sizeof (t)), \ (t).X_op = O_constant, \ (t).X_add_number = (n)) @@ -320,7 +320,7 @@ struct option md_longopts[] = { { NULL, no_argument, NULL, 0 } }; -size_t md_longopts_size = sizeof(md_longopts); +size_t md_longopts_size = sizeof (md_longopts); #ifdef OBJ_EVAX @@ -478,7 +478,7 @@ static int alpha_flag_show_after_trunc = 0; /* -H */ #define ALPHA_RELOC_TABLE(op) \ &alpha_reloc_op[ ((!USER_RELOC_P (op)) \ ? (abort (), 0) \ - : (int)(op) - (int)O_literal) ] + : (int) (op) - (int)O_literal) ] #define LITUSE_BASE 1 #define LITUSE_BYTOFF 2 @@ -550,13 +550,13 @@ static const struct alpha_reloc_op_tag { }; static const int alpha_num_reloc_op - = sizeof(alpha_reloc_op) / sizeof(*alpha_reloc_op); + = sizeof (alpha_reloc_op) / sizeof (*alpha_reloc_op); /* Maximum # digits needed to hold the largest sequence # */ #define ALPHA_RELOC_DIGITS 25 /* Whether a sequence number is valid. */ -#define ALPHA_RELOC_SEQUENCE_OK(X) ((X) > 0 && ((unsigned)(X)) == (X)) +#define ALPHA_RELOC_SEQUENCE_OK(X) ((X) > 0 && ((unsigned) (X)) == (X)) /* Structure to hold explict sequence information. */ struct alpha_literal_tag @@ -804,7 +804,7 @@ static const struct alpha_macro alpha_macros[] = { }; static const unsigned int alpha_num_macros - = sizeof(alpha_macros) / sizeof(*alpha_macros); + = sizeof (alpha_macros) / sizeof (*alpha_macros); /* Public interface functions */ @@ -881,14 +881,14 @@ md_begin () for (i = 0; i < 32; ++i) { char name[4]; - sprintf(name, "$%d", i); + sprintf (name, "$%d", i); alpha_register_table[i] = symbol_create(name, reg_section, i, &zero_address_frag); } for (; i < 64; ++i) { char name[5]; - sprintf(name, "$f%d", i-32); + sprintf (name, "$f%d", i-32); alpha_register_table[i] = symbol_create(name, reg_section, i, &zero_address_frag); } @@ -2142,7 +2142,7 @@ find_opcode_match(first_opcode, tok, pntok, pcpumatch) default: /* everything else should have been fake */ - abort(); + abort (); } ++tokidx; } @@ -2410,7 +2410,7 @@ assemble_insn(opcode, tok, ntok, insn) } break; default: - abort(); + abort (); } } else @@ -3169,7 +3169,7 @@ load_expression (targreg, exp, pbasereg, poffset, explicit_reloc) if (insn.nfixups > 0) { memmove (&insn.fixups[1], &insn.fixups[0], - sizeof(struct alpha_fixup) * insn.nfixups); + sizeof (struct alpha_fixup) * insn.nfixups); } insn.nfixups++; insn.fixups[0].reloc = BFD_RELOC_ALPHA_LITUSE; @@ -3426,7 +3426,7 @@ emit_ir_load (tok, ntok, opname) if (insn.nfixups > 0) { memmove (&insn.fixups[1], &insn.fixups[0], - sizeof(struct alpha_fixup) * insn.nfixups); + sizeof (struct alpha_fixup) * insn.nfixups); } insn.nfixups++; insn.fixups[0].reloc = BFD_RELOC_ALPHA_LITUSE; @@ -3512,7 +3512,7 @@ emit_loadstore (tok, ntok, opname) if (insn.nfixups > 0) { memmove (&insn.fixups[1], &insn.fixups[0], - sizeof(struct alpha_fixup) * insn.nfixups); + sizeof (struct alpha_fixup) * insn.nfixups); } insn.nfixups++; insn.fixups[0].reloc = BFD_RELOC_ALPHA_LITUSE; @@ -3677,7 +3677,7 @@ emit_ldil (tok, ntok, unused) } #endif - memcpy (newtok, tok, sizeof(newtok)); + memcpy (newtok, tok, sizeof (newtok)); newtok[1].X_add_number = sign_extend_32 (tok[1].X_add_number); assemble_tokens ("lda", newtok, ntok, 1); @@ -3691,7 +3691,7 @@ emit_stX (tok, ntok, vlgsize) int ntok; const PTR vlgsize; { - int lgsize = (int)(long)vlgsize; + int lgsize = (int) (long)vlgsize; if (alpha_target & AXP_OPCODE_BWX) emit_loadstore (tok, ntok, stX_op[lgsize]); @@ -3749,7 +3749,7 @@ emit_ustX (tok, ntok, vlgsize) int ntok; const PTR vlgsize; { - int lgsize = (int)(long)vlgsize; + int lgsize = (int) (long)vlgsize; expressionS newtok[3]; /* emit "lda $at, exp" */ @@ -4169,7 +4169,7 @@ emit_jsrjmp (tok, ntok, vopname) if (insn.nfixups > 0) { memmove (&insn.fixups[1], &insn.fixups[0], - sizeof(struct alpha_fixup) * insn.nfixups); + sizeof (struct alpha_fixup) * insn.nfixups); } insn.nfixups++; insn.fixups[0].reloc = BFD_RELOC_ALPHA_LITUSE; @@ -4660,10 +4660,10 @@ s_alpha_coff_wrapper (which) ecoff_directive_val, }; - assert (which >= 0 && which < (int)(sizeof(fns)/sizeof(*fns))); + assert (which >= 0 && which < (int) (sizeof (fns)/sizeof (*fns))); if (ECOFF_DEBUGGING) - (*fns[which])(0); + (*fns[which]) (0); else { as_bad (_("ECOFF debugging is disabled.")); @@ -5134,7 +5134,7 @@ s_alpha_gprel32 (ignore) case O_symbol: break; default: - abort(); + abort (); } #else #ifdef OBJ_ECOFF diff --git a/gas/config/tc-arm.c b/gas/config/tc-arm.c index 4bab476..f23cb09 100644 --- a/gas/config/tc-arm.c +++ b/gas/config/tc-arm.c @@ -2493,27 +2493,27 @@ static int accum0_required_here (str) char ** str; { - static char buff [128]; /* Note the address is taken. Hence, static. */ + static char buff [128]; /* Note the address is taken. Hence, static. */ char * p = * str; char c; int result = 0; /* The accum number. */ skip_whitespace (p); - + *str = p; /* Advance caller's string pointer too. */ c = *p++; while (isalnum (c)) c = *p++; *--p = 0; /* Aap nul into input buffer at non-alnum. */ - + if (! ( streq (*str, "acc0") || streq (*str, "ACC0"))) { sprintf (buff, _("acc0 expected, not '%.100s'"), *str); inst.error = buff; result = FAIL; } - + *p = c; /* Unzap. */ *str = p; /* Caller's string pointer to after match. */ return result; @@ -2521,9 +2521,9 @@ accum0_required_here (str) /* Expects **str -> after a comma. May be leading blanks. Advances *str, recognizing a load mode, and setting inst.instruction. - Returns rn, or else FAIL (in which case may set inst.error + Returns rn, or else FAIL (in which case may set inst.error and not advance str) - + Note: doesn't know Rd, so no err checks that require such knowledge. */ static int @@ -2535,11 +2535,11 @@ ld_mode_required_here (string) int pre_inc = 0; skip_whitespace (str); - + if (* str == '[') { str++; - + skip_whitespace (str); if ((rn = reg_required_here (& str, 16)) == FAIL) @@ -2550,7 +2550,7 @@ ld_mode_required_here (string) if (* str == ']') { str ++; - + if (skip_past_comma (& str) == SUCCESS) { /* [Rn],... (post inc) */ @@ -2580,7 +2580,7 @@ ld_mode_required_here (string) } pre_inc = 1; - + if (ldst_extend (& str, 1) == FAIL) return FAIL; @@ -2615,14 +2615,14 @@ ld_mode_required_here (string) inst.reloc.exp.X_add_number -= 8; /* PC rel adjust. */ inst.reloc.pc_rel = 1; inst.instruction |= (REG_PC << 16); - + rn = REG_PC; pre_inc = 1; } inst.instruction |= (pre_inc ? PRE_INDEX : 0); * string = str; - + return rn; } @@ -2649,7 +2649,7 @@ do_smla (str, flags) || (rn = reg_required_here (& str, 12)) == FAIL) inst.error = BAD_ARGS; - else if (rd == REG_PC || rm == REG_PC || rs == REG_PC || rn == REG_PC) + else if (rd == REG_PC || rm == REG_PC || rs == REG_PC || rn == REG_PC) inst.error = BAD_PC; else if (flags) @@ -2693,7 +2693,7 @@ do_smlal (str, flags) if (rdlo == rdhi) as_tsktsk (_("rdhi and rdlo must be different")); - + if (flags) inst.error = BAD_FLAGS; else @@ -2762,10 +2762,10 @@ do_qadd (str, flags) /* ARM V5E (el Segundo) MCRRcc <coproc>, <opcode>, <Rd>, <Rn>, <CRm>. - MRRCcc <coproc>, <opcode>, <Rd>, <Rn>, <CRm>. + MRRCcc <coproc>, <opcode>, <Rd>, <Rn>, <CRm>. These are equivalent to the XScale instructions MAR and MRA, - respectively, when coproc == 0, opcode == 0, and CRm == 0. + respectively, when coproc == 0, opcode == 0, and CRm == 0. Result unpredicatable if Rd or Rn is R15. */ @@ -2811,7 +2811,7 @@ do_co_reg2c (str, flags) /* Unpredictable result if rd or rn is R15. */ if (rd == REG_PC || rn == REG_PC) - as_tsktsk + as_tsktsk (_("Warning: Instruction unpredictable when using r15")); if (skip_past_comma (& str) == FAIL @@ -2828,7 +2828,6 @@ do_co_reg2c (str, flags) end_of_line (str); } - /* ARM V5 count-leading-zeroes instruction (argument parse) CLZ{<cond>} <Rd>, <Rm> Condition defaults to COND_ALWAYS. @@ -2961,7 +2960,7 @@ do_cdp2 (str, flags) if (flags) inst.error = BAD_FLAGS; - + end_of_line (str); } @@ -3043,7 +3042,7 @@ do_t_bkpt (str) expressionS expr; unsigned long number; - skip_whitespace (str); + skip_whitespace (str); /* Allow optional leading '#'. */ if (is_immediate_prefix (*str)) @@ -3055,9 +3054,9 @@ do_t_bkpt (str) inst.error = _("bad or missing expression"); return; } - + number = expr.X_add_number; - + /* Check it fits an 8 bit unsigned. */ if (number != (number & 0xff)) { @@ -3082,20 +3081,20 @@ do_branch25 (str, flags) { if (my_get_expression (& inst.reloc.exp, & str)) return; - + #ifdef OBJ_ELF { char * save_in; - + /* ScottB: February 5, 1998 */ /* Check to see of PLT32 reloc required for the instruction. */ - + /* arm_parse_reloc() works on input_line_pointer. We actually want to parse the operands to the branch instruction passed in 'str'. Save the input pointer and restore it later. */ save_in = input_line_pointer; input_line_pointer = str; - + if (inst.reloc.exp.X_op == O_symbol && *str == '(' && arm_parse_reloc () == BFD_RELOC_ARM_PLT32) @@ -3111,14 +3110,14 @@ do_branch25 (str, flags) inst.reloc.type = BFD_RELOC_ARM_PCREL_BLX; inst.reloc.pc_rel = 1; } - + input_line_pointer = save_in; } #else inst.reloc.type = BFD_RELOC_ARM_PCREL_BLX; inst.reloc.pc_rel = 1; #endif /* OBJ_ELF */ - + end_of_line (str); } @@ -3127,7 +3126,7 @@ do_branch25 (str, flags) BLX{<condition>} <Rm> ie BLX(2) Unfortunately, there are two different opcodes for this mnemonic. So, the insns[].value is not used, and the code here zaps values - into inst.instruction. + into inst.instruction. Also, the <target_addr> can be 25 bits, hence has its own reloc. */ static void @@ -3143,13 +3142,13 @@ do_blx (str, flags) as_bad (BAD_FLAGS); return; } - + skip_whitespace (mystr); rm = reg_required_here (& mystr, 0); - + /* The above may set inst.error. Ignore his opinion. */ inst.error = 0; - + if (rm != FAIL) { /* Arg is a register. @@ -3166,9 +3165,9 @@ do_blx (str, flags) inst.error = BAD_COND; return; } - + inst.instruction = 0xfafffffe; - + /* Process like a B/BL, but with a different reloc. Note that B/BL expecte fffffe, not 0, offset in the opcode table. */ do_branch25 (str, flags); @@ -3193,11 +3192,11 @@ do_t_blx (str) inst.instruction = 0x4780; /* Note that this call is to the ARM register recognizer. BLX(2) - uses the ARM register space, not the Thumb one, so a call to + uses the ARM register space, not the Thumb one, so a call to thumb_reg() would be wrong. */ rm = reg_required_here (& mystr, 3); inst.error = 0; - + if (rm != FAIL) { /* It's BLX(2). The .instruction was zapped with rm & is final. */ @@ -3211,11 +3210,11 @@ do_t_blx (str) if (my_get_expression (& inst.reloc.exp, & mystr)) return; - + inst.reloc.type = BFD_RELOC_THUMB_PCREL_BLX; inst.reloc.pc_rel = 1; } - + end_of_line (mystr); } @@ -3235,31 +3234,31 @@ do_bkpt (str, flags) unsigned long number; skip_whitespace (str); - + /* Allow optional leading '#'. */ if (is_immediate_prefix (* str)) str++; memset (& expr, '\0', sizeof (expr)); - + if (my_get_expression (& expr, & str) || (expr.X_op != O_constant)) { inst.error = _("bad or missing expression"); return; } - + number = expr.X_add_number; - + /* Check it fits a 16 bit unsigned. */ if (number != (number & 0xffff)) { inst.error = _("immediate value out of range"); return; } - + /* Top 12 of 16 bits to bits 19:8. */ inst.instruction |= (number & 0xfff0) << 4; - + /* Bottom 4 of 16 bits to bits 3:0. */ inst.instruction |= number & 0xf; @@ -3270,7 +3269,7 @@ do_bkpt (str, flags) } /* Xscale multiply-accumulate (argument parse) - MIAcc acc0,Rm,Rs + MIAcc acc0,Rm,Rs MIAPHcc acc0,Rm,Rs MIAxycc acc0,Rm,Rs. */ @@ -3284,22 +3283,22 @@ do_mia (str, flags) if (flags) as_bad (BAD_FLAGS); - + else if (accum0_required_here (& str) == FAIL) inst.error = ERR_NO_ACCUM; - + else if (skip_past_comma (& str) == FAIL || (rm = reg_required_here (& str, 0)) == FAIL) inst.error = BAD_ARGS; - + else if (skip_past_comma (& str) == FAIL || (rs = reg_required_here (& str, 12)) == FAIL) inst.error = BAD_ARGS; - - /* inst.instruction has now been zapped with both rm and rs. */ + + /* inst.instruction has now been zapped with both rm and rs. */ else if (rm == REG_PC || rs == REG_PC) inst.error = BAD_PC; /* Undefined result if rm or rs is R15. */ - + else end_of_line (str); } @@ -3317,22 +3316,22 @@ do_mar (str, flags) if (flags) as_bad (BAD_FLAGS); - + else if (accum0_required_here (& str) == FAIL) inst.error = ERR_NO_ACCUM; - + else if (skip_past_comma (& str) == FAIL || (rdlo = reg_required_here (& str, 12)) == FAIL) inst.error = BAD_ARGS; - + else if (skip_past_comma (& str) == FAIL || (rdhi = reg_required_here (& str, 16)) == FAIL) inst.error = BAD_ARGS; - + /* inst.instruction has now been zapped with both rdlo and rdhi. */ else if (rdlo == REG_PC || rdhi == REG_PC) inst.error = BAD_PC; /* Undefined result if rdlo or rdhi is R15. */ - + else end_of_line (str); } @@ -3378,10 +3377,10 @@ do_mra (str, flags) end_of_line (str); } -/* Xscale: Preload-Cache +/* Xscale: Preload-Cache PLD <addr_mode> - + Syntactically, like LDR with B=1, W=0, L=1. */ static void @@ -3412,7 +3411,7 @@ do_pld (str, flags) return; skip_whitespace (str); - + if (* str == ']') { /* [Rn], ... ? */ @@ -3439,7 +3438,7 @@ do_pld (str, flags) inst.error = _("pre-indexed expression expected"); return; } - + if (ldst_extend (& str, 0) == FAIL) return; @@ -3453,13 +3452,13 @@ do_pld (str, flags) ++ str; skip_whitespace (str); - + if (* str == '!') /* [Rn]! */ { inst.error = _("writeback used in preload instruction"); ++ str; } - + inst.instruction |= PRE_INDEX; } @@ -3493,7 +3492,7 @@ do_ldrd (str, flags) return; } - + if ((cpu_variant & ARM_EXT_XSCALE) != ARM_EXT_XSCALE) { static char buff[128]; @@ -3502,15 +3501,15 @@ do_ldrd (str, flags) while (isspace (*str)) --str; str -= 4; - + /* Deny all knowledge. */ sprintf (buff, _("bad instruction '%.100s'"), str); inst.error = buff; return; } - + skip_whitespace (str); - + if ((rd = reg_required_here (& str, 12)) == FAIL) { inst.error = BAD_ARGS; @@ -3524,11 +3523,11 @@ do_ldrd (str, flags) inst.error = BAD_ARGS; return; } - + /* inst.instruction has now been zapped with Rd and the addressing mode. */ if (rd & 1) /* Unpredictable result if Rd is odd. */ { - inst.error = _("Destination register must be even"); + inst.error = _("Destination register must be even"); return; } @@ -3543,7 +3542,7 @@ do_ldrd (str, flags) ((inst.instruction & WRITE_BACK) || (!(inst.instruction & PRE_INDEX)))) as_warn (_("pre/post-indexing used when modified address register is destination")); - + end_of_line (str); } @@ -6464,7 +6463,7 @@ md_begin () if (atpcs) { asection * sec; - + sec = bfd_make_section (stdoutput, ".arm.atpcs"); if (sec != NULL) diff --git a/gas/config/tc-cris.c b/gas/config/tc-cris.c index b1d75aa..8557b40 100644 --- a/gas/config/tc-cris.c +++ b/gas/config/tc-cris.c @@ -2859,7 +2859,7 @@ s_syntax (ignore) if (strncmp (input_line_pointer, sp->operand, strlen (sp->operand)) == 0) { - (sp->fn)(); + (sp->fn) (); input_line_pointer += strlen (sp->operand); demand_empty_rest_of_line (); diff --git a/gas/config/tc-hppa.c b/gas/config/tc-hppa.c index e43e9be..2f889b2 100644 --- a/gas/config/tc-hppa.c +++ b/gas/config/tc-hppa.c @@ -4261,7 +4261,7 @@ struct option md_longopts[] = { #endif {NULL, no_argument, NULL, 0} }; -size_t md_longopts_size = sizeof(md_longopts); +size_t md_longopts_size = sizeof (md_longopts); int md_parse_option (c, arg) @@ -4764,7 +4764,7 @@ pa_parse_number (s, is_float) return 0; } -#define REG_NAME_CNT (sizeof(pre_defined_registers) / sizeof(struct pd_reg)) +#define REG_NAME_CNT (sizeof (pre_defined_registers) / sizeof (struct pd_reg)) /* Given NAME, find the register number associated with that name, return the integer value associated with the given name or -1 on failure. */ diff --git a/gas/config/tc-i370.c b/gas/config/tc-i370.c index a39df09..87ac113 100644 --- a/gas/config/tc-i370.c +++ b/gas/config/tc-i370.c @@ -79,13 +79,13 @@ void md_show_usage (stream) FILE *stream; { - fprintf(stream, "\ + fprintf (stream, "\ S/370 options: (these have not yet been tested and may not work) \n\ -u ignored\n\ -mregnames Allow symbolic names for registers\n\ -mno-regnames Do not allow symbolic names for registers\n"); #ifdef OBJ_ELF - fprintf(stream, "\ + fprintf (stream, "\ -mrelocatable support for GCC's -mrelocatble option\n\ -mrelocatable-lib support for GCC's -mrelocatble-lib option\n\ -V print assembler version number\n"); @@ -274,7 +274,7 @@ static const struct pd_reg pre_defined_registers[] = }; -#define REG_NAME_CNT (sizeof(pre_defined_registers) / sizeof(struct pd_reg)) +#define REG_NAME_CNT (sizeof (pre_defined_registers) / sizeof (struct pd_reg)) /* Given NAME, find the register number associated with that name, return the integer value associated with the given name or -1 on failure. */ @@ -437,7 +437,7 @@ struct option md_longopts[] = { {NULL, no_argument, NULL, 0} }; -size_t md_longopts_size = sizeof(md_longopts); +size_t md_longopts_size = sizeof (md_longopts); int md_parse_option (c, arg) @@ -682,7 +682,7 @@ i370_elf_suffix (str_p, exp_p) int len; struct map_bfd *ptr; -#define MAP(str,reloc) { str, sizeof(str)-1, reloc } +#define MAP(str,reloc) { str, sizeof (str)-1, reloc } static struct map_bfd mapping[] = { @@ -942,7 +942,7 @@ i370_ebcdic (unused) p = frag_more (nbytes); while (end > input_line_pointer) { - *p = ascebc [(unsigned char)(*input_line_pointer)]; + *p = ascebc [(unsigned char) (*input_line_pointer)]; ++p; ++input_line_pointer; } *p = '\0'; @@ -2338,7 +2338,7 @@ md_assemble (str) size = bfd_get_reloc_size (reloc_howto); if (size < 1 || size > 4) - abort(); + abort (); printf (" gwana doo fixup %d \n", i); fixP = fix_new_exp (frag_now, f - frag_now->fr_literal, size, @@ -2915,7 +2915,7 @@ md_apply_fix3 (fixp, valuep, seg) break; default: - fprintf(stderr, + fprintf (stderr, "Gas failure, reloc value %d\n", fixp->fx_r_type); fflush(stderr); abort (); diff --git a/gas/config/tc-i386.c b/gas/config/tc-i386.c index ed5c956..5cf87bd 100644 --- a/gas/config/tc-i386.c +++ b/gas/config/tc-i386.c @@ -270,7 +270,7 @@ static unsigned int cpu_arch_flags = 0; #endif #define ENCODE_RELAX_STATE(type,size) \ - ((relax_substateT)((type<<2) | (size))) + ((relax_substateT) ((type<<2) | (size))) #define SIZE_FROM_RELAX_STATE(s) \ ( (((s) & 0x3) == BIG ? 4 : (((s) & 0x3) == BIG16 ? 2 : 1)) ) @@ -4843,7 +4843,7 @@ intel_e11 () save_str = (char *)malloc (strlen (cur_token.str) + 1); if (save_str == NULL) - abort(); + abort (); strcpy (save_str, cur_token.str); /* Get the next token to check for register scaling. */ @@ -4961,7 +4961,7 @@ intel_get_token () string. */ new_token.str = (char *)malloc (strlen (intel_parser.op_string) + 1); if (new_token.str == NULL) - abort(); + abort (); new_token.str[0] = '\0'; if (strchr ("0123456789", *intel_parser.op_string)) diff --git a/gas/config/tc-i860.c b/gas/config/tc-i860.c index 9ffd4ee..5454a76 100644 --- a/gas/config/tc-i860.c +++ b/gas/config/tc-i860.c @@ -1236,7 +1236,7 @@ md_apply_fix3 (fix, valuep, seg) { char *buf; - long val = (long)(*valuep); + long val = (long) (*valuep); unsigned long insn; valueT fup; diff --git a/gas/config/tc-i960.c b/gas/config/tc-i960.c index a276e01..7c8b662 100644 --- a/gas/config/tc-i960.c +++ b/gas/config/tc-i960.c @@ -723,7 +723,7 @@ md_chars_to_number (val, n) } #define MAX_LITTLENUMS 6 -#define LNUM_SIZE sizeof(LITTLENUM_TYPE) +#define LNUM_SIZE sizeof (LITTLENUM_TYPE) /***************************************************************************** md_atof: convert ascii to floating point diff --git a/gas/config/tc-ia64.c b/gas/config/tc-ia64.c index d3b3454..9bf22a8 100644 --- a/gas/config/tc-ia64.c +++ b/gas/config/tc-ia64.c @@ -5267,7 +5267,7 @@ errata_nop_necessary_p (slot, insn_unit) && strncmp (idesc->name, "probe", 5) != 0) return 0; } - if (prev_group->g_reg_set_conditionally[regno]) + if (prev_group->g_reg_set_conditionally[regno]) return 1; } } @@ -8510,7 +8510,7 @@ mark_resource (idesc, dep, spec, depind, path) regdepstotlen += 20; regdeps = (struct rsrc *) xrealloc ((void *) regdeps, - regdepstotlen * sizeof(struct rsrc)); + regdepstotlen * sizeof (struct rsrc)); } regdeps[regdepslen] = *spec; diff --git a/gas/config/tc-m68hc11.c b/gas/config/tc-m68hc11.c index 3901ad0..8131108 100644 --- a/gas/config/tc-m68hc11.c +++ b/gas/config/tc-m68hc11.c @@ -1109,10 +1109,10 @@ get_operand (oper, which, opmode) if (possible_mode != M6811_OP_NONE) mode = possible_mode; - + if ((current_architecture & cpu6811) && possible_mode != M6811_OP_NONE) - as_bad (_("Pre-increment mode is not valid for 68HC11")); + as_bad (_("Pre-increment mode is not valid for 68HC11")); /* Backtrack. */ if (which == 0 && opmode & M6812_OP_IDX_P2 && reg != REG_X && reg != REG_Y diff --git a/gas/config/tc-m68k.c b/gas/config/tc-m68k.c index 1cd8157..10e2623 100644 --- a/gas/config/tc-m68k.c +++ b/gas/config/tc-m68k.c @@ -643,7 +643,7 @@ CONST pseudo_typeS mote_pseudo_table[] = extern char *input_line_pointer; static char mklower_table[256]; -#define mklower(c) (mklower_table[(unsigned char)(c)]) +#define mklower(c) (mklower_table[(unsigned char) (c)]) static char notend_table[256]; static char alt_notend_table[256]; #define notend(s) \ @@ -2441,7 +2441,7 @@ m68k_ip (instring) case FPREG: default: as_bad (_("unknown/incorrect operand")); - /* abort(); */ + /* abort (); */ } install_gen_operand (s[1], tmpreg); break; @@ -6765,7 +6765,7 @@ struct option md_longopts[] = { {"pcrel", no_argument, NULL, OPTION_PCREL}, {NULL, no_argument, NULL, 0} }; -size_t md_longopts_size = sizeof(md_longopts); +size_t md_longopts_size = sizeof (md_longopts); int md_parse_option (c, arg) @@ -6929,7 +6929,7 @@ void md_show_usage (stream) FILE *stream; { - fprintf(stream, _("\ + fprintf (stream, _("\ 680X0 options:\n\ -l use 1 word for refs to undefined symbols [default 2]\n\ -m68000 | -m68008 | -m68010 | -m68020 | -m68030 | -m68040 | -m68060\n\ @@ -6939,7 +6939,7 @@ md_show_usage (stream) -m68881 | -m68882 | -mno-68881 | -mno-68882\n\ target has/lacks floating-point coprocessor\n\ [default yes for 68020, 68030, and cpu32]\n")); - fprintf(stream, _("\ + fprintf (stream, _("\ -m68851 | -mno-68851\n\ target has/lacks memory-management unit coprocessor\n\ [default yes for 68020 and up]\n\ diff --git a/gas/config/tc-m88k.c b/gas/config/tc-m88k.c index e02798c..86496cf 100644 --- a/gas/config/tc-m88k.c +++ b/gas/config/tc-m88k.c @@ -216,7 +216,7 @@ CONST char *md_shortopts = ""; struct option md_longopts[] = { {NULL, no_argument, NULL, 0} }; -size_t md_longopts_size = sizeof(md_longopts); +size_t md_longopts_size = sizeof (md_longopts); int md_parse_option (c, arg) diff --git a/gas/config/tc-pj.c b/gas/config/tc-pj.c index 1a70b03..505a627 100644 --- a/gas/config/tc-pj.c +++ b/gas/config/tc-pj.c @@ -277,7 +277,7 @@ md_assemble (str) { /* It's a fake opcode. Dig out the args and pretend that was what we were passed. */ - ((void (*)()) opcode->name) (opcode, op_end); + ((void (*) ()) opcode->name) (opcode, op_end); } else { diff --git a/gas/config/tc-ppc.c b/gas/config/tc-ppc.c index 44949b7..9985f43 100644 --- a/gas/config/tc-ppc.c +++ b/gas/config/tc-ppc.c @@ -515,7 +515,7 @@ static const struct pd_reg pre_defined_registers[] = }; -#define REG_NAME_CNT (sizeof(pre_defined_registers) / sizeof(struct pd_reg)) +#define REG_NAME_CNT (sizeof (pre_defined_registers) / sizeof (struct pd_reg)) /* Given NAME, find the register number associated with that name, return the integer value associated with the given name or -1 on failure. */ @@ -763,7 +763,7 @@ CONST char *md_shortopts = "um:"; struct option md_longopts[] = { {NULL, no_argument, NULL, 0} }; -size_t md_longopts_size = sizeof(md_longopts); +size_t md_longopts_size = sizeof (md_longopts); int md_parse_option (c, arg) @@ -957,7 +957,7 @@ void md_show_usage (stream) FILE *stream; { - fprintf(stream, _("\ + fprintf (stream, _("\ PowerPC options:\n\ -u ignored\n\ -mpwrx, -mpwr2 generate code for IBM POWER/2 (RIOS2)\n\ @@ -972,7 +972,7 @@ PowerPC options:\n\ -mregnames Allow symbolic names for registers\n\ -mno-regnames Do not allow symbolic names for registers\n")); #ifdef OBJ_ELF - fprintf(stream, _("\ + fprintf (stream, _("\ -mrelocatable support for GCC's -mrelocatble option\n\ -mrelocatable-lib support for GCC's -mrelocatble-lib option\n\ -memb set PPC_EMB bit in ELF flags\n\ @@ -1266,7 +1266,7 @@ ppc_elf_suffix (str_p, exp_p) int len; struct map_bfd *ptr; -#define MAP(str,reloc) { str, sizeof(str)-1, reloc } +#define MAP(str,reloc) { str, sizeof (str)-1, reloc } static struct map_bfd mapping[] = { MAP ("l", BFD_RELOC_LO16), @@ -1925,10 +1925,10 @@ md_assemble (str) as_bad (_("Unimplemented toc64 expression modifier")); break; default: - fprintf(stderr, + fprintf (stderr, _("Unexpected return value [%d] from parse_toc_entry!\n"), toc_kind); - abort(); + abort (); break; } @@ -2122,7 +2122,7 @@ md_assemble (str) offset = target_big_endian ? (4 - size) : 0; if (size < 1 || size > 4) - abort(); + abort (); fixP = fix_new_exp (frag_now, f - frag_now->fr_literal + offset, size, &fixups[i].exp, reloc_howto->pc_relative, @@ -5105,7 +5105,7 @@ md_apply_fix3 (fixp, valuep, seg) break; default: - fprintf(stderr, + fprintf (stderr, _("Gas failure, reloc value %d\n"), fixp->fx_r_type); fflush(stderr); abort (); diff --git a/gas/config/tc-sh.c b/gas/config/tc-sh.c index 3b44e69..ee40584 100644 --- a/gas/config/tc-sh.c +++ b/gas/config/tc-sh.c @@ -233,7 +233,7 @@ sh_elf_suffix (str_p, exp_p, new_exp_p) int len; struct map_bfd *ptr; -#define MAP(str,reloc) { str, sizeof(str)-1, reloc } +#define MAP(str,reloc) { str, sizeof (str)-1, reloc } static struct map_bfd mapping[] = { MAP ("got", BFD_RELOC_32_GOT_PCREL), diff --git a/gas/config/tc-sparc.c b/gas/config/tc-sparc.c index e133889..850e606 100644 --- a/gas/config/tc-sparc.c +++ b/gas/config/tc-sparc.c @@ -196,7 +196,7 @@ const char FLT_CHARS[] = "rRsSfFdDxXpP"; changed in read.c. Ideally it shouldn't have to know about it at all, but nothing is ideal around here. */ -#define isoctal(c) ((unsigned)((c) - '0') < '8') +#define isoctal(c) ((unsigned) ((c) - '0') < '8') struct sparc_it { diff --git a/gas/config/tc-tahoe.c b/gas/config/tc-tahoe.c index b5c9abc..34df939 100644 --- a/gas/config/tc-tahoe.c +++ b/gas/config/tc-tahoe.c @@ -373,7 +373,7 @@ CONST char *md_shortopts = "ad:STt:V"; struct option md_longopts[] = { {NULL, no_argument, NULL, 0} }; -size_t md_longopts_size = sizeof(md_longopts); +size_t md_longopts_size = sizeof (md_longopts); int md_parse_option (c, arg) @@ -417,7 +417,7 @@ void md_show_usage (stream) FILE *stream; { - fprintf(stream, _("\ + fprintf (stream, _("\ Tahoe options:\n\ -a ignored\n\ -d LENGTH ignored\n\ diff --git a/gas/config/tc-vax.c b/gas/config/tc-vax.c index 7dbb8ba..d195c35 100644 --- a/gas/config/tc-vax.c +++ b/gas/config/tc-vax.c @@ -3111,7 +3111,7 @@ CONST char *md_shortopts = "d:STt:V"; struct option md_longopts[] = { {NULL, no_argument, NULL, 0} }; -size_t md_longopts_size = sizeof(md_longopts); +size_t md_longopts_size = sizeof (md_longopts); int md_parse_option (c, arg) @@ -3182,7 +3182,7 @@ void md_show_usage (stream) FILE *stream; { - fprintf(stream, _("\ + fprintf (stream, _("\ VAX options:\n\ -d LENGTH ignored\n\ -J ignored\n\ |