diff options
Diffstat (limited to 'gas')
| -rw-r--r-- | gas/ChangeLog | 6 | ||||
| -rw-r--r-- | gas/config/tc-i386.c | 20 | ||||
| -rw-r--r-- | gas/testsuite/ChangeLog | 6 | ||||
| -rw-r--r-- | gas/testsuite/gas/i386/svme.d | 4 | ||||
| -rw-r--r-- | gas/testsuite/gas/i386/svme.s | 10 | ||||
| -rw-r--r-- | gas/testsuite/gas/i386/svme64.d | 10 |
6 files changed, 44 insertions, 12 deletions
diff --git a/gas/ChangeLog b/gas/ChangeLog index 155a077..fd303ff 100644 --- a/gas/ChangeLog +++ b/gas/ChangeLog @@ -1,3 +1,9 @@ +2007-09-06 H.J. Lu <hongjiu.lu@intel.com> + + * config/tc-i386.c (match_template): Handle invlpga, vmload, + vmrun and vmsave in SVME. + (process_suffix): Likewise. + 2007-09-05 H.J. Lu <hongjiu.lu@intel.com> * config/tc-i386.c (i386_index_check): Don't use RegRex diff --git a/gas/config/tc-i386.c b/gas/config/tc-i386.c index a5ac843..54841b1 100644 --- a/gas/config/tc-i386.c +++ b/gas/config/tc-i386.c @@ -2664,9 +2664,15 @@ match_template (void) || !MATCH (overlap1, i.types[1], operand_types[1]) /* monitor in SSE3 is a very special case. The first register and the second register may have different - sizes. The same applies to crc32 in SSE4.2. */ + sizes. The same applies to crc32 in SSE4.2. It is + also true for invlpga, vmload, vmrun and vmsave in + SVME. */ || !((t->base_opcode == 0x0f01 - && t->extension_opcode == 0xc8) + && (t->extension_opcode == 0xc8 + || t->extension_opcode == 0xd8 + || t->extension_opcode == 0xda + || t->extension_opcode == 0xdb + || t->extension_opcode == 0xdf)) || t->base_opcode == 0xf20f38f1 || CONSISTENT_REGISTER_MATCH (overlap0, i.types[0], operand_types[0], @@ -3000,11 +3006,17 @@ process_suffix (void) /* Now select between word & dword operations via the operand size prefix, except for instructions that will ignore this prefix anyway. */ - if (i.tm.base_opcode == 0x0f01 && i.tm.extension_opcode == 0xc8) + if (i.tm.base_opcode == 0x0f01 + && (i.tm.extension_opcode == 0xc8 + || i.tm.extension_opcode == 0xd8 + || i.tm.extension_opcode == 0xda + || i.tm.extension_opcode == 0xdb + || i.tm.extension_opcode == 0xdf)) { /* monitor in SSE3 is a very special case. The default size of AX is the size of mode. The address size override - prefix will change the size of AX. */ + prefix will change the size of AX. It is also true for + invlpga, vmload, vmrun and vmsave in SVME. */ if (i.op->regs[0].reg_type & (flag_code == CODE_32BIT ? Reg16 : Reg32)) if (!add_prefix (ADDR_PREFIX_OPCODE)) diff --git a/gas/testsuite/ChangeLog b/gas/testsuite/ChangeLog index ab8f216..573b354 100644 --- a/gas/testsuite/ChangeLog +++ b/gas/testsuite/ChangeLog @@ -1,3 +1,9 @@ +2007-09-06 H.J. Lu <hongjiu.lu@intel.com> + + * gas/i386/svme.s: Updated to allow eax in 64bit. + * gas/i386/svme.d: Updated. + * gas/i386/svme64.d: Likewise. + 2007-08-31 H.J. Lu <hongjiu.lu@intel.com> * gas/i386/svme.s: Updated to accept eax in 32bit and rax in diff --git a/gas/testsuite/gas/i386/svme.d b/gas/testsuite/gas/i386/svme.d index 14dcb44..d7682a4 100644 --- a/gas/testsuite/gas/i386/svme.d +++ b/gas/testsuite/gas/i386/svme.d @@ -15,15 +15,15 @@ Disassembly of section .text: [ ]*[0-9a-f]+:[ ]+0f 01 d8[ ]+vmrun[ ]* [ ]*[0-9a-f]+:[ ]+0f 01 db[ ]+vmsave[ ]* [0-9a-f]+ <att32>: +[ ]*[0-9a-f]+:[ ]+0f 01 de[ ]+skinit[ ]* [ ]*[0-9a-f]+:[ ]+0f 01 df[ ]+invlpga[ ]* [ ]*[0-9a-f]+:[ ]+0f 01 da[ ]+vmload[ ]* [ ]*[0-9a-f]+:[ ]+0f 01 d8[ ]+vmrun[ ]* [ ]*[0-9a-f]+:[ ]+0f 01 db[ ]+vmsave[ ]* -[ ]*[0-9a-f]+:[ ]+0f 01 de[ ]+skinit[ ]* [0-9a-f]+ <intel32>: +[ ]*[0-9a-f]+:[ ]+0f 01 de[ ]+skinit[ ]* [ ]*[0-9a-f]+:[ ]+0f 01 df[ ]+invlpga[ ]* [ ]*[0-9a-f]+:[ ]+0f 01 da[ ]+vmload[ ]* [ ]*[0-9a-f]+:[ ]+0f 01 d8[ ]+vmrun[ ]* [ ]*[0-9a-f]+:[ ]+0f 01 db[ ]+vmsave[ ]* -[ ]*[0-9a-f]+:[ ]+0f 01 de[ ]+skinit[ ]* #pass diff --git a/gas/testsuite/gas/i386/svme.s b/gas/testsuite/gas/i386/svme.s index 9e517d4..ff1be7c 100644 --- a/gas/testsuite/gas/i386/svme.s +++ b/gas/testsuite/gas/i386/svme.s @@ -19,20 +19,18 @@ common: .ifdef __amd64__ att64: do_args %rax, %ecx -.else -att32: - do_args %eax, %ecx .endif +att32: skinit %eax + do_args %eax, %ecx .intel_syntax noprefix .ifdef __amd64__ intel64: do_args rax, ecx -.else -intel32: - do_args eax, ecx .endif +intel32: skinit eax + do_args eax, ecx .p2align 4,0 diff --git a/gas/testsuite/gas/i386/svme64.d b/gas/testsuite/gas/i386/svme64.d index 2ebcda8..640b947 100644 --- a/gas/testsuite/gas/i386/svme64.d +++ b/gas/testsuite/gas/i386/svme64.d @@ -21,11 +21,21 @@ Disassembly of section .text: [ ]*[0-9a-f]+:[ ]+0f 01 da[ ]+vmload[ ]* [ ]*[0-9a-f]+:[ ]+0f 01 d8[ ]+vmrun[ ]* [ ]*[0-9a-f]+:[ ]+0f 01 db[ ]+vmsave[ ]* +[0-9a-f]+ <att32>: [ ]*[0-9a-f]+:[ ]+0f 01 de[ ]+skinit[ ]* +[ ]*[0-9a-f]+:[ ]+67 0f 01 df[ ]+addr32 invlpga[ ] +[ ]*[0-9a-f]+:[ ]+67 0f 01 da[ ]+addr32 vmload[ ] +[ ]*[0-9a-f]+:[ ]+67 0f 01 d8[ ]+addr32 vmrun[ ] +[ ]*[0-9a-f]+:[ ]+67 0f 01 db[ ]+addr32 vmsave[ ] [0-9a-f]+ <intel64>: [ ]*[0-9a-f]+:[ ]+0f 01 df[ ]+invlpga[ ]* [ ]*[0-9a-f]+:[ ]+0f 01 da[ ]+vmload[ ]* [ ]*[0-9a-f]+:[ ]+0f 01 d8[ ]+vmrun[ ]* [ ]*[0-9a-f]+:[ ]+0f 01 db[ ]+vmsave[ ]* +[0-9a-f]+ <intel32>: [ ]*[0-9a-f]+:[ ]+0f 01 de[ ]+skinit[ ]* +[ ]*[0-9a-f]+:[ ]+67 0f 01 df[ ]+addr32 invlpga[ ] +[ ]*[0-9a-f]+:[ ]+67 0f 01 da[ ]+addr32 vmload[ ] +[ ]*[0-9a-f]+:[ ]+67 0f 01 d8[ ]+addr32 vmrun[ ] +[ ]*[0-9a-f]+:[ ]+67 0f 01 db[ ]+addr32 vmsave[ ] #pass |