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-rw-r--r--gas/doc/c-riscv.texi5
-rw-r--r--gas/testsuite/gas/riscv/x-thead-mac.d15
-rw-r--r--gas/testsuite/gas/riscv/x-thead-mac.s7
3 files changed, 27 insertions, 0 deletions
diff --git a/gas/doc/c-riscv.texi b/gas/doc/c-riscv.texi
index b1462ce..401f7e4 100644
--- a/gas/doc/c-riscv.texi
+++ b/gas/doc/c-riscv.texi
@@ -729,6 +729,11 @@ The XTheadCondMov extension provides instructions for conditional moves.
It is documented in @url{https://github.com/T-head-Semi/thead-extension-spec/releases/download/2.0.0/xthead-2022-09-05-2.0.0.pdf}.
+@item XTheadMac
+The XTheadMac extension provides multiply-accumulate instructions.
+
+It is documented in @url{https://github.com/T-head-Semi/thead-extension-spec/releases/download/2.0.0/xthead-2022-09-05-2.0.0.pdf}.
+
@item XTheadSync
The XTheadSync extension provides instructions for multi-processor synchronization.
diff --git a/gas/testsuite/gas/riscv/x-thead-mac.d b/gas/testsuite/gas/riscv/x-thead-mac.d
new file mode 100644
index 0000000..3f8e654
--- /dev/null
+++ b/gas/testsuite/gas/riscv/x-thead-mac.d
@@ -0,0 +1,15 @@
+#as: -march=rv64i_xtheadmac
+#source: x-thead-mac.s
+#objdump: -dr
+
+.*:[ ]+file format .*
+
+Disassembly of section .text:
+
+0+000 <target>:
+[ ]+[0-9a-f]+:[ ]+20c5950b[ ]+th.mula[ ]+a0,a1,a2
+[ ]+[0-9a-f]+:[ ]+28c5950b[ ]+th.mulah[ ]+a0,a1,a2
+[ ]+[0-9a-f]+:[ ]+24c5950b[ ]+th.mulaw[ ]+a0,a1,a2
+[ ]+[0-9a-f]+:[ ]+22c5950b[ ]+th.muls[ ]+a0,a1,a2
+[ ]+[0-9a-f]+:[ ]+2ac5950b[ ]+th.mulsh[ ]+a0,a1,a2
+[ ]+[0-9a-f]+:[ ]+26c5950b[ ]+th.mulsw[ ]+a0,a1,a2
diff --git a/gas/testsuite/gas/riscv/x-thead-mac.s b/gas/testsuite/gas/riscv/x-thead-mac.s
new file mode 100644
index 0000000..986b96f
--- /dev/null
+++ b/gas/testsuite/gas/riscv/x-thead-mac.s
@@ -0,0 +1,7 @@
+target:
+ th.mula a0, a1, a2
+ th.mulah a0, a1, a2
+ th.mulaw a0, a1, a2
+ th.muls a0, a1, a2
+ th.mulsh a0, a1, a2
+ th.mulsw a0, a1, a2