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-rw-r--r--gas/doc/as-all.texinfo758
-rw-r--r--gas/doc/as.texinfo766
2 files changed, 778 insertions, 746 deletions
diff --git a/gas/doc/as-all.texinfo b/gas/doc/as-all.texinfo
index caf59ec..c8453e7 100644
--- a/gas/doc/as-all.texinfo
+++ b/gas/doc/as-all.texinfo
@@ -11,7 +11,7 @@
@ifinfo
@format
START-INFO-DIR-ENTRY
-* As: (as). The GNU assembler.
+* As: (as). The GNU assembler.
END-INFO-DIR-ENTRY
@end format
@end ifinfo
@@ -23,7 +23,7 @@ END-INFO-DIR-ENTRY
@ifinfo
This file documents the GNU Assembler "as".
-Copyright (C) 1991 Free Software Foundation, Inc.
+Copyright (C) 1991, 1992 Free Software Foundation, Inc.
Permission is granted to make and distribute verbatim copies of
this manual provided the copyright notice and this permission notice
@@ -84,7 +84,7 @@ done.
@end tex
@vskip 0pt plus 1filll
-Copyright @copyright{} 1991 Free Software Foundation, Inc.
+Copyright @copyright{} 1991, 1992 Free Software Foundation, Inc.
Permission is granted to make and distribute verbatim copies of
this manual provided the copyright notice and this permission notice
@@ -110,15 +110,15 @@ instead of in the original English.
This file is a user guide to the GNU assembler @code{as}.
@menu
-* Overview:: Overview
-* Invoking:: Command-Line Options
-* Syntax:: Syntax
-* Sections:: Sections and Relocation
-* Symbols:: Symbols
-* Expressions:: Expressions
-* Pseudo Ops:: Assembler Directives
-* Machine Dependent:: Machine Dependent Features
-* Copying:: GNU GENERAL PUBLIC LICENSE
+* Overview:: Overview
+* Invoking:: Command-Line Options
+* Syntax:: Syntax
+* Sections:: Sections and Relocation
+* Symbols:: Symbols
+* Expressions:: Expressions
+* Pseudo Ops:: Assembler Directives
+* Machine Dependent:: Machine Dependent Features
+* Copying:: GNU GENERAL PUBLIC LICENSE
* Index:: Index
@end menu
@end ifinfo
@@ -210,13 +210,13 @@ Standard input, or source files to assemble
@end table
@menu
-* Manual:: Structure of this Manual
-* GNU Assembler:: as, the GNU Assembler
-* Object Formats:: Object File Formats
-* Command Line:: Command Line
-* Input Files:: Input Files
-* Object:: Output (Object) File
-* Errors:: Error and Warning Messages
+* Manual:: Structure of this Manual
+* GNU Assembler:: as, the GNU Assembler
+* Object Formats:: Object File Formats
+* Command Line:: Command Line
+* Input Files:: Input Files
+* Object:: Output (Object) File
+* Errors:: Error and Warning Messages
@end menu
@node Manual
@@ -614,12 +614,12 @@ use; it is inspired in BSD 4.2
assembler, except that @code{as} does not assemble Vax bit-fields.
@menu
-* Pre-processing:: Pre-processing
-* Whitespace:: Whitespace
-* Comments:: Comments
-* Symbol Intro:: Symbols
-* Statements:: Statements
-* Constants:: Constants
+* Pre-processing:: Pre-processing
+* Whitespace:: Whitespace
+* Comments:: Comments
+* Symbol Intro:: Symbols
+* Statements:: Statements
+* Constants:: Constants
@end menu
@node Pre-processing
@@ -697,8 +697,8 @@ is considered a comment and is ignored. The line comment character is
@samp{|} on the 680x0;
@samp{;} for the AMD 29K family;
@samp{;} for the machine specific family;
-@samp{!} for the Z8000.
-@pxref{Machine Dependent}. @refill
+@samp{!} for the Z8000;
+see @ref{Machine Dependent}. @refill
@c FIXME: fill in SPARC line comment char
On some machines there are two different line comment characters. One
@@ -815,8 +815,8 @@ inspection, without knowing any context. Like this:
@end smallexample
@menu
-* Characters:: Character Constants
-* Numbers:: Number Constants
+* Characters:: Character Constants
+* Numbers:: Number Constants
@end menu
@node Characters
@@ -831,8 +831,8 @@ numeric expressions. String constants (properly called string
used in arithmetic expressions.
@menu
-* Strings:: Strings
-* Chars:: Characters
+* Strings:: Strings
+* Chars:: Characters
@end menu
@node Strings
@@ -852,16 +852,16 @@ escape character). The complete list of escapes follows.
@cindex escape codes, character
@cindex character escape codes
@table @kbd
-@c @item \a
-@c Mnemonic for ACKnowledge; for ASCII this is octal code 007.
+@c @item \a
+@c Mnemonic for ACKnowledge; for ASCII this is octal code 007.
@c
@item \b
@cindex @code{\b} (backspace character)
@cindex backspace (@code{\b})
Mnemonic for backspace; for ASCII this is octal code 010.
-@c @item \e
-@c Mnemonic for EOText; for ASCII this is octal code 004.
+@c @item \e
+@c Mnemonic for EOText; for ASCII this is octal code 004.
@c
@item \f
@cindex @code{\f} (formfeed character)
@@ -873,27 +873,27 @@ Mnemonic for FormFeed; for ASCII this is octal code 014.
@cindex newline (@code{\n})
Mnemonic for newline; for ASCII this is octal code 012.
-@c @item \p
-@c Mnemonic for prefix; for ASCII this is octal code 033, usually known as @code{escape}.
+@c @item \p
+@c Mnemonic for prefix; for ASCII this is octal code 033, usually known as @code{escape}.
@c
@item \r
@cindex @code{\r} (carriage return character)
@cindex carriage return (@code{\r})
Mnemonic for carriage-Return; for ASCII this is octal code 015.
-@c @item \s
-@c Mnemonic for space; for ASCII this is octal code 040. Included for compliance with
-@c other assemblers.
+@c @item \s
+@c Mnemonic for space; for ASCII this is octal code 040. Included for compliance with
+@c other assemblers.
@c
@item \t
@cindex @code{\t} (tab)
@cindex tab (@code{\t})
Mnemonic for horizontal Tab; for ASCII this is octal code 011.
-@c @item \v
-@c Mnemonic for Vertical tab; for ASCII this is octal code 013.
-@c @item \x @var{digit} @var{digit} @var{digit}
-@c A hexadecimal character code. The numeric code is 3 hexadecimal digits.
+@c @item \v
+@c Mnemonic for Vertical tab; for ASCII this is octal code 013.
+@c @item \x @var{digit} @var{digit} @var{digit}
+@c A hexadecimal character code. The numeric code is 3 hexadecimal digits.
@c
@item \ @var{digit} @var{digit} @var{digit}
@cindex @code{\@var{ddd}} (octal character code)
@@ -907,11 +907,11 @@ for example, @code{\008} has the value 010, and @code{\009} the value 011.
@cindex backslash (@code{\\})
Represents one @samp{\} character.
-@c @item \'
-@c Represents one @samp{'} (accent acute) character.
-@c This is needed in single character literals
+@c @item \'
+@c Represents one @samp{'} (accent acute) character.
+@c This is needed in single character literals
@c (@xref{Characters,,Character Constants}.) to represent
-@c a @samp{'}.
+@c a @samp{'}.
@c
@item \"
@cindex @code{\"} (doublequote character)
@@ -964,9 +964,9 @@ integers, but they are stored in more than 32 bits. @emph{Flonums}
are floating point numbers, described below.
@menu
-* Integers:: Integers
-* Bignums:: Bignums
-* Flonums:: Flonums
+* Integers:: Integers
+* Bignums:: Bignums
+* Flonums:: Flonums
@end menu
@node Integers
@@ -1074,11 +1074,11 @@ independently of any floating point hardware in the computer running
@cindex relocation
@menu
-* Secs Background:: Background
-* ld Sections:: ld Sections
-* as Sections:: as Internal Sections
-* Sub-Sections:: Sub-Sections
-* bss:: bss Section
+* Secs Background:: Background
+* ld Sections:: ld Sections
+* as Sections:: as Internal Sections
+* Sub-Sections:: Sub-Sections
+* bss:: bss Section
@end menu
@node Secs Background
@@ -1453,11 +1453,11 @@ the same order they were declared. This may break some debuggers.
@end quotation
@menu
-* Labels:: Labels
-* Setting Symbols:: Giving Symbols Other Values
-* Symbol Names:: Symbol Names
-* Dot:: The Special Dot Symbol
-* Symbol Attributes:: Symbol Attributes
+* Labels:: Labels
+* Setting Symbols:: Giving Symbols Other Values
+* Symbol Names:: Symbol Names
+* Dot:: The Special Dot Symbol
+* Symbol Attributes:: Symbol Attributes
@end menu
@node Labels
@@ -1590,10 +1590,10 @@ symbol an externally defined symbol, which is generally what you
would want.
@menu
-* Symbol Value:: Value
-* Symbol Type:: Type
-* a.out Symbols:: Symbol Attributes: @code{a.out}
-* COFF Symbols:: Symbol Attributes for COFF
+* Symbol Value:: Value
+* Symbol Type:: Type
+* a.out Symbols:: Symbol Attributes: @code{a.out}
+* COFF Symbols:: Symbol Attributes for COFF
@end menu
@node Symbol Value
@@ -1635,8 +1635,8 @@ format depends on the object-code output format in use.
@cindex symbol attributes, @code{a.out}
@menu
-* Symbol Desc:: Descriptor
-* Symbol Other:: Other
+* Symbol Desc:: Descriptor
+* Symbol Other:: Other
@end menu
@node Symbol Desc
@@ -1687,8 +1687,8 @@ An @dfn{expression} specifies an address or numeric value.
Whitespace may precede and/or follow an expression.
@menu
-* Empty Exprs:: Empty Expressions
-* Integer Exprs:: Integer Expressions
+* Empty Exprs:: Empty Expressions
+* Integer Exprs:: Integer Expressions
@end menu
@node Empty Exprs
@@ -1710,10 +1710,10 @@ An @dfn{integer expression} is one or more @emph{arguments} delimited
by @emph{operators}.
@menu
-* Arguments:: Arguments
-* Operators:: Operators
-* Prefix Ops:: Prefix Operators
-* Infix Ops:: Infix Operators
+* Arguments:: Arguments
+* Operators:: Operators
+* Prefix Ops:: Prefix Operators
+* Infix Ops:: Infix Operators
@end menu
@node Arguments
@@ -1884,61 +1884,61 @@ This chapter discusses directives present regardless of the target
machine configuration for the GNU assembler.
@menu
-* Abort:: @code{.abort}
-* coff-ABORT:: @code{.ABORT}
-* Align:: @code{.align @var{abs-expr} , @var{abs-expr}}
-* App-File:: @code{.app-file @var{string}}
-* Ascii:: @code{.ascii "@var{string}"}@dots{}
-* Asciz:: @code{.asciz "@var{string}"}@dots{}
-* Byte:: @code{.byte @var{expressions}}
-* Comm:: @code{.comm @var{symbol} , @var{length} }
-* Data:: @code{.data @var{subsection}}
-* Def:: @code{.def @var{name}}
-* Desc:: @code{.desc @var{symbol}, @var{abs-expression}}
-* Dim:: @code{.dim}
-* Double:: @code{.double @var{flonums}}
-* Eject:: @code{.eject}
-* Else:: @code{.else}
-* Endef:: @code{.endef}
-* Endif:: @code{.endif}
-* Equ:: @code{.equ @var{symbol}, @var{expression}}
-* Extern:: @code{.extern}
-* File:: @code{.file @var{string}}
-* Fill:: @code{.fill @var{repeat} , @var{size} , @var{value}}
-* Float:: @code{.float @var{flonums}}
-* Global:: @code{.global @var{symbol}}, @code{.globl @var{symbol}}
-* hword:: @code{.hword @var{expressions}}
-* Ident:: @code{.ident}
-* If:: @code{.if @var{absolute expression}}
-* Include:: @code{.include "@var{file}"}
-* Int:: @code{.int @var{expressions}}
-* Lcomm:: @code{.lcomm @var{symbol} , @var{length}}
+* Abort:: @code{.abort}
+* coff-ABORT:: @code{.ABORT}
+* Align:: @code{.align @var{abs-expr} , @var{abs-expr}}
+* App-File:: @code{.app-file @var{string}}
+* Ascii:: @code{.ascii "@var{string}"}@dots{}
+* Asciz:: @code{.asciz "@var{string}"}@dots{}
+* Byte:: @code{.byte @var{expressions}}
+* Comm:: @code{.comm @var{symbol} , @var{length} }
+* Data:: @code{.data @var{subsection}}
+* Def:: @code{.def @var{name}}
+* Desc:: @code{.desc @var{symbol}, @var{abs-expression}}
+* Dim:: @code{.dim}
+* Double:: @code{.double @var{flonums}}
+* Eject:: @code{.eject}
+* Else:: @code{.else}
+* Endef:: @code{.endef}
+* Endif:: @code{.endif}
+* Equ:: @code{.equ @var{symbol}, @var{expression}}
+* Extern:: @code{.extern}
+* File:: @code{.file @var{string}}
+* Fill:: @code{.fill @var{repeat} , @var{size} , @var{value}}
+* Float:: @code{.float @var{flonums}}
+* Global:: @code{.global @var{symbol}}, @code{.globl @var{symbol}}
+* hword:: @code{.hword @var{expressions}}
+* Ident:: @code{.ident}
+* If:: @code{.if @var{absolute expression}}
+* Include:: @code{.include "@var{file}"}
+* Int:: @code{.int @var{expressions}}
+* Lcomm:: @code{.lcomm @var{symbol} , @var{length}}
* Lflags:: @code{.lflags}
-* Line:: @code{.line @var{line-number}}
-* Ln:: @code{.ln @var{line-number}}
-* List:: @code{.list}
-* Long:: @code{.long @var{expressions}}
-* Nolist:: @code{.nolist}
-* Octa:: @code{.octa @var{bignums}}
-* Org:: @code{.org @var{new-lc} , @var{fill}}
+* Line:: @code{.line @var{line-number}}
+* Ln:: @code{.ln @var{line-number}}
+* List:: @code{.list}
+* Long:: @code{.long @var{expressions}}
+* Nolist:: @code{.nolist}
+* Octa:: @code{.octa @var{bignums}}
+* Org:: @code{.org @var{new-lc} , @var{fill}}
* Psize:: @code{.psize @var{lines}, @var{columns}}
-* Quad:: @code{.quad @var{bignums}}
-* Sbttl:: @code{.sbttl "@var{subheading}"}
-* Scl:: @code{.scl @var{class}}
+* Quad:: @code{.quad @var{bignums}}
+* Sbttl:: @code{.sbttl "@var{subheading}"}
+* Scl:: @code{.scl @var{class}}
* Section:: @code{.section @var{name}, @var{subsection}}
-* Set:: @code{.set @var{symbol}, @var{expression}}
-* Short:: @code{.short @var{expressions}}
-* Single:: @code{.single @var{flonums}}
-* Size:: @code{.size}
-* Space:: @code{.space @var{size} , @var{fill}}
-* Stab:: @code{.stabd, .stabn, .stabs}
-* Tag:: @code{.tag @var{structname}}
-* Text:: @code{.text @var{subsection}}
-* Title:: @code{.title "@var{heading}"}
-* Type:: @code{.type @var{int}}
-* Val:: @code{.val @var{addr}}
-* Word:: @code{.word @var{expressions}}
-* Deprecated:: Deprecated Directives
+* Set:: @code{.set @var{symbol}, @var{expression}}
+* Short:: @code{.short @var{expressions}}
+* Single:: @code{.single @var{flonums}}
+* Size:: @code{.size}
+* Space:: @code{.space @var{size} , @var{fill}}
+* Stab:: @code{.stabd, .stabn, .stabs}
+* Tag:: @code{.tag @var{structname}}
+* Text:: @code{.text @var{subsection}}
+* Title:: @code{.title "@var{heading}"}
+* Type:: @code{.type @var{int}}
+* Val:: @code{.val @var{addr}}
+* Word:: @code{.word @var{expressions}}
+* Deprecated:: Deprecated Directives
@end menu
@node Abort
@@ -2769,14 +2769,14 @@ include details on any machine's instruction set. For details on that
subject, see the hardware manufacturer's manual.
@menu
-* Vax-Dependent:: VAX Dependent Features
-* AMD29K-Dependent:: AMD 29K Dependent Features
-* H8/300-Dependent:: Hitachi H8/300 Dependent Features
-* i960-Dependent:: Intel 80960 Dependent Features
-* M68K-Dependent:: M680x0 Dependent Features
-* Sparc-Dependent:: SPARC Dependent Features
-* Z8000-Dependent:: Z8000 Dependent Features
-* i386-Dependent:: 80386 Dependent Features
+* Vax-Dependent:: VAX Dependent Features
+* AMD29K-Dependent:: AMD 29K Dependent Features
+* H8/300-Dependent:: Hitachi H8/300 Dependent Features
+* i960-Dependent:: Intel 80960 Dependent Features
+* M68K-Dependent:: M680x0 Dependent Features
+* Sparc-Dependent:: SPARC Dependent Features
+* Z8000-Dependent:: Z8000 Dependent Features
+* i386-Dependent:: 80386 Dependent Features
@end menu
@node Vax-Dependent
@@ -2784,13 +2784,13 @@ subject, see the hardware manufacturer's manual.
@cindex VAX support
@menu
-* Vax-Opts:: VAX Command-Line Options
-* VAX-float:: VAX Floating Point
-* VAX-directives:: Vax Machine Directives
-* VAX-opcodes:: VAX Opcodes
-* VAX-branch:: VAX Branch Improvement
-* VAX-operands:: VAX Operands
-* VAX-no:: Not Supported on VAX
+* Vax-Opts:: VAX Command-Line Options
+* VAX-float:: VAX Floating Point
+* VAX-directives:: Vax Machine Directives
+* VAX-opcodes:: VAX Opcodes
+* VAX-branch:: VAX Branch Improvement
+* VAX-operands:: VAX Operands
+* VAX-no:: Not Supported on VAX
@end menu
@node Vax-Opts
@@ -3096,11 +3096,11 @@ can add the required code if they really need it.
@cindex AMD 29K support
@cindex 29K support
@menu
-* AMD29K Options:: Options
-* AMD29K Syntax:: Syntax
-* AMD29K Floating Point:: Floating Point
-* AMD29K Directives:: AMD 29K Machine Directives
-* AMD29K Opcodes:: Opcodes
+* AMD29K Options:: Options
+* AMD29K Syntax:: Syntax
+* AMD29K Floating Point:: Floating Point
+* AMD29K Directives:: AMD 29K Machine Directives
+* AMD29K Opcodes:: Opcodes
@end menu
@node AMD29K Options
@@ -3113,8 +3113,8 @@ can add the required code if they really need it.
@node AMD29K Syntax
@subsection Syntax
@menu
-* AMD29K-Chars:: Special Characters
-* AMD29K-Regs:: Register Names
+* AMD29K-Chars:: Special Characters
+* AMD29K-Regs:: Register Names
@end menu
@node AMD29K-Chars
@@ -3263,11 +3263,11 @@ User's Manual}, Advanced Micro Devices, Inc.
@cindex H8/300 support
@menu
-* H8/300 Options:: Options
-* H8/300 Syntax:: Syntax
-* H8/300 Floating Point:: Floating Point
-* H8/300 Directives:: H8/300 Machine Directives
-* H8/300 Opcodes:: Opcodes
+* H8/300 Options:: Options
+* H8/300 Syntax:: Syntax
+* H8/300 Floating Point:: Floating Point
+* H8/300 Directives:: H8/300 Machine Directives
+* H8/300 Opcodes:: Opcodes
@end menu
@node H8/300 Options
@@ -3281,8 +3281,8 @@ H8/300 family.
@node H8/300 Syntax
@subsection Syntax
@menu
-* H8/300-Chars:: Special Characters
-* H8/300-Regs:: Register Names
+* H8/300-Chars:: Special Characters
+* H8/300-Regs:: Register Names
* H8/300-Addressing:: Addressing Modes
@end menu
@@ -3512,10 +3512,10 @@ there's a mismatch between the suffix and the register size.
@cindex i960 support
@menu
-* Options-i960:: i960 Command-line Options
-* Floating Point-i960:: Floating Point
-* Directives-i960:: i960 Machine Directives
-* Opcodes for i960:: i960 Opcodes
+* Options-i960:: i960 Command-line Options
+* Floating Point-i960:: Floating Point
+* Directives-i960:: i960 Machine Directives
+* Opcodes for i960:: i960 Opcodes
@end menu
@c FIXME! Add Syntax sec with discussion of bitfields here, at least so
@@ -3704,8 +3704,8 @@ instruction: @samp{callj}, and Compare-and-Branch or Compare-and-Jump
instructions with target displacements larger than 13 bits.
@menu
-* callj-i960:: @code{callj}
-* Compare-and-branch-i960:: Compare-and-Branch
+* callj-i960:: @code{callj}
+* Compare-and-branch-i960:: Compare-and-Branch
@end menu
@node callj-i960
@@ -3801,11 +3801,11 @@ and the instruction pairs they may expand into:
@cindex M680x0 support
@menu
-* M68K-Opts:: M680x0 Options
-* M68K-Syntax:: Syntax
-* M68K-Float:: Floating Point
-* M68K-Directives:: 680x0 Machine Directives
-* M68K-opcodes:: Opcodes
+* M68K-Opts:: M680x0 Options
+* M68K-Syntax:: Syntax
+* M68K-Float:: Floating Point
+* M68K-Directives:: 680x0 Machine Directives
+* M68K-opcodes:: Opcodes
@end menu
@node M68K-Opts
@@ -3985,8 +3985,8 @@ instructions.
@end ignore
@menu
-* M68K-Branch:: Branch Improvement
-* M68K-Chars:: Special Characters
+* M68K-Branch:: Branch Improvement
+* M68K-Chars:: Special Characters
@end menu
@node M68K-Branch
@@ -4108,9 +4108,9 @@ beginning of a line, it is treated as a comment unless it looks like
@cindex SPARC support
@menu
-* Sparc-Opts:: Options
-* Sparc-Float:: Floating Point
-* Sparc-Directives:: Sparc Machine Directives
+* Sparc-Opts:: Options
+* Sparc-Float:: Floating Point
+* Sparc-Directives:: Sparc Machine Directives
@end menu
@node Sparc-Opts
@@ -4186,15 +4186,15 @@ instead of the 16 bit values it produces on many other machines.
@cindex i386 support
@cindex i80306 support
@menu
-* i386-Options:: Options
-* i386-Syntax:: AT&T Syntax versus Intel Syntax
-* i386-Opcodes:: Opcode Naming
-* i386-Regs:: Register Naming
-* i386-prefixes:: Opcode Prefixes
-* i386-Memory:: Memory References
-* i386-jumps:: Handling of Jump Instructions
-* i386-Float:: Floating Point
-* i386-Notes:: Notes
+* i386-Options:: Options
+* i386-Syntax:: AT&T Syntax versus Intel Syntax
+* i386-Opcodes:: Opcode Naming
+* i386-Regs:: Register Naming
+* i386-prefixes:: Opcode Prefixes
+* i386-Memory:: Memory References
+* i386-jumps:: Handling of Jump Instructions
+* i386-Float:: Floating Point
+* i386-Notes:: Notes
@end menu
@node i386-Options
@@ -4387,8 +4387,8 @@ Opcode prefixes are usually given as single-line instructions with no
operands, and must directly precede the instruction they act upon. For
example, the @samp{scas} (scan string) instruction is repeated with:
@smallexample
- repne
- scas
+ repne
+ scas
@end smallexample
Here is a list of opcode prefixes:
@@ -4595,9 +4595,9 @@ $69, %eax, %eax}.
@cindex Z8000 support
@menu
-* Z8000 Options:: No special command-line options for Z8000
-* Z8000 Syntax:: Assembler Syntax for the Z8000
-* Z8000 Opcodes:: Opcodes
+* Z8000 Options:: No special command-line options for Z8000
+* Z8000 Syntax:: Assembler Syntax for the Z8000
+* Z8000 Opcodes:: Opcodes
@end menu
@node Z8000 Options
@@ -4611,8 +4611,8 @@ Z8000 family.
@node Z8000 Syntax
@subsection Syntax
@menu
-* Z8000-Chars:: Special Characters
-* Z8000-Regs:: Register Names
+* Z8000-Chars:: Special Characters
+* Z8000-Regs:: Register Names
* Z8000-Addressing:: Addressing Modes
@end menu
@@ -4626,35 +4626,42 @@ Z8000 family.
@cindex line separator, Z8000
@cindex statement separator, Z8000
@cindex Z8000 line separator
-@samp{;} can be used instead of a newline to separate statements.
+You can use @samp{;} instead of a newline to separate statements.
@node Z8000-Regs
@subsubsection Register Names
@cindex Z8000 registers
@cindex registers, Z8000
-The Z8000 has sixteen 16 bit registers, numbered 0 to 15. You can refer to different
-sized groups of registers with the prefix @samp{r} for 16 bit registers, @samp{rr}
-for 32 bit registers and @samp{rq} for 64 bit registers. The first eight of the sixteen
-16 bit registers may also be accessed by bytes. They are named @samp{r@var{n}h} and @samp{r@var{n}l}.
-@example
-byte registers
- r0l r0h r1h r1l r2h r2l r3h r3l r4h r4l r5h r5l r6h r6l r7h r7l
+The Z8000 has sixteen 16 bit registers, numbered 0 to 15. You can refer
+to different sized groups of registers by register number, with the
+prefix @samp{r} for 16 bit registers, @samp{rr} for 32 bit registers and
+@samp{rq} for 64 bit registers. You can also refer to the contents of
+the first eight (of the sixteen 16 bit registers) by bytes. They are
+named @samp{r@var{n}h} and @samp{r@var{n}l}.
-word registers
- r0 r1 r2 r3 r4 r5 r6 r7 r8 r9 r10 r11 r12 r13 r14 r15
+@smallexample
+@exdent @emph{byte registers}
+r0l r0h r1h r1l r2h r2l r3h r3l
+r4h r4l r5h r5l r6h r6l r7h r7l
-long word registers
- rr0 rr2 rr4 rr6 rr8 rr10 rr12 rr14
+@exdent @emph{word registers}
+r0 r1 r2 r3 r4 r5 r6 r7 r8 r9 r10 r11 r12 r13 r14 r15
+
+@exdent @emph{long word registers}
+rr0 rr2 rr4 rr6 rr8 rr10 rr12 rr14
+
+@exdent @emph{quad word registers}
+rq0 rq4 rq8 rq12
+@end smallexample
-quad word registers
- rq0 rq4 rq8 rq12
-@end example
@node Z8000-Addressing
@subsubsection Addressing Modes
+
@cindex addressing modes, Z8000
@cindex Z800 addressing modes
as understands the following addressing modes for the Z8000:
+
@table @code
@item r@var{n}
Register direct
@@ -4662,7 +4669,7 @@ Register direct
@item @@r@var{n}
Indirect register
-@item @var{address}
+@item @var{addr}
Direct: the 16/24 bit address of the operand is in the instruction.
@item address(r@var{n})
@@ -4670,11 +4677,14 @@ Indexed: the 16/24 bit address is added to the 16 bit register to produce
the final address in memory of the operand.
@item r@var{n}(#@var{imm})
-Base Address: the 16/24 bit register is added to the 16 bit sign extended immediate displacement to produce the final address in memory of the operand.
+Base Address: the 16/24 bit register is added to the 16 bit sign
+extended immediate displacement to produce the final address in memory
+of the operand.
@item r@var{n}(r@var{m})
-Base Index: the 16/24 bit register r@var{n} is added to the sign extended
-16 bit index register r@var{m} to produce the final address in memory of the operand.
+Base Index: the 16/24 bit register r@var{n} is added to the sign
+extended 16 bit index register r@var{m} to produce the final address in
+memory of the operand.
@item #@var{xx}
Immediate data @var{xx}.
@@ -4689,56 +4699,64 @@ Immediate data @var{xx}.
For detailed information on the Z8000 machine instruction set, see
@cite{Z8000 Technical Manual}.
-@cindex Z8000 pseudo ops
+@cindex Z8000 directives
+The Z8000 port of as includes these additional assembler directives,
+for compatibility with other Z8000 assemblers:
-The Z8000 port of gas provides a superficial resemblance to YASM, and
-provides these YASM compatible pseudo ops:
@table @code
@item segm
@cindex segm
Generates code for the segmented Z8001.
+
@item unsegm
Generates code for the unsegmented Z8002.
+
@item name
Synonym for @code{.file}
+
@item global
Synonum for @code{.global}
+
@item wval
Synonym for .word
+
@item lval
Synonym for .long
+
@item bval
Synonym for .byte
+
@item sval
-Assemble a string.
-@code{sval} expects one string literal, delimited by single quotes. It assembles each byte of the string into consecutive addresses. Single quote
-and other non-representable characters may be descrbed by escaping them
-with a percent sign and their ascii value as a two digit hex number.
+Assemble a string. @code{sval} expects one string literal, delimited by
+single quotes. It assembles each byte of the string into consecutive
+addresses. You can use the escape sequence @samp{%@var{xx}} (where
+@var{xx} represents a two-digit hexadecimal number) to represent the
+character whose @sc{ascii} value is @var{xx}. Use this feature to
+describe single quote and other characters that may not appear in string
+literals as themselves. For example, the C statement @w{@samp{char *a =
+"he said \"it's 50% off\"";}} is represented in Z8000 assembly language
+as
+
+@smallexample
+sval 'he said %22it%27s 50%25 off%22%00'
+@end smallexample
-@example
-char *a = "he said \"it's 50% off\"";
-
-0000 68652073 sval 'he said %22it%27s 50%25 off%22%00'
- 61696420
- 22697427
- 73203530
- 25206F66
- 662200
-
-@end example
@item rsect
synonym for @code{.section}
+
@item block
synonym for @code{.space}
+
@item even
synonym for @code{.align 1}
@end table
The following table summarizes the opcodes and their arguments:
-@c kluge due to lack of group outside example
-@page
+@iftex
+@begingroup
+@let@nonarrowing=@comment
+@end iftex
@smallexample
-@group
rs @r{16 bit source register}
rd @r{16 bit destination register}
@@ -4751,152 +4769,150 @@ The following table summarizes the opcodes and their arguments:
addr @r{16/24 bit address}
imm @r{immediate data}
-adc rd,rs clrb addr cpsir @@rd,@@rs,rr,cc
-adcb rbd,rbs clrb addr(rd) cpsirb @@rd,@@rs,rr,cc
-add rd,@@rs clrb rbd dab rbd
-add rd,addr com @@rd dbjnz rbd,disp7
-add rd,addr(rs) com addr dec @@rd,imm4m1
-add rd,imm16 com addr(rd) dec addr(rd),imm4m1
-add rd,rs com rd dec addr,imm4m1
-addb rbd,@@rs comb @@rd dec rd,imm4m1
-addb rbd,addr comb addr decb @@rd,imm4m1
-addb rbd,addr(rs) comb addr(rd) decb addr(rd),imm4m1
-addb rbd,imm8 comb rbd decb addr,imm4m1
-addb rbd,rbs comflg flags decb rbd,imm4m1
-addl rrd,@@rs cp @@rd,imm16 di i2
-addl rrd,addr cp addr(rd),imm16 div rrd,@@rs
-addl rrd,addr(rs) cp addr,imm16 div rrd,addr
-addl rrd,imm32 cp rd,@@rs div rrd,addr(rs)
-addl rrd,rrs cp rd,addr div rrd,imm16
-and rd,@@rs cp rd,addr(rs) div rrd,rs
-and rd,addr cp rd,imm16 divl rqd,@@rs
-and rd,addr(rs) cp rd,rs divl rqd,addr
-and rd,imm16 cpb @@rd,imm8 divl rqd,addr(rs)
-and rd,rs cpb addr(rd),imm8 divl rqd,imm32
-andb rbd,@@rs cpb addr,imm8 divl rqd,rrs
-andb rbd,addr cpb rbd,@@rs djnz rd,disp7
-andb rbd,addr(rs) cpb rbd,addr ei i2
-andb rbd,imm8 cpb rbd,addr(rs) ex rd,@@rs
-andb rbd,rbs cpb rbd,imm8 ex rd,addr
-bit @@rd,imm4 cpb rbd,rbs ex rd,addr(rs)
-bit addr(rd),imm4 cpd rd,@@rs,rr,cc ex rd,rs
-bit addr,imm4 cpdb rbd,@@rs,rr,cc exb rbd,@@rs
-bit rd,imm4 cpdr rd,@@rs,rr,cc exb rbd,addr
-bit rd,rs cpdrb rbd,@@rs,rr,cc exb rbd,addr(rs)
-bitb @@rd,imm4 cpi rd,@@rs,rr,cc exb rbd,rbs
-bitb addr(rd),imm4 cpib rbd,@@rs,rr,cc ext0e imm8
-bitb addr,imm4 cpir rd,@@rs,rr,cc ext0f imm8
-bitb rbd,imm4 cpirb rbd,@@rs,rr,cc ext8e imm8
-bitb rbd,rs cpl rrd,@@rs ext8f imm8
-bpt cpl rrd,addr exts rrd
-call @@rd cpl rrd,addr(rs) extsb rd
-call addr cpl rrd,imm32 extsl rqd
-call addr(rd) cpl rrd,rrs halt
-calr disp12 cpsd @@rd,@@rs,rr,cc in rd,@@rs
-clr @@rd cpsdb @@rd,@@rs,rr,cc in rd,imm16
-clr addr cpsdr @@rd,@@rs,rr,cc inb rbd,@@rs
-clr addr(rd) cpsdrb @@rd,@@rs,rr,cc inb rbd,imm16
-clr rd cpsi @@rd,@@rs,rr,cc inc @@rd,imm4m1
-clrb @@rd cpsib @@rd,@@rs,rr,cc inc addr(rd),imm4m1
-@end group
-@group
-inc addr,imm4m1 ldb rbd,rs(rx) mult rrd,addr(rs)
-inc rd,imm4m1 ldb rd(imm16),rbs mult rrd,imm16
-incb @@rd,imm4m1 ldb rd(rx),rbs mult rrd,rs
-incb addr(rd),imm4m1 ldctl ctrl,rs multl rqd,@@rs
-incb addr,imm4m1 ldctl rd,ctrl multl rqd,addr
-incb rbd,imm4m1 ldd @@rs,@@rd,rr multl rqd,addr(rs)
-ind @@rd,@@rs,ra lddb @@rs,@@rd,rr multl rqd,imm32
-indb @@rd,@@rs,rba lddr @@rs,@@rd,rr multl rqd,rrs
-inib @@rd,@@rs,ra lddrb @@rs,@@rd,rr neg @@rd
-inibr @@rd,@@rs,ra ldi @@rd,@@rs,rr neg addr
-iret ldib @@rd,@@rs,rr neg addr(rd)
-jp cc,@@rd ldir @@rd,@@rs,rr neg rd
-jp cc,addr ldirb @@rd,@@rs,rr negb @@rd
-jp cc,addr(rd) ldk rd,imm4 negb addr
-jr cc,disp8 ldl @@rd,rrs negb addr(rd)
-ld @@rd,imm16 ldl addr(rd),rrs negb rbd
-ld @@rd,rs ldl addr,rrs nop
-ld addr(rd),imm16 ldl rd(imm16),rrs or rd,@@rs
-ld addr(rd),rs ldl rd(rx),rrs or rd,addr
-ld addr,imm16 ldl rrd,@@rs or rd,addr(rs)
-ld addr,rs ldl rrd,addr or rd,imm16
-ld rd(imm16),rs ldl rrd,addr(rs) or rd,rs
-ld rd(rx),rs ldl rrd,imm32 orb rbd,@@rs
-ld rd,@@rs ldl rrd,rrs orb rbd,addr
-ld rd,addr ldl rrd,rs(imm16) orb rbd,addr(rs)
-ld rd,addr(rs) ldl rrd,rs(rx) orb rbd,imm8
-ld rd,imm16 ldm @@rd,rs,n orb rbd,rbs
-ld rd,rs ldm addr(rd),rs,n out @@rd,rs
-ld rd,rs(imm16) ldm addr,rs,n out imm16,rs
-ld rd,rs(rx) ldm rd,@@rs,n outb @@rd,rbs
-lda rd,addr ldm rd,addr(rs),n outb imm16,rbs
-lda rd,addr(rs) ldm rd,addr,n outd @@rd,@@rs,ra
-lda rd,rs(imm16) ldps @@rs outdb @@rd,@@rs,rba
-lda rd,rs(rx) ldps addr outib @@rd,@@rs,ra
-ldar rd,disp16 ldps addr(rs) outibr @@rd,@@rs,ra
-ldb @@rd,imm8 ldr disp16,rs pop @@rd,@@rs
-ldb @@rd,rbs ldr rd,disp16 pop addr(rd),@@rs
-ldb addr(rd),imm8 ldrb disp16,rbs pop addr,@@rs
-ldb addr(rd),rbs ldrb rbd,disp16 pop rd,@@rs
-ldb addr,imm8 ldrl disp16,rrs popl @@rd,@@rs
-ldb addr,rbs ldrl rrd,disp16 popl addr(rd),@@rs
-ldb rbd,@@rs mbit popl addr,@@rs
-ldb rbd,addr mreq rd popl rrd,@@rs
-ldb rbd,addr(rs) mres push @@rd,@@rs
-ldb rbd,imm8 mset push @@rd,addr
-ldb rbd,rbs mult rrd,@@rs push @@rd,addr(rs)
-ldb rbd,rs(imm16) mult rrd,addr push @@rd,imm16
-@end group
-@group
-push @@rd,rs set addr,imm4 subl rrd,imm32
-pushl @@rd,@@rs set rd,imm4 subl rrd,rrs
-pushl @@rd,addr set rd,rs tcc cc,rd
-pushl @@rd,addr(rs) setb @@rd,imm4 tccb cc,rbd
-pushl @@rd,rrs setb addr(rd),imm4 test @@rd
-res @@rd,imm4 setb addr,imm4 test addr
-res addr(rd),imm4 setb rbd,imm4 test addr(rd)
-res addr,imm4 setb rbd,rs test rd
-res rd,imm4 setflg imm4 testb @@rd
-res rd,rs sinb rbd,imm16 testb addr
-resb @@rd,imm4 sinb rd,imm16 testb addr(rd)
-resb addr(rd),imm4 sind @@rd,@@rs,ra testb rbd
-resb addr,imm4 sindb @@rd,@@rs,rba testl @@rd
-resb rbd,imm4 sinib @@rd,@@rs,ra testl addr
-resb rbd,rs sinibr @@rd,@@rs,ra testl addr(rd)
-resflg imm4 sla rd,imm8 testl rrd
-ret cc slab rbd,imm8 trdb @@rd,@@rs,rba
-rl rd,imm1or2 slal rrd,imm8 trdrb @@rd,@@rs,rba
-rlb rbd,imm1or2 sll rd,imm8 trib @@rd,@@rs,rbr
-rlc rd,imm1or2 sllb rbd,imm8 trirb @@rd,@@rs,rbr
-rlcb rbd,imm1or2 slll rrd,imm8 trtdrb @@ra,@@rb,rbr
-rldb rbb,rba sout imm16,rs trtib @@ra,@@rb,rr
-rr rd,imm1or2 soutb imm16,rbs trtirb @@ra,@@rb,rbr
-rrb rbd,imm1or2 soutd @@rd,@@rs,ra trtrb @@ra,@@rb,rbr
-rrc rd,imm1or2 soutdb @@rd,@@rs,rba tset @@rd
-rrcb rbd,imm1or2 soutib @@rd,@@rs,ra tset addr
-rrdb rbb,rba soutibr @@rd,@@rs,ra tset addr(rd)
-rsvd36 sra rd,imm8 tset rd
-rsvd38 srab rbd,imm8 tsetb @@rd
-rsvd78 sral rrd,imm8 tsetb addr
-rsvd7e srl rd,imm8 tsetb addr(rd)
-rsvd9d srlb rbd,imm8 tsetb rbd
-rsvd9f srll rrd,imm8 xor rd,@@rs
-rsvdb9 sub rd,@@rs xor rd,addr
-rsvdbf sub rd,addr xor rd,addr(rs)
-sbc rd,rs sub rd,addr(rs) xor rd,imm16
-sbcb rbd,rbs sub rd,imm16 xor rd,rs
-sc imm8 sub rd,rs xorb rbd,@@rs
-sda rd,rs subb rbd,@@rs xorb rbd,addr
-sdab rbd,rs subb rbd,addr xorb rbd,addr(rs)
-sdal rrd,rs subb rbd,addr(rs) xorb rbd,imm8
-sdl rd,rs subb rbd,imm8 xorb rbd,rbs
-sdlb rbd,rs subb rbd,rbs xorb rbd,rbs
-sdll rrd,rs subl rrd,@@rs
-set @@rd,imm4 subl rrd,addr
-set addr(rd),imm4 subl rrd,addr(rs)
-@end group
+adc rd,rs clrb addr cpsir @@rd,@@rs,rr,cc
+adcb rbd,rbs clrb addr(rd) cpsirb @@rd,@@rs,rr,cc
+add rd,@@rs clrb rbd dab rbd
+add rd,addr com @@rd dbjnz rbd,disp7
+add rd,addr(rs) com addr dec @@rd,imm4m1
+add rd,imm16 com addr(rd) dec addr(rd),imm4m1
+add rd,rs com rd dec addr,imm4m1
+addb rbd,@@rs comb @@rd dec rd,imm4m1
+addb rbd,addr comb addr decb @@rd,imm4m1
+addb rbd,addr(rs) comb addr(rd) decb addr(rd),imm4m1
+addb rbd,imm8 comb rbd decb addr,imm4m1
+addb rbd,rbs comflg flags decb rbd,imm4m1
+addl rrd,@@rs cp @@rd,imm16 di i2
+addl rrd,addr cp addr(rd),imm16 div rrd,@@rs
+addl rrd,addr(rs) cp addr,imm16 div rrd,addr
+addl rrd,imm32 cp rd,@@rs div rrd,addr(rs)
+addl rrd,rrs cp rd,addr div rrd,imm16
+and rd,@@rs cp rd,addr(rs) div rrd,rs
+and rd,addr cp rd,imm16 divl rqd,@@rs
+and rd,addr(rs) cp rd,rs divl rqd,addr
+and rd,imm16 cpb @@rd,imm8 divl rqd,addr(rs)
+and rd,rs cpb addr(rd),imm8 divl rqd,imm32
+andb rbd,@@rs cpb addr,imm8 divl rqd,rrs
+andb rbd,addr cpb rbd,@@rs djnz rd,disp7
+andb rbd,addr(rs) cpb rbd,addr ei i2
+andb rbd,imm8 cpb rbd,addr(rs) ex rd,@@rs
+andb rbd,rbs cpb rbd,imm8 ex rd,addr
+bit @@rd,imm4 cpb rbd,rbs ex rd,addr(rs)
+bit addr(rd),imm4 cpd rd,@@rs,rr,cc ex rd,rs
+bit addr,imm4 cpdb rbd,@@rs,rr,cc exb rbd,@@rs
+bit rd,imm4 cpdr rd,@@rs,rr,cc exb rbd,addr
+bit rd,rs cpdrb rbd,@@rs,rr,cc exb rbd,addr(rs)
+bitb @@rd,imm4 cpi rd,@@rs,rr,cc exb rbd,rbs
+bitb addr(rd),imm4 cpib rbd,@@rs,rr,cc ext0e imm8
+bitb addr,imm4 cpir rd,@@rs,rr,cc ext0f imm8
+bitb rbd,imm4 cpirb rbd,@@rs,rr,cc ext8e imm8
+bitb rbd,rs cpl rrd,@@rs ext8f imm8
+bpt cpl rrd,addr exts rrd
+call @@rd cpl rrd,addr(rs) extsb rd
+call addr cpl rrd,imm32 extsl rqd
+call addr(rd) cpl rrd,rrs halt
+calr disp12 cpsd @@rd,@@rs,rr,cc in rd,@@rs
+clr @@rd cpsdb @@rd,@@rs,rr,cc in rd,imm16
+clr addr cpsdr @@rd,@@rs,rr,cc inb rbd,@@rs
+clr addr(rd) cpsdrb @@rd,@@rs,rr,cc inb rbd,imm16
+clr rd cpsi @@rd,@@rs,rr,cc inc @@rd,imm4m1
+clrb @@rd cpsib @@rd,@@rs,rr,cc inc addr(rd),imm4m1
+inc addr,imm4m1 ldb rbd,rs(rx) mult rrd,addr(rs)
+inc rd,imm4m1 ldb rd(imm16),rbs mult rrd,imm16
+incb @@rd,imm4m1 ldb rd(rx),rbs mult rrd,rs
+incb addr(rd),imm4m1 ldctl ctrl,rs multl rqd,@@rs
+incb addr,imm4m1 ldctl rd,ctrl multl rqd,addr
+incb rbd,imm4m1 ldd @@rs,@@rd,rr multl rqd,addr(rs)
+ind @@rd,@@rs,ra lddb @@rs,@@rd,rr multl rqd,imm32
+indb @@rd,@@rs,rba lddr @@rs,@@rd,rr multl rqd,rrs
+inib @@rd,@@rs,ra lddrb @@rs,@@rd,rr neg @@rd
+inibr @@rd,@@rs,ra ldi @@rd,@@rs,rr neg addr
+iret ldib @@rd,@@rs,rr neg addr(rd)
+jp cc,@@rd ldir @@rd,@@rs,rr neg rd
+jp cc,addr ldirb @@rd,@@rs,rr negb @@rd
+jp cc,addr(rd) ldk rd,imm4 negb addr
+jr cc,disp8 ldl @@rd,rrs negb addr(rd)
+ld @@rd,imm16 ldl addr(rd),rrs negb rbd
+ld @@rd,rs ldl addr,rrs nop
+ld addr(rd),imm16 ldl rd(imm16),rrs or rd,@@rs
+ld addr(rd),rs ldl rd(rx),rrs or rd,addr
+ld addr,imm16 ldl rrd,@@rs or rd,addr(rs)
+ld addr,rs ldl rrd,addr or rd,imm16
+ld rd(imm16),rs ldl rrd,addr(rs) or rd,rs
+ld rd(rx),rs ldl rrd,imm32 orb rbd,@@rs
+ld rd,@@rs ldl rrd,rrs orb rbd,addr
+ld rd,addr ldl rrd,rs(imm16) orb rbd,addr(rs)
+ld rd,addr(rs) ldl rrd,rs(rx) orb rbd,imm8
+ld rd,imm16 ldm @@rd,rs,n orb rbd,rbs
+ld rd,rs ldm addr(rd),rs,n out @@rd,rs
+ld rd,rs(imm16) ldm addr,rs,n out imm16,rs
+ld rd,rs(rx) ldm rd,@@rs,n outb @@rd,rbs
+lda rd,addr ldm rd,addr(rs),n outb imm16,rbs
+lda rd,addr(rs) ldm rd,addr,n outd @@rd,@@rs,ra
+lda rd,rs(imm16) ldps @@rs outdb @@rd,@@rs,rba
+lda rd,rs(rx) ldps addr outib @@rd,@@rs,ra
+ldar rd,disp16 ldps addr(rs) outibr @@rd,@@rs,ra
+ldb @@rd,imm8 ldr disp16,rs pop @@rd,@@rs
+ldb @@rd,rbs ldr rd,disp16 pop addr(rd),@@rs
+ldb addr(rd),imm8 ldrb disp16,rbs pop addr,@@rs
+ldb addr(rd),rbs ldrb rbd,disp16 pop rd,@@rs
+ldb addr,imm8 ldrl disp16,rrs popl @@rd,@@rs
+ldb addr,rbs ldrl rrd,disp16 popl addr(rd),@@rs
+ldb rbd,@@rs mbit popl addr,@@rs
+ldb rbd,addr mreq rd popl rrd,@@rs
+ldb rbd,addr(rs) mres push @@rd,@@rs
+ldb rbd,imm8 mset push @@rd,addr
+ldb rbd,rbs mult rrd,@@rs push @@rd,addr(rs)
+ldb rbd,rs(imm16) mult rrd,addr push @@rd,imm16
+push @@rd,rs set addr,imm4 subl rrd,imm32
+pushl @@rd,@@rs set rd,imm4 subl rrd,rrs
+pushl @@rd,addr set rd,rs tcc cc,rd
+pushl @@rd,addr(rs) setb @@rd,imm4 tccb cc,rbd
+pushl @@rd,rrs setb addr(rd),imm4 test @@rd
+res @@rd,imm4 setb addr,imm4 test addr
+res addr(rd),imm4 setb rbd,imm4 test addr(rd)
+res addr,imm4 setb rbd,rs test rd
+res rd,imm4 setflg imm4 testb @@rd
+res rd,rs sinb rbd,imm16 testb addr
+resb @@rd,imm4 sinb rd,imm16 testb addr(rd)
+resb addr(rd),imm4 sind @@rd,@@rs,ra testb rbd
+resb addr,imm4 sindb @@rd,@@rs,rba testl @@rd
+resb rbd,imm4 sinib @@rd,@@rs,ra testl addr
+resb rbd,rs sinibr @@rd,@@rs,ra testl addr(rd)
+resflg imm4 sla rd,imm8 testl rrd
+ret cc slab rbd,imm8 trdb @@rd,@@rs,rba
+rl rd,imm1or2 slal rrd,imm8 trdrb @@rd,@@rs,rba
+rlb rbd,imm1or2 sll rd,imm8 trib @@rd,@@rs,rbr
+rlc rd,imm1or2 sllb rbd,imm8 trirb @@rd,@@rs,rbr
+rlcb rbd,imm1or2 slll rrd,imm8 trtdrb @@ra,@@rb,rbr
+rldb rbb,rba sout imm16,rs trtib @@ra,@@rb,rr
+rr rd,imm1or2 soutb imm16,rbs trtirb @@ra,@@rb,rbr
+rrb rbd,imm1or2 soutd @@rd,@@rs,ra trtrb @@ra,@@rb,rbr
+rrc rd,imm1or2 soutdb @@rd,@@rs,rba tset @@rd
+rrcb rbd,imm1or2 soutib @@rd,@@rs,ra tset addr
+rrdb rbb,rba soutibr @@rd,@@rs,ra tset addr(rd)
+rsvd36 sra rd,imm8 tset rd
+rsvd38 srab rbd,imm8 tsetb @@rd
+rsvd78 sral rrd,imm8 tsetb addr
+rsvd7e srl rd,imm8 tsetb addr(rd)
+rsvd9d srlb rbd,imm8 tsetb rbd
+rsvd9f srll rrd,imm8 xor rd,@@rs
+rsvdb9 sub rd,@@rs xor rd,addr
+rsvdbf sub rd,addr xor rd,addr(rs)
+sbc rd,rs sub rd,addr(rs) xor rd,imm16
+sbcb rbd,rbs sub rd,imm16 xor rd,rs
+sc imm8 sub rd,rs xorb rbd,@@rs
+sda rd,rs subb rbd,@@rs xorb rbd,addr
+sdab rbd,rs subb rbd,addr xorb rbd,addr(rs)
+sdal rrd,rs subb rbd,addr(rs) xorb rbd,imm8
+sdl rd,rs subb rbd,imm8 xorb rbd,rbs
+sdlb rbd,rs subb rbd,rbs xorb rbd,rbs
+sdll rrd,rs subl rrd,@@rs
+set @@rd,imm4 subl rrd,addr
+set addr(rd),imm4 subl rrd,addr(rs)
@end smallexample
+@iftex
+@endgroup
+@end iftex
@node Copying
diff --git a/gas/doc/as.texinfo b/gas/doc/as.texinfo
index 3f89df2..6bd7b74 100644
--- a/gas/doc/as.texinfo
+++ b/gas/doc/as.texinfo
@@ -19,7 +19,7 @@ _fi__(!_GENERIC__)
@ifinfo
@format
START-INFO-DIR-ENTRY
-* As: (as). The GNU assembler.
+* As: (as). The GNU assembler.
END-INFO-DIR-ENTRY
@end format
@end ifinfo
@@ -45,7 +45,7 @@ _fi__(0)
@ifinfo
This file documents the GNU Assembler "_AS__".
-Copyright (C) 1991 Free Software Foundation, Inc.
+Copyright (C) 1991, 1992 Free Software Foundation, Inc.
Permission is granted to make and distribute verbatim copies of
this manual provided the copyright notice and this permission notice
@@ -109,7 +109,7 @@ done.
@end tex
@vskip 0pt plus 1filll
-Copyright @copyright{} 1991 Free Software Foundation, Inc.
+Copyright @copyright{} 1991, 1992 Free Software Foundation, Inc.
Permission is granted to make and distribute verbatim copies of
this manual provided the copyright notice and this permission notice
@@ -139,15 +139,15 @@ This version of the file describes @code{_AS__} configured to generate
code for _HOST__ architectures.
_fi__(!_GENERIC__)
@menu
-* Overview:: Overview
-* Invoking:: Command-Line Options
-* Syntax:: Syntax
-* Sections:: Sections and Relocation
-* Symbols:: Symbols
-* Expressions:: Expressions
-* Pseudo Ops:: Assembler Directives
-* _MACH_DEP__:: Machine Dependent Features
-* Copying:: GNU GENERAL PUBLIC LICENSE
+* Overview:: Overview
+* Invoking:: Command-Line Options
+* Syntax:: Syntax
+* Sections:: Sections and Relocation
+* Symbols:: Symbols
+* Expressions:: Expressions
+* Pseudo Ops:: Assembler Directives
+* _MACH_DEP__:: Machine Dependent Features
+* Copying:: GNU GENERAL PUBLIC LICENSE
* Index:: Index
@end menu
@end ifinfo
@@ -272,13 +272,13 @@ Standard input, or source files to assemble
@end table
@menu
-* Manual:: Structure of this Manual
-* GNU Assembler:: _AS__, the GNU Assembler
-* Object Formats:: Object File Formats
-* Command Line:: Command Line
-* Input Files:: Input Files
-* Object:: Output (Object) File
-* Errors:: Error and Warning Messages
+* Manual:: Structure of this Manual
+* GNU Assembler:: _AS__, the GNU Assembler
+* Object Formats:: Object File Formats
+* Command Line:: Command Line
+* Input Files:: Input Files
+* Object:: Output (Object) File
+* Errors:: Error and Warning Messages
@end menu
@node Manual
@@ -753,12 +753,12 @@ assembler, except that @code{_AS__} does not assemble Vax bit-fields.
_fi__(_VAX__)
@menu
-* Pre-processing:: Pre-processing
-* Whitespace:: Whitespace
-* Comments:: Comments
-* Symbol Intro:: Symbols
-* Statements:: Statements
-* Constants:: Constants
+* Pre-processing:: Pre-processing
+* Whitespace:: Whitespace
+* Comments:: Comments
+* Symbol Intro:: Symbols
+* Statements:: Statements
+* Constants:: Constants
@end menu
@node Pre-processing
@@ -847,9 +847,9 @@ _if__(_H8__)
@samp{;} for the _HOST__ family;
_fi__(_H8__)
_if__(_Z8000__)
-@samp{!} for the Z8000.
+@samp{!} for the Z8000;
_fi__(_Z8000__)
-@pxref{_MACH_DEP__}. @refill
+see @ref{_MACH_DEP__}. @refill
@c FIXME: fill in SPARC line comment char
_if__(_GENERIC__)
@@ -999,8 +999,8 @@ inspection, without knowing any context. Like this:
@end smallexample
@menu
-* Characters:: Character Constants
-* Numbers:: Number Constants
+* Characters:: Character Constants
+* Numbers:: Number Constants
@end menu
@node Characters
@@ -1015,8 +1015,8 @@ numeric expressions. String constants (properly called string
used in arithmetic expressions.
@menu
-* Strings:: Strings
-* Chars:: Characters
+* Strings:: Strings
+* Chars:: Characters
@end menu
@node Strings
@@ -1036,16 +1036,16 @@ escape character). The complete list of escapes follows.
@cindex escape codes, character
@cindex character escape codes
@table @kbd
-@c @item \a
-@c Mnemonic for ACKnowledge; for ASCII this is octal code 007.
+@c @item \a
+@c Mnemonic for ACKnowledge; for ASCII this is octal code 007.
@c
@item \b
@cindex @code{\b} (backspace character)
@cindex backspace (@code{\b})
Mnemonic for backspace; for ASCII this is octal code 010.
-@c @item \e
-@c Mnemonic for EOText; for ASCII this is octal code 004.
+@c @item \e
+@c Mnemonic for EOText; for ASCII this is octal code 004.
@c
@item \f
@cindex @code{\f} (formfeed character)
@@ -1057,27 +1057,27 @@ Mnemonic for FormFeed; for ASCII this is octal code 014.
@cindex newline (@code{\n})
Mnemonic for newline; for ASCII this is octal code 012.
-@c @item \p
-@c Mnemonic for prefix; for ASCII this is octal code 033, usually known as @code{escape}.
+@c @item \p
+@c Mnemonic for prefix; for ASCII this is octal code 033, usually known as @code{escape}.
@c
@item \r
@cindex @code{\r} (carriage return character)
@cindex carriage return (@code{\r})
Mnemonic for carriage-Return; for ASCII this is octal code 015.
-@c @item \s
-@c Mnemonic for space; for ASCII this is octal code 040. Included for compliance with
-@c other assemblers.
+@c @item \s
+@c Mnemonic for space; for ASCII this is octal code 040. Included for compliance with
+@c other assemblers.
@c
@item \t
@cindex @code{\t} (tab)
@cindex tab (@code{\t})
Mnemonic for horizontal Tab; for ASCII this is octal code 011.
-@c @item \v
-@c Mnemonic for Vertical tab; for ASCII this is octal code 013.
-@c @item \x @var{digit} @var{digit} @var{digit}
-@c A hexadecimal character code. The numeric code is 3 hexadecimal digits.
+@c @item \v
+@c Mnemonic for Vertical tab; for ASCII this is octal code 013.
+@c @item \x @var{digit} @var{digit} @var{digit}
+@c A hexadecimal character code. The numeric code is 3 hexadecimal digits.
@c
@item \ @var{digit} @var{digit} @var{digit}
@cindex @code{\@var{ddd}} (octal character code)
@@ -1091,11 +1091,11 @@ for example, @code{\008} has the value 010, and @code{\009} the value 011.
@cindex backslash (@code{\\})
Represents one @samp{\} character.
-@c @item \'
-@c Represents one @samp{'} (accent acute) character.
-@c This is needed in single character literals
+@c @item \'
+@c Represents one @samp{'} (accent acute) character.
+@c This is needed in single character literals
@c (@xref{Characters,,Character Constants}.) to represent
-@c a @samp{'}.
+@c a @samp{'}.
@c
@item \"
@cindex @code{\"} (doublequote character)
@@ -1159,11 +1159,11 @@ integers, but they are stored in more than 32 bits. @emph{Flonums}
are floating point numbers, described below.
@menu
-* Integers:: Integers
-* Bignums:: Bignums
-* Flonums:: Flonums
+* Integers:: Integers
+* Bignums:: Bignums
+* Flonums:: Flonums
_if__(_I960__&&!_GENERIC__)
-* Bit Fields:: Bit Fields
+* Bit Fields:: Bit Fields
_fi__(_I960__&&!_GENERIC__)
@end menu
@@ -1314,11 +1314,11 @@ _fi__(_I960__&&!_GENERIC__)
@cindex relocation
@menu
-* Secs Background:: Background
-* _LD__ Sections:: _LD__ Sections
-* _AS__ Sections:: _AS__ Internal Sections
-* Sub-Sections:: Sub-Sections
-* bss:: bss Section
+* Secs Background:: Background
+* _LD__ Sections:: _LD__ Sections
+* _AS__ Sections:: _AS__ Internal Sections
+* Sub-Sections:: Sub-Sections
+* bss:: bss Section
@end menu
@node Secs Background
@@ -1743,11 +1743,11 @@ the same order they were declared. This may break some debuggers.
@end quotation
@menu
-* Labels:: Labels
-* Setting Symbols:: Giving Symbols Other Values
-* Symbol Names:: Symbol Names
-* Dot:: The Special Dot Symbol
-* Symbol Attributes:: Symbol Attributes
+* Labels:: Labels
+* Setting Symbols:: Giving Symbols Other Values
+* Symbol Names:: Symbol Names
+* Dot:: The Special Dot Symbol
+* Symbol Attributes:: Symbol Attributes
@end menu
@node Labels
@@ -1904,18 +1904,18 @@ symbol an externally defined symbol, which is generally what you
would want.
@menu
-* Symbol Value:: Value
-* Symbol Type:: Type
+* Symbol Value:: Value
+* Symbol Type:: Type
_if__(_AOUT__||_BOUT__)
_if__(_GENERIC__||!_BOUT__)
-* a.out Symbols:: Symbol Attributes: @code{a.out}
+* a.out Symbols:: Symbol Attributes: @code{a.out}
_fi__(_GENERIC__||!_BOUT__)
_if__(_BOUT__&&!_GENERIC__)
-* a.out Symbols:: Symbol Attributes: @code{a.out}, @code{b.out}
+* a.out Symbols:: Symbol Attributes: @code{a.out}, @code{b.out}
_fi__(_BOUT__&&!_GENERIC__)
_fi__(_AOUT__||_BOUT__)
_if__(_COFF__)
-* COFF Symbols:: Symbol Attributes for COFF
+* COFF Symbols:: Symbol Attributes for COFF
_fi__(_COFF__)
@end menu
@@ -1969,8 +1969,8 @@ _fi__(_GENERIC__||!_BOUT__)
@cindex symbol attributes, @code{a.out}
@menu
-* Symbol Desc:: Descriptor
-* Symbol Other:: Other
+* Symbol Desc:: Descriptor
+* Symbol Other:: Other
@end menu
@node Symbol Desc
@@ -2024,8 +2024,8 @@ An @dfn{expression} specifies an address or numeric value.
Whitespace may precede and/or follow an expression.
@menu
-* Empty Exprs:: Empty Expressions
-* Integer Exprs:: Integer Expressions
+* Empty Exprs:: Empty Expressions
+* Integer Exprs:: Integer Expressions
@end menu
@node Empty Exprs
@@ -2047,10 +2047,10 @@ An @dfn{integer expression} is one or more @emph{arguments} delimited
by @emph{operators}.
@menu
-* Arguments:: Arguments
-* Operators:: Operators
-* Prefix Ops:: Prefix Operators
-* Infix Ops:: Infix Operators
+* Arguments:: Arguments
+* Operators:: Operators
+* Prefix Ops:: Prefix Operators
+* Infix Ops:: Infix Operators
@end menu
@node Arguments
@@ -2224,93 +2224,93 @@ _if__(!_H8__)
_fi__(!_H8__)
@menu
-* Abort:: @code{.abort}
+* Abort:: @code{.abort}
_if__(_COFF__)
-* coff-ABORT:: @code{.ABORT}
+* coff-ABORT:: @code{.ABORT}
_fi__(_COFF__)
_if__(_BOUT__&&!_COFF__)
-* bout-ABORT:: @code{.ABORT}
+* bout-ABORT:: @code{.ABORT}
_fi__(_BOUT__&&!_COFF__)
-* Align:: @code{.align @var{abs-expr} , @var{abs-expr}}
-* App-File:: @code{.app-file @var{string}}
-* Ascii:: @code{.ascii "@var{string}"}@dots{}
-* Asciz:: @code{.asciz "@var{string}"}@dots{}
-* Byte:: @code{.byte @var{expressions}}
-* Comm:: @code{.comm @var{symbol} , @var{length} }
-* Data:: @code{.data @var{subsection}}
+* Align:: @code{.align @var{abs-expr} , @var{abs-expr}}
+* App-File:: @code{.app-file @var{string}}
+* Ascii:: @code{.ascii "@var{string}"}@dots{}
+* Asciz:: @code{.asciz "@var{string}"}@dots{}
+* Byte:: @code{.byte @var{expressions}}
+* Comm:: @code{.comm @var{symbol} , @var{length} }
+* Data:: @code{.data @var{subsection}}
_if__(_COFF__||_BOUT__)
-* Def:: @code{.def @var{name}}
+* Def:: @code{.def @var{name}}
_fi__(_COFF__||_BOUT__)
_if__(_AOUT__||_BOUT__)
-* Desc:: @code{.desc @var{symbol}, @var{abs-expression}}
+* Desc:: @code{.desc @var{symbol}, @var{abs-expression}}
_fi__(_AOUT__||_BOUT__)
_if__(_COFF__||_BOUT__)
-* Dim:: @code{.dim}
+* Dim:: @code{.dim}
_fi__(_COFF__||_BOUT__)
-* Double:: @code{.double @var{flonums}}
-* Eject:: @code{.eject}
-* Else:: @code{.else}
+* Double:: @code{.double @var{flonums}}
+* Eject:: @code{.eject}
+* Else:: @code{.else}
_if__(_COFF__||_BOUT__)
-* Endef:: @code{.endef}
+* Endef:: @code{.endef}
_fi__(_COFF__||_BOUT__)
-* Endif:: @code{.endif}
-* Equ:: @code{.equ @var{symbol}, @var{expression}}
-* Extern:: @code{.extern}
+* Endif:: @code{.endif}
+* Equ:: @code{.equ @var{symbol}, @var{expression}}
+* Extern:: @code{.extern}
_if__(_GENERIC__||!_A29K__)
-* File:: @code{.file @var{string}}
+* File:: @code{.file @var{string}}
_fi__(_GENERIC__||!_A29K__)
-* Fill:: @code{.fill @var{repeat} , @var{size} , @var{value}}
-* Float:: @code{.float @var{flonums}}
-* Global:: @code{.global @var{symbol}}, @code{.globl @var{symbol}}
-* hword:: @code{.hword @var{expressions}}
-* Ident:: @code{.ident}
-* If:: @code{.if @var{absolute expression}}
-* Include:: @code{.include "@var{file}"}
-* Int:: @code{.int @var{expressions}}
-* Lcomm:: @code{.lcomm @var{symbol} , @var{length}}
+* Fill:: @code{.fill @var{repeat} , @var{size} , @var{value}}
+* Float:: @code{.float @var{flonums}}
+* Global:: @code{.global @var{symbol}}, @code{.globl @var{symbol}}
+* hword:: @code{.hword @var{expressions}}
+* Ident:: @code{.ident}
+* If:: @code{.if @var{absolute expression}}
+* Include:: @code{.include "@var{file}"}
+* Int:: @code{.int @var{expressions}}
+* Lcomm:: @code{.lcomm @var{symbol} , @var{length}}
* Lflags:: @code{.lflags}
_if__(_GENERIC__||!_A29K__)
-* Line:: @code{.line @var{line-number}}
+* Line:: @code{.line @var{line-number}}
_fi__(_GENERIC__||!_A29K__)
-* Ln:: @code{.ln @var{line-number}}
-* List:: @code{.list}
-* Long:: @code{.long @var{expressions}}
+* Ln:: @code{.ln @var{line-number}}
+* List:: @code{.list}
+* Long:: @code{.long @var{expressions}}
_if__(0)
-* Lsym:: @code{.lsym @var{symbol}, @var{expression}}
+* Lsym:: @code{.lsym @var{symbol}, @var{expression}}
_fi__(0)
-* Nolist:: @code{.nolist}
-* Octa:: @code{.octa @var{bignums}}
-* Org:: @code{.org @var{new-lc} , @var{fill}}
+* Nolist:: @code{.nolist}
+* Octa:: @code{.octa @var{bignums}}
+* Org:: @code{.org @var{new-lc} , @var{fill}}
* Psize:: @code{.psize @var{lines}, @var{columns}}
-* Quad:: @code{.quad @var{bignums}}
-* Sbttl:: @code{.sbttl "@var{subheading}"}
+* Quad:: @code{.quad @var{bignums}}
+* Sbttl:: @code{.sbttl "@var{subheading}"}
_if__(_COFF__||_BOUT__)
-* Scl:: @code{.scl @var{class}}
+* Scl:: @code{.scl @var{class}}
_fi__(_COFF__||_BOUT__)
_if__(_COFF__)
* Section:: @code{.section @var{name}, @var{subsection}}
_fi__(_COFF__)
-* Set:: @code{.set @var{symbol}, @var{expression}}
-* Short:: @code{.short @var{expressions}}
-* Single:: @code{.single @var{flonums}}
+* Set:: @code{.set @var{symbol}, @var{expression}}
+* Short:: @code{.short @var{expressions}}
+* Single:: @code{.single @var{flonums}}
_if__(_COFF__||_BOUT__)
-* Size:: @code{.size}
+* Size:: @code{.size}
_fi__(_COFF__||_BOUT__)
-* Space:: @code{.space @var{size} , @var{fill}}
+* Space:: @code{.space @var{size} , @var{fill}}
_if__(_GENERIC__||!_H8__)
-* Stab:: @code{.stabd, .stabn, .stabs}
+* Stab:: @code{.stabd, .stabn, .stabs}
_fi__(_GENERIC__||!_H8__)
_if__(_COFF__||_BOUT__)
-* Tag:: @code{.tag @var{structname}}
+* Tag:: @code{.tag @var{structname}}
_fi__(_COFF__||_BOUT__)
-* Text:: @code{.text @var{subsection}}
-* Title:: @code{.title "@var{heading}"}
+* Text:: @code{.text @var{subsection}}
+* Title:: @code{.title "@var{heading}"}
_if__(_COFF__||_BOUT__)
-* Type:: @code{.type @var{int}}
-* Val:: @code{.val @var{addr}}
+* Type:: @code{.type @var{int}}
+* Val:: @code{.val @var{addr}}
_fi__(_COFF__||_BOUT__)
-* Word:: @code{.word @var{expressions}}
-* Deprecated:: Deprecated Directives
+* Word:: @code{.word @var{expressions}}
+* Deprecated:: Deprecated Directives
@end menu
@node Abort
@@ -3354,28 +3354,28 @@ subject, see the hardware manufacturer's manual.
@menu
_if__(_VAX__)
-* Vax-Dependent:: VAX Dependent Features
+* Vax-Dependent:: VAX Dependent Features
_fi__(_VAX__)
_if__(_A29K__)
-* AMD29K-Dependent:: AMD 29K Dependent Features
+* AMD29K-Dependent:: AMD 29K Dependent Features
_fi__(_A29K__)
_if__(_H8__)
-* H8/300-Dependent:: Hitachi H8/300 Dependent Features
+* H8/300-Dependent:: Hitachi H8/300 Dependent Features
_fi__(_H8__)
_if__(_I960__)
-* i960-Dependent:: Intel 80960 Dependent Features
+* i960-Dependent:: Intel 80960 Dependent Features
_fi__(_I960__)
_if__(_M680X0__)
-* M68K-Dependent:: M680x0 Dependent Features
+* M68K-Dependent:: M680x0 Dependent Features
_fi__(_M680X0__)
_if__(_SPARC__)
-* Sparc-Dependent:: SPARC Dependent Features
+* Sparc-Dependent:: SPARC Dependent Features
_fi__(_SPARC__)
_if__(_Z8000__)
-* Z8000-Dependent:: Z8000 Dependent Features
+* Z8000-Dependent:: Z8000 Dependent Features
_fi__(_Z8000__)
_if__(_I80386__)
-* i386-Dependent:: 80386 Dependent Features
+* i386-Dependent:: 80386 Dependent Features
_fi__(_I80386__)
@end menu
@@ -3388,13 +3388,13 @@ _CHAPSEC__(0+_GENERIC__) VAX Dependent Features
@cindex VAX support
@menu
-* Vax-Opts:: VAX Command-Line Options
-* VAX-float:: VAX Floating Point
-* VAX-directives:: Vax Machine Directives
-* VAX-opcodes:: VAX Opcodes
-* VAX-branch:: VAX Branch Improvement
-* VAX-operands:: VAX Operands
-* VAX-no:: Not Supported on VAX
+* Vax-Opts:: VAX Command-Line Options
+* VAX-float:: VAX Floating Point
+* VAX-directives:: Vax Machine Directives
+* VAX-opcodes:: VAX Opcodes
+* VAX-branch:: VAX Branch Improvement
+* VAX-operands:: VAX Operands
+* VAX-no:: Not Supported on VAX
@end menu
@node Vax-Opts
@@ -3704,11 +3704,11 @@ _CHAPSEC__(0+_GENERIC__) AMD 29K Dependent Features
@cindex AMD 29K support
@cindex 29K support
@menu
-* AMD29K Options:: Options
-* AMD29K Syntax:: Syntax
-* AMD29K Floating Point:: Floating Point
-* AMD29K Directives:: AMD 29K Machine Directives
-* AMD29K Opcodes:: Opcodes
+* AMD29K Options:: Options
+* AMD29K Syntax:: Syntax
+* AMD29K Floating Point:: Floating Point
+* AMD29K Directives:: AMD 29K Machine Directives
+* AMD29K Opcodes:: Opcodes
@end menu
@node AMD29K Options
@@ -3721,8 +3721,8 @@ _CHAPSEC__(1+_GENERIC__) Options
@node AMD29K Syntax
_CHAPSEC__(1+_GENERIC__) Syntax
@menu
-* AMD29K-Chars:: Special Characters
-* AMD29K-Regs:: Register Names
+* AMD29K-Chars:: Special Characters
+* AMD29K-Regs:: Register Names
@end menu
@node AMD29K-Chars
@@ -3875,11 +3875,11 @@ _CHAPSEC__(0+_GENERIC__) H8/300 Dependent Features
@cindex H8/300 support
@menu
-* H8/300 Options:: Options
-* H8/300 Syntax:: Syntax
-* H8/300 Floating Point:: Floating Point
-* H8/300 Directives:: H8/300 Machine Directives
-* H8/300 Opcodes:: Opcodes
+* H8/300 Options:: Options
+* H8/300 Syntax:: Syntax
+* H8/300 Floating Point:: Floating Point
+* H8/300 Directives:: H8/300 Machine Directives
+* H8/300 Opcodes:: Opcodes
@end menu
@node H8/300 Options
@@ -3893,8 +3893,8 @@ H8/300 family.
@node H8/300 Syntax
_CHAPSEC__(1+_GENERIC__) Syntax
@menu
-* H8/300-Chars:: Special Characters
-* H8/300-Regs:: Register Names
+* H8/300-Chars:: Special Characters
+* H8/300-Regs:: Register Names
* H8/300-Addressing:: Addressing Modes
@end menu
@@ -4128,10 +4128,10 @@ _CHAPSEC__(0+_GENERIC__) Intel 80960 Dependent Features
@cindex i960 support
@menu
-* Options-i960:: i960 Command-line Options
-* Floating Point-i960:: Floating Point
-* Directives-i960:: i960 Machine Directives
-* Opcodes for i960:: i960 Opcodes
+* Options-i960:: i960 Command-line Options
+* Floating Point-i960:: Floating Point
+* Directives-i960:: i960 Machine Directives
+* Opcodes for i960:: i960 Opcodes
@end menu
@c FIXME! Add Syntax sec with discussion of bitfields here, at least so
@@ -4320,8 +4320,8 @@ instruction: @samp{callj}, and Compare-and-Branch or Compare-and-Jump
instructions with target displacements larger than 13 bits.
@menu
-* callj-i960:: @code{callj}
-* Compare-and-branch-i960:: Compare-and-Branch
+* callj-i960:: @code{callj}
+* Compare-and-branch-i960:: Compare-and-Branch
@end menu
@node callj-i960
@@ -4421,11 +4421,11 @@ _CHAPSEC__(0+_GENERIC__) M680x0 Dependent Features
@cindex M680x0 support
@menu
-* M68K-Opts:: M680x0 Options
-* M68K-Syntax:: Syntax
-* M68K-Float:: Floating Point
-* M68K-Directives:: 680x0 Machine Directives
-* M68K-opcodes:: Opcodes
+* M68K-Opts:: M680x0 Options
+* M68K-Syntax:: Syntax
+* M68K-Float:: Floating Point
+* M68K-Directives:: 680x0 Machine Directives
+* M68K-opcodes:: Opcodes
@end menu
@node M68K-Opts
@@ -4609,8 +4609,8 @@ instructions.
@end ignore
@menu
-* M68K-Branch:: Branch Improvement
-* M68K-Chars:: Special Characters
+* M68K-Branch:: Branch Improvement
+* M68K-Chars:: Special Characters
@end menu
@node M68K-Branch
@@ -4760,9 +4760,9 @@ _CHAPSEC__(0+_GENERIC__) SPARC Dependent Features
@cindex SPARC support
@menu
-* Sparc-Opts:: Options
-* Sparc-Float:: Floating Point
-* Sparc-Directives:: Sparc Machine Directives
+* Sparc-Opts:: Options
+* Sparc-Float:: Floating Point
+* Sparc-Directives:: Sparc Machine Directives
@end menu
@node Sparc-Opts
@@ -4842,15 +4842,15 @@ _CHAPSEC__(0+_GENERIC__) 80386 Dependent Features
@cindex i386 support
@cindex i80306 support
@menu
-* i386-Options:: Options
-* i386-Syntax:: AT&T Syntax versus Intel Syntax
-* i386-Opcodes:: Opcode Naming
-* i386-Regs:: Register Naming
-* i386-prefixes:: Opcode Prefixes
-* i386-Memory:: Memory References
-* i386-jumps:: Handling of Jump Instructions
-* i386-Float:: Floating Point
-* i386-Notes:: Notes
+* i386-Options:: Options
+* i386-Syntax:: AT&T Syntax versus Intel Syntax
+* i386-Opcodes:: Opcode Naming
+* i386-Regs:: Register Naming
+* i386-prefixes:: Opcode Prefixes
+* i386-Memory:: Memory References
+* i386-jumps:: Handling of Jump Instructions
+* i386-Float:: Floating Point
+* i386-Notes:: Notes
@end menu
@node i386-Options
@@ -5043,8 +5043,8 @@ Opcode prefixes are usually given as single-line instructions with no
operands, and must directly precede the instruction they act upon. For
example, the @samp{scas} (scan string) instruction is repeated with:
@smallexample
- repne
- scas
+ repne
+ scas
@end smallexample
Here is a list of opcode prefixes:
@@ -5255,9 +5255,9 @@ _CHAPSEC__(0+_GENERIC__) Z8000 Dependent Features
@cindex Z8000 support
@menu
-* Z8000 Options:: No special command-line options for Z8000
-* Z8000 Syntax:: Assembler Syntax for the Z8000
-* Z8000 Opcodes:: Opcodes
+* Z8000 Options:: No special command-line options for Z8000
+* Z8000 Syntax:: Assembler Syntax for the Z8000
+* Z8000 Opcodes:: Opcodes
@end menu
@node Z8000 Options
@@ -5271,8 +5271,8 @@ Z8000 family.
@node Z8000 Syntax
_CHAPSEC__(1+_GENERIC__) Syntax
@menu
-* Z8000-Chars:: Special Characters
-* Z8000-Regs:: Register Names
+* Z8000-Chars:: Special Characters
+* Z8000-Regs:: Register Names
* Z8000-Addressing:: Addressing Modes
@end menu
@@ -5286,35 +5286,42 @@ _CHAPSEC__(2+_GENERIC__) Special Characters
@cindex line separator, Z8000
@cindex statement separator, Z8000
@cindex Z8000 line separator
-@samp{;} can be used instead of a newline to separate statements.
+You can use @samp{;} instead of a newline to separate statements.
@node Z8000-Regs
_CHAPSEC__(2+_GENERIC__) Register Names
@cindex Z8000 registers
@cindex registers, Z8000
-The Z8000 has sixteen 16 bit registers, numbered 0 to 15. You can refer to different
-sized groups of registers with the prefix @samp{r} for 16 bit registers, @samp{rr}
-for 32 bit registers and @samp{rq} for 64 bit registers. The first eight of the sixteen
-16 bit registers may also be accessed by bytes. They are named @samp{r@var{n}h} and @samp{r@var{n}l}.
-@example
-byte registers
- r0l r0h r1h r1l r2h r2l r3h r3l r4h r4l r5h r5l r6h r6l r7h r7l
+The Z8000 has sixteen 16 bit registers, numbered 0 to 15. You can refer
+to different sized groups of registers by register number, with the
+prefix @samp{r} for 16 bit registers, @samp{rr} for 32 bit registers and
+@samp{rq} for 64 bit registers. You can also refer to the contents of
+the first eight (of the sixteen 16 bit registers) by bytes. They are
+named @samp{r@var{n}h} and @samp{r@var{n}l}.
-word registers
- r0 r1 r2 r3 r4 r5 r6 r7 r8 r9 r10 r11 r12 r13 r14 r15
+@smallexample
+@exdent @emph{byte registers}
+r0l r0h r1h r1l r2h r2l r3h r3l
+r4h r4l r5h r5l r6h r6l r7h r7l
-long word registers
- rr0 rr2 rr4 rr6 rr8 rr10 rr12 rr14
+@exdent @emph{word registers}
+r0 r1 r2 r3 r4 r5 r6 r7 r8 r9 r10 r11 r12 r13 r14 r15
+
+@exdent @emph{long word registers}
+rr0 rr2 rr4 rr6 rr8 rr10 rr12 rr14
+
+@exdent @emph{quad word registers}
+rq0 rq4 rq8 rq12
+@end smallexample
-quad word registers
- rq0 rq4 rq8 rq12
-@end example
@node Z8000-Addressing
_CHAPSEC__(2+_GENERIC__) Addressing Modes
+
@cindex addressing modes, Z8000
@cindex Z800 addressing modes
_AS__ understands the following addressing modes for the Z8000:
+
@table @code
@item r@var{n}
Register direct
@@ -5322,7 +5329,7 @@ Register direct
@item @@r@var{n}
Indirect register
-@item @var{address}
+@item @var{addr}
Direct: the 16/24 bit address of the operand is in the instruction.
@item address(r@var{n})
@@ -5330,11 +5337,14 @@ Indexed: the 16/24 bit address is added to the 16 bit register to produce
the final address in memory of the operand.
@item r@var{n}(#@var{imm})
-Base Address: the 16/24 bit register is added to the 16 bit sign extended immediate displacement to produce the final address in memory of the operand.
+Base Address: the 16/24 bit register is added to the 16 bit sign
+extended immediate displacement to produce the final address in memory
+of the operand.
@item r@var{n}(r@var{m})
-Base Index: the 16/24 bit register r@var{n} is added to the sign extended
-16 bit index register r@var{m} to produce the final address in memory of the operand.
+Base Index: the 16/24 bit register r@var{n} is added to the sign
+extended 16 bit index register r@var{m} to produce the final address in
+memory of the operand.
@item #@var{xx}
Immediate data @var{xx}.
@@ -5349,56 +5359,64 @@ _CHAPSEC__(1+_GENERIC__) Opcodes
For detailed information on the Z8000 machine instruction set, see
@cite{Z8000 Technical Manual}.
-@cindex Z8000 pseudo ops
+@cindex Z8000 directives
+The Z8000 port of _AS__ includes these additional assembler directives,
+for compatibility with other Z8000 assemblers:
-The Z8000 port of gas provides a superficial resemblance to YASM, and
-provides these YASM compatible pseudo ops:
@table @code
@item segm
@cindex segm
Generates code for the segmented Z8001.
+
@item unsegm
Generates code for the unsegmented Z8002.
+
@item name
Synonym for @code{.file}
+
@item global
Synonum for @code{.global}
+
@item wval
Synonym for .word
+
@item lval
Synonym for .long
+
@item bval
Synonym for .byte
+
@item sval
-Assemble a string.
-@code{sval} expects one string literal, delimited by single quotes. It assembles each byte of the string into consecutive addresses. Single quote
-and other non-representable characters may be descrbed by escaping them
-with a percent sign and their ascii value as a two digit hex number.
+Assemble a string. @code{sval} expects one string literal, delimited by
+single quotes. It assembles each byte of the string into consecutive
+addresses. You can use the escape sequence @samp{%@var{xx}} (where
+@var{xx} represents a two-digit hexadecimal number) to represent the
+character whose @sc{ascii} value is @var{xx}. Use this feature to
+describe single quote and other characters that may not appear in string
+literals as themselves. For example, the C statement @w{@samp{char *a =
+"he said \"it's 50% off\"";}} is represented in Z8000 assembly language
+as
+
+@smallexample
+sval 'he said %22it%27s 50%25 off%22%00'
+@end smallexample
-@example
-char *a = "he said \"it's 50% off\"";
-
-0000 68652073 sval 'he said %22it%27s 50%25 off%22%00'
- 61696420
- 22697427
- 73203530
- 25206F66
- 662200
-
-@end example
@item rsect
synonym for @code{.section}
+
@item block
synonym for @code{.space}
+
@item even
synonym for @code{.align 1}
@end table
The following table summarizes the opcodes and their arguments:
-@c kluge due to lack of group outside example
-@page
+@iftex
+@begingroup
+@let@nonarrowing=@comment
+@end iftex
@smallexample
-@group
rs @r{16 bit source register}
rd @r{16 bit destination register}
@@ -5411,152 +5429,150 @@ The following table summarizes the opcodes and their arguments:
addr @r{16/24 bit address}
imm @r{immediate data}
-adc rd,rs clrb addr cpsir @@rd,@@rs,rr,cc
-adcb rbd,rbs clrb addr(rd) cpsirb @@rd,@@rs,rr,cc
-add rd,@@rs clrb rbd dab rbd
-add rd,addr com @@rd dbjnz rbd,disp7
-add rd,addr(rs) com addr dec @@rd,imm4m1
-add rd,imm16 com addr(rd) dec addr(rd),imm4m1
-add rd,rs com rd dec addr,imm4m1
-addb rbd,@@rs comb @@rd dec rd,imm4m1
-addb rbd,addr comb addr decb @@rd,imm4m1
-addb rbd,addr(rs) comb addr(rd) decb addr(rd),imm4m1
-addb rbd,imm8 comb rbd decb addr,imm4m1
-addb rbd,rbs comflg flags decb rbd,imm4m1
-addl rrd,@@rs cp @@rd,imm16 di i2
-addl rrd,addr cp addr(rd),imm16 div rrd,@@rs
-addl rrd,addr(rs) cp addr,imm16 div rrd,addr
-addl rrd,imm32 cp rd,@@rs div rrd,addr(rs)
-addl rrd,rrs cp rd,addr div rrd,imm16
-and rd,@@rs cp rd,addr(rs) div rrd,rs
-and rd,addr cp rd,imm16 divl rqd,@@rs
-and rd,addr(rs) cp rd,rs divl rqd,addr
-and rd,imm16 cpb @@rd,imm8 divl rqd,addr(rs)
-and rd,rs cpb addr(rd),imm8 divl rqd,imm32
-andb rbd,@@rs cpb addr,imm8 divl rqd,rrs
-andb rbd,addr cpb rbd,@@rs djnz rd,disp7
-andb rbd,addr(rs) cpb rbd,addr ei i2
-andb rbd,imm8 cpb rbd,addr(rs) ex rd,@@rs
-andb rbd,rbs cpb rbd,imm8 ex rd,addr
-bit @@rd,imm4 cpb rbd,rbs ex rd,addr(rs)
-bit addr(rd),imm4 cpd rd,@@rs,rr,cc ex rd,rs
-bit addr,imm4 cpdb rbd,@@rs,rr,cc exb rbd,@@rs
-bit rd,imm4 cpdr rd,@@rs,rr,cc exb rbd,addr
-bit rd,rs cpdrb rbd,@@rs,rr,cc exb rbd,addr(rs)
-bitb @@rd,imm4 cpi rd,@@rs,rr,cc exb rbd,rbs
-bitb addr(rd),imm4 cpib rbd,@@rs,rr,cc ext0e imm8
-bitb addr,imm4 cpir rd,@@rs,rr,cc ext0f imm8
-bitb rbd,imm4 cpirb rbd,@@rs,rr,cc ext8e imm8
-bitb rbd,rs cpl rrd,@@rs ext8f imm8
-bpt cpl rrd,addr exts rrd
-call @@rd cpl rrd,addr(rs) extsb rd
-call addr cpl rrd,imm32 extsl rqd
-call addr(rd) cpl rrd,rrs halt
-calr disp12 cpsd @@rd,@@rs,rr,cc in rd,@@rs
-clr @@rd cpsdb @@rd,@@rs,rr,cc in rd,imm16
-clr addr cpsdr @@rd,@@rs,rr,cc inb rbd,@@rs
-clr addr(rd) cpsdrb @@rd,@@rs,rr,cc inb rbd,imm16
-clr rd cpsi @@rd,@@rs,rr,cc inc @@rd,imm4m1
-clrb @@rd cpsib @@rd,@@rs,rr,cc inc addr(rd),imm4m1
-@end group
-@group
-inc addr,imm4m1 ldb rbd,rs(rx) mult rrd,addr(rs)
-inc rd,imm4m1 ldb rd(imm16),rbs mult rrd,imm16
-incb @@rd,imm4m1 ldb rd(rx),rbs mult rrd,rs
-incb addr(rd),imm4m1 ldctl ctrl,rs multl rqd,@@rs
-incb addr,imm4m1 ldctl rd,ctrl multl rqd,addr
-incb rbd,imm4m1 ldd @@rs,@@rd,rr multl rqd,addr(rs)
-ind @@rd,@@rs,ra lddb @@rs,@@rd,rr multl rqd,imm32
-indb @@rd,@@rs,rba lddr @@rs,@@rd,rr multl rqd,rrs
-inib @@rd,@@rs,ra lddrb @@rs,@@rd,rr neg @@rd
-inibr @@rd,@@rs,ra ldi @@rd,@@rs,rr neg addr
-iret ldib @@rd,@@rs,rr neg addr(rd)
-jp cc,@@rd ldir @@rd,@@rs,rr neg rd
-jp cc,addr ldirb @@rd,@@rs,rr negb @@rd
-jp cc,addr(rd) ldk rd,imm4 negb addr
-jr cc,disp8 ldl @@rd,rrs negb addr(rd)
-ld @@rd,imm16 ldl addr(rd),rrs negb rbd
-ld @@rd,rs ldl addr,rrs nop
-ld addr(rd),imm16 ldl rd(imm16),rrs or rd,@@rs
-ld addr(rd),rs ldl rd(rx),rrs or rd,addr
-ld addr,imm16 ldl rrd,@@rs or rd,addr(rs)
-ld addr,rs ldl rrd,addr or rd,imm16
-ld rd(imm16),rs ldl rrd,addr(rs) or rd,rs
-ld rd(rx),rs ldl rrd,imm32 orb rbd,@@rs
-ld rd,@@rs ldl rrd,rrs orb rbd,addr
-ld rd,addr ldl rrd,rs(imm16) orb rbd,addr(rs)
-ld rd,addr(rs) ldl rrd,rs(rx) orb rbd,imm8
-ld rd,imm16 ldm @@rd,rs,n orb rbd,rbs
-ld rd,rs ldm addr(rd),rs,n out @@rd,rs
-ld rd,rs(imm16) ldm addr,rs,n out imm16,rs
-ld rd,rs(rx) ldm rd,@@rs,n outb @@rd,rbs
-lda rd,addr ldm rd,addr(rs),n outb imm16,rbs
-lda rd,addr(rs) ldm rd,addr,n outd @@rd,@@rs,ra
-lda rd,rs(imm16) ldps @@rs outdb @@rd,@@rs,rba
-lda rd,rs(rx) ldps addr outib @@rd,@@rs,ra
-ldar rd,disp16 ldps addr(rs) outibr @@rd,@@rs,ra
-ldb @@rd,imm8 ldr disp16,rs pop @@rd,@@rs
-ldb @@rd,rbs ldr rd,disp16 pop addr(rd),@@rs
-ldb addr(rd),imm8 ldrb disp16,rbs pop addr,@@rs
-ldb addr(rd),rbs ldrb rbd,disp16 pop rd,@@rs
-ldb addr,imm8 ldrl disp16,rrs popl @@rd,@@rs
-ldb addr,rbs ldrl rrd,disp16 popl addr(rd),@@rs
-ldb rbd,@@rs mbit popl addr,@@rs
-ldb rbd,addr mreq rd popl rrd,@@rs
-ldb rbd,addr(rs) mres push @@rd,@@rs
-ldb rbd,imm8 mset push @@rd,addr
-ldb rbd,rbs mult rrd,@@rs push @@rd,addr(rs)
-ldb rbd,rs(imm16) mult rrd,addr push @@rd,imm16
-@end group
-@group
-push @@rd,rs set addr,imm4 subl rrd,imm32
-pushl @@rd,@@rs set rd,imm4 subl rrd,rrs
-pushl @@rd,addr set rd,rs tcc cc,rd
-pushl @@rd,addr(rs) setb @@rd,imm4 tccb cc,rbd
-pushl @@rd,rrs setb addr(rd),imm4 test @@rd
-res @@rd,imm4 setb addr,imm4 test addr
-res addr(rd),imm4 setb rbd,imm4 test addr(rd)
-res addr,imm4 setb rbd,rs test rd
-res rd,imm4 setflg imm4 testb @@rd
-res rd,rs sinb rbd,imm16 testb addr
-resb @@rd,imm4 sinb rd,imm16 testb addr(rd)
-resb addr(rd),imm4 sind @@rd,@@rs,ra testb rbd
-resb addr,imm4 sindb @@rd,@@rs,rba testl @@rd
-resb rbd,imm4 sinib @@rd,@@rs,ra testl addr
-resb rbd,rs sinibr @@rd,@@rs,ra testl addr(rd)
-resflg imm4 sla rd,imm8 testl rrd
-ret cc slab rbd,imm8 trdb @@rd,@@rs,rba
-rl rd,imm1or2 slal rrd,imm8 trdrb @@rd,@@rs,rba
-rlb rbd,imm1or2 sll rd,imm8 trib @@rd,@@rs,rbr
-rlc rd,imm1or2 sllb rbd,imm8 trirb @@rd,@@rs,rbr
-rlcb rbd,imm1or2 slll rrd,imm8 trtdrb @@ra,@@rb,rbr
-rldb rbb,rba sout imm16,rs trtib @@ra,@@rb,rr
-rr rd,imm1or2 soutb imm16,rbs trtirb @@ra,@@rb,rbr
-rrb rbd,imm1or2 soutd @@rd,@@rs,ra trtrb @@ra,@@rb,rbr
-rrc rd,imm1or2 soutdb @@rd,@@rs,rba tset @@rd
-rrcb rbd,imm1or2 soutib @@rd,@@rs,ra tset addr
-rrdb rbb,rba soutibr @@rd,@@rs,ra tset addr(rd)
-rsvd36 sra rd,imm8 tset rd
-rsvd38 srab rbd,imm8 tsetb @@rd
-rsvd78 sral rrd,imm8 tsetb addr
-rsvd7e srl rd,imm8 tsetb addr(rd)
-rsvd9d srlb rbd,imm8 tsetb rbd
-rsvd9f srll rrd,imm8 xor rd,@@rs
-rsvdb9 sub rd,@@rs xor rd,addr
-rsvdbf sub rd,addr xor rd,addr(rs)
-sbc rd,rs sub rd,addr(rs) xor rd,imm16
-sbcb rbd,rbs sub rd,imm16 xor rd,rs
-sc imm8 sub rd,rs xorb rbd,@@rs
-sda rd,rs subb rbd,@@rs xorb rbd,addr
-sdab rbd,rs subb rbd,addr xorb rbd,addr(rs)
-sdal rrd,rs subb rbd,addr(rs) xorb rbd,imm8
-sdl rd,rs subb rbd,imm8 xorb rbd,rbs
-sdlb rbd,rs subb rbd,rbs xorb rbd,rbs
-sdll rrd,rs subl rrd,@@rs
-set @@rd,imm4 subl rrd,addr
-set addr(rd),imm4 subl rrd,addr(rs)
-@end group
+adc rd,rs clrb addr cpsir @@rd,@@rs,rr,cc
+adcb rbd,rbs clrb addr(rd) cpsirb @@rd,@@rs,rr,cc
+add rd,@@rs clrb rbd dab rbd
+add rd,addr com @@rd dbjnz rbd,disp7
+add rd,addr(rs) com addr dec @@rd,imm4m1
+add rd,imm16 com addr(rd) dec addr(rd),imm4m1
+add rd,rs com rd dec addr,imm4m1
+addb rbd,@@rs comb @@rd dec rd,imm4m1
+addb rbd,addr comb addr decb @@rd,imm4m1
+addb rbd,addr(rs) comb addr(rd) decb addr(rd),imm4m1
+addb rbd,imm8 comb rbd decb addr,imm4m1
+addb rbd,rbs comflg flags decb rbd,imm4m1
+addl rrd,@@rs cp @@rd,imm16 di i2
+addl rrd,addr cp addr(rd),imm16 div rrd,@@rs
+addl rrd,addr(rs) cp addr,imm16 div rrd,addr
+addl rrd,imm32 cp rd,@@rs div rrd,addr(rs)
+addl rrd,rrs cp rd,addr div rrd,imm16
+and rd,@@rs cp rd,addr(rs) div rrd,rs
+and rd,addr cp rd,imm16 divl rqd,@@rs
+and rd,addr(rs) cp rd,rs divl rqd,addr
+and rd,imm16 cpb @@rd,imm8 divl rqd,addr(rs)
+and rd,rs cpb addr(rd),imm8 divl rqd,imm32
+andb rbd,@@rs cpb addr,imm8 divl rqd,rrs
+andb rbd,addr cpb rbd,@@rs djnz rd,disp7
+andb rbd,addr(rs) cpb rbd,addr ei i2
+andb rbd,imm8 cpb rbd,addr(rs) ex rd,@@rs
+andb rbd,rbs cpb rbd,imm8 ex rd,addr
+bit @@rd,imm4 cpb rbd,rbs ex rd,addr(rs)
+bit addr(rd),imm4 cpd rd,@@rs,rr,cc ex rd,rs
+bit addr,imm4 cpdb rbd,@@rs,rr,cc exb rbd,@@rs
+bit rd,imm4 cpdr rd,@@rs,rr,cc exb rbd,addr
+bit rd,rs cpdrb rbd,@@rs,rr,cc exb rbd,addr(rs)
+bitb @@rd,imm4 cpi rd,@@rs,rr,cc exb rbd,rbs
+bitb addr(rd),imm4 cpib rbd,@@rs,rr,cc ext0e imm8
+bitb addr,imm4 cpir rd,@@rs,rr,cc ext0f imm8
+bitb rbd,imm4 cpirb rbd,@@rs,rr,cc ext8e imm8
+bitb rbd,rs cpl rrd,@@rs ext8f imm8
+bpt cpl rrd,addr exts rrd
+call @@rd cpl rrd,addr(rs) extsb rd
+call addr cpl rrd,imm32 extsl rqd
+call addr(rd) cpl rrd,rrs halt
+calr disp12 cpsd @@rd,@@rs,rr,cc in rd,@@rs
+clr @@rd cpsdb @@rd,@@rs,rr,cc in rd,imm16
+clr addr cpsdr @@rd,@@rs,rr,cc inb rbd,@@rs
+clr addr(rd) cpsdrb @@rd,@@rs,rr,cc inb rbd,imm16
+clr rd cpsi @@rd,@@rs,rr,cc inc @@rd,imm4m1
+clrb @@rd cpsib @@rd,@@rs,rr,cc inc addr(rd),imm4m1
+inc addr,imm4m1 ldb rbd,rs(rx) mult rrd,addr(rs)
+inc rd,imm4m1 ldb rd(imm16),rbs mult rrd,imm16
+incb @@rd,imm4m1 ldb rd(rx),rbs mult rrd,rs
+incb addr(rd),imm4m1 ldctl ctrl,rs multl rqd,@@rs
+incb addr,imm4m1 ldctl rd,ctrl multl rqd,addr
+incb rbd,imm4m1 ldd @@rs,@@rd,rr multl rqd,addr(rs)
+ind @@rd,@@rs,ra lddb @@rs,@@rd,rr multl rqd,imm32
+indb @@rd,@@rs,rba lddr @@rs,@@rd,rr multl rqd,rrs
+inib @@rd,@@rs,ra lddrb @@rs,@@rd,rr neg @@rd
+inibr @@rd,@@rs,ra ldi @@rd,@@rs,rr neg addr
+iret ldib @@rd,@@rs,rr neg addr(rd)
+jp cc,@@rd ldir @@rd,@@rs,rr neg rd
+jp cc,addr ldirb @@rd,@@rs,rr negb @@rd
+jp cc,addr(rd) ldk rd,imm4 negb addr
+jr cc,disp8 ldl @@rd,rrs negb addr(rd)
+ld @@rd,imm16 ldl addr(rd),rrs negb rbd
+ld @@rd,rs ldl addr,rrs nop
+ld addr(rd),imm16 ldl rd(imm16),rrs or rd,@@rs
+ld addr(rd),rs ldl rd(rx),rrs or rd,addr
+ld addr,imm16 ldl rrd,@@rs or rd,addr(rs)
+ld addr,rs ldl rrd,addr or rd,imm16
+ld rd(imm16),rs ldl rrd,addr(rs) or rd,rs
+ld rd(rx),rs ldl rrd,imm32 orb rbd,@@rs
+ld rd,@@rs ldl rrd,rrs orb rbd,addr
+ld rd,addr ldl rrd,rs(imm16) orb rbd,addr(rs)
+ld rd,addr(rs) ldl rrd,rs(rx) orb rbd,imm8
+ld rd,imm16 ldm @@rd,rs,n orb rbd,rbs
+ld rd,rs ldm addr(rd),rs,n out @@rd,rs
+ld rd,rs(imm16) ldm addr,rs,n out imm16,rs
+ld rd,rs(rx) ldm rd,@@rs,n outb @@rd,rbs
+lda rd,addr ldm rd,addr(rs),n outb imm16,rbs
+lda rd,addr(rs) ldm rd,addr,n outd @@rd,@@rs,ra
+lda rd,rs(imm16) ldps @@rs outdb @@rd,@@rs,rba
+lda rd,rs(rx) ldps addr outib @@rd,@@rs,ra
+ldar rd,disp16 ldps addr(rs) outibr @@rd,@@rs,ra
+ldb @@rd,imm8 ldr disp16,rs pop @@rd,@@rs
+ldb @@rd,rbs ldr rd,disp16 pop addr(rd),@@rs
+ldb addr(rd),imm8 ldrb disp16,rbs pop addr,@@rs
+ldb addr(rd),rbs ldrb rbd,disp16 pop rd,@@rs
+ldb addr,imm8 ldrl disp16,rrs popl @@rd,@@rs
+ldb addr,rbs ldrl rrd,disp16 popl addr(rd),@@rs
+ldb rbd,@@rs mbit popl addr,@@rs
+ldb rbd,addr mreq rd popl rrd,@@rs
+ldb rbd,addr(rs) mres push @@rd,@@rs
+ldb rbd,imm8 mset push @@rd,addr
+ldb rbd,rbs mult rrd,@@rs push @@rd,addr(rs)
+ldb rbd,rs(imm16) mult rrd,addr push @@rd,imm16
+push @@rd,rs set addr,imm4 subl rrd,imm32
+pushl @@rd,@@rs set rd,imm4 subl rrd,rrs
+pushl @@rd,addr set rd,rs tcc cc,rd
+pushl @@rd,addr(rs) setb @@rd,imm4 tccb cc,rbd
+pushl @@rd,rrs setb addr(rd),imm4 test @@rd
+res @@rd,imm4 setb addr,imm4 test addr
+res addr(rd),imm4 setb rbd,imm4 test addr(rd)
+res addr,imm4 setb rbd,rs test rd
+res rd,imm4 setflg imm4 testb @@rd
+res rd,rs sinb rbd,imm16 testb addr
+resb @@rd,imm4 sinb rd,imm16 testb addr(rd)
+resb addr(rd),imm4 sind @@rd,@@rs,ra testb rbd
+resb addr,imm4 sindb @@rd,@@rs,rba testl @@rd
+resb rbd,imm4 sinib @@rd,@@rs,ra testl addr
+resb rbd,rs sinibr @@rd,@@rs,ra testl addr(rd)
+resflg imm4 sla rd,imm8 testl rrd
+ret cc slab rbd,imm8 trdb @@rd,@@rs,rba
+rl rd,imm1or2 slal rrd,imm8 trdrb @@rd,@@rs,rba
+rlb rbd,imm1or2 sll rd,imm8 trib @@rd,@@rs,rbr
+rlc rd,imm1or2 sllb rbd,imm8 trirb @@rd,@@rs,rbr
+rlcb rbd,imm1or2 slll rrd,imm8 trtdrb @@ra,@@rb,rbr
+rldb rbb,rba sout imm16,rs trtib @@ra,@@rb,rr
+rr rd,imm1or2 soutb imm16,rbs trtirb @@ra,@@rb,rbr
+rrb rbd,imm1or2 soutd @@rd,@@rs,ra trtrb @@ra,@@rb,rbr
+rrc rd,imm1or2 soutdb @@rd,@@rs,rba tset @@rd
+rrcb rbd,imm1or2 soutib @@rd,@@rs,ra tset addr
+rrdb rbb,rba soutibr @@rd,@@rs,ra tset addr(rd)
+rsvd36 sra rd,imm8 tset rd
+rsvd38 srab rbd,imm8 tsetb @@rd
+rsvd78 sral rrd,imm8 tsetb addr
+rsvd7e srl rd,imm8 tsetb addr(rd)
+rsvd9d srlb rbd,imm8 tsetb rbd
+rsvd9f srll rrd,imm8 xor rd,@@rs
+rsvdb9 sub rd,@@rs xor rd,addr
+rsvdbf sub rd,addr xor rd,addr(rs)
+sbc rd,rs sub rd,addr(rs) xor rd,imm16
+sbcb rbd,rbs sub rd,imm16 xor rd,rs
+sc imm8 sub rd,rs xorb rbd,@@rs
+sda rd,rs subb rbd,@@rs xorb rbd,addr
+sdab rbd,rs subb rbd,addr xorb rbd,addr(rs)
+sdal rrd,rs subb rbd,addr(rs) xorb rbd,imm8
+sdl rd,rs subb rbd,imm8 xorb rbd,rbs
+sdlb rbd,rs subb rbd,rbs xorb rbd,rbs
+sdll rrd,rs subl rrd,@@rs
+set @@rd,imm4 subl rrd,addr
+set addr(rd),imm4 subl rrd,addr(rs)
@end smallexample
+@iftex
+@endgroup
+@end iftex
_fi__(_Z8000__)
_if__(0)
generated by cgit v1.1 at 2024-12-15 07:54:52 +0000