diff options
Diffstat (limited to 'gas')
| -rw-r--r-- | gas/ChangeLog | 7 | ||||
| -rw-r--r-- | gas/config/tc-pru.c | 7 | ||||
| -rw-r--r-- | gas/config/tc-v850.c | 3 |
3 files changed, 13 insertions, 4 deletions
diff --git a/gas/ChangeLog b/gas/ChangeLog index 829256a..e2c8f53 100644 --- a/gas/ChangeLog +++ b/gas/ChangeLog @@ -1,3 +1,10 @@ +2017-07-12 Nick Clifton <nickc@redhat.com> + + Fix compile time warnings using gcc 7.1.1. + * config/tc-pru.c (md_assemble): Add continue statement after + handling 'E' operand character. + * config/tc-v850.c (md_assemble): Initialise the 'insn' variable. + 2017-07-05 James Greenhalgh <james.greenhalgh@arm.com> * config/tc-arm.c (arm_cpus): Add Cortex-A55 and Cortex-A75. diff --git a/gas/config/tc-pru.c b/gas/config/tc-pru.c index 53ea7ef..d5aa5a5 100644 --- a/gas/config/tc-pru.c +++ b/gas/config/tc-pru.c @@ -296,9 +296,10 @@ typedef enum static PRU_MODE pru_mode = PRU_MODE_ASSEMBLE; /* This function is used to in self-checking mode - to check the assembled instruction - opcode should be the assembled opcode, and exp_opcode + to check the assembled instruction. + OPCODE should be the assembled opcode, and exp_opcode the parsed string representing the expected opcode. */ + static void pru_check_assembly (unsigned int opcode, const char *exp_opcode) { @@ -1698,6 +1699,8 @@ md_assemble (char *op_str) case 'E': pru_check_assembly (insn->insn_code, *argtk++); + continue; + default: BAD_CASE (*argp); } diff --git a/gas/config/tc-v850.c b/gas/config/tc-v850.c index 7b53474..dd7b54a 100644 --- a/gas/config/tc-v850.c +++ b/gas/config/tc-v850.c @@ -2298,7 +2298,7 @@ md_assemble (char *str) const unsigned char *opindex_ptr; int next_opindex; int relaxable = 0; - unsigned long insn; + unsigned long insn = 0; unsigned long insn_size; char *f = NULL; int i; @@ -3065,7 +3065,6 @@ md_assemble (char *str) dwarf2_emit_insn (0); /* Write out the instruction. */ - if (relaxable && fc > 0) { insn_size = 2; |