diff options
Diffstat (limited to 'gas')
| -rw-r--r-- | gas/ChangeLog | 6 | ||||
| -rw-r--r-- | gas/config/tc-mips.c | 5 | ||||
| -rw-r--r-- | gas/doc/c-mips.texi | 1 |
3 files changed, 11 insertions, 1 deletions
diff --git a/gas/ChangeLog b/gas/ChangeLog index a9413fa..8bb6ae8 100644 --- a/gas/ChangeLog +++ b/gas/ChangeLog @@ -1,5 +1,11 @@ 2018-08-29 Chenghua Xu <paul.hua.gm@gmail.com> + * config/tc-mips.c (ISA_HAS_ODD_SINGLE_FPR): Exclude CPU_GS264E. + (mips_cpu_info_table): Add gs264e descriptors. + * doc/as.texi (march table): Add gs264e. + +2018-08-29 Chenghua Xu <paul.hua.gm@gmail.com> + * config/tc-mips.c (ISA_HAS_ODD_SINGLE_FPR): Exclude CPU_GS464E. (mips_cpu_info_table): Add gs464e descriptors. * doc/as.texi (march table): Add gs464e. diff --git a/gas/config/tc-mips.c b/gas/config/tc-mips.c index 9c0a1fd..c9fc6c6 100644 --- a/gas/config/tc-mips.c +++ b/gas/config/tc-mips.c @@ -423,7 +423,8 @@ static int mips_32bitmode = 0; || (ISA) == ISA_MIPS64R6 \ || (CPU) == CPU_R5900) \ && ((CPU) != CPU_GS464 \ - || (CPU) != CPU_GS464E)) + || (CPU) != CPU_GS464E \ + || (CPU) != CPU_GS264E)) /* Return true if ISA supports move to/from high part of a 64-bit floating-point register. */ @@ -19817,6 +19818,8 @@ static const struct mips_cpu_info mips_cpu_info_table[] = ISA_MIPS64R2, CPU_GS464 }, { "gs464e", 0, ASE_LOONGSON_MMI | ASE_LOONGSON_CAM | ASE_LOONGSON_EXT | ASE_LOONGSON_EXT2, ISA_MIPS64R2, CPU_GS464E }, + { "gs264e", 0, ASE_LOONGSON_MMI | ASE_LOONGSON_CAM | ASE_LOONGSON_EXT + | ASE_LOONGSON_EXT2 | ASE_MSA | ASE_MSA64, ISA_MIPS64R2, CPU_GS264E }, /* Cavium Networks Octeon CPU core */ { "octeon", 0, 0, ISA_MIPS64R2, CPU_OCTEON }, diff --git a/gas/doc/c-mips.texi b/gas/doc/c-mips.texi index 2682e36..7751ce0 100644 --- a/gas/doc/c-mips.texi +++ b/gas/doc/c-mips.texi @@ -439,6 +439,7 @@ loongson2e, loongson2f, gs464, gs464e, +gs264e, octeon, octeon+, octeon2, |