4 files changed, 29 insertions, 0 deletions
diff --git a/gas/testsuite/ChangeLog b/gas/testsuite/ChangeLog
index f7a7079..44b8b9e 100644
--- a/gas/testsuite/ChangeLog
+++ b/gas/testsuite/ChangeLog
@@ -1,3 +1,9 @@
+2011-06-09  James Greenhalgh  <james.greenhalgh@arm.com>
+
+	* gas/arm/ldrd-unpredicatble.d: New testcase.
+	* gas/arm/ldrd-unpredicatble.s: Likewise.
+	* gas/arm/ldrd-unpredicatble.l: Likewise.
+
 2011-06-02  Jie Zhang <jie@codesourcery.com>
 	    Nathan Sidwell <nathan@codesourcery.com>
 
diff --git a/gas/testsuite/gas/arm/ldrd-unpredictable.d b/gas/testsuite/gas/arm/ldrd-unpredictable.d
new file mode 100644
index 0000000..10561b8
--- /dev/null
+++ b/gas/testsuite/gas/arm/ldrd-unpredictable.d
@@ -0,0 +1,2 @@
+# name: Unpredictable LDRD and STRD instructions. - ARM
+# error-output: ldrd-unpredictable.l
diff --git a/gas/testsuite/gas/arm/ldrd-unpredictable.l b/gas/testsuite/gas/arm/ldrd-unpredictable.l
new file mode 100644
index 0000000..3271714
--- /dev/null
+++ b/gas/testsuite/gas/arm/ldrd-unpredictable.l
@@ -0,0 +1,7 @@
+[^:]*: Assembler messages:
+[^:]*:6: Warning: index register overlaps transfer register
+[^:]*:7: Warning: index register overlaps transfer register
+[^:]*:8: Warning: source register same as write-back base
+[^:]*:9: Warning: base register written back, and overlaps second transfer register
+[^:]*:13: Warning: source register same as write-back base
+[^:]*:14: Warning: base register written back, and overlaps second transfer register
diff --git a/gas/testsuite/gas/arm/ldrd-unpredictable.s b/gas/testsuite/gas/arm/ldrd-unpredictable.s
new file mode 100644
index 0000000..9bc2075
--- /dev/null
+++ b/gas/testsuite/gas/arm/ldrd-unpredictable.s
@@ -0,0 +1,14 @@
+.syntax unified
+
+.arm
+
+@ LDRD
+ldrd r0,r1,[r0,r1]			@ unpredictable
+ldrd r0,r1,[r1,r0]			@ ditto
+ldrd r0,r1,[r0,r2]!			@ ditto
+ldrd r0,r1,[r1,r2]!			@ ditto
+
+@ STRD
+
+strd r0,r1,[r0,r2]!			@ ditto
+strd r0,r1,[r1,r2]!			@ ditto