diff options
Diffstat (limited to 'gas/testsuite')
746 files changed, 67497 insertions, 0 deletions
diff --git a/gas/testsuite/ChangeLog b/gas/testsuite/ChangeLog new file mode 100644 index 0000000..d8f8656 --- /dev/null +++ b/gas/testsuite/ChangeLog @@ -0,0 +1,2333 @@ +1999-05-02 Nick Clifton <nickc@cygnus.com> + + * gas/mcore/allinsn.d: Update to match latest assembler + operations. + +1999-04-16 DJ Delorie <dj@cygnus.com> + + * gas/i386/amd.s: Add NOPs to align for coff targets + * gas/i386/amd.d: and check for them. + +Thu Apr 15 15:03:43 1999 Jeffrey A Law (law@cygnus.com) + + * gas/hppa/basic/basic.exp (do_coprmem): No longer expected to file. + +Wed Apr 14 13:43:06 1999 Jeffrey A Law (law@cygnus.com) + + * gas/hppa/basic/branch.s: Do not use immediate value where we + really want a register. + * gas/hppa/basic/coprmem.s: Likewise. + * gas/hppa/basic/fmemLRbug.s: Likewise. + * gas/hppa/basic/coprmem.s: Likewise. + * gas/hppa/basic/spop.s: Likewise. + * gas/hppa/basic/imem.s: Likewise. + * gas/hppa/parse/badfmpyadd.s: Likewise. + * gas/hppa/parse/calldatabug.s: Likewise. + * gas/hppa/parse/entrybug.s: Likewise. + * gas/hppa/parse/exprbug.s: Likewise. + * gas/hppa/parse/fixup7bug.s: Likewise. + * gas/hppa/parse/labelbug.s: Likewise. + * gas/hppa/reloc/applybug.s: Likewise. + * gas/hppa/reloc/funcrelocbug.s: Likewise. + * gas/hppa/reloc/labelopbug.s: Likewise. + * gas/hppa/reloc/longcall.s: Likewise. + * gas/hppa/reloc/plabelbug.s: Likewise. + * gas/hppa/reloc/reduce.s: Likewise. + * gas/hppa/reloc/reduce2.s: Likewise. + * gas/hppa/reloc/reduce3.s: Likewise. + * gas/hppa/unsorted/brlenbug.s: Likewise. + * gas/hppa/unsorted/importbug.s: Likewise. + * gas/hppa/unsorted/lasbeldiffs.s: Likewise. + + * gas/hppa/basic/basic.exp (do_imem): Handle multiple encodings + for loads and stores using reg + small d addresses. + No longer expect failure for mis-parse of imm %reg. + +1999-04-13 Doug Evans <devans@casey.cygnus.com> + + * gas/m32r/m32rx.d (cmpu__rach): Fix expected output. + * gas/m32r/m32rx.s (bc__add,add__bc): Explicitly specify short branch + so branch relaxation restrictions won't interfere with parallelization + attempts. + +1999-04-08 Nick Clifton <nickc@cygnus.com> + + * gas/mcore: New Directory. + * gas/mcore/allinsn.exp: New File: Expect file for MCore assembly + tests. + * gas/mcore/allinsn.s: New File: Source file for MCore assembly + tests. + * gas/mcore/allinsn.d: New File: Expected output file for MCore + assembly tests. + +1999-03-20 Doug Evans <devans@casey.cygnus.com> + + * gas/m32r/m32rx.[sd]: Fix a few more testcases. + +1999-03-16 Martin Hunt <hunt@cygnus.com> + + * gas/d30v/d30.exp (run_list_test): Add new tests, + label, guard-debug, serial, warn_oddreg, bittest, and mul. + + * gas/d30v/opt.s: Fix some warnings and add a few labels + to keep things from parallelizing where we don't want them to. + + * gas/d30v/reloc.s: Fix warning. + + * gas/d30v/opt.d, reloc.d, inst.d: Rebuild. + + * gas/d30v/label.s: New test. Check that labels are aligned + on 8-byte boundaries. + + * gas/d30v/guard-debug.s: New test. Test output with "-g". + + * gas/d30v/serial.s: New test. Check for warnings with + illegal serial instructions. + + * gas/d30v/warn_oddreg.s: New test. CHeck for warnings when + odd-numbered registers are used for some instructions. + + * gas/d30v/bittest.s: New test. Check for bit operation + instructions (BCLR, BNOT, BSET, BTST) in the IU. + + * gas/d30v/mul.s: New test. Check for restricted sequences + in a bunch of different multiply instructions. + + * gas/vtable/vtable.exp (run_list_test): Don't + run test on D30V. + +1999-03-05 Nick Clifton <nickc@cygnus.com> + + * gas/all/gas.exp: Expect strongarm-coff target to fail cofftag + test. + +1999-02-13 Jim Blandy <jimb@zwingli.cygnus.com> + + * gas/mips/mips.exp: Run the new tests, below. + * gas/mips/elf_e_flags1.d, gas/mips/elf_e_flags2.d, + gas/mips/elf_e_flags3.d, gas/mips/elf_e_flags4.d: New files. + * gas/mips/elf_e_flags.c, gas/mips/elf_e_flags.s: New files. + + * lib/gas-defs.exp (run_dump_test): Document. It's not + really trivial. + + * lib/gas-defs.exp (run_dump_test): Clean up logic for guessing + $program (the dump tool). + +1999-02-10 Doug Evans <devans@casey.cygnus.com> + + * gas/m32r/allinsn.d: Prefix all | with \. + (push,pop): Fix expected output. + * gas/m32r/relax-1.d: Emitted nops are serial, not parallel. + * gas/m32r/fslot.d: Prefix all | with \. + +1999-02-08 Nick Clifton <nickc@cygnus.com> + + * gas/vtable/inherit0.s: Do not use '@' prefix to .type operator. + Some ports use it as a comment initiator. + + * gas/vtable/entry1.d: Do not look for an addend. Some ports use + REL relocations and so do not have one. + +1998-12-18 Nick Clifton <nickc@cygnus.com> + + * gas/fr30/allinsn.s: Fix to match latest assembler syntax. + * gas/fr30/allinsn.d: Fix to match latest assembler output + +1998-12-03 Nick Clifton <nickc@cygnus.com> + + * gas/fr30/allinsn.d: Updated to match latest assembler output. + +1998-12-02 Nick Clifton <nickc@cygnus.com> + + * gas/fr30/allinsn.s: Replace illegal insns with legal versions. + + * gas/fr30/allinsn.d: Update to match latest assembler output. + +Thu Nov 19 15:59:51 1998 Dave Brolley <brolley@cygnus.com> + + * gas/fr30/allinsn.s: Reorder insns for better simulation. + +Thu Nov 19 07:50:44 1998 Doug Evans <devans@charmed.cygnus.com> + + * gas/mips/sync.[sd]: New testcase. + * gas/mips/mips.exp: Run it. + +Wed Nov 18 11:27:56 1998 Dave Brolley <brolley@cygnus.com> + + * gas/fr30/allinsn.s (dmov): Correct hex literals. + +Tue Nov 17 15:24:20 1998 Nick Clifton <nickc@cygnus.com> + + * gas/fr30/allinsn.s: Moved currently un-assembliable instructions + to end of file. + + * gas/fr30/allinsn.d: Added disassembly of currently assembliable + opcodes. + +Mon Nov 16 16:50:27 1998 Nick Clifton <nickc@cygnus.com> + + * gas/fr30/allinsn.s: Fix syntax errors. + +Mon Nov 16 19:27:52 1998 Dave Brolley <brolley@cygnus.com> + + * gas/fr30/allinsn.s: Fixed more typos. + +Fri Nov 13 13:15:01 1998 Nick Clifton <nickc@cygnus.com> + + * gas/fr30/allinsn.s: Fixed typos and added some tests of upper + case vs lower case. + +Tue Nov 10 14:54:47 1998 Nick Clifton <nickc@cygnus.com> + + * gas/fr30/allinsn.s: New file. + * gas/fr30/allinsn.d: New file. + * gas/fr30/allinsn.exp: New file. + * gas/fr30/fr30.exp: New file. + +Mon Nov 2 20:16:50 1998 Doug Evans <devans@canuck.cygnus.com> + + * gas/m32r/fslot.[sd]: New testcase. + * gas/m32r/m32r.exp: Run it. + +Tue Oct 20 11:35:06 1998 Alan Modra <alan@spri.levels.unisa.edu.au> + + * gas/i386/i386.exp: Run AMD insn test. + * gas/i386/amd.s: New test. + * gas/i386/amd.d: New test results. + +Sun Sep 20 01:00:01 1998 Andreas Schwab <schwab@issan.informatik.uni-dortmund.de> + + * gas/vtable/inherit1.l: Require only the word GAS somewere in the + first line of the listing. + +Tue Sep 1 10:20:03 1998 Richard Henderson <rth@cygnus.com> + + * gas/ppc/astest.d: Adjust regexps to match a 64-bit host. + * gas/ppc/astest2.d: Likewise. + +Mon Aug 31 13:25:07 1998 Richard Henderson <rth@cygnus.com> + + * gas/vtable/{entry0.d,entry1.d,inherit0.d}: Fix pattern matching + of whitespace for 64-bit hosts. + +Mon Aug 31 12:45:49 1998 Richard Henderson <rth@cygnus.com> + + * gas/vtable/vtable.exp: New. + * gas/vtable/{entry0.s,entry0.d}: New. + * gas/vtable/{entry1.s,entry1.d}: New. + * gas/vtable/{inherit0.s,inherit0.d}: New. + * gas/vtable/{inherit1.s,inherit1.l}: New. + +Thu Aug 20 23:18:06 1998 Ian Lance Taylor <ian@cygnus.com> + + * gas/i386/white.l: Revert patch of August 12. + +Wed Aug 12 11:54:37 1998 Jeffrey A Law (law@cygnus.com) + + * gas/mn10300/udf.s: New test. + * gas/mn10300/basic.exp: Run it. + +Wed Aug 12 13:25:38 1998 Alan Modra <alan@spri.levels.unisa.edu.au> + + * gas/i386/general.l: Test andb $~0x80,foo. + * gas/i386/general.s: Update. + + * gas/i386/white.l: Expect warning for stand-alone ss prefix. + +Tue Jul 21 12:46:59 1998 Alan Modra <alan@spri.levels.unisa.edu.au> + + * gas/i386/white.s: Add some more whitespace tests. + * gas/i386/white.l: Update accordingly. + +Mon Jul 13 18:15:11 1998 Alan Modra <alan@spri.levels.unisa.edu.au> + + * gas/i386/*: All new i386 testsuite. + +1998-07-02 Ken Raeburn <raeburn@cygnus.com> + + * lib/gas-defs.exp (gas_init): Complain if target name isn't in + canonical form. + +Wed Jul 1 15:35:09 1998 Nick Clifton <nickc@cygnus.com> + + * gas/all/gas.exp: Expect ARM and Thumb cofftag test to fail. + +Wed Jul 1 17:31:39 1998 Ian Lance Taylor <ian@cygnus.com> + + * gas/ppc/simpshft.s: Add alignment so that it works on AIX. + * gas/ppc/simpshft.d: Change accordingly. Only dump the .text + section. + +Tue Jun 23 15:14:43 1998 Nick Clifton <nickc@cygnus.com> + + * gas/v850/hilo2.s: Use r1 as the destination of the movea + instruction, since r0 is read only. + + * gas/v850/basic.exp: Fix names of special area relocations. + Set -mwarn-signed-overflow flag when running range.s test. + +Sun Jun 21 12:44:43 1998 Nick Clifton <nickc@cygnus.com> + + * gas/d30v/reloc.d: Updated to match latest assembler output. + +Wed Jun 17 14:02:10 1998 Frank Ch. Eigler <fche@cygnus.com> + + * gas/mips/delay.d: Add -mcpu=NNNN to gas flags to let test case + run on differently targeted assembler. + * gas/mips/{ld-ilocks-addr32,ld-svr4pic.d}: Ditto. + * gas/mips/{ld-xgot.d,lif-svr4pic.d,lif-xgot.d}: Same. + * gas/mips/{mips16.d,mips4.d,nodelay.d}: Again. + * gas/mips/{trunc.d,uld.d,ulh-xgot.d,usd.d}: And then some. + + * gas/mips/ld-ilocks.d: Removed disassembler flags to let target + defaults go unmodified. Replaced $f4/$f5 with $fp[45], as the + original `ld.d' had. Find `ld.s'. + * gas/mips/mul-ilocks.d: Nearly ditto. + +Thu Jun 11 16:50:46 1998 Nick Clifton <nickc@cygnus.com> + + * gas/d30v/inst.d: Expect repeati instrucitons to be combined. + + * gas/d30v/inst.s: Add nop to keep assembled instructions at + expected addresses. + +Mon Jun 8 18:47:11 1998 Nick Clifton <nickc@cygnus.com> + + * gas/d30v/array.d: Updated to match latest assembler results. + * gas/d30v/reloc.d: Partially updated to match latest assembler + results. + +Fri Jun 5 19:15:59 1998 Andreas Schwab <schwab@issan.informatik.uni-dortmund.de> + + * gas/m68k/operands.s: For all pc relative addresses change tstl + to pea since the former does not allow pcrel on m68000. Do not + make label foo global, so that references to it can be relaxed on + ELF targets. + * gas/m68k/operands.d, gas/m68k/op68000.d: Updated. + +Tue Jun 2 15:08:36 1998 Geoff Keating <geoffk@ozemail.com.au> + + * gas/ppc/ppc.exp: Run simpshft test. + * gas/ppc/simpshft.d: New file. + * gas/ppc/simpshft.s: New file. + +Mon Jun 1 17:00:22 1998 Jeffrey A Law (law@cygnus.com) + + * gas/mips/div-ilocks.d: Handle both "break" instruction variants. + * gas/mips/{div.d, mul-ilocks.d, mul.d}: Likewise. + +Fri May 29 12:07:35 1998 Ian Lance Taylor <ian@cygnus.com> + + * gas/mips/mips.exp: Adjust ilocks initialization to match current + assembler defaults more closely. + + * gas/sh/fp.s: Remove ftst/nan. The assembler no longer supports + the instruction. + * gas/sh/basic.exp: Adjust accordingly. + +Wed May 27 15:26:51 1998 Nick Clifton <nickc@cygnus.com> + + * gas/d30v/align.d: Updated to match latest assembler output. + * gas/d30v/inst.d: Updated to match latest assembler output. + * gas/d30v/inst.s: Updated to match latest assembler rules. + * gas/d30v/opt.d: Updated to match latest assembler output. + +Fri May 22 15:56:51 1998 Doug Evans <devans@canuck.cygnus.com> + + * gas/m32r/allinsn.d: Handle 64 bit bfd_vma. + * gas/m32r/uppercase.d: Likewise. + +Thu May 21 15:03:06 1998 Nick Clifton <nickc@cygnus.com> + + * gas/arm/thumb.s: Add period to start of labels to prevent + assembler thinking that they are function entry points. + +Tue May 19 18:17:10 1998 Ian Lance Taylor <ian@cygnus.com> + + * gas/mips/mips16.d: Correct to reflect bug fix to disassembler. + +Mon May 18 13:11:45 1998 Frank Ch. Eigler <fche@cygnus.com> + + * gas/mips/{div,ld,mul}.d: Add assembler -mcpu= flag to match + disassembler. + +Fri May 15 14:51:01 1998 Gavin Koch <gavin@cygnus.com> + + * gas/mips/mips.exp: Distinguish chains with 32-bit addresses. + * gas/mips/ld-ilocks-addr32.d : New. + +Wed May 13 15:06:31 1998 Doug Evans <devans@canuck.cygnus.com> + + * gas/m32r/uppercase.[sd]: Test for HIGH,SHIGH,LOW,SDA. + +Thu May 7 13:05:25 1998 Frank Ch. Eigler <fche@cygnus.com> + + * gas/mips/break20.[sd]: New tests for 20-bit operand break and + sddbp instructions. + * gas/mips/trap20.[sd]: New tests for 20-bit operand trap + instructions. + * gas/mips/mips.exp: Run them. + +Thu Apr 30 11:55:01 1998 Frank Ch. Eigler <fche@cygnus.com> + + * gas/d30v/{inst,array,opt,reloc}.d: Accept <symbol+offset> labels + in disassembly, where the offset is in hex and has a "0x" prefix. + +Tue Apr 28 16:38:34 1998 Frank Ch. Eigler <fche@cygnus.com> + + * gas/mips/lineno.[sd]: Assembly source line number test. + * gas/mips/mips.exp: Added lineno test. + +Wed Apr 8 18:45:17 1998 Jeffrey A Law (law@cygnus.com) + + * gas/testsuite/all/gas.exp: No longer expect failures for + difference of undefined symbols on mn10x00 targets. + +Mon Mar 23 10:47:33 1998 Frank Ch. Eigler <fche@cygnus.com> + + * gas/all/align.s: Back out ".section text" change below; + use ".text" again. + * gas/macros/semi.s: Ditto. + +Fri Mar 20 18:51:49 1998 Frank Ch. Eigler <fche@cygnus.com> + + * gas/all/align.s: Identify ".text" section explicitly. + * gas/macros/semi.s: Ditto. + + + +Mon Mar 2 13:30:40 1998 Doug Evans <devans@seba.cygnus.com> + + * gas/m32r/allinsn.[sd] (ldi8a,ldi16a): Delete. + (ldi16): Improve test. + (nop): Fix test. + +Thu Feb 12 20:12:39 1998 Ian Lance Taylor <ian@cygnus.com> + + * gasp/macro.out: Adjust to reflect the fact that keyword + arguments are now permitted after positional arguments. + +Wed Feb 4 15:27:44 1998 Nick Clifton <nickc@cygnus.com> + + * gas/arm/arm7t.d: Update to match latest assembler output. + +Wed Feb 4 15:40:00 1998 Geoffrey Keating <geoffk@ozemail.com.au> + + * gas/ppc/ppc.exp: New file. + * gas/ppc/astest.s, gas/ppc/astest.d: New test. + * gas/ppc/astest2.s, gas/ppc/astest2.d: New test. + +Sun Feb 1 21:43:54 1998 Jeffrey A Law (law@cygnus.com) + + * gas/mips/4010.s: Pad test code out to a 16byte boundary. + * gas/mips/4010.d: Corresponding changes. + * gas/mips/4100.s: Pad test code out to a 16byte boundary. + * gas/mips/4100.d: Corresponding changes. + * gas/mips/4650.s: Pad test code out to a 16byte boundary. + * gas/mips/4650.d: Corresponding changes. + +Fri Jan 30 14:09:13 1998 Ian Lance Taylor <ian@cygnus.com> + + * gas/mri/moveml.d: Add test comments, fix regexps. + +Thu Jan 29 13:34:49 1998 Doug Evans <devans@canuck.cygnus.com> + + * gas/m32r/{allinsn,high-1}.d: Allow # constant prefix to be missing. + +Thu Jan 29 09:43:50 1998 Richard Henderson <rth@cygnus.com> + + * gas/m68k/mri_moveml.[sd]: Moved to ... + * gas/mri/moveml.[sd]: ... here. + * gas/mri/mri.exp: Run it. + +Tue Jan 27 21:55:44 1998 Jeffrey A Law (law@cygnus.com) + + * gas/mips/4010.s: Add 4010 tests. + * gas/mips/4010.d: Expected output. + * gas/mips/4100.s: Add 4010 tests. + * gas/mips/4100.d: Expected output. + * gas/mips/4650.s: Add 4010 tests. + * gas/mips/4650.d: Expected output. + * gas/mips/mips.exp: Run the new tests. + * gas/mips/*.d: Pass the right processor model to objdump. + Fix minor cases where expected output was wrong due to opcode + conflicts. + +Tue Jan 27 05:35:02 1998 Richard Henderson <rth@cygnus.com> + + * gas/m68k/mri_moveml.[sd]: New testcase. + +Thu Jan 22 17:29:07 1998 Nick Clifton <nickc@cygnus.com> + + * gas/m32r/high-1.d: Add hash prefix to constants. + + * gas/m32r/allinsn.s: Add hash prefix to some constants. + * gas/m32r/allinsn.d: Add hash prefix to constants. + +Wed Jan 21 21:24:08 1998 Manfred Hollstein <manfred@s-direktnet.de> + + * gas/m88k/init.d: Fix hexadecimal offsets. + +Wed Jan 14 17:49:22 1998 Nick Clifton <nickc@cygnus.com> + + * gas/m32r/uppercase.d: Fix white space matching. + * gas/m32r/relax-1.d: Fix white space matching. + +Wed Jan 14 15:44:32 1998 Jeffrey A Law (law@cygnus.com) + + * gas/mips/div.d: Update for recent assembler changes. + * gas/mips/div-ilocks.d: Likewise. + +Wed Jan 14 11:13:06 1998 Doug Evans <devans@seba.cygnus.com> + + * gas/m32r/allinsn.d (cmpui): Update output to new format. + +Thu Dec 18 11:10:42 1997 Nick Clifton <nickc@cygnus.com> + + * gas/arm/inst.d: Updated to match latest disassembler changes. + + * gas/arm/arm7t.d: Updated to match latest disassembler changes. + +Tue Dec 16 22:19:25 1997 Ken Raeburn <raeburn@cygnus.com> + + * gas/mips/lb-xgot.d, gas/mips/rol.d, gas/mips/jal-svr4pic.d, + gas/mips/jal-xgot.d: Add assembler option to select a specific + target chip, the R3000. + * gas/mips/lb-xgot-ilocks.d: New test, specifically selecting + R3900. + * gas/mips/mips.exp: Run it. + + * gas/ieee-fp/x930509a.exp: Don't run IEEE FP tests for Vax + targets. + +Wed Oct 15 10:40:14 1997 Jeffrey A Law (law@cygnus.com) + + * gas/ieee-fp/x930509a.s: Tweak slightly to work on the PA. + + * gas/hppa/unsorted/unsorted.exp: Update for recent disassembler + changes. + +Thu Oct 9 18:10:44 1997 Doug Evans <dje@canuck.cygnus.com> + + * gas/sparc/set64.[sd]: `set' doesn't take negative arguments. + +Thu Oct 9 12:59:55 1997 Ian Lance Taylor <ian@cygnus.com> + + * gas/arm/arm7t.d: Update for recent disassembler changes. + * gas/h8300/ffxx1.d: Likewise. + +Wed Oct 8 16:22:50 1997 Doug Evans <dje@canuck.cygnus.com> + + * gas/sparc/reloc64.[sd]: Add testcases for %hix,%lox. + +Wed Oct 8 15:12:35 1997 Ian Lance Taylor <ian@cygnus.com> + + * gas/sparc/synth.d: Update for recent disassembler changes. + * gas/sparc/synth64.d: Likewise. + + * gas/mips/beq.s: Add .text to .globl to mark the symbol to as a + function symbol. + * gas/mips/jal.s: Likewise. + +Tue Oct 7 13:30:30 1997 Doug Evans <dje@canuck.cygnus.com> + + * gas/sparc/reloc64.[sd]: New testcase. + * gas/sparc/sparc.exp: Run it. + +Sat Oct 4 19:14:24 1997 Ian Lance Taylor <ian@cygnus.com> + + * gas/ieee-fp/x930509a.exp: Accept m68k listing format. + +Fri Oct 3 15:46:05 1997 Ian Lance Taylor <ian@cygnus.com> + + * gas/ieee-fp/x930509a.exp: Remove setup_xfail; it should now + work. Correct for big endian and for tabs in input file. + + * gas/alpha/fp.exp: Check for alpha-*-osf*, not alpha-*-osf1*. + * gas/alpha/fp.s: Change comment characters from ! to #. + +Thu Sep 18 11:17:53 1997 Doug Evans <dje@canuck.cygnus.com> + + * gas/sparc/splet.d: Update to new objdump output format. + * gas/sparc/{asi.d,membar.d,prefetch.d,rdpr.d,wrpr.d}: Likewise. + * gas/sparc/set64.[ds]: New testcase. + * gas/sparc/splet-2.[ds]: New testcase. + * gas/sparc/sparc.exp: Run them. + +Tue Sep 16 15:27:08 1997 Ken Raeburn <raeburn@cygnus.com> + + Merge changes from Martin Hunt: + + * gas/d30v/inst.s: Add some new tests. + + * gas/d30v/{inst, opt, reloc}.d: Update results with + new disassembler changes. + + * gas/d30v/inst.[sd]: Update examples for d*i instructions. + + * gas/d30v/*.d: Update all test results because + of new ".s" and ".l" extensions. + + * gas/d30v/inst.[sd]: Correct entry for mulx2h. + * gas/d30v/opt.[sd]: Correct st2w instruction. + + * gas/d30v/align.d: Change expected output. + + * gas/d30v/reloc.[sd]: Add test case. + + * gas/d30v/array.[sd]: New test case. + + * gas/d30v/opt.[sd]: Added more test cases. + + * gas/d30v/opt.s: Add test cases. + * gas/d30v/reloc.s: Fix a test case. + * gas/d30v/{opt,reloc}.d: Regenerate. + +Mon Sep 8 14:21:23 1997 Doug Evans <dje@canuck.cygnus.com> + + * gas/m32r/high-1.[ds]: New testcase. + * gas/m32r/m32r.exp: Run it. + +Mon Aug 25 11:04:24 1997 Doug Evans <dje@canuck.cygnus.com> + + * gas/m32r/relax-1.[ds]: New testcase. + * gas/m32r/m32r.exp: Run it. + +Thu Aug 14 23:49:49 1997 Doug Evans <dje@canuck.cygnus.com> + + * gas/arc: New directory + * gas/arc/{arc.exp,alias.[sd],branch.[sd],flag.[sd],insn3.[sd],j.[sd], + ld.[sd],math.[sd],sshift.[sd],st.[sd],warn.{exp,s}}: New files. + +Wed Aug 6 00:33:30 1997 Ian Lance Taylor <ian@cygnus.com> + + * config/default.exp: Set AS and GASP to as-new, not as.new. + +Tue Aug 5 12:33:23 1997 Ian Lance Taylor <ian@cygnus.com> + + * config/default.exp: Set NM to nm-new, not nm.new, to match + recent change in binutils build directory. + +Thu Jul 31 15:21:51 1997 Jeffrey A Law (law@cygnus.com) + + * gas/v850/range.s: New test. + * gas/v850/basic.exp: Run it. + +Tue Jul 29 14:35:02 1997 Jeffrey A Law (law@cygnus.com) + + * gas/v850/hilo2.s: New test. + * gas/v850/fepsw.s: New test. + * gas/v850/basic.exp: Run them. + +Tue Jul 15 13:03:17 1997 Doug Evans <dje@canuck.cygnus.com> + + * gas/m32r/uppercase.[sd]: New testcase. + * gas/m32r/m32r.exp: New file. + +Mon Jun 16 14:32:11 1997 Ian Lance Taylor <ian@cygnus.com> + + * gas/m68k/pcrel.d: Update for m68k disassembler changes. + * gas/m68k/operands.d: Likewise. + +Mon Jun 2 16:50:03 1997 Nick Clifton <nickc@cygnus.com> + + * gas/arm/arm.exp: Added changes from armT-970328-branch. + +Mon Jun 2 12:09:02 1997 Gavin Koch <gavin@cygnus.com> + + * gas/mips/mips.exp: The r3900 has interlocks for mul, but + not div. + +Mon Jun 2 12:03:32 1997 Gavin Koch <gavin@.cygnus.com> + + * gas/mips/mul.{d,s}: End the tests with no-ops. + +Mon Jun 2 11:48:58 1997 Gavin Koch <gavin@cygnus.com> + + * lib/gas-defs.exp (regexp_diff): Improve messages when one + file is shorter than the other. + +Wed May 7 16:18:30 1997 Manfred Hollstein <manfred@s-direktnet.de> + + * gas/m88k/init.{s,d}: New checks for proper padding of + .init sections. + * gas/m88k/m88.exp: Run them. + + * gas/m68k/t2.d: New file for check of presence of section + symbols on the m68k-motorola-sysv. + * gas/m68k/all.exp: Run t2 if [istarget m68*-motorola-sysv]. + +Wed May 7 16:12:24 1997 Ian Lance Taylor <ian@cygnus.com> + + * gas/all/gas.exp: Don't run cofftag test for m88k-coff. + + * gas/mips/lifloat.s: Update for recent changes to floating point + handling. + * gas/mips/lif-empic.d, gas/mips/lif-svr4pic.d: Likewise. + * gas/mips/lif-xgot.d, gas/mips/lifloat.d: Likewise. + + * gas/mips/mips.exp: Handle Irix 6 like Irix 5. + +Sat Apr 19 23:16:35 1997 Niklas Hallqvist <niklas@petra.appli.se> + + * gas/mips/mips.exp: Handle OpenBSD like NetBSD. + +Wed Apr 16 12:20:24 1997 Martin Hunt <hunt@cygnus.com> + + * gas/d30v/d30.exp: Add optimizer test case. + * gas/d30v/opt.s: Add conditional compilation tests. + * gas/d30v/opt.d: Rebuild. + +Tue Apr 15 18:10:01 1997 Gavin Koch <gavin@cygnus.com> + + * gas/mips/{delay.d,nodelay.d}: added. + +Mon Apr 7 12:57:45 1997 Doug Evans <dje@canuck.cygnus.com> + + * gas/m32r/allinsn.d: Update to new objdump output style. + +Fri Apr 4 13:19:39 1997 Ian Lance Taylor <ian@cygnus.com> + + * gas/all/float.s: Put a tab before .text, to keep the PA happy. + + * gas/arm/arm.exp: Only run inst and arm7t on targets which can + handle -EL. Add setup_xfail for thumb. + + * gas/h8300/ffxx1.d: Don't fail if BFD is 64 bits. + +Thu Apr 3 18:26:56 1997 Doug Evans <dje@canuck.cygnus.com> + + * gas/m32r/allinsn.{exp,s.d}: New testcases. + +Thu Mar 27 00:42:28 1997 Martin M. Hunt <hunt@pizza.cygnus.com> + + * gas/d30v/d30.exp: Add test case reloc. + * gas/d30v/reloc.[sd]: New files to test relocations. + +Sat Mar 15 17:21:46 1997 Ian Lance Taylor <ian@cygnus.com> + + * gas/arm/inst.d: Update for disassembler changes. + * gas/arm/arm7t.d: Likewise. + +Tue Mar 11 13:31:56 1997 Andreas Schwab <schwab@issan.informatik.uni-dortmund.de> + + * gas/m68k/op68000.d: Update for recent assembler bug fix. + +Wed Mar 5 13:01:24 1997 Jeffrey A Law (law@cygnus.com) + + * gas/all/gas.exp: xfail a couple tests for the mn10300. + +Mon Mar 3 11:41:00 1997 Fred Fish <fnf@cygnus.com> + + * gas/tic80/{add.d, float.d, regops2.d, relocs1.d, relocs1b.d, + relocs2.d, relocs2b.d}: Adjust to objdump format tweaks. + +Thu Feb 27 15:21:46 1997 Fred Fish <fnf@cygnus.com> + + * gas/tic80/{align.d, align.lst, align.s} New test for the + ".align" pseudop. + * gas/tic80/tic80.exp: Run the align test. + +Wed Feb 26 20:36:46 1997 Fred Fish <fnf@cygnus.com> + + * gas/tic80/{float.d, float.lst, float.s}: New tests for + simple floating point operands. + * gas/tic80/tic80.exp: Run the float test. + +Wed Feb 26 15:16:04 1997 Fred Fish <fnf@cygnus.com> + + * gas/tic80/{regops2.d, regops2.lst, regops2.s, regops3.d, + regops3.lst, regops3.s, regops4.d, regops4.lst, regops4.s}: + New tests for :m and :s operand modifiers. + * gas/tic80/tic80.exp: Run the regops2, regops3, and regops4 tests. + +Tue Feb 25 13:45:55 1997 Ian Lance Taylor <ian@cygnus.com> + + * gas/macros/semi.s: Force the final alignment to use a fill value + of 0. + + * gas/all/cond.s, gas/all/cond.d: New test. + * gas/all/gas.exp: Run it. + +Mon Feb 24 10:52:12 1997 Bob Manson <manson@charmed.cygnus.com> + + * lib/gas-defs.exp(gas_init): Added new parameter for script + name. + +Mon Feb 24 10:40:28 1997 Fred Fish <fnf@cygnus.com> + + * gas/tic80/{add.d, bitnum.d, ccode.d, cregops.d, endmask.d, + regops.d, relocs1.d, + (relocs1.c): Add file for reference. + (relocs1b.d): Split reloc table contents test to different test file. + (relocs2.c): Add test that uses various types (char, short, int, ...) of + static and global variables with data shuffling to generate lots of ld/st + instructions for the different types. + (relocs2.d): New file, expected code for relocs2 test. + (relocs2.lst): New file, TI assembler listing for reference. + (relocs2.s): New file, assembly source for relocs2 test. + (relocs2b.d): New file, expected reloc table contents for relocs2 test. + (tic80.exp): Run the relocs1b, relocs2, and relocs2b tests. + +Sun Feb 23 17:54:00 1997 Dawn Perchik <dawn@cygnus.com> + + * gas/all/itbl-test.c(main): Update function calls. + Remove parameters from itbl_get_reg_val and + change itbl_get_insn_name to itbl_get_field. + +Sun Feb 23 17:22:00 1997 Dawn Perchik <dawn@cygnus.com> + + * gas/mips/itbl: Add comments. + * gas/mips/itbl.s: Add comments. Prefix register names with $. + * gas/all/itbl: Generic table for testing for itbl support. + * gas/all/itbl.s: Generic assembly for testing for itbl support. + * gas/mips/itbl-test.c: Moved to gas/all. + * gas/all/itbl-test.c: Moved from gas/mips. + +Sat Feb 22 20:24:23 1997 Fred Fish <fnf@cygnus.com> + + * gas/tic80/{add.lst, bitnum.lst, ccode.lst, cregops.lst, + endmask.lst, regops.lst}: Remove ^M's from end of lines. + * gas/tic80/bitnum.s: Add comment to each line showing value + that symbolic BITNUM assembles to. Add coverage for raw + numeric values for the BITNUM operand. + * gas/tic80/bitnum.d: Update due to bitnum.s changes. + * gas/tic80/regops.d: Update due to opcode library additions + of floating point test BITNUM values that are ambiguous with + the integral ones. + * gas/tic80/relocs1.s: New test case that tests simple relocs. + * gas/tic80/relocs1.d: Expected output for above. + * gas/tic80/relocs1.lst: TI assembler listing for above. + * gas/tic80/tic80.exp: Add relocs1 test. + +Fri Feb 21 14:23:14 1997 Martin M. Hunt <hunt@pizza.cygnus.com> + + * gas/d30v/{align.d, align.s, d30.exp, guard.d, guard.s, + inst.d, inst.s, opt.d, opt.s}: Test files for D30V. + +Wed Feb 19 00:55:29 1997 Ian Lance Taylor <ian@cygnus.com> + + * gas/macros/semi.s, gas/macros/semi.d: New test. + * gas/macros/macros.exp: Run it. + * gas/mri/semi.s, gas/mri/semi.d: New test. + * gas/mri/mri.exp: Run it. + +Tue Feb 18 13:37:06 1997 Jeffrey A Law (law@cygnus.com) + + * gas/hppa/unsorted/unsorted.exp (align4 tests): Tweak expected + output. + +Fri Feb 14 17:56:27 1997 Ian Lance Taylor <ian@cygnus.com> + + * gas/all/align.d, gas/all/align.s: New test. + * gas/all/gas.exp: Run it. + +Thu Feb 13 14:44:05 1997 Ian Lance Taylor <ian@cygnus.com> + + * gas/mips/mips16.d: Correct PC relative instruction bytes. + +Wed Feb 12 12:33:08 1997 Ian Lance Taylor <ian@cygnus.com> + + * gas/mips/lif-svr4pic.d: Pass -EB when running the assembler. + * gas/mips/lif-xgot.d: Likewise. + * gas/mips/ulh-svr4pic.d: Likewise. + * gas/mips/ulh-xgot.d: Likewise. + + * gas/mips/mips16.d: Update for yet another change in disassembly + output (this one is spacing only). + +Tue Feb 11 14:45:39 1997 Fred Fish <fnf@cygnus.com> + + * gas/tic80/{add.d, add.lst, add.s, bitnum.d, bitnum.lst, bitnum.s, + ccode.d, ccode.lst, ccode.s, cregops.d, cregops.lst, cregops.s, + endmask.d, endmask.lst, endmask.s, regops.d, regops.lst, regops.s, + tic80.exp}: New files for TIc80 test cases. + +Tue Feb 11 15:46:27 1997 Ian Lance Taylor <ian@cygnus.com> + + * gas/mips/mips16.d: Update for change in disassembly output. + +Mon Feb 10 22:24:00 1997 Dawn Perchik <dawn@cygnus.com> + + * gas/mips/itbl-test.c: Add copyright message and fix indentation. + +Mon Feb 10 17:54:00 1997 Dawn Perchik <dawn@cygnus.com> + + * gas/mips/itbl-test.c: New file. Stand-alone assembler and + dissassembler for itbl support. + +Mon Feb 10 17:20:00 1997 Dawn Perchik <dawn@cygnus.com> + + * gas/mips/itbl: New file. Instruction Spec for testing --itbl + option. + * gas/mips/itbl.s: New file. Assembly with ne2w instructions + specified in itbl. + +Fri Feb 7 16:42:53 1997 Bob Manson <manson@charmed.cygnus.com> + + * gasp/gasp.exp: Use prune_warnings instead of prune_system_crud. + * lib/gas-defs.exp: Ditto. + +Mon Feb 3 15:46:05 1997 Ian Lance Taylor <ian@cygnus.com> + + * gas/arm/inst.d, gas/arm/arm7t.d: Pass --prefix-addresses to + objdump. Update for current relocation printing style. + +Thu Jan 30 11:57:33 1997 Ian Lance Taylor <ian@cygnus.com> + + * gas/mips/mips16.d: Update for disassembler changes. + +Thu Jan 23 03:15:06 1997 Angela Marie Thomas (angela@cygnus.com) + + * gas/mips/mips.exp: set ilocks for all 4100/4300 + +Thu Jan 2 16:49:17 1997 Ian Lance Taylor <ian@cygnus.com> + + * gas/mips/mips16.s, gas/mips/mips16.d: New test. + * gas/mips/mips.exp: Run mips16 test. + + * gas/mips/mips.exp: Run dli test unconditionally. + * gas/mips/dli.s: Add text symbol. Add nops to round to 16 byte + boundary. + * gas/mips/dli.d: Corresponding changes. + +Tue Dec 31 13:03:16 1996 Ian Lance Taylor <ian@cygnus.com> + + * gas/sparc/synth.d: Use --prefix-addresses for objdump. + * gas/sparc/synth64.d: Likewise. + +Tue Dec 24 16:30:58 1996 Angela Marie Thomas (angela@cygnus.com) + + * gas/mips/*-ilocks.d: Fix regexps to resemble disassembled output. + +Fri Dec 13 13:05:33 1996 Ian Lance Taylor <ian@cygnus.com> + + * gas/mips/*.[sd]: Add explicit nops, sometimes controlled by + .ifdef, to accomodate change to avoid default alignment on + embedded systems. + +Wed Dec 11 09:26:01 1996 Jeffrey A Law (law@cygnus.com) + + * gas/mn10200/basic.exp (do_movb): Fix bit pattern for + "movb dm,(an)". + +Tue Dec 10 13:01:05 1996 Jeffrey A Law (law@cygnus.com) + + * gas/mn10300/basic.exp: Update after endianness changes to + the assembler. + + * gas/mn10200/{mov1.s,mov2.s,mov3.s,mov4.s,movx.s}: New tests. + * gas/mn10200/{movb.s, movbu.s}: Likewise. + * gas/mn10200/basic.exp: Run them. + +Mon Dec 9 17:08:38 1996 Jeffrey A Law (law@cygnus.com) + + * gas/mn10200/*.s: New tests for the mn10200 assembler. + * gas/mn10200/basic.exp: Run them. + +Fri Dec 6 15:35:04 1996 Jeffrey A Law (law@cygnus.com) + + * gas/mn10300/*.s: Remove '$' register prefixing. + +Mon Nov 25 16:35:33 1996 Doug Evans <dje@canuck.cygnus.com> + + * gas/sparc-solaris/addend.exp: Fix patterns, you can't assume + \r will be present. + +Mon Nov 25 13:45:02 1996 Ian Lance Taylor <ian@cygnus.com> + + * gas/m68k/*.d: Update for disassembler changes. + * gas/mri/*.d: Likewise. + +Mon Nov 25 11:38:37 1996 Jeffrey A Law (law@cygnus.com) + + * gas/mn10300/*.s: Use '$' as register prefix for + all register operands. + +Thu Nov 21 11:52:54 1996 Jeffrey A Law (law@cygnus.com) + + * gas/all/gas.exp: xfail a couple tests for the mn10300. + +Wed Nov 20 11:31:41 1996 Jeffrey A Law (law@cygnus.com) + + * gas/mn10300/other.s: Update for correct syntax on a + few instructions (those with register lists). + * gas/mn10300/basic.exp: Corresponding changes. + +Tue Nov 19 13:36:57 1996 Jeffrey A Law (law@cygnus.com) + + * gas/mn10300/movm.s: Update for correct syntax. + * gas/mn10300/basic.exp: Update expected movm bit patterns. + +Fri Nov 15 13:57:42 1996 Jeffrey A Law (law@cygnus.com) + + * gas/mn10300/other.s: Put parens around register + argument in calls and jmp instructions. + +Wed Nov 13 13:16:04 1996 Jeffrey A Law (law@cygnus.com) + + * gas/h8300/ffxx1.d: Update for recent disassembler changes. + +Mon Nov 11 16:03:24 1996 Jeffrey A Law (law@cygnus.com) + + * gas/hppa/reloc/reloc.exp: Pass "--prefix-addresses" to objdump + as needed. + * gas/hppa/unsorted/unsorted.exp: Likewise. + +Thu Nov 7 00:27:52 1996 Jeffrey A Law (law@cygnus.com) + + * gas/mn10300/basic.exp: Check opcode insertion for + extended instructions. + * gas/mn10300/extend.s: Tweak constants for better + testsuite coverage. + +Wed Nov 6 13:50:07 1996 Jeffrey A Law (law@cygnus.com) + + * gas/mn10300/basic.exp: Test insertion of operands + into call and jmp instructions with 32bit offsets. + Fix typo in bit test patterns. + * gas/mn10300/other.s: Tweak constants to improve + testsuite coverage. + + * gas/mn10300/basic.exp: Test insertion of 32bit operand + in calls, btst, bclr & bset instructions. + + * gas/mn10300/*.s: Tweak constants in 32bit insns for + better testing coverage. + * gas/mn10300/basic.exp: Test insertion of most 32bit + operands. + +Tue Nov 5 13:33:12 1996 Jeffrey A Law (law@cygnus.com) + + * gas/mn10300/basic.exp: Check bit patterns for indexed mov, + movbu, movhu instructions. Check bit patterns for more bit + operations. Check bit patterns for various 16bit call, retf + and ret instructions. + * gas/mn10300/other.s: Update operands for better test coverage. + +Mon Nov 4 12:55:11 1996 Jeffrey A Law (law@cygnus.com) + + * gas/mn10300/basic.exp: Check bit patterns for a couple more + mov and cmp instructions. + +Tue Oct 29 17:05:43 1996 Ian Lance Taylor <ian@cygnus.com> + + * gas/mips/*.d: Update for disassembler changes. + +Wed Oct 16 22:39:50 1996 Jeffrey A Law (law@cygnus.com) + + * gas/v850/reloc.s: New tests. + * gas/v850/basic.exp: Run them. + +Mon Oct 14 13:52:55 1996 Ian Lance Taylor <ian@cygnus.com> + + * gas/mips: Add symbols to several testsuites, since the ELF + assembler now always builds a symbol table, which means that + objdump will no longer report `No symbols in FILE'. Change the + expected output accordingly. + +Thu Oct 10 13:11:48 1996 Jeffrey A Law (law@cygnus.com) + + * gas/mn10300/basic.exp: Check bit patterns for instructions + with a single 8bit or 16bit immediate operand. + + * gas/mn10300/basic.exp: Check bit patterns for many + instructions. Add missing test in do_mov1. + * gas/mn10300/mov1.s: Add missing test. + +Wed Oct 9 14:15:18 1996 Jeffrey A Law (law@cygnus.com) + + * gas/mn10300/{add.s, bcc.s, bit.s, cmp.s, ext.s}: New tests. + * gas/mn10300/{extend.s logical.s, loop.s, mov1.s}: Likewise. + * gas/mn10300/{mov2.s, mov3.s, mov4.s, movbu.s}: Likewise. + * gas/mn10300/{movhu.s, movm.s, muldiv.s, other.s}: Likewise. + * gas/mn10300/{shift.s, sub.s}: Likewise. + * gas/mn10300/basic.exp: Run them. + +Thu Oct 3 09:57:03 1996 Jeffrey A Law (law@cygnus.com) + + * gas/mn10200, gas/mn10300: New directories for Matsushita + mn10200 and mn10300 tests. + +Tue Oct 1 15:38:28 1996 Ian Lance Taylor <ian@cygnus.com> + + * lib/gas-defs.exp (gas_version): Fix for current version + printing. + +Sun Sep 29 07:55:58 1996 Doug Evans <dje@canuck.cygnus.com> + + * gas/sparc/splet.d: Fix typo in cpusha result. + +Mon Sep 23 12:33:31 1996 Ian Lance Taylor <ian@cygnus.com> + + * gas/m68k/fmoveml.s, gas/m68k/fmoveml.d: Add tests for fmovemx. + +Wed Sep 18 12:14:06 1996 Ian Lance Taylor <ian@cygnus.com> + + * gas/all/cofftag.s: Use .p2align rather than .align. + +Fri Sep 13 15:28:04 1996 Jeffrey A Law (law@cygnus.com) + + * gas/h8300/macs.s: Add "stmac" instructions. + * gas/h8300/basic.exp: Test them. + +Thu Sep 12 10:28:44 1996 James G. Smith <jsmith@cygnus.co.uk> + + * gas/arm/thumb.s (back): Check assembly of Thumb BL. + +Mon Sep 9 14:37:00 1996 Ian Lance Taylor <ian@cygnus.com> + + * gas/mips/mips4.s, gas/mips/mips4.d: Use $fccN for condition code + registers. + +Fri Sep 6 18:23:54 1996 James G. Smith <jsmith@cygnus.co.uk> + + * gas/mips/dli.{s,d}: More test cases added. + +Wed Sep 4 11:47:29 1996 James G. Smith <jsmith@cygnus.co.uk> + + * gas/mips/mips.exp: Add check for dli macro instruction. + * gas/mips/dli.{s,d}: Added. + +Sat Aug 31 01:25:03 1996 Jeffrey A Law (law@cygnus.com) + + * gas/v850/basic.exp (do_mem): Check bit patterns for short + load/store instructions. Remove xfails for short load/store + instructions. + * gas/v850/mem.s: Offsets for short load/store operands + are unsigned. + + * gas/v850/basic.exp (do_branch): Check offsets in branch insns. + (do_jumps): Likewise. + +Fri Aug 30 00:37:55 1996 Jeffrey A Law (law@cygnus.com) + + * gas/v850/misc.s: Tweak register numbers for better testing. + * gas/v850/basic.exp (do_misc): Corresponding changes. + + * gas/v850/hilo.s: New testfile. + * gas/v850/basic.exp: Run hilo tests. + +Thu Aug 29 11:32:23 1996 James G. Smith <jsmith@cygnus.co.uk> + + * gas/arm/arm7t.d: Explicitly force little-endian assembly. + +Fri Aug 23 11:02:55 1996 Jeffrey A Law (law@cygnus.com) + + * gas/v850/basic.exp (do_move): Test instruction bit patterns. + * gas/v850/move.s: Tweak constants for better testing. + + * gas/v850/basic.exp (do_mem): Test instruction bit patterns. + xfail sst and sld tests. + (do_mov): Remove bogus xfail. + * gas/v850/mem.s: sst and sld instructions can only index from + "ep" register. + + * gas/v850/basic.exp (do_logical): Test instruction bit patterns. + Update addresses. + * gas/v850/logical.s: Tweak constants for better testing. + + * gas/v850/basic.exp (do_jump): Test instruction bit patterns, + but not displacements (yet). + + * gas/v850/basic.exp (do_compare): Test instruction bit patterns. + + * gas/v850/basic.exp (do_branch): Test instruction bit patterns, + but not displacements (yet). + + * gas/v850/basic.exp (do_bit): Test instruction bit patterns. + + * gas/v850/basic.exp (do_arith): Test instruction bit patterns. + * gas/v850/arith.s: Tweak constants for better testing. + + * gas/v850/basic.exp (do_misc): No longer expect failures + assembling "ldsr" and "stsr" opcodes. + * gas/v850/misc.s: Re-enable assembling of "ldsr" and "stsr" + opcodes. + + * gas/v850/basic.exp (do_misc): No longer expect failures + assembling "trap" opcodes. + * gas/v850/misc.s: Re-enable assembling of "trap" opcodes. + + * gas/v850: New directory with v850 tests. + +Fri Aug 16 00:19:10 1996 Jeffrey A Law (law@cygnus.com) + + * gas/hppa/basic/purge.s: Use "%sr4" on pitlb, pitlbe + fic and fice instructions to test 3bit space identifiers. + * gas/hppa/basic/system.s: Similarly for iitlba and + iitlbp. + * gas/hppa/basic/basic.exp: Corresponding changes. + +Thu Aug 15 16:25:05 1996 James G. Smith <jsmith@cygnus.co.uk> + + * gas/arm/arm.exp: Change inst.s test to check objdump. + * gas/arm/inst.d: Added. + +Thu Aug 15 16:06:02 1996 James G. Smith <jsmith@cygnus.co.uk> + + * gas/arm/thumb.s: Added. + * gas/arm/immed.s: Added. + * gas/arm/arch4t.s: Added. + * gas/arm/arm.exp: Updated to run the new tests. + +Tue Aug 6 11:06:29 1996 Jeffrey A Law (law@cygnus.com) + + * gas/h8300/misch.s: Reenable "eepmov.w" test. + * gas/h8300/miscs.s: Likewise. + * gas/h8300/h8300.exp: Check for correct assembly of "eepmov.w" + on the H8/300H and H8/S. Don't expect it to fail. + +Wed Jul 31 10:57:44 1996 Doug Evans <dje@canuck.cygnus.com> + + * gas/sparc/asi.s: Update ASI_AS_IF_USER_{PRIMARY,SECONDARY}_LITTLE. + +Wed Jul 31 15:55:12 1996 James G. Smith <jsmith@cygnus.co.uk> + + * gas/arm/arm7t.s: Added. + * gas/arm/arm7t.d: Added. + * gas/arm/arm.exp: Updated to run the new test. + +Mon Jul 8 14:27:39 1996 Ian Lance Taylor <ian@cygnus.com> + + * gas/m68k/pcrel.d: Rename from schwab.d. + * gas/m68k/pcrel.s: Rename from schwab.s. + +Mon Jul 8 14:23:26 1996 Andreas Schwab <schwab@issan.informatik.uni-dortmund.de> + + * gas/m68k/schwab.d: Correct for ELF format. + * gas/m68k/all.exp: Run "schwab" test for all targets. + +Thu Jul 4 14:23:36 1996 Ian Lance Taylor <ian@cygnus.com> + + Avoid DOS file naming problems: + * gas/h8300/branch.s: Rename from branches.s. + * gas/h8300/branchh.s: Rename from branchesh.s. + * gas/h8300/branchs.s: Rename from branchess.s. + * gas/h8300/rotsh.s: Rename from rotshift.s. + * gas/h8300/rotshh.s: Rename from rotshifth.s. + * gas/h8300/rotshs.s: Rename from rotshifts.s. + * gas/h8300/h8300.exp: Corresponding changes. + +Thu Jul 4 14:01:46 1996 James G. Smith <jsmith@cygnus.co.uk> + + * gas/mips/mips.exp: Add new tests for processors with interlocks + on div and mul. + * gas/mips/div-ilocks.d: Added. + * gas/mips/mul-ilocks.d: Added. + +Wed Jul 3 14:20:04 1996 Ian Lance Taylor <ian@cygnus.com> + + * gas/all/gas.exp: Remove setup_xfail for h8300*-*-* for two tests + which now pass. + * gas/h8300/h8300.exp: Fix regexp of mov32bug test to work on a 64 + bit host. + +Sat Jun 29 18:21:51 1996 Ian Lance Taylor <ian@cygnus.com> + + * gas/all/gas.exp: Add setup_xfail for vax*-*-vms* for 930509a + test. + * gas/vax/quad.exp: Expect a nop after the movq. + +Tue Jun 18 12:39:49 1996 Jeffrey A. Law <law@rtl.cygnus.com> + + * gas/h8300/cbranchh.s: Switch into h8300h mode. + * gas/h8300/h8300.exp (H8/300H misc tests): Fix test names. + + * gas/h8300/{addsubs.s,bitops1s.s,bitops2s.s}: New tests for the + H8/S. + * gas/h8300/{bitops3.s,bitops4.s,cbranchs.s,logicals.s}: Likewise. + * gas/h8300/{branchess.s,compares.s,macs.s,decimals.s}: Likewise. + * gas/h8300/{incdecs.s,divmuls.s,miscs.s,multiples.s}: Likewise. + * gas/h8300/{movbs.s,movws.s,movls.s,pushpops.s}: Likewise. + * gas/h8300/{rotshifts.s,extends.s}: Likewise. + * gas/h8300/h8300.exp: Run them. + +Mon Jun 10 14:14:40 1996 Ian Lance Taylor <ian@cygnus.com> + + * gas/all/cofftag.s, gas/all/cofftag.d: New test for COFF enum tag + with the same name as a global variable. + * gas/all/gas.exp: Run cofftag test for any COFF target. + +Thu Jun 6 12:30:05 1996 Ian Lance Taylor <ian@cygnus.com> + + * gas/m68k/all.exp: Pass -m68020 when assembling the disperr.s + test. + +Fri May 31 10:11:13 1996 Jeffrey A Law (law@cygnus.com) + + * gas/h8300/h8300.exp: Fix add.l test for H8/300H. + +Wed May 29 16:35:43 1996 Ian Lance Taylor <ian@cygnus.com> + + * gas/mips/jal-xgot.d: Correct for 64 bit output. + +Thu Apr 25 19:31:59 1996 Doug Evans <dje@canuck.cygnus.com> + + * gas/sparc/sparc.exp: Only run sparclet tests if sparclet. + +Wed Apr 24 17:06:18 1996 Ian Lance Taylor <ian@cygnus.com> + + * gas/m68k/op68000.d: Add statements now caught by gas. + +Mon Apr 22 16:45:12 1996 Doug Evans <dje@canuck.cygnus.com> + + * gas/sparc/splet.[ds]: New tests for sparclet extensions. + * gas/sparc/sparc.exp: Run them. + +Mon Apr 15 17:25:18 1996 Ian Lance Taylor <ian@cygnus.com> + + * gas/mips/la.d: Updated for April 5 MIPS assembler changes. + * gas/mips/lb.d, gas/mips/ld.d, gas/mips/sb.d: Likewise. + * gas/mips/uld.d, gas/mips/ulh.d, gas/mips/ulw.d: Likewise. + * gas/mips/usd.d, gas/mips/ush.d, gas/mips/usw.d: Likewise. + +Wed Apr 10 14:27:51 1996 Jeffrey A Law (law@cygnus.com) + + * gas/h8300/mov32bug.s: New test. + * gas/h8300/h8300.exp: Run it. + +Fri Apr 5 10:13:28 1996 Jeffrey A Law (law@cygnus.com) + + * gas/h8300/{addsubh.s,bitops1h.s,bitops2h.s}: New h8300h tests. + * gas/h8300/{bitops3h.s,bitops4h.s,branchesh.s}: New h8300h tests. + * gas/h8300/{cbranchh.s,compareh.s,decimalh.s}: New h8300h tests. + * gas/h8300/{divmulh.s,incdech.s,logicalh.s}: New h8300h tests. + * gas/h8300/{misch.s,movbh.s,movwh.s}: New h8300h tests. + * gas/h8300/{pushpoph.s,rotshifth.s}: New h8300h tests. + * gas/h8300/h8300.exp: Run them. + + * gas/h8300/{movb.s,movw.s}: Correct predecrement syntax. + + * gas/h8300/h8300.exp: Fix typos in bitops4 and movb tests. + + * gas/h8300/{addsub.s,bitops1.s,bitops2.s}: New h8300 tests. + * gas/h8300/{bitops3.s,bitops4.s,branches.s}: New h8300 tests. + * gas/h8300/{cbranch.s,compare.s,decimal.s}: New h8300 tests. + * gas/h8300/{divmul.s,incdec.s,logical.s}: New h8300 tests. + * gas/h8300/{misc.s,movb.s,movw.s}: New h8300 tests. + * gas/h8300/{pushpop.s,rotshift.s}: New h8300 tests. + * gas/h8300/h8300.exp: Run them. + +Fri Mar 15 17:16:24 1996 Ian Lance Taylor <ian@cygnus.com> + + * gas/sparc/synth.d: Don't require sparc in the file format, since + it won't be there on SunOS. + +Thu Mar 7 14:51:23 1996 Doug Evans <dje@charmed.cygnus.com> + + * gas/sparc/synth.[ds]: New testcase. + * gas/sparc/sparc.exp: Run it. + +Fri Mar 1 12:01:48 1996 Jeffrey A Law (law@cygnus.com) + + * gas/all/gas.exp: xfail difference of two undefined symbols + and difference of forward references for the h8300. + +Thu Feb 22 16:40:31 1996 Ian Lance Taylor <ian@cygnus.com> + + * gas/mips/lb-xgot.d: Correct. + +Mon Feb 19 02:43:36 1996 Doug Evans <dje@charmed.cygnus.com> + + * gas/sparc/{asi,membar,prefetch,rdpr,synth64,wrpr}.d: Pass -Av9 + to gas. + * gas/sparc/addend.exp: Execute for any sparc cpu. + * gas/sparc/{mismatch.exp,mism-1.s}: New test. + +Wed Feb 14 13:49:59 1996 Ian Lance Taylor <ian@cygnus.com> + + * gas/mips/jal-xgot.d, gas/mips/la-xgot.d: New tests. + * gas/mips/lb-xgot.d, gas/mips/ld-xgot.d: New tests. + * gas/mips/lif-xgot.d, gas/mips/ulh-xgot.d: New tests. + * gas/mips/mips.exp: Run new tests if svr4pic. + +Sat Jan 27 13:27:45 1996 Doug Evans <dje@charmed.cygnus.com> + + * lib/gas-dg.exp (gas-dg-test): Delete default_flags and libs args. + +Fri Jan 26 14:24:01 1996 Jeffrey A Law (law@cygnus.com) + + * gas/hppa/unsorted/unsorted.exp: Update for objdump changes. + +Wed Jan 10 12:40:31 1996 Ian Lance Taylor <ian@cygnus.com> + + * gas/mips/*.d: Update for changes to disassembler. + +Wed Jan 3 22:59:53 1996 Ian Lance Taylor <ian@cygnus.com> + + * gas/mips/ulh-svr4pic.d: Update for tc-mips.c load_address + change. + +Fri Nov 17 10:32:25 1995 Ian Lance Taylor <ian@cygnus.com> + + * gas/mri/immconst.d: New test. + * gas/mri/mri.exp: Run it. + * gas/mri/constants.s: Test immediate constants. + * gas/mri/constants.d: Corresponding change. + + * gas/m68k/link.s: Add nop to pad to eight byte boundary. + * gas/m68k/link.d: Corresponding change. + +Sun Nov 12 21:28:11 1995 Jeffrey A Law (law@cygnus.com) + + * gas/hppa/unsorted/brlenbug.s: New test. + * gas/hppa/unsorted/unsorted.exp: Run it. + +Sun Nov 5 12:49:27 1995 Ian Lance Taylor <ian@cygnus.com> + + * gas/mips/beq.s: Declare text_label global. + * gas/mips/jal.s: Likewise. + +Fri Nov 3 12:35:07 1995 Ian Lance Taylor <ian@cygnus.com> + + * gas/m68k/link.s: Use "&" instead of "#" for immediate values. + + * gas/m68k/fmoveml.s, gas/m68k/fmoveml.d: New test. + * gas/m68k/all.exp: Run it. + +Thu Nov 2 23:11:05 1995 Ian Lance Taylor <ian@cygnus.com> + + * gas/m68k/link.s, gas/m68k/link.d: New test. + * gas/m68k/all.exp: Run it. + +Tue Oct 24 10:57:20 1995 Jeffrey A Law (law@cygnus.com) + + * gas/hppa/basic/basic.exp: Test lci and syncdma instructions. + * gas/hppa/basic/system.s: Corresponding changes. + +Fri Oct 6 17:13:35 1995 Ken Raeburn <raeburn@cygnus.com> + + * gas/m68k/operands.d: Don't require a fixed number of leading + zeros in any number. + + * gas/m68k/operands.s, gas/m68k/bitfield.s: Use "&" instead of "#" + for immediate values. + +Fri Oct 6 10:54:13 1995 Doug Evans <dje@canuck.cygnus.com> + + * gas/arm/arm.exp: Renamed from gas.exp. + * gas/arm/le-fpconst.[sd]: New testcase. + +Fri Sep 29 15:12:10 1995 Ian Lance Taylor <ian@cygnus.com> + + * gas/mri/mri.exp: Only run tests for m68k target. + +Mon Sep 25 12:31:46 1995 Ian Lance Taylor <ian@cygnus.com> + + * gas/mri/mri.exp: Add setup_xfail for arm*-*-* for constants + test. + +Thu Sep 21 01:26:08 1995 Jeff Law (law@snake.cs.utah.edu) + + * gas/sh/fp.s (fmac): Update for new assembly syntax. + +Mon Sep 18 14:04:34 1995 Ian Lance Taylor <ian@cygnus.com> + + * lib/gas-defs.exp (gas_run): Call prune_system_crud. + (run_dump_test, objdump): Likewise. + +Thu Sep 14 13:10:10 1995 Doug Evans <dje@canuck.cygnus.com> + + * gas/sparc/{wrdr.[ds],rdpr.[ds]}: New tests. + * gas/sparc/sparc.exp: Run them. + +Wed Sep 13 16:35:51 1995 Ian Lance Taylor <ian@cygnus.com> + + * Makefile.in, configure.in: Remove; the testsuite is now run + directly from the gas Makefile. + +Mon Sep 11 11:44:23 1995 Ian Lance Taylor <ian@cygnus.com> + + * gas/mri/empty.s: New file. + * gas/mri/mri.exp: Test assembling empty.s. + * gas/mri/comment.s: Add a couple more comment variants. + + * gas/mri/mri.exp: Add xfail for the expr test for all hppa + targets. + +Wed Sep 6 21:39:23 1995 Ian Lance Taylor <ian@cygnus.com> + + * gas/mri/comment.s, gas/mri/comment.d: New test. + * gas/mri/mri.exp: Run it. + * gas/mri/expr.s: Remove whitespace in operand field. + * gas/mri/for.s: Add comments for further testing. + * gas/macros/test2.s: Put in an upper case ELSE to test case + insensitivity. + +Wed Aug 30 16:12:03 1995 Doug Evans <dje@canuck.cygnus.com> + + * gas/sparc/{prefetch.[ds],synth64.[ds]}: New tests. + +Tue Aug 29 18:59:33 1995 Doug Evans <dje@canuck.cygnus.com> + + * gas/sparc/sparc.exp: New file. + * gas/sparc/{asi.[ds],membar.[ds]}: New tests. + +Mon Aug 21 14:39:29 1995 Ian Lance Taylor <ian@cygnus.com> + + * gas/macros/*: New tests for macros. + + * gas/mri/common.s: Use data, not .data. + + * gasp/pl3.out: Update for changes in commented source output when + LOCAL is used. + +Sat Aug 19 17:36:17 1995 Ian Lance Taylor <ian@cygnus.com> + + * gasp/gasp.exp (gasp_test): Call prune_system_crud on the output + of diff. + * lib/gas-defs.exp: Define prune_system_crud if it is not already + defined. + +Fri Aug 18 11:09:38 1995 Ian Lance Taylor <ian@cygnus.com> + + * gasp/mri/*.out: Use ;, not !, for the comment character. + +Wed Aug 16 12:24:12 1995 Ian Lance Taylor <ian@cygnus.com> + + * gas/mri/mri.exp: Change hppa*-*-* expected failures to only + expect failure for targets which use SOM. + + * lib/gas-defs.exp (run_dump_test): If the program to run does not + exist, mark the test as untested. + + * gas/mri/mri.exp: Add setup_xfail for i960 b.out targets for + common test. + + * lib/gas-defs.exp (run_dump_test): Name the output file dump.o, + rather than using an implicit a.out. + + * gas/mri/for.s: Add nop to round out to four byte boundary. + * gas/mri/repeat.s: Likewise. + * gas/mri/while.s: Likewise. + * gas/mri/for.d: Expected added nop. + * gas/mri/repeat.d: Likewise. + * gas/mri/while.d: Likewise. + + * gas/mips/*.d: Change all test names to say MIPS. + +Tue Aug 15 15:42:33 1995 Ian Lance Taylor <ian@cygnus.com> + + * gas/mri/for.d, gas/mri/for.s: New test. + * gas/mri/if.d, gas/mri/if.s: New test. + * gas/mri/repeat.d, gas/mri/repeat.s: New test. + * gas/mri/while.d, gas/mri/while.s: New test. + * gas/mri/mri.exp: Run the new tests. + +Mon Aug 14 16:03:07 1995 Ian Lance Taylor <ian@cygnus.com> + + * gas/mri/expr.d: Permit leading zeroes, in case we're using a + 64-bit BFD. + + * gasp/mri/*: New tests. + * gasp/gasp.exp: Run them. Also, clean up the test names used in + pass and fail. + +Sun Aug 13 00:39:24 1995 Jeff Law (law@snake.cs.utah.edu) + + * gas/sh/basic.exp: Update now that we know the right + bit patters for the new sts instructions. + +Thu Aug 10 00:46:21 1995 Ian Lance Taylor <ian@cygnus.com> + + * gas/mri/char.d: Fix for little endian machines. + * gas/mri/float.d: Likewise. + +Wed Aug 9 15:34:36 1995 Ian Lance Taylor <ian@cygnus.com> + + * gas/all/struct.s, gas/all/struct.d: New test. + * gas/all/gas.exp: Run it. + +Tue Aug 8 17:11:39 1995 Ian Lance Taylor <ian@cygnus.com> + + * gas/mri/common.s, gas/mri/common.d: New test. + * gas/mri/mri.exp: Run it. + +Mon Aug 7 22:39:28 1995 Ian Lance Taylor <ian@cygnus.com> + + * gas/mri/mri.exp: Add setup_xfail for a29k*-*-* for constants + test. + + * gasp/crash1.out, gasp/macro.out, gasp/sfunc.out: Complete + truncated files, so that the tests pass. + + * gas/mri/mri.exp: Add setup_xfail for hppa*-*-* for equ, + constants, and expr. + + * gas/m68k/all.exp: Run schwab test on hpux*, not just hpux. Run + on vxworks*, not just vxworks5.1. + + * lib/gas-defs.exp (fail_phase, pass_phase): Remove. + (run_dump_test): Just call pass or fail. + + * gas/m68k/operands.s, gas/m68k/operands.d: New test. + * gas/m68k/op68000.d: New test. + * gas/m68k/cas.s, gas/m68k/cas.d: New test. + * gas/m68k/bitfield.s, gas/m68k/bitfield.d: New test. + * gas/m68k/schwab.d: Run objdump with -j .text. Adjust for + changes to disassembler. + * gas/m68k/all.exp: Run new tests. Run schwab test for + m68k-*-coff*. + +Mon Aug 7 03:01:32 1995 Jeff Law (law@snake.cs.utah.edu) + + * gas/sh/*: New tests for the hitachi-sh. + +Tue Aug 1 18:02:47 1995 Ian Lance Taylor <ian@cygnus.com> + + * gas/mri/*: New tests for MRI mode. + + * lib/gas-defs.exp (run_dump_test): Support using objcopy. Dump + program executions to the log file before running them. Use the + simple program name, rather than the path to the binary being run, + in pass/fail messages. + (regexp_diff): If the regexp file has the special comment #pass, + stop checking at that point. + * config/default.exp: Set NM, NMFLAGS, OBJCOPY, and OBJCOPYFLAGS, + if they are not already set. + +Tue Aug 1 11:41:30 1995 steve chamberlain <sac@slash.cygnus.com> + + * Makefile.in: Remove superfluous runtest gasp. + +Mon Jul 31 18:19:26 1995 steve chamberlain <sac@slash.cygnus.com> + + * gasp/*: New. + * Makefile.in: Use gasp tests. + * config/default.exp: Add gasp stuff. + +Thu Jul 20 18:56:48 1995 Jeff Law (law@snake.cs.utah.edu) + + * gas/all/gas.exp: Disable tests that are not appropriate for + the PA. + +Thu Jul 13 18:22:49 1995 Ken Raeburn <raeburn@cygnus.com> + + * gas/m68k/all.exp: Run schwab test for m68k vxworks5.1. + +Wed Jun 21 21:28:57 1995 Ken Raeburn <raeburn@cujo.cygnus.com> + + * gas/m68k/schwab.*: New test based on a test case from Andreas + Schwab. + * gas/m68k/all.exp: Run it for some aout configurations. + +Mon Jun 12 22:27:18 1995 Jeff Law (law@snake.cs.utah.edu) + + * gas/hppa/parse/badfmpyadd.s: New test. + * gas/hppa/parse/parse.exp: Run it. + +Sun May 21 20:26:18 1995 Jeff Law (law@snake.cs.utah.edu) + + * gas/hppa/unsorted/unsorted.exp: Disable align4 tests for + ELF targets. + +Wed May 10 14:28:16 1995 Richard Earnshaw (rearnsha@armltd.co.uk) + + * arm/arm7dm.s: New file -- tests for ARM7DM instructions. + * arm/arm6.s: Correct bogus tests. + * arm/gas.exp (arm6.s): Is now a valid test. + (arm7dm.s): New test. + * arm/float.s: Add load/store multiple floating point instruction + tests. + +Wed May 3 13:14:44 1995 Jeff Law (law@snake.cs.utah.edu) + + * gas/hppa/reloc/longcall.s: New test. + * gas/hppa/reloc/reloc.exp: Run it. + +Tue May 2 16:37:48 1995 Ken Raeburn <raeburn@cujo.cygnus.com> + + * gas/mips/ld.d: Modified for gas delay-slot fixes. + +Sat Apr 29 23:35:18 1995 Doug Evans <dje@chestnut.cygnus.com> + + * lib/gas-dg.exp: New file. + +Tue Apr 11 13:57:52 1995 Ken Raeburn <raeburn@cujo.cygnus.com> + + * gas/mips/mips4.d: Allow more than exactly 8 zeros in bc1* + targets. + +Mon Apr 10 15:36:39 1995 Ken Raeburn <raeburn@cujo.cygnus.com> + + * lib/gas-defs.exp (pass_phase): New proc. + (run_dump_test): Note passing or failing of each phase of this + test, instead of failure of phases or passing of complete test. + Ensure test file name is in reported message. + +Sat Apr 8 12:46:33 1995 Doug Evans <dje@chestnut.cygnus.com> + + * lib/gas-defs.exp (run_dump_test): Handle arguments with paths. + Always resolve testcase status before returning. + If `slurp_options' fails, return and don't do test. + (slurp_options): Fix "can't open" error message. + Return -1 to indicate error. + +Mon Mar 20 22:45:30 1995 Jeff Law (law@snake.cs.utah.edu) + + * gas/hppa/unsorted/common.s: New test. + * gas/hppa/unsorted/unsorted.exp: Run it. + +Fri Mar 10 19:07:09 1995 Ken Raeburn <raeburn@cujo.cygnus.com> + + * gas/h8300/ffxx1.s: Add .word 0 at the end to eliminate + uncertainty as to whether there should be trailing bytes in the + output file. + * gas/h8300/ffxx1.d: Adjust reloc values to permit an addend value + of 0x00000000ffffffff on 64-bit hosts. (I'm not sure if this is + correct.) End with "..." to match trailing zero bytes. + +Wed Mar 8 15:50:34 1995 Ian Lance Taylor <ian@cygnus.com> + + * gas/mips/mips4.d, gas/mips/mips4.s: New files. + * gas/mips/mips.exp: Run new test. + +Thu Feb 23 17:58:50 1995 Jeff Law (law@snake.cs.utah.edu) + + * gas/hppa/basic/fmemLRbug.s: Add indexing variants. + * gas/hppa/basic/basic.exp: Test them. + +Wed Feb 15 15:43:26 1995 Ian Lance Taylor <ian@cygnus.com> + + * gas/mips/uld.d: New file. + * gas/mips/uld.s: New file. + * gas/mips/usd.d: New file. + * gas/mips/usd.s: New file. + * gas/mips/mips.exp: Run new tests. + +Thu Feb 9 10:57:39 1995 Jeff Law (law@snake.cs.utah.edu) + + * gas/hppa/reloc/applybug.s: New test. + * gas/hppa/reloc/reloc.exp (do_applybug_test): Run it. + +Thu Feb 2 00:34:55 1995 Jeff Law (law@snake.cs.utah.edu) + + * gas/hppa/reloc/picreloc.s: New test. + * gas/hppa/reloc/reloc.exp (do_pic_relocation_test): Run it. + +Fri Jan 27 14:02:02 1995 Ken Raeburn <raeburn@cujo.cygnus.com> + + * gas/h8300/ffxx1.d, gas/h8300/ffxx1.s, gas/h8300/cmpsi2.s, + gas/h8300/h8300.exp: New tests. + +Mon Jan 23 21:44:26 1995 Jeff Law (law@snake.cs.utah.edu) + + * gas/hppa/basic/basic.exp (do_system): Update. + +Wed Jan 11 17:20:25 1995 Ken Raeburn <raeburn@cujo.cygnus.com> + + * gas/mips/mips.exp: Don't run the memory-access tests if the + format is a.out, because the generated code is different from what + is used with other formats. + +Tue Jan 10 11:42:13 1995 Jeff Law (law@snake.cs.utah.edu) + + * gas/hppa/unsorted/unsorted.exp (align4.s): Fix glitch in + regexp to avoid losing without a controlling tty. + +Fri Dec 30 18:08:20 1994 Ken Raeburn <raeburn@cujo.cygnus.com> + + * gas/i386/pushw.l: Fixed whitespace to match current listing + style. + + * gas/all/gas.exp: Mark test p1480.s expected to pass, even with + listings enabled. + +Thu Dec 15 18:14:27 1994 Ken Raeburn <raeburn@cujo.cygnus.com> + + * Makefile.in (AS_FOR_TARGET, OBJDUMP_FOR_TARGET): Don't set. + (uninstall): Don't set OBJDUMP and OBJDUMPFLAGS in site.exp. + * config/default.exp: Default OBJDUMP and OBJDUMPFLAGS. Use + findfile and transform procedures to determine objdump program + name. + + * gas/mips/abs.s, gas/mips/div.s: Force some padding at the end, + in case the format doesn't automatically require it. + * gas/mips/beq.d, gas/mips/jal.d: Handle MIPS_JMP as an alternate + name for the reloc type. + + * lib/gas-defs.exp (file_contents, verbose_eval): New procs. + (run_dump_test): If verbosity level is over 3, print out dump + command and its output. + +Tue Dec 13 18:21:09 1994 Ian Lance Taylor <ian@sanguine.cygnus.com> + + * gas/mips/jal-svr4pic.d: Fix 0-strings to work with 64-bit hosted + disassembly. + +Fri Dec 9 19:54:04 1994 Ken Raeburn <raeburn@cujo.cygnus.com> + + * gas/all/gas.exp (comment.s test): Make the "\r" optional, since + it depends on tty modes. + + * lib/gas-defs.exp (gas_start): Try using -nottycopy instead of + -nottyinit. + + * gas/arm/gas.exp: The arm6 test should report errors, for now. + +Thu Dec 8 20:19:09 1994 Ken Raeburn <raeburn@cujo.cygnus.com> + + * lib/gas-defs.exp: Use -i in expect_after command. + +Wed Dec 7 16:49:14 1994 Ken Raeburn <raeburn@cujo.cygnus.com> + + * gas/mips/mul.d,jal.d: Fix 0-strings to work with 64-bit hosted + disassembly. + + * gas/ieee-fp: Renamed from ieee.fp. + + * lib/gas-defs.exp: Make sure timeout is at least 2 minutes. + +Wed Nov 30 10:48:00 1994 Jeff Law (law@snake.cs.utah.edu) + + * gas/hppa/parse: Renamed from gas/hppa/more.parse. + +Mon Nov 28 00:40:26 1994 Jeff Law (law@snake.cs.utah.edu) + + * gas/hppa/more.parse/parse.exp (nosubspace.s): No longer expected + to fail. Fix comments for the test. Tweak test name. + +Tue Nov 22 23:38:20 1994 Jeff Law (law@snake.cs.utah.edu) + + * gas/hppa/reloc/reloc.exp: Minor tweaks to match current PA ELF + output. + +Fri Nov 18 17:56:57 1994 Ian Lance Taylor <ian@sanguine.cygnus.com> + + * gas/mips/ld.d: Adjust to work for both big and little endian + code. + * gas/mips/ld.s, gas/mips/lif-empic.d: Likewise. + * gas/mips/lifloat.d, gas/mips/ulh-empic.d: Likewise. + * gas/mips/ulh.d, gas/mips/ulw.d, gas/mips/ush.d: Likewise. + * gas/mips/usw.d: Likewise. + +Tue Nov 15 11:09:57 1994 Jeff Law (law@snake.cs.utah.edu) + + * gas/hppa/unsorted/align4.s: New test. + * gas/hppa/unsorted/unsorted.exp: Run it. + + * gas/hppa/unsorted/unsorted.exp (importbug): Tweak to match + current expected PA ELF output. + * gas/hppa/reloc/reloc.exp (do_r_no_reloc): Likewise. + (do_plabel_relocation_test): Likewise. + +Thu Nov 3 18:14:09 1994 Ken Raeburn <raeburn@cujo.cygnus.com> + + * gas/all/p1480.s: Use larger constant, so expression can have a + positive value. + * gas/all/gas.exp: Expect p1480.s without listings to pass. + +Thu Nov 3 15:43:46 1994 Ian Lance Taylor <ian@sanguine.cygnus.com> + + * gas/mips/ulh.d, gas/mips/ulw.d, gas/mips/ush.d, gas/mips/usw.d: + Correct test cases. + +Thu Oct 20 00:55:13 1994 Jeff Law (law@snake.cs.utah.edu) + + * gas/hppa/reloc/blebug3.s: New test. + * gas/hppa/reloc/reloc.exp: Run it. + +Mon Oct 17 02:33:53 1994 Jeff Law (law@snake.cs.utah.edu) + + * gas/hppa/reloc/reduce3.s: New test. + * gas/hppa/reloc/reloc.exp: Run it. + +Sun Oct 16 22:25:56 1994 Jeff Law (law@snake.cs.utah.edu) + + * gas/hppa/reloc/reloc.exp (r_no_reloc): Tweak output to match + current reality. + +Wed Sep 28 21:21:34 1994 Jeff Law (law@snake.cs.utah.edu) + + * gas/hppa/reloc/reduce.s: Renamed from relocreduce.s + * gas/hppa/reloc/reduce2.s: Renamed from relocreduce2.s + * gas/hppa/reloc/r_no_reloc.s: Renamed from r_no_relocbug.s + * gas/hppa/reloc/reloc.exp: Changed accordingly. + +Wed Sep 28 13:25:10 1994 Ian Lance Taylor (ian@sanguine.cygnus.com) + + * gas/mips/beq.d, gas/mips/beq.s: Test that unconditional branch + overflows are correctly converted to jumps. + +Mon Sep 26 17:41:43 1994 Ian Lance Taylor (ian@sanguine.cygnus.com) + + * gas/mips: Add test cases for PIC code, both SVR4 style and + -membedded-pic style. + +Fri Sep 23 14:45:42 1994 Ian Lance Taylor (ian@sanguine.cygnus.com) + + * gas/mips: New directory with MIPS specific test cases. + + * lib/gas-defs.exp (run_dump_test): Permit the .d file to specify + the name of the source file to assemble. + (regexp_diff): Put the reason for failure in the log file. + +Wed Sep 21 13:44:21 1994 Ian Lance Taylor (ian@sanguine.cygnus.com) + + * lib/gas-defs.exp: Don't try to use shell redirection, since TCL + doesn't support it. Redirect stdout using > instead of 1>, and + don't bother to redirect stderr since TCL redirects it anyhow. + (run_dump_test): Pass appropriate arguments to program, defaulting + to -r. + +Sat Sep 17 01:04:56 1994 Ken Raeburn (raeburn@cujo.cygnus.com) + + * gas/vax: New directory. + * gas/vax/{quad.s,quad.exp}: New test, for immediate quadword + values. + +Mon Sep 12 22:19:11 1994 Jeff Law (law@snake.cs.utah.edu) + + * gas/hppa/reloc/r_no_relocbug.s: New test. + * gas/hppa/reloc/reloc.exp: Run it. + + * gas/hppa/reloc/reloc.exp (do_function_reloc_bug): Update + expected output. + +Sun Sep 04 17:58:10 1994 Richard Earnshaw (rwe@pegasus.esprit.ec.org) + + * gas/arm/*: New subtree. Add ARM tests. + +Mon Aug 8 12:13:31 1994 Jeff Law (law@snake.cs.utah.edu) + + * gas/hppa/unsorted/unsorted.exp: Accept any character + between foo's type and foo itself. + +Fri Jul 15 19:09:25 1994 Ken Raeburn (raeburn@cujo.cygnus.com) + + * lib/gas-defs.exp (run_dump_test): New routine for running the + assembler, running objdump or nm (not fully supported) on the + resulting object file, and comparing the results against a file of + regular expressions in the test suite, all in one command. + Options for the assembler and objdump are read from comments at + the start of the .d file. + (fail_phase, slurp_options): New auxiliary routines. + (regexp_diff): Always return a value. Fix bugs in actually doing + the regexp test. + + * gas/sun4/addend.exp: Use run_dump_test. + * gas/sun4/addend.d: Fix regular expressions so that they work. + +Thu Jul 7 11:55:33 1994 Jeff Law (law@snake.cs.utah.edu) + + * gas/hppa/reloc/relocreduce2.s: More relocation reduction tests. + * gas/hppa/reloc/reloc.exp: Run them. + +Thu Jun 30 18:49:25 1994 Ken Raeburn (raeburn@cujo.cygnus.com) + + * config/default.exp: Look for "as.new" in "$base_dir/..", where + it got compiled, not in "$base_dir". + * config/unknown.exp: Deleted. + +Sun Jun 26 13:23:54 1994 Jeff Law (law@snake.cs.utah.edu) + + * gas/lib/gas-defs.exp (gas_finish): Call "close" and "wait" + before exiting. Enclose both calls inside a "catch". + (objdump_finish): Likewise. + +Fri Jun 10 10:23:35 1994 Jeff Law (law@snake.cs.utah.edu) + + * gas/hppa/reloc/reloc.exp (roundmode test): Tweak expected output + for SOM to match current testcase. + +Thu Jun 2 19:46:58 1994 Ken Raeburn (raeburn@cujo.cygnus.com) + + * gas/i386/{pushw.s,pushw.l}: New test. + * gas/i386/all.exp: Run it. + + * Makefile.in (distclean): Remove site config files and gas.sum. + +Fri May 27 12:24:18 1994 Ken Raeburn (raeburn@cujo.cygnus.com) + + * gas/m68k/disperr.s: Use % for registers. + + * gas/m68k-coff/gas.exp: Expect failure for p2389a.s. + +Tue May 17 14:53:08 1994 Bill Cox (bill@rtl.cygnus.com) + + * lib/gas-defs.exp: Replace error proc calls with perror calls. + +Mon May 16 13:19:16 1994 Jeff Law (law@snake.cs.utah.edu) + + * gas/hppa/reloc/reloc.exp: Tweak expected output to match new + ELF code. + * gas/hppa/reloc/roundmode.s: Avoid "S" and "D" modes, ELF does + not support them. + * gas/hppa/unsorted/unsorted.exp: Tweak expected output to match + new ELF code. + +Thu May 5 17:27:54 1994 Ken Raeburn (raeburn@cujo.cygnus.com) + + * config/default.exp: Renamed from unix-gas.exp. + +Mon Apr 11 10:31:00 1994 Bill Cox (bill@rtl.cygnus.com) + + * Makefile.in (check): Set TCL_LIBRARY for runtest. + +Mon Apr 11 07:54:10 1994 Jeffrey A. Law (law@snake.cs.utah.edu) + + * gas/hppa/more.parse/callinfobug.s: Add missing name for + procedure. + + * gas/hppa/reloc/funcrelocbug.s: Place the trampoline in the + $DATA$ rather than $LIT$ subspace. + +Sun Mar 27 14:05:33 1994 Jeffrey A. Law (law@snake.cs.utah.edu) + + * gas/hppa/reloc/funcrelocbug.s: New test. + * gas/hppa/reloc/reloc.exp: Run it. + +Thu Mar 17 13:38:04 1994 Jeffrey A. Law (law@snake.cs.utah.edu) + + * gas/hppa/unsorted/importbug.s: New test. + * gas/hppa/unsorted/unsorted.exp: Run it. + +Wed Mar 16 11:57:07 1994 Jeffrey A. Law (law@snake.cs.utah.edu) + + * gas/hppa/more.parse/regpopbug.s: Add trivial .equ test. + + * gas/hppa/unsorted/globalbug.s: New test (expected to fail). + * gas/hppa/unsorted/unsorted.exp: Run it. + + * gas/hppa/more.parse/callinfobug.s: New test. + * gas/hppa/omre.parse/parse.exp: Run it. + + * gas/hppa/more.parse/regpopbug.s: New test. + * gas/hppa/more.parse/parse.exp: Run it. + +Mon Feb 28 14:10:04 1994 Ken Raeburn (raeburn@cujo.cygnus.com) + + * lib/gas-defs.exp (objdump): New proc. + (objdump_start): Deleted unused proc. + (objdump_start_common): Merged into objdump_start_no_subdir. + + * gas/alpha/fp.exp: Use objdump instead of + objdump_start_no_subdir, since the former actually waits for + objdump to finish. Specify .rdata section only. Make comment + indicate Alpha architecture rather than SPARC. + * gas/alpha/fp.d: Omit .reginfo patterns. Just use "." to match + against ASCII code 0x2a ("*", special in regexp). + * gas/sun4/addend.exp: Use objdump instead of + objdump_start_no_subdir. + +Thu Feb 24 07:11:57 1994 Jeffrey A. Law (law@snake.cs.utah.edu) + + * gas/hppa/more.parse/parse.exp (no subspace test): Only expect + a failure if gas is not producing an ELF object. + +Mon Feb 14 09:24:03 1994 Jeffrey A. Law (law@snake.cs.utah.edu) + + * gas/hppa/basic/fmemLRbug.s: New test. + * gas/hppa/basic/basic.exp: Run it. + +Thu Feb 10 00:34:26 1994 Ken Raeburn (raeburn@cujo.cygnus.com) + + * gas/alpha/fp.*: New files. + * lib/gas-defs.exp (regexp_diff): Report noted mismatch at + verbosity level 3 or above only. + +Mon Feb 7 15:53:10 1994 Jeffrey A. Law (law@snake.cs.utah.edu) + + * gas/hppa/*/*.exp: Change xfails to check for PA ELF rather than + PA OSF1. + +Fri Feb 4 23:42:14 1994 Jeffrey A. Law (law@snake.cs.utah.edu) + + * gas/hppa/more.parse/xmpyubug.s: New test. + * gas/hppa/more.parse/parse.exp: Run it. + +Fri Feb 4 17:13:20 1994 Ken Raeburn (raeburn@cujo.cygnus.com) + + * lib/gas-defs.exp (regexp_diff): New procedure, vaguely based on + "simple_diff" from linker test suite. + * gas/sun4/addend.exp: Use it. + * gas/sun4/addend.d: New file. + +Sun Jan 30 23:34:58 1994 Ken Raeburn (raeburn@cujo.cygnus.com) + + * gas/all/gas.exp: Adjust regexp for x930509.s for current listing + format. + +Thu Jan 20 16:44:51 1994 Rob Savoye (rob@darkstar.cygnus.com) + + * gas/all/gas.exp, lib/gas-defs.exp, sun4/addend.exp, + sparc-solaris/addend.exp: Tweaked to fix a few bugs and to run + well under either version of expect. + +Mon Jan 17 00:25:03 1994 Jeffrey A. Law (law@snake.cs.utah.edu) + + * gas/hppa/basic/fp_misc.s: Delete copr instruction. It's tested + elsewhere now. + * gas/hppa/basic/{copr, coprmem, spop}.s: New tests. + * gas/hppa/basic/basic.exp: Run them. + +Thu Jan 13 11:59:22 1994 Jeffrey A. Law (law@snake.cs.utah.edu) + + * gas/all/gas.exp: No longer expect difference of forward + references to fail. + * gas/all/x930509.s: Fix testcase to match how the expect code was + written. + +Wed Jan 12 13:41:10 1994 Jeffrey A. Law (law@snake.cs.utah.edu) + + * gas/hppa/reloc/reloc.exp: Fix typo in last change. Latest test + for cross-subspace call bugs is no longer expected to fail. + + * gas/hppa/more.parse/procbug.s: Add test for another bug relating + to having a function's label follow the .PROC directive. + +Tue Jan 11 21:47:48 1994 Jeffrey A. Law (law@snake.cs.utah.edu) + + * gas/hppa/reloc/reloc.exp: Add test for cross-subspace call bug + found while working on multiple $CODE$ subspace support. + +Mon Jan 10 09:54:15 1994 Jeffrey A. Law (law@snake.cs.utah.edu) + + * gas/hppa/more.parse/parse.exp: procbug.s is no longer expected + to fail. + * gas/hppa/more.parse/procbug.s: Add missing .procend. + +Mon Jan 3 10:07:47 1994 Jeffrey A. Law (law@snake.cs.utah.edu) + + * gas/hppa/more.parse/labelbug.s: Add testcase for bug in last + app.c change. + +Wed Dec 29 11:32:39 1993 Jeffrey A. Law (law@snake.cs.utah.edu) + + * gas/hppa/more.parse/labelbug.s: Add more colonless label tests. + +Wed Dec 15 08:24:31 1993 Ken Raeburn (raeburn@rtl.cygnus.com) + + * Makefile.in (site.exp): Don't set ASFLAGS. Quote value of + OBJDUMPFLAGS in case it's empty. Use temporary names until the + end; make creating site.exp the final step. + (check): Pass in ASFLAGS. + + * gas/all/gas.exp: Use all_ones proc. Change regexp for matching + C comments to avoid bugs in latest expect code. + +Wed Dec 8 14:30:14 1993 Jeffrey A. Law (law@snake.cs.utah.edu) + + * gas/m68k/disperr.s: New test. + * gas/m68k/all.exp: Run it. + +Sun Dec 5 19:24:57 1993 Jeffrey A. Law (law@snake.cs.utah.edu) + + * gas/hppa/reloc/roundmode.s: New test. + * gas/hppa/reloc/reloc.exp: Run it. Fix typo in last change. + +Wed Dec 1 10:44:18 1993 Jeffrey A. Law (law@snake.cs.utah.edu) + + * gas/hppa/reloc/reloc.exp: Run the first half of bogus R_EXIT + test for ELF. + +Tue Nov 30 13:43:21 1993 Jeffrey A. Law (law@snake.cs.utah.edu) + + * gas/hppa/more.parse/parse.exp: Test for error on for subspace + directive is an XFAIL for SOM assmeblers. + + * gas/hppa/reloc/reloc.exp: Remove XFAIL for relocation on + cross-subspace call test. + +Sun Nov 28 12:12:50 1993 Jeffrey A. Law (law@snake.cs.utah.edu) + + * gas/hppa/more.parse/appbug.s: New test. + * gas/hppa/more.parse/parse.exp: Run it. + + * gas/hppa/unsorted/align3.s: New test. + * gas/hppa/unsorted/unsorted.exp: Run it. + +Sat Nov 27 22:50:01 1993 Jeffrey A. Law (law@snake.cs.utah.edu) + + * gas/all/p2425.s: Insert a tab before assembler directives so + that the directives are not interpreted as labels. + + * gas/hppa/basic/weird.s: Sync with GDB version. + + * gas/hppa/more.parse/labelbug.s: New test. + + * gas/hppa/more.parse/parse.exp: Run it. + +Wed Nov 24 01:25:03 1993 Jeffrey A. Law (law@snake.cs.utah.edu) + + * gas/hppa/reloc/fixupbug.s: New test. + * gas/hppa/reloc/reloc.exp: Run it. + + * gas/hppa/reloc/exitbug.s: New test. + * gas/hppa/reloc/reloc.exp: Run it. + +Sun Nov 21 22:11:10 1993 Jeffrey A. Law (law@snake.cs.utah.edu) + + * gas/hppa/reloc/reloc.exp: Minor fixes so that SOM & ELF can + share the same test code. + * gas/hppa/reloc/relocreduce.s: Likewise. + + * gas/hppa/basic/fmem.s: Add quadword FP store instructions. + * gas/hppa/basic/basic.exp: Test quadword FP store instructions. + +Sun Nov 7 00:31:41 1993 Jeffrey A. Law (law@snake.cs.utah.edu) + + * gas/hppa/reloc/reloc.exp: No longer expect failure for + field selector on ble instruction test. + + * gas/hppa/basic/basic.exp: No longer expect failures for + system instruction tests now that probei is fixed. + +Sat Nov 6 22:45:08 1993 Jeffrey A. Law (law@snake.cs.utah.edu) + + * gas/hppa/reloc/selectorbug.s: New test. + * gas/hppa/reloc/reloc.exp: Run it. + +Thu Nov 4 17:01:30 1993 Jeffrey A. Law (law@snake.cs.utah.edu) + + * gas/hppa/unsorted/fragbug.s: New test. + * gas/hppa/unsorted/unsorted.exp: Run it. + +Thu Nov 04 09:09:49 1993 Jeffrey Wheat (cassidy@cygnus.com) + + * Makefile.in: Changed RUNTESTFLAGS to RUNTEST_FLAGS + +Tue Nov 2 22:12:30 1993 Jeffrey A. Law (law@snake.cs.utah.edu) + + * gas/hppa/more.parse/{defbug.s, stdreg.s}: New tests. + * gas/hppa/more.parse/parse.exp: Run them. + +Mon Nov 1 23:37:58 1993 Jeffrey A. Law (law@snake.cs.utah.edu) + + * gas/hppa/reloc/reloc.exp (reloc_reduce): Correct offsets at + which specific relocations are expected to be found. + +Sat Oct 30 14:12:31 1993 Jeffrey A. Law (law@snake.cs.utah.edu) + + * gas/hppa/unsorted/unsorted.exp (ss_align): Remove OSF xfail. + + * gas/hppa/more.parse/parse.exp: Add new test. + * gas/hppa/more.parse/ssbug.s: New test to make sure non-default + sections are handled correctly. + + * gas/all/gas.exp: Disable (and fail) p1480.s for all PA targets. + +Fri Oct 29 16:29:06 1993 Jeffrey A. Law (law@snake.cs.utah.edu) + + * gas/hppa/more.parse/calldatabug.s: Colonize. + * gas/hppa/more.parse/parse.exp: Fix typos. + +Thu Oct 28 21:40:06 1993 Jeffrey A. Law (law@snake.cs.utah.edu) + + * gas/hppa/{basic, more.parse, reloc, unsorted}: New directories. + * gas/hppa/*/*.exp: New test drivers. + * gas/hppa/*/*.s: New test files. + +Mon Oct 25 09:40:59 1993 Ken Raeburn (raeburn@cygnus.com) + + * gas/sun4: New directory. + * gas/sun4/addend.s,addend.exp: New test case. + * gas/sparc-solaris/addend.s,addend.exp: Solaris version of same + test case. + + * gas/all/gas.exp: Check `*' in C comments. + + * lib/gas-defs.exp (all_ones): New procedure, for a predicate to + simplify some tests. + (want_no_output): Return zero or nonzero, depending on success or + failure. + (gas_test_old): Return value from want_no_output. + (objdump_start_common): Split off from objdump_start. + (objdump_start_no_subdir): New procedure. + +Wed Oct 20 07:25:48 1993 Ken Raeburn (raeburn@rover.cygnus.com) + + * gas/all/diff1.s, gas/m68k/pic1.s: New tests. + * gas/all/gas.exp, gas/m68k/all.exp: Run them. + + * Makefile.in (OBJDUMP_FOR_TARGET): Define similar to + AS_FOR_TARGET. + (check): Don't pass ASFLAGS variable. + (site.exp): Put ASFLAGS, OBJDUMP, OBJDUMPFLAGS into site.exp. + + From Jeff Law: + + * lib/gas-defs.exp (objdump_start, objdump_finish): New functions + so that tests can parse the output of objdump looking for errors + in relocation entires, file headers and the like. + +Thu Sep 23 16:20:34 1993 Ken Raeburn (raeburn@cambridge.cygnus.com) + + * gas/ieee.fp/x930509a.exp: Currently expected to fail always. + * gas/all/gas.exp (p1480.s, x930509.s): Ditto. Break up gas_test + call so it no longer performs multiple tests. + * gas/m68k/all.exp (t2.s): Don't bother with listings. + (p2410.s): Don't pass unwanted arguments to gas_test_error. + +Wed Aug 25 16:50:08 1993 Ken Raeburn (raeburn@cambridge.cygnus.com) + + * lib/do*: Remove RCS id strings. + +Mon May 17 15:09:45 1993 Ken Raeburn (raeburn@deneb.cygnus.com) + + * gas/all/float.s, gas/all/p1480.s, gas/m68k/p2410.s: New tests. + * gas/all/gas.exp, gas/m68k/all.exp: Run them. + * gas/i386: New directory. + +Mon May 10 14:50:20 1993 Ken Raeburn (raeburn@deneb.cygnus.com) + + * Added directory structure, to categorize tests by targets. + * Added new tests all/x930509.s, ieee.fp/x930509a.s, m68k/p2663.s, + and refined some to examine the assembler listing output. + * lib/gas-defs.exp: Renamed gas_start to gas_run. Added some + expect_after patterns. + (gas_start, gas_finish): New procs, for tests that examine process + output. + * config/unix-gas.exp: Invoke gas_init directly, instead of + requiring test .exp files do it. + +Wed Apr 21 01:24:16 1993 Ken Raeburn (raeburn@cambridge.cygnus.com) + + * gas/gas.exp: Handle new tests, and changes to testing procs. + + * lib/gas-defs.exp (want_no_output): New proc; success iff output + is empty. + (gas_test_old): Functionally same as old gas_test. + (gas_test_ignore_stdout): Rewritten to use want_no_output. + (gas_test): New argument lists set of options to be tried in + combinations. Option with trailing ">" indicates standard output + should be ignored. + + * gas/p2425a.s: Use %-form for registers, so this test can be run + on m68k-coff targets too. + + * gas/p2430a.s: New test case, whitespace &c matches customer + report more closely. Gets different results from p2430.s; this is + bad, and not yet tested for. + +Mon Apr 5 12:27:19 1993 Ken Raeburn (raeburn@cygnus.com) + + * gas/p2389a.s, gas/p2411.s, gas/t2.s: New test cases. + * lib/run: New script. + * gas/gas-defs.exp (gas_start): Takes new args, assembler options + and redirection options. Use "run" script so redirection works. + (gas_test): Now takes assembler options as separate arg from input + file name. + (gas_test_ignore_stdout): New proc. Discards output. + (gas_test_error): New proc. Expects assembler to generate output. + (target_cpu_family setting): Handle i486->i386 also. + + * lib/do*: Scripts moved here from gas/testscripts. May be useful + someday for writing more test cases; not currently used. + +Tue Mar 30 11:45:27 1993 Ken Raeburn (raeburn@cambridge.cygnus.com) + + * gas/sol-gcc.s, gas/sol-cc.s, gas/p2425a.s, gas/p2389.s: New test + cases. + * gas/gas.exp: Enable them for appropriate targets. Removed some + useless comments &c. Changed m68k target test to be more general. + + * lib/gas-defs.exp (gas_exit, gas_init): New procs. + * gas/gas.exp: Call gas_init. + +Mon Mar 29 00:00:00 1993 Ken Raeburn (raeburn@kr-pc.cygnus.com) + + * Test suite created. + diff --git a/gas/testsuite/config/default.exp b/gas/testsuite/config/default.exp new file mode 100644 index 0000000..4134a03 --- /dev/null +++ b/gas/testsuite/config/default.exp @@ -0,0 +1,46 @@ +load_lib gas-defs.exp + +global AS +if ![info exists AS] then { + set AS [findfile $base_dir/../as-new "../as-new" [transform as]] +} + +global GASP +if ![info exists GASP] then { + set GASP [findfile $base_dir/../gasp-new "../gasp-new" [transform gasp]] +} + +global ASFLAGS +if ![info exists ASFLAGS] then { + set ASFLAGS "" +} + +if ![info exists OBJDUMP] then { + set OBJDUMP [findfile $base_dir/../../binutils/objdump \ + $base_dir/../../binutils/objdump \ + [transform objdump]] +} + +if ![info exists OBJDUMPFLAGS] then { + set OBJDUMPFLAGS {} +} + +if ![info exists NM] then { + set NM [findfile $base_dir/../../binutils/nm-new \ + $base_dir/../../binutils/nm-new \ + [transform nm]] +} + +if ![info exists NMFLAGS] then { + set NMFLAGS {} +} + +if ![info exists OBJCOPY] then { + set OBJCOPY [findfile $base_dir/../../binutils/objcopy] +} + +if ![info exists OBJCOPYFLAGS] then { + set OBJCOPYFLAGS {} +} + +gas_init diff --git a/gas/testsuite/gas/all/align.d b/gas/testsuite/gas/all/align.d new file mode 100644 index 0000000..86ede61 --- /dev/null +++ b/gas/testsuite/gas/all/align.d @@ -0,0 +1,12 @@ +#objdump: -s -j .text +#name: align + +# Test the alignment pseudo-op. + +.*: .* + +Contents of section .text: + 0000 ff00ff01 ff020202 ffff0303 04040404 ................ + 0010 ffffffff 05050505 ff090a0a 0a0a0a0a ................ + 0020 ff00ff01 ff020202 ffff0303 04040404 ................ + 0030 ffffffff 05050505 ff090a0a 0a0a0a0a ................ diff --git a/gas/testsuite/gas/all/align.s b/gas/testsuite/gas/all/align.s new file mode 100644 index 0000000..9ccca13 --- /dev/null +++ b/gas/testsuite/gas/all/align.s @@ -0,0 +1,61 @@ +/* Test the alignment pseudo-ops. */ + .text + + .byte 0xff + .p2align 1,0 + + .byte 0xff + .p2align 1,1 + + .byte 0xff + .p2align 2,2 + + .byte 0xff + .byte 0xff + .p2alignw 2,0x0303 + + .p2align 3,4 + .byte 0xff + .byte 0xff + .byte 0xff + .byte 0xff + .p2alignl 3,0x05050505 + + .p2align 1,6 + .p2align 1,7 + + .byte 0xff + .p2align 3,8,5 + .byte 9 + .p2align 3,0xa + + .byte 0xff + .balign 2,0 + + .byte 0xff + .balign 2,1 + + .byte 0xff + .balign 4,2 + + .byte 0xff + .byte 0xff + .balignw 4,0x0303 + + .balign 8,4 + .byte 0xff + .byte 0xff + .byte 0xff + .byte 0xff + .balignl 8,0x05050505 + + .balign 2,6 + .balign 2,7 + + .byte 0xff + .balign 8,8,5 + .byte 9 + .balign 8,0xa + + .p2align 5 + .balign 32 diff --git a/gas/testsuite/gas/all/cofftag.d b/gas/testsuite/gas/all/cofftag.d new file mode 100644 index 0000000..59898b6 --- /dev/null +++ b/gas/testsuite/gas/all/cofftag.d @@ -0,0 +1,25 @@ +#objdump: -t +#name: cofftag + +.*: file format .* + +SYMBOL TABLE: +\[ 0\]\(sec -2\)\(fl 0x00\)\(ty 0\)\(scl 103\) \(nx 1\) 0x0+0000 foo.c +File +\[ 2\]\(sec 1\)\(fl 0x00\)\(ty 0\)\(scl 6\) \(nx 0\) 0x0+0000 gcc2_compiled. +\[ 3\]\(sec 1\)\(fl 0x00\)\(ty 0\)\(scl 6\) \(nx 0\) 0x0+0000 ___gnu_compiled_c +\[ 4\]\(sec -2\)\(fl 0x00\)\(ty a\)\(scl 15\) \(nx 1\) 0x0+0000 _token +AUX lnno 0 size 0x4 tagndx 0 endndx 10 +\[ 6\]\(sec -1\)\(fl 0x00\)\(ty b\)\(scl 16\) \(nx 0\) 0x0+0000 _operator +\[ 7\]\(sec -1\)\(fl 0x00\)\(ty b\)\(scl 16\) \(nx 0\) 0x0+0001 _flags +\[ 8\]\(sec -1\)\(fl 0x00\)\(ty 0\)\(scl 102\) \(nx 1\) 0x0+0004 .eos +AUX lnno 0 size 0x4 tagndx 4 +\[ 10\]\(sec 1\)\(fl 0x00\)\(ty 0\)\(scl 3\) \(nx 1\) 0x[0-9a-f]+ .text +AUX scnlen 0x[0-9a-f]+ nreloc 0 nlnno 0 +\[ 12\]\(sec 2\)\(fl 0x00\)\(ty 0\)\(scl 3\) \(nx 1\) 0x[0-9a-f]+ .data +AUX scnlen 0x[0-9a-f]+ nreloc 0 nlnno 0 +\[ 14\]\(sec 3\)\(fl 0x00\)\(ty 0\)\(scl 3\) \(nx 1\) 0x[0-9a-f]+ .bss +AUX scnlen 0x[0-9a-f]+ nreloc 0 nlnno 0 +\[ 16\]\(sec 2\)\(fl 0x00\)\(ty 2\)\(scl 2\) \(nx 0\) 0x0+0000 _token +\[ 17\]\(sec 2\)\(fl 0x00\)\(ty a\)\(scl 2\) \(nx 1\) 0x[0-9a-f]+ _what +AUX lnno 0 size 0x4 tagndx 4 diff --git a/gas/testsuite/gas/all/cofftag.s b/gas/testsuite/gas/all/cofftag.s new file mode 100644 index 0000000..8156599 --- /dev/null +++ b/gas/testsuite/gas/all/cofftag.s @@ -0,0 +1,57 @@ +/* This file was compiled from this C source: + char token =0; + enum token { + operator, + flags + }; + + enum token what= operator; + */ + + .file "foo.c" +gcc2_compiled.: +___gnu_compiled_c: +.globl _token +.data +_token: + .byte 0 +.text + .def _token + .scl 15 + .type 012 + .size 4 + .endef + .def _operator + .val 0 + .scl 16 + .type 013 + .endef + .def _flags + .val 1 + .scl 16 + .type 013 + .endef + .def .eos + .val 4 + .scl 102 + .tag _token + .size 4 + .endef +.globl _what +.data + .p2align 2 +_what: + .long 0 +.text + .def _token + .val _token + .scl 2 + .type 02 + .endef + .def _what + .val _what + .scl 2 + .tag _token + .size 4 + .type 012 + .endef diff --git a/gas/testsuite/gas/all/comment.s b/gas/testsuite/gas/all/comment.s new file mode 100644 index 0000000..76bc641 --- /dev/null +++ b/gas/testsuite/gas/all/comment.s @@ -0,0 +1,3 @@ +# This test file is to see whether comments get written into listings +# correctly. The file has no real contents. +/* C comments too! */ diff --git a/gas/testsuite/gas/all/cond.d b/gas/testsuite/gas/all/cond.d new file mode 100644 index 0000000..4ee3942 --- /dev/null +++ b/gas/testsuite/gas/all/cond.d @@ -0,0 +1,20 @@ +# This should match the output of gas -alc cond.s. + +.*cond.s.* + + + 1[ ]+.if 0 + 8[ ]+.else + 9[ ]+.if 1 + 10[ ]+.endc + 11 0000 0[02]00 ?000[02][ ]+.long[ ]+2 + 12[ ]+.if 0 + 14[ ]+.else + 15 0004 0[04]00 ?000[04][ ]+.long[ ]+4 + 16[ ]+.endc + 17[ ]+.endc + 18 0008 0000 ?0000[ ]+.p2align 5,0 + 18[ ]+0000 ?0000 + 18[ ]+0000 ?0000 + 18[ ]+0000 ?0000 + 18[ ]+0000 ?0000 diff --git a/gas/testsuite/gas/all/cond.s b/gas/testsuite/gas/all/cond.s new file mode 100644 index 0000000..3958321 --- /dev/null +++ b/gas/testsuite/gas/all/cond.s @@ -0,0 +1,18 @@ + .if 0 + .if 1 + .endc + .long 0 + .if 0 + .long 1 + .endc + .else + .if 1 + .endc + .long 2 + .if 0 + .long 3 + .else + .long 4 + .endc + .endc + .p2align 5,0 diff --git a/gas/testsuite/gas/all/diff1.s b/gas/testsuite/gas/all/diff1.s new file mode 100644 index 0000000..10a89fd --- /dev/null +++ b/gas/testsuite/gas/all/diff1.s @@ -0,0 +1,5 @@ +# Difference of two undefined symbols. +# The assembler should reject this. + .text + .globl _foo +_foo: .long _a - _b diff --git a/gas/testsuite/gas/all/float.s b/gas/testsuite/gas/all/float.s new file mode 100644 index 0000000..b098cad --- /dev/null +++ b/gas/testsuite/gas/all/float.s @@ -0,0 +1,4 @@ + .text +foo: .single 0r1.2345e+06 + .single 0f3.14159 + .double 0r2.718282 diff --git a/gas/testsuite/gas/all/gas.exp b/gas/testsuite/gas/all/gas.exp new file mode 100644 index 0000000..9544551 --- /dev/null +++ b/gas/testsuite/gas/all/gas.exp @@ -0,0 +1,145 @@ +# +# These tests should be valid on all targets. +# + +# I think currently all targets fail this one when listings are enabled. +gas_test "p2425.s" "" "" "pcrel values in assignment" + +# p1480.s uses a ".space" directive which for most assemblers means +# "allocate some space". On the PA it means "switch into this space". +# +# Therefore this test (as it is currently written) is completely bogus +# for any PA target. Do not bother trying to run it and just claim +# it fails. +if [istarget hppa*-*-*] then { + setup_xfail *-*-* + fail "simplifiable double subtraction" +} else { + gas_test "p1480.s" "" "-a>" "simplifiable double subtraction" +} + +gas_test "float.s" "" "" "simple FP constants" + +# This test is meaningless for the PA; the difference of two undefined +# symbols is something that is (and must be) supported on the PA. +if ![istarget hppa*-*-*] then { + gas_test_error "diff1.s" "" "difference of two undefined symbols" +} + +proc do_comment {} { + set testname "comment.s: comments in listings" + set x1 0 + set x2 0 + set x3 0 + set white {[ \t]*} + gas_start "comment.s" "-al" + while 1 { +# Apparently CRLF is received when using ptys for subprocesses; hence the +# \r\n for line 3. + expect { + -re "^ +1\[ \t\]+# This\[^\n\]*\n" { set x1 1 } + -re "^ +2\[ \t\]+# correctly\[^\n\]*\n" { set x2 1 } + -re "^ +3\[ \t\]+/. C comments too. ./\r?\n" { set x3 1 } + -re "\[^\n\]*\n" { } + timeout { perror "timeout\n"; break } + eof { break } + } + } + gas_finish + if [all_ones $x1 $x2 $x3] then { pass $testname } else { fail $testname } +} + +do_comment + +# +# Test x930509a -- correct assembly of differences involving forward +# references. +# + +proc do_930509a {} { + set testname "difference between forward references" + set x 0 + gas_start "x930509.s" "-al" + while 1 { +# We need to accomodate both byte orders here. +# If ".long" means an 8-byte value on some target someday, this test will have +# to be fixed. + expect { + -re "^ +1 .... 0000 *0000" { fail $testname; set x 1 } + -re "^ +1 .... 0400 *0000" { pass $testname; set x 1 } + -re "^ +1 .... 0000 *0004" { pass $testname; set x 1 } + -re "\[^\n\]*\n" { } + timeout { perror "timeout\n"; break } + eof { break } + } + } + gas_finish + if !$x then { fail $testname } +} + +# This test is meaningless for the PA; the difference of two symbols +# must not be resolved by the assembler. +if ![istarget hppa*-*-*] then { + # the vax fails because VMS can apparently actually handle this + # case in relocs, so gas doesn't handle it itself. + setup_xfail "vax*-*-vms*" + setup_xfail "mn10300*-*-*" + setup_xfail "mn10200*-*-*" + do_930509a +} + +case $target_triplet in { + { hppa*-*-* } { } + default { + run_dump_test struct + run_dump_test align + } +} + +# This test is for any COFF target. +# We omit m88k COFF because it uses weird pseudo-op names. +# We omit the ARM toolchains because they define locals to +# start with '.', which eliminates .eos, .text etc from the output. +if { ([istarget *-*-coff*] && ![istarget m88*-*-*] && ![istarget *arm*-*-coff] && ![istarget thumb*-*-coff]) \ + ||([istarget *-*-pe*] && ![istarget arm*-*-pe*] && ![istarget thumb*-*-pe*]) \ + || [istarget a29k-*-udi*] \ + || [istarget a29k-*-ebmon*] \ + || [istarget a29k-*-sym*] \ + || [istarget a29k-*-vxworks*] \ + || [istarget i*86-*-aix*] \ + || [istarget i*86-*-sco*] \ + || [istarget i*86-*-isc*] \ + || [istarget i*86-*-go32*] \ + || [istarget i*86-*-cygwin*] \ + || [istarget i*86-*-*nt] \ + || ([istarget i960-*-vxworks5.*] && ![istarget i960-*-vxworks5.0*]) } { + run_dump_test cofftag +} + +# Test omitting conditionals from listings. +proc test_cond {} { + global comp_output + global srcdir + global subdir + + set testname "conditional listings" + gas_run cond.s -alc ">dump.out" + if ![string match "" $comp_output] { + send_log "$comp_output\n" + fail $testname + } else { + if { [regexp_diff dump.out $srcdir/$subdir/cond.d] } { + fail $testname + } else { + pass $testname + } + } +} + +test_cond + +# FIXME: this is here cause of a bug in DejaGnu 1.1.1. When it is no longer +# in use, then this can be removed. +if [info exists errorInfo] then { + unset errorInfo +} diff --git a/gas/testsuite/gas/all/itbl b/gas/testsuite/gas/all/itbl new file mode 100644 index 0000000..ac66dfb --- /dev/null +++ b/gas/testsuite/gas/all/itbl @@ -0,0 +1,20 @@ + + ; Test case for assembler option "itbl". + ; Run as "as --itbl itbl itbl.s" + ; or with stand-alone test case "itbl-test itbl itbl.s". + ; The "p<n>" represent processors of a multi-processor system. + + p1 dreg d1 1 ; data register "d1" for COP1 has value 1 + p1 creg c3 3 ; ctrl register "c3" for COP1 has value 3 + p3 insn fie 0x1e:24-20 ; function "fill" for COP3 has value 31 + p3 dreg d3 3 ; data register "d3" for COP3 has value 3 + p3 creg c2 22 ; control register "c2" for COP3 has value 22 + p3 insn fee 0x1e:24-20,dreg:17-13,creg:12-8,immed:7-0 + + p3 dreg d3 3 ; data register "d3" for COP3 has value 3 + p3 creg c2 22 ; control register "c2" for COP3 has value 22 + p3 insn fum 0x01e00001 dreg:17-13 creg:12-8 + p3 insn foh 0xf:24-21 dreg:20-16 immed:15-0 + + p3 insn pig 0x1:24-21*[0x100|0x2], dreg:20-16, immed:15-0*0x10000 + diff --git a/gas/testsuite/gas/all/itbl-test.c b/gas/testsuite/gas/all/itbl-test.c new file mode 100644 index 0000000..023f5d9 --- /dev/null +++ b/gas/testsuite/gas/all/itbl-test.c @@ -0,0 +1,129 @@ + + +/* itbl-test.c + + Copyright (C) 1997 Free Software Foundation, Inc. + + This file is part of GAS, the GNU Assembler. + + GAS is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 2, or (at your option) + any later version. + + GAS is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with GAS; see the file COPYING. If not, write to the Free + Software Foundation, 59 Temple Place - Suite 330, Boston, MA + 02111-1307, USA. */ + +/* Stand-alone test for instruction specification table support. + Run using "itbl-test <itbl> <asm.s>" + where <itbl> is the name of the instruction table, + and <asm.s> is the name of the assembler fie. */ + + +#include <stdio.h> +#include <stdlib.h> +#include <string.h> +#include "itbl-ops.h" + +static int test_reg (e_processor processor, e_type type, char *name, + unsigned long val); + +int +main (int argc, char **argv) +{ + unsigned int insn; + FILE *fas; + int aline = 0; + char s[81], *name; + + if (argc < 3) + { + printf ("usage: %s itbl asm.s\n", argv[0]); + exit (0); + } + if (itbl_parse (argv[1]) != 0) + { + printf ("failed to parse itbl\n"); + exit (0); + } + + fas = fopen (argv[2], "r"); + if (fas == 0) + { + printf ("failed to open asm file %s\n", argv[2]); + exit (0); + } + while (fgets (s, 80, fas)) + { + char *p; + aline++; + + if (p = strchr (s, ';'), p) /* strip comments */ + *p = 0; + if (p = strchr (s, '#'), p) /* strip comments */ + *p = 0; + p = s + strlen (s) - 1; + while (p >= s && (*p == ' ' || *p == '\t' || *p == '\n')) /* strip trailing spaces */ + p--; + *(p + 1) = 0; + p = s; + while (*p && (*p == ' ' || *p == '\t' || *p == '\n')) /* strip leading spaces */ + p++; + if (!*p) + continue; + + name = itbl_get_field (&p); + insn = itbl_assemble (name, p); + if (insn == 0) + printf ("line %d: Invalid instruction (%s)\n", aline, s); + else + { + char buf[128]; + printf ("line %d: insn(%s) = 0x%x)\n", aline, s, insn); + if (!itbl_disassemble (buf, insn)) + printf ("line %d: Can't disassemble instruction " + "(0x%x)\n", aline, insn); + else + printf ("line %d: disasm(0x%x) = %s)\n", aline, insn, buf); + } + } + + test_reg (1, e_dreg, "d1", 1); + test_reg (3, e_creg, "c2", 22); + test_reg (3, e_dreg, "d3", 3); + + return 0; +} + +static int +test_reg (e_processor processor, e_type type, char *name, + unsigned long val) +{ + char *n; + unsigned long v; + + n = itbl_get_name (processor, type, val); + if (!n || strcmp (n, name)) + printf ("Error - reg name not found for proessor=%d, type=%d, val=%d\n", + processor, type, val); + else + printf ("name=%s found for processor=%d, type=%d, val=%d\n", + n, processor, type, val); + + /* We require that names be unique amoung processors and types. */ + v = itbl_get_reg_val (name); + if (!v || v != val) + printf ("Error - reg val not found for processor=%d, type=%d, name=%s\n", + processor, type, name); + else + printf ("val=0x%x found for processor=%d, type=%d, name=%s\n", + v, processor, type, name); + return 0; +} diff --git a/gas/testsuite/gas/all/itbl.s b/gas/testsuite/gas/all/itbl.s new file mode 100644 index 0000000..9351aa4 --- /dev/null +++ b/gas/testsuite/gas/all/itbl.s @@ -0,0 +1,13 @@ + + ; Test case for assembler option "itbl". + ; Run as "as --itbl itbl itbl.s" + ; or with stand-alone test case "itbl-test itbl itbl.s". + + ; Assemble processor instructions as defined in "itbl". + + fee $d3,$c2,0x1 ; 0x4ff07601 + fie ; 0x4ff00000 + foh $2,0x100 + fum $d3,$c2 ; 0x4ff07601 + pig $2,0x100 + diff --git a/gas/testsuite/gas/all/p1480.s b/gas/testsuite/gas/all/p1480.s new file mode 100644 index 0000000..9d0ba81 --- /dev/null +++ b/gas/testsuite/gas/all/p1480.s @@ -0,0 +1,3 @@ +start: .long 0, 1, 2, 3, 4, 5, 6, 7 + .space 0x80 - (. - start) +foo: .long 42 diff --git a/gas/testsuite/gas/all/p2425.s b/gas/testsuite/gas/all/p2425.s new file mode 100644 index 0000000..1c9dc95 --- /dev/null +++ b/gas/testsuite/gas/all/p2425.s @@ -0,0 +1,6 @@ + .text + .globl _frobnitz +_frobnitz: + .long 1, 2, 3, 4, 5, 6, 7, GRUMP, 42 + GRUMP=.-_frobnitz + HALFGRUMP=GRUMP/2 diff --git a/gas/testsuite/gas/all/struct.d b/gas/testsuite/gas/all/struct.d new file mode 100644 index 0000000..8dc5dd4 --- /dev/null +++ b/gas/testsuite/gas/all/struct.d @@ -0,0 +1,8 @@ +#nm: --extern-only +#name: struct + +# Test the .struct pseudo-op. + +0+00 A w1 +0+02 A w2 +0+04 A w3 diff --git a/gas/testsuite/gas/all/struct.s b/gas/testsuite/gas/all/struct.s new file mode 100644 index 0000000..9ecfd0b --- /dev/null +++ b/gas/testsuite/gas/all/struct.s @@ -0,0 +1,10 @@ + .globl w1 + .globl w2 + .globl w3 + .long 0 + .struct 0 +w1: .short 0 +w2: .short 0 +w3: .short 0 + .text + .long 0 diff --git a/gas/testsuite/gas/all/x930509.s b/gas/testsuite/gas/all/x930509.s new file mode 100644 index 0000000..1299991 --- /dev/null +++ b/gas/testsuite/gas/all/x930509.s @@ -0,0 +1,3 @@ + .long L2-L1 +L1: .long 0x1234 +L2: .long 0x5678 diff --git a/gas/testsuite/gas/alpha/fp.d b/gas/testsuite/gas/alpha/fp.d new file mode 100644 index 0000000..9e6f7e9 --- /dev/null +++ b/gas/testsuite/gas/alpha/fp.d @@ -0,0 +1,7 @@ + +.*: file format ecoff-littlealpha + +Contents of section .rdata: + 0000 71a37909 4f930a40 5441789a cd4b881b q.y.O..@TAx..K.. + 0010 2a404f93 790971a3 789a5440 5441789a .@O.y.q.x.T@TAx. + 0020 00000000 00000000 00000000 00000000 ................ diff --git a/gas/testsuite/gas/alpha/fp.exp b/gas/testsuite/gas/alpha/fp.exp new file mode 100644 index 0000000..05ec881 --- /dev/null +++ b/gas/testsuite/gas/alpha/fp.exp @@ -0,0 +1,15 @@ +# +# Alpha OSF/1 tests +# + +if [istarget alpha-*-osf*] then { + set testname "fp constants (part 2)" + if [gas_test_old "fp.s" "" "fp constants (part 1)"] then { + objdump "-s -j .rdata > a.dump" + if { [regexp_diff "a.dump" "$srcdir/$subdir/fp.d"] == 0 } then { + pass $testname + } else { + fail $testname + } + } +} diff --git a/gas/testsuite/gas/alpha/fp.s b/gas/testsuite/gas/alpha/fp.s new file mode 100644 index 0000000..7cebbbe --- /dev/null +++ b/gas/testsuite/gas/alpha/fp.s @@ -0,0 +1,14 @@ + .rdata +# These three formats are 8 bytes each. + .t_floating 3.32192809488736218171e0 +# .byte 0x71, 0xa3, 0x79, 0x09, 0x4f, 0x93, 0x0a, 0x40 + .d_floating 3.32192809488736218171e0 +# .byte 0x54, 0x41, 0x78, 0x9a, 0xcd, 0x4b, 0x88, 0x1b + .g_floating 3.32192809488736218171e0 +# .byte 0x2a, 0x40, 0x4f, 0x93, 0x79, 0x09, 0x71, 0xa3 +# The next two are four bytes each. + .s_floating 3.32192809488736218171e0 +# .byte 0x78, 0x9a, 0x54, 0x40, 0, 0, 0, 0 + .f_floating 3.32192809488736218171e0 +# .byte 0x54, 0x41, 0x78, 0x9a, 0, 0, 0, 0 + .long 0, 0, 0, 0 diff --git a/gas/testsuite/gas/arc/alias.d b/gas/testsuite/gas/arc/alias.d new file mode 100644 index 0000000..b51acf6 --- /dev/null +++ b/gas/testsuite/gas/arc/alias.d @@ -0,0 +1,68 @@ +#objdump: -dr +#name: @OC@ + +# Test the @OC@ insn. + +.*: +file format elf32-.*arc + +Disassembly of section .text: +00000000 @IC+0@008200 @OC@ r0,r1 +00000004 @IC+3@6e3800 @OC@ fp,sp +00000008 @IC+0@1ffe00 @OC@ r0,0 +0000000c @IC+0@3fffff @OC@ r1,-1 +00000010 @IC+7@e10400 @OC@ 0,r2 +00000014 @IC+7@e187ff @OC@ -1,r3 +00000018 @IC+0@9ffeff @OC@ r4,255 +0000001c @IC+7@e28aff @OC@ 255,r5 +00000020 @IC+0@dfff00 @OC@ r6,-256 +00000024 @IC+7@e38f00 @OC@ -256,r7 +00000028 @IC+1@1f7c00 @OC@ r8,256 +00000030 @IC+1@3f7c00 @OC@ r9,-257 +00000038 @IC+7@c51400 @OC@ 511,r10 +00000040 @IC+1@7f7c00 @OC@ r11,1111638594 +00000048 @IC+7@c61800 @OC@ 305419896,r12 +00000050 @IC+7@ff7cff @OC@ 255,256 +00000058 @IC+7@dffeff @OC@ 256,255 +00000060 @IC+0@1f7c00 @OC@ r0,0 + RELOC: 00000064 R_ARC_32 foo +00000068 @IC+0@008200 @OC@ r0,r1 +0000006c @IC+0@620800 @OC@ r3,r4 +00000070 @IC+0@c38e01 @OC@.eq r6,r7 +00000074 @IC+1@251401 @OC@.eq r9,r10 +00000078 @IC+1@869a02 @OC@.ne r12,r13 +0000007c @IC+1@e82002 @OC@.ne r15,r16 +00000080 @IC+2@49a603 @OC@.p r18,r19 +00000084 @IC+2@ab2c03 @OC@.p r21,r22 +00000088 @IC+3@0cb204 @OC@.n r24,r25 +0000008c @IC+3@6e3804 @OC@.n fp,sp +00000090 @IC+3@cfbe05 @OC@.c ilink2,blink +00000094 @IC+4@314405 @OC@.c r33,r34 +00000098 @IC+4@92ca05 @OC@.c r36,r37 +0000009c @IC+4@f45006 @OC@.nc r39,r40 +000000a0 @IC+5@55d606 @OC@.nc r42,r43 +000000a4 @IC+5@b75c06 @OC@.nc r45,r46 +000000a8 @IC+6@18e207 @OC@.v r48,r49 +000000ac @IC+6@7a6807 @OC@.v r51,r52 +000000b0 @IC+6@dbee08 @OC@.nv r54,r55 +000000b4 @IC+7@3d7408 @OC@.nv r57,r58 +000000b8 @IC+7@9e7809 @OC@.gt lp_count,lp_count +000000bc @IC+0@1f7c0a @OC@.ge r0,0 +000000c4 @IC+7@c0820b @OC@.lt 1,r1 +000000cc @IC+7@df7c0c @OC@.le 2,2 +000000d4 @IC+0@61860d @OC@.hi r3,r3 +000000d8 @IC+0@82080e @OC@.ls r4,r4 +000000dc @IC+0@a28a0f @OC@.pnz r5,r5 +000000e0 @IC+0@008300 @OC@.f r0,r1 +000000e4 @IC+0@5efa01 @OC@.f r2,1 +000000e8 @IC+7@a18601 @OC@.f 1,r3 +000000ec @IC+7@a20800 @OC@.f 0,r4 +000000f0 @IC+0@bf7d00 @OC@.f r5,512 +000000f8 @IC+7@c30d00 @OC@.f 512,r6 +00000100 @IC+7@df7d00 @OC@.f 512,512 +00000108 @IC+0@008301 @OC@.eq.f r0,r1 +0000010c @IC+0@3f7d02 @OC@.ne.f r1,0 +00000114 @IC+7@c1050b @OC@.lt.f 0,r2 +0000011c @IC+7@c10509 @OC@.gt.f 1,r2 +00000124 @IC+0@1f7d0c @OC@.le.f r0,512 +0000012c @IC+7@c1050a @OC@.ge.f 512,r2 +00000134 @IC+7@df7d04 @OC@.n.f 512,512 diff --git a/gas/testsuite/gas/arc/alias.s b/gas/testsuite/gas/arc/alias.s new file mode 100644 index 0000000..d524440 --- /dev/null +++ b/gas/testsuite/gas/arc/alias.s @@ -0,0 +1,76 @@ +# @OC@ test + +# reg,reg + @OC@ r0,r1 + @OC@ fp,sp + +# shimm values + @OC@ r0,0 + @OC@ r1,-1 + @OC@ 0,r2 + @OC@ -1,r3 + @OC@ r4,255 + @OC@ 255,r5 + @OC@ r6,-256 + @OC@ -256,r7 + +# limm values + @OC@ r8,256 + @OC@ r9,-257 + @OC@ 511,r10 + @OC@ r11,0x42424242 + @OC@ 0x12345678,r12 + +# shimm and limm + @OC@ 255,256 + @OC@ 256,255 + +# symbols + @OC@ r0,foo + +# conditional execution + @OC@.al r0,r1 + @OC@.ra r3,r4 + @OC@.eq r6,r7 + @OC@.z r9,r10 + @OC@.ne r12,r13 + @OC@.nz r15,r16 + @OC@.pl r18,r19 + @OC@.p r21,r22 + @OC@.mi r24,r25 + @OC@.n r27,r28 + @OC@.cs r30,r31 + @OC@.c r33,r34 + @OC@.lo r36,r37 + @OC@.cc r39,r40 + @OC@.nc r42,r43 + @OC@.hs r45,r46 + @OC@.vs r48,r49 + @OC@.v r51,r52 + @OC@.vc r54,r55 + @OC@.nv r57,r58 + @OC@.gt r60,r60 + @OC@.ge r0,0 + @OC@.lt 1,r1 + @OC@.le 2,2 + @OC@.hi r3,r3 + @OC@.ls r4,r4 + @OC@.pnz r5,r5 + +# flag setting + @OC@.f r0,r1 + @OC@.f r2,1 + @OC@.f 1,r3 + @OC@.f 0,r4 + @OC@.f r5,512 + @OC@.f 512,r6 + @OC@.f 512,512 + +# conditional execution + flag setting + @OC@.eq.f r0,r1 + @OC@.ne.f r1,0 + @OC@.lt.f 0,r2 + @OC@.gt.f 1,r2 + @OC@.le.f r0,512 + @OC@.ge.f 512,r2 + @OC@.n.f 512,512 diff --git a/gas/testsuite/gas/arc/arc.exp b/gas/testsuite/gas/arc/arc.exp new file mode 100644 index 0000000..b098453 --- /dev/null +++ b/gas/testsuite/gas/arc/arc.exp @@ -0,0 +1,114 @@ +# ARC gas testsuite + +# Test an insn from a template .s/.d. +# The best way to create the .d file is to run the tests without it, let +# dejagnu crash, run as.new on the just built .s file, run objdump -dr on +# the result of that, copy the result into the .d file, and edit in the +# necessary patterns (@OC@, etc.). Sounds complicated but it's easy. The +# catch is that we assume a working assembler is used to build it. That's +# obviously not entirely kosher, but once the .d file is created one can +# verify it's contents over time. +# +# Template patterns: +# @OC@ - placeholder for the opcode +# @IC+?@ - place holder for the insn code +# @I3+??@ - place holder for the operation code of code 3 insns. + +proc test_template_insn { cpu tmpl opcode icode } { + global srcdir subdir objdir + + # Change @OC@ in the template file to $opcode + + set in_fd [open $srcdir/$subdir/$tmpl.s r] + set out_fd [open $objdir/$opcode.s w] + # FIXME: check return codes + + puts $out_fd "\t.cpu $cpu\n" + while { [gets $in_fd line] >= 0 } { + regsub "@OC@" $line $opcode line + puts $out_fd $line + } + + close $in_fd + close $out_fd + + # Create output template. + + set in_fd [open $srcdir/$subdir/$tmpl.d r] + set out_fd [open $objdir/$opcode.d w] + # FIXME: check return codes + + while { [gets $in_fd line] >= 0 } { + regsub "@OC@" $line $opcode line + #send_user "$line\n" + if [string match "*@IC+?@*" $line] { + # Insert the opcode. It occupies the top 5 bits. + regexp "^(.*)@IC\\+(.)@(.*)$" $line junk leftpart n rightpart + set n [expr ($icode << 3) + $n] + set n [format "%02x" $n] + puts $out_fd "$leftpart$n$rightpart" + } elseif [string match "*@I3+??@*" $line] { + # Insert insn 3 code (register C field) + # b15=8/0, b8=1/0 (their respective hex values in the objdump) + regexp "^(.*)@I3\\+(.)(.)@(.*)$" $line junk leftpart b15 b8 rightpart + set n [expr ($icode << 1) + ($b15 << 4) + ($b8 << 0)] + set n [format "%02x" $n] + puts $out_fd "$leftpart$n$rightpart" + } else { + puts $out_fd $line + } + } + + close $in_fd + close $out_fd + + # Finally, run the test. + + run_dump_test $objdir/$opcode + + # "make clean" won't delete these, so for now we must. + catch "exec rm -f $objdir/$opcode.s $objdir/$opcode.d" +} + +# Run the tests. + +if [istarget arc*-*-*] then { + + test_template_insn base math adc 9 + test_template_insn base math add 8 + test_template_insn base math and 12 + test_template_insn base math bic 14 + test_template_insn base math or 13 + test_template_insn base math sbc 11 + test_template_insn base math sub 10 + test_template_insn base math xor 15 + + test_template_insn base alias mov 12 + test_template_insn base alias rlc 9 + test_template_insn base alias asl 8 +# `lsl' gets dumped as `asl' so this must be tested elsewhere. +# test_template_insn base alias lsl 8 + + test_template_insn base sshift asr 1 + test_template_insn base sshift lsr 2 + test_template_insn base sshift ror 3 + test_template_insn base sshift rrc 4 + + test_template_insn base branch b 4 + test_template_insn base branch bl 5 + test_template_insn base branch lp 6 + + run_dump_test "j" + + test_template_insn base insn3 sexb 5 + test_template_insn base insn3 sexw 6 + test_template_insn base insn3 extb 7 + test_template_insn base insn3 extw 8 + + run_dump_test "flag" +# run_dump_test "nop" + + run_dump_test "ld" + run_dump_test "st" + +} diff --git a/gas/testsuite/gas/arc/branch.d b/gas/testsuite/gas/arc/branch.d new file mode 100644 index 0000000..4c9b014 --- /dev/null +++ b/gas/testsuite/gas/arc/branch.d @@ -0,0 +1,45 @@ +#objdump: -dr +#name: @OC@ + +# Test the @OC@ insn. + +.*: +file format elf32-.*arc + +Disassembly of section .text: +00000000 <text_label> @IC+7@ffff80 @OC@ 00000000 <text_label> +00000004 <text_label\+4> @IC+7@ffff00 @OC@ 00000000 <text_label> +00000008 <text_label\+8> @IC+7@fffe80 @OC@ 00000000 <text_label> +0000000c <text_label\+c> @IC+7@fffe01 @OC@eq 00000000 <text_label> +00000010 <text_label\+10> @IC+7@fffd81 @OC@eq 00000000 <text_label> +00000014 <text_label\+14> @IC+7@fffd02 @OC@ne 00000000 <text_label> +00000018 <text_label\+18> @IC+7@fffc82 @OC@ne 00000000 <text_label> +0000001c <text_label\+1c> @IC+7@fffc03 @OC@p 00000000 <text_label> +00000020 <text_label\+20> @IC+7@fffb83 @OC@p 00000000 <text_label> +00000024 <text_label\+24> @IC+7@fffb04 @OC@n 00000000 <text_label> +00000028 <text_label\+28> @IC+7@fffa84 @OC@n 00000000 <text_label> +0000002c <text_label\+2c> @IC+7@fffa05 @OC@c 00000000 <text_label> +00000030 <text_label\+30> @IC+7@fff985 @OC@c 00000000 <text_label> +00000034 <text_label\+34> @IC+7@fff905 @OC@c 00000000 <text_label> +00000038 <text_label\+38> @IC+7@fff886 @OC@nc 00000000 <text_label> +0000003c <text_label\+3c> @IC+7@fff806 @OC@nc 00000000 <text_label> +00000040 <text_label\+40> @IC+7@fff786 @OC@nc 00000000 <text_label> +00000044 <text_label\+44> @IC+7@fff707 @OC@v 00000000 <text_label> +00000048 <text_label\+48> @IC+7@fff687 @OC@v 00000000 <text_label> +0000004c <text_label\+4c> @IC+7@fff608 @OC@nv 00000000 <text_label> +00000050 <text_label\+50> @IC+7@fff588 @OC@nv 00000000 <text_label> +00000054 <text_label\+54> @IC+7@fff509 @OC@gt 00000000 <text_label> +00000058 <text_label\+58> @IC+7@fff48a @OC@ge 00000000 <text_label> +0000005c <text_label\+5c> @IC+7@fff40b @OC@lt 00000000 <text_label> +00000060 <text_label\+60> @IC+7@fff38c @OC@le 00000000 <text_label> +00000064 <text_label\+64> @IC+7@fff30d @OC@hi 00000000 <text_label> +00000068 <text_label\+68> @IC+7@fff28e @OC@ls 00000000 <text_label> +0000006c <text_label\+6c> @IC+7@fff20f @OC@pnz 00000000 <text_label> +00000070 <text_label\+70> @IC+7@ffff80 @OC@ 00000070 <text_label\+70> + RELOC: 00000070 R_ARC_B22_PCREL external_text_label +00000074 <text_label\+74> @IC+0@000000 @OC@ 00000078 <text_label\+78> +00000078 <text_label\+78> @IC+7@fff0a0 @OC@.d 00000000 <text_label> +0000007c <text_label\+7c> @IC+7@fff000 @OC@ 00000000 <text_label> +00000080 <text_label\+80> @IC+7@ffefc0 @OC@.jd 00000000 <text_label> +00000084 <text_label\+84> @IC+7@ffef21 @OC@eq.d 00000000 <text_label> +00000088 <text_label\+88> @IC+7@ffee82 @OC@ne 00000000 <text_label> +0000008c <text_label\+8c> @IC+7@ffee46 @OC@nc.jd 00000000 <text_label> diff --git a/gas/testsuite/gas/arc/branch.s b/gas/testsuite/gas/arc/branch.s new file mode 100644 index 0000000..8bf1618 --- /dev/null +++ b/gas/testsuite/gas/arc/branch.s @@ -0,0 +1,47 @@ +# @OC@ test + +text_label: + +# Condition tests + @OC@ text_label + @OC@al text_label + @OC@ra text_label + @OC@eq text_label + @OC@z text_label + @OC@ne text_label + @OC@nz text_label + @OC@pl text_label + @OC@p text_label + @OC@mi text_label + @OC@n text_label + @OC@cs text_label + @OC@c text_label + @OC@lo text_label + @OC@cc text_label + @OC@nc text_label + @OC@hs text_label + @OC@vs text_label + @OC@v text_label + @OC@vc text_label + @OC@nv text_label + @OC@gt text_label + @OC@ge text_label + @OC@lt text_label + @OC@le text_label + @OC@hi text_label + @OC@ls text_label + @OC@pnz text_label + + @OC@ external_text_label + + @OC@ 0 + +# Delay slots + @OC@.d text_label + @OC@.nd text_label + @OC@.jd text_label + +# Condition tests and delay slots + @OC@eq.d text_label + @OC@ne.nd text_label + @OC@cc.jd text_label diff --git a/gas/testsuite/gas/arc/flag.d b/gas/testsuite/gas/arc/flag.d new file mode 100644 index 0000000..68f36d3 --- /dev/null +++ b/gas/testsuite/gas/arc/flag.d @@ -0,0 +1,29 @@ +#objdump: -dr +#name: flag + +# Test the flag macro. + +.*: +file format elf32-.*arc + +No symbols in "a.out". +Disassembly of section .text: +00000000 1fa00000 flag r0 +00000004 1fbf8001 flag 1 +00000008 1fbf8002 flag 2 +0000000c 1fbf8004 flag 4 +00000010 1fbf8008 flag 8 +00000014 1fbf8010 flag 16 +00000018 1fbf8020 flag 32 +0000001c 1fbf8040 flag 64 +00000020 1fbf8080 flag 128 +00000024 1fbf0000 flag -2147483647 +0000002c 1fa0000b flag.lt r0 +00000030 1fbf0009 flag.gt 1 +00000038 1fbf0009 flag.gt 2 +00000040 1fbf0009 flag.gt 4 +00000048 1fbf0009 flag.gt 8 +00000050 1fbf0009 flag.gt 16 +00000058 1fbf0009 flag.gt 32 +00000060 1fbf0009 flag.gt 64 +00000068 1fbf0009 flag.gt 128 +00000070 1fbf000a flag.ge -2147483647 diff --git a/gas/testsuite/gas/arc/flag.s b/gas/testsuite/gas/arc/flag.s new file mode 100644 index 0000000..7067aa5 --- /dev/null +++ b/gas/testsuite/gas/arc/flag.s @@ -0,0 +1,27 @@ +# flag test + + flag r0 + + flag 1 + flag 2 + flag 4 + flag 8 + flag 16 + flag 32 + flag 64 + flag 128 + + flag 0x80000001 + + flag.lt r0 + + flag.gt 1 + flag.gt 2 + flag.gt 4 + flag.gt 8 + flag.gt 16 + flag.gt 32 + flag.gt 64 + flag.gt 128 + + flag.ge 0x80000001 diff --git a/gas/testsuite/gas/arc/insn3.d b/gas/testsuite/gas/arc/insn3.d new file mode 100644 index 0000000..c0207a7 --- /dev/null +++ b/gas/testsuite/gas/arc/insn3.d @@ -0,0 +1,44 @@ +#objdump: -dr +#name: @OC@ + +# Test the @OC@ insn. + +.*: +file format elf32-.*arc + +Disassembly of section .text: +00000000 1800@I3+80@00 @OC@ r0,r1 +00000004 1b6e@I3+00@00 @OC@ fp,sp +00000008 181f@I3+80@00 @OC@ r0,0 +0000000c 183f@I3+81@ff @OC@ r1,-1 +00000010 1fe1@I3+00@00 @OC@ 0,r2 +00000014 1fe1@I3+81@ff @OC@ -1,r3 +00000018 189f@I3+80@ff @OC@ r4,255 +0000001c 1fe2@I3+80@ff @OC@ 255,r5 +00000020 18df@I3+81@00 @OC@ r6,-256 +00000024 1fe3@I3+81@00 @OC@ -256,r7 +00000028 191f@I3+00@00 @OC@ r8,256 +00000030 193f@I3+00@00 @OC@ r9,-257 +00000038 1fc5@I3+00@00 @OC@ 511,r10 +00000040 197f@I3+00@00 @OC@ r11,1111638594 +00000048 1fc6@I3+00@00 @OC@ 305419896,r12 +00000050 1fff@I3+00@ff @OC@ 255,256 +00000058 1fdf@I3+80@ff @OC@ 256,255 +00000060 181f@I3+00@00 @OC@ r0,0 + RELOC: 00000064 R_ARC_32 foo +00000068 1945@I3+80@01 @OC@.eq r10,r11 +0000006c 1986@I3+80@02 @OC@.ne r12,r13 +00000070 19df@I3+00@0b @OC@.lt r14,0 +00000078 19ff@I3+00@09 @OC@.gt r15,512 +00000080 1800@I3+81@00 @OC@.f r0,r1 +00000084 185e@I3+80@01 @OC@.f r2,1 +00000088 1fa2@I3+00@00 @OC@.f 0,r4 +0000008c 18bf@I3+01@00 @OC@.f r5,512 +00000094 1fc3@I3+01@00 @OC@.f 512,r6 +0000009c 1fdf@I3+01@00 @OC@.f 512,512 +000000a4 1800@I3+81@01 @OC@.eq.f r0,r1 +000000a8 183f@I3+01@02 @OC@.ne.f r1,0 +000000b0 1fc1@I3+01@0b @OC@.lt.f 0,r2 +000000b8 1fc1@I3+01@09 @OC@.gt.f 1,r2 +000000c0 181f@I3+01@0c @OC@.le.f r0,512 +000000c8 1fc1@I3+01@0a @OC@.ge.f 512,r2 +000000d0 1fdf@I3+01@04 @OC@.n.f 512,512 diff --git a/gas/testsuite/gas/arc/insn3.s b/gas/testsuite/gas/arc/insn3.s new file mode 100644 index 0000000..f12fb88 --- /dev/null +++ b/gas/testsuite/gas/arc/insn3.s @@ -0,0 +1,52 @@ +# Insn 3 @OC@ test + +# reg,reg + @OC@ r0,r1 + @OC@ fp,sp + +# shimm values + @OC@ r0,0 + @OC@ r1,-1 + @OC@ 0,r2 + @OC@ -1,r3 + @OC@ r4,255 + @OC@ 255,r5 + @OC@ r6,-256 + @OC@ -256,r7 + +# limm values + @OC@ r8,256 + @OC@ r9,-257 + @OC@ 511,r10 + @OC@ r11,0x42424242 + @OC@ 0x12345678,r12 + +# shimm and limm + @OC@ 255,256 + @OC@ 256,255 + +# symbols + @OC@ r0,foo + +# conditional execution + @OC@.eq r10,r11 + @OC@.ne r12,r13 + @OC@.lt r14,0 + @OC@.gt r15,512 + +# flag setting + @OC@.f r0,r1 + @OC@.f r2,1 + @OC@.f 0,r4 + @OC@.f r5,512 + @OC@.f 512,r6 + @OC@.f 512,512 + +# conditional execution + flag setting + @OC@.eq.f r0,r1 + @OC@.ne.f r1,0 + @OC@.lt.f 0,r2 + @OC@.gt.f 1,r2 + @OC@.le.f r0,512 + @OC@.ge.f 512,r2 + @OC@.n.f 512,512 diff --git a/gas/testsuite/gas/arc/j.d b/gas/testsuite/gas/arc/j.d new file mode 100644 index 0000000..af103f0 --- /dev/null +++ b/gas/testsuite/gas/arc/j.d @@ -0,0 +1,75 @@ +#objdump: -dr +#name: j + +# Test the j insn. + +.*: +file format elf32-.*arc + +Disassembly of section .text: +00000000 <text_label> 38000000 j r0 +00000004 <text_label\+4> 38000020 j.d r0 +00000008 <text_label\+8> 38000040 j.jd r0 +0000000c <text_label\+c> 38000000 j r0 +00000010 <text_label\+10> 38008000 j r1 +00000014 <text_label\+14> 38008020 j.d r1 +00000018 <text_label\+18> 38008040 j.jd r1 +0000001c <text_label\+1c> 38008000 j r1 +00000020 <text_label\+20> 381f0000 j 0 + RELOC: 00000024 R_ARC_32 .text +00000028 <text_label\+28> 381f0000 j 0 + RELOC: 0000002c R_ARC_32 .text +00000030 <text_label\+30> 381f0000 j 0 + RELOC: 00000034 R_ARC_32 .text +00000038 <text_label\+38> 381f0001 jeq 0 + RELOC: 0000003c R_ARC_32 .text +00000040 <text_label\+40> 381f0001 jeq 0 + RELOC: 00000044 R_ARC_32 .text +00000048 <text_label\+48> 381f0002 jne 0 + RELOC: 0000004c R_ARC_32 .text +00000050 <text_label\+50> 381f0002 jne 0 + RELOC: 00000054 R_ARC_32 .text +00000058 <text_label\+58> 381f0003 jp 0 + RELOC: 0000005c R_ARC_32 .text +00000060 <text_label\+60> 381f0003 jp 0 + RELOC: 00000064 R_ARC_32 .text +00000068 <text_label\+68> 381f0004 jn 0 + RELOC: 0000006c R_ARC_32 .text +00000070 <text_label\+70> 381f0004 jn 0 + RELOC: 00000074 R_ARC_32 .text +00000078 <text_label\+78> 381f0005 jc 0 + RELOC: 0000007c R_ARC_32 .text +00000080 <text_label\+80> 381f0005 jc 0 + RELOC: 00000084 R_ARC_32 .text +00000088 <text_label\+88> 381f0005 jc 0 + RELOC: 0000008c R_ARC_32 .text +00000090 <text_label\+90> 381f0006 jnc 0 + RELOC: 00000094 R_ARC_32 .text +00000098 <text_label\+98> 381f0006 jnc 0 + RELOC: 0000009c R_ARC_32 .text +000000a0 <text_label\+a0> 381f0006 jnc 0 + RELOC: 000000a4 R_ARC_32 .text +000000a8 <text_label\+a8> 381f0007 jv 0 + RELOC: 000000ac R_ARC_32 .text +000000b0 <text_label\+b0> 381f0007 jv 0 + RELOC: 000000b4 R_ARC_32 .text +000000b8 <text_label\+b8> 381f0008 jnv 0 + RELOC: 000000bc R_ARC_32 .text +000000c0 <text_label\+c0> 381f0008 jnv 0 + RELOC: 000000c4 R_ARC_32 .text +000000c8 <text_label\+c8> 381f0009 jgt 0 + RELOC: 000000cc R_ARC_32 .text +000000d0 <text_label\+d0> 381f000a jge 0 + RELOC: 000000d4 R_ARC_32 .text +000000d8 <text_label\+d8> 381f000b jlt 0 + RELOC: 000000dc R_ARC_32 .text +000000e0 <text_label\+e0> 381f000c jle 0 + RELOC: 000000e4 R_ARC_32 .text +000000e8 <text_label\+e8> 381f000d jhi 0 + RELOC: 000000ec R_ARC_32 .text +000000f0 <text_label\+f0> 381f000e jls 0 + RELOC: 000000f4 R_ARC_32 .text +000000f8 <text_label\+f8> 381f000f jpnz 0 + RELOC: 000000fc R_ARC_32 .text +00000100 <text_label\+100> 381f0000 j 0 + RELOC: 00000104 R_ARC_32 external_text_label +00000108 <text_label\+108> 381f0000 j 0 diff --git a/gas/testsuite/gas/arc/j.s b/gas/testsuite/gas/arc/j.s new file mode 100644 index 0000000..0161af2 --- /dev/null +++ b/gas/testsuite/gas/arc/j.s @@ -0,0 +1,45 @@ +# j test + +text_label: + j r0 + j.d r0 + j.jd r0 + j.nd r0 + + j.f [r1] + j.d.f [r1] + j.jd.f [r1] + j.nd.f [r1] + + j text_label + jal text_label + jra text_label + jeq text_label + jz text_label + jne text_label + jnz text_label + jpl text_label + jp text_label + jmi text_label + jn text_label + jcs text_label + jc text_label + jlo text_label + jcc text_label + jnc text_label + jhs text_label + jvs text_label + jv text_label + jvc text_label + jnv text_label + jgt text_label + jge text_label + jlt text_label + jle text_label + jhi text_label + jls text_label + jpnz text_label + + j external_text_label + + j 0 diff --git a/gas/testsuite/gas/arc/ld.d b/gas/testsuite/gas/arc/ld.d new file mode 100644 index 0000000..d6dd0a1 --- /dev/null +++ b/gas/testsuite/gas/arc/ld.d @@ -0,0 +1,30 @@ +#objdump: -dr +#name: ld/lr + +# Test the ld/lr insn. + +.*: +file format elf32-.*arc + +Disassembly of section .text: +00000000 08008000 ld r0,\[r1\] +00000004 00418800 ld r2,\[r3,r4\] +00000008 08a30001 ld r5,\[r6,1\] +0000000c 08e401ff ld r7,\[r8,-1\] +00000010 092500ff ld r9,\[r10,255\] +00000014 09660100 ld r11,\[r12,-256\] +00000018 01a77c00 ld r13,\[r14,256\] +00000020 01e87c00 ld r15,\[r16,-257\] +00000028 023f3800 ld r17,\[305419896,sp\] +00000030 0a7f0000 ld r19,\[0\] + RELOC: 00000034 R_ARC_32 foo +00000038 0a9f0000 ld r20,\[4\] + RELOC: 0000003c R_ARC_32 foo +00000040 081f8400 ldb r0,\[0\] +00000044 081f8800 ldw r0,\[0\] +00000048 081f8200 ld.x r0,\[0\] +0000004c 081f9000 ld.a r0,\[0\] +00000050 081fc000 ld.di r0,\[0\] +00000054 08005600 ldb.x.a.di r0,\[r0\] +00000058 0800a000 lr r0,\[r1\] +0000005c 085fa000 lr r2,\[status\] +00000060 087f2000 lr r3,\[305419896\] diff --git a/gas/testsuite/gas/arc/ld.s b/gas/testsuite/gas/arc/ld.s new file mode 100644 index 0000000..aa26719 --- /dev/null +++ b/gas/testsuite/gas/arc/ld.s @@ -0,0 +1,24 @@ +# ld/lr test + + ld r0,[r1] + ld r2,[r3,r4] + ld r5,[r6,1] + ld r7,[r8,-1] + ld r9,[r10,255] + ld r11,[r12,-256] + ld r13,[r14,256] + ld r15,[r16,-257] + ld r17,[0x12345678,r28] + ld r19,[foo] + ld r20,[foo+4] + + ldb r0,[0] + ldw r0,[0] + ld.x r0,[0] + ld.a r0,[0] + ld.di r0,[0] + ldb.x.a.di r0,[r0] + + lr r0,[r1] + lr r2,[status] + lr r3,[0x12345678] diff --git a/gas/testsuite/gas/arc/math.d b/gas/testsuite/gas/arc/math.d new file mode 100644 index 0000000..ccb79c5 --- /dev/null +++ b/gas/testsuite/gas/arc/math.d @@ -0,0 +1,78 @@ +#objdump: -dr +#name: @OC@ + +# Test the @OC@ insn. + +.*: +file format elf32-.*arc + +Disassembly of section .text: +00000000 @IC+0@008400 @OC@ r0,r1,r2 +00000004 @IC+3@4db800 @OC@ r26,fp,sp +00000008 @IC+3@af3e00 @OC@ ilink1,ilink2,blink +0000000c @IC+7@5df800 @OC@ r58,r59,lp_count +00000010 @IC+0@00fe00 @OC@ r0,r1,0 +00000014 @IC+0@1f8400 @OC@ r0,0,r2 +00000018 @IC+7@e08400 @OC@ 0,r1,r2 +0000001c @IC+0@00ffff @OC@ r0,r1,-1 +00000020 @IC+0@1f85ff @OC@ r0,-1,r2 +00000024 @IC+7@e085ff @OC@ -1,r1,r2 +00000028 @IC+0@00feff @OC@ r0,r1,255 +0000002c @IC+0@1f84ff @OC@ r0,255,r2 +00000030 @IC+7@e084ff @OC@ 255,r1,r2 +00000034 @IC+0@00ff00 @OC@ r0,r1,-256 +00000038 @IC+0@1f8500 @OC@ r0,-256,r2 +0000003c @IC+7@e08500 @OC@ -256,r1,r2 +00000040 @IC+0@00fc00 @OC@ r0,r1,256 +00000048 @IC+0@1f0400 @OC@ r0,-257,r2 +00000050 @IC+7@c08400 @OC@ 511,r1,r2 +00000058 @IC+0@1f0400 @OC@ r0,1111638594,r2 +00000060 @IC+7@c0fc00 @OC@ 305419896,r1,305419896 +00000068 @IC+0@1ffcff @OC@ r0,255,256 +00000070 @IC+0@1f7eff @OC@ r0,256,255 +00000078 @IC+7@e0fcff @OC@ 255,r1,256 +00000080 @IC+7@ff04ff @OC@ 255,256,r2 +00000088 @IC+7@c0feff @OC@ 256,r1,255 +00000090 @IC+7@df84ff @OC@ 256,255,r2 +00000098 @IC+0@00fc00 @OC@ r0,r1,0 + RELOC: 0000009c R_ARC_32 foo +000000a0 @IC+0@008400 @OC@ r0,r1,r2 +000000a4 @IC+0@620a00 @OC@ r3,r4,r5 +000000a8 @IC+0@c39001 @OC@.eq r6,r7,r8 +000000ac @IC+1@251601 @OC@.eq r9,r10,r11 +000000b0 @IC+1@869c02 @OC@.ne r12,r13,r14 +000000b4 @IC+1@e82202 @OC@.ne r15,r16,r17 +000000b8 @IC+2@49a803 @OC@.p r18,r19,r20 +000000bc @IC+2@ab2e03 @OC@.p r21,r22,r23 +000000c0 @IC+3@0cb404 @OC@.n r24,r25,r26 +000000c4 @IC+3@6e3a04 @OC@.n fp,sp,ilink1 +000000c8 @IC+3@cfc005 @OC@.c ilink2,blink,r32 +000000cc @IC+4@314605 @OC@.c r33,r34,r35 +000000d0 @IC+4@92cc05 @OC@.c r36,r37,r38 +000000d4 @IC+4@f45206 @OC@.nc r39,r40,r41 +000000d8 @IC+5@55d806 @OC@.nc r42,r43,r44 +000000dc @IC+5@b75e06 @OC@.nc r45,r46,r47 +000000e0 @IC+6@18e407 @OC@.v r48,r49,r50 +000000e4 @IC+6@7a6a07 @OC@.v r51,r52,r53 +000000e8 @IC+6@dbf008 @OC@.nv r54,r55,r56 +000000ec @IC+7@3d7608 @OC@.nv r57,r58,r59 +000000f0 @IC+7@9e0009 @OC@.gt lp_count,lp_count,r0 +000000f4 @IC+0@007c0a @OC@.ge r0,r0,0 +000000fc @IC+0@3f020b @OC@.lt r1,1,r1 +00000104 @IC+7@c0840c @OC@.le 2,r1,r2 +0000010c @IC+0@7f060d @OC@.hi r3,3,r3 +00000114 @IC+7@df080e @OC@.ls 4,4,r4 +0000011c @IC+7@c2fc0f @OC@.pnz 5,r5,5 +00000124 @IC+0@008500 @OC@.f r0,r1,r2 +00000128 @IC+0@00fa01 @OC@.f r0,r1,1 +0000012c @IC+0@1e8401 @OC@.f r0,1,r2 +00000130 @IC+7@a08400 @OC@.f 0,r1,r2 +00000134 @IC+0@00fd00 @OC@.f r0,r1,512 +0000013c @IC+0@1f0500 @OC@.f r0,512,r2 +00000144 @IC+7@c08500 @OC@.f 512,r1,r2 +0000014c @IC+0@008501 @OC@.eq.f r0,r1,r2 +00000150 @IC+0@00fd02 @OC@.ne.f r0,r1,0 +00000158 @IC+0@1f050b @OC@.lt.f r0,0,r2 +00000160 @IC+7@c08509 @OC@.gt.f 0,r1,r2 +00000168 @IC+0@00fd0c @OC@.le.f r0,r1,512 +00000170 @IC+0@1f050a @OC@.ge.f r0,512,r2 +00000178 @IC+7@c08504 @OC@.n.f 512,r1,r2 diff --git a/gas/testsuite/gas/arc/math.s b/gas/testsuite/gas/arc/math.s new file mode 100644 index 0000000..775169a --- /dev/null +++ b/gas/testsuite/gas/arc/math.s @@ -0,0 +1,89 @@ +# @OC@ test + +# Stay away from operands with duplicate arguments (eg: add r0,r1,r1). +# They will be disassembled as they're macro counterparts (eg: asl r0,r1). + +# reg,reg,reg + @OC@ r0,r1,r2 + @OC@ r26,fp,sp + @OC@ ilink1,ilink2,blink + @OC@ r58,r59,lp_count + +# shimm values + @OC@ r0,r1,0 + @OC@ r0,0,r2 + @OC@ 0,r1,r2 + @OC@ r0,r1,-1 + @OC@ r0,-1,r2 + @OC@ -1,r1,r2 + @OC@ r0,r1,255 + @OC@ r0,255,r2 + @OC@ 255,r1,r2 + @OC@ r0,r1,-256 + @OC@ r0,-256,r2 + @OC@ -256,r1,r2 + +# limm values + @OC@ r0,r1,256 + @OC@ r0,-257,r2 + @OC@ 511,r1,r2 + @OC@ r0,0x42424242,r2 + @OC@ 0x12345678,r1,0x12345678 + +# shimm and limm + @OC@ r0,255,256 + @OC@ r0,256,255 + @OC@ 255,r1,256 + @OC@ 255,256,r2 + @OC@ 256,r1,255 + @OC@ 256,255,r2 + +# symbols + @OC@ r0,r1,foo + +# conditional execution + @OC@.al r0,r1,r2 + @OC@.ra r3,r4,r5 + @OC@.eq r6,r7,r8 + @OC@.z r9,r10,r11 + @OC@.ne r12,r13,r14 + @OC@.nz r15,r16,r17 + @OC@.pl r18,r19,r20 + @OC@.p r21,r22,r23 + @OC@.mi r24,r25,r26 + @OC@.n r27,r28,r29 + @OC@.cs r30,r31,r32 + @OC@.c r33,r34,r35 + @OC@.lo r36,r37,r38 + @OC@.cc r39,r40,r41 + @OC@.nc r42,r43,r44 + @OC@.hs r45,r46,r47 + @OC@.vs r48,r49,r50 + @OC@.v r51,r52,r53 + @OC@.vc r54,r55,r56 + @OC@.nv r57,r58,r59 + @OC@.gt r60,r60,r0 + @OC@.ge r0,r0,0 + @OC@.lt r1,1,r1 + @OC@.le 2,r1,r2 + @OC@.hi r3,3,r3 + @OC@.ls 4,4,r4 + @OC@.pnz 5,r5,5 + +# flag setting + @OC@.f r0,r1,r2 + @OC@.f r0,r1,1 + @OC@.f r0,1,r2 + @OC@.f 0,r1,r2 + @OC@.f r0,r1,512 + @OC@.f r0,512,r2 + @OC@.f 512,r1,r2 + +# conditional execution + flag setting + @OC@.eq.f r0,r1,r2 + @OC@.ne.f r0,r1,0 + @OC@.lt.f r0,0,r2 + @OC@.gt.f 0,r1,r2 + @OC@.le.f r0,r1,512 + @OC@.ge.f r0,512,r2 + @OC@.n.f 512,r1,r2 diff --git a/gas/testsuite/gas/arc/sshift.d b/gas/testsuite/gas/arc/sshift.d new file mode 100644 index 0000000..c0207a7 --- /dev/null +++ b/gas/testsuite/gas/arc/sshift.d @@ -0,0 +1,44 @@ +#objdump: -dr +#name: @OC@ + +# Test the @OC@ insn. + +.*: +file format elf32-.*arc + +Disassembly of section .text: +00000000 1800@I3+80@00 @OC@ r0,r1 +00000004 1b6e@I3+00@00 @OC@ fp,sp +00000008 181f@I3+80@00 @OC@ r0,0 +0000000c 183f@I3+81@ff @OC@ r1,-1 +00000010 1fe1@I3+00@00 @OC@ 0,r2 +00000014 1fe1@I3+81@ff @OC@ -1,r3 +00000018 189f@I3+80@ff @OC@ r4,255 +0000001c 1fe2@I3+80@ff @OC@ 255,r5 +00000020 18df@I3+81@00 @OC@ r6,-256 +00000024 1fe3@I3+81@00 @OC@ -256,r7 +00000028 191f@I3+00@00 @OC@ r8,256 +00000030 193f@I3+00@00 @OC@ r9,-257 +00000038 1fc5@I3+00@00 @OC@ 511,r10 +00000040 197f@I3+00@00 @OC@ r11,1111638594 +00000048 1fc6@I3+00@00 @OC@ 305419896,r12 +00000050 1fff@I3+00@ff @OC@ 255,256 +00000058 1fdf@I3+80@ff @OC@ 256,255 +00000060 181f@I3+00@00 @OC@ r0,0 + RELOC: 00000064 R_ARC_32 foo +00000068 1945@I3+80@01 @OC@.eq r10,r11 +0000006c 1986@I3+80@02 @OC@.ne r12,r13 +00000070 19df@I3+00@0b @OC@.lt r14,0 +00000078 19ff@I3+00@09 @OC@.gt r15,512 +00000080 1800@I3+81@00 @OC@.f r0,r1 +00000084 185e@I3+80@01 @OC@.f r2,1 +00000088 1fa2@I3+00@00 @OC@.f 0,r4 +0000008c 18bf@I3+01@00 @OC@.f r5,512 +00000094 1fc3@I3+01@00 @OC@.f 512,r6 +0000009c 1fdf@I3+01@00 @OC@.f 512,512 +000000a4 1800@I3+81@01 @OC@.eq.f r0,r1 +000000a8 183f@I3+01@02 @OC@.ne.f r1,0 +000000b0 1fc1@I3+01@0b @OC@.lt.f 0,r2 +000000b8 1fc1@I3+01@09 @OC@.gt.f 1,r2 +000000c0 181f@I3+01@0c @OC@.le.f r0,512 +000000c8 1fc1@I3+01@0a @OC@.ge.f 512,r2 +000000d0 1fdf@I3+01@04 @OC@.n.f 512,512 diff --git a/gas/testsuite/gas/arc/sshift.s b/gas/testsuite/gas/arc/sshift.s new file mode 100644 index 0000000..e2fa661 --- /dev/null +++ b/gas/testsuite/gas/arc/sshift.s @@ -0,0 +1,52 @@ +# Single shift @OC@ test + +# reg,reg + @OC@ r0,r1 + @OC@ fp,sp + +# shimm values + @OC@ r0,0 + @OC@ r1,-1 + @OC@ 0,r2 + @OC@ -1,r3 + @OC@ r4,255 + @OC@ 255,r5 + @OC@ r6,-256 + @OC@ -256,r7 + +# limm values + @OC@ r8,256 + @OC@ r9,-257 + @OC@ 511,r10 + @OC@ r11,0x42424242 + @OC@ 0x12345678,r12 + +# shimm and limm + @OC@ 255,256 + @OC@ 256,255 + +# symbols + @OC@ r0,foo + +# conditional execution + @OC@.eq r10,r11 + @OC@.ne r12,r13 + @OC@.lt r14,0 + @OC@.gt r15,512 + +# flag setting + @OC@.f r0,r1 + @OC@.f r2,1 + @OC@.f 0,r4 + @OC@.f r5,512 + @OC@.f 512,r6 + @OC@.f 512,512 + +# conditional execution + flag setting + @OC@.eq.f r0,r1 + @OC@.ne.f r1,0 + @OC@.lt.f 0,r2 + @OC@.gt.f 1,r2 + @OC@.le.f r0,512 + @OC@.ge.f 512,r2 + @OC@.n.f 512,512 diff --git a/gas/testsuite/gas/arc/st.d b/gas/testsuite/gas/arc/st.d new file mode 100644 index 0000000..cca99a8 --- /dev/null +++ b/gas/testsuite/gas/arc/st.d @@ -0,0 +1,25 @@ +#objdump: -dr +#name: st/sr + +# Test the st/sr insn. + +.*: +file format elf32-.*arc + +Disassembly of section .text: +00000000 10008000 st r0,\[r1\] +00000004 10030a01 st r5,\[r6,1\] +00000008 10040fff st r7,\[r8,-1\] +0000000c 100512ff st r9,\[r10,255\] +00000010 10061700 st r11,\[r12,-256\] +00000014 101f2600 st r19,\[0\] + RELOC: 00000018 R_ARC_32 foo +0000001c 101f2800 st r20,\[4\] + RELOC: 00000020 R_ARC_32 foo +00000024 105f0000 stb r0,\[0\] +0000002c 109f0000 stw r0,\[0\] +00000034 111f0000 st.a r0,\[0\] +0000003c 141f0000 st.di r0,\[0\] +00000044 15400000 stb.a.di r0,\[r0\] +00000048 12008000 sr r0,\[r1\] +0000004c 121f8400 sr r2,\[status\] +00000050 121f0600 sr r3,\[305419896\] diff --git a/gas/testsuite/gas/arc/st.s b/gas/testsuite/gas/arc/st.s new file mode 100644 index 0000000..10af198 --- /dev/null +++ b/gas/testsuite/gas/arc/st.s @@ -0,0 +1,19 @@ +# st/sr test + + st r0,[r1] + st r5,[r6,1] + st r7,[r8,-1] + st r9,[r10,255] + st r11,[r12,-256] + st r19,[foo] + st r20,[foo+4] + + stb r0,[0] + stw r0,[0] + st.a r0,[0] + st.di r0,[0] + stb.a.di r0,[r0] + + sr r0,[r1] + sr r2,[status] + sr r3,[0x12345678] diff --git a/gas/testsuite/gas/arc/warn.exp b/gas/testsuite/gas/arc/warn.exp new file mode 100644 index 0000000..79ff126 --- /dev/null +++ b/gas/testsuite/gas/arc/warn.exp @@ -0,0 +1,13 @@ +# Test assembler warnings. + +if [istarget arc*-*-*] { + + load_lib gas-dg.exp + + dg-init + + dg-runtest [lsort [glob -nocomplain $srcdir/$subdir/warn*.s]] "" "" + + dg-finish + +} diff --git a/gas/testsuite/gas/arc/warn.s b/gas/testsuite/gas/arc/warn.s new file mode 100644 index 0000000..6fcb437 --- /dev/null +++ b/gas/testsuite/gas/arc/warn.s @@ -0,0 +1,14 @@ +; Test ARC specific assembler warnings +; +; { dg-do assemble { target arc-*-* } } + + b.d foo + mov r0,256 ; { dg-warning "8 byte instruction in delay slot" "8 byte insn in delay slot" } + + j.d foo ; { dg-warning "8 byte jump instruction with delay slot" "8 byte jump with delay slot" } + mov r0,r1 + + sub.f 0,r0,r2 + beq foo ; { dg-warning "conditional branch follows set of flags" "cc set/branch nop test" } + +foo: diff --git a/gas/testsuite/gas/arm/arch4t.s b/gas/testsuite/gas/arm/arch4t.s new file mode 100644 index 0000000..8d28f7f --- /dev/null +++ b/gas/testsuite/gas/arm/arch4t.s @@ -0,0 +1,21 @@ +.text +.align 0 + + bx r0 + bxeq r1 + +foo: + ldrh r3, foo + ldrsh r4, [r5] + ldrsb r4, [r1, r3] + ldrsh r1, [r4, r4]! + ldreqsb r1, [r5, -r3] + ldrneh r2, [r6], r7 + ldrccsh r2, [r7], +r8 + ldrsb r2, [r3, #255] + ldrsh r1, [r4, #-250] + ldrsb r1, [r5, #+240] + + strh r2, bar + strneh r3, [r3] +bar: diff --git a/gas/testsuite/gas/arm/arm.exp b/gas/testsuite/gas/arm/arm.exp new file mode 100644 index 0000000..f21c54d --- /dev/null +++ b/gas/testsuite/gas/arm/arm.exp @@ -0,0 +1,34 @@ +# +# Some ARM tests +# +if [istarget arm-*-*] then { + run_dump_test "inst" + + gas_test "arm3.s" "" $stdoptlist "Arm 3 instructions" + + gas_test "arm6.s" "" $stdoptlist "Arm 6 instructions" + + gas_test "arm7dm.s" "" $stdoptlist "Arm 7DM instructions" + + run_dump_test "arm7t" + + gas_test "thumb.s" "" $stdoptlist "Thumb instructions" + + gas_test "arch4t.s" "" $stdoptlist "Arm architecture 4t instructions" + + gas_test "copro.s" "" $stdoptlist "Co processor instructions" + + gas_test "immed.s" "" $stdoptlist "immediate expressions" + + gas_test "float.s" "" $stdoptlist "Core floating point instructions" +} + +# Not all arm targets are bi-endian, so only run this test on ones +# we know that are. FIXME: We should probably also key off armeb/armel. + +if [istarget arm-*-pe] { + run_dump_test "le-fpconst" + + # Since big-endian numbers have the normal format, this doesn't exist. + #run_dump_test "be-fpconst" +} diff --git a/gas/testsuite/gas/arm/arm3.s b/gas/testsuite/gas/arm/arm3.s new file mode 100644 index 0000000..ebcf915 --- /dev/null +++ b/gas/testsuite/gas/arm/arm3.s @@ -0,0 +1,6 @@ +.text +.align 0 + swp r0, r1, [r8] + swpb r2, r3, [r3] + swpgeb r4, r1, [r4] + diff --git a/gas/testsuite/gas/arm/arm6.s b/gas/testsuite/gas/arm/arm6.s new file mode 100644 index 0000000..4b51712 --- /dev/null +++ b/gas/testsuite/gas/arm/arm6.s @@ -0,0 +1,12 @@ +.text +.align 0 + + mrs r8, cpsr + mrseq r9, cpsr_all + mrs r2, spsr + + msr cpsr, r1 + msrne cpsr_flg, #0xf0000000 + msr spsr_flg, r8 + msr spsr_all, r9 + diff --git a/gas/testsuite/gas/arm/arm7dm.s b/gas/testsuite/gas/arm/arm7dm.s new file mode 100644 index 0000000..7496c70 --- /dev/null +++ b/gas/testsuite/gas/arm/arm7dm.s @@ -0,0 +1,12 @@ +.text +.align 0 + + smull r0, r1, r2, r3 + umull r0, r1, r2, r3 + smlal r0, r1, r2, r3 + umlal r0, r1, r4, r3 + + smullne r0, r1, r3, r4 + smulls r1, r0, r9, r11 + umlaleqs r2, r9, r4, r9 + smlalge r14, r10, r8, r14 diff --git a/gas/testsuite/gas/arm/arm7t.d b/gas/testsuite/gas/arm/arm7t.d new file mode 100644 index 0000000..143a161 --- /dev/null +++ b/gas/testsuite/gas/arm/arm7t.d @@ -0,0 +1,68 @@ +#objdump: -dr --prefix-addresses --show-raw-insn +#name: ARM arm7t +#as: -marm7t -EL + +# Test the halfword and signextend memory transfers: + +.*: +file format .*arm.* + +Disassembly of section .text: +00000000 <[^>]*> e1d100b0 ? ldrh r0, \[r1\] +00000004 <[^>]*> e1f100b0 ? ldrh r0, \[r1\]! +00000008 <[^>]*> e19100b2 ? ldrh r0, \[r1, r2\] +0000000c <[^>]*> e1b100b2 ? ldrh r0, \[r1, r2\]! +00000010 <[^>]*> e1d100bc ? ldrh r0, \[r1, #12\] +00000014 <[^>]*> e1f100bc ? ldrh r0, \[r1, #12\]! +00000018 <[^>]*> e15100bc ? ldrh r0, \[r1, -#12\] +0000001c <[^>]*> e09100b2 ? ldrh r0, \[r1\], r2 +00000020 <[^>]*> e3a00cff ? mov r0, #65280 +00000024 <[^>]*> e1df0bb4 ? ldrh r0, 000000e0 <\$\$lit_1> +00000028 <[^>]*> e1df0abc ? ldrh r0, 000000dc <.L2> +0000002c <[^>]*> e1c100b0 ? strh r0, \[r1\] +00000030 <[^>]*> e1e100b0 ? strh r0, \[r1\]! +00000034 <[^>]*> e18100b2 ? strh r0, \[r1, r2\] +00000038 <[^>]*> e1a100b2 ? strh r0, \[r1, r2\]! +0000003c <[^>]*> e1c100bc ? strh r0, \[r1, #12\] +00000040 <[^>]*> e1e100bc ? strh r0, \[r1, #12\]! +00000044 <[^>]*> e14100bc ? strh r0, \[r1, -#12\] +00000048 <[^>]*> e08100b2 ? strh r0, \[r1\], r2 +0000004c <[^>]*> e1cf08b8 ? strh r0, 000000dc <.L2> +00000050 <[^>]*> e1d100d0 ? ldrsb r0, \[r1\] +00000054 <[^>]*> e1f100d0 ? ldrsb r0, \[r1\]! +00000058 <[^>]*> e19100d2 ? ldrsb r0, \[r1, r2\] +0000005c <[^>]*> e1b100d2 ? ldrsb r0, \[r1, r2\]! +00000060 <[^>]*> e1d100dc ? ldrsb r0, \[r1, #12\] +00000064 <[^>]*> e1f100dc ? ldrsb r0, \[r1, #12\]! +00000068 <[^>]*> e15100dc ? ldrsb r0, \[r1, -#12\] +0000006c <[^>]*> e09100d2 ? ldrsb r0, \[r1\], r2 +00000070 <[^>]*> e3a000de ? mov r0, #222 +00000074 <[^>]*> e1df06d0 ? ldrsb r0, 000000dc <.L2> +00000078 <[^>]*> e1d100f0 ? ldrsh r0, \[r1\] +0000007c <[^>]*> e1f100f0 ? ldrsh r0, \[r1\]! +00000080 <[^>]*> e19100f2 ? ldrsh r0, \[r1, r2\] +00000084 <[^>]*> e1b100f2 ? ldrsh r0, \[r1, r2\]! +00000088 <[^>]*> e1d100fc ? ldrsh r0, \[r1, #12\] +0000008c <[^>]*> e1f100fc ? ldrsh r0, \[r1, #12\]! +00000090 <[^>]*> e15100fc ? ldrsh r0, \[r1, -#12\] +00000094 <[^>]*> e09100f2 ? ldrsh r0, \[r1\], r2 +00000098 <[^>]*> e3a00cff ? mov r0, #65280 +0000009c <[^>]*> e1df03fc ? ldrsh r0, 000000e0 <\$\$lit_1> +000000a0 <[^>]*> e1df03f4 ? ldrsh r0, 000000dc <.L2> +000000a4 <[^>]*> e19100b2 ? ldrh r0, \[r1, r2\] +000000a8 <[^>]*> 119100b2 ? ldrneh r0, \[r1, r2\] +000000ac <[^>]*> 819100b2 ? ldrhih r0, \[r1, r2\] +000000b0 <[^>]*> b19100b2 ? ldrlth r0, \[r1, r2\] +000000b4 <[^>]*> e19100f2 ? ldrsh r0, \[r1, r2\] +000000b8 <[^>]*> 119100f2 ? ldrnesh r0, \[r1, r2\] +000000bc <[^>]*> 819100f2 ? ldrhish r0, \[r1, r2\] +000000c0 <[^>]*> b19100f2 ? ldrltsh r0, \[r1, r2\] +000000c4 <[^>]*> e19100d2 ? ldrsb r0, \[r1, r2\] +000000c8 <[^>]*> 119100d2 ? ldrnesb r0, \[r1, r2\] +000000cc <[^>]*> 819100d2 ? ldrhisb r0, \[r1, r2\] +000000d0 <[^>]*> b19100d2 ? ldrltsb r0, \[r1, r2\] +000000d4 <[^>]*> e1df00f4 ? ldrsh r0, 000000e0 <\$\$lit_1> +000000d8 <[^>]*> e1df00f4 ? ldrsh r0, 000000e4 <\$\$lit_1\+0x4> +000000dc <[^>]*> 00000000 ? andeq r0, r0, r0 +[ ]*dc:.*.LC0 +000000e0 <[^>]*> 0000c0de ? .* +000000e4 <[^>]*> 0000dead ? .* diff --git a/gas/testsuite/gas/arm/arm7t.s b/gas/testsuite/gas/arm/arm7t.s new file mode 100644 index 0000000..656e90e --- /dev/null +++ b/gas/testsuite/gas/arm/arm7t.s @@ -0,0 +1,79 @@ + .section .rdata + .align 0 +.LC0: + .ascii "some data\000" + + .text + .align 0 + +loadhalfwords: + ldrh r0, [r1] + ldrh r0, [r1]! + ldrh r0, [r1, r2] + ldrh r0, [r1, r2]! + ldrh r0, [r1,#0x0C] + ldrh r0, [r1,#0x0C]! + ldrh r0, [r1,#-0x0C] + ldrh r0, [r1], r2 + ldrh r0, =0xFF00 + ldrh r0, =0xC0DE + ldrh r0, .L2 + +storehalfwords: + strh r0, [r1] + strh r0, [r1]! + strh r0, [r1, r2] + strh r0, [r1, r2]! + strh r0, [r1,#0x0C] + strh r0, [r1,#0x0C]! + strh r0, [r1,#-0x0C] + strh r0, [r1], r2 + strh r0, .L2 + +loadsignedbytes: + ldrsb r0, [r1] + ldrsb r0, [r1]! + ldrsb r0, [r1, r2] + ldrsb r0, [r1, r2]! + ldrsb r0, [r1,#0x0C] + ldrsb r0, [r1,#0x0C]! + ldrsb r0, [r1,#-0x0C] + ldrsb r0, [r1], r2 + ldrsb r0, =0xDE + ldrsb r0, .L2 + +loadsignedhalfwords: + ldrsh r0, [r1] + ldrsh r0, [r1]! + ldrsh r0, [r1, r2] + ldrsh r0, [r1, r2]! + ldrsh r0, [r1, #0x0C] + ldrsh r0, [r1, #0x0C]! + ldrsh r0, [r1, #-0x0C] + ldrsh r0, [r1], r2 + ldrsh r0, =0xFF00 + ldrsh r0, =0xC0DE + ldrsh r0, .L2 + +misc: + ldralh r0, [r1, r2] + ldrneh r0, [r1, r2] + ldrhih r0, [r1, r2] + ldrlth r0, [r1, r2] + + ldralsh r0, [r1, r2] + ldrnesh r0, [r1, r2] + ldrhish r0, [r1, r2] + ldrltsh r0, [r1, r2] + + ldralsb r0, [r1, r2] + ldrnesb r0, [r1, r2] + ldrhisb r0, [r1, r2] + ldrltsb r0, [r1, r2] + + ldrsh r0, =0xC0DE + ldrsh r0, =0xDEAD + + .align +.L2: + .word .LC0 diff --git a/gas/testsuite/gas/arm/copro.s b/gas/testsuite/gas/arm/copro.s new file mode 100644 index 0000000..46c9b92 --- /dev/null +++ b/gas/testsuite/gas/arm/copro.s @@ -0,0 +1,24 @@ +.text +.align 0 + cdp p1, 4, cr1, cr2, cr3 + cdpeq 4, 3, c1, c4, cr5, 5 + + ldc 5, cr9, [r3] + ldcl 1, cr14, [r1, #32] + ldcmi 0, cr0, [r2, #1020]! + ldcpll p7, c1, [r3], #64 + ldc p0, c8, foo +foo: + + stc 5, cr0, [r3] + stcl 3, cr15, [r0, #8] + stceq p4, cr12, [r2, #100]! + stccc p6, c8, [r4], #48 + stc p1, c7, bar +bar: + + mrc 2, 3, r5, c1, c2 + mrcge p4, 5, r15, cr1, cr2, 7 + + mcr p7, 1, r15, cr1, cr1 + mcrlt 5, 1, r8, cr2, cr9, 0 diff --git a/gas/testsuite/gas/arm/float.s b/gas/testsuite/gas/arm/float.s new file mode 100644 index 0000000..48aee96 --- /dev/null +++ b/gas/testsuite/gas/arm/float.s @@ -0,0 +1,162 @@ +.text +.align 0 + mvfe f0, f1 + mvfeqe f3, f5 + mvfeqd f4, #1.0 + mvfs f4, f7 + mvfsp f0, f1 + mvfdm f3, f4 + mvfez f7, f7 + + adfe f0, f1, #2.0 + adfeqe f1, f2, #0.5 + adfsm f3, f4, f5 + + sufd f0, f0, #2.0 + sufs f1, f2, #10.0 + sufneez f3, f4, f5 + + rsfs f1, f1, #0.0 + rsfdp f3, f0, #5.0 + rsfled f7, f6, f0 + + mufd f0, f0, f0 + mufez f1, f2, #3.0 + mufals f0, f0, #4.0 + + dvfd f0, f0, #1.0000 + dvfez f0, f1, #10e0 + dvfmism f3, f4, f5 + + rdfe f0, f1, #1.0e1 + rdfs f3, f7, #0f1 + rdfccdp f4, f4, f3 + + powd f0, f2, f3 + pows f1, f3, #0e1e1 + powcsez f4, f7, #1 + + rpws f7, f6, f7 + rpweqd f0, f1, f2 + rpwem f2, f2, f3 + + rmfd f1, f2, #3 + rmfvss f3, f4, f4 + rmfep f4, f7, f0 + + fmls f0, f1, f2 + fmleqs f1, f3, f5 + fmlplsz f4, f6, f0 + + fdvs f1, f3, #10 + fdvsp f0, f1, f2 + fdvhssm f4, f4, f4 + + frds f1, f1, #1.0 + frdgts f2, f1, f0 + frdgtsz f4, f4, f5 + + pold f0, f1, f2 + polsz f4, f6, #3.0 + poleqe f5, f6, f7 + + mnfs f0, f1 + mnfd f0, #3.0 + mnfez f0, #4.0 + mnfeqez f0, f5 + mnfsp f0, f4 + mnfdm f1, f7 + + absd f0, f1 + abssp f1, #3.0 + abseqe f4, f5 + + rnds f1, f2 + rndd f3, f4 + rndeqez f6, #4.0 + + sqts f5, f5 + sqtdp f6, f6 + sqtplez f7, f6 + + logs f0, #10 + loge f0, #0f10 + lognedz f0, f1 + + lgne f1, f2 + lgndz f1, f3 + lgnvcs f3, f4 + + exps f1, f3 + expem f3, #10.0 + exppld f6, f7 + + sind f0, f1 + sinsm f1, f2 + singte f4, #5 + + cosd f1, f3 + cosem f4, f5 + cosnedp f6, f1 + + tane f1, f5 + tansz f4, f7 + tangedz f1, #4.0 + + asne f4, f5 + asnsp f6, #5e-1 + asnmidz f5, f5 + + acss f5, f6 + acsd f6, f0 + acshsem f1, #0.05e1 + + atne f0, f5 + atnsz f1, #5 + atnltd f3, f2 + + urde f5, f4 + nrme f6, f5 + nrmpldz f7, f5 + + fltsp f0, r8 + flte f1, r0 + flteqdz f5, r7 + + fix r0, f1 + fixz r1, f7 + fixcsm r5, f5 + + wfc r0 + wfs r1 + rfseq r2 + rfc r4 + + cmf f0, #1 + cmf f1, f2 + cmfeq f0, f1 + + cnf f0, #3 + cnf f1, #0.5 + cnfvs f3, f4 + + cmfe f0, f1 + cmfeeq f1, f2 + cmfeqe f3, #5.0 + + cnfe f1, f3 + cnfeeq f3, f4 + cnfeqe f4, f7 + cnfale f4, #5.0 + + lfm f0, 4, [r0] + lfm f0, 4, [r0, #0] + lfm f1, 4, [r1, #64] + sfm f2, 4, [r14, #1020]! + sfmeq f7, 3, [r8], #-1020 + + lfmfd f6, 2, [r15] + sfmea f7, 1, [r8]! + lfmeqea f5, 4, [r6] + sfmnefd f4, 3, [r2] + sfmnefd f4, 3, [r2]! diff --git a/gas/testsuite/gas/arm/immed.s b/gas/testsuite/gas/arm/immed.s new file mode 100644 index 0000000..5d2092b --- /dev/null +++ b/gas/testsuite/gas/arm/immed.s @@ -0,0 +1,11 @@ +@ Tests for complex immediate expressions - none of these need +@ relocations + .text +bar: + mov r0, #0 + mov r0, #(. - bar - 8) + ldr r0, bar + ldr r0, [pc, # (bar - . -8)] + .space 4096 + mov r0, #(. - bar - 8) & 0xff + ldr r0, [pc, # (bar - . -8) & 0xff] diff --git a/gas/testsuite/gas/arm/inst.d b/gas/testsuite/gas/arm/inst.d new file mode 100644 index 0000000..decb8f0 --- /dev/null +++ b/gas/testsuite/gas/arm/inst.d @@ -0,0 +1,168 @@ +#objdump: -dr --prefix-addresses --show-raw-insn +#name: ARM basic instructions +#as: -marm2 -EL + +# Test the standard ARM instructions: + +.*: +file format .*arm.* + +Disassembly of section .text: +00000000 <[^>]*> e3a00000 ? mov r0, #0 +00000004 <[^>]*> e1a01002 ? mov r1, r2 +00000008 <[^>]*> e1a03184 ? mov r3, r4, lsl #3 +0000000c <[^>]*> e1a05736 ? mov r5, r6, lsr r7 +00000010 <[^>]*> e1a08a59 ? mov r8, r9, asr sl +00000014 <[^>]*> e1a0bd1c ? mov fp, ip, lsl sp +00000018 <[^>]*> e1a0e06f ? mov lr, pc, rrx +0000001c <[^>]*> e1a01002 ? mov r1, r2 +00000020 <[^>]*> 01a02003 ? moveq r2, r3 +00000024 <[^>]*> 11a04005 ? movne r4, r5 +00000028 <[^>]*> b1a06007 ? movlt r6, r7 +0000002c <[^>]*> a1a08009 ? movge r8, r9 +00000030 <[^>]*> d1a0a00b ? movle sl, fp +00000034 <[^>]*> c1a0c00d ? movgt ip, sp +00000038 <[^>]*> 31a01002 ? movcc r1, r2 +0000003c <[^>]*> 21a01003 ? movcs r1, r3 +00000040 <[^>]*> 41a03006 ? movmi r3, r6 +00000044 <[^>]*> 51a07009 ? movpl r7, r9 +00000048 <[^>]*> 61a01008 ? movvs r1, r8 +0000004c <[^>]*> 71a09fa1 ? movvc r9, r1, lsr #31 +00000050 <[^>]*> 81a0800f ? movhi r8, pc +00000054 <[^>]*> 91a0f00e ? movls pc, lr +00000058 <[^>]*> 21a09008 ? movcs r9, r8 +0000005c <[^>]*> 31a01003 ? movcc r1, r3 +00000060 <[^>]*> e1b00008 ? movs r0, r8 +00000064 <[^>]*> 31b00007 ? movccs r0, r7 +00000068 <[^>]*> e281000a ? add r0, r1, #10 +0000006c <[^>]*> e0832004 ? add r2, r3, r4 +00000070 <[^>]*> e0865287 ? add r5, r6, r7, lsl #5 +00000074 <[^>]*> e0821113 ? add r1, r2, r3, lsl r1 +00000078 <[^>]*> e201000a ? and r0, r1, #10 +0000007c <[^>]*> e0032004 ? and r2, r3, r4 +00000080 <[^>]*> e0065287 ? and r5, r6, r7, lsl #5 +00000084 <[^>]*> e0021113 ? and r1, r2, r3, lsl r1 +00000088 <[^>]*> e221000a ? eor r0, r1, #10 +0000008c <[^>]*> e0232004 ? eor r2, r3, r4 +00000090 <[^>]*> e0265287 ? eor r5, r6, r7, lsl #5 +00000094 <[^>]*> e0221113 ? eor r1, r2, r3, lsl r1 +00000098 <[^>]*> e241000a ? sub r0, r1, #10 +0000009c <[^>]*> e0432004 ? sub r2, r3, r4 +000000a0 <[^>]*> e0465287 ? sub r5, r6, r7, lsl #5 +000000a4 <[^>]*> e0421113 ? sub r1, r2, r3, lsl r1 +000000a8 <[^>]*> e2a1000a ? adc r0, r1, #10 +000000ac <[^>]*> e0a32004 ? adc r2, r3, r4 +000000b0 <[^>]*> e0a65287 ? adc r5, r6, r7, lsl #5 +000000b4 <[^>]*> e0a21113 ? adc r1, r2, r3, lsl r1 +000000b8 <[^>]*> e2c1000a ? sbc r0, r1, #10 +000000bc <[^>]*> e0c32004 ? sbc r2, r3, r4 +000000c0 <[^>]*> e0c65287 ? sbc r5, r6, r7, lsl #5 +000000c4 <[^>]*> e0c21113 ? sbc r1, r2, r3, lsl r1 +000000c8 <[^>]*> e261000a ? rsb r0, r1, #10 +000000cc <[^>]*> e0632004 ? rsb r2, r3, r4 +000000d0 <[^>]*> e0665287 ? rsb r5, r6, r7, lsl #5 +000000d4 <[^>]*> e0621113 ? rsb r1, r2, r3, lsl r1 +000000d8 <[^>]*> e2e1000a ? rsc r0, r1, #10 +000000dc <[^>]*> e0e32004 ? rsc r2, r3, r4 +000000e0 <[^>]*> e0e65287 ? rsc r5, r6, r7, lsl #5 +000000e4 <[^>]*> e0e21113 ? rsc r1, r2, r3, lsl r1 +000000e8 <[^>]*> e381000a ? orr r0, r1, #10 +000000ec <[^>]*> e1832004 ? orr r2, r3, r4 +000000f0 <[^>]*> e1865287 ? orr r5, r6, r7, lsl #5 +000000f4 <[^>]*> e1821113 ? orr r1, r2, r3, lsl r1 +000000f8 <[^>]*> e3c1000a ? bic r0, r1, #10 +000000fc <[^>]*> e1c32004 ? bic r2, r3, r4 +00000100 <[^>]*> e1c65287 ? bic r5, r6, r7, lsl #5 +00000104 <[^>]*> e1c21113 ? bic r1, r2, r3, lsl r1 +00000108 <[^>]*> e3e0000a ? mvn r0, #10 +0000010c <[^>]*> e1e02004 ? mvn r2, r4 +00000110 <[^>]*> e1e05287 ? mvn r5, r7, lsl #5 +00000114 <[^>]*> e1e01113 ? mvn r1, r3, lsl r1 +00000118 <[^>]*> e310000a ? tst r0, #10 +0000011c <[^>]*> e1120004 ? tst r2, r4 +00000120 <[^>]*> e1150287 ? tst r5, r7, lsl #5 +00000124 <[^>]*> e1110113 ? tst r1, r3, lsl r1 +00000128 <[^>]*> e330000a ? teq r0, #10 +0000012c <[^>]*> e1320004 ? teq r2, r4 +00000130 <[^>]*> e1350287 ? teq r5, r7, lsl #5 +00000134 <[^>]*> e1310113 ? teq r1, r3, lsl r1 +00000138 <[^>]*> e350000a ? cmp r0, #10 +0000013c <[^>]*> e1520004 ? cmp r2, r4 +00000140 <[^>]*> e1550287 ? cmp r5, r7, lsl #5 +00000144 <[^>]*> e1510113 ? cmp r1, r3, lsl r1 +00000148 <[^>]*> e370000a ? cmn r0, #10 +0000014c <[^>]*> e1720004 ? cmn r2, r4 +00000150 <[^>]*> e1750287 ? cmn r5, r7, lsl #5 +00000154 <[^>]*> e1710113 ? cmn r1, r3, lsl r1 +00000158 <[^>]*> e330f00a ? teqp r0, #10 +0000015c <[^>]*> e132f004 ? teqp r2, r4 +00000160 <[^>]*> e135f287 ? teqp r5, r7, lsl #5 +00000164 <[^>]*> e131f113 ? teqp r1, r3, lsl r1 +00000168 <[^>]*> e370f00a ? cmnp r0, #10 +0000016c <[^>]*> e172f004 ? cmnp r2, r4 +00000170 <[^>]*> e175f287 ? cmnp r5, r7, lsl #5 +00000174 <[^>]*> e171f113 ? cmnp r1, r3, lsl r1 +00000178 <[^>]*> e350f00a ? cmpp r0, #10 +0000017c <[^>]*> e152f004 ? cmpp r2, r4 +00000180 <[^>]*> e155f287 ? cmpp r5, r7, lsl #5 +00000184 <[^>]*> e151f113 ? cmpp r1, r3, lsl r1 +00000188 <[^>]*> e310f00a ? tstp r0, #10 +0000018c <[^>]*> e112f004 ? tstp r2, r4 +00000190 <[^>]*> e115f287 ? tstp r5, r7, lsl #5 +00000194 <[^>]*> e111f113 ? tstp r1, r3, lsl r1 +00000198 <[^>]*> e0000291 ? mul r0, r1, r2 +0000019c <[^>]*> e0110392 ? muls r1, r2, r3 +000001a0 <[^>]*> 10000091 ? mulne r0, r1, r0 +000001a4 <[^>]*> 90190798 ? mullss r9, r8, r7 +000001a8 <[^>]*> e021ba99 ? mla r1, r9, sl, fp +000001ac <[^>]*> e033c994 ? mlas r3, r4, r9, ip +000001b0 <[^>]*> b029d798 ? mlalt r9, r8, r7, sp +000001b4 <[^>]*> a034e391 ? mlages r4, r1, r3, lr +000001b8 <[^>]*> e5910000 ? ldr r0, \[r1\] +000001bc <[^>]*> e7911002 ? ldr r1, \[r1, r2\] +000001c0 <[^>]*> e7b32004 ? ldr r2, \[r3, r4\]! +000001c4 <[^>]*> e5922020 ? ldr r2, \[r2, #32\] +000001c8 <[^>]*> e7932424 ? ldr r2, \[r3, r4, lsr #8\] +000001cc <[^>]*> 07b54484 ? ldreq r4, \[r5, r4, lsl #9\]! +000001d0 <[^>]*> 14954006 ? ldrne r4, \[r5\], #6 +000001d4 <[^>]*> e6b21003 ? ldrt r1, \[r2\], r3 +000001d8 <[^>]*> e6942425 ? ldr r2, \[r4\], r5, lsr #8 +000001dc <[^>]*> e51f0008 ? ldr r0, 000001dc <[^>]*> +000001e0 <[^>]*> e5d43000 ? ldrb r3, \[r4\] +000001e4 <[^>]*> 14f85000 ? ldrnebt r5, \[r8\] +000001e8 <[^>]*> e5810000 ? str r0, \[r1\] +000001ec <[^>]*> e7811002 ? str r1, \[r1, r2\] +000001f0 <[^>]*> e7a33004 ? str r3, \[r3, r4\]! +000001f4 <[^>]*> e5822020 ? str r2, \[r2, #32\] +000001f8 <[^>]*> e7832424 ? str r2, \[r3, r4, lsr #8\] +000001fc <[^>]*> 07a54484 ? streq r4, \[r5, r4, lsl #9\]! +00000200 <[^>]*> 14854006 ? strne r4, \[r5\], #6 +00000204 <[^>]*> e6821003 ? str r1, \[r2\], r3 +00000208 <[^>]*> e6a42425 ? strt r2, \[r4\], r5, lsr #8 +0000020c <[^>]*> e50f1004 ? str r1, 00000210 <[^>]*> +00000210 <[^>]*> e5c71000 ? strb r1, \[r7\] +00000214 <[^>]*> e4e02000 ? strbt r2, \[r0\] +00000218 <[^>]*> e8900002 ? ldmia r0, {r1} +0000021c <[^>]*> 09920038 ? ldmeqib r2, {r3, r4, r5} +00000220 <[^>]*> e853ffff ? ldmda r3, {r0, r1, r2, r3, r4, r5, r6, r7, r8, r9, sl, fp, ip, sp, lr, pc}\^ +00000224 <[^>]*> e93b05ff ? ldmdb fp!, {r0, r1, r2, r3, r4, r5, r6, r7, r8, sl} +00000228 <[^>]*> e99100f7 ? ldmib r1, {r0, r1, r2, r4, r5, r6, r7} +0000022c <[^>]*> e89201f8 ? ldmia r2, {r3, r4, r5, r6, r7, r8} +00000230 <[^>]*> e9130003 ? ldmdb r3, {r0, r1} +00000234 <[^>]*> e8740300 ? ldmda r4!, {r8, r9}\^ +00000238 <[^>]*> e8800002 ? stmia r0, {r1} +0000023c <[^>]*> 09820038 ? stmeqib r2, {r3, r4, r5} +00000240 <[^>]*> e843ffff ? stmda r3, {r0, r1, r2, r3, r4, r5, r6, r7, r8, r9, sl, fp, ip, sp, lr, pc}\^ +00000244 <[^>]*> e92a05ff ? stmdb sl!, {r0, r1, r2, r3, r4, r5, r6, r7, r8, sl} +00000248 <[^>]*> e8010007 ? stmda r1, {r0, r1, r2} +0000024c <[^>]*> e9020018 ? stmdb r2, {r3, r4} +00000250 <[^>]*> e8830003 ? stmia r3, {r0, r1} +00000254 <[^>]*> e9e40300 ? stmib r4!, {r8, r9}\^ +00000258 <[^>]*> ef123456 ? swi 0x00123456 +0000025c <[^>]*> 2f000033 ? swics 0x00000033 +00000260 <[^>]*> ebfffffe ? bl 00000260 <[^>]*> +[ ]*260:.*_wombat.* +00000264 <[^>]*> 5bffffe9 ? blpl 00000210 <bar> +00000268 <[^>]*> eafffffe ? b 00000268 <[^>]*> +[ ]*268:.*_wibble.* +0000026c <[^>]*> dafffffe ? ble 0000026c <[^>]*> +[ ]*26c:.*testerfunc.* diff --git a/gas/testsuite/gas/arm/inst.s b/gas/testsuite/gas/arm/inst.s new file mode 100644 index 0000000..ff092c9 --- /dev/null +++ b/gas/testsuite/gas/arm/inst.s @@ -0,0 +1,189 @@ +@ Test file for ARM/GAS -- basic instructions + +.text +.align + mov r0, #0 + mov r1, r2 + mov r3, r4, lsl #3 + mov r5, r6, lsr r7 + mov r8, r9, asr r10 + mov r11, r12, asl r13 + mov r14, r15, rrx + moval r1, r2 + moveq r2, r3 + movne r4, r5 + movlt r6, r7 + movge r8, r9 + movle r10, r11 + movgt r12, r13 + movcc r1, r2 + movcs r1, r3 + movmi r3, r6 + movpl r7, r9 + movvs r1, r8 + movvc r9, r1, lsr #31 + movhi r8, r15 + movls r15, r14 + movhs r9, r8 + movul r1, r3 + movs r0, r8 + movuls r0, r7 + + add r0, r1, #10 + add r2, r3, r4 + add r5, r6, r7, asl #5 + add r1, r2, r3, lsl r1 + + and r0, r1, #10 + and r2, r3, r4 + and r5, r6, r7, asl #5 + and r1, r2, r3, lsl r1 + + eor r0, r1, #10 + eor r2, r3, r4 + eor r5, r6, r7, asl #5 + eor r1, r2, r3, lsl r1 + + sub r0, r1, #10 + sub r2, r3, r4 + sub r5, r6, r7, asl #5 + sub r1, r2, r3, lsl r1 + + adc r0, r1, #10 + adc r2, r3, r4 + adc r5, r6, r7, asl #5 + adc r1, r2, r3, lsl r1 + + sbc r0, r1, #10 + sbc r2, r3, r4 + sbc r5, r6, r7, asl #5 + sbc r1, r2, r3, lsl r1 + + rsb r0, r1, #10 + rsb r2, r3, r4 + rsb r5, r6, r7, asl #5 + rsb r1, r2, r3, lsl r1 + + rsc r0, r1, #10 + rsc r2, r3, r4 + rsc r5, r6, r7, asl #5 + rsc r1, r2, r3, lsl r1 + + orr r0, r1, #10 + orr r2, r3, r4 + orr r5, r6, r7, asl #5 + orr r1, r2, r3, lsl r1 + + bic r0, r1, #10 + bic r2, r3, r4 + bic r5, r6, r7, asl #5 + bic r1, r2, r3, lsl r1 + + mvn r0, #10 + mvn r2, r4 + mvn r5, r7, asl #5 + mvn r1, r3, lsl r1 + + tst r0, #10 + tst r2, r4 + tst r5, r7, asl #5 + tst r1, r3, lsl r1 + + teq r0, #10 + teq r2, r4 + teq r5, r7, asl #5 + teq r1, r3, lsl r1 + + cmp r0, #10 + cmp r2, r4 + cmp r5, r7, asl #5 + cmp r1, r3, lsl r1 + + cmn r0, #10 + cmn r2, r4 + cmn r5, r7, asl #5 + cmn r1, r3, lsl r1 + + teqp r0, #10 + teqp r2, r4 + teqp r5, r7, asl #5 + teqp r1, r3, lsl r1 + + cmnp r0, #10 + cmnp r2, r4 + cmnp r5, r7, asl #5 + cmnp r1, r3, lsl r1 + + cmpp r0, #10 + cmpp r2, r4 + cmpp r5, r7, asl #5 + cmpp r1, r3, lsl r1 + + tstp r0, #10 + tstp r2, r4 + tstp r5, r7, asl #5 + tstp r1, r3, lsl r1 + + mul r0, r1, r2 + muls r1, r2, r3 + mulne r0, r1, r0 + mullss r9, r8, r7 + + mla r1, r9, r10, r11 + mlas r3, r4, r9, r12 + mlalt r9, r8, r7, r13 + mlages r4, r1, r3, r14 + + ldr r0, [r1] + ldr r1, [r1, r2] + ldr r2, [r3, r4]! + ldr r2, [r2, #32] + ldr r2, [r3, r4, lsr #8] + ldreq r4, [r5, r4, asl #9]! + ldrne r4, [r5], #6 + ldrt r1, [r2], r3 + ldr r2, [r4], r5, lsr #8 +foo: + ldr r0, foo + ldrb r3, [r4] + ldrnebt r5, [r8] + + str r0, [r1] + str r1, [r1, r2] + str r3, [r3, r4]! + str r2, [r2, #32] + str r2, [r3, r4, lsr #8] + streq r4, [r5, r4, asl #9]! + strne r4, [r5], #6 + str r1, [r2], r3 + strt r2, [r4], r5, lsr #8 + str r1, bar +bar: + stralb r1, [r7] + strbt r2, [r0] + + ldmia r0, {r1} + ldmeqib r2, {r3, r4, r5} + ldmalda r3, {r0-r15}^ + ldmdb r11!, {r0-r8, r10} + ldmed r1, {r0, r1, r2}|0xf0 + ldmfd r2, {r3, r4}+{r5, r6, r7, r8} + ldmea r3, 3 + ldmfa r4!, {r8, r9}^ + + stmia r0, {r1} + stmeqib r2, {r3, r4, r5} + stmalda r3, {r0-r15}^ + stmdb r10!, {r0-r8, r10} + stmed r1, {r0, r1, r2} + stmfd r2, {r3, r4} + stmea r3, 3 + stmfa r4!, {r8, r9}^ + + swi 0x123456 + swihs 0x33 + + bl _wombat + blpl bar + b _wibble + ble testerfunc diff --git a/gas/testsuite/gas/arm/le-fpconst.d b/gas/testsuite/gas/arm/le-fpconst.d new file mode 100644 index 0000000..354e0e0 --- /dev/null +++ b/gas/testsuite/gas/arm/le-fpconst.d @@ -0,0 +1,8 @@ +#objdump: -s +#as: -EL +#name: arm little-endian fpconst + +.*: +file format .*arm.* + +Contents of section .text: + 0000 cdcc8c3f 00000000 9999f13f 9a999999 .* diff --git a/gas/testsuite/gas/arm/le-fpconst.s b/gas/testsuite/gas/arm/le-fpconst.s new file mode 100644 index 0000000..8a3c3d7 --- /dev/null +++ b/gas/testsuite/gas/arm/le-fpconst.s @@ -0,0 +1,8 @@ +# Test fp constants. +# These need ARM specific support because 8 byte fp constants in little +# endian mode are represented abnormally. + + .text + .float 1.1 + .float 0 + .double 1.1 diff --git a/gas/testsuite/gas/arm/thumb.s b/gas/testsuite/gas/arm/thumb.s new file mode 100644 index 0000000..ea4b82d --- /dev/null +++ b/gas/testsuite/gas/arm/thumb.s @@ -0,0 +1,193 @@ + .text + .code 16 +.foo: + lsl r2, r1, #3 + lsr r3, r4, #31 +wibble/data: + asr r7, r0, #5 + + lsl r1, r2, #0 + lsr r3, r4, #0 + asr r4, r5, #0 + + lsr r6, r7, #32 + asr r0, r1, #32 + + add r1, r2, r3 + add r2, r4, #2 + sub r3, r5, r7 + sub r2, r4, #7 + + mov r4, #255 + cmp r3, #250 + add r6, #123 + sub r5, #128 + + and r3, r5 + eor r4, r6 + lsl r1, r0 + lsr r2, r3 + asr r4, r6 + adc r5, r7 + sbc r0, r4 + ror r1, r4 + tst r2, r5 + neg r1, r1 + cmp r2, r3 + cmn r1, r4 + orr r0, r3 + mul r4, r5 + bic r5, r7 + mvn r5, r5 + + add r1, r13 + add r12, r2 + add r9, r9 + cmp r1, r14 + cmp r8, r0 + cmp r12, r14 + mov r0, r9 + mov r9, r4 + mov r8, r8 + bx r7 + bx r8 + .align 0 + bx pc + + ldr r3, [pc, #128] + ldr r4, bar + + str r0, [r1, r2] + strb r1, [r2, r4] + ldr r5, [r6, r7] + ldrb r2, [r4, r5] + + .align 0 +bar: + strh r1, [r2, r3] + ldrh r3, [r4, r0] + ldsb r1, [r6, r7] + ldsh r2, [r0, r5] + + str r3, [r3, #124] + ldr r1, [r4, #124] + ldr r5, [r5] + strb r1, [r5, #31] + strb r1, [r4, #5] + strb r2, [r6] + + strh r4, [r5, #62] + ldrh r5, [r0, #4] + ldrh r3, [r2] + + str r3, [r13, #1020] + ldr r1, [r13, #44] + ldr r2, [r13] + + add r7, r15, #1020 + add r4, r13, #512 + + add r13, #268 + add r13, #-104 + sub r13, #268 + sub r13, #-108 + + push {r0, r1, r2, r4} + push {r0, r3-r7, lr} + pop {r3, r4, r7} + pop {r0-r7, r15} + + stmia r3!, {r0, r1, r4-r7} + ldmia r0!, {r1-r7} + + beq bar + bne bar + bcs bar + bcc bar + bmi bar + bpl bar + bvs bar + bvc bar + bhi bar + bls bar + bge bar + bgt bar + blt bar + bgt bar + ble bar + bhi bar + blo bar + bul bar + +close: + lsl r4, r5, #near - close +near: + add r2, r3, #near - close + + add sp, sp, #127 << 2 + sub sp, sp, #127 << 2 + add r0, sp, #255 << 2 + add r0, pc, #255 << 2 + + add sp, sp, #bar - .foo + sub sp, sp, #bar - .foo + add r0, sp, #bar - .foo + add r0, pc, #bar - .foo + + add r1, #bar - .foo + mov r6, #bar - .foo + cmp r7, #bar - .foo + + nop + nop + + .arm +.localbar: + b .localbar + b .wombat + bl .localbar + bl .wombat + + bx r0 + swi 0x123456 + + .thumb + @ The following will be disassembled incorrectly if we do not + @ have a Thumb symbol defined before the first Thumb instruction: +morethumb: + adr r0, forwardonly + + b .foo + b .wombat + bl .foo + bl .wombat + + bx r0 + + swi 0xff + .align 0 +forwardonly: + beq .wombat + bne .wombat + bcs .wombat + bcc .wombat + bmi .wombat + bpl .wombat + bvs .wombat + bvc .wombat + bhi .wombat + bls .wombat + bge .wombat + bgt .wombat + blt .wombat + bgt .wombat + ble .wombat + bhi .wombat + blo .wombat + bul .wombat + +.back: + bl .local + .space (1 << 11) @ leave space to force long offsets +.local: + bl .back diff --git a/gas/testsuite/gas/d30v/align.d b/gas/testsuite/gas/d30v/align.d new file mode 100644 index 0000000..466768f --- /dev/null +++ b/gas/testsuite/gas/d30v/align.d @@ -0,0 +1,17 @@ +#objdump: -dr +#name: D30V alignment test +#as: + +.*: +file format elf32-d30v + +Disassembly of section .text: + +0+0000 <start>: + 0: 08815a80 00f00000 abs r21, r42 || nop + 8: 08815a80 00f00000 abs r21, r42 || nop + 10: 08815a80 00f00000 abs r21, r42 || nop + 18: 00f00000 00f00000 abs r21, r42 || nop + 20: 08815a80 00f00000 abs r21, r42 || nop + 28: 08815a80 00f00000 abs r21, r42 || nop + 30: 08815a80 00f00000 abs r21, r42 || nop + ... diff --git a/gas/testsuite/gas/d30v/align.s b/gas/testsuite/gas/d30v/align.s new file mode 100644 index 0000000..ef0039c --- /dev/null +++ b/gas/testsuite/gas/d30v/align.s @@ -0,0 +1,28 @@ +# tests proper handling of aligns on D30V + + .text + .align 3 +start: + abs r21,r42 + .align 3 + abs r21,r42 + .align 4 + abs r21,r42 + .align 4 + abs r21,r42 + + .data + .long 0xdeadbeef + + .text + abs r21,r42 + + .data + .align 4 + .long 0xdeadbeef + + .text + .align 3 + abs r21,r42 + .end + diff --git a/gas/testsuite/gas/d30v/array.d b/gas/testsuite/gas/d30v/array.d new file mode 100644 index 0000000..e81bc33 --- /dev/null +++ b/gas/testsuite/gas/d30v/array.d @@ -0,0 +1,31 @@ +#objdump: -dr +#name: D30V array test +#as: + +.*: +file format elf32-d30v + +Disassembly of section .text: + +0+0000 <__foo-0x48>: + 0: 880820c0 80000048 add.l r2, r3, 0x48 + 0: R_D30V_32 .text + 8: 880820c0 80000049 add.l r2, r3, 0x49 + 8: R_D30V_32 .text + 10: 880820c0 8000004a add.l r2, r3, 0x4a + 10: R_D30V_32 .text + 18: 880820c0 8000004b add.l r2, r3, 0x4b + 18: R_D30V_32 .text + 20: 880820c0 8000004c add.l r2, r3, 0x4c + 20: R_D30V_32 .text + 28: 880820c0 8000004d add.l r2, r3, 0x4d + 28: R_D30V_32 .text + 30: 880820c0 8000004e add.l r2, r3, 0x4e + 30: R_D30V_32 .text + 38: 880820c0 8000004f add.l r2, r3, 0x4f + 38: R_D30V_32 .text + 40: 880820c0 80000050 add.l r2, r3, 0x50 + 40: R_D30V_32 .text + +0+0048 <__foo>: + 48: 12345678 12345678 .long 0x12345678 || .long 0x12345678 + 50: 12345678 00000000 .long 0x12345678 || bra.s r0 diff --git a/gas/testsuite/gas/d30v/array.s b/gas/testsuite/gas/d30v/array.s new file mode 100644 index 0000000..3a187dd --- /dev/null +++ b/gas/testsuite/gas/d30v/array.s @@ -0,0 +1,15 @@ +# D30V array test + .text + add r2, r3 , __foo + add r2, r3 , __foo+1 + add r2, r3 , __foo+2 + add r2, r3 , __foo+3 + add r2, r3 , __foo+4 + add r2, r3 , __foo+5 + add r2, r3 , __foo+6 + add r2, r3 , __foo+7 + add r2, r3 , __foo+8 +__foo: + .int 0x12345678 + .int 0x12345678 + .int 0x12345678 diff --git a/gas/testsuite/gas/d30v/bittest.d b/gas/testsuite/gas/d30v/bittest.d new file mode 100644 index 0000000..b96ab46 --- /dev/null +++ b/gas/testsuite/gas/d30v/bittest.d @@ -0,0 +1,20 @@ +#objdump: -dr +#name: D30V bittest opt +#as: -WO + +.*: +file format elf32-d30v + +Disassembly of section .text: + +00000000 <.text>: + 0: 00f00000 84401083 nop -> ldw.s r1, @\(r2, r3\) + 8: 04406144 00f00000 ldw.s r6, @\(r5, r4\) || nop + 10: 00f00000 82201083 nop -> bset r1, r2, r3 + 18: 80f00000 02001083 nop <- btst f1, r2, r3 + 20: 00f00000 02301083 nop || bclr r1, r2, r3 + 28: 00f00000 82101083 nop -> bnot r1, r2, r3 + 30: 02101083 80f00000 bnot r1, r2, r3 -> nop + 38: 047c0105 02201083 moddec r4, 0x5 || bset r1, r2, r3 + 40: 02201083 847c0105 bset r1, r2, r3 -> moddec r4, 0x5 + 48: 02201083 08c04146 bset r1, r2, r3 || joinll.s r4, r5, r6 + 50: 02201083 08c04146 bset r1, r2, r3 || joinll.s r4, r5, r6
\ No newline at end of file diff --git a/gas/testsuite/gas/d30v/bittest.l b/gas/testsuite/gas/d30v/bittest.l new file mode 100644 index 0000000..75d1b7e --- /dev/null +++ b/gas/testsuite/gas/d30v/bittest.l @@ -0,0 +1,56 @@ +.*: Assembler messages: +.*: Warning: Swapping instruction order +.*: Warning: Executing bset in IU may not work +.*: Warning: Executing btst in IU may not work +.*: Warning: Executing bclr in IU may not work +.*: Warning: Executing bnot in IU may not work +.*: Warning: Executing bset in IU may not work +.*: Warning: Swapping instruction order +GAS LISTING .* + + + 1 # bittest.s + 2 # + 3 # Bit operation instructions \(BCLR, BNOT, BSET, BTST\) should not be placed in IU. + 4 # If the user specifically indicates they should be in the IU, GAS will + 5 # generate warnings. The reason why this is not an error is that those instructions + 6 # will fail in IU only occasionally. Thus GAS should pack them in MU for + 7 # safety, and it just needs to draw attention when a violation is given. + 8 + 9 + 10 0000 00F00000 nop -> ldw R1, @\(R2,R3\) + 10 84401083 + 11 0008 04406144 nop || ldw R6, @\(R5,R4\) +.* Warning:Swapping instruction order + 11 00F00000 + 12 + 13 0010 00F00000 nop -> BSET R1, R2, R3 +.* Warning:Executing bset in IU may not work + 13 82201083 + 14 0018 80F00000 nop <- BTST F1, R2, R3 +.* Warning:Executing btst in IU may not work + 14 02001083 + 15 0020 00F00000 nop || BCLR R1, R2, R3 +.* Warning:Executing bclr in IU may not work + 15 02301083 + 16 0028 00F00000 nop -> BNOT R1, R2, R3 +.* Warning:Executing bnot in IU may not work + 16 82101083 + 17 0030 02101083 BNOT r1, r2, r3 -> nop + 17 80F00000 + 18 + 19 0038 047C0105 bset r1, r2, r3 || moddec r4, 5 +.* Warning:Swapping instruction order + 19 02201083 + 20 + 21 bset r1, r2, r3 + 22 0040 02201083 moddec r4, 5 + 22 847C0105 + 23 + 24 bset r1, r2, r3 + 25 0048 02201083 joinll r4, r5, r6 + 25 88C04146 + 26 + 27 joinll r4, r5, r6 + 28 0050 82201083 bset r1, r2, r3 + 28 08C04146 diff --git a/gas/testsuite/gas/d30v/bittest.s b/gas/testsuite/gas/d30v/bittest.s new file mode 100644 index 0000000..b79a56c --- /dev/null +++ b/gas/testsuite/gas/d30v/bittest.s @@ -0,0 +1,28 @@ +# bittest.s +# +# Bit operation instructions (BCLR, BNOT, BSET, BTST) should not be placed in IU. +# If the user specifically indicates they should be in the IU, GAS will +# generate warnings. The reason why this is not an error is that those instructions +# will fail in IU only occasionally. Thus GAS should pack them in MU for +# safety, and it just needs to draw attention when a violation is given. + + + nop -> ldw R1, @(R2,R3) + nop || ldw R6, @(R5,R4) + + nop -> BSET R1, R2, R3 + nop <- BTST F1, R2, R3 + nop || BCLR R1, R2, R3 + nop -> BNOT R1, R2, R3 + BNOT r1, r2, r3 -> nop + + bset r1, r2, r3 || moddec r4, 5 + + bset r1, r2, r3 + moddec r4, 5 + + bset r1, r2, r3 + joinll r4, r5, r6 + + joinll r4, r5, r6 + bset r1, r2, r3 diff --git a/gas/testsuite/gas/d30v/d30.exp b/gas/testsuite/gas/d30v/d30.exp new file mode 100644 index 0000000..275b0e0 --- /dev/null +++ b/gas/testsuite/gas/d30v/d30.exp @@ -0,0 +1,35 @@ +# +# D30V assembler tests +# + +proc run_list_test { name opts } { + global srcdir subdir + set testname "D30V $name" + set file $srcdir/$subdir/$name + gas_run ${name}.s $opts ">&dump.out" + if {[regexp_diff "dump.out" "${file}.l"] } { + fail $testname + verbose "output is [file_contents "dump.out"]" 2 + return + } + pass $testname +} + +if {[istarget d30v-*-*]} { + run_dump_test "inst" + run_dump_test "align" + run_dump_test "guard" + run_dump_test "guard-debug" + run_dump_test "reloc" + run_dump_test "opt" + run_dump_test "array" + run_dump_test "label" + run_list_test "warn_oddreg" "-al" + run_list_test "bittest" "-al" + run_dump_test "bittest" + run_list_test "serial" "-al" + run_list_test "serial2" "-al" + run_list_test "serial2O" "-al -O" + run_dump_test "mul" +} + diff --git a/gas/testsuite/gas/d30v/guard-debug.d b/gas/testsuite/gas/d30v/guard-debug.d new file mode 100644 index 0000000..e9a154c --- /dev/null +++ b/gas/testsuite/gas/d30v/guard-debug.d @@ -0,0 +1,25 @@ +#objdump: -ldr +#name: D30V debug (-g) test +#as: -g + +.*: +file format elf32-d30v + +Disassembly of section .text: + +00000000 <.text>: +.*:[0-9]+ + 0: 08001083 00f00000 add.s r1, r2, r3 || nop +.*:[0-9]+ + 8: 08001083 00f00000 add.s r1, r2, r3 || nop +.*:[0-9]+ + 10: 18001083 00f00000 add.s/tx r1, r2, r3 || nop +.*:[0-9]+ + 18: 28001083 00f00000 add.s/fx r1, r2, r3 || nop +.*:[0-9]+ + 20: 38001083 00f00000 add.s/xt r1, r2, r3 || nop +.*:[0-9]+ + 28: 48001083 00f00000 add.s/xf r1, r2, r3 || nop +.*:[0-9]+ + 30: 58001083 00f00000 add.s/tt r1, r2, r3 || nop +.*:[0-9]+ + 38: 68001083 00f00000 add.s/tf r1, r2, r3 || nop diff --git a/gas/testsuite/gas/d30v/guard-debug.s b/gas/testsuite/gas/d30v/guard-debug.s new file mode 100644 index 0000000..3f20f7b --- /dev/null +++ b/gas/testsuite/gas/d30v/guard-debug.s @@ -0,0 +1,17 @@ +# Same as guard.s but here we are testing debug (-g) assembly +# On the D30V, assembling with -g should disable the VLIW packing +# and put only one instruction per line. + + .text + + add r1,r2,r3 + add/al r1,r2,r3 + add/tx r1,r2,r3 + add/fx r1,r2,r3 + add/xt r1,r2,r3 + add/xf r1,r2,r3 + add/tt r1,r2,r3 + add/tf r1,r2,r3 + + + diff --git a/gas/testsuite/gas/d30v/guard.d b/gas/testsuite/gas/d30v/guard.d new file mode 100644 index 0000000..0cfa2da --- /dev/null +++ b/gas/testsuite/gas/d30v/guard.d @@ -0,0 +1,17 @@ +#objdump: -dr +#name: D30V guarded execution test +#as: + +.*: +file format elf32-d30v + +Disassembly of section .text: + +0+0000 <.text>: + 0: 08001083 88001083 add.s r1, r2, r3 -> add.s r1, r2, r3 + 8: 18001083 a8001083 add.s/tx r1, r2, r3 -> add.s/fx r1, r2, r3 + 10: 38001083 c8001083 add.s/xt r1, r2, r3 -> add.s/xf r1, r2, r3 + 18: 58001083 e8001083 add.s/tt r1, r2, r3 -> add.s/tf r1, r2, r3 + 20: 08001083 88001083 add.s r1, r2, r3 -> add.s r1, r2, r3 + 28: 18001083 a8001083 add.s/tx r1, r2, r3 -> add.s/fx r1, r2, r3 + 30: 38001083 c8001083 add.s/xt r1, r2, r3 -> add.s/xf r1, r2, r3 + 38: 58001083 e8001083 add.s/tt r1, r2, r3 -> add.s/tf r1, r2, r3 diff --git a/gas/testsuite/gas/d30v/guard.s b/gas/testsuite/gas/d30v/guard.s new file mode 100644 index 0000000..ed9cd30 --- /dev/null +++ b/gas/testsuite/gas/d30v/guard.s @@ -0,0 +1,24 @@ +# D30V guarded execution assembly test + + .text + + add r1,r2,r3 + add/al r1,r2,r3 + add/tx r1,r2,r3 + add/fx r1,r2,r3 + add/xt r1,r2,r3 + add/xf r1,r2,r3 + add/tt r1,r2,r3 + add/tf r1,r2,r3 + +# check case sensitivity too + ADD r1,r2,r3 + ADD/AL r1,r2,r3 + ADD/tx r1,r2,r3 + add/FX r1,r2,r3 + ADD/XT r1,r2,r3 + ADD/XF r1,r2,r3 + add/TT r1,r2,r3 + ADD/tf r1,r2,r3 + + diff --git a/gas/testsuite/gas/d30v/inst.d b/gas/testsuite/gas/d30v/inst.d new file mode 100644 index 0000000..9861cbf --- /dev/null +++ b/gas/testsuite/gas/d30v/inst.d @@ -0,0 +1,256 @@ +#objdump: -dr +#name: D30V basic instruction test +#as: + +.*: +file format elf32-d30v + +Disassembly of section .text: + +00000000 <start>: + 0: 08815a80 88001083 abs r21, r42 -> add.s r1, r2, r3 + 8: 080b2cda 00f00000 add.s r50, r51, 0x1a || nop + 10: 880b2cf7 8ab1beef add.l r50, r51, 0xdeadbeef + 18: 08101083 881b2cda add2h.s r1, r2, r3 -> add2h.s r50, r51, 0x1a + 20: 881b2cf7 8ab1beef add2h.l r50, r51, 0xdeadbeef + 28: 08401083 884b2cda addc.s r1, r2, r3 -> addc.s r50, r51, 0x1a + 30: 884b2cf7 8ab1beef addc.l r50, r51, 0xdeadbeef + 38: 09001083 890b2cda addhlll.s r1, r2, r3 -> addhlll.s r50, r51, 0x1a + 40: 890b2cf7 8ab1beef addhlll.l r50, r51, 0xdeadbeef + 48: 09101083 891b2cda addhllh.s r1, r2, r3 -> addhllh.s r50, r51, 0x1a + 50: 891b2cf7 8ab1beef addhllh.l r50, r51, 0xdeadbeef + 58: 09201083 892b2cda addhlhl.s r1, r2, r3 -> addhlhl.s r50, r51, 0x1a + 60: 892b2cf7 8ab1beef addhlhl.l r50, r51, 0xdeadbeef + 68: 09301083 893b2cda addhlhh.s r1, r2, r3 -> addhlhh.s r50, r51, 0x1a + 70: 893b2cf7 8ab1beef addhlhh.l r50, r51, 0xdeadbeef + 78: 09401083 894b2cda addhhll.s r1, r2, r3 -> addhhll.s r50, r51, 0x1a + 80: 894b2cf7 8ab1beef addhhll.l r50, r51, 0xdeadbeef + 88: 09501083 895b2cda addhhlh.s r1, r2, r3 -> addhhlh.s r50, r51, 0x1a + 90: 895b2cf7 8ab1beef addhhlh.l r50, r51, 0xdeadbeef + 98: 09601083 896b2cda addhhhl.s r1, r2, r3 -> addhhhl.s r50, r51, 0x1a + a0: 896b2cf7 8ab1beef addhhhl.l r50, r51, 0xdeadbeef + a8: 09701083 897b2cda addhhhh.s r1, r2, r3 -> addhhhh.s r50, r51, 0x1a + b0: 897b2cf7 8ab1beef addhhhh.l r50, r51, 0xdeadbeef + b8: 08601083 886b2cda adds.s r1, r2, r3 -> adds.s r50, r51, 0x1a + c0: 886b2cf7 8ab1beef adds.l r50, r51, 0xdeadbeef + c8: 08701083 887b2cda adds2h.s r1, r2, r3 -> adds2h.s r50, r51, 0x1a + d0: 887b2cf7 8ab1beef adds2h.l r50, r51, 0xdeadbeef + d8: 03801083 838b2cda and.s r1, r2, r3 -> and.s r50, r51, 0x1a + e0: 838b2cf7 8ab1beef and.l r50, r51, 0xdeadbeef + e8: 02800042 82883105 andfg f0, f1, f2 -> andfg f3, s, 0x5 + f0: 08a01083 88a84146 avg.s r1, r2, r3 -> avg.s r4, r5, 0x6 + f8: 88ab2cf7 8ab1beef avg.l r50, r51, 0xdeadbeef + 100: 08b01083 88b84146 avg2h.s r1, r2, r3 -> avg2h.s r4, r5, 0x6 + 108: 88bb2cf7 8ab1beef avg2h.l r50, r51, 0xdeadbeef + 110: 02301083 82384146 bclr r1, r2, r3 -> bclr r4, r5, 0x6 + 118: 02101083 82185cc6 bnot r1, r2, r3 -> bnot r5, r51, 0x6 + 120: 00000029 00f00000 bra.s r41 || nop + 128: 00080008 00f00000 bra.s 40 \(168 <start\+0x168>\) || nop + 130: 00081e01 00f00000 bra.s f008 \(f138 <start\+0xf138>\) || nop + 138: 0046902a 00f00000 bratnz.s r41, r42 || nop + 140: 804c1000 8000f00d bratnz.l r1, f00d \(f14d <start\+0xf14d>\) + 148: 804c1037 8ab1f00d bratnz.l r1, -21520ff3 \(deadf155 <start\+0xdeadf155>\) + 150: 0042902a 00f00000 bratzr.s r41, r42 || nop + 158: 80481000 8000f00d bratzr.l r1, f00d \(f165 <start\+0xf165>\) + 160: 80481037 8ab1f00d bratzr.l r1, -21520ff3 \(deadf16d <start\+0xdeadf16d>\) + 168: 02201083 82285cc6 bset r1, r2, r3 -> bset r5, r51, 0x6 + 170: 00200029 00f00000 bsr.s r41 || nop + 178: 00281e01 00f00000 bsr.s f008 \(f180 <start\+0xf180>\) || nop + 180: 80280037 8ab1f00d bsr.l -21520ff3 \(deadf18d <start\+0xdeadf18d>\) + 188: 0066902a 00f00000 bsrtnz.s r41, r42 || nop + 190: 806c1000 8000f00d bsrtnz.l r1, f00d \(f19d <start\+0xf19d>\) + 198: 806c1037 8ab1f00d bsrtnz.l r1, -21520ff3 \(deadf1a5 <start\+0xdeadf1a5>\) + 1a0: 0062902a 00f00000 bsrtzr.s r41, r42 || nop + 1a8: 80681000 8000f00d bsrtzr.l r1, f00d \(f1b5 <start\+0xf1b5>\) + 1b0: 80681037 8ab1f00d bsrtzr.l r1, -21520ff3 \(deadf1bd <start\+0xdeadf1bd>\) + 1b8: 02001083 82085cc6 btst f1, r2, r3 -> btst v, r51, 0x6 + 1c0: 02c000c1 82c09515 cmpeq.s f0, r3, r1 -> cmpne.s f1, r20, r21 + 1c8: 02c127e0 82c1b0c4 cmpgt.s f2, r31, r32 -> cmpge.s f3, r3, r4 + 1d0: 02c240c4 82c2d0c4 cmplt.s s, r3, r4 -> cmple.s v, r3, r4 + 1d8: 02c360c4 82c3f0c4 cmpps.s va, r3, r4 -> cmpng.s c, r3, r4 + 1e0: 02d127e0 82d1b0c4 cmpugt.s f2, r31, r32 -> cmpuge.s f3, r3, r4 + 1e8: 02d240c4 82d2d0c4 cmpult.s s, r3, r4 -> cmpule.s v, r3, r4 + 1f0: 01001008 81081020 dbra.s r1, r8 -> dbra.s r1, 100 \(2f0 <start\+0x2f0>\) + 1f8: 81081037 8ab1f00d dbra.l r1, -21520ff3 \(deadf205 <start\+0xdeadf205>\) + 200: 0140201f 81482020 dbrai.s 10, r31 -> dbrai.s 10, 100 \(300 <start\+0x300>\) + 208: 81482037 8ab1f00d dbrai.l 10, -21520ff3 \(deadf215 <start\+0xdeadf215>\) + 210: 01201008 00f00000 dbsr.s r1, r8 || nop + 218: 01281020 00f00000 dbsr.s r1, 100 \(318 <start\+0x318>\) || nop + 220: 81281037 8ab1f00d dbsr.l r1, -21520ff3 \(deadf22d <start\+0xdeadf22d>\) + 228: 0160401f 00f00000 dbsri.s 20, r31 || nop + 230: 01684020 00f00000 dbsri.s 20, 100 \(330 <start\+0x330>\) || nop + 238: 81684037 8ab1f00d dbsri.l 20, -21520ff3 \(deadf245 <start\+0xdeadf245>\) + 240: 01101020 00f00000 djmp.s r1, r32 || nop + 248: 81181000 8000f00d djmp.l r1, f00d <start\+0xf00d> + 250: 81181037 8ab1f00d djmp.l r1, deadf00d <start\+0xdeadf00d> + 258: 01506020 00f00000 djmpi.s 30, r32 || nop + 260: 81586000 8000f00d djmpi.l 30, f00d <start\+0xf00d> + 268: 81586037 8ab1f00d djmpi.l 30, deadf00d <start\+0xdeadf00d> + 270: 01301020 00f00000 djsr.s r1, r32 || nop + 278: 81381000 8000f00d djsr.l r1, f00d <start\+0xf00d> + 280: 81381037 8ab1f00d djsr.l r1, deadf00d <start\+0xdeadf00d> + 288: 01702020 00f00000 djsri.s 10, r32 || nop + 290: 81784000 8000f00d djsri.l 20, f00d <start\+0xf00d> + 298: 81788037 8ab1f00d djsri.l 40, deadf00d <start\+0xdeadf00d> + 2a0: 00100029 00f00000 jmp.s r41 || nop + 2a8: 00181e01 00f00000 jmp.s f008 <start\+0xf008> || nop + 2b0: 80180037 8ab1f00d jmp.l deadf00d <start\+0xdeadf00d> + 2b8: 0056902a 00f00000 jmptnz.s r41, r42 || nop + 2c0: 805c1000 8000f00d jmptnz.l r1, f00d <start\+0xf00d> + 2c8: 805c1037 8ab1f00d jmptnz.l r1, deadf00d <start\+0xdeadf00d> + 2d0: 0052902a 00f00000 jmptzr.s r41, r42 || nop + 2d8: 80581000 8000f00d jmptzr.l r1, f00d <start\+0xf00d> + 2e0: 80581037 8ab1f00d jmptzr.l r1, deadf00d <start\+0xdeadf00d> + 2e8: 08c01084 88c8108f joinll.s r1, r2, r4 -> joinll.s r1, r2, 0xf + 2f0: 88c810b7 8ab1f00d joinll.l r1, r2, 0xdeadf00d + 2f8: 08d01084 88d8108f joinlh.s r1, r2, r4 -> joinlh.s r1, r2, 0xf + 300: 88d810b7 8ab1f00d joinlh.l r1, r2, 0xdeadf00d + 308: 08e01084 88e8108f joinhl.s r1, r2, r4 -> joinhl.s r1, r2, 0xf + 310: 88e810b7 8ab1f00d joinhl.l r1, r2, 0xdeadf00d + 318: 08f01084 88f8108f joinhh.s r1, r2, r4 -> joinhh.s r1, r2, 0xf + 320: 88f810b7 8ab1f00d joinhh.l r1, r2, 0xdeadf00d + 328: 00300029 00f00000 jsr.s r41 || nop + 330: 00381e01 00f00000 jsr.s f008 <start\+0xf008> || nop + 338: 80380037 8ab1f00d jsr.l deadf00d <start\+0xdeadf00d> + 340: 0076902a 00f00000 jsrtnz.s r41, r42 || nop + 348: 807c1000 8000f00d jsrtnz.l r1, f00d <start\+0xf00d> + 350: 807c1037 8ab1f00d jsrtnz.l r1, deadf00d <start\+0xdeadf00d> + 358: 0072902a 00f00000 jsrtzr.s r41, r42 || nop + 360: 80781000 8000f00d jsrtzr.l r1, f00d <start\+0xf00d> + 368: 80781037 8ab1f00d jsrtzr.l r1, deadf00d <start\+0xdeadf00d> + 370: 043061c8 843461c8 ld2h.s r6, @\(r7, r8\) -> ld2h.s r6, @\(r7\+, r8\) + 378: 043c61c8 843861da ld2h.s r6, @\(r7-, r8\) -> ld2h.s r6, @\(r7, 0x1a\) + 380: 843861c0 80001234 ld2h.l r6, @\(r7, 0x1234\) + 388: 046061c8 846461c8 ld2w.s r6, @\(r7, r8\) -> ld2w.s r6, @\(r7\+, r8\) + 390: 046c61c8 846861da ld2w.s r6, @\(r7-, r8\) -> ld2w.s r6, @\(r7, 0x1a\) + 398: 846861c0 80001234 ld2w.l r6, @\(r7, 0x1234\) + 3a0: 045061c8 845461c8 ld4bh.s r6, @\(r7, r8\) -> ld4bh.s r6, @\(r7\+, r8\) + 3a8: 045c61c8 845861da ld4bh.s r6, @\(r7-, r8\) -> ld4bh.s r6, @\(r7, 0x1a\) + 3b0: 845861c0 80001234 ld4bh.l r6, @\(r7, 0x1234\) + 3b8: 04d061c8 84d461c8 ld4bhu.s r6, @\(r7, r8\) -> ld4bhu.s r6, @\(r7\+, r8\) + 3c0: 04dc61c8 84d861da ld4bhu.s r6, @\(r7-, r8\) -> ld4bhu.s r6, @\(r7, 0x1a\) + 3c8: 84d861c0 80001234 ld4bhu.l r6, @\(r7, 0x1234\) + 3d0: 040061c8 840461c8 ldb.s r6, @\(r7, r8\) -> ldb.s r6, @\(r7\+, r8\) + 3d8: 040c61c8 840861da ldb.s r6, @\(r7-, r8\) -> ldb.s r6, @\(r7, 0x1a\) + 3e0: 840861c0 80001234 ldb.l r6, @\(r7, 0x1234\) + 3e8: 049061c8 849461c8 ldbu.s r6, @\(r7, r8\) -> ldbu.s r6, @\(r7\+, r8\) + 3f0: 049c61c8 849861da ldbu.s r6, @\(r7-, r8\) -> ldbu.s r6, @\(r7, 0x1a\) + 3f8: 849861c0 80001234 ldbu.l r6, @\(r7, 0x1234\) + 400: 042061c8 842461c8 ldh.s r6, @\(r7, r8\) -> ldh.s r6, @\(r7\+, r8\) + 408: 042c61c8 842861da ldh.s r6, @\(r7-, r8\) -> ldh.s r6, @\(r7, 0x1a\) + 410: 842861c0 80001234 ldh.l r6, @\(r7, 0x1234\) + 418: 041061c8 841461c8 ldhh.s r6, @\(r7, r8\) -> ldhh.s r6, @\(r7\+, r8\) + 420: 041c61c8 841861da ldhh.s r6, @\(r7-, r8\) -> ldhh.s r6, @\(r7, 0x1a\) + 428: 841861c0 80001234 ldhh.l r6, @\(r7, 0x1234\) + 430: 04a061c8 84a461c8 ldhu.s r6, @\(r7, r8\) -> ldhu.s r6, @\(r7\+, r8\) + 438: 04ac61c8 84a861da ldhu.s r6, @\(r7-, r8\) -> ldhu.s r6, @\(r7, 0x1a\) + 440: 84a861c0 80001234 ldhu.l r6, @\(r7, 0x1234\) + 448: 044061c8 844461c8 ldw.s r6, @\(r7, r8\) -> ldw.s r6, @\(r7\+, r8\) + 450: 044c61c8 844861da ldw.s r6, @\(r7-, r8\) -> ldw.s r6, @\(r7, 0x1a\) + 458: 844861c0 80001234 ldw.l r6, @\(r7, 0x1234\) + 460: 8b48109f 0b401084 mac0 r1, r2, 0x1f <- mac0 r1, r2, r4 + 468: 8b4c109f 0b441084 mac1 r1, r2, 0x1f <- mac1 r1, r2, r4 + 470: 8b58109f 0b501084 macs0 r1, r2, 0x1f <- macs0 r1, r2, r4 + 478: 8b5c109f 0b541084 macs1 r1, r2, 0x1f <- macs1 r1, r2, r4 + 480: 047c004a 8474004a moddec r1, 0xa -> modinc r1, 0xa + 488: 8b68109f 0b601084 msub0 r1, r2, 0x1f <- msub0 r1, r2, r4 + 490: 8b6c109f 0b641084 msub1 r1, r2, 0x1f <- msub1 r1, r2, r4 + 498: 8b08108a 0b001084 mul r1, r2, 0xa <- mul r1, r2, r4 + 4a0: 8b78109f 0b701084 msubs0 r1, r2, 0x1f <- msubs0 r1, r2, r4 + 4a8: 8b7c109f 0b741084 msubs1 r1, r2, 0x1f <- msubs1 r1, r2, r4 + 4b0: 00f00000 00f00000 nop || nop + 4b8: 8a08108a 0a001084 mul2h r1, r2, 0xa <- mul2h r1, r2, r4 + 4c0: 8a48108a 0a401084 mulhxll r1, r2, 0xa <- mulhxll r1, r2, r4 + 4c8: 8a58108a 0a501084 mulhxlh r1, r2, 0xa <- mulhxlh r1, r2, r4 + 4d0: 8a68108a 0a601084 mulhxhl r1, r2, 0xa <- mulhxhl r1, r2, r4 + 4d8: 8a78108a 0a701084 mulhxhh r1, r2, 0xa <- mulhxhh r1, r2, r4 + 4e0: 8b900044 0a108084 mulxs a0, r1, r4 <- mulx2h r8, r2, r4 + 4e8: 8b88108a 0b800044 mulx a1, r2, 0xa <- mulx a0, r1, r4 + 4f0: 8bf8204a 0bf01004 mvfacc r2, a1, 0xa <- mvfacc r1, a0, r4 + 4f8: 8b98108a 0a18808a mulxs a1, r2, 0xa <- mulx2h r8, r2, 0xa + 500: 01e0a080 81e0a1c0 mvfsys r10, pc -> mvfsys r10, rpt_c + 508: 01e0a000 81e0a002 mvfsys r10, psw -> mvfsys r10, pswh + 510: 01e0a001 81e0a003 mvfsys r10, pswl -> mvfsys r10, f0 + 518: 01e0a103 8af01084 mvfsys r10, s -> mvtacc a1, r2, r4 + 520: 00e07280 80e00280 mvtsys rpt_c, r10 -> mvtsys psw, r10 + 528: 00e00282 80e00281 mvtsys pswh, r10 -> mvtsys pswl, r10 + 530: 00e00283 80e03283 mvtsys f0, r10 -> mvtsys f3, r10 + 538: 00e04283 80e05283 mvtsys s, r10 -> mvtsys v, r10 + 540: 00e06283 80e07283 mvtsys va, r10 -> mvtsys c, r10 + 548: 00f00000 83901080 nop -> not r1, r2 + 550: 02901080 83a01084 notfg f1, f2 -> or.s r1, r2, r4 + 558: 03a8109a 00f00000 or.s r1, r2, 0x1a || nop + 560: 83a810b7 8ab1f00d or.l r1, r2, 0xdeadf00d + 568: 02a01084 82a84081 orfg f1, f2, s -> orfg s, f2, 0x1 + 570: 00800000 00f00000 reit || nop + 578: 01801002 00f00000 repeat.s r1, r2 || nop + 580: 81884000 8000dead repeat.l r4, dead \(e42d <start\+0xe42d>\) + 588: 81884037 8ab1f00d repeat.l r4, -21520ff3 \(deadf595 <start\+0xdeadf595>\) + 590: 01a0a001 81a8a200 repeati.s a \(59a <start\+0x59a>\), r1 -> repeati.s a \(59a <start\+0x59a>\), 1000 \(1590 <start\+0x1590>\) + 598: 00f00000 00f00000 nop || nop + 5a0: 03401084 8348108a rot r1, r2, r4 -> rot r1, r2, 0xa + 5a8: 03501084 8358108a rot2h r1, r2, r4 -> rot2h r1, r2, 0xa + 5b0: 8a88108a 0a801084 sat r1, r2, 0xa <- sat r1, r2, r4 + 5b8: 8a98108a 0a901084 sat2h r1, r2, 0xa <- sat2h r1, r2, r4 + 5c0: 8bc8108a 0bc01084 sathl r1, r2, 0xa <- sathl r1, r2, r4 + 5c8: 8bd8108a 0bd01084 sathh r1, r2, 0xa <- sathh r1, r2, r4 + 5d0: 8aa8108a 0aa01084 satz r1, r2, 0xa <- satz r1, r2, r4 + 5d8: 8ab8108a 0ab01084 satz2h r1, r2, 0xa <- satz2h r1, r2, r4 + 5e0: 03001084 8308108a sra r1, r2, r4 -> sra r1, r2, 0xa + 5e8: 03101084 8318108a sra2h r1, r2, r4 -> sra2h r1, r2, 0xa + 5f0: 03601084 8368108a src r1, r2, r4 -> src r1, r2, 0xa + 5f8: 03201084 8328108a srl r1, r2, r4 -> srl r1, r2, 0xa + 600: 03301084 8338108a srl2h r1, r2, r4 -> srl2h r1, r2, 0xa + 608: 053061c8 853461c8 st2h.s r6, @\(r7, r8\) -> st2h.s r6, @\(r7\+, r8\) + 610: 053c61c8 853861da st2h.s r6, @\(r7-, r8\) -> st2h.s r6, @\(r7, 0x1a\) + 618: 853861c0 80001234 st2h.l r6, @\(r7, 0x1234\) + 620: 056061c8 856461c8 st2w.s r6, @\(r7, r8\) -> st2w.s r6, @\(r7\+, r8\) + 628: 056c61c8 856861da st2w.s r6, @\(r7-, r8\) -> st2w.s r6, @\(r7, 0x1a\) + 630: 856861c0 80001234 st2w.l r6, @\(r7, 0x1234\) + 638: 055061c8 855461c8 st4hb.s r6, @\(r7, r8\) -> st4hb.s r6, @\(r7\+, r8\) + 640: 055c61c8 855861da st4hb.s r6, @\(r7-, r8\) -> st4hb.s r6, @\(r7, 0x1a\) + 648: 855861c0 80001234 st4hb.l r6, @\(r7, 0x1234\) + 650: 050061c8 850461c8 stb.s r6, @\(r7, r8\) -> stb.s r6, @\(r7\+, r8\) + 658: 050c61c8 850861da stb.s r6, @\(r7-, r8\) -> stb.s r6, @\(r7, 0x1a\) + 660: 850861c0 80001234 stb.l r6, @\(r7, 0x1234\) + 668: 052061c8 852461c8 sth.s r6, @\(r7, r8\) -> sth.s r6, @\(r7\+, r8\) + 670: 052c61c8 852861da sth.s r6, @\(r7-, r8\) -> sth.s r6, @\(r7, 0x1a\) + 678: 852861c0 80001234 sth.l r6, @\(r7, 0x1234\) + 680: 051061c8 851461c8 sthh.s r6, @\(r7, r8\) -> sthh.s r6, @\(r7\+, r8\) + 688: 051c61c8 851861da sthh.s r6, @\(r7-, r8\) -> sthh.s r6, @\(r7, 0x1a\) + 690: 851861c0 80001234 sthh.l r6, @\(r7, 0x1234\) + 698: 054061c8 854461c8 stw.s r6, @\(r7, r8\) -> stw.s r6, @\(r7\+, r8\) + 6a0: 054c61c8 854861da stw.s r6, @\(r7-, r8\) -> stw.s r6, @\(r7, 0x1a\) + 6a8: 854861c0 80001234 stw.l r6, @\(r7, 0x1234\) + 6b0: 08201083 882b2cda sub.s r1, r2, r3 -> sub.s r50, r51, 0x1a + 6b8: 882b2cf7 8ab1beef sub.l r50, r51, 0xdeadbeef + 6c0: 08301083 883b2cda sub2h.s r1, r2, r3 -> sub2h.s r50, r51, 0x1a + 6c8: 883b2cf7 8ab1beef sub2h.l r50, r51, 0xdeadbeef + 6d0: 08501083 885b2cda subb.s r1, r2, r3 -> subb.s r50, r51, 0x1a + 6d8: 885b2cf7 8ab1beef subb.l r50, r51, 0xdeadbeef + 6e0: 09801083 898b2cda subhlll.s r1, r2, r3 -> subhlll.s r50, r51, 0x1a + 6e8: 898b2cf7 8ab1beef subhlll.l r50, r51, 0xdeadbeef + 6f0: 09901083 899b2cda subhllh.s r1, r2, r3 -> subhllh.s r50, r51, 0x1a + 6f8: 899b2cf7 8ab1beef subhllh.l r50, r51, 0xdeadbeef + 700: 09a01083 89ab2cda subhlhl.s r1, r2, r3 -> subhlhl.s r50, r51, 0x1a + 708: 89ab2cf7 8ab1beef subhlhl.l r50, r51, 0xdeadbeef + 710: 09b01083 89bb2cda subhlhh.s r1, r2, r3 -> subhlhh.s r50, r51, 0x1a + 718: 89bb2cf7 8ab1beef subhlhh.l r50, r51, 0xdeadbeef + 720: 09c01083 89cb2cda subhhll.s r1, r2, r3 -> subhhll.s r50, r51, 0x1a + 728: 89cb2cf7 8ab1beef subhhll.l r50, r51, 0xdeadbeef + 730: 09d01083 89db2cda subhhlh.s r1, r2, r3 -> subhhlh.s r50, r51, 0x1a + 738: 89db2cf7 8ab1beef subhhlh.l r50, r51, 0xdeadbeef + 740: 09e01083 89eb2cda subhhhl.s r1, r2, r3 -> subhhhl.s r50, r51, 0x1a + 748: 89eb2cf7 8ab1beef subhhhl.l r50, r51, 0xdeadbeef + 750: 09f01083 89fb2cda subhhhh.s r1, r2, r3 -> subhhhh.s r50, r51, 0x1a + 758: 89fb2cf7 8ab1beef subhhhh.l r50, r51, 0xdeadbeef + 760: 00900001 00f00000 trap.s r1 || nop + 768: 0098000a 00f00000 trap.s 0xa || nop + 770: 03b01084 83b8108a xor.s r1, r2, r4 -> xor.s r1, r2, 0xa + 778: 83b810b7 8ab1f00d xor.l r1, r2, 0xdeadf00d + 780: 02b01084 82b8110a xorfg f1, f2, s -> xorfg f1, s, 0xa + 788: 00f00000 80f00000 nop -> nop + 790: 00f00000 80f00000 nop -> nop + 798: 00f00000 00f00000 nop || nop + 7a0: 80f00000 00f00000 nop <- nop + 7a8: 03901080 00f00000 not r1, r2 || nop + 7b0: 039020c0 80f00000 not r2, r3 -> nop diff --git a/gas/testsuite/gas/d30v/inst.s b/gas/testsuite/gas/d30v/inst.s new file mode 100644 index 0000000..ee6611e --- /dev/null +++ b/gas/testsuite/gas/d30v/inst.s @@ -0,0 +1,504 @@ +# test all instructions + +start: + abs r21,r42 + + add r1,r2,r3 + add r50,r51,0x1a + add r50,r51,0xdeadbeef + + add2h r1,r2,r3 + add2h r50,r51,0x1a + add2h r50,r51,0xdeadbeef + + addc r1,r2,r3 + addc r50,r51,0x1a + addc r50,r51,0xdeadbeef + + addhlll r1,r2,r3 + addhlll r50,r51,0x1a + addhlll r50,r51,0xdeadbeef + + addhllh r1,r2,r3 + addhllh r50,r51,0x1a + addhllh r50,r51,0xdeadbeef + + addhlhl r1,r2,r3 + addhlhl r50,r51,0x1a + addhlhl r50,r51,0xdeadbeef + + addhlhh r1,r2,r3 + addhlhh r50,r51,0x1a + addhlhh r50,r51,0xdeadbeef + + addhhll r1,r2,r3 + addhhll r50,r51,0x1a + addhhll r50,r51,0xdeadbeef + + addhhlh r1,r2,r3 + addhhlh r50,r51,0x1a + addhhlh r50,r51,0xdeadbeef + + addhhhl r1,r2,r3 + addhhhl r50,r51,0x1a + addhhhl r50,r51,0xdeadbeef + + addhhhh r1,r2,r3 + addhhhh r50,r51,0x1a + addhhhh r50,r51,0xdeadbeef + + adds r1,r2,r3 + adds r50,r51,0x1a + adds r50,r51,0xdeadbeef + + adds2h r1,r2,r3 + adds2h r50,r51,0x1a + adds2h r50,r51,0xdeadbeef + + and r1,r2,r3 + and r50,r51,0x1a + and r50,r51,0xdeadbeef + + andfg f0,f1,f2 + andfg f3,f4,5 + + avg r1,r2,r3 + avg r4,r5,6 + avg r50,r51,0xdeadbeef + + avg2h r1,r2,r3 + avg2h r4,r5,6 + avg2h r50,r51,0xdeadbeef + + bclr r1,r2,r3 + bclr r4,r5,6 + + bnot r1,r2,r3 + bnot r5,r51,6 + + bra r41 + bra 0x40 + bra 0xf00d + + bratnz r41,r42 + bratnz r1,0xf00d + bratnz r1,0xdeadf00d + + bratzr r41,r42 + bratzr r1,0xf00d + bratzr r1,0xdeadf00d + + bset r1,r2,r3 + bset r5,r51,6 + + bsr r41 + bsr 0xf00d + bsr 0xdeadf00d + + bsrtnz r41,r42 + bsrtnz r1,0xf00d + bsrtnz r1,0xdeadf00d + + bsrtzr r41,r42 + bsrtzr r1,0xf00d + bsrtzr r1,0xdeadf00d + + btst f1,r2,r3 + btst f5,r51,6 + + cmpeq f0,r3,r1 + cmpne f1,r20,r21 + cmpgt f2,r31,r32 + cmpge f3,r3,r4 + cmplt f4,r3,r4 + cmple f5,r3,r4 + cmpps f6,r3,r4 + cmpng f7,r3,r4 + + cmpugt f2,r31,r32 + cmpuge f3,r3,r4 + cmpult f4,r3,r4 + cmpule f5,r3,r4 + + dbra r1,r8 + dbra r1,0x100 + dbra r1,0xdeadf00d + + dbrai 0x10,r31 + dbrai 0x10,0x100 + dbrai 0x10,0xdeadf00d + + dbsr r1,r8 || nop + dbsr r1,0x100 || nop + dbsr r1,0xdeadf00d + + dbsri 0x20,r31 || nop + dbsri 0x20,0x100 || nop + dbsri 0x20,0xdeadf00d + + djmp r1,r32 + djmp r1,0xf00d + djmp r1,0xdeadf00d + + djmpi 0x30,r32 + djmpi 0x30,0xf00d + djmpi 0x30,0xdeadf00d + + djsr r1,r32 + djsr r1,0xf00d + djsr r1,0xdeadf00d + + djsri 0x10,r32 + djsri 0x20,0xf00d + djsri 0x40,0xdeadf00d + + jmp r41 + jmp 0xf00d + jmp 0xdeadf00d + + jmptnz r41,r42 + jmptnz r1,0xf00d + jmptnz r1,0xdeadf00d + + jmptzr r41,r42 + jmptzr r1,0xf00d + jmptzr r1,0xdeadf00d + + joinll r1,r2,r4 + joinll r1,r2,0xf + joinll r1,r2,0xdeadf00d + + joinlh r1,r2,r4 + joinlh r1,r2,0xf + joinlh r1,r2,0xdeadf00d + + joinhl r1,r2,r4 + joinhl r1,r2,0xf + joinhl r1,r2,0xdeadf00d + + joinhh r1,r2,r4 + joinhh r1,r2,0xf + joinhh r1,r2,0xdeadf00d + + jsr r41 + jsr 0xf00d + jsr 0xdeadf00d + + jsrtnz r41,r42 + jsrtnz r1,0xf00d + jsrtnz r1,0xdeadf00d + + jsrtzr r41,r42 + jsrtzr r1,0xf00d + jsrtzr r1,0xdeadf00d + + ld2h r6,@(r7,r8) + ld2h r6,@(r7+,r8) + ld2h r6,@(r7-,r8) + ld2h r6,@(r7,0x1a) + ld2h r6,@(r7,0x1234) + + ld2w r6,@(r7,r8) + ld2w r6,@(r7+,r8) + ld2w r6,@(r7-,r8) + ld2w r6,@(r7,0x1a) + ld2w r6,@(r7,0x1234) + + ld4bh r6,@(r7,r8) + ld4bh r6,@(r7+,r8) + ld4bh r6,@(r7-,r8) + ld4bh r6,@(r7,0x1a) + ld4bh r6,@(r7,0x1234) + + ld4bhu r6,@(r7,r8) + ld4bhu r6,@(r7+,r8) + ld4bhu r6,@(r7-,r8) + ld4bhu r6,@(r7,0x1a) + ld4bhu r6,@(r7,0x1234) + + ldb r6,@(r7,r8) + ldb r6,@(r7+,r8) + ldb r6,@(r7-,r8) + ldb r6,@(r7,0x1a) + ldb r6,@(r7,0x1234) + + ldbu r6,@(r7,r8) + ldbu r6,@(r7+,r8) + ldbu r6,@(r7-,r8) + ldbu r6,@(r7,0x1a) + ldbu r6,@(r7,0x1234) + + ldh r6,@(r7,r8) + ldh r6,@(r7+,r8) + ldh r6,@(r7-,r8) + ldh r6,@(r7,0x1a) + ldh r6,@(r7,0x1234) + + ldhh r6,@(r7,r8) + ldhh r6,@(r7+,r8) + ldhh r6,@(r7-,r8) + ldhh r6,@(r7,0x1a) + ldhh r6,@(r7,0x1234) + + ldhu r6,@(r7,r8) + ldhu r6,@(r7+,r8) + ldhu r6,@(r7-,r8) + ldhu r6,@(r7,0x1a) + ldhu r6,@(r7,0x1234) + + ldw r6,@(r7,r8) + ldw r6,@(r7+,r8) + ldw r6,@(r7-,r8) + ldw r6,@(r7,0x1a) + ldw r6,@(r7,0x1234) + + mac0 r1,r2,r4 + mac0 r1,r2,0x1f + mac1 r1,r2,r4 + mac1 r1,r2,0x1f + + macs0 r1,r2,r4 + macs0 r1,r2,0x1f + macs1 r1,r2,r4 + macs1 r1,r2,0x1f + + moddec r1,0xa + + modinc r1,0xa + + msub0 r1,r2,r4 + msub0 r1,r2,0x1f + msub1 r1,r2,r4 + msub1 r1,r2,0x1f + + mul r1,r2,r4 + mul r1,r2,0xa + + msubs0 r1,r2,r4 + msubs0 r1,r2,0x1f + msubs1 r1,r2,r4 + msubs1 r1,r2,0x1f + + mul2h r1,r2,r4 + mul2h r1,r2,0xa + + mulhxll r1,r2,r4 + mulhxll r1,r2,0xa + + mulhxlh r1,r2,r4 + mulhxlh r1,r2,0xa + + mulhxhl r1,r2,r4 + mulhxhl r1,r2,0xa + + mulhxhh r1,r2,r4 + mulhxhh r1,r2,0xa + + mulx2h r8,r2,r4 + mulxs a0,r1,r4 + + mulx a0,r1,r4 + mulx a1,r2,0xa + + mvfacc r1,a0,r4 + mvfacc r2,a1,0xa + + mulx2h r8,r2,0xa + mulxs a1,r2,0xa + + mvfsys r10,pc + mvfsys r10,rpt_c + mvfsys r10,psw + mvfsys r10,pswh + mvfsys r10,pswl + mvfsys r10,f0 + mvfsys r10,S + + mvtacc a1,r2,r4 + + mvtsys rpt_c, r10 + mvtsys psw, r10 + mvtsys pswh, r10 + mvtsys pswl, r10 + mvtsys f0, r10 + mvtsys f3, r10 + mvtsys S, r10 + mvtsys V, r10 + mvtsys VA, r10 + mvtsys C, r10 + + nop + + not r1,r2 + + notfg f1,f2 + + or r1,r2,r4 + or r1,r2,0x1a + or r1,r2,0xdeadf00d + + orfg f1,f2,f4 + orfg f4,f2,0x1 + + reit + + repeat r1,r2 + repeat r4,0xdead + repeat r4,0xdeadf00d + + repeati 0xa,r1 + repeati 0xa,0x1001 + + nop || nop + + rot r1,r2,r4 + rot r1,r2,0xa + + rot2h r1,r2,r4 + rot2h r1,r2,0xa + + sat r1,r2,r4 + sat r1,r2,0xa + + sat2h r1,r2,r4 + sat2h r1,r2,0xa + + sathl r1,r2,r4 + sathl r1,r2,0xa + + sathh r1,r2,r4 + sathh r1,r2,0xa + + satz r1,r2,r4 + satz r1,r2,0xa + + satz2h r1,r2,r4 + satz2h r1,r2,0xa + + sra r1,r2,r4 + sra r1,r2,0xa + + sra2h r1,r2,r4 + sra2h r1,r2,0xa + + src r1,r2,r4 + src r1,r2,0xa + + srl r1,r2,r4 + srl r1,r2,0xa + + srl2h r1,r2,r4 + srl2h r1,r2,0xa + + + st2h r6,@(r7,r8) + st2h r6,@(r7+,r8) + st2h r6,@(r7-,r8) + st2h r6,@(r7,0x1a) + st2h r6,@(r7,0x1234) + + st2w r6,@(r7,r8) + st2w r6,@(r7+,r8) + st2w r6,@(r7-,r8) + st2w r6,@(r7,0x1a) + st2w r6,@(r7,0x1234) + + st4hb r6,@(r7,r8) + st4hb r6,@(r7+,r8) + st4hb r6,@(r7-,r8) + st4hb r6,@(r7,0x1a) + st4hb r6,@(r7,0x1234) + + stb r6,@(r7,r8) + stb r6,@(r7+,r8) + stb r6,@(r7-,r8) + stb r6,@(r7,0x1a) + stb r6,@(r7,0x1234) + + sth r6,@(r7,r8) + sth r6,@(r7+,r8) + sth r6,@(r7-,r8) + sth r6,@(r7,0x1a) + sth r6,@(r7,0x1234) + + sthh r6,@(r7,r8) + sthh r6,@(r7+,r8) + sthh r6,@(r7-,r8) + sthh r6,@(r7,0x1a) + sthh r6,@(r7,0x1234) + + stw r6,@(r7,r8) + stw r6,@(r7+,r8) + stw r6,@(r7-,r8) + stw r6,@(r7,0x1a) + stw r6,@(r7,0x1234) + + sub r1,r2,r3 + sub r50,r51,0x1a + sub r50,r51,0xdeadbeef + + sub2h r1,r2,r3 + sub2h r50,r51,0x1a + sub2h r50,r51,0xdeadbeef + + subb r1,r2,r3 + subb r50,r51,0x1a + subb r50,r51,0xdeadbeef + + subhlll r1,r2,r3 + subhlll r50,r51,0x1a + subhlll r50,r51,0xdeadbeef + + subhllh r1,r2,r3 + subhllh r50,r51,0x1a + subhllh r50,r51,0xdeadbeef + + subhlhl r1,r2,r3 + subhlhl r50,r51,0x1a + subhlhl r50,r51,0xdeadbeef + + subhlhh r1,r2,r3 + subhlhh r50,r51,0x1a + subhlhh r50,r51,0xdeadbeef + + subhhll r1,r2,r3 + subhhll r50,r51,0x1a + subhhll r50,r51,0xdeadbeef + + subhhlh r1,r2,r3 + subhhlh r50,r51,0x1a + subhhlh r50,r51,0xdeadbeef + + subhhhl r1,r2,r3 + subhhhl r50,r51,0x1a + subhhhl r50,r51,0xdeadbeef + + subhhhh r1,r2,r3 + subhhhh r50,r51,0x1a + subhhhh r50,r51,0xdeadbeef + + trap r1 + trap 0xa + + xor r1,r2,r4 + xor r1,r2,0xa + xor r1,r2,0xdeadf00d + + xorfg f1,f2,f4 + xorfg f1,f4,0xa + +# VLIW syntax test + nop + nop + nop -> nop + nop || nop + nop <- nop + +# try changing sections + not r1,r2 + .section .foo + add r10,r12,6 + .text + not r2,r3 + nop +
\ No newline at end of file diff --git a/gas/testsuite/gas/d30v/label-debug.d b/gas/testsuite/gas/d30v/label-debug.d new file mode 100644 index 0000000..e429f81 --- /dev/null +++ b/gas/testsuite/gas/d30v/label-debug.d @@ -0,0 +1,24 @@ +#objdump: -ldr +#name: D30V debug (-g) test +#as: -g + +.*: +file format elf32-d30v + +Disassembly of section .text: + +00000000 <_abc-0x18>: +.*label-debug.s:4 + 0: 10080003 00f00000 bra.s\/tx 18 \(18 <_abc>\) \|\| nop +.*label-debug.s:5 + 8: 00f00000 00f00000 nop || nop + 10: 0e000004 00f00000 .long 0xe000004 || nop + +00000018 <_abc>: +.*label-debug.s:8 + 18: 00f00000 00f00000 nop || nop +.*label-debug.s:9 + 20: 00f00000 00f00000 nop || nop +.*label-debug.s:10 + 28: 00f00000 00f00000 nop || nop +.*label-debug.s:11 + 30: 00f00000 00f00000 nop || nop diff --git a/gas/testsuite/gas/d30v/label-debug.s b/gas/testsuite/gas/d30v/label-debug.s new file mode 100644 index 0000000..9640aa4 --- /dev/null +++ b/gas/testsuite/gas/d30v/label-debug.s @@ -0,0 +1,11 @@ +# labels should be aligned on 8-byte boundries + + .text + bra.s/tx _abc || nop + nop || nop + .word 0x0e000004 +_abc: + nop + nop + nop + nop diff --git a/gas/testsuite/gas/d30v/label.d b/gas/testsuite/gas/d30v/label.d new file mode 100644 index 0000000..66cfcda --- /dev/null +++ b/gas/testsuite/gas/d30v/label.d @@ -0,0 +1,16 @@ +#objdump: -dr +#name: D30V label alignment test +#as: + +.*: +file format elf32-d30v + +Disassembly of section .text: + +00000000 <_abc-0x18>: + 0: 10080003 00f00000 bra.s/tx 18 (18 <_abc>) || nop + 8: 00f00000 00f00000 nop || nop + 10: 0e000004 00f00000 .long 0xe000004 || nop + +00000018 <_abc>: + 18: 00f00000 80f00000 nop -> nop + 20: 00f00000 80f00000 nop -> nop diff --git a/gas/testsuite/gas/d30v/label.s b/gas/testsuite/gas/d30v/label.s new file mode 100644 index 0000000..9640aa4 --- /dev/null +++ b/gas/testsuite/gas/d30v/label.s @@ -0,0 +1,11 @@ +# labels should be aligned on 8-byte boundries + + .text + bra.s/tx _abc || nop + nop || nop + .word 0x0e000004 +_abc: + nop + nop + nop + nop diff --git a/gas/testsuite/gas/d30v/mul.d b/gas/testsuite/gas/d30v/mul.d new file mode 100644 index 0000000..04e0a55 --- /dev/null +++ b/gas/testsuite/gas/d30v/mul.d @@ -0,0 +1,20 @@ +#objdump: -dr +#name: D30V alignment test +#as: -WO + +.*: +file format elf32-d30v + +Disassembly of section .text: + +00000000 <.text>: + 0: 8a105187 0a1020c4 mulx2h r5, r6, r7 <- mulx2h r2, r3, r4 + 8: 00f00000 0a10824a nop || mulx2h r8, r9, r10 + 10: 00f00000 0a10b30d nop || mulx2h r11, r12, r13 + 18: 8a111493 0a10e3d0 mulx2h r17, r18, r19 <- mulx2h r14, r15, r16 + 20: 8a117619 0a114556 mulx2h r23, r24, r25 <- mulx2h r20, r21, r22 + 28: 8b01d79f 0a11a6dc mul r29, r30, r31 <- mulx2h r26, r27, r28 + 30: 8b005187 0b0020c4 mul r5, r6, r7 <- mul r2, r3, r4 + 38: 8a10b30d 0a10824a mulx2h r11, r12, r13 <- mulx2h r8, r9, r10 + 40: 80f00000 0b00e3d0 nop <- mul r14, r15, r16 + 48: 00f00000 0a111493 nop || mulx2h r17, r18, r19 + 50: 8b017619 0a114556 mul r23, r24, r25 <- mulx2h r20, r21, r22 diff --git a/gas/testsuite/gas/d30v/mul.s b/gas/testsuite/gas/d30v/mul.s new file mode 100644 index 0000000..fe67859 --- /dev/null +++ b/gas/testsuite/gas/d30v/mul.s @@ -0,0 +1,19 @@ +# One of the rule on restricted sequence is consecutive IU instruction +# IU: MUL, MAC, MACS, MSUB, MSUBS (a) +# IU: MULHXpp, MULX2H, MUL2H (b) +# This means that instructions in group (a) and in (b) should not be executed +# in IU in consecutive cycles in the order (a)->(b). It does neither prohibit +# executions in the reverse order (b)-> (a) nor consecutive execution of +# group (a)->(a) or (b)->(b) + + mulx2h r5,r6,r7 <- mulx2h r2,r3,r4 + nop || mulx2h r8,r9,r10 + nop || mulx2h r11,r12,r13 + mulx2h r14,r15,r16 + mulx2h r17,r18,r19 + mulx2h r23,r24,r25 <- mulx2h r20,r21,r22 + mul r29,r30,r31 <- mulx2h r26,r27,r28 + mul r5, r6, r7 <- mul r2, r3, r4 + mulx2h r11, r12, r13 <- mulx2h r8, r9, r10 + mulx2h r17, r18, r19 <- mul r14, r15, r16 + mul r23, r24, r25 <- mulx2h r20, r21, r22 diff --git a/gas/testsuite/gas/d30v/opt.d b/gas/testsuite/gas/d30v/opt.d new file mode 100644 index 0000000..b4bfa9c --- /dev/null +++ b/gas/testsuite/gas/d30v/opt.d @@ -0,0 +1,89 @@ +#objdump: -dr +#name: D30V optimization test +#as: -O + +.*: +file format elf32-d30v + +Disassembly of section .text: + +00000000 <start>: + 0: 08801080 08803100 abs r1, r2 || abs r3, r4 + 8: 02900100 02901080 notfg f0, s || notfg f1, f2 + 10: 08801080 02901080 abs r1, r2 || notfg f1, f2 + 18: 08001083 82907000 add.s r1, r2, r3 -> notfg c, f0 + 20: 08001083 829001c0 add.s r1, r2, r3 -> notfg f0, c + 28: 00080000 00f00000 bra.s 0 \(28 <start\+0x28>\) || nop + 30: 08801080 88801080 abs r1, r2 -> abs r1, r2 + 38: 00080000 00f00000 bra.s 0 \(38 <start\+0x38>\) || nop + 40: 002bffff 00f00000 bsr.s -8 \(38 <start\+0x38>\) || nop + 48: 08801080 88801080 abs r1, r2 -> abs r1, r2 + 50: 00280000 08801080 bsr.s 0 \(50 <start\+0x50>\) || abs r1, r2 + 58: 04001083 85007209 ldb.s r1, @\(r2, r3\) -> stb.s r7, @\(r8, r9\) + 60: 05007209 84001083 stb.s r7, @\(r8, r9\) -> ldb.s r1, @\(r2, r3\) + 68: 04007209 84001083 ldb.s r7, @\(r8, r9\) -> ldb.s r1, @\(r2, r3\) + 70: 05007209 85001083 stb.s r7, @\(r8, r9\) -> stb.s r1, @\(r2, r3\) + 78: 080030c6 854820c0 add.s r3, r3, r6 -> stw.s r2, @\(r3, 0x0\) + 80: 02c28105 90180000 cmple.s f0, r4, r5 -> jmp.s/tx 0 <start> + 88: 02c28105 a0180000 cmple.s f0, r4, r5 -> jmp.s/fx 0 <start> + 90: 30180000 02c28105 jmp.s/xt 0 <start> || cmple.s f0, r4, r5 + 98: 40180000 02c28105 jmp.s/xf 0 <start> || cmple.s f0, r4, r5 + a0: 02c28105 d0180000 cmple.s f0, r4, r5 -> jmp.s/tt 0 <start> + a8: 02c28105 e0180000 cmple.s f0, r4, r5 -> jmp.s/tf 0 <start> + b0: 10180000 02c29105 jmp.s/tx 0 <start> || cmple.s f1, r4, r5 + b8: 02c29105 b0180000 cmple.s f1, r4, r5 -> jmp.s/xt 0 <start> + c0: 08084001 82c28105 add.s r4, r0, 0x1 -> cmple.s f0, r4, r5 + c8: 08084001 02c280c5 add.s r4, r0, 0x1 || cmple.s f0, r3, r5 + d0: 04604006 886054d4 ld2w.s r4, @\(r0, r6\) -> adds.s r5, r19, r20 + d8: 04604006 88603154 ld2w.s r4, @\(r0, r6\) -> adds.s r3, r5, r20 + e0: 04604006 086064d4 ld2w.s r4, @\(r0, r6\) || adds.s r6, r19, r20 + e8: 04604006 086074d4 ld2w.s r4, @\(r0, r6\) || adds.s r7, r19, r20 + f0: 04604006 08607014 ld2w.s r4, @\(r0, r6\) || adds.s r7, r0, r20 + f8: 05604006 086054d4 st2w.s r4, @\(r0, r6\) || adds.s r5, r19, r20 + 100: 05604006 08603154 st2w.s r4, @\(r0, r6\) || adds.s r3, r5, r20 + 108: 05604006 086064d4 st2w.s r4, @\(r0, r6\) || adds.s r6, r19, r20 + 110: 05604006 086074d4 st2w.s r4, @\(r0, r6\) || adds.s r7, r19, r20 + 118: 05604006 08607014 st2w.s r4, @\(r0, r6\) || adds.s r7, r0, r20 + 120: 0560a0c4 85628aec st2w.s r10, @\(r3, r4\) -> st2w.s r40, @\(r43, r44\) + 128: 05401083 84429aab stw.s r1, @\(r2, r3\) -> ldw.s r41, @\(r42, r43\) + 130: 04401083 84029aab ldw.s r1, @\(r2, r3\) -> ldb.s r41, @\(r42, r43\) + 138: 0444418b 88689182 ldw.s r4, @\(r6\+, r11\) -> adds.s r9, r6, 0x2 + 140: 044c418b 08689182 ldw.s r4, @\(r6-, r11\) || adds.s r9, r6, 0x2 + 148: 054c418b 88689182 stw.s r4, @\(r6-, r11\) -> adds.s r9, r6, 0x2 + 150: 0440418b 08689182 ldw.s r4, @\(r6, r11\) || adds.s r9, r6, 0x2 + 158: 0440418b 08689182 ldw.s r4, @\(r6, r11\) || adds.s r9, r6, 0x2 + 160: 00180000 00f00000 jmp.s 0 <start> || nop + 168: 00380000 08801080 jsr.s 0 <start> || abs r1, r2 + 170: 08801080 00f00000 abs r1, r2 || nop + 178: 00080000 00f00000 bra.s 0 \(178 <start\+0x178>\) || nop + 180: 00280000 08801080 bsr.s 0 \(180 <start\+0x180>\) || abs r1, r2 + 188: 08801080 00f00000 abs r1, r2 || nop + +00000190 <label1>: + 190: 05602083 89004146 st2w.s r2, @\(r2, r3\) -> addhlll.s r4, r5, r6 + +00000198 <label2>: + 198: 05508209 8990a2cc st4hb.s r8, @\(r8, r9\) -> subhllh.s r10, r11, r12 + +000001a0 <label3>: + 1a0: 0460e38f 8a610452 ld2w.s r14, @\(r14, r15\) -> mulhxhl r16, r17, r18 + +000001a8 <label4>: + 1a8: 04413515 8a1165d8 ldw.s r19, @\(r20, r21\) -> mulx2h r22, r23, r24 + +000001b0 <label5>: + 1b0: 0421969b 8a01c75e ldh.s r25, @\(r26, r27\) -> mul2h r28, r29, r30 + +000001b8 <label6>: + 1b8: 80f00000 0b001083 nop <- mul r1, r2, r3 + 1c0: 08007209 0a404146 add.s r7, r8, r9 || mulhxll r4, r5, r6 + +000001c8 <label7>: + 1c8: 04405180 0b0020c4 ldw.s r5, @\(r6, r0\) || mul r2, r3, r4 + 1d0: 80f00000 0b007209 nop <- mul r7, r8, r9 + 1d8: 0440a2c0 00f00000 ldw.s r10, @\(r11, r0\) || nop + 1e0: 80f00000 0b00c34e nop <- mul r12, r13, r14 + 1e8: 0440f400 0b4420c4 ldw.s r15, @\(r16, r0\) || mac1 r2, r3, r4 + 1f0: 00f00000 00f00000 nop || nop + 1f8: 04405180 00f00000 ldw.s r5, @\(r6, r0\) || nop + 200: 80f00000 0b407209 nop <- mac0 r7, r8, r9 + 208: 0440a2c0 8440a2c0 ldw.s r10, @\(r11, r0\) -> ldw.s r10, @\(r11, r0\) diff --git a/gas/testsuite/gas/d30v/opt.s b/gas/testsuite/gas/d30v/opt.s new file mode 100644 index 0000000..5733300 --- /dev/null +++ b/gas/testsuite/gas/d30v/opt.s @@ -0,0 +1,216 @@ +# D30V parallel optimization test +# assemble with "-O" + + .text +start: + abs r1,r2 + abs r3,r4 + + notfg f0,f4 + notfg f1,f2 + + abs r1,r2 + notfg f1,f2 + +# both change C flag + add r1,r2,r3 + notfg C,f0 + +# one uses and one changes C flag + add r1,r2,r3 + notfg f0,C + + bra . + abs r1,r2 + + abs r1,r2 + bra . + + bsr . + abs r1,r2 + + abs r1,r2 + abs r1,r2 + bsr . + + ldb r1,@(r2,r3) + stb r7,@(r8,r9) + + stb r7,@(r8,r9) + ldb r1,@(r2,r3) + + ldb r7,@(r8,r9) + ldb r1,@(r2,r3) + + stb r7,@(r8,r9) + stb r1,@(r2,r3) + + add r3, r3, r6 + stw r2, @(r3, 0) + +# should be serial because of conditional execution + cmple f0,r4,r5 + jmp/tx 0x0 + + cmple f0,r4,r5 + jmp/fx 0x0 + + cmple f0,r4,r5 + jmp/xt 0x0 + + cmple f0,r4,r5 + jmp/xf 0x0 + + cmple f0,r4,r5 + jmp/tt 0x0 + + cmple f0,r4,r5 + jmp/tf 0x0 + + cmple f1,r4,r5 + jmp/tx 0x0 + + cmple f1,r4,r5 + jmp/xt 0x0 + + # serial because of the r4 dependency + add r4, r0, 1 + cmple f0, r4, r5 + + # parallel + add r4, r0, 1 + cmple f0, r3, r5 + + # serial because ld2w loads r5 + ld2w r4,@(r0,r6) + adds r5,r19,r20 + + # serial because ld2w loads r5 + ld2w r4,@(r0,r6) + adds r3,r5,r20 + + # parallel even though ld2w uses r6 and adds changes it + ld2w r4,@(r0,r6) + adds r6,r19,r20 + + # parallel + ld2w r4,@(r0,r6) + adds r7,r19,r20 + + # parallel + ld2w r4,@(r0,r6) + adds r7,r0,r20 + + # parallel even though st2w uses r5 and adds modifies it + st2w r4,@(r0,r6) + adds r5,r19,r20 + + # parallel, both use but don't modify r5 + st2w r4,@(r0,r6) + adds r3,r5,r20 + + # parallel even though st2w uses r6 and adds changes it + st2w r4,@(r0,r6) + adds r6,r19,r20 + + # parallel + st2w r4,@(r0,r6) + adds r7,r19,r20 + + # parallel + st2w r4,@(r0,r6) + adds r7,r0,r20 + +# test memory dependencies + + # always serial because one could overwrite the other + st2w r10,@(r3,r4) + st2w r40,@(r43,r44) + + # always serial + stw r1,@(r2,r3) + ldw r41,@(r42,r43) + + # reads can happen in parallel but the current architecture + # doesn't support it + ldw r1,@(r2,r3) + ldb r41,@(r42,r43) + +# test post increment and decrement dependencies + + # serial + ldw r4,@(r6+,r11) + adds r9,r6,2 + + # parallel, modification to r6 happens last + adds r9,r6,2 + ldw r4,@(r6-,r11) + + # serial + stw r4,@(r6-,r11) + adds r9,r6,2 + + # parallel + ldw r4,@(r6,r11) + adds r9,r6,2 + + # parallel + adds r9,r6,2 + ldw r4,@(r6,r11) + +# if the first instruction is a jmp, don't parallelize + jmp 0 + abs r1,r2 + + jsr 0 + abs r1,r2 + + .align 3 + + bra 0 + abs r1,r2 + + bsr 0 + abs r1,r2 + +# Explicitly prohibited from parallel execution. +# The labels are here to prevent instruction pairs +# from being merged with following pairs. + +label1: + st2w r2, @(r2, r3) + addhlll r4, r5, r6 +label2: + st4hb r8, @(r8, r9) + subhllh r10, r11, r12 +label3: + ld2w r14, @(r14, r15) + mulhxhl r16, r17, r18 +label4: + ldw r19, @(r20, r21) + mulx2h r22, r23, r24 +label5: + ldh r25, @(r26, r27) + mul2h r28, r29, r30 + +# Insertion of NOPs required to prevent pipeline clashes. + +label6: + mul r1,r2,r3 + mulhxll r4,r5,r6 + add r7, r8, r9 +label7: + + mul r2,r3,r4 + ldw r5, @(r6,r0) + + ldw r10, @(r11, r0) <- mul r7,r8,r9 + + mul r12,r13,r14 -> ldw r15, @(r16, r0) + + mac1 r2,r3,r4 + ldw r5, @(r6,r0) + + ldw r10, @(r11, r0) <- mac0 r7,r8,r9 + ldw r10, @(r11, r0) + diff --git a/gas/testsuite/gas/d30v/reloc.d b/gas/testsuite/gas/d30v/reloc.d new file mode 100644 index 0000000..1de2780 --- /dev/null +++ b/gas/testsuite/gas/d30v/reloc.d @@ -0,0 +1,93 @@ +#objdump: -dr +#name: D30V relocation test +#as: + +.*: +file format elf32-d30v + +Disassembly of section .text: + +00000000 <start>: + 0: 88082000 80000028 add.l r2, r0, 0x28 + 0: R_D30V_32 .text + 8: 88084000 80000000 add.l r4, r0, 0x0 + 8: R_D30V_32 .data + 10: 88084000 80000006 add.l r4, r0, 0x6 + 10: R_D30V_32 .data + 18: 88084000 80000000 add.l r4, r0, 0x0 + 18: R_D30V_32 unk + 20: 80080000 80000018 bra.l 18 \(38 <cont>\) + +00000028 <hello>: + 28: 48656c6c 6f20576f .long 0x48656c6c || .long 0x6f20576f + 30: 726c640a 00f00000 .long 0x726c640a || nop + +00000038 <cont>: + 38: 80180000 80000048 jmp.l 48 <cont2> + 38: R_D30V_32 .text + 40: 088020c0 00f00000 abs r2, r3 || nop + +00000048 <cont2>: + 48: 000bfff7 00f00000 bra.s -48 \(0 <start>\) || nop + 50: 00080205 00f00000 bra.s 1028 \(1078 <exit>\) || nop + 58: 00180000 00f00000 jmp.s 0 <start> || nop + 60: 006c1ffb 00f00000 bsrtnz.s r1, -28 \(38 <cont>\) || nop + 68: 006c1ffa 00f00000 bsrtnz.s r1, -30 \(38 <cont>\) || nop + 70: 004c1ff9 00f00000 bratnz.s r1, -38 \(38 <cont>\) || nop + 78: 004c1ff8 00f00000 bratnz.s r1, -40 \(38 <cont>\) || nop + 80: 005c1007 00f00000 jmptnz.s r1, 38 <cont> || nop + 80: R_D30V_15 .text + 88: 006c11f1 00f00000 bsrtnz.s r1, f88 \(1010 <foo>\) || nop + 90: 005c1000 00f00000 jmptnz.s r1, 0 <start> || nop + 90: R_D30V_15 unk + 98: 006c1000 00f00000 bsrtnz.s r1, 0 \(98 <cont2\+0x50>\) || nop + 98: R_D30V_15_PCREL unk + a0: 805c1000 80000000 jmptnz.l r1, 0 <start> + a0: R_D30V_32 unk + a8: 806c1000 80000000 bsrtnz.l r1, 0 \(a8 <cont2\+0x60>\) + a8: R_D30V_32_PCREL unk + b0: 000801ec 00f00000 bra.s f60 \(1010 <foo>\) || nop + b8: 80080000 80000f58 bra.l f58 \(1010 <foo>\) + c0: 000bffe8 00f00000 bra.s -c0 \(0 <start>\) || nop + c8: 80180000 80000000 jmp.l 0 <start> + c8: R_D30V_32 .text + d0: 80180000 80000000 jmp.l 0 <start> + d0: R_D30V_32 .text + d8: 00180000 00f00000 jmp.s 0 <start> || nop + d8: R_D30V_21 .text + e0: 00180202 00f00000 jmp.s 1010 <foo> || nop + e0: R_D30V_21 .text + e8: 000bffe3 00f00000 bra.s -e8 \(0 <start>\) || nop + f0: 80080000 80000000 bra.l 0 \(f0 <cont2\+0xa8>\) + f0: R_D30V_32_PCREL unknown + f8: 80180000 80000000 jmp.l 0 <start> + f8: R_D30V_32 unknown + 100: 00180000 00f00000 jmp.s 0 <start> || nop + 100: R_D30V_21 unknown + 108: 00080000 00f00000 bra.s 0 \(108 <cont2\+0xc0>\) || nop + 108: R_D30V_21_PCREL unknown + ... + +00001010 <foo>: + 1010: 08001000 00f00000 add.s r1, r0, r0 || nop + 1018: 846bc000 80001070 ld2w.l r60, @\(r0, 0x1070\) + 1018: R_D30V_32 .text + 1020: 0803e000 8028000b add.s r62, r0, r0 -> bsr.s 58 \(1078 <exit>\) + 1028: 002bfffd 00f00000 bsr.s -18 \(1010 <foo>\) || nop + 1030: 000bfe03 00f00000 bra.s -fe8 \(48 <cont2>\) || nop + 1038: 000bfe02 00f00000 bra.s -ff0 \(48 <cont2>\) || nop + 1040: 00280007 00f00000 bsr.s 38 \(1078 <exit>\) || nop + 1048: 0018020f 00f00000 jmp.s 1078 <exit> || nop + 1048: R_D30V_21 .text + 1050: 0018020f 00f00000 jmp.s 1078 <exit> || nop + 1050: R_D30V_21 .text + 1058: 0018020f 00f00000 jmp.s 1078 <exit> || nop + 1058: R_D30V_21 .text + 1060: 80280000 80000018 bsr.l 18 \(1078 <exit>\) + 1068: 80180000 80001078 jmp.l 1078 <exit> + 1068: R_D30V_32 .text + +00001070 <longzero>: + ... + +00001078 <exit>: + 1078: 0010003e 00f00000 jmp.s r62 || nop diff --git a/gas/testsuite/gas/d30v/reloc.s b/gas/testsuite/gas/d30v/reloc.s new file mode 100644 index 0000000..2a99bf9 --- /dev/null +++ b/gas/testsuite/gas/d30v/reloc.s @@ -0,0 +1,68 @@ +# D30V relocation test + + .text +start: + add r2, r0, hello + add r4, r0, bar + add r4, r0, bar2 + add r4, r0, unk + bra cont +hello: .ascii "Hello World\n" + .align 3 +cont: jmp cont2 + abs r2,r3 +cont2: + bra start || nop + bra.s exit + jmp 0 || nop + bsrtnz.s r1,cont + bsrtnz r1,cont + bratnz.s r1,cont + bratnz r1,cont + jmptnz.s r1,cont + bsrtnz.s r1, foo + jmptnz.s r1, unk + bsrtnz.s r1, unk + jmptnz r1, unk + bsrtnz r1, unk + bra.s foo + bra foo + bra start + jmp start + jmp start + jmp.s start + jmp.s foo + bra start + bra unknown + jmp unknown + jmp.s unknown + bra.s unknown + + .data +bar: .asciz "XYZZY" +bar2: .long 0xdeadbeef + + .text + .space 0xF00,0 + +foo: + add r1,r0,r0 + ld2w r60, @(r0,longzero) + add r62,r0,r0 + bsr.s exit + bsr.s foo + bra.s cont2 + bra.s cont2 + bsr.s exit + jmp.s exit + jmp.s exit + jmp.s exit + bsr exit + jmp exit + +longzero: + .quad 0 + + .text +exit: + jmp r62 diff --git a/gas/testsuite/gas/d30v/serial.l b/gas/testsuite/gas/d30v/serial.l new file mode 100644 index 0000000..f7a5a67 --- /dev/null +++ b/gas/testsuite/gas/d30v/serial.l @@ -0,0 +1,46 @@ +.*: Assembler messages: +.*:6: Error: Unable to mix instructions as specified +.*:7: Error: Unable to mix instructions as specified +.*:8: Error: Unable to mix instructions as specified +.*:9: Error: Unable to mix instructions as specified +GAS LISTING .* + + + 1 # serial.s + 2 # + 3 # In the following examples, the right-subinstructions + 4 # will never be executed. GAS should detect this. + 5 + 6 \?\?\?\? 000000F0 trap r21 -> add r2, r0, r0 ; right instruction will never be executed. +\*\*\*\* Error:Unable to mix instructions as specified + 6 000000F0 + 6 000000F0 + 6 00000090 + 6 001500F0 + 7 \?\?\?\? 08002000 dbt -> add r2, r0, r0 ; ditto +\*\*\*\* Error:Unable to mix instructions as specified + 7 00F00000 + 7 00B00000 + 7 00F00000 + 8 \?\?\?\? 08002000 rtd -> add r2, r0, r0 ; ditto +\*\*\*\* Error:Unable to mix instructions as specified + 8 00F00000 + 8 00A00000 + 8 00F00000 + 9 \?\?\?\? 08002000 reit -> add r2, r0, r0 ; ditto +\*\*\*\* Error:Unable to mix instructions as specified + 9 00F00000 + 9 00800000 + 9 00F00000 + 10 \?\?\?\? 08002000 mvtsys psw, r1 -> add r2, r0, r0 ; OK + 10 00F00000 + 10 00E00040 + 10 88002000 + 11 \?\?\?\? 00E00042 mvtsys pswh, r1 -> add r2, r0, r0 ; OK + 11 88002000 + 12 \?\?\?\? 00E00041 mvtsys pswl, r1 -> add r2, r0, r0 ; OK + 12 88002000 + 13 \?\?\?\? 00E00043 mvtsys f0, r1 -> add r2, r0, r0 ; OK + 13 88002000 + 14 \?\?\?\? 00E0A040 mvtsys mod_s, r1 -> add r2, r0, r0 ; OK + 14 88002000 diff --git a/gas/testsuite/gas/d30v/serial.s b/gas/testsuite/gas/d30v/serial.s new file mode 100644 index 0000000..0995d63 --- /dev/null +++ b/gas/testsuite/gas/d30v/serial.s @@ -0,0 +1,14 @@ +# serial.s +# +# In the following examples, the right-subinstructions +# will never be executed. GAS should detect this. + + trap r21 -> add r2, r0, r0 ; right instruction will never be executed. + dbt -> add r2, r0, r0 ; ditto + rtd -> add r2, r0, r0 ; ditto + reit -> add r2, r0, r0 ; ditto + mvtsys psw, r1 -> add r2, r0, r0 ; OK + mvtsys pswh, r1 -> add r2, r0, r0 ; OK + mvtsys pswl, r1 -> add r2, r0, r0 ; OK + mvtsys f0, r1 -> add r2, r0, r0 ; OK + mvtsys mod_s, r1 -> add r2, r0, r0 ; OK diff --git a/gas/testsuite/gas/d30v/serial2.l b/gas/testsuite/gas/d30v/serial2.l new file mode 100644 index 0000000..2de04dc --- /dev/null +++ b/gas/testsuite/gas/d30v/serial2.l @@ -0,0 +1,138 @@ +.*: Assembler messages: +.*:5: Error: Unable to mix instructions as specified +.*:6: Error: Unable to mix instructions as specified +.*:8: Error: Unable to mix instructions as specified +.*:9: Error: Unable to mix instructions as specified +.*:11: Error: Unable to mix instructions as specified +.*:12: Error: Unable to mix instructions as specified +.*:13: Error: Unable to mix instructions as specified +.*:14: Error: Unable to mix instructions as specified +.*:16: Error: Unable to mix instructions as specified +.*:17: Error: Unable to mix instructions as specified +.*:18: Error: Unable to mix instructions as specified +.*:19: Error: Unable to mix instructions as specified +.*:21: Error: Unable to mix instructions as specified +.*:22: Error: Unable to mix instructions as specified +.*:23: Error: Unable to mix instructions as specified +.*:24: Error: Unable to mix instructions as specified +.*:26: Error: Unable to mix instructions as specified +.*:27: Error: Unable to mix instructions as specified +.*:28: Error: Unable to mix instructions as specified +.*:29: Error: Unable to mix instructions as specified +GAS LISTING .* + + + 1 # D30V serial execution test + 2 + 3 .text + 4 + 5 \?\?\?\? 000000F0 bra -3 -> add r3,r0,0 ; Invalid +\*\*\*\* Error:Unable to mix instructions as specified + 5 000000F0 + 5 000000F0 + 5 0000000B + 5 FFFF00F0 + 6 \?\?\?\? 08083000 bsr -3 -> add r3,r0,0 ; Invalid +\*\*\*\* Error:Unable to mix instructions as specified + 6 00F00000 + 6 002BFFFF + 6 00F00000 + 7 + 8 \?\?\?\? 08083000 bra/tx -3 -> add r3,r0,0 ; Valid +\*\*\*\* Error:Unable to mix instructions as specified + 8 00F00000 + 8 100BFFFF + 8 00F00000 + 9 \?\?\?\? 08083000 bsr/tx -3 -> add r3,r0,0 ; Valid +\*\*\*\* Error:Unable to mix instructions as specified + 9 00F00000 + 9 102BFFFF + 9 00F00000 + 10 + 11 \?\?\?\? 08083000 bsr -3 -> bsr -10 ; Invalid +\*\*\*\* Error:Unable to mix instructions as specified + 11 00F00000 + 11 002BFFFF + 11 00F00000 + 12 \?\?\?\? 002BFFFE bsr -3 -> bsr/xt -10 ; Invalid +\*\*\*\* Error:Unable to mix instructions as specified + 12 00F00000 + 12 002BFFFF + 12 00F00000 + 13 \?\?\?\? 302BFFFE bsr/tx -3 -> bsr -10 ; Valid +\*\*\*\* Error:Unable to mix instructions as specified + 13 00F00000 + 13 102BFFFF + 13 00F00000 + 14 \?\?\?\? 002BFFFE bsr/tx -3 -> bsr/fx -10 ; Valid +\*\*\*\* Error:Unable to mix instructions as specified + 14 00F00000 + 14 102BFFFF + 14 00F00000 + 15 + 16 \?\?\?\? 202BFFFE bra -3 -> bra 10 ; Invalid +\*\*\*\* Error:Unable to mix instructions as specified + 16 00F00000 + 16 000BFFFF + 16 00F00000 + 17 \?\?\?\? 00080001 bra -3 -> bra/tx 10 ; Invalid +\*\*\*\* Error:Unable to mix instructions as specified + 17 00F00000 + 17 000BFFFF + GAS LISTING .* + + + 17 00F00000 + 18 \?\?\?\? 10080001 bra/tx -3 -> bra 10 ; Valid +\*\*\*\* Error:Unable to mix instructions as specified + 18 00F00000 + 18 100BFFFF + 18 00F00000 + 19 \?\?\?\? 00080001 bra/tx -3 -> bra/fx 10 ; Valid +\*\*\*\* Error:Unable to mix instructions as specified + 19 00F00000 + 19 100BFFFF + 19 00F00000 + 20 + 21 \?\?\?\? 20080001 bsr -3 -> bra 10 ; Invalid +\*\*\*\* Error:Unable to mix instructions as specified + 21 00F00000 + 21 002BFFFF + 21 00F00000 + 22 \?\?\?\? 00080001 bsr -3 -> bra/tx 10 ; Invalid +\*\*\*\* Error:Unable to mix instructions as specified + 22 00F00000 + 22 002BFFFF + 22 00F00000 + 23 \?\?\?\? 10080001 bsr/tx -3 -> bra 10 ; Valid +\*\*\*\* Error:Unable to mix instructions as specified + 23 00F00000 + 23 102BFFFF + 23 00F00000 + 24 \?\?\?\? 00080001 bsr/tx -3 -> bra/fx 10 ; Valid +\*\*\*\* Error:Unable to mix instructions as specified + 24 00F00000 + 24 102BFFFF + 24 00F00000 + 25 + 26 \?\?\?\? 20080001 bra -3 -> bsr 10 ; Invalid +\*\*\*\* Error:Unable to mix instructions as specified + 26 00F00000 + 26 000BFFFF + 26 00F00000 + 27 \?\?\?\? 00280001 bra -3 -> bsr/tx 10 ; Invalid +\*\*\*\* Error:Unable to mix instructions as specified + 27 00F00000 + 27 000BFFFF + 27 00F00000 + 28 \?\?\?\? 10280001 bra/tx -3 -> bsr 10 ; Valid +\*\*\*\* Error:Unable to mix instructions as specified + 28 00F00000 + 28 100BFFFF + 28 00F00000 + 29 \?\?\?\? 00280001 bra/tx -3 -> bsr/fx 10 ; Valid +\*\*\*\* Error:Unable to mix instructions as specified + 29 00F00000 + 29 100BFFFF + 29 00F00000 + 29 20280001 diff --git a/gas/testsuite/gas/d30v/serial2.s b/gas/testsuite/gas/d30v/serial2.s new file mode 100644 index 0000000..0453159 --- /dev/null +++ b/gas/testsuite/gas/d30v/serial2.s @@ -0,0 +1,29 @@ +# D30V serial execution test + + .text + + bra -3 -> add r3,r0,0 ; Invalid + bsr -3 -> add r3,r0,0 ; Invalid + + bra/tx -3 -> add r3,r0,0 ; Valid + bsr/tx -3 -> add r3,r0,0 ; Valid + + bsr -3 -> bsr -10 ; Invalid + bsr -3 -> bsr/xt -10 ; Invalid + bsr/tx -3 -> bsr -10 ; Valid + bsr/tx -3 -> bsr/fx -10 ; Valid + + bra -3 -> bra 10 ; Invalid + bra -3 -> bra/tx 10 ; Invalid + bra/tx -3 -> bra 10 ; Valid + bra/tx -3 -> bra/fx 10 ; Valid + + bsr -3 -> bra 10 ; Invalid + bsr -3 -> bra/tx 10 ; Invalid + bsr/tx -3 -> bra 10 ; Valid + bsr/tx -3 -> bra/fx 10 ; Valid + + bra -3 -> bsr 10 ; Invalid + bra -3 -> bsr/tx 10 ; Invalid + bra/tx -3 -> bsr 10 ; Valid + bra/tx -3 -> bsr/fx 10 ; Valid diff --git a/gas/testsuite/gas/d30v/serial2O.l b/gas/testsuite/gas/d30v/serial2O.l new file mode 100644 index 0000000..d9eb05c --- /dev/null +++ b/gas/testsuite/gas/d30v/serial2O.l @@ -0,0 +1,99 @@ +.*: Assembler messages: +.*:5: Error: Unable to mix instructions as specified +.*:6: Error: Unable to mix instructions as specified +.*:11: Error: Unable to mix instructions as specified +.*:12: Error: Unable to mix instructions as specified +.*:16: Error: Unable to mix instructions as specified +.*:17: Error: Unable to mix instructions as specified +.*:21: Error: Unable to mix instructions as specified +.*:22: Error: Unable to mix instructions as specified +.*:26: Error: Unable to mix instructions as specified +.*:27: Error: Unable to mix instructions as specified +GAS LISTING .* + + + 1 # D30V serial execution test + 2 + 3 .text + 4 + 5 \?\?\?\? 000000F0 bra -3 -> add r3,r0,0 ; Invalid +\*\*\*\* Error:Unable to mix instructions as specified + 5 000000F0 + 5 000000F0 + 5 0000000B + 5 FFFF00F0 + 6 \?\?\?\? 08083000 bsr -3 -> add r3,r0,0 ; Invalid +\*\*\*\* Error:Unable to mix instructions as specified + 6 00F00000 + 6 002BFFFF + 6 00F00000 + 7 + 8 \?\?\?\? 08083000 bra/tx -3 -> add r3,r0,0 ; Valid + 8 00F00000 + 8 100BFFFF + 8 88083000 + 9 \?\?\?\? 102BFFFF bsr/tx -3 -> add r3,r0,0 ; Valid + 9 88083000 + 10 + 11 \?\?\?\? 002BFFFF bsr -3 -> bsr -10 ; Invalid +\*\*\*\* Error:Unable to mix instructions as specified + 11 00F00000 + 12 \?\?\?\? 002BFFFE bsr -3 -> bsr/xt -10 ; Invalid +\*\*\*\* Error:Unable to mix instructions as specified + 12 00F00000 + 12 002BFFFF + 12 00F00000 + 13 \?\?\?\? 302BFFFE bsr/tx -3 -> bsr -10 ; Valid + 13 00F00000 + 13 102BFFFF + 13 802BFFFE + 14 \?\?\?\? 102BFFFF bsr/tx -3 -> bsr/fx -10 ; Valid + 14 A02BFFFE + 15 + 16 \?\?\?\? 000BFFFF bra -3 -> bra 10 ; Invalid +\*\*\*\* Error:Unable to mix instructions as specified + 16 00F00000 + 17 \?\?\?\? 00080001 bra -3 -> bra/tx 10 ; Invalid +\*\*\*\* Error:Unable to mix instructions as specified + 17 00F00000 + 17 000BFFFF + 17 00F00000 + 18 \?\?\?\? 10080001 bra/tx -3 -> bra 10 ; Valid + 18 00F00000 + 18 100BFFFF + 18 80080001 + 19 \?\?\?\? 100BFFFF bra/tx -3 -> bra/fx 10 ; Valid + 19 A0080001 + 20 + 21 \?\?\?\? 002BFFFF bsr -3 -> bra 10 ; Invalid +\*\*\*\* Error:Unable to mix instructions as specified + 21 00F00000 + 22 \?\?\?\? 00080001 bsr -3 -> bra/tx 10 ; Invalid + GAS LISTING .* + + +\*\*\*\* Error:Unable to mix instructions as specified + 22 00F00000 + 22 002BFFFF + 22 00F00000 + 23 \?\?\?\? 10080001 bsr/tx -3 -> bra 10 ; Valid + 23 00F00000 + 23 102BFFFF + 23 80080001 + 24 \?\?\?\? 102BFFFF bsr/tx -3 -> bra/fx 10 ; Valid + 24 A0080001 + 25 + 26 \?\?\?\? 000BFFFF bra -3 -> bsr 10 ; Invalid +\*\*\*\* Error:Unable to mix instructions as specified + 26 00F00000 + 27 \?\?\?\? 00280001 bra -3 -> bsr/tx 10 ; Invalid +\*\*\*\* Error:Unable to mix instructions as specified + 27 00F00000 + 27 000BFFFF + 27 00F00000 + 28 \?\?\?\? 10280001 bra/tx -3 -> bsr 10 ; Valid + 28 00F00000 + 28 100BFFFF + 28 80280001 + 29 \?\?\?\? 100BFFFF bra/tx -3 -> bsr/fx 10 ; Valid + 29 A0280001 diff --git a/gas/testsuite/gas/d30v/serial2O.s b/gas/testsuite/gas/d30v/serial2O.s new file mode 100644 index 0000000..0453159 --- /dev/null +++ b/gas/testsuite/gas/d30v/serial2O.s @@ -0,0 +1,29 @@ +# D30V serial execution test + + .text + + bra -3 -> add r3,r0,0 ; Invalid + bsr -3 -> add r3,r0,0 ; Invalid + + bra/tx -3 -> add r3,r0,0 ; Valid + bsr/tx -3 -> add r3,r0,0 ; Valid + + bsr -3 -> bsr -10 ; Invalid + bsr -3 -> bsr/xt -10 ; Invalid + bsr/tx -3 -> bsr -10 ; Valid + bsr/tx -3 -> bsr/fx -10 ; Valid + + bra -3 -> bra 10 ; Invalid + bra -3 -> bra/tx 10 ; Invalid + bra/tx -3 -> bra 10 ; Valid + bra/tx -3 -> bra/fx 10 ; Valid + + bsr -3 -> bra 10 ; Invalid + bsr -3 -> bra/tx 10 ; Invalid + bsr/tx -3 -> bra 10 ; Valid + bsr/tx -3 -> bra/fx 10 ; Valid + + bra -3 -> bsr 10 ; Invalid + bra -3 -> bsr/tx 10 ; Invalid + bra/tx -3 -> bsr 10 ; Valid + bra/tx -3 -> bsr/fx 10 ; Valid diff --git a/gas/testsuite/gas/d30v/warn_oddreg.l b/gas/testsuite/gas/d30v/warn_oddreg.l new file mode 100644 index 0000000..f1fb43c --- /dev/null +++ b/gas/testsuite/gas/d30v/warn_oddreg.l @@ -0,0 +1,40 @@ +.*: Assembler messages: +.*:5: Warning: Odd numbered register used as target of multi-register instruction +.*:6: Warning: Odd numbered register used as target of multi-register instruction +.*:7: Warning: Odd numbered register used as target of multi-register instruction +.*:8: Warning: Odd numbered register used as target of multi-register instruction +.*:9: Warning: Odd numbered register used as target of multi-register instruction +.*:10: Warning: Odd numbered register used as target of multi-register instruction +.*:11: Warning: Odd numbered register used as target of multi-register instruction +.*:12: Warning: Odd numbered register used as target of multi-register instruction +GAS LISTING .* + + + 1 # GAS should print a warning when an odd register is used as a target + 2 # of multi-word instructions: ld2w, ld4bh, ld4bhu, ld2h, st2w, st4hb, st2h, + 3 # and mulx2h + 4 + 5 0000 05681000 st2w r1, @(r0, 0) || nop +.* Warning:Odd numbered register used as target of multi-register instruction + 5 00F00000 + 6 0008 04681000 ld2w r1, @(r0, 0) || nop +.* Warning:Odd numbered register used as target of multi-register instruction + 6 00F00000 + 7 0010 04581000 ld4bh r1, @(r0, 0) || nop +.* Warning:Odd numbered register used as target of multi-register instruction + 7 00F00000 + 8 0018 04D81000 ld4bhu r1, @(r0, 0) || nop +.* Warning:Odd numbered register used as target of multi-register instruction + 8 00F00000 + 9 0020 04381000 ld2h r1, @(r0, 0) || nop +.* Warning:Odd numbered register used as target of multi-register instruction + 9 00F00000 + 10 0028 05581000 st4hb r1, @(r0, 0) || nop +.* Warning:Odd numbered register used as target of multi-register instruction + 10 00F00000 + 11 0030 05381000 st2h r1, @(r0, 0) || nop +.* Warning:Odd numbered register used as target of multi-register instruction + 11 00F00000 + 12 0038 00F00000 nop || mulx2h r1, r5, r6 +.* Warning:Odd numbered register used as target of multi-register instruction + 12 0A101146 diff --git a/gas/testsuite/gas/d30v/warn_oddreg.s b/gas/testsuite/gas/d30v/warn_oddreg.s new file mode 100644 index 0000000..c09f750 --- /dev/null +++ b/gas/testsuite/gas/d30v/warn_oddreg.s @@ -0,0 +1,12 @@ +# GAS should print a warning when an odd register is used as a target +# of multi-word instructions: ld2w, ld4bh, ld4bhu, ld2h, st2w, st4hb, st2h, +# and mulx2h + +st2w r1, @(r0, 0) || nop +ld2w r1, @(r0, 0) || nop +ld4bh r1, @(r0, 0) || nop +ld4bhu r1, @(r0, 0) || nop +ld2h r1, @(r0, 0) || nop +st4hb r1, @(r0, 0) || nop +st2h r1, @(r0, 0) || nop +nop || mulx2h r1, r5, r6 diff --git a/gas/testsuite/gas/fr30/allinsn.d b/gas/testsuite/gas/fr30/allinsn.d new file mode 100644 index 0000000..2bac763 --- /dev/null +++ b/gas/testsuite/gas/fr30/allinsn.d @@ -0,0 +1,440 @@ +#as: +#objdump: -dr +#name: allinsn + +.*: +file format .* + +Disassembly of section .text: + +0+0000 <add>: + 0: a6 01 add r0,r1 + 2: a4 02 add 0x0,r2 + +0+0004 <add2>: + 4: a5 f3 add2 -1,r3 + +0+0006 <addc>: + 6: a7 45 addc r4,r5 + +0+0008 <addn>: + 8: a2 67 addn r6,r7 + a: a0 f8 addn 0xf,r8 + +0+000c <addn2>: + c: a1 09 addn2 -16,r9 + +0+000e <sub>: + e: ac ab sub r10,r11 + +0+0010 <subc>: + 10: ad cd subc r12,r13 + +0+0012 <subn>: + 12: ae ef subn r14,r15 + +0+0014 <cmp>: + 14: aa de cmp r13,r14 + 16: a8 1f cmp 0x1,r15 + +0+0018 <cmp2>: + 18: a9 10 cmp2 -15,r0 + +0+001a <and>: + 1a: 82 12 and r1,r2 + 1c: 84 34 and r3,@r4 + +0+001e <andh>: + 1e: 85 56 andh r5,@r6 + +0+0020 <andb>: + 20: 86 78 andb r7,@r8 + +0+0022 <or>: + 22: 92 9a or r9,r10 + 24: 94 bc or r11,@r12 + +0+0026 <orh>: + 26: 95 de orh r13,@r14 + +0+0028 <orb>: + 28: 96 fd orb r15,@r13 + +0+002a <eor>: + 2a: 9a ef eor r14,r15 + 2c: 9c 01 eor r0,@r1 + +0+002e <eorh>: + 2e: 9d 23 eorh r2,@r3 + +0+0030 <eorb>: + 30: 9e 45 eorb r4,@r5 + +0+0032 <bandl>: + 32: 80 f6 bandl 0xf,@r6 + +0+0034 <nadh>: + 34: 81 77 bandh 0x7,@r7 + +0+0036 <borl>: + 36: 90 38 borl 0x3,@r8 + +0+0038 <borh>: + 38: 91 d9 borh 0xd,@r9 + +0+003a <beorl>: + 3a: 98 fa beorl 0xf,@r10 + +0+003c <beorh>: + 3c: 99 1b beorh 0x1,@r11 + +0+003e <btstl>: + 3e: 88 0c btstl 0x0,@r12 + +0+0040 <btsth>: + 40: 89 8d btsth 0x8,@r13 + +0+0042 <mul>: + 42: af ef mul r14,r15 + +0+0044 <mulu>: + 44: ab de mulu r13,r14 + +0+0046 <muluh>: + 46: bb f0 muluh r15,r0 + +0+0048 <mulh>: + 48: bf 12 mulh r1,r2 + +0+004a <div0s>: + 4a: 97 43 div0s r3 + +0+004c <div0u>: + 4c: 97 54 div0u r4 + +0+004e <div1>: + 4e: 97 65 div1 r5 + +0+0050 <div2>: + 50: 97 76 div2 r6 + +0+0052 <div3>: + 52: 9f 60 div3 + +0+0054 <div4s>: + 54: 9f 70 div4s + +0+0056 <lsl>: + 56: b6 78 lsl r7,r8 + 58: b4 39 lsl 0x3,r9 + +0+005a <lsl2>: + 5a: b5 0a lsl2 0x0,r10 + +0+005c <lsr>: + 5c: b2 bc lsr r11,r12 + 5e: b0 fd lsr 0xf,r13 + +0+0060 <lsr2>: + 60: b1 fe lsr2 0xf,r14 + +0+0062 <asr>: + 62: ba fd asr r15,r13 + 64: b8 6e asr 0x6,r14 + +0+0066 <asr2>: + 66: b9 7f asr2 0x7,r15 + +0+0068 <ldi_8>: + 68: cf f2 ldi:8 0xff,r2 + +0+006a <ld>: + 6a: 04 34 ld @r3,r4 + 6c: 00 56 ld @\(r13,r5\),r6 + 6e: 27 f7 ld @\(r14,508\),r7 + 70: 03 f8 ld @\(r15,0x3c\),r8 + 72: 07 09 ld @r15\+,r9 + 74: 07 90 ld @r15\+,ps + 76: 07 80 ld @r15\+,tbr + 78: 07 81 ld @r15\+,rp + 7a: 07 82 ld @r15\+,ssp + +0+007c <lduh>: + 7c: 05 ab lduh @r10,r11 + 7e: 01 cd lduh @\(r13,r12\),r13 + 80: 48 0f lduh @\(r14,-256\),r15 + +0+0082 <ldub>: + 82: 06 de ldub @r13,r14 + 84: 02 f0 ldub @\(r13,r15\),r0 + 86: 68 01 ldub @\(r14,-128\),r1 + +0+0088 <st>: + 88: 14 32 st r2,@r3 + 8a: 10 54 st r4,@\(r13,r5\) + 8c: 38 06 st r6,@\(r14,-512\) + 8e: 13 f7 st r7,@\(r15,0x3c\) + 90: 17 08 st r8,@-r15 + 92: 17 84 st mdh,@-r15 + 94: 17 90 st ps,@-r15 + +0+0096 <sth>: + 96: 15 a9 sth r9,@r10 + 98: 11 cb sth r11,@\(r13,r12\) + 9a: 54 0d sth r13,@\(r14,128\) + +0+009c <stb>: + 9c: 16 fe stb r14,@r15 + 9e: 12 10 stb r0,@\(r13,r1\) + a0: 78 02 stb r2,@\(r14,-128\) + +0+00a2 <mov>: + a2: 8b 34 mov r3,r4 + a4: b7 55 mov mdl,r5 + a6: 17 16 mov ps,r6 + a8: b3 37 mov r7,usp + aa: 07 18 mov r8,ps + +0+00ac <jmp>: + ac: 97 09 jmp @r9 + +0+00ae <ret>: + ae: 97 20 ret + +0+00b0 <bra>: + b0: e0 a7 bra 0 \<add\> + +0+00b2 <bno>: + b2: e1 a6 bno 0 \<add\> + +0+00b4 <beq>: + b4: e2 a5 beq 0 \<add\> + +0+00b6 <bne>: + b6: e3 a4 bne 0 \<add\> + +0+00b8 <bc>: + b8: e4 a3 bc 0 \<add\> + +0+00ba <bnc>: + ba: e5 a2 bnc 0 \<add\> + +0+00bc <bn>: + bc: e6 a1 bn 0 \<add\> + +0+00be <bp>: + be: e7 a0 bp 0 \<add\> + +0+00c0 <bv>: + c0: e8 9f bv 0 \<add\> + +0+00c2 <bnv>: + c2: e9 9e bnv 0 \<add\> + +0+00c4 <blt>: + c4: ea 9d blt 0 \<add\> + +0+00c6 <bge>: + c6: eb 9c bge 0 \<add\> + +0+00c8 <ble>: + c8: ec 9b ble 0 \<add\> + +0+00ca <bgt>: + ca: ed 9a bgt 0 \<add\> + +0+00cc <bls>: + cc: ee 99 bls 0 \<add\> + +0+00ce <bhi>: + ce: ef 98 bhi 0 \<add\> + +0+00d0 <jmp_d>: + d0: 9f 0b jmp:d @r11 + d2: 9f a0 nop + +0+00d4 <ret_d>: + d4: 9f 20 ret:d + d6: 9f a0 nop + +0+00d8 <bra_d>: + d8: f0 fb bra:d d0 \<jmp_d\> + da: 9f a0 nop + +0+00dc <bno_d>: + dc: f1 f9 bno:d d0 \<jmp_d\> + de: 9f a0 nop + +0+00e0 <beq_d>: + e0: f2 f7 beq:d d0 \<jmp_d\> + e2: 9f a0 nop + +0+00e4 <bne_d>: + e4: f3 f5 bne:d d0 \<jmp_d\> + e6: 9f a0 nop + +0+00e8 <bc_d>: + e8: f4 f3 bc:d d0 \<jmp_d\> + ea: 9f a0 nop + +0+00ec <bnc_d>: + ec: f5 f1 bnc:d d0 \<jmp_d\> + ee: 9f a0 nop + +0+00f0 <bn_d>: + f0: f6 ef bn:d d0 \<jmp_d\> + f2: 9f a0 nop + +0+00f4 <bp_d>: + f4: f7 ed bp:d d0 \<jmp_d\> + f6: 9f a0 nop + +0+00f8 <bv_d>: + f8: f8 eb bv:d d0 \<jmp_d\> + fa: 9f a0 nop + +0+00fc <bnv_d>: + fc: f9 e9 bnv:d d0 \<jmp_d\> + fe: 9f a0 nop + +0+0100 <blt_d>: + 100: fa e7 blt:d d0 \<jmp_d\> + 102: 9f a0 nop + +0+0104 <bge_d>: + 104: fb e5 bge:d d0 \<jmp_d\> + 106: 9f a0 nop + +0+0108 <ble_d>: + 108: fc e3 ble:d d0 \<jmp_d\> + 10a: 9f a0 nop + +0+010c <bgt_d>: + 10c: fd e1 bgt:d d0 \<jmp_d\> + 10e: 9f a0 nop + +0+0110 <bls_d>: + 110: fe df bls:d d0 \<jmp_d\> + 112: 9f a0 nop + +0+0114 <bhi_d>: + 114: ff dd bhi:d d0 \<jmp_d\> + 116: 9f a0 nop + +0+0118 <ldres>: + 118: bc 82 ldres @r2\+,0x8 + +0+011a <stres>: + 11a: bd f3 stres 0xf,@r3\+ + +0+011c <nop>: + 11c: 9f a0 nop + +0+011e <andccr>: + 11e: 83 ff andccr 0xff + +0+0120 <orccr>: + 120: 93 7d orccr 0x7d + +0+0122 <stilm>: + 122: 87 61 stilm 0x61 + +0+0124 <addsp>: + 124: a3 80 addsp -512 + +0+0126 <extsb>: + 126: 97 89 extsb r9 + +0+0128 <extub>: + 128: 97 9a extub r10 + +0+012a <extsh>: + 12a: 97 ab extsh r11 + +0+012c <extuh>: + 12c: 97 bc extuh r12 + +0+012e <enter>: + 12e: 0f ff enter 0x3fc + +0+0130 <leave>: + 130: 9f 90 leave + +0+0132 <xchb>: + 132: 8a ef xchb @r14,r15 + +0+0134 <ldi_32>: + 134: 9f 80 12 34 ldi:32 0x12345678,r0 + 138: 56 78 + +0+013a <copop>: + 13a: 9f cf 01 34 copop 0xf,0x1,cr3,cr4 + 13e: 9f cf 04 56 copop 0xf,0x4,cr5,cr6 + 142: 9f cf ff 70 copop 0xf,0xff,cr7,cr0 + +0+0146 <copld>: + 146: 9f d0 00 40 copld 0x0,0x0,r4,cr0 + +0+014a <copst>: + 14a: 9f e7 02 15 copst 0x7,0x2,cr1,r5 + +0+014e <copsv>: + 14e: 9f f8 03 26 copsv 0x8,0x3,cr2,r6 + +0+0152 <ldm0>: + 152: 8c 8d ldm0 \(r0,r2,r3,r7\) + +0+0154 <ldm1>: + 154: 8d 89 ldm1 \(r8,r11,r15\) + +0+0156 <stm0>: + 156: 8e 30 stm0 \(r2,r3\) + +0+0158 <stm1>: + 158: 8f 06 stm1 \(r13,r14\) + +0+015a <call>: + 15a: d7 52 call 0 \<add\> + 15c: 97 1a call @r10 + +0+015e <call_d>: + 15e: df 50 call:d 0 \<add\> + 160: 9f a0 nop + 162: 9f 1c call:d @r12 + 164: 9f a0 nop + +0+0166 <dmov>: + 166: 08 22 dmov @0x88,r13 + 168: 18 15 dmov r13,@0x54 + 16a: 0c 11 dmov @0x44,@r13\+ + 16c: 1c 00 dmov @r13\+,@0x0 + 16e: 0b 0b dmov @0x2c,@-r15 + 170: 1b 09 dmov @r15\+,@0x24 + +0+0172 <dmovh>: + 172: 09 44 dmovh @0x88,r13 + 174: 19 29 dmovh r13,@0x52 + 176: 0d 1a dmovh @0x34,@r13\+ + 178: 1d 29 dmovh @r13\+,@0x52 + +0+017a <dmovb>: + 17a: 0a 91 dmovb @0x91,r13 + 17c: 1a 53 dmovb r13,@0x53 + 17e: 0e 47 dmovb @0x47,@r13\+ + 180: 1e 00 dmovb @r13\+,@0x0 + +0+0182 <ldi_20>: + 182: 9b f1 ff ff ldi:20 0xfffff,r1 + +0+0186 <finish>: + 186: 9f 80 00 00 ldi:32 0x8000,r0 + 18a: 80 00 + 18c: b3 20 mov r0,ssp + 18e: 9f 80 00 00 ldi:32 0x1,r0 + 192: 00 01 + 194: 1f 0a int 0xa + +0+0196 <inte>: + 196: 9f 30 inte + +0+0198 <reti>: + 198: 97 30 reti diff --git a/gas/testsuite/gas/fr30/allinsn.exp b/gas/testsuite/gas/fr30/allinsn.exp new file mode 100644 index 0000000..eccfe18 --- /dev/null +++ b/gas/testsuite/gas/fr30/allinsn.exp @@ -0,0 +1,5 @@ +# FR30 assembler testsuite. + +if [istarget fr30*-*-*] { + run_dump_test "allinsn" +} diff --git a/gas/testsuite/gas/fr30/allinsn.s b/gas/testsuite/gas/fr30/allinsn.s new file mode 100644 index 0000000..683d24a --- /dev/null +++ b/gas/testsuite/gas/fr30/allinsn.s @@ -0,0 +1,434 @@ + .data +foodata: .word 42 + .text +footext: + .global add +add: + add r0, r1 + add #0, r2 + .global add2 +add2: + add2 #-1, r3 + .global addc +addc: + addc r4, r5 + .global addn +addn: + addn r6, r7 + addn #15, r8 + .global addn2 +addn2: + addn2 #-16, r9 + .global sub +sub: + sub r10, r11 + .global subc +subc: + subc r12, r13 + .global subn +subn: + subn r14, r15 + .global cmp +cmp: + cmp ac, fp + cmp #1, sp + .global cmp2 +cmp2: + cmp2 #-15, r0 + .global and +and: + and r1, r2 + and r3, @r4 + .global andh +andh: + andh r5, @r6 + .global andb +andb: + andb r7, @r8 + .global or +or: + or r9, r10 + or r11, @r12 + .global orh +orh: + orh r13, @r14 + .global orb +orb: + orb r15, @ac + .global eor +eor: + eor fp, sp + eor r0, @r1 + .global eorh +eorh: + eorh r2, @r3 + .global eorb +eorb: + eorb r4, @r5 + .global bandl +bandl: + bandl #15, @r6 + .global bandh +nadh: + bandh #7, @r7 + .global borl +borl: + borl #3, @r8 + .global borh +borh: + borh #13, @r9 + .global beorl +beorl: + beorl #15, @r10 + .global beorh +beorh: + beorh #1, @r11 + .global btstl +btstl: + btstl #0, @r12 + .global btsth +btsth: + btsth #8, @r13 + .global mul +mul: + mul r14, r15 + .global mulu +mulu: + mulu ac, fp + .global muluh +muluh: + muluh sp, r0 + .global mulh +mulh: + mulh r1, r2 + .global div0s +div0s: + div0s r3 + .global div0u +div0u: + div0u r4 + .global div1 +div1: + div1 r5 + .global div2 +div2: + div2 r6 + .global div3 +div3: + div3 + .global div4s +div4s: + div4s + .global lsl +lsl: + lsl r7, r8 + lsl #3, r9 + .global lsl2 +lsl2: + lsl2 #0, r10 + .global lsr +lsr: + lsr r11, r12 + lsr #15, r13 + .global lsr2 +lsr2: + lsr2 #15, r14 + .global asr +asr: + asr r15, ac + asr #6, fp + .global asr2 +asr2: + asr2 #7, sp + .global ldi_8 +ldi_8: + ldi:8 #0xff, r2 + .global ld +ld: + ld @r3, r4 + ld @(R13, r5), r6 + ld @(R14, 0x1fc), r7 + ld @(R15, 0x3c), r8 + ld @r15+, r9 + ld @r15+, ps + ld @R15+, tbr + ld @r15+, rp + ld @R15+, ssp + .global lduh +lduh: + lduh @r10, r11 + lduh @(r13, r12), r13 + lduh @(r14, #-256), r15 + .global ldub +ldub: + ldub @ac, fp + ldub @(r13, sp), r0 + ldub @(r14, -128), r1 + .global st +st: + st r2, @r3 + st r4, @(r13, r5) + st r6, @(r14, -512) + st r7, @(r15, 0x3c) + st r8, @ - r15 + st MDH, @-r15 + st PS, @ - r15 + .global lsth +sth: + sth r9, @r10 + sth r11, @(r13, r12) + sth r13, @(r14, 128) + .global stb +stb: + STB r14, @r15 + stb r0, @(r13, r1) + STB r2, @(r14, -128) + .global mov +mov: + mov r3, r4 + MOV mdl, r5 + mov ps, r6 + mov r7, usp + mov r8, ps + .global jmp +jmp: + jmp @r9 + .global ret +ret: + ret + .global bra +bra: + bra footext + .global bno +bno: + bno footext + .global beq +beq: + beq footext + .global bne +bne: + bne footext + .global bc +bc: + bc footext + .global bnc +bnc: + bnc footext + .global bn +bn: + bn footext + .global bp +bp: + bp footext + .global bv +bv: + bv footext + .global bnv +bnv: + bnv footext + .global blt +blt: + blt footext + .global bge +bge: + bge footext + .global ble +ble: + ble footext + .global bgt +bgt: + bgt footext + .global bls +bls: + bls footext + .global bhi +bhi: + bhi footext +delay_footext: + .global jmp_d +jmp_d: + jmp:d @r11 + nop + .global ret_d +ret_d: + ret:d + nop + .global bra_d +bra_d: + bra:D delay_footext + nop + .global bno_d +bno_d: + bno:d delay_footext + nop + .global beq_d +beq_d: + beq:D delay_footext + nop + .global bne_d +bne_d: + bne:d delay_footext + nop + .global bc_d +bc_d: + bc:d delay_footext + nop + .global bnc_d +bnc_d: + bnc:d delay_footext + nop + .global bn_d +bn_d: + bn:d delay_footext + nop + .global bp_d +bp_d: + bp:d delay_footext + nop + .global bv_d +bv_d: + bv:d delay_footext + nop + .global bnv_d +bnv_d: + bnv:d delay_footext + nop + .global blt_d +blt_d: + blt:d delay_footext + nop + .global bge_d +bge_d: + bge:d delay_footext + nop + .global ble_d +ble_d: + ble:d delay_footext + nop + .global bgt_d +bgt_d: + bgt:d delay_footext + nop + .global bls_d +bls_d: + bls:d delay_footext + nop + .global bhi_d +bhi_d: + bhi:d delay_footext + nop + .global ldres +ldres: + ldres @r2+, #8 + .global stres +stres: + stres #15, @r3+ + .global nop +nop: + nop + .global andccr +andccr: + andccr #255 + .global orccr +orccr: + orccr #125 + .global stilm +stilm: + stilm #97 + .global addsp +addsp: + addsp #-512 + .global extsb +extsb: + extsb r9 + .global extub +extub: + extub r10 + .global extsh +extsh: + extsh r11 + .global extuh +extuh: + extuh r12 + .global enter +enter: + enter #1020 + .global leave +leave: + leave + .global xchb +xchb: + xchb @r14, r15 + .global ldi_32 +ldi_32: + ldi:32 #0x12345678, r0 + .global copop +copop: + copop #15, #1, cr3, cr4 + copop #15, #4, cr5, cr6 + copop #15, #255, cr7, cr0 + .global copld +copld: + copld #0, #0, r4, cr0 + .global copst +copst: + copst #7, #2, cr1, r5 + .global copsv +copsv: + copsv #8, #3, cr2, r6 + .global ldm0 +ldm0: + ldm0 (r0, r2, r3, r7) + .global ldm1 +ldm1: + ldm1 (r8, r11, r15) + .global stm0 +stm0: + stm0 (r2, r3) + .global stm1 +stm1: + stm1 (r13, r14) + .global call +call: + call footext + call @r10 + .global call_d +call_d: + call:D footext + nop + call:d @r12 + nop + .global dmov +dmov: + dmov @0x88, r13 + dmov r13, @0x54 + dmov @0x44, @r13+ + dmov @R13+, @0x2 + dmov @0x2c, @-r15 + dmov @r15+, @38 + .global dmovh +dmovh: + dmovh @0x88, r13 + dmovh r13, @0x52 + dmovh @0x34, @r13 + + dmovh @r13+, @0x52 + .global dmovb +dmovb: + dmovb @0x91, r13 + dmovb r13, @0x53 + dmovb @71, @r13+ + dmovb @r13+, @0x0 + .global ldi_20 +ldi_20: + ldi:20 #0x000fffff, r1 +finish: + ldi:32 #0x8000,r0 + mov r0,ssp + ldi:32 #1,r0 + int #10 + .global inte +inte: + inte + .global reti +reti: + reti diff --git a/gas/testsuite/gas/fr30/fr30.exp b/gas/testsuite/gas/fr30/fr30.exp new file mode 100644 index 0000000..06286b1 --- /dev/null +++ b/gas/testsuite/gas/fr30/fr30.exp @@ -0,0 +1,5 @@ +# FR30 testcases + +if [istarget fr30*-*-*] { +# run_dump_test "high-1" +} diff --git a/gas/testsuite/gas/h8300/addsub.s b/gas/testsuite/gas/h8300/addsub.s new file mode 100644 index 0000000..802b0d7 --- /dev/null +++ b/gas/testsuite/gas/h8300/addsub.s @@ -0,0 +1,16 @@ + .text +h8300_add_sub: + add.b #16,r1l + add.b r1h,r1l + add.w r1,r2 + adds #1,r4 + adds #2,r5 + addx r0l,r1l + addx #16,r2h + sub.b r0l,r1l + sub.w r0,r1 + subs #1,r4 + subs #2,r5 + subx r0l,r1l + subx #16,r2h + diff --git a/gas/testsuite/gas/h8300/addsubh.s b/gas/testsuite/gas/h8300/addsubh.s new file mode 100644 index 0000000..1f885d3 --- /dev/null +++ b/gas/testsuite/gas/h8300/addsubh.s @@ -0,0 +1,25 @@ + .h8300h + .text +h8300h_add_sub: + add.b #16,r1l + add.b r1h,r1l + add.w #32,r1 + add.w r1,r2 + add.l #64,er1 + add.l er1,er2 + adds #1,er4 + adds #2,er5 + adds #4,er6 + addx r0l,r1l + addx #16,r2h + sub.b r0l,r1l + sub.w #16,r1 + sub.w r0,r1 + sub.l #64,er1 + sub.l er1,er2 + subs #1,er4 + subs #2,er5 + subs #4,er6 + subx r0l,r1l + subx #16,r2h + diff --git a/gas/testsuite/gas/h8300/addsubs.s b/gas/testsuite/gas/h8300/addsubs.s new file mode 100644 index 0000000..b0b3699 --- /dev/null +++ b/gas/testsuite/gas/h8300/addsubs.s @@ -0,0 +1,25 @@ + .h8300s + .text +h8300s_add_sub: + add.b #16,r1l + add.b r1h,r1l + add.w #32,r1 + add.w r1,r2 + add.l #64,er1 + add.l er1,er2 + adds #1,er4 + adds #2,er5 + adds #4,er6 + addx r0l,r1l + addx #16,r2h + sub.b r0l,r1l + sub.w #16,r1 + sub.w r0,r1 + sub.l #64,er1 + sub.l er1,er2 + subs #1,er4 + subs #2,er5 + subs #4,er6 + subx r0l,r1l + subx #16,r2h + diff --git a/gas/testsuite/gas/h8300/bitops1.s b/gas/testsuite/gas/h8300/bitops1.s new file mode 100644 index 0000000..3c107a1 --- /dev/null +++ b/gas/testsuite/gas/h8300/bitops1.s @@ -0,0 +1,18 @@ + .text +h8300_bit_ops_1: + band #0,r0l + band #0,@r0 + band #0,@64:8 + bclr #0,r0l + bclr #0,@r0 + bclr #0,@64:8 + bclr r1l,r0l + bclr r1l,@r0 + bclr r1l,@64:8 + biand #0,r0l + biand #0,@r0 + biand #0,@64:8 + bild #0,r0l + bild #0,@r0 + bild #0,@64:8 + diff --git a/gas/testsuite/gas/h8300/bitops1h.s b/gas/testsuite/gas/h8300/bitops1h.s new file mode 100644 index 0000000..4139a59 --- /dev/null +++ b/gas/testsuite/gas/h8300/bitops1h.s @@ -0,0 +1,19 @@ + .h8300h + .text +h8300h_bit_ops_1: + band #0,r0l + band #0,@er0 + band #0,@64:8 + bclr #0,r0l + bclr #0,@er0 + bclr #0,@64:8 + bclr r1l,r0l + bclr r1l,@er0 + bclr r1l,@64:8 + biand #0,r0l + biand #0,@er0 + biand #0,@64:8 + bild #0,r0l + bild #0,@er0 + bild #0,@64:8 + diff --git a/gas/testsuite/gas/h8300/bitops1s.s b/gas/testsuite/gas/h8300/bitops1s.s new file mode 100644 index 0000000..c6599d4 --- /dev/null +++ b/gas/testsuite/gas/h8300/bitops1s.s @@ -0,0 +1,29 @@ + .h8300s + .text +h8300s_bit_ops_1: + band #0,r0l + band #0,@er0 + band #0,@64:8 + band #0,@128:16 + band #0,@65536:32 + bclr #0,r0l + bclr #0,@er0 + bclr #0,@64:8 + bclr #0,@128:16 + bclr #0,@65536:32 + bclr r1l,r0l + bclr r1l,@er0 + bclr r1l,@64:8 + bclr r1l,@128:16 + bclr r1l,@65536:32 + biand #0,r0l + biand #0,@er0 + biand #0,@64:8 + biand #0,@128:16 + biand #0,@65536:32 + bild #0,r0l + bild #0,@er0 + bild #0,@64:8 + bild #0,@128:16 + bild #0,@65536:32 + diff --git a/gas/testsuite/gas/h8300/bitops2.s b/gas/testsuite/gas/h8300/bitops2.s new file mode 100644 index 0000000..3996e5a --- /dev/null +++ b/gas/testsuite/gas/h8300/bitops2.s @@ -0,0 +1,15 @@ + .text +h8300_bit_ops_2: + bior #0,r0l + bior #0,@r0 + bior #0,@64:8 + bist #0,r0l + bist #0,@r0 + bist #0,@64:8 + bixor #0,r0l + bixor #0,@r0 + bixor #0,@64:8 + bld #0,r0l + bld #0,@r0 + bld #0,@64:8 + diff --git a/gas/testsuite/gas/h8300/bitops2h.s b/gas/testsuite/gas/h8300/bitops2h.s new file mode 100644 index 0000000..22be74e --- /dev/null +++ b/gas/testsuite/gas/h8300/bitops2h.s @@ -0,0 +1,16 @@ + .h8300h + .text +h8300h_bit_ops_2: + bior #0,r0l + bior #0,@er0 + bior #0,@64:8 + bist #0,r0l + bist #0,@er0 + bist #0,@64:8 + bixor #0,r0l + bixor #0,@er0 + bixor #0,@64:8 + bld #0,r0l + bld #0,@er0 + bld #0,@64:8 + diff --git a/gas/testsuite/gas/h8300/bitops2s.s b/gas/testsuite/gas/h8300/bitops2s.s new file mode 100644 index 0000000..9470520 --- /dev/null +++ b/gas/testsuite/gas/h8300/bitops2s.s @@ -0,0 +1,23 @@ + .h8300s + .text +h8300s_bit_ops_2: + bior #0,r0l + bior #0,@er0 + bior #0,@64:8 + bior #0,@128:16 + bior #0,@65536:32 + bist #0,r0l + bist #0,@er0 + bist #0,@64:8 + bist #0,@128:16 + bist #0,@65536:32 + bixor #0,r0l + bixor #0,@er0 + bixor #0,@64:8 + bixor #0,@128:16 + bixor #0,@65536:32 + bld #0,r0l + bld #0,@er0 + bld #0,@64:8 + bld #0,@128:16 + bld #0,@65536:32 diff --git a/gas/testsuite/gas/h8300/bitops3.s b/gas/testsuite/gas/h8300/bitops3.s new file mode 100644 index 0000000..78c9bfb --- /dev/null +++ b/gas/testsuite/gas/h8300/bitops3.s @@ -0,0 +1,15 @@ + .text +h8300_bit_ops_3: + bnot #0,r0l + bnot #0,@r0 + bnot #0,@64:8 + bnot r1l,r0l + bnot r1l,@r0 + bnot r1l,@64:8 + bset #0,r0l + bset #0,@r0 + bset #0,@64:8 + bset r1l,r0l + bset r1l,@r0 + bset r1l,@64:8 + diff --git a/gas/testsuite/gas/h8300/bitops3h.s b/gas/testsuite/gas/h8300/bitops3h.s new file mode 100644 index 0000000..fdeda60 --- /dev/null +++ b/gas/testsuite/gas/h8300/bitops3h.s @@ -0,0 +1,16 @@ + .h8300h + .text +h8300h_bit_ops_3: + bnot #0,r0l + bnot #0,@er0 + bnot #0,@64:8 + bnot r1l,r0l + bnot r1l,@er0 + bnot r1l,@64:8 + bset #0,r0l + bset #0,@er0 + bset #0,@64:8 + bset r1l,r0l + bset r1l,@er0 + bset r1l,@64:8 + diff --git a/gas/testsuite/gas/h8300/bitops3s.s b/gas/testsuite/gas/h8300/bitops3s.s new file mode 100644 index 0000000..7c64e06 --- /dev/null +++ b/gas/testsuite/gas/h8300/bitops3s.s @@ -0,0 +1,24 @@ + .h8300s + .text +h8300s_bit_ops_3: + bnot #0,r0l + bnot #0,@er0 + bnot #0,@64:8 + bnot #0,@128:16 + bnot #0,@65536:32 + bnot r1l,r0l + bnot r1l,@er0 + bnot r1l,@64:8 + bnot r1l,@128:16 + bnot r1l,@65536:32 + bset #0,r0l + bset #0,@er0 + bset #0,@64:8 + bset #0,@128:16 + bset #0,@65536:32 + bset r1l,r0l + bset r1l,@er0 + bset r1l,@64:8 + bset r1l,@128:16 + bset r1l,@65536:32 + diff --git a/gas/testsuite/gas/h8300/bitops4.s b/gas/testsuite/gas/h8300/bitops4.s new file mode 100644 index 0000000..f7e66d8 --- /dev/null +++ b/gas/testsuite/gas/h8300/bitops4.s @@ -0,0 +1,18 @@ + .text +h8300_bit_ops_4: + bor #0,r0l + bor #0,@r0 + bor #0,@64:8 + bst #0,r0l + bst #0,@r0 + bst #0,@64:8 + btst #0,r0l + btst #0,@r0 + btst #0,@64:8 + btst r1l,r0l + btst r1l,@r0 + btst r1l,@64:8 + bxor #0,r0l + bxor #0,@r0 + bxor #0,@64:8 + diff --git a/gas/testsuite/gas/h8300/bitops4h.s b/gas/testsuite/gas/h8300/bitops4h.s new file mode 100644 index 0000000..ed35e17 --- /dev/null +++ b/gas/testsuite/gas/h8300/bitops4h.s @@ -0,0 +1,19 @@ + .h8300h + .text +h8300h_bit_ops_4: + bor #0,r0l + bor #0,@er0 + bor #0,@64:8 + bst #0,r0l + bst #0,@er0 + bst #0,@64:8 + btst #0,r0l + btst #0,@er0 + btst #0,@64:8 + btst r1l,r0l + btst r1l,@er0 + btst r1l,@64:8 + bxor #0,r0l + bxor #0,@er0 + bxor #0,@64:8 + diff --git a/gas/testsuite/gas/h8300/bitops4s.s b/gas/testsuite/gas/h8300/bitops4s.s new file mode 100644 index 0000000..e8f47b6 --- /dev/null +++ b/gas/testsuite/gas/h8300/bitops4s.s @@ -0,0 +1,29 @@ + .h8300s + .text +h8300s_bit_ops_4: + bor #0,r0l + bor #0,@er0 + bor #0,@64:8 + bor #0,@128:16 + bor #0,@65536:32 + bst #0,r0l + bst #0,@er0 + bst #0,@64:8 + bst #0,@128:16 + bst #0,@65536:32 + btst #0,r0l + btst #0,@er0 + btst #0,@64:8 + btst #0,@128:16 + btst #0,@65536:32 + btst r1l,r0l + btst r1l,@er0 + btst r1l,@64:8 + btst r1l,@128:16 + btst r1l,@65536:32 + bxor #0,r0l + bxor #0,@er0 + bxor #0,@64:8 + bxor #0,@128:16 + bxor #0,@65536:32 + diff --git a/gas/testsuite/gas/h8300/branch.s b/gas/testsuite/gas/h8300/branch.s new file mode 100644 index 0000000..2580615 --- /dev/null +++ b/gas/testsuite/gas/h8300/branch.s @@ -0,0 +1,10 @@ + .text +h8300_branches: + bsr h8300_branches + jmp h8300_branches + jmp @r0 + jmp @@16:8 + jsr h8300_branches + jsr @r0 + jsr @@16:8 + diff --git a/gas/testsuite/gas/h8300/branchh.s b/gas/testsuite/gas/h8300/branchh.s new file mode 100644 index 0000000..7cbc62f --- /dev/null +++ b/gas/testsuite/gas/h8300/branchh.s @@ -0,0 +1,12 @@ + .h8300h + .text +h8300h_branches: + bsr h8300h_branches:8 + bsr h8300h_branches:16 + jmp h8300h_branches + jmp @er0 + jmp @@16:8 + jsr h8300h_branches + jsr @er0 + jsr @@16:8 + diff --git a/gas/testsuite/gas/h8300/branchs.s b/gas/testsuite/gas/h8300/branchs.s new file mode 100644 index 0000000..8f33e17 --- /dev/null +++ b/gas/testsuite/gas/h8300/branchs.s @@ -0,0 +1,12 @@ + .h8300s + .text +h8300s_branches: + bsr h8300s_branches:8 + bsr h8300s_branches:16 + jmp h8300s_branches + jmp @er0 + jmp @@16:8 + jsr h8300s_branches + jsr @er0 + jsr @@16:8 + diff --git a/gas/testsuite/gas/h8300/cbranch.s b/gas/testsuite/gas/h8300/cbranch.s new file mode 100644 index 0000000..ae3d53e --- /dev/null +++ b/gas/testsuite/gas/h8300/cbranch.s @@ -0,0 +1,23 @@ + .text +h8300_cbranch: + bra h8300_cbranch + bt h8300_cbranch + brn h8300_cbranch + bf h8300_cbranch + bhi h8300_cbranch + bls h8300_cbranch + bcc h8300_cbranch + bhs h8300_cbranch + bcs h8300_cbranch + blo h8300_cbranch + bne h8300_cbranch + beq h8300_cbranch + bvc h8300_cbranch + bvs h8300_cbranch + bpl h8300_cbranch + bmi h8300_cbranch + bge h8300_cbranch + blt h8300_cbranch + bgt h8300_cbranch + ble h8300_cbranch + diff --git a/gas/testsuite/gas/h8300/cbranchh.s b/gas/testsuite/gas/h8300/cbranchh.s new file mode 100644 index 0000000..a64e1a2 --- /dev/null +++ b/gas/testsuite/gas/h8300/cbranchh.s @@ -0,0 +1,44 @@ + .text + .h8300h +h8300h_cbranch: + bra h8300h_cbranch:8 + bt h8300h_cbranch:8 + brn h8300h_cbranch:8 + bf h8300h_cbranch:8 + bhi h8300h_cbranch:8 + bls h8300h_cbranch:8 + bcc h8300h_cbranch:8 + bhs h8300h_cbranch:8 + bcs h8300h_cbranch:8 + blo h8300h_cbranch:8 + bne h8300h_cbranch:8 + beq h8300h_cbranch:8 + bvc h8300h_cbranch:8 + bvs h8300h_cbranch:8 + bpl h8300h_cbranch:8 + bmi h8300h_cbranch:8 + bge h8300h_cbranch:8 + blt h8300h_cbranch:8 + bgt h8300h_cbranch:8 + ble h8300h_cbranch:8 + bra h8300h_cbranch:16 + bt h8300h_cbranch:16 + brn h8300h_cbranch:16 + bf h8300h_cbranch:16 + bhi h8300h_cbranch:16 + bls h8300h_cbranch:16 + bcc h8300h_cbranch:16 + bhs h8300h_cbranch:16 + bcs h8300h_cbranch:16 + blo h8300h_cbranch:16 + bne h8300h_cbranch:16 + beq h8300h_cbranch:16 + bvc h8300h_cbranch:16 + bvs h8300h_cbranch:16 + bpl h8300h_cbranch:16 + bmi h8300h_cbranch:16 + bge h8300h_cbranch:16 + blt h8300h_cbranch:16 + bgt h8300h_cbranch:16 + ble h8300h_cbranch:16 + diff --git a/gas/testsuite/gas/h8300/cbranchs.s b/gas/testsuite/gas/h8300/cbranchs.s new file mode 100644 index 0000000..14222ea --- /dev/null +++ b/gas/testsuite/gas/h8300/cbranchs.s @@ -0,0 +1,44 @@ + .text + .h8300s +h8300s_cbranch: + bra h8300s_cbranch:8 + bt h8300s_cbranch:8 + brn h8300s_cbranch:8 + bf h8300s_cbranch:8 + bhi h8300s_cbranch:8 + bls h8300s_cbranch:8 + bcc h8300s_cbranch:8 + bhs h8300s_cbranch:8 + bcs h8300s_cbranch:8 + blo h8300s_cbranch:8 + bne h8300s_cbranch:8 + beq h8300s_cbranch:8 + bvc h8300s_cbranch:8 + bvs h8300s_cbranch:8 + bpl h8300s_cbranch:8 + bmi h8300s_cbranch:8 + bge h8300s_cbranch:8 + blt h8300s_cbranch:8 + bgt h8300s_cbranch:8 + ble h8300s_cbranch:8 + bra h8300s_cbranch:16 + bt h8300s_cbranch:16 + brn h8300s_cbranch:16 + bf h8300s_cbranch:16 + bhi h8300s_cbranch:16 + bls h8300s_cbranch:16 + bcc h8300s_cbranch:16 + bhs h8300s_cbranch:16 + bcs h8300s_cbranch:16 + blo h8300s_cbranch:16 + bne h8300s_cbranch:16 + beq h8300s_cbranch:16 + bvc h8300s_cbranch:16 + bvs h8300s_cbranch:16 + bpl h8300s_cbranch:16 + bmi h8300s_cbranch:16 + bge h8300s_cbranch:16 + blt h8300s_cbranch:16 + bgt h8300s_cbranch:16 + ble h8300s_cbranch:16 + diff --git a/gas/testsuite/gas/h8300/cmpsi2.s b/gas/testsuite/gas/h8300/cmpsi2.s new file mode 100644 index 0000000..ef7f03a --- /dev/null +++ b/gas/testsuite/gas/h8300/cmpsi2.s @@ -0,0 +1,28 @@ +# 1 "libgcc1.S" +;; libgcc1 routines for the Hitachi h8/300 cpu. +;; Contributed by Steve Chamberlain. +;; sac@cygnus.com + .section .text + .align 2 + .global ___cmpsi2 +___cmpsi2: + cmp.w r2 ,r0 + bne .L2 + cmp.w r3 ,r1 + bne .L2 + mov.w #1,r0 + rts +.L2: + cmp.w r0 ,r2 + bgt .L4 + bne .L3 + cmp.w r1 ,r3 + bls .L3 +.L4: + sub.w r0 ,r0 + rts +.L3: + mov.w #2,r0 +.L5: + rts + .end diff --git a/gas/testsuite/gas/h8300/compare.s b/gas/testsuite/gas/h8300/compare.s new file mode 100644 index 0000000..60c1a41 --- /dev/null +++ b/gas/testsuite/gas/h8300/compare.s @@ -0,0 +1,6 @@ + .text +h8300_cmp: + cmp.b #0,r0l + cmp.b r0h,r0l + cmp.w r0,r1 + diff --git a/gas/testsuite/gas/h8300/compareh.s b/gas/testsuite/gas/h8300/compareh.s new file mode 100644 index 0000000..c81e88e --- /dev/null +++ b/gas/testsuite/gas/h8300/compareh.s @@ -0,0 +1,10 @@ + .h8300h + .text +h8300h_cmp: + cmp.b #0,r0l + cmp.b r0h,r0l + cmp.w #32,r0 + cmp.w r0,r1 + cmp.l #64,er0 + cmp.l er0,er1 + diff --git a/gas/testsuite/gas/h8300/compares.s b/gas/testsuite/gas/h8300/compares.s new file mode 100644 index 0000000..e23f3fe --- /dev/null +++ b/gas/testsuite/gas/h8300/compares.s @@ -0,0 +1,10 @@ + .h8300s + .text +h8300s_cmp: + cmp.b #0,r0l + cmp.b r0h,r0l + cmp.w #32,r0 + cmp.w r0,r1 + cmp.l #64,er0 + cmp.l er0,er1 + diff --git a/gas/testsuite/gas/h8300/decimal.s b/gas/testsuite/gas/h8300/decimal.s new file mode 100644 index 0000000..8d4c0a0 --- /dev/null +++ b/gas/testsuite/gas/h8300/decimal.s @@ -0,0 +1,5 @@ + .text +h8300_decimal: + daa r0l + das r0l + diff --git a/gas/testsuite/gas/h8300/decimalh.s b/gas/testsuite/gas/h8300/decimalh.s new file mode 100644 index 0000000..9392405 --- /dev/null +++ b/gas/testsuite/gas/h8300/decimalh.s @@ -0,0 +1,6 @@ + .h8300h + .text +h8300h_decimal: + daa r0l + das r0l + diff --git a/gas/testsuite/gas/h8300/decimals.s b/gas/testsuite/gas/h8300/decimals.s new file mode 100644 index 0000000..b7802fc --- /dev/null +++ b/gas/testsuite/gas/h8300/decimals.s @@ -0,0 +1,6 @@ + .h8300s + .text +h8300s_decimal: + daa r0l + das r0l + diff --git a/gas/testsuite/gas/h8300/divmul.s b/gas/testsuite/gas/h8300/divmul.s new file mode 100644 index 0000000..37372ce --- /dev/null +++ b/gas/testsuite/gas/h8300/divmul.s @@ -0,0 +1,5 @@ + .text +h8300_div_mul: + divxu r0l,r1 + mulxu r0l,r1 + diff --git a/gas/testsuite/gas/h8300/divmulh.s b/gas/testsuite/gas/h8300/divmulh.s new file mode 100644 index 0000000..db60f8f --- /dev/null +++ b/gas/testsuite/gas/h8300/divmulh.s @@ -0,0 +1,12 @@ + .h8300h + .text +h8300h_div_mul: + divxu.b r0l,r1 + divxu.w r0,er1 + divxs.b r0l,r1 + divxs.w r0,er1 + mulxu.b r0l,r1 + mulxu.w r0,er1 + mulxs.b r0l,r1 + mulxs.w r0,er1 + diff --git a/gas/testsuite/gas/h8300/divmuls.s b/gas/testsuite/gas/h8300/divmuls.s new file mode 100644 index 0000000..db60f8f --- /dev/null +++ b/gas/testsuite/gas/h8300/divmuls.s @@ -0,0 +1,12 @@ + .h8300h + .text +h8300h_div_mul: + divxu.b r0l,r1 + divxu.w r0,er1 + divxs.b r0l,r1 + divxs.w r0,er1 + mulxu.b r0l,r1 + mulxu.w r0,er1 + mulxs.b r0l,r1 + mulxs.w r0,er1 + diff --git a/gas/testsuite/gas/h8300/extendh.s b/gas/testsuite/gas/h8300/extendh.s new file mode 100644 index 0000000..c034c83 --- /dev/null +++ b/gas/testsuite/gas/h8300/extendh.s @@ -0,0 +1,8 @@ + .h8300h + .text +h8300h_extend: + exts.w r0 + exts.l er0 + extu.w r0 + extu.l er0 + diff --git a/gas/testsuite/gas/h8300/extends.s b/gas/testsuite/gas/h8300/extends.s new file mode 100644 index 0000000..a26e9ba --- /dev/null +++ b/gas/testsuite/gas/h8300/extends.s @@ -0,0 +1,8 @@ + .h8300s + .text +h8300s_extend: + exts.w r0 + exts.l er0 + extu.w r0 + extu.l er0 + diff --git a/gas/testsuite/gas/h8300/ffxx1.d b/gas/testsuite/gas/h8300/ffxx1.d new file mode 100644 index 0000000..93455d5 --- /dev/null +++ b/gas/testsuite/gas/h8300/ffxx1.d @@ -0,0 +1,23 @@ +#objdump: --prefix-addresses -dr +#name: FFxx1 + +# Test for FFxx:8 addressing. + +.*: file format .*h8300.* + +Disassembly of section .text: + ... + 0: 16 main +0+0400 <main> f8 7f mov.b #0x7f,r0l +0+0402 <main[+](0x|)2> 28 bb mov.b @0xbb:8,r0l +0+0404 <main[+](0x|)4> 6a 88 ff b9 mov.b r0l,@0xffb9:16 +0+0408 <main[+](0x|)8> f8 01 mov.b #0x1,r0l +0+040a <loop> 6a 88 ff bb mov.b r0l,@0xffbb:16 +0+040e <delay> 79 01 00 00 mov.w #0x0,r1 +0+0412 <deloop> 0b 01 adds #0x1,er1 +0+0414 <deloop[+](0x|)2> 46 00 bne .0 \(416\) + 415: DISP8 deloop[+]0xffffffff +0+0416 <deloop[+](0x|)4> 12 88 rotl r0l +0+0418 <deloop[+](0x|)6> 40 00 bra .0 \(41a\) + 419: DISP8 loop[+]0xffffffff + ... diff --git a/gas/testsuite/gas/h8300/ffxx1.s b/gas/testsuite/gas/h8300/ffxx1.s new file mode 100644 index 0000000..53fc841 --- /dev/null +++ b/gas/testsuite/gas/h8300/ffxx1.s @@ -0,0 +1,20 @@ + .equ p6ddr, 0xffb9 ;0x7f for output + .equ p6dr, 0xffbb + .equ seed, 0x01 + .text + .org 0 +reset: .word main ;reset vector +; + .org 0x400 +main: mov.b #0x7f,r0l ;port 6 ddr = 7F + mov.b @0xffbb:8,r0l ;***test*** + mov.b r0l,@p6ddr:16 +; + mov.b #seed,r0l ;start with 0000001 +loop: mov.b r0l,@p6dr:16 ;output to port 6 +delay: mov.w #0x0000,r1 +deloop: adds.w #1,r1 + bne deloop:8 ;not = 0 + rotl r0l + bra loop:8 + .word 0 diff --git a/gas/testsuite/gas/h8300/h8300.exp b/gas/testsuite/gas/h8300/h8300.exp new file mode 100644 index 0000000..2b7d41e --- /dev/null +++ b/gas/testsuite/gas/h8300/h8300.exp @@ -0,0 +1,2183 @@ +# +# Some H8/300 tests +# +proc do_h8300_add_sub {} { + set testname "addsub.s: h8300 add/sub tests" + set x 0 + + gas_start "addsub.s" "-al" + + # Check each instruction bit pattern to verify it got + # assembled correctly. + while 1 { + expect { + -re " +\[0-9\]+ 0000 8910\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0002 0819\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0004 0912\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0006 0B04\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0008 0B85\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 000a 0E89\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 000c 9210\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 000e 1889\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0010 1901\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0012 1B04\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0014 1B85\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0016 1E89\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0018 B210\[^\n\]*\n" { set x [expr $x+1] } + timeout { perror "timeout\n; break } + eof { break } + } + } + + # This was intended to do any cleanup necessary. It kinda looks like it + # isn't needed, but just in case, please keep it in for now. + gas_finish + + # Did we find what we were looking for? If not, flunk it. + if [expr $x == 13] then { pass $testname } else { fail $testname } +} + +proc do_h8300_logical {} { + set testname "logical.s: h8300 logical tests" + set x 0 + + gas_start "logical.s" "-al" + + # Check each instruction bit pattern to verify it got + # assembled correctly. + while 1 { + expect { + -re " +\[0-9\]+ 0000 E910\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0002 1691\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0004 0610\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0006 C810\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0008 1498\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 000a 0410\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 000c D810\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 000e 1589\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0010 0510\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0012 1788\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0014 1708\[^\n\]*\n" { set x [expr $x+1] } + timeout { perror "timeout\n; break } + eof { break } + } + } + + # This was intended to do any cleanup necessary. It kinda looks like it + # isn't needed, but just in case, please keep it in for now. + gas_finish + + # Did we find what we were looking for? If not, flunk it. + if [expr $x == 11] then { pass $testname } else { fail $testname } +} + +proc do_h8300_cbranch {} { + set testname "cbranch.s: h8300 conditional branch tests" + set x 0 + + gas_start "cbranch.s" "-al" + + # Check each instruction bit pattern to verify it got + # assembled correctly. + while 1 { + expect { + -re " +\[0-9\]+ 0000 4000\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0002 4000\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0004 4100\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0006 4100\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0008 4200\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 000a 4300\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 000c 4400\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 000e 4400\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0010 4500\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0012 4500\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0014 4600\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0016 4700\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0018 4800\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 001a 4900\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 001c 4A00\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 001e 4B00\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0020 4C00\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0022 4D00\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0024 4E00\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0026 4F00\[^\n\]*\n" { set x [expr $x+1] } + timeout { perror "timeout\n; break } + eof { break } + } + } + + # This was intended to do any cleanup necessary. It kinda looks like it + # isn't needed, but just in case, please keep it in for now. + gas_finish + + # Did we find what we were looking for? If not, flunk it. + if [expr $x == 20] then { pass $testname } else { fail $testname } +} + +proc do_h8300_bitops1 {} { + set testname "bitops1.s: h8300 bitops tests #1" + set x 0 + + gas_start "bitops1.s" "-al" + + # Check each instruction bit pattern to verify it got + # assembled correctly. + while 1 { + expect { + -re " +\[0-9\]+ 0000 7608\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0002 7C007600\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0006 7E407600\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 000a 7208\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 000c 7D007200\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0010 7F407200\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0014 6298\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0016 7D006290\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 001a 7F406290\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 001e 7688\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0020 7C007680\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0024 7E407680\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0028 7788\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 002a 7C007780\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 002e 7E407780\[^\n\]*\n" { set x [expr $x+1] } + timeout { perror "timeout\n; break } + eof { break } + } + } + + # This was intended to do any cleanup necessary. It kinda looks like it + # isn't needed, but just in case, please keep it in for now. + gas_finish + + # Did we find what we were looking for? If not, flunk it. + if [expr $x == 15] then { pass $testname } else { fail $testname } +} + +proc do_h8300_bitops2 {} { + set testname "bitops2.s: h8300 bitops tests #2" + set x 0 + + gas_start "bitops2.s" "-al" + + # Check each instruction bit pattern to verify it got + # assembled correctly. + while 1 { + expect { + -re " +\[0-9\]+ 0000 7488\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0002 7C007480\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0006 7E407480\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 000a 6788\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 000c 7D006780\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0010 7F406780\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0014 7588\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0016 7C007580\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 001a 7E407580\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 001e 7708\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0020 7C007700\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0024 7E407700\[^\n\]*\n" { set x [expr $x+1] } + timeout { perror "timeout\n; break } + eof { break } + } + } + + # This was intended to do any cleanup necessary. It kinda looks like it + # isn't needed, but just in case, please keep it in for now. + gas_finish + + # Did we find what we were looking for? If not, flunk it. + if [expr $x == 12] then { pass $testname } else { fail $testname } +} + +proc do_h8300_bitops3 {} { + set testname "bitops3.s: h8300 bitops tests #3" + set x 0 + + gas_start "bitops3.s" "-al" + + # Check each instruction bit pattern to verify it got + # assembled correctly. + while 1 { + expect { + -re " +\[0-9\]+ 0000 7108\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0002 7D007100\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0006 7F407100\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 000a 6198\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 000c 7D006190\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0010 7F406190\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0014 7008\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0016 7D007000\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 001a 7F407000\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 001e 6098\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0020 7D006090\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0024 7F406090\[^\n\]*\n" { set x [expr $x+1] } + timeout { perror "timeout\n; break } + eof { break } + } + } + + # This was intended to do any cleanup necessary. It kinda looks like it + # isn't needed, but just in case, please keep it in for now. + gas_finish + + # Did we find what we were looking for? If not, flunk it. + if [expr $x == 12] then { pass $testname } else { fail $testname } +} + +proc do_h8300_bitops4 {} { + set testname "bitops4.s: h8300 bitops tests #4" + set x 0 + + gas_start "bitops4.s" "-al" + + # Check each instruction bit pattern to verify it got + # assembled correctly. + while 1 { + expect { + -re " +\[0-9\]+ 0000 7408\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0002 7C007400\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0006 7E407400\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 000a 6708\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 000c 7D006700\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0010 7F406700\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0014 7308\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0016 7C007300\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 001a 7E407300\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 001e 6398\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0020 7C006390\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0024 7E406390\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0028 7508\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 002a 7C007500\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 002e 7E407500\[^\n\]*\n" { set x [expr $x+1] } + timeout { perror "timeout\n; break } + eof { break } + } + } + + # This was intended to do any cleanup necessary. It kinda looks like it + # isn't needed, but just in case, please keep it in for now. + gas_finish + + # Did we find what we were looking for? If not, flunk it. + if [expr $x == 15] then { pass $testname } else { fail $testname } +} + +proc do_h8300_branch {} { + set testname "branch.s: h8300 branch tests" + set x 0 + + gas_start "branch.s" "-al" + + # Check each instruction bit pattern to verify it got + # assembled correctly. + while 1 { + expect { + -re " +\[0-9\]+ 0000 5500\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0002 5A000000\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0006 5900\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0008 5B00\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 000a 5E000000\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 000e 5D00\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0010 5F00\[^\n\]*\n" { set x [expr $x+1] } + timeout { perror "timeout\n; break } + eof { break } + } + } + + # This was intended to do any cleanup necessary. It kinda looks like it + # isn't needed, but just in case, please keep it in for now. + gas_finish + + # Did we find what we were looking for? If not, flunk it. + if [expr $x == 7] then { pass $testname } else { fail $testname } +} + +proc do_h8300_compare {} { + set testname "compare.s: h8300 compare tests" + set x 0 + + gas_start "compare.s" "-al" + + # Check each instruction bit pattern to verify it got + # assembled correctly. + while 1 { + expect { + -re " +\[0-9\]+ 0000 A800\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0002 1C08\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0004 1D01\[^\n\]*\n" { set x [expr $x+1] } + timeout { perror "timeout\n; break } + eof { break } + } + } + + # This was intended to do any cleanup necessary. It kinda looks like it + # isn't needed, but just in case, please keep it in for now. + gas_finish + + # Did we find what we were looking for? If not, flunk it. + if [expr $x == 3] then { pass $testname } else { fail $testname } +} + +proc do_h8300_decimal {} { + set testname "decimal.s: h8300 decimal tests" + set x 0 + + gas_start "decimal.s" "-al" + + # Check each instruction bit pattern to verify it got + # assembled correctly. + while 1 { + expect { + -re " +\[0-9\]+ 0000 0F08\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0002 1F08\[^\n\]*\n" { set x [expr $x+1] } + eof { break } + } + } + + # This was intended to do any cleanup necessary. It kinda looks like it + # isn't needed, but just in case, please keep it in for now. + gas_finish + + # Did we find what we were looking for? If not, flunk it. + if [expr $x == 2] then { pass $testname } else { fail $testname } +} + +proc do_h8300_incdec {} { + set testname "incdec.s: h8300 incdec tests" + set x 0 + + gas_start "incdec.s" "-al" + + # Check each instruction bit pattern to verify it got + # assembled correctly. + while 1 { + expect { + -re " +\[0-9\]+ 0000 1A08\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0002 0A08\[^\n\]*\n" { set x [expr $x+1] } + eof { break } + } + } + + # This was intended to do any cleanup necessary. It kinda looks like it + # isn't needed, but just in case, please keep it in for now. + gas_finish + + # Did we find what we were looking for? If not, flunk it. + if [expr $x == 2] then { pass $testname } else { fail $testname } +} + +proc do_h8300_divmul {} { + set testname "divmul.s: h8300 divmul tests" + set x 0 + + gas_start "divmul.s" "-al" + + # Check each instruction bit pattern to verify it got + # assembled correctly. + while 1 { + expect { + -re " +\[0-9\]+ 0000 5181\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0002 5081\[^\n\]*\n" { set x [expr $x+1] } + eof { break } + } + } + + # This was intended to do any cleanup necessary. It kinda looks like it + # isn't needed, but just in case, please keep it in for now. + gas_finish + + # Did we find what we were looking for? If not, flunk it. + if [expr $x == 2] then { pass $testname } else { fail $testname } +} + +proc do_h8300_misc {} { + set testname "misc.s: h8300 misc tests" + set x 0 + + gas_start "misc.s" "-al" + + # Check each instruction bit pattern to verify it got + # assembled correctly. + while 1 { + expect { + -re " +\[0-9\]+ 0000 7B5C598F\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0004 0700\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0006 0308\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0008 0000\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 000a 5670\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 000c 5470\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 000e 0180\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0010 0208\[^\n\]*\n" { set x [expr $x+1] } + eof { break } + } + } + + # This was intended to do any cleanup necessary. It kinda looks like it + # isn't needed, but just in case, please keep it in for now. + gas_finish + + # Did we find what we were looking for? If not, flunk it. + if [expr $x == 8] then { pass $testname } else { fail $testname } + + setup_xfail "h8300*-*-*" + fail "h8300 movfpe/movtpe tests" +} + +proc do_h8300_movb {} { + set testname "movb.s: h8300 movb tests" + set x 0 + + gas_start "movb.s" "-al" + + # Check each instruction bit pattern to verify it got + # assembled correctly. + while 1 { + expect { + -re " +\[0-9\]+ 0000 0C89\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0002 F810\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0004 6818\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0006 6E180010\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 000a 6C18\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 000c 2810\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 000e 6A080000\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0012 6898\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0014 6E980010\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0018 6C98\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 001a 3810\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 001c 6A880000\[^\n\]*\n" { set x [expr $x+1] } + eof { break } + } + } + + # This was intended to do any cleanup necessary. It kinda looks like it + # isn't needed, but just in case, please keep it in for now. + gas_finish + + # Did we find what we were looking for? If not, flunk it. + if [expr $x == 12] then { pass $testname } else { fail $testname } +} + +proc do_h8300_movw {} { + set testname "movw.s: h8300 movw tests" + set x 0 + + gas_start "movw.s" "-al" + + # Check each instruction bit pattern to verify it got + # assembled correctly. + while 1 { + expect { + -re " +\[0-9\]+ 0000 0D01\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0002 79000010\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0006 6910\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0008 6F100010\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 000c 6D10\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 000e 6B000000\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0012 6990\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0014 6F900010\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0018 6D90\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 001a 6B800000\[^\n\]*\n" { set x [expr $x+1] } + eof { break } + } + } + + # This was intended to do any cleanup necessary. It kinda looks like it + # isn't needed, but just in case, please keep it in for now. + gas_finish + + # Did we find what we were looking for? If not, flunk it. + if [expr $x == 10] then { pass $testname } else { fail $testname } +} + +proc do_h8300_pushpop {} { + set testname "pushpop.s: h8300 pushpop tests" + set x 0 + + gas_start "pushpop.s" "-al" + + # Check each instruction bit pattern to verify it got + # assembled correctly. + while 1 { + expect { + -re " +\[0-9\]+ 0000 6D70\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0002 6DF0\[^\n\]*\n" { set x [expr $x+1] } + eof { break } + } + } + + # This was intended to do any cleanup necessary. It kinda looks like it + # isn't needed, but just in case, please keep it in for now. + gas_finish + + # Did we find what we were looking for? If not, flunk it. + if [expr $x == 2] then { pass $testname } else { fail $testname } +} + +proc do_h8300_rotate_shift {} { + set testname "rotsh.s: h8300 rotate and shift tests" + set x 0 + + gas_start "rotsh.s" "-al" + + # Check each instruction bit pattern to verify it got + # assembled correctly. + while 1 { + expect { + -re " +\[0-9\]+ 0000 1288\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0002 1388\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0004 1208\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0006 1308\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0008 1088\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 000a 1188\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 000c 1008\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 000e 1108\[^\n\]*\n" { set x [expr $x+1] } + eof { break } + } + } + + # This was intended to do any cleanup necessary. It kinda looks like it + # isn't needed, but just in case, please keep it in for now. + gas_finish + + # Did we find what we were looking for? If not, flunk it. + if [expr $x == 8] then { pass $testname } else { fail $testname } +} + +proc do_h8300h_add_sub {} { + set testname "addsubh.s: h8300h add/sub tests" + set x 0 + + gas_start "addsubh.s" "-al" + + # Check each instruction bit pattern to verify it got + # assembled correctly. + while 1 { + expect { + -re " +\[0-9\]+ 0000 8910\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0002 0819\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0004 79110020\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0008 0912\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 000a 7A110000\[^\n\]*\n +\[0-9\]+ +0040\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0010 0A92\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0012 0B04\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0014 0B85\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0016 0B96\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0018 0E89\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 001a 9210\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 001c 1889\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 001e 79310010\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0022 1901\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0024 7A310000\[^\n\]*\n +\[0-9\]+ +0040\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 002a 1A92\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 002c 1B04\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 002e 1B85\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0030 1B96\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0032 1E89\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0034 B210\[^\n\]*\n" { set x [expr $x+1] } + timeout { perror "timeout\n; break } + eof { break } + } + } + + # This was intended to do any cleanup necessary. It kinda looks like it + # isn't needed, but just in case, please keep it in for now. + gas_finish + + # Did we find what we were looking for? If not, flunk it. + if [expr $x == 21] then { pass $testname } else { fail $testname } +} + +proc do_h8300h_logical {} { + set testname "logicalh.s: h8300h logical tests" + set x 0 + + gas_start "logicalh.s" "-al" + + # Check each instruction bit pattern to verify it got + # assembled correctly. + while 1 { + expect { + -re " +\[0-9\]+ 0000 E910\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0002 1691\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0004 79610020\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0008 6611\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 000a 7A610000\[^\n\]*\n +\[0-9\]+ +0040\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0010 01F06611\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0014 0610\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0016 C810\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0018 1498\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 001a 79410020\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 001e 6411\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0020 7A410000\[^\n\]*\n +\[0-9\]+ +0040\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0026 01F06411\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 002a 0410\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 002c D810\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 002e 1589\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0030 79510020\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0034 6511\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0036 7A510000\[^\n\]*\n +\[0-9\]+ +0040\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 003c 01F06511\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0040 0510\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0042 1788\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0044 1790\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0046 17B0\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0048 1708\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 004a 1710\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 004c 1730\[^\n\]*\n" { set x [expr $x+1] } + timeout { perror "timeout\n; break } + eof { break } + } + } + + # This was intended to do any cleanup necessary. It kinda looks like it + # isn't needed, but just in case, please keep it in for now. + gas_finish + + # Did we find what we were looking for? If not, flunk it. + if [expr $x == 27] then { pass $testname } else { fail $testname } +} + +proc do_h8300h_cbranch {} { + set testname "cbranchh.s: h8300h conditional branch tests" + set x 0 + + gas_start "cbranchh.s" "-al" + + # Check each instruction bit pattern to verify it got + # assembled correctly. + while 1 { + expect { + -re " +\[0-9\]+ 0000 4000\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0002 4000\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0004 4100\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0006 4100\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0008 4200\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 000a 4300\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 000c 4400\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 000e 4400\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0010 4500\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0012 4500\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0014 4600\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0016 4700\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0018 4800\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 001a 4900\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 001c 4A00\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 001e 4B00\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0020 4C00\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0022 4D00\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0024 4E00\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0026 4F00\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0028 58000000\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 002c 58000000\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0030 58100000\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0034 58100000\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0038 58200000\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 003c 58300000\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0040 58400000\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0044 58400000\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0048 58500000\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 004c 58500000\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0050 58600000\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0054 58700000\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0058 58800000\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 005c 58900000\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0060 58A00000\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0064 58B00000\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0068 58C00000\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 006c 58D00000\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0070 58E00000\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0074 58F00000\[^\n\]*\n" { set x [expr $x+1] } + timeout { perror "timeout\n; break } + eof { break } + } + } + + # This was intended to do any cleanup necessary. It kinda looks like it + # isn't needed, but just in case, please keep it in for now. + gas_finish + + # Did we find what we were looking for? If not, flunk it. + if [expr $x == 40] then { pass $testname } else { fail $testname } +} +proc do_h8300h_bitops1 {} { + set testname "bitops1h.s: h8300h bitops tests #1" + set x 0 + + gas_start "bitops1h.s" "-al" + + # Check each instruction bit pattern to verify it got + # assembled correctly. + while 1 { + expect { + -re " +\[0-9\]+ 0000 7608\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0002 7C007600\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0006 7E407600\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 000a 7208\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 000c 7D007200\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0010 7F407200\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0014 6298\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0016 7D006290\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 001a 7F406290\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 001e 7688\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0020 7C007680\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0024 7E407680\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0028 7788\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 002a 7C007780\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 002e 7E407780\[^\n\]*\n" { set x [expr $x+1] } + timeout { perror "timeout\n; break } + eof { break } + } + } + + # This was intended to do any cleanup necessary. It kinda looks like it + # isn't needed, but just in case, please keep it in for now. + gas_finish + + # Did we find what we were looking for? If not, flunk it. + if [expr $x == 15] then { pass $testname } else { fail $testname } +} + +proc do_h8300h_bitops2 {} { + set testname "bitops2h.s: h8300h bitops tests #2" + set x 0 + + gas_start "bitops2h.s" "-al" + + # Check each instruction bit pattern to verify it got + # assembled correctly. + while 1 { + expect { + -re " +\[0-9\]+ 0000 7488\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0002 7C007480\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0006 7E407480\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 000a 6788\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 000c 7D006780\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0010 7F406780\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0014 7588\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0016 7C007580\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 001a 7E407580\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 001e 7708\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0020 7C007700\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0024 7E407700\[^\n\]*\n" { set x [expr $x+1] } + timeout { perror "timeout\n; break } + eof { break } + } + } + + # This was intended to do any cleanup necessary. It kinda looks like it + # isn't needed, but just in case, please keep it in for now. + gas_finish + + # Did we find what we were looking for? If not, flunk it. + if [expr $x == 12] then { pass $testname } else { fail $testname } +} + +proc do_h8300h_bitops3 {} { + set testname "bitops3h.s: h8300h bitops tests #3" + set x 0 + + gas_start "bitops3h.s" "-al" + + # Check each instruction bit pattern to verify it got + # assembled correctly. + while 1 { + expect { + -re " +\[0-9\]+ 0000 7108\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0002 7D007100\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0006 7F407100\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 000a 6198\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 000c 7D006190\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0010 7F406190\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0014 7008\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0016 7D007000\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 001a 7F407000\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 001e 6098\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0020 7D006090\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0024 7F406090\[^\n\]*\n" { set x [expr $x+1] } + timeout { perror "timeout\n; break } + eof { break } + } + } + + # This was intended to do any cleanup necessary. It kinda looks like it + # isn't needed, but just in case, please keep it in for now. + gas_finish + + # Did we find what we were looking for? If not, flunk it. + if [expr $x == 12] then { pass $testname } else { fail $testname } +} + +proc do_h8300h_bitops4 {} { + set testname "bitops4h.s: h8300h bitops tests #4" + set x 0 + + gas_start "bitops4h.s" "-al" + + # Check each instruction bit pattern to verify it got + # assembled correctly. + while 1 { + expect { + -re " +\[0-9\]+ 0000 7408\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0002 7C007400\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0006 7E407400\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 000a 6708\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 000c 7D006700\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0010 7F406700\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0014 7308\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0016 7C007300\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 001a 7E407300\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 001e 6398\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0020 7C006390\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0024 7E406390\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0028 7508\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 002a 7C007500\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 002e 7E407500\[^\n\]*\n" { set x [expr $x+1] } + timeout { perror "timeout\n; break } + eof { break } + } + } + + # This was intended to do any cleanup necessary. It kinda looks like it + # isn't needed, but just in case, please keep it in for now. + gas_finish + + # Did we find what we were looking for? If not, flunk it. + if [expr $x == 15] then { pass $testname } else { fail $testname } +} + +proc do_h8300h_branch {} { + set testname "branchh.s: h8300h branch tests" + set x 0 + + gas_start "branchh.s" "-al" + + # Check each instruction bit pattern to verify it got + # assembled correctly. + while 1 { + expect { + -re " +\[0-9\]+ 0000 5500\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0002 5C000000\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0006 5A000000\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 000a 5900\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 000c 5B00\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 000e 5E000000\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0012 5D00\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0014 5F00\[^\n\]*\n" { set x [expr $x+1] } + timeout { perror "timeout\n; break } + eof { break } + } + } + + # This was intended to do any cleanup necessary. It kinda looks like it + # isn't needed, but just in case, please keep it in for now. + gas_finish + + # Did we find what we were looking for? If not, flunk it. + if [expr $x == 8] then { pass $testname } else { fail $testname } +} + +proc do_h8300h_compare {} { + set testname "compareh.s: h8300h compare tests" + set x 0 + + gas_start "compareh.s" "-al" + + # Check each instruction bit pattern to verify it got + # assembled correctly. + while 1 { + expect { + -re " +\[0-9\]+ 0000 A800\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0002 1C08\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0004 79200020\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0008 1D01\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 000a 7A200000\[^\n\]*\n +\[0-9\]+ +0040\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0010 1F81\[^\n\]*\n" { set x [expr $x+1] } + timeout { perror "timeout\n; break } + eof { break } + } + } + + # This was intended to do any cleanup necessary. It kinda looks like it + # isn't needed, but just in case, please keep it in for now. + gas_finish + + # Did we find what we were looking for? If not, flunk it. + if [expr $x == 6] then { pass $testname } else { fail $testname } +} + +proc do_h8300h_decimal {} { + set testname "decimalh.s: h8300h decimal tests" + set x 0 + + gas_start "decimalh.s" "-al" + + # Check each instruction bit pattern to verify it got + # assembled correctly. + while 1 { + expect { + -re " +\[0-9\]+ 0000 0F08\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0002 1F08\[^\n\]*\n" { set x [expr $x+1] } + eof { break } + } + } + + # This was intended to do any cleanup necessary. It kinda looks like it + # isn't needed, but just in case, please keep it in for now. + gas_finish + + # Did we find what we were looking for? If not, flunk it. + if [expr $x == 2] then { pass $testname } else { fail $testname } +} + +proc do_h8300h_incdec {} { + set testname "incdech.s: h8300h incdec tests" + set x 0 + + gas_start "incdech.s" "-al" + + # Check each instruction bit pattern to verify it got + # assembled correctly. + while 1 { + expect { + -re " +\[0-9\]+ 0000 1A08\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0002 1B50\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0004 1BD0\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0006 1B70\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0008 1BF0\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 000a 0A08\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 000c 0B50\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 000e 0BD0\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0010 0B70\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0012 0BF0\[^\n\]*\n" { set x [expr $x+1] } + eof { break } + } + } + + # This was intended to do any cleanup necessary. It kinda looks like it + # isn't needed, but just in case, please keep it in for now. + gas_finish + + # Did we find what we were looking for? If not, flunk it. + if [expr $x == 10] then { pass $testname } else { fail $testname } +} + +proc do_h8300h_divmul {} { + set testname "divmulh.s: h8300h divmul tests" + set x 0 + + gas_start "divmulh.s" "-al" + + # Check each instruction bit pattern to verify it got + # assembled correctly. + while 1 { + expect { + -re " +\[0-9\]+ 0000 5181\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0002 5301\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0004 01D05181\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0008 01D05301\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 000c 5081\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 000e 5201\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0010 01C05081\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0014 01C05201\[^\n\]*\n" { set x [expr $x+1] } + eof { break } + } + } + + # This was intended to do any cleanup necessary. It kinda looks like it + # isn't needed, but just in case, please keep it in for now. + gas_finish + + # Did we find what we were looking for? If not, flunk it. + if [expr $x == 8] then { pass $testname } else { fail $testname } +} + +proc do_h8300h_misc {} { + set testname "misch.s: h8300h misc tests" + set x 0 + + gas_start "misch.s" "-al" + + # Check each instruction bit pattern to verify it got + # assembled correctly. + while 1 { + expect { + -re " +\[0-9\]+ 0000 7B5C598F\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0004 7BD4598F\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0008 0700\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 000a 0308\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 000c 01406900\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0010 01406F00\[^\n\]*\n +\[0-9\]+ +0010\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0016 01407800\[^\n\]*\n +\[0-9\]+ +6B200000\[^\n\]*\n +\[0-9\]+ +0020\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0020 01406D00\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0024 01406B00\[^\n\]*\n +\[0-9\]+ +0000\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 002a 01406B20\[^\n\]*\n +\[0-9\]+ +00000000\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0032 0000\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0034 5670\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0036 5470\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0038 0180\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 003a 0208\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 003c 01406980\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0040 01406F80\[^\n\]*\n +\[0-9\]+ +0010\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0046 01407800\[^\n\]*\n +\[0-9\]+ +6BA00000\[^\n\]*\n +\[0-9\]+ +0020\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0050 01406D80\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0054 01406B80\[^\n\]*\n +\[0-9\]+ +0000\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 005a 01406BA0\[^\n\]*\n +\[0-9\]+ +00000000\[^\n\]*\n" { set x [expr $x+1] } + eof { break } + } + } + + # This was intended to do any cleanup necessary. It kinda looks like it + # isn't needed, but just in case, please keep it in for now. + gas_finish + + # Did we find what we were looking for? If not, flunk it. + if [expr $x == 21] then { pass $testname } else { fail $testname } + + setup_xfail "h8300*-*-*" + fail "h8300h movfpe/movtpe tests" +} + +proc do_h8300h_movb {} { + set testname "movbh.s: h8300h movb tests" + set x 0 + + gas_start "movbh.s" "-al" + + # Check each instruction bit pattern to verify it got + # assembled correctly. + while 1 { + expect { + -re " +\[0-9\]+ 0000 0C89\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0002 F810\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0004 6818\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0006 6E180010\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 000a 78106A28\[^\n\]*\n +\[0-9\]+ +00000020\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0012 6C18\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0014 2810\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0016 6A080000\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 001a 6A280000\[^\n\]*\n +\[0-9\]+ +0000\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0020 6898\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0022 6E980010\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0026 78106AA8\[^\n\]*\n +\[0-9\]+ +00000020\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 002e 6C98\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0030 3810\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0032 6A880000\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0036 6AA80000\[^\n\]*\n +\[0-9\]+ +0000\[^\n\]*\n" { set x [expr $x+1] } + eof { break } + } + } + + # This was intended to do any cleanup necessary. It kinda looks like it + # isn't needed, but just in case, please keep it in for now. + gas_finish + + # Did we find what we were looking for? If not, flunk it. + if [expr $x == 16] then { pass $testname } else { fail $testname } +} + +proc do_h8300h_movw {} { + set testname "movwh.s: h8300h movw tests" + set x 0 + + gas_start "movwh.s" "-al" + + # Check each instruction bit pattern to verify it got + # assembled correctly. + while 1 { + expect { + -re " +\[0-9\]+ 0000 0D01\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0002 79000010\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0006 6910\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0008 6F100010\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 000c 78106B20\[^\n\]*\n +\[0-9\]+ +00000020\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0014 6D10\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0016 6B000000\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 001a 6B200000\[^\n\]*\n +\[0-9\]+ +0000\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0020 6990\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0022 6F900010\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0026 78106BA0\[^\n\]*\n +\[0-9\]+ +00000020\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 002e 6D90\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0030 6B800000\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0034 6BA00000\[^\n\]*\n +\[0-9\]+ +0000\[^\n\]*\n" { set x [expr $x+1] } + eof { break } + } + } + + # This was intended to do any cleanup necessary. It kinda looks like it + # isn't needed, but just in case, please keep it in for now. + gas_finish + + # Did we find what we were looking for? If not, flunk it. + if [expr $x == 14] then { pass $testname } else { fail $testname } +} + +proc do_h8300h_movl {} { + set testname "movlh.s: h8300h movl tests" + set x 0 + + gas_start "movlh.s" "-al" + + # Check each instruction bit pattern to verify it got + # assembled correctly. + while 1 { + expect { + -re " +\[0-9\]+ 0000 0F81\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0002 7A000000\[^\n\]*\n +\[0-9\]+ +0040\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0008 01006910\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 000c 01006F10\[^\n\]*\n +\[0-9\]+ +0010\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0012 01007810\[^\n\]*\n +\[0-9\]+ +6B200000\[^\n\]*\n +\[0-9\]+ +0020\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 001c 01006D10\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0020 01006B00\[^\n\]*\n +\[0-9\]+ +0000\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0026 01006B20\[^\n\]*\n +\[0-9\]+ +00000000\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 002e 01006990\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0032 01006F90\[^\n\]*\n +\[0-9\]+ +0010\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0038 01007890\[^\n\]*\n +\[0-9\]+ +6BA00000\[^\n\]*\n +\[0-9\]+ +0020\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0042 01006D90\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0046 01006B80\[^\n\]*\n +\[0-9\]+ +0000\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 004c 01006BA0\[^\n\]*\n +\[0-9\]+ +00000000\[^\n\]*\n" { set x [expr $x+1] } + eof { break } + } + } + + # This was intended to do any cleanup necessary. It kinda looks like it + # isn't needed, but just in case, please keep it in for now. + gas_finish + + # Did we find what we were looking for? If not, flunk it. + if [expr $x == 14] then { pass $testname } else { fail $testname } +} + +proc do_h8300h_pushpop {} { + set testname "pushpoph.s: h8300h pushpop tests" + set x 0 + + gas_start "pushpoph.s" "-al" + + # Check each instruction bit pattern to verify it got + # assembled correctly. + while 1 { + expect { + -re " +\[0-9\]+ 0000 6D70\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0002 01006D70\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0006 6DF0\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0008 01006DF0\[^\n\]*\n" { set x [expr $x+1] } + eof { break } + } + } + + # This was intended to do any cleanup necessary. It kinda looks like it + # isn't needed, but just in case, please keep it in for now. + gas_finish + + # Did we find what we were looking for? If not, flunk it. + if [expr $x == 4] then { pass $testname } else { fail $testname } +} + +proc do_h8300h_rotate_shift {} { + set testname "rotshh.s: h8300h rotate and shift tests" + set x 0 + + gas_start "rotshh.s" "-al" + + # Check each instruction bit pattern to verify it got + # assembled correctly. + while 1 { + expect { + -re " +\[0-9\]+ 0000 1288\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0002 1290\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0004 12B0\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0006 1388\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0008 1390\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 000a 13B0\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 000c 1208\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 000e 1210\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0010 1230\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0012 1308\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0014 1310\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0016 1330\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0018 1088\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 001a 1090\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 001c 10B0\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 001e 1188\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0020 1190\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0022 11B0\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0024 1008\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0026 1010\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0028 1030\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 002a 1108\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 002c 1110\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 002e 1130\[^\n\]*\n" { set x [expr $x+1] } + eof { break } + } + } + + # This was intended to do any cleanup necessary. It kinda looks like it + # isn't needed, but just in case, please keep it in for now. + gas_finish + + # Did we find what we were looking for? If not, flunk it. + if [expr $x == 24] then { pass $testname } else { fail $testname } +} + +proc do_h8300h_extend {} { + set testname "extendh.s: h8300h extend tests" + set x 0 + + gas_start "extendh.s" "-al" + + # Check each instruction bit pattern to verify it got + # assembled correctly. + while 1 { + expect { + -re " +\[0-9\]+ 0000 17D0\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0002 17F0\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0004 1750\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0006 1770\[^\n\]*\n" { set x [expr $x+1] } + eof { break } + } + } + + # This was intended to do any cleanup necessary. It kinda looks like it + # isn't needed, but just in case, please keep it in for now. + gas_finish + + # Did we find what we were looking for? If not, flunk it. + if [expr $x == 4] then { pass $testname } else { fail $testname } +} + +proc do_h8300s_add_sub {} { + set testname "addsubs.s: h8300s add/sub tests" + set x 0 + + gas_start "addsubs.s" "-al" + + # Check each instruction bit pattern to verify it got + # assembled correctly. + while 1 { + expect { + -re " +\[0-9\]+ 0000 8910\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0002 0819\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0004 79110020\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0008 0912\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 000a 7A110000\[^\n\]*\n +\[0-9\]+ +0040\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0010 0A92\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0012 0B04\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0014 0B85\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0016 0B96\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0018 0E89\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 001a 9210\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 001c 1889\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 001e 79310010\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0022 1901\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0024 7A310000\[^\n\]*\n +\[0-9\]+ +0040\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 002a 1A92\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 002c 1B04\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 002e 1B85\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0030 1B96\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0032 1E89\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0034 B210\[^\n\]*\n" { set x [expr $x+1] } + timeout { perror "timeout\n; break } + eof { break } + } + } + + # This was intended to do any cleanup necessary. It kinda looks like it + # isn't needed, but just in case, please keep it in for now. + gas_finish + + # Did we find what we were looking for? If not, flunk it. + if [expr $x == 21] then { pass $testname } else { fail $testname } +} + +proc do_h8300s_logical {} { + set testname "logicals.s: h8300s logical tests" + set x 0 + + gas_start "logicals.s" "-al" + + # Check each instruction bit pattern to verify it got + # assembled correctly. + while 1 { + expect { + -re " +\[0-9\]+ 0000 E910\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0002 1691\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0004 79610020\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0008 6611\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 000a 7A610000\[^\n\]*\n +\[0-9\]+ +0040\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0010 01F06611\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0014 0610\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0016 01410610\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 001a C810\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 001c 1498\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 001e 79410020\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0022 6411\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0024 7A410000\[^\n\]*\n +\[0-9\]+ +0040\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 002a 01F06411\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 002e 0410\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0030 01410410\[^\n\]*\n" { set x [expr $x+1] } + + -re " +\[0-9\]+ 0034 D810\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0036 1589\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0038 79510020\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 003c 6511\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 003e 7A510000\[^\n\]*\n +\[0-9\]+ +0040\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0044 01F06511\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0048 0510\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 004a 01410510\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 004e 1788\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0050 1790\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0052 17B0\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0054 1708\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0056 1710\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0058 1730\[^\n\]*\n" { set x [expr $x+1] } + timeout { perror "timeout\n; break } + eof { break } + } + } + + # This was intended to do any cleanup necessary. It kinda looks like it + # isn't needed, but just in case, please keep it in for now. + gas_finish + + # Did we find what we were looking for? If not, flunk it. + if [expr $x == 30] then { pass $testname } else { fail $testname } +} + +proc do_h8300s_cbranch {} { + set testname "cbranchs.s: h8300s conditional branch tests" + set x 0 + + gas_start "cbranchs.s" "-al" + + # Check each instruction bit pattern to verify it got + # assembled correctly. + while 1 { + expect { + -re " +\[0-9\]+ 0000 4000\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0002 4000\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0004 4100\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0006 4100\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0008 4200\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 000a 4300\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 000c 4400\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 000e 4400\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0010 4500\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0012 4500\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0014 4600\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0016 4700\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0018 4800\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 001a 4900\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 001c 4A00\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 001e 4B00\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0020 4C00\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0022 4D00\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0024 4E00\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0026 4F00\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0028 58000000\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 002c 58000000\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0030 58100000\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0034 58100000\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0038 58200000\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 003c 58300000\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0040 58400000\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0044 58400000\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0048 58500000\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 004c 58500000\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0050 58600000\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0054 58700000\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0058 58800000\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 005c 58900000\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0060 58A00000\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0064 58B00000\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0068 58C00000\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 006c 58D00000\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0070 58E00000\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0074 58F00000\[^\n\]*\n" { set x [expr $x+1] } + timeout { perror "timeout\n; break } + eof { break } + } + } + + # This was intended to do any cleanup necessary. It kinda looks like it + # isn't needed, but just in case, please keep it in for now. + gas_finish + + # Did we find what we were looking for? If not, flunk it. + if [expr $x == 40] then { pass $testname } else { fail $testname } +} +proc do_h8300s_bitops1 {} { + set testname "bitops1s.s: h8300s bitops tests #1" + set x 0 + + gas_start "bitops1s.s" "-al" + + # Check each instruction bit pattern to verify it got + # assembled correctly. + while 1 { + expect { + -re " +\[0-9\]+ 0000 7608\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0002 7C007600\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0006 7E407600\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 000a 6A100080\[^\n\]*\n +\[0-9\]+ +7600" { set x [expr $x+1] } + -re " +\[0-9\]+ 0010 6A300001\[^\n\]*\n +\[0-9\]+ +00007600" { set x [expr $x+1] } + -re " +\[0-9\]+ 0018 7208\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 001a 7D007200\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 001e 7F407200\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0022 6A180080\[^\n\]*\n +\[0-9\]+ +7200" { set x [expr $x+1] } + -re " +\[0-9\]+ 0028 6A380001\[^\n\]*\n +\[0-9\]+ +00007200" { set x [expr $x+1] } + -re " +\[0-9\]+ 0030 6298\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0032 7D006290\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0036 7F406290\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 003a 6A180080\[^\n\]*\n +\[0-9\]+ +6290" { set x [expr $x+1] } + -re " +\[0-9\]+ 0040 6A380001\[^\n\]*\n +\[0-9\]+ +00006290" { set x [expr $x+1] } + -re " +\[0-9\]+ 0048 7688\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 004a 7C007680\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 004e 7E407680\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0052 6A100080\[^\n\]*\n +\[0-9\]+ +7680" { set x [expr $x+1] } + -re " +\[0-9\]+ 0058 6A300001\[^\n\]*\n +\[0-9\]+ +00007680" { set x [expr $x+1] } + -re " +\[0-9\]+ 0060 7788\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0062 7C007780\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0066 7E407780\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 006a 6A100080\[^\n\]*\n +\[0-9\]+ +7780" { set x [expr $x+1] } + -re " +\[0-9\]+ 0070 6A300001\[^\n\]*\n +\[0-9\]+ +00007780" { set x [expr $x+1] } + timeout { perror "timeout\n; break } + eof { break } + } + } + + # This was intended to do any cleanup necessary. It kinda looks like it + # isn't needed, but just in case, please keep it in for now. + gas_finish + + # Did we find what we were looking for? If not, flunk it. + if [expr $x == 25] then { pass $testname } else { fail $testname } +} + +proc do_h8300s_bitops2 {} { + set testname "bitops2s.s: h8300s bitops tests #2" + set x 0 + + gas_start "bitops2s.s" "-al" + + # Check each instruction bit pattern to verify it got + # assembled correctly. + while 1 { + expect { + -re " +\[0-9\]+ 0000 7488\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0002 7C007480\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0006 7E407480\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 000a 6A100080\[^\n\]*\n +\[0-9\]+ +7480" { set x [expr $x+1] } + -re " +\[0-9\]+ 0010 6A300001\[^\n\]*\n +\[0-9\]+ +00007480" { set x [expr $x+1] } + -re " +\[0-9\]+ 0018 6788\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 001a 7D006780\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 001e 7F406780\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0022 6A180080\[^\n\]*\n +\[0-9\]+ +6780" { set x [expr $x+1] } + -re " +\[0-9\]+ 0028 6A380001\[^\n\]*\n +\[0-9\]+ +00006780" { set x [expr $x+1] } + + -re " +\[0-9\]+ 0030 7588\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0032 7C007580\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0036 7E407580\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 003a 6A100080\[^\n\]*\n +\[0-9\]+ +7580" { set x [expr $x+1] } + -re " +\[0-9\]+ 0040 6A300001\[^\n\]*\n +\[0-9\]+ +00007580" { set x [expr $x+1] } + -re " +\[0-9\]+ 0048 7708\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 004a 7C007700\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 004e 7E407700\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0052 6A100080\[^\n\]*\n +\[0-9\]+ +7700" { set x [expr $x+1] } + -re " +\[0-9\]+ 0058 6A300001\[^\n\]*\n +\[0-9\]+ +00007700" { set x [expr $x+1] } + timeout { perror "timeout\n; break } + eof { break } + } + } + + # This was intended to do any cleanup necessary. It kinda looks like it + # isn't needed, but just in case, please keep it in for now. + gas_finish + + # Did we find what we were looking for? If not, flunk it. + if [expr $x == 20] then { pass $testname } else { fail $testname } +} + +proc do_h8300s_bitops3 {} { + set testname "bitops3s.s: h8300s bitops tests #3" + set x 0 + + gas_start "bitops3s.s" "-al" + + # Check each instruction bit pattern to verify it got + # assembled correctly. + while 1 { + expect { + -re " +\[0-9\]+ 0000 7108\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0002 7D007100\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0006 7F407100\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 000a 6A180080\[^\n\]*\n +\[0-9\]+ +7100" { set x [expr $x+1] } + -re " +\[0-9\]+ 0010 6A380001\[^\n\]*\n +\[0-9\]+ +00007100" { set x [expr $x+1] } + -re " +\[0-9\]+ 0018 6198\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 001a 7D006190\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 001e 7F406190\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0022 6A180080\[^\n\]*\n +\[0-9\]+ +6190" { set x [expr $x+1] } + -re " +\[0-9\]+ 0028 6A380001\[^\n\]*\n +\[0-9\]+ +00006190" { set x [expr $x+1] } + -re " +\[0-9\]+ 0030 7008\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0032 7D007000\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0036 7F407000\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 003a 6A180080\[^\n\]*\n +\[0-9\]+ +7000" { set x [expr $x+1] } + -re " +\[0-9\]+ 0040 6A380001\[^\n\]*\n +\[0-9\]+ +00007000" { set x [expr $x+1] } + -re " +\[0-9\]+ 0048 6098\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 004a 7D006090\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 004e 7F406090\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0052 6A180080\[^\n\]*\n +\[0-9\]+ +6090" { set x [expr $x+1] } + -re " +\[0-9\]+ 0058 6A380001\[^\n\]*\n +\[0-9\]+ +00006090" { set x [expr $x+1] } + timeout { perror "timeout\n; break } + eof { break } + } + } + + # This was intended to do any cleanup necessary. It kinda looks like it + # isn't needed, but just in case, please keep it in for now. + gas_finish + + # Did we find what we were looking for? If not, flunk it. + if [expr $x == 20] then { pass $testname } else { fail $testname } +} + +proc do_h8300s_bitops4 {} { + set testname "bitops4s.s: h8300s bitops tests #4" + set x 0 + + gas_start "bitops4s.s" "-al" + + # Check each instruction bit pattern to verify it got + # assembled correctly. + while 1 { + expect { + -re " +\[0-9\]+ 0000 7408\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0002 7C007400\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0006 7E407400\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 000a 6A100080\[^\n\]*\n +\[0-9\]+ +7400" { set x [expr $x+1] } + -re " +\[0-9\]+ 0010 6A300001\[^\n\]*\n +\[0-9\]+ +00007400" { set x [expr $x+1] } + -re " +\[0-9\]+ 0018 6708\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 001a 7D006700\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 001e 7F406700\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0022 6A180080\[^\n\]*\n +\[0-9\]+ +6700" { set x [expr $x+1] } + -re " +\[0-9\]+ 0028 6A380001\[^\n\]*\n +\[0-9\]+ +00006700" { set x [expr $x+1] } + -re " +\[0-9\]+ 0030 7308\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0032 7C007300\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0036 7E407300\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 003a 6A100080\[^\n\]*\n +\[0-9\]+ +7300" { set x [expr $x+1] } + -re " +\[0-9\]+ 0040 6A300001\[^\n\]*\n +\[0-9\]+ +00007300" { set x [expr $x+1] } + -re " +\[0-9\]+ 0048 6398\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 004a 7C006390\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 004e 7E406390\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0052 6A100080\[^\n\]*\n +\[0-9\]+ +6390" { set x [expr $x+1] } + -re " +\[0-9\]+ 0058 6A300001\[^\n\]*\n +\[0-9\]+ +00006390" { set x [expr $x+1] } + -re " +\[0-9\]+ 0060 7508\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0062 7C007500\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0066 7E407500\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 006a 6A100080\[^\n\]*\n +\[0-9\]+ +7500" { set x [expr $x+1] } + -re " +\[0-9\]+ 0070 6A300001\[^\n\]*\n +\[0-9\]+ +00007500" { set x [expr $x+1] } + timeout { perror "timeout\n; break } + eof { break } + } + } + + # This was intended to do any cleanup necessary. It kinda looks like it + # isn't needed, but just in case, please keep it in for now. + gas_finish + + # Did we find what we were looking for? If not, flunk it. + if [expr $x == 25] then { pass $testname } else { fail $testname } +} + +proc do_h8300s_branch {} { + set testname "branchs.s: h8300s branch tests" + set x 0 + + gas_start "branchs.s" "-al" + + # Check each instruction bit pattern to verify it got + # assembled correctly. + while 1 { + expect { + -re " +\[0-9\]+ 0000 5500\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0002 5C000000\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0006 5A000000\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 000a 5900\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 000c 5B00\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 000e 5E000000\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0012 5D00\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0014 5F00\[^\n\]*\n" { set x [expr $x+1] } + timeout { perror "timeout\n; break } + eof { break } + } + } + + # This was intended to do any cleanup necessary. It kinda looks like it + # isn't needed, but just in case, please keep it in for now. + gas_finish + + # Did we find what we were looking for? If not, flunk it. + if [expr $x == 8] then { pass $testname } else { fail $testname } +} + +proc do_h8300s_compare {} { + set testname "compares.s: h8300s compare tests" + set x 0 + + gas_start "compares.s" "-al" + + # Check each instruction bit pattern to verify it got + # assembled correctly. + while 1 { + expect { + -re " +\[0-9\]+ 0000 A800\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0002 1C08\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0004 79200020\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0008 1D01\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 000a 7A200000\[^\n\]*\n +\[0-9\]+ +0040\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0010 1F81\[^\n\]*\n" { set x [expr $x+1] } + timeout { perror "timeout\n; break } + eof { break } + } + } + + # This was intended to do any cleanup necessary. It kinda looks like it + # isn't needed, but just in case, please keep it in for now. + gas_finish + + # Did we find what we were looking for? If not, flunk it. + if [expr $x == 6] then { pass $testname } else { fail $testname } +} + +proc do_h8300s_decimal {} { + set testname "decimals.s: h8300s decimal tests" + set x 0 + + gas_start "decimals.s" "-al" + + # Check each instruction bit pattern to verify it got + # assembled correctly. + while 1 { + expect { + -re " +\[0-9\]+ 0000 0F08\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0002 1F08\[^\n\]*\n" { set x [expr $x+1] } + eof { break } + } + } + + # This was intended to do any cleanup necessary. It kinda looks like it + # isn't needed, but just in case, please keep it in for now. + gas_finish + + # Did we find what we were looking for? If not, flunk it. + if [expr $x == 2] then { pass $testname } else { fail $testname } +} + +proc do_h8300s_incdec {} { + set testname "incdecs.s: h8300s incdec tests" + set x 0 + + gas_start "incdecs.s" "-al" + + # Check each instruction bit pattern to verify it got + # assembled correctly. + while 1 { + expect { + -re " +\[0-9\]+ 0000 1A08\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0002 1B50\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0004 1BD0\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0006 1B70\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0008 1BF0\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 000a 0A08\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 000c 0B50\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 000e 0BD0\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0010 0B70\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0012 0BF0\[^\n\]*\n" { set x [expr $x+1] } + eof { break } + } + } + + # This was intended to do any cleanup necessary. It kinda looks like it + # isn't needed, but just in case, please keep it in for now. + gas_finish + + # Did we find what we were looking for? If not, flunk it. + if [expr $x == 10] then { pass $testname } else { fail $testname } +} + +proc do_h8300s_divmul {} { + set testname "divmuls.s: h8300s divmul tests" + set x 0 + + gas_start "divmuls.s" "-al" + + # Check each instruction bit pattern to verify it got + # assembled correctly. + while 1 { + expect { + -re " +\[0-9\]+ 0000 5181\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0002 5301\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0004 01D05181\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0008 01D05301\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 000c 5081\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 000e 5201\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0010 01C05081\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0014 01C05201\[^\n\]*\n" { set x [expr $x+1] } + eof { break } + } + } + + # This was intended to do any cleanup necessary. It kinda looks like it + # isn't needed, but just in case, please keep it in for now. + gas_finish + + # Did we find what we were looking for? If not, flunk it. + if [expr $x == 8] then { pass $testname } else { fail $testname } +} + +proc do_h8300s_misc {} { + set testname "miscs.s: h8300s misc tests" + set x 0 + + gas_start "miscs.s" "-al" + + # Check each instruction bit pattern to verify it got + # assembled correctly. + while 1 { + expect { + -re " +\[0-9\]+ 0000 7B5C598F\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0004 7BD4598F\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0008 0700\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 000a 0308\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 000c 01410700\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0010 0318\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0012 01406900\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0016 01406F00\[^\n\]*\n +\[0-9\]+ +0010\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 001c 01407800\[^\n\]*\n +\[0-9\]+ +6B200000\[^\n\]*\n +\[0-9\]+ +0020\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0026 01406D00\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 002a 01406B00\[^\n\]*\n +\[0-9\]+ +0000\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0030 01406B20\[^\n\]*\n +\[0-9\]+ +00000000\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0038 01416900\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 003c 01416F00\[^\n\]*\n +\[0-9\]+ +0010\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0042 01417800\[^\n\]*\n +\[0-9\]+ +6B200000\[^\n\]*\n +\[0-9\]+ +0020\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 004c 01416D00\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0050 01416B00\[^\n\]*\n +\[0-9\]+ +0000\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0056 01416B20\[^\n\]*\n +\[0-9\]+ +00000000\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 005e 0000\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0060 5670\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0062 5470\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0064 0180\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0066 0208\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0068 0218\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 006a 01406980\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 006e 01406F80\[^\n\]*\n +\[0-9\]+ +0010\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0074 01407800\[^\n\]*\n +\[0-9\]+ +6BA00000\[^\n\]*\n +\[0-9\]+ +0020\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 007e 01406D80\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0082 01406B80\[^\n\]*\n +\[0-9\]+ +0000\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0088 01406BA0\[^\n\]*\n +\[0-9\]+ +00000000\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0090 01416980\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0094 01416F80\[^\n\]*\n +\[0-9\]+ +0010\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 009a 01417800\[^\n\]*\n +\[0-9\]+ +6BA00000\[^\n\]*\n +\[0-9\]+ +0020\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 00a4 01416D80\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 00a8 01416B80\[^\n\]*\n +\[0-9\]+ +0000\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 00ae 01416BA0\[^\n\]*\n +\[0-9\]+ +00000000\[^\n\]*\n" { set x [expr $x+1] } + eof { break } + } + } + + # This was intended to do any cleanup necessary. It kinda looks like it + # isn't needed, but just in case, please keep it in for now. + gas_finish + + # Did we find what we were looking for? If not, flunk it. + if [expr $x == 36] then { pass $testname } else { fail $testname } + + setup_xfail "h8300*-*-*" + fail "h8300s movfpe/movtpe tests" +} + +proc do_h8300s_movb {} { + set testname "movbs.s: h8300s movb tests" + set x 0 + + gas_start "movbs.s" "-al" + + # Check each instruction bit pattern to verify it got + # assembled correctly. + while 1 { + expect { + -re " +\[0-9\]+ 0000 0C89\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0002 F810\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0004 6818\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0006 6E180010\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 000a 78106A28\[^\n\]*\n +\[0-9\]+ +00000020\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0012 6C18\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0014 2810\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0016 6A080000\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 001a 6A280000\[^\n\]*\n +\[0-9\]+ +0000\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0020 6898\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0022 6E980010\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0026 78106AA8\[^\n\]*\n +\[0-9\]+ +00000020\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 002e 6C98\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0030 3810\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0032 6A880000\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0036 6AA80000\[^\n\]*\n +\[0-9\]+ +0000\[^\n\]*\n" { set x [expr $x+1] } + eof { break } + } + } + + # This was intended to do any cleanup necessary. It kinda looks like it + # isn't needed, but just in case, please keep it in for now. + gas_finish + + # Did we find what we were looking for? If not, flunk it. + if [expr $x == 16] then { pass $testname } else { fail $testname } +} + +proc do_h8300s_movw {} { + set testname "movws.s: h8300s movw tests" + set x 0 + + gas_start "movws.s" "-al" + + # Check each instruction bit pattern to verify it got + # assembled correctly. + while 1 { + expect { + -re " +\[0-9\]+ 0000 0D01\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0002 79000010\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0006 6910\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0008 6F100010\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 000c 78106B20\[^\n\]*\n +\[0-9\]+ +00000020\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0014 6D10\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0016 6B000000\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 001a 6B200000\[^\n\]*\n +\[0-9\]+ +0000\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0020 6990\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0022 6F900010\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0026 78106BA0\[^\n\]*\n +\[0-9\]+ +00000020\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 002e 6D90\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0030 6B800000\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0034 6BA00000\[^\n\]*\n +\[0-9\]+ +0000\[^\n\]*\n" { set x [expr $x+1] } + eof { break } + } + } + + # This was intended to do any cleanup necessary. It kinda looks like it + # isn't needed, but just in case, please keep it in for now. + gas_finish + + # Did we find what we were looking for? If not, flunk it. + if [expr $x == 14] then { pass $testname } else { fail $testname } +} + + +proc do_h8300s_movl {} { + set testname "movls.s: h8300s movl tests" + set x 0 + + gas_start "movls.s" "-al" + + # Check each instruction bit pattern to verify it got + # assembled correctly. + while 1 { + expect { + -re " +\[0-9\]+ 0000 0F81\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0002 7A000000\[^\n\]*\n +\[0-9\]+ +0040\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0008 01006910\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 000c 01006F10\[^\n\]*\n +\[0-9\]+ +0010\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0012 01007810\[^\n\]*\n +\[0-9\]+ +6B200000\[^\n\]*\n +\[0-9\]+ +0020\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 001c 01006D10\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0020 01006B00\[^\n\]*\n +\[0-9\]+ +0000\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0026 01006B20\[^\n\]*\n +\[0-9\]+ +00000000\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 002e 01006990\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0032 01006F90\[^\n\]*\n +\[0-9\]+ +0010\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0038 01007890\[^\n\]*\n +\[0-9\]+ +6BA00000\[^\n\]*\n +\[0-9\]+ +0020\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0042 01006D90\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0046 01006B80\[^\n\]*\n +\[0-9\]+ +0000\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 004c 01006BA0\[^\n\]*\n +\[0-9\]+ +00000000\[^\n\]*\n" { set x [expr $x+1] } + eof { break } + } + } + + # This was intended to do any cleanup necessary. It kinda looks like it + # isn't needed, but just in case, please keep it in for now. + gas_finish + + # Did we find what we were looking for? If not, flunk it. + if [expr $x == 14] then { pass $testname } else { fail $testname } +} + +proc do_h8300s_pushpop {} { + set testname "pushpops.s: h8300s pushpop tests" + set x 0 + + gas_start "pushpops.s" "-al" + + # Check each instruction bit pattern to verify it got + # assembled correctly. + while 1 { + expect { + -re " +\[0-9\]+ 0000 6D70\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0002 01006D70\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0006 6DF0\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0008 01006DF0\[^\n\]*\n" { set x [expr $x+1] } + eof { break } + } + } + + # This was intended to do any cleanup necessary. It kinda looks like it + # isn't needed, but just in case, please keep it in for now. + gas_finish + + # Did we find what we were looking for? If not, flunk it. + if [expr $x == 4] then { pass $testname } else { fail $testname } +} + +proc do_h8300s_rotate_shift {} { + set testname "rotshs.s: h8300s rotate and shift tests" + set x 0 + + gas_start "rotshs.s" "-al" + + # Check each instruction bit pattern to verify it got + # assembled correctly. + while 1 { + expect { + -re " +\[0-9\]+ 0000 1288\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0002 12C8\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0004 1290\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0006 12D0\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0008 12B0\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 000a 12F0\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 000c 1388\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 000e 13C8\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0010 1390\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0012 13D0\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0014 13B0\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0016 13F0\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0018 1208\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 001a 1248\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 001c 1210\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 001e 1250\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0020 1230\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0022 1270\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0024 1308\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0026 1348\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0028 1310\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 002a 1350\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 002c 1330\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 002e 1370\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0030 1088\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0032 10C8\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0034 1090\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0036 10D0\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0038 10B0\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 003a 10F0\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 003c 1188\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 003e 11C8\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0040 1190\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0042 11D0\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0044 11B0\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0046 11F0\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0048 1008\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 004a 1048\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 004c 1010\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 004e 1050\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0050 1030\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0052 1070\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0054 1108\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0056 1148\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0058 1110\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 005a 1150\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 005c 1130\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 005e 1170\[^\n\]*\n" { set x [expr $x+1] } + eof { break } + } + } + + # This was intended to do any cleanup necessary. It kinda looks like it + # isn't needed, but just in case, please keep it in for now. + gas_finish + + # Did we find what we were looking for? If not, flunk it. + if [expr $x == 48] then { pass $testname } else { fail $testname } +} + +proc do_h8300s_extend {} { + set testname "extends.s: h8300s extend tests" + set x 0 + + gas_start "extends.s" "-al" + + # Check each instruction bit pattern to verify it got + # assembled correctly. + while 1 { + expect { + -re " +\[0-9\]+ 0000 17D0\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0002 17F0\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0004 1750\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0006 1770\[^\n\]*\n" { set x [expr $x+1] } + eof { break } + } + } + + # This was intended to do any cleanup necessary. It kinda looks like it + # isn't needed, but just in case, please keep it in for now. + gas_finish + + # Did we find what we were looking for? If not, flunk it. + if [expr $x == 4] then { pass $testname } else { fail $testname } +} + +proc do_h8300s_mac {} { + set testname "macs.s: h8300s mac tests" + set x 0 + + gas_start "macs.s" "-al" + + # Check each instruction bit pattern to verify it got + # assembled correctly. + while 1 { + expect { + -re " +\[0-9\]+ 0000 01A0\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0002 0320\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0004 0331\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0006 01606D01\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 000a 0220\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 000c 0231\[^\n\]*\n" { set x [expr $x+1] } + eof { break } + } + } + + # This was intended to do any cleanup necessary. It kinda looks like it + # isn't needed, but just in case, please keep it in for now. + gas_finish + + # Did we find what we were looking for? If not, flunk it. + if [expr $x == 6] then { pass $testname } else { fail $testname } +} + +proc do_h8300s_multiple {} { + set testname "multiples.s: h8300s multiple tests" + set x 0 + + gas_start "multiples.s" "-al" + + # Check each instruction bit pattern to verify it got + # assembled correctly. + while 1 { + expect { + -re " +\[0-9\]+ 0000 01106D71\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0004 01206D72\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0008 01306D73\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 000c 01106DF0\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0010 01206DF0\[^\n\]*\n" { set x [expr $x+1] } + -re " +\[0-9\]+ 0014 01306DF0\[^\n\]*\n" { set x [expr $x+1] } + eof { break } + } + } + + # This was intended to do any cleanup necessary. It kinda looks like it + # isn't needed, but just in case, please keep it in for now. + gas_finish + + # Did we find what we were looking for? If not, flunk it. + if [expr $x == 6] then { pass $testname } else { fail $testname } +} + +proc do_h8300h_mov32bug {} { + set testname "mov32bug.s: h8300h mov32bug test" + set x 0 + + if [gas_test_old "mov32bug.s" "" "Proper relocation for mov.l (part 1)"] then { + objdump_start_no_subdir "a.out" "-r" + + while 1 { + expect { + -re "00000002\[^\n\]*32\[^\n\]*_a.0x0*88ca6c00\[^\n\]*\n" + { set x [expr $x+1] } + timeout { perror "timeout\n; break } + eof { break } + } + } + } + + # This was intended to do any cleanup necessary. It kinda looks like it + # isn't needed, but just in case, please keep it in for now. + objdump_finish + + # Did we find what we were looking for? If not, flunk it. + if [expr $x == 1] then { pass $testname } else { fail $testname } +} + +if [istarget h8300*-*-*] then { + # Test the basic h8300 instruction parser + do_h8300_add_sub + do_h8300_logical + do_h8300_cbranch + do_h8300_bitops1 + do_h8300_bitops2 + do_h8300_bitops3 + do_h8300_bitops4 + do_h8300_branch + do_h8300_compare + do_h8300_decimal + do_h8300_incdec + do_h8300_divmul + do_h8300_misc + do_h8300_movb + do_h8300_movw + do_h8300_pushpop + do_h8300_rotate_shift + + # Now test the h8300h instruction parser + do_h8300h_add_sub + do_h8300h_logical + do_h8300h_cbranch + do_h8300h_bitops1 + do_h8300h_bitops2 + do_h8300h_bitops3 + do_h8300h_bitops4 + do_h8300h_branch + do_h8300h_compare + do_h8300h_decimal + do_h8300h_incdec + do_h8300h_divmul + do_h8300h_misc + do_h8300h_movb + do_h8300h_movw + do_h8300h_movl + do_h8300_pushpop + do_h8300h_rotate_shift + do_h8300h_extend + + # Now test the h8300s instruction parser + do_h8300s_add_sub + do_h8300s_logical + do_h8300s_cbranch + do_h8300s_bitops1 + do_h8300s_bitops2 + do_h8300s_bitops3 + do_h8300s_bitops4 + do_h8300s_branch + do_h8300s_compare + do_h8300s_decimal + do_h8300s_incdec + do_h8300s_divmul + do_h8300s_misc + do_h8300s_movb + do_h8300s_movw + do_h8300s_movl + do_h8300_pushpop + do_h8300s_rotate_shift + do_h8300s_extend + do_h8300s_mac + do_h8300s_multiple + + do_h8300h_mov32bug + + # Now some random tests + set svr4pic [expr [istarget *-*-elf*] || [istarget *-*-irix5*] ] + set empic [expr [istarget *-*-ecoff*] || [istarget *-*-ultrix*] || [istarget *-*-irix\[1-4\]*] ] + set aout [expr [istarget *-*-bsd*] || [istarget *-*-netbsd*]] + + run_dump_test "ffxx1" + gas_test "cmpsi2.s" "" "" "cmpsi2.s" +} diff --git a/gas/testsuite/gas/h8300/incdec.s b/gas/testsuite/gas/h8300/incdec.s new file mode 100644 index 0000000..2618827 --- /dev/null +++ b/gas/testsuite/gas/h8300/incdec.s @@ -0,0 +1,5 @@ + .text +h8300_incdec: + dec r0l + inc r0l + diff --git a/gas/testsuite/gas/h8300/incdech.s b/gas/testsuite/gas/h8300/incdech.s new file mode 100644 index 0000000..bb93fc5 --- /dev/null +++ b/gas/testsuite/gas/h8300/incdech.s @@ -0,0 +1,14 @@ + .h8300h + .text +h8300h_incdec: + dec.b r0l + dec.w #1,r0 + dec.w #2,r0 + dec.l #1,er0 + dec.l #2,er0 + inc.b r0l + inc.w #1,r0 + inc.w #2,r0 + inc.l #1,er0 + inc.l #2,er0 + diff --git a/gas/testsuite/gas/h8300/incdecs.s b/gas/testsuite/gas/h8300/incdecs.s new file mode 100644 index 0000000..2345708 --- /dev/null +++ b/gas/testsuite/gas/h8300/incdecs.s @@ -0,0 +1,14 @@ + .h8300s + .text +h8300s_incdec: + dec.b r0l + dec.w #1,r0 + dec.w #2,r0 + dec.l #1,er0 + dec.l #2,er0 + inc.b r0l + inc.w #1,r0 + inc.w #2,r0 + inc.l #1,er0 + inc.l #2,er0 + diff --git a/gas/testsuite/gas/h8300/logical.s b/gas/testsuite/gas/h8300/logical.s new file mode 100644 index 0000000..3f7e3b7 --- /dev/null +++ b/gas/testsuite/gas/h8300/logical.s @@ -0,0 +1,14 @@ + .text +h8300_logical: + and #16,r1l + and r1l,r1h + andc #16,ccr + or #16,r0l + or r1l,r0l + orc #16,ccr + xor #16,r0l + xor r0l,r1l + xorc #16,ccr + neg r0l + not r0l + diff --git a/gas/testsuite/gas/h8300/logicalh.s b/gas/testsuite/gas/h8300/logicalh.s new file mode 100644 index 0000000..9e95f11 --- /dev/null +++ b/gas/testsuite/gas/h8300/logicalh.s @@ -0,0 +1,31 @@ + .h8300h + .text +h8300h_logical: + and.b #16,r1l + and.b r1l,r1h + and.w #32,r1 + and.w r1,r1 + and.l #64,er1 + and.l er1,er1 + andc #16,ccr + or.b #16,r0l + or.b r1l,r0l + or.w #32,r1 + or.w r1,r1 + or.l #64,er1 + or.l er1,er1 + orc #16,ccr + xor.b #16,r0l + xor.b r0l,r1l + xor.w #32,r1 + xor.w r1,r1 + xor.l #64,er1 + xor.l er1,er1 + xorc #16,ccr + neg.b r0l + neg.w r0 + neg.l er0 + not.b r0l + not.w r0 + not.l er0 + diff --git a/gas/testsuite/gas/h8300/logicals.s b/gas/testsuite/gas/h8300/logicals.s new file mode 100644 index 0000000..c3c4cba --- /dev/null +++ b/gas/testsuite/gas/h8300/logicals.s @@ -0,0 +1,34 @@ + .h8300s + .text +h8300s_logical: + and.b #16,r1l + and.b r1l,r1h + and.w #32,r1 + and.w r1,r1 + and.l #64,er1 + and.l er1,er1 + andc #16,ccr + andc #16,exr + or.b #16,r0l + or.b r1l,r0l + or.w #32,r1 + or.w r1,r1 + or.l #64,er1 + or.l er1,er1 + orc #16,ccr + orc #16,exr + xor.b #16,r0l + xor.b r0l,r1l + xor.w #32,r1 + xor.w r1,r1 + xor.l #64,er1 + xor.l er1,er1 + xorc #16,ccr + xorc #16,exr + neg.b r0l + neg.w r0 + neg.l er0 + not.b r0l + not.w r0 + not.l er0 + diff --git a/gas/testsuite/gas/h8300/macs.s b/gas/testsuite/gas/h8300/macs.s new file mode 100644 index 0000000..e2df6dd --- /dev/null +++ b/gas/testsuite/gas/h8300/macs.s @@ -0,0 +1,11 @@ + .h8300s + .text +h8300s_mac: + clrmac + ldmac er0,mach + ldmac er1,macl + mac @er0+,@er1+ + stmac mach,er0 + stmac macl,er1 + + diff --git a/gas/testsuite/gas/h8300/misc.s b/gas/testsuite/gas/h8300/misc.s new file mode 100644 index 0000000..1f6f808 --- /dev/null +++ b/gas/testsuite/gas/h8300/misc.s @@ -0,0 +1,13 @@ + .text +h8300_misc: + eepmov + ldc #0,ccr + ldc r0l,ccr +; movfpe 16:16,r0l +; movtpe r0l,16:16 + nop + rte + rts + sleep + stc ccr,r0l + diff --git a/gas/testsuite/gas/h8300/misch.s b/gas/testsuite/gas/h8300/misch.s new file mode 100644 index 0000000..f7ecb3d --- /dev/null +++ b/gas/testsuite/gas/h8300/misch.s @@ -0,0 +1,27 @@ + .h8300h + .text +h8300h_misc: + eepmov.b + eepmov.w + ldc.b #0,ccr + ldc.b r0l,ccr + ldc.w @er0,ccr + ldc.w @(16:16,er0),ccr + ldc.w @(32:24,er0),ccr + ldc.w @er0+,ccr + ldc.w @h8300h_misc:16,ccr + ldc.w @h8300h_misc:24,ccr +; movfpe 16:16,r0l +; movtpe r0l,16:16 + nop + rte + rts + sleep + stc.b ccr,r0l + stc.w ccr,@er0 + stc.w ccr,@(16:16,er0) + stc.w ccr,@(32:24,er0) + stc.w ccr,@-er0 + stc.w ccr,@h8300h_misc:16 + stc.w ccr,@h8300h_misc:24 + diff --git a/gas/testsuite/gas/h8300/miscs.s b/gas/testsuite/gas/h8300/miscs.s new file mode 100644 index 0000000..d37a177 --- /dev/null +++ b/gas/testsuite/gas/h8300/miscs.s @@ -0,0 +1,41 @@ + .h8300s + .text +h8300s_misc: + eepmov.b + eepmov.w + ldc.b #0,ccr + ldc.b r0l,ccr + ldc.b #0,exr + ldc.b r0l,exr + ldc.w @er0,ccr + ldc.w @(16:16,er0),ccr + ldc.w @(32:32,er0),ccr + ldc.w @er0+,ccr + ldc.w @h8300s_misc:16,ccr + ldc.w @h8300s_misc:32,ccr + ldc.w @er0,exr + ldc.w @(16:16,er0),exr + ldc.w @(32:32,er0),exr + ldc.w @er0+,exr + ldc.w @h8300s_misc:16,exr + ldc.w @h8300s_misc:32,exr +; movfpe 16:16,r0l +; movtpe r0l,16:16 + nop + rte + rts + sleep + stc.b ccr,r0l + stc.b exr,r0l + stc.w ccr,@er0 + stc.w ccr,@(16:16,er0) + stc.w ccr,@(32:32,er0) + stc.w ccr,@-er0 + stc.w ccr,@h8300s_misc:16 + stc.w ccr,@h8300s_misc:32 + stc.w exr,@er0 + stc.w exr,@(16:16,er0) + stc.w exr,@(32:32,er0) + stc.w exr,@-er0 + stc.w exr,@h8300s_misc:16 + stc.w exr,@h8300s_misc:32 diff --git a/gas/testsuite/gas/h8300/mov32bug.s b/gas/testsuite/gas/h8300/mov32bug.s new file mode 100644 index 0000000..68393e3 --- /dev/null +++ b/gas/testsuite/gas/h8300/mov32bug.s @@ -0,0 +1,4 @@ + .h8300h + .global _a +blah: + mov.l #_a-2000000000,er2 diff --git a/gas/testsuite/gas/h8300/movb.s b/gas/testsuite/gas/h8300/movb.s new file mode 100644 index 0000000..fa040c0 --- /dev/null +++ b/gas/testsuite/gas/h8300/movb.s @@ -0,0 +1,15 @@ + .text +h8300_movb: + mov.b r0l,r1l + mov.b #16,r0l + mov.b @r1,r0l + mov.b @(16:16,r1),r0l + mov.b @r1+,r0l + mov.b @16:8,r0l + mov.b @h8300_movb:16,r0l + mov.b r0l,@r1 + mov.b r0l,@(16:16,r1) + mov.b r0l,@-r1 + mov.b r0l,@16:8 + mov.b r0l,@h8300_movb:16 + diff --git a/gas/testsuite/gas/h8300/movbh.s b/gas/testsuite/gas/h8300/movbh.s new file mode 100644 index 0000000..7d711f8 --- /dev/null +++ b/gas/testsuite/gas/h8300/movbh.s @@ -0,0 +1,20 @@ + .h8300h + .text +h8300h_movb: + mov.b r0l,r1l + mov.b #16,r0l + mov.b @er1,r0l + mov.b @(16:16,er1),r0l + mov.b @(32:24,er1),r0l + mov.b @er1+,r0l + mov.b @16:8,r0l + mov.b @h8300h_movb:16,r0l + mov.b @h8300h_movb:24,r0l + mov.b r0l,@er1 + mov.b r0l,@(16:16,er1) + mov.b r0l,@(32:24,er1) + mov.b r0l,@-er1 + mov.b r0l,@16:8 + mov.b r0l,@h8300h_movb:16 + mov.b r0l,@h8300h_movb:24 + diff --git a/gas/testsuite/gas/h8300/movbs.s b/gas/testsuite/gas/h8300/movbs.s new file mode 100644 index 0000000..925002c --- /dev/null +++ b/gas/testsuite/gas/h8300/movbs.s @@ -0,0 +1,20 @@ + .h8300s + .text +h8300s_movb: + mov.b r0l,r1l + mov.b #16,r0l + mov.b @er1,r0l + mov.b @(16:16,er1),r0l + mov.b @(32:32,er1),r0l + mov.b @er1+,r0l + mov.b @16:8,r0l + mov.b @h8300s_movb:16,r0l + mov.b @h8300s_movb:32,r0l + mov.b r0l,@er1 + mov.b r0l,@(16:16,er1) + mov.b r0l,@(32:32,er1) + mov.b r0l,@-er1 + mov.b r0l,@16:8 + mov.b r0l,@h8300s_movb:16 + mov.b r0l,@h8300s_movb:32 + diff --git a/gas/testsuite/gas/h8300/movlh.s b/gas/testsuite/gas/h8300/movlh.s new file mode 100644 index 0000000..0cc78e8 --- /dev/null +++ b/gas/testsuite/gas/h8300/movlh.s @@ -0,0 +1,18 @@ + .h8300h + .text +h8300h_movl: + mov.l er0,er1 + mov.l #64,er0 + mov.l @er1,er0 + mov.l @(16:16,er1),er0 + mov.l @(32:24,er1),er0 + mov.l @er1+,er0 + mov.l @h8300h_movl:16,er0 + mov.l @h8300h_movl:24,er0 + mov.l er0,@er1 + mov.l er0,@(16:16,er1) + mov.l er0,@(32:24,er1) + mov.l er0,@-er1 + mov.l er0,@h8300h_movl:16 + mov.l er0,@h8300h_movl:24 + diff --git a/gas/testsuite/gas/h8300/movls.s b/gas/testsuite/gas/h8300/movls.s new file mode 100644 index 0000000..4643767 --- /dev/null +++ b/gas/testsuite/gas/h8300/movls.s @@ -0,0 +1,18 @@ + .h8300s + .text +h8300s_movl: + mov.l er0,er1 + mov.l #64,er0 + mov.l @er1,er0 + mov.l @(16:16,er1),er0 + mov.l @(32:32,er1),er0 + mov.l @er1+,er0 + mov.l @h8300s_movl:16,er0 + mov.l @h8300s_movl:32,er0 + mov.l er0,@er1 + mov.l er0,@(16:16,er1) + mov.l er0,@(32:32,er1) + mov.l er0,@-er1 + mov.l er0,@h8300s_movl:16 + mov.l er0,@h8300s_movl:32 + diff --git a/gas/testsuite/gas/h8300/movw.s b/gas/testsuite/gas/h8300/movw.s new file mode 100644 index 0000000..0cc64f8 --- /dev/null +++ b/gas/testsuite/gas/h8300/movw.s @@ -0,0 +1,13 @@ + .text +h8300_movw: + mov.w r0,r1 + mov.w #16,r0 + mov.w @r1,r0 + mov.w @(16:16,r1),r0 + mov.w @r1+,r0 + mov.w @h8300_movw:16,r0 + mov.w r0,@r1 + mov.w r0,@(16:16,r1) + mov.w r0,@-r1 + mov.w r0,@h8300_movw:16 + diff --git a/gas/testsuite/gas/h8300/movwh.s b/gas/testsuite/gas/h8300/movwh.s new file mode 100644 index 0000000..595057c --- /dev/null +++ b/gas/testsuite/gas/h8300/movwh.s @@ -0,0 +1,18 @@ + .h8300h + .text +h8300h_movw: + mov.w r0,r1 + mov.w #16,r0 + mov.w @er1,r0 + mov.w @(16:16,er1),r0 + mov.w @(32:24,er1),r0 + mov.w @er1+,r0 + mov.w @h8300h_movw:16,r0 + mov.w @h8300h_movw:24,r0 + mov.w r0,@er1 + mov.w r0,@(16:16,er1) + mov.w r0,@(32:24,er1) + mov.w r0,@-er1 + mov.w r0,@h8300h_movw:16 + mov.w r0,@h8300h_movw:24 + diff --git a/gas/testsuite/gas/h8300/movws.s b/gas/testsuite/gas/h8300/movws.s new file mode 100644 index 0000000..a4f21df --- /dev/null +++ b/gas/testsuite/gas/h8300/movws.s @@ -0,0 +1,18 @@ + .h8300s + .text +h8300s_movw: + mov.w r0,r1 + mov.w #16,r0 + mov.w @er1,r0 + mov.w @(16:16,er1),r0 + mov.w @(32:32,er1),r0 + mov.w @er1+,r0 + mov.w @h8300s_movw:16,r0 + mov.w @h8300s_movw:32,r0 + mov.w r0,@er1 + mov.w r0,@(16:16,er1) + mov.w r0,@(32:32,er1) + mov.w r0,@-er1 + mov.w r0,@h8300s_movw:16 + mov.w r0,@h8300s_movw:32 + diff --git a/gas/testsuite/gas/h8300/multiples.s b/gas/testsuite/gas/h8300/multiples.s new file mode 100644 index 0000000..52079b6 --- /dev/null +++ b/gas/testsuite/gas/h8300/multiples.s @@ -0,0 +1,10 @@ + .h8300s + .text +h8300s_multiple: + ldm.l @sp+,er0-er1 + ldm.l @sp+,er0-er2 + ldm.l @sp+,er0-er3 + stm.l er0-er1,@-sp + stm.l er0-er2,@-sp + stm.l er0-er3,@-sp + diff --git a/gas/testsuite/gas/h8300/pushpop.s b/gas/testsuite/gas/h8300/pushpop.s new file mode 100644 index 0000000..941b735 --- /dev/null +++ b/gas/testsuite/gas/h8300/pushpop.s @@ -0,0 +1,5 @@ + .text +h8300_push_pop: + pop r0 + push r0 + diff --git a/gas/testsuite/gas/h8300/pushpoph.s b/gas/testsuite/gas/h8300/pushpoph.s new file mode 100644 index 0000000..6049639 --- /dev/null +++ b/gas/testsuite/gas/h8300/pushpoph.s @@ -0,0 +1,8 @@ + .h8300h + .text +h8300h_push_pop: + pop.w r0 + pop.l er0 + push.w r0 + push.l er0 + diff --git a/gas/testsuite/gas/h8300/pushpops.s b/gas/testsuite/gas/h8300/pushpops.s new file mode 100644 index 0000000..741df04 --- /dev/null +++ b/gas/testsuite/gas/h8300/pushpops.s @@ -0,0 +1,8 @@ + .h8300s + .text +h8300s_push_pop: + pop.w r0 + pop.l er0 + push.w r0 + push.l er0 + diff --git a/gas/testsuite/gas/h8300/rotsh.s b/gas/testsuite/gas/h8300/rotsh.s new file mode 100644 index 0000000..a9aa87d --- /dev/null +++ b/gas/testsuite/gas/h8300/rotsh.s @@ -0,0 +1,11 @@ + .text +h8300_rotate_shift: + rotl r0l + rotr r0l + rotxl r0l + rotxr r0l + shal r0l + shar r0l + shll r0l + shlr r0l + diff --git a/gas/testsuite/gas/h8300/rotshh.s b/gas/testsuite/gas/h8300/rotshh.s new file mode 100644 index 0000000..c7abe40 --- /dev/null +++ b/gas/testsuite/gas/h8300/rotshh.s @@ -0,0 +1,27 @@ + .h8300h + .text +h8300h_rotate_shift: + rotl.b r0l + rotl.w r0 + rotl.l er0 + rotr.b r0l + rotr.w r0 + rotr.l er0 + rotxl.b r0l + rotxl.w r0 + rotxl.l er0 + rotxr.b r0l + rotxr.w r0 + rotxr.l er0 + shal.b r0l + shal.w r0 + shal.l er0 + shar.b r0l + shar.w r0 + shar.l er0 + shll.b r0l + shll.w r0 + shll.l er0 + shlr.b r0l + shlr.w r0 + shlr.l er0 diff --git a/gas/testsuite/gas/h8300/rotshs.s b/gas/testsuite/gas/h8300/rotshs.s new file mode 100644 index 0000000..36c41cb --- /dev/null +++ b/gas/testsuite/gas/h8300/rotshs.s @@ -0,0 +1,51 @@ + .h8300s + .text +h8300s_rotate_shift: + rotl.b r0l + rotl.b #2,r0l + rotl.w r0 + rotl.w #2,r0 + rotl.l er0 + rotl.l #2,er0 + rotr.b r0l + rotr.b #2,r0l + rotr.w r0 + rotr.w #2,r0 + rotr.l er0 + rotr.l #2,er0 + rotxl.b r0l + rotxl.b #2,r0l + rotxl.w r0 + rotxl.w #2,r0 + rotxl.l er0 + rotxl.l #2,er0 + rotxr.b r0l + rotxr.b #2,r0l + rotxr.w r0 + rotxr.w #2,r0 + rotxr.l er0 + rotxr.l #2,er0 + shal.b r0l + shal.b #2,r0l + shal.w r0 + shal.w #2,r0 + shal.l er0 + shal.l #2,er0 + shar.b r0l + shar.b #2,r0l + shar.w r0 + shar.w #2,r0 + shar.l er0 + shar.l #2,er0 + shll.b r0l + shll.b #2,r0l + shll.w r0 + shll.w #2,r0 + shll.l er0 + shll.l #2,er0 + shlr.b r0l + shlr.b #2,r0l + shlr.w r0 + shlr.w #2,r0 + shlr.l er0 + shlr.l #2,er0 diff --git a/gas/testsuite/gas/hppa/README b/gas/testsuite/gas/hppa/README new file mode 100644 index 0000000..a6b174a --- /dev/null +++ b/gas/testsuite/gas/hppa/README @@ -0,0 +1,34 @@ +Notes on how the HPPA testsuite is organized: + +basic.parse -- this directory contains the basic instruction parsing +tests and a simple .stab parsing test. This would be where you'd +add code to make sure new instructions are parsed correctly, new +completers (such as cache hits) are parsed correctly, etc. + +It's also a reasonable place to make sure parsing of the various +assembler directives is handled correctly. If you're going to add +such code, try to be reasonably complete. Add test code for each +basic directive and test all (or a noteworthy) subset of arguments. + +It should only be necessary to have an assembler to run these tests; +calling objdump_start or something similar should not be done from +this directory. + + +more.parse -- this is where you should put additional parsing tests, such +as tests to check mode selector parsing, string parsing, expression parsing, +etc. It's also a reasonable place to put parsing tests which are not complete +enough (whatever that means) for basic.parse. + +It should only be necessary to have an assembler to run these tests; +calling objdump_start or something similar should not be done from +this directory. + + +reloc -- this is where you tests which examine relocations produced +by GAS belong. To run these tests you must have a functioning objdump. + + +unsorted -- this is where everything else goes. As groups of related tests +end up in this directory, they should be broken out into a new class of +tests. diff --git a/gas/testsuite/gas/hppa/basic/add.s b/gas/testsuite/gas/hppa/basic/add.s new file mode 100644 index 0000000..4d1d4cd --- /dev/null +++ b/gas/testsuite/gas/hppa/basic/add.s @@ -0,0 +1,100 @@ + .SPACE $PRIVATE$ + .SUBSPA $DATA$,QUAD=1,ALIGN=8,ACCESS=31 + .SUBSPA $BSS$,QUAD=1,ALIGN=8,ACCESS=31,ZERO,SORT=82 + .SPACE $TEXT$ + .SUBSPA $LIT$,QUAD=0,ALIGN=8,ACCESS=44 + .SUBSPA $CODE$,QUAD=0,ALIGN=8,ACCESS=44,CODE_ONLY + + .SPACE $TEXT$ + .SUBSPA $CODE$ + + .align 4 +; Basic add/sh?add instruction tests. +; +; We could/should test some of the corner cases for register and +; immediate fields. We should also check the assorted field +; selectors to make sure they're handled correctly. + add %r4,%r5,%r6 + add,= %r4,%r5,%r6 + add,< %r4,%r5,%r6 + add,<= %r4,%r5,%r6 + add,nuv %r4,%r5,%r6 + add,znv %r4,%r5,%r6 + add,sv %r4,%r5,%r6 + add,od %r4,%r5,%r6 + add,tr %r4,%r5,%r6 + add,<> %r4,%r5,%r6 + add,>= %r4,%r5,%r6 + add,> %r4,%r5,%r6 + add,uv %r4,%r5,%r6 + add,vnz %r4,%r5,%r6 + add,nsv %r4,%r5,%r6 + add,ev %r4,%r5,%r6 + + addl %r4,%r5,%r6 + addl,= %r4,%r5,%r6 + addl,< %r4,%r5,%r6 + addl,<= %r4,%r5,%r6 + addl,nuv %r4,%r5,%r6 + addl,znv %r4,%r5,%r6 + addl,sv %r4,%r5,%r6 + addl,od %r4,%r5,%r6 + addl,tr %r4,%r5,%r6 + addl,<> %r4,%r5,%r6 + addl,>= %r4,%r5,%r6 + addl,> %r4,%r5,%r6 + addl,uv %r4,%r5,%r6 + addl,vnz %r4,%r5,%r6 + addl,nsv %r4,%r5,%r6 + addl,ev %r4,%r5,%r6 + + addo %r4,%r5,%r6 + addo,= %r4,%r5,%r6 + addo,< %r4,%r5,%r6 + addo,<= %r4,%r5,%r6 + addo,nuv %r4,%r5,%r6 + addo,znv %r4,%r5,%r6 + addo,sv %r4,%r5,%r6 + addo,od %r4,%r5,%r6 + addo,tr %r4,%r5,%r6 + addo,<> %r4,%r5,%r6 + addo,>= %r4,%r5,%r6 + addo,> %r4,%r5,%r6 + addo,uv %r4,%r5,%r6 + addo,vnz %r4,%r5,%r6 + addo,nsv %r4,%r5,%r6 + addo,ev %r4,%r5,%r6 + + addc %r4,%r5,%r6 + addc,= %r4,%r5,%r6 + addc,< %r4,%r5,%r6 + addc,<= %r4,%r5,%r6 + addc,nuv %r4,%r5,%r6 + addc,znv %r4,%r5,%r6 + addc,sv %r4,%r5,%r6 + addc,od %r4,%r5,%r6 + addc,tr %r4,%r5,%r6 + addc,<> %r4,%r5,%r6 + addc,>= %r4,%r5,%r6 + addc,> %r4,%r5,%r6 + addc,uv %r4,%r5,%r6 + addc,vnz %r4,%r5,%r6 + addc,nsv %r4,%r5,%r6 + addc,ev %r4,%r5,%r6 + + addco %r4,%r5,%r6 + addco,= %r4,%r5,%r6 + addco,< %r4,%r5,%r6 + addco,<= %r4,%r5,%r6 + addco,nuv %r4,%r5,%r6 + addco,znv %r4,%r5,%r6 + addco,sv %r4,%r5,%r6 + addco,od %r4,%r5,%r6 + addco,tr %r4,%r5,%r6 + addco,<> %r4,%r5,%r6 + addco,>= %r4,%r5,%r6 + addco,> %r4,%r5,%r6 + addco,uv %r4,%r5,%r6 + addco,vnz %r4,%r5,%r6 + addco,nsv %r4,%r5,%r6 + addco,ev %r4,%r5,%r6 diff --git a/gas/testsuite/gas/hppa/basic/addi.s b/gas/testsuite/gas/hppa/basic/addi.s new file mode 100644 index 0000000..b036b80 --- /dev/null +++ b/gas/testsuite/gas/hppa/basic/addi.s @@ -0,0 +1,83 @@ + .SPACE $PRIVATE$ + .SUBSPA $DATA$,QUAD=1,ALIGN=8,ACCESS=31 + .SUBSPA $BSS$,QUAD=1,ALIGN=8,ACCESS=31,ZERO,SORT=82 + .SPACE $TEXT$ + .SUBSPA $LIT$,QUAD=0,ALIGN=8,ACCESS=44 + .SUBSPA $CODE$,QUAD=0,ALIGN=8,ACCESS=44,CODE_ONLY + + .SPACE $TEXT$ + .SUBSPA $CODE$ + + .align 4 +; Basic immediate instruction tests. +; +; We could/should test some of the corner cases for register and +; immediate fields. We should also check the assorted field +; selectors to make sure they're handled correctly. + addi 123,%r5,%r6 + addi,= 123,%r5,%r6 + addi,< 123,%r5,%r6 + addi,<= 123,%r5,%r6 + addi,nuv 123,%r5,%r6 + addi,znv 123,%r5,%r6 + addi,sv 123,%r5,%r6 + addi,od 123,%r5,%r6 + addi,tr 123,%r5,%r6 + addi,<> 123,%r5,%r6 + addi,>= 123,%r5,%r6 + addi,> 123,%r5,%r6 + addi,uv 123,%r5,%r6 + addi,vnz 123,%r5,%r6 + addi,nsv 123,%r5,%r6 + addi,ev 123,%r5,%r6 + + addio 123,%r5,%r6 + addio,= 123,%r5,%r6 + addio,< 123,%r5,%r6 + addio,<= 123,%r5,%r6 + addio,nuv 123,%r5,%r6 + addio,znv 123,%r5,%r6 + addio,sv 123,%r5,%r6 + addio,od 123,%r5,%r6 + addio,tr 123,%r5,%r6 + addio,<> 123,%r5,%r6 + addio,>= 123,%r5,%r6 + addio,> 123,%r5,%r6 + addio,uv 123,%r5,%r6 + addio,vnz 123,%r5,%r6 + addio,nsv 123,%r5,%r6 + addio,ev 123,%r5,%r6 + + addit 123,%r5,%r6 + addit,= 123,%r5,%r6 + addit,< 123,%r5,%r6 + addit,<= 123,%r5,%r6 + addit,nuv 123,%r5,%r6 + addit,znv 123,%r5,%r6 + addit,sv 123,%r5,%r6 + addit,od 123,%r5,%r6 + addit,tr 123,%r5,%r6 + addit,<> 123,%r5,%r6 + addit,>= 123,%r5,%r6 + addit,> 123,%r5,%r6 + addit,uv 123,%r5,%r6 + addit,vnz 123,%r5,%r6 + addit,nsv 123,%r5,%r6 + addit,ev 123,%r5,%r6 + + addito 123,%r5,%r6 + addito,= 123,%r5,%r6 + addito,< 123,%r5,%r6 + addito,<= 123,%r5,%r6 + addito,nuv 123,%r5,%r6 + addito,znv 123,%r5,%r6 + addito,sv 123,%r5,%r6 + addito,od 123,%r5,%r6 + addito,tr 123,%r5,%r6 + addito,<> 123,%r5,%r6 + addito,>= 123,%r5,%r6 + addito,> 123,%r5,%r6 + addito,uv 123,%r5,%r6 + addito,vnz 123,%r5,%r6 + addito,nsv 123,%r5,%r6 + addito,ev 123,%r5,%r6 diff --git a/gas/testsuite/gas/hppa/basic/basic.exp b/gas/testsuite/gas/hppa/basic/basic.exp new file mode 100644 index 0000000..a9ba5ea --- /dev/null +++ b/gas/testsuite/gas/hppa/basic/basic.exp @@ -0,0 +1,2262 @@ +# Copyright (C) 1993, 1996, 1997 Free Software Foundation, Inc. + +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; either version 2 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + +# Please email any bugs, comments, and/or additions to this file to: +# DejaGnu@cygnus.com + +# Written by the Center for Software Science at the Univeristy of Utah +# and by Cygnus Support. + +proc do_imem {} { + set testname "imem.s: integer memory loads and stores" + set x 0 + + gas_start "imem.s" "-al" + + # Check the assembled instruction against a table built by the HP assembler + # Any differences should be checked by hand -- with the number of problems + # I've seen in the HP assembler I don't completely trust it. + # + # Instead of having a variable for each match string just increment the + # total number of matches seen. That's simpler when testing large numbers + # of instructions (as these tests to). + while 1 { + expect { + -re "^ +\[0-9\]+ 0000 489A0000\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0000 0C80109A\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0004 449A0000\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0004 0C80105A\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0008 409A0000\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0008 0C80101A\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 000c 689A0000\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 000c 0C9A1280\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0010 649A0000\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0010 0C9A1240\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0014 609A0000\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0014 0C9A1200\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0018 4C9A0000\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 001c 6C9A0000\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0020 0C85009A\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0024 0C85209A\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0028 0C8500BA\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 002c 0C8520BA\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0030 0C85005A\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0034 0C85205A\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0038 0C85007A\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 003c 0C85207A\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0040 0C85001A\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0044 0C85201A\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0048 0C85003A\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 004c 0C85203A\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0050 0C85019A\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0054 0C85219A\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0058 0C8501BA\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 005c 0C8521BA\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0060 0C8501DA\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0064 0C8521DA\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0068 0C8501FA\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 006c 0C8521FA\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0070 0C80109A\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0074 0C8030BA\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0078 0C8010BA\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 007c 0C80105A\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0080 0C80307A\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0084 0C80107A\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0088 0C80101A\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 008c 0C80303A\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0090 0C80103A\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0094 0C80119A\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0098 0C8031BA\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 009c 0C8011BA\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 00a0 0C8011DA\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 00a4 0C8031FA\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 00a8 0C8011FA\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 00ac 0C9A1280\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 00b0 0C9A32A0\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 00b4 0C9A12A0\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 00b8 0C9A1240\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 00bc 0C9A3260\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 00c0 0C9A1260\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 00c4 0C9A1200\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 00c8 0C9A3220\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 00cc 0C9A1220\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 00d0 0C9A1380\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 00d4 0C9A33A0\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 00d8 0C9A13A0\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 00dc 0C9A1300\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 00e0 0C9A1300\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 00e4 0C9A3300\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 00e8 0C9A1320\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 00ec 0C9A3320\[^\n\]*\n" { set x [expr $x+1] } + -re "\[^\n\]*\n" { } + timeout { perror "timeout\n"; break } + eof { break } + } + } + + # This was intended to do any cleanup necessary. It kinda looks like it + # isn't needed, but just in case, please keep it in for now. + gas_finish + + # Did we find what we were looking for? If not, flunk it. + if [expr $x==60] then { pass $testname } else { fail $testname } +} + +proc do_immed {} { + set testname "immed.s: immediate tests" + set x 0 + + gas_start "immed.s" "-al" + + # Check the assembled instruction against a table built by the HP assembler + # Any differences should be checked by hand -- with the number of problems + # I've seen in the HP assembler I don't completely trust it. + # + # Instead of having a variable for each match string just increment the + # total number of matches seen. That's simpler when testing large numbers + # of instructions (as these tests to). + while 1 { + expect { + -re "^ +\[0-9\]+ 0000 375A000A\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0004 234DFBD5\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0008 28ADFBD5\[^\n\]*\n" { set x [expr $x+1] } + -re "\[^\n\]*\n" { } + timeout { perror "timeout\n"; break } + eof { break } + } + } + + # This was intended to do any cleanup necessary. It kinda looks like it + # isn't needed, but just in case, please keep it in for now. + gas_finish + + # Did we find what we were looking for? If not, flunk it. + if [expr $x==3] then { pass $testname } else { fail $testname } +} + +proc do_branch {} { + set testname "branch.s: branch tests" + set x 0 + + gas_start "branch.s" "-al" + + # Check the assembled instruction against a table built by the HP assembler + # Any differences should be checked by hand -- with the number of problems + # I've seen in the HP assembler I don't completely trust it. + # + # Instead of having a variable for each match string just increment the + # total number of matches seen. That's simpler when testing large numbers + # of instructions (as these tests to). + while 1 { + expect { + -re "^ +\[0-9\]+ 0000 E85F1FF5\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0004 E85F1FEF\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0008 E81F1FE5\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 000c E81F1FDF\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0010 E85F3FD5\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0014 E85F3FCF\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0018 E8444000\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 001c E8444002\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0020 E8044000\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0024 E8044002\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0028 E840C000\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 002c E840C002\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0030 E040446C\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0034 E040446E\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0038 E440446C\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 003c E440446E\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0040 CB441FF5\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0044 CB443FED\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0048 CB445FE5\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 004c CB447FDD\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0050 CB449FD5\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0054 CB44BFCD\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0058 CB44DFC5\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 005c CB44FFBD\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0060 CB441FB7\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0064 CB443FAF\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0068 CB445FA7\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 006c CB447F9F\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0070 CB449F97\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0074 CB44BF8F\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0078 CB44DF87\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 007c CB44FF7F\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0080 CF4A1FF5\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0084 CF4A3FED\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0088 CF4A5FE5\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 008c CF4A7FDD\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0090 CF4A9FD5\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0094 CF4ABFCD\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0098 CF4ADFC5\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 009c CF4AFFBD\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 00a0 CF4A1FB7\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 00a4 CF4A3FAF\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 00a8 CF4A5FA7\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 00ac CF4A7F9F\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 00b0 CF4A9F97\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 00b4 CF4ABF8F\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 00b8 CF4ADF87\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 00bc CF4AFF7F\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 00c0 80801FF5\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 00c4 80803FED\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 00c8 80805FE5\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 00cc 80807FDD\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 00d0 80809FD5\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 00d4 8080BFCD\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 00d8 8080DFC5\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 00dc 8080FFBD\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 00e0 88801FB5\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 00e4 88803FAD\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 00e8 88805FA5\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 00ec 88807F9D\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 00f0 88809F95\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 00f4 8880BF8D\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 00f8 8880DF85\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 00fc 8880FF7D\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0100 80801F77\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0104 80803F6F\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0108 80805F67\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 010c 80807F5F\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0110 80809F57\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0114 8080BF4F\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0118 8080DF47\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 011c 8080FF3F\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0120 88801F37\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0124 88803F2F\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0128 88805F27\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 012c 88807F1F\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0130 88809F17\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0134 8880BF0F\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0138 8880DF07\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 013c 8880FEFF\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0140 84801FF5\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0144 84805FED\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0148 84807FE5\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 014c 84809FDD\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0150 8480BFD5\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0154 8480DFCD\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0158 8480FFC5\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 015c 8C801FBD\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0160 8C803FB5\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0164 8C805FAD\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0168 8C807FA5\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 016c 8C809F9D\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0170 8C80BF95\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0174 8C80DF8D\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0178 8C80FE85\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 017c 84801F7F\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0180 84803F77\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0184 84805F6F\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0188 84807F67\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 018c 84809F5F\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0190 8480BF57\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0194 8480DF4F\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0198 8480FF47\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 019c 8C801F3F\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 01a0 8C803F37\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 01a4 8C805F2F\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 01a8 8C807F27\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 01ac 8C809F1F\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 01b0 8C80BF17\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 01b4 8C80DF0F\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 01b8 8C80FF07\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 01bc A0811FF5\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 01c0 A0813FED\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 01c4 A0815FE5\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 01c8 A0817FDD\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 01cc A0819FD5\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 01d0 A081BFCD\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 01d4 A081DFC5\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 01d8 A081FFBD\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 01dc A8811FB5\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 01e0 A8813FAD\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 01e4 A8815FA5\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 01e8 A8817F9D\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 01ec A8819F95\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 01f0 A881BF8D\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 01f4 A881DF85\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 01f8 A881FF7D\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 01fc A0811F77\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0200 A0813F6F\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0204 A0815F67\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0208 A0817F5F\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 020c A0819F57\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0210 A081BF4F\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0214 A081DF47\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0218 A081FF3F\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 021c A8811F37\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0220 A8813F2F\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0224 A8815F27\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0228 A8817F1F\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 022c A8819F17\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0230 A881BF0F\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0234 A881DF07\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0238 A881FEFF\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 023c A49F1FF5\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0240 A49F3FED\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0244 A49F5FE5\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0248 A49F7FDD\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 024c A49F9FD5\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0250 A49FBFCD\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0254 A49FDFC5\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0258 A49FFFBD\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 025c AC9F1FB5\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0260 AC9F3FAD\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0264 AC9F5FA5\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0268 AC9F7F9D\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 026c AC9F9F95\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0270 AC9FBF8D\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0274 AC9FDF85\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0278 AC9FFC85\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 027c A49F1F77\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0280 A49F3F6F\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0284 A49F5F67\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0288 A49F7F5F\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 028c A49F9F57\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0290 A49FBF4F\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0294 A49FDF47\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0298 A49FFF3F\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 029c AC9F1F37\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 02a0 AC9F3F2F\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 02a4 AC9F5F27\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 02a8 AC9F7F1F\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 02ac AC9F9F17\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 02b0 AC9FBF0F\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 02b4 AC9FDF07\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 02b8 AC9FFEFF\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 02bc C0045FF5\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 02c0 C004DFED\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 02c4 C0045FE7\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 02c8 C004DFDF\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 02cc C4A45FD5\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 02d0 C4A4DFCD\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 02d4 C4A45FC7\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 02d8 C4A4DFBF\[^\n\]*\n" { set x [expr $x+1] } + -re "\[^\n\]*\n" { } + timeout { perror "timeout\n"; break } + eof { break } + } + } + + # This was intended to do any cleanup necessary. It kinda looks like it + # isn't needed, but just in case, please keep it in for now. + gas_finish + + # Did we find what we were looking for? If not, flunk it. + if [expr $x==183] then { pass $testname } else { fail $testname } +} + +proc do_add {} { + set testname "add.s: add tests" + set x 0 + + gas_start "add.s" "-al" + + # Check the assembled instruction against a table built by the HP assembler + # Any differences should be checked by hand -- with the number of problems + # I've seen in the HP assembler I don't completely trust it. + # + # Instead of having a variable for each match string just increment the + # total number of matches seen. That's simpler when testing large numbers + # of instructions (as these tests to). + while 1 { + expect { + -re "^ +\[0-9\]+ 0000 08A40606\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0004 08A42606\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0008 08A44606\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 000c 08A46606\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0010 08A48606\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0014 08A4A606\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0018 08A4C606\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 001c 08A4E606\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0020 08A41606\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0024 08A43606\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0028 08A45606\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 002c 08A47606\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0030 08A49606\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0034 08A4B606\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0038 08A4D606\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 003c 08A4F606\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0040 08A40A06\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0044 08A42A06\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0048 08A44A06\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 004c 08A46A06\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0050 08A48A06\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0054 08A4AA06\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0058 08A4CA06\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 005c 08A4EA06\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0060 08A41A06\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0064 08A43A06\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0068 08A45A06\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 006c 08A47A06\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0070 08A49A06\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0074 08A4BA06\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0078 08A4DA06\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 007c 08A4FA06\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0080 08A40E06\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0084 08A42E06\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0088 08A44E06\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 008c 08A46E06\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0090 08A48E06\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0094 08A4AE06\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0098 08A4CE06\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 009c 08A4EE06\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 00a0 08A41E06\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 00a4 08A43E06\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 00a8 08A45E06\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 00ac 08A47E06\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 00b0 08A49E06\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 00b4 08A4BE06\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 00b8 08A4DE06\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 00bc 08A4FE06\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 00c0 08A40706\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 00c4 08A42706\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 00c8 08A44706\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 00cc 08A46706\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 00d0 08A48706\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 00d4 08A4A706\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 00d8 08A4C706\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 00dc 08A4E706\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 00e0 08A41706\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 00e4 08A43706\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 00e8 08A45706\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 00ec 08A47706\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 00f0 08A49706\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 00f4 08A4B706\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 00f8 08A4D706\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 00fc 08A4F706\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0100 08A40F06\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0104 08A42F06\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0108 08A44F06\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 010c 08A46F06\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0110 08A48F06\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0114 08A4AF06\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0118 08A4CF06\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 011c 08A4EF06\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0120 08A41F06\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0124 08A43F06\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0128 08A45F06\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 012c 08A47F06\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0130 08A49F06\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0134 08A4BF06\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0138 08A4DF06\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 013c 08A4FF06\[^\n\]*\n" { set x [expr $x+1] } + -re "\[^\n\]*\n" { } + timeout { perror "timeout\n"; break } + eof { break } + } + } + + # This was intended to do any cleanup necessary. It kinda looks like it + # isn't needed, but just in case, please keep it in for now. + gas_finish + + # Did we find what we were looking for? If not, flunk it. + if [expr $x==80] then { pass $testname } else { fail $testname } +} + +proc do_sh1add {} { + set testname "sh1add.s: sh1add tests" + set x 0 + + gas_start "sh1add.s" "-al" + + # Check the assembled instruction against a table built by the HP assembler + # Any differences should be checked by hand -- with the number of problems + # I've seen in the HP assembler I don't completely trust it. + # + # Instead of having a variable for each match string just increment the + # total number of matches seen. That's simpler when testing large numbers + # of instructions (as these tests to). + while 1 { + expect { + -re "^ +\[0-9\]+ 0000 08A40646\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0004 08A42646\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0008 08A44646\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 000c 08A46646\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0010 08A48646\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0014 08A4A646\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0018 08A4C646\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 001c 08A4E646\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0020 08A41646\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0024 08A43646\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0028 08A45646\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 002c 08A47646\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0030 08A49646\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0034 08A4B646\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0038 08A4D646\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 003c 08A4F646\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0040 08A40A46\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0044 08A42A46\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0048 08A44A46\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 004c 08A46A46\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0050 08A48A46\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0054 08A4AA46\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0058 08A4CA46\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 005c 08A4EA46\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0060 08A41A46\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0064 08A43A46\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0068 08A45A46\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 006c 08A47A46\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0070 08A49A46\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0074 08A4BA46\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0078 08A4DA46\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 007c 08A4FA46\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0080 08A40E46\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0084 08A42E46\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0088 08A44E46\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 008c 08A46E46\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0090 08A48E46\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0094 08A4AE46\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0098 08A4CE46\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 009c 08A4EE46\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 00a0 08A41E46\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 00a4 08A43E46\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 00a8 08A45E46\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 00ac 08A47E46\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 00b0 08A49E46\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 00b4 08A4BE46\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 00b8 08A4DE46\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 00bc 08A4FE46\[^\n\]*\n" { set x [expr $x+1] } + -re "\[^\n\]*\n" { } + timeout { perror "timeout\n"; break } + eof { break } + } + } + + # This was intended to do any cleanup necessary. It kinda looks like it + # isn't needed, but just in case, please keep it in for now. + gas_finish + + # Did we find what we were looking for? If not, flunk it. + if [expr $x==48] then { pass $testname } else { fail $testname } +} + +proc do_sh2add {} { + set testname "sh2add.s: sh2add tests" + set x 0 + + gas_start "sh2add.s" "-al" + + # Check the assembled instruction against a table built by the HP assembler + # Any differences should be checked by hand -- with the number of problems + # I've seen in the HP assembler I don't completely trust it. + # + # Instead of having a variable for each match string just increment the + # total number of matches seen. That's simpler when testing large numbers + # of instructions (as these tests to). + while 1 { + expect { + -re "^ +\[0-9\]+ 0000 08A40686\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0004 08A42686\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0008 08A44686\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 000c 08A46686\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0010 08A48686\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0014 08A4A686\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0018 08A4C686\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 001c 08A4E686\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0020 08A41686\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0024 08A43686\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0028 08A45686\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 002c 08A47686\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0030 08A49686\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0034 08A4B686\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0038 08A4D686\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 003c 08A4F686\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0040 08A40A86\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0044 08A42A86\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0048 08A44A86\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 004c 08A46A86\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0050 08A48A86\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0054 08A4AA86\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0058 08A4CA86\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 005c 08A4EA86\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0060 08A41A86\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0064 08A43A86\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0068 08A45A86\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 006c 08A47A86\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0070 08A49A86\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0074 08A4BA86\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0078 08A4DA86\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 007c 08A4FA86\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0080 08A40E86\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0084 08A42E86\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0088 08A44E86\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 008c 08A46E86\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0090 08A48E86\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0094 08A4AE86\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0098 08A4CE86\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 009c 08A4EE86\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 00a0 08A41E86\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 00a4 08A43E86\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 00a8 08A45E86\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 00ac 08A47E86\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 00b0 08A49E86\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 00b4 08A4BE86\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 00b8 08A4DE86\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 00bc 08A4FE86\[^\n\]*\n" { set x [expr $x+1] } + -re "\[^\n\]*\n" { } + timeout { perror "timeout\n"; break } + eof { break } + } + } + + # This was intended to do any cleanup necessary. It kinda looks like it + # isn't needed, but just in case, please keep it in for now. + gas_finish + + # Did we find what we were looking for? If not, flunk it. + if [expr $x==48] then { pass $testname } else { fail $testname } +} + +proc do_sh3add {} { + set testname "sh3add.s: sh3add tests" + set x 0 + + gas_start "sh3add.s" "-al" + + # Check the assembled instruction against a table built by the HP assembler + # Any differences should be checked by hand -- with the number of problems + # I've seen in the HP assembler I don't completely trust it. + # + # Instead of having a variable for each match string just increment the + # total number of matches seen. That's simpler when testing large numbers + # of instructions (as these tests to). + while 1 { + expect { + -re "^ +\[0-9\]+ 0000 08A406C6\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0004 08A426C6\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0008 08A446C6\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 000c 08A466C6\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0010 08A486C6\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0014 08A4A6C6\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0018 08A4C6C6\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 001c 08A4E6C6\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0020 08A416C6\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0024 08A436C6\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0028 08A456C6\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 002c 08A476C6\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0030 08A496C6\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0034 08A4B6C6\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0038 08A4D6C6\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 003c 08A4F6C6\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0040 08A40AC6\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0044 08A42AC6\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0048 08A44AC6\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 004c 08A46AC6\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0050 08A48AC6\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0054 08A4AAC6\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0058 08A4CAC6\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 005c 08A4EAC6\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0060 08A41AC6\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0064 08A43AC6\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0068 08A45AC6\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 006c 08A47AC6\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0070 08A49AC6\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0074 08A4BAC6\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0078 08A4DAC6\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 007c 08A4FAC6\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0080 08A40EC6\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0084 08A42EC6\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0088 08A44EC6\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 008c 08A46EC6\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0090 08A48EC6\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0094 08A4AEC6\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0098 08A4CEC6\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 009c 08A4EEC6\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 00a0 08A41EC6\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 00a4 08A43EC6\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 00a8 08A45EC6\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 00ac 08A47EC6\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 00b0 08A49EC6\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 00b4 08A4BEC6\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 00b8 08A4DEC6\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 00bc 08A4FEC6\[^\n\]*\n" { set x [expr $x+1] } + -re "\[^\n\]*\n" { } + timeout { perror "timeout\n"; break } + eof { break } + } + } + + # This was intended to do any cleanup necessary. It kinda looks like it + # isn't needed, but just in case, please keep it in for now. + gas_finish + + # Did we find what we were looking for? If not, flunk it. + if [expr $x==48] then { pass $testname } else { fail $testname } +} + +proc do_sub {} { + set testname "sub.s: sub tests" + set x 0 + + gas_start "sub.s" "-al" + + # Check the assembled instruction against a table built by the HP assembler + # Any differences should be checked by hand -- with the number of problems + # I've seen in the HP assembler I don't completely trust it. + # + # Instead of having a variable for each match string just increment the + # total number of matches seen. That's simpler when testing large numbers + # of instructions (as these tests to). + while 1 { + expect { + -re "^ +\[0-9\]+ 0000 08A40406\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0004 08A42406\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0008 08A44406\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 000c 08A46406\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0010 08A48406\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0014 08A4A406\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0018 08A4C406\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 001c 08A4E406\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0020 08A41406\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0024 08A43406\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0028 08A45406\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 002c 08A47406\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0030 08A49406\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0034 08A4B406\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0038 08A4D406\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 003c 08A4F406\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0040 08A40C06\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0044 08A42C06\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0048 08A44C06\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 004c 08A46C06\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0050 08A48C06\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0054 08A4AC06\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0058 08A4CC06\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 005c 08A4EC06\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0060 08A41C06\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0064 08A43C06\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0068 08A45C06\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 006c 08A47C06\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0070 08A49C06\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0074 08A4BC06\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0078 08A4DC06\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 007c 08A4FC06\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0080 08A40506\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0084 08A42506\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0088 08A44506\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 008c 08A46506\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0090 08A48506\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0094 08A4A506\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0098 08A4C506\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 009c 08A4E506\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 00a0 08A41506\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 00a4 08A43506\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 00a8 08A45506\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 00ac 08A47506\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 00b0 08A49506\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 00b4 08A4B506\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 00b8 08A4D506\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 00bc 08A4F506\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 00c0 08A40D06\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 00c4 08A42D06\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 00c8 08A44D06\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 00cc 08A46D06\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 00d0 08A48D06\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 00d4 08A4AD06\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 00d8 08A4CD06\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 00dc 08A4ED06\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 00e0 08A41D06\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 00e4 08A43D06\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 00e8 08A45D06\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 00ec 08A47D06\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 00f0 08A49D06\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 00f4 08A4BD06\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 00f8 08A4DD06\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 00fc 08A4FD06\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0100 08A404C6\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0104 08A424C6\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0108 08A444C6\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 010c 08A464C6\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0110 08A484C6\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0114 08A4A4C6\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0118 08A4C4C6\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 011c 08A4E4C6\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0120 08A414C6\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0124 08A434C6\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0128 08A454C6\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 012c 08A474C6\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0130 08A494C6\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0134 08A4B4C6\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0138 08A4D4C6\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 013c 08A4F4C6\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0140 08A40CC6\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0144 08A42CC6\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0148 08A44CC6\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 014c 08A46CC6\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0150 08A48CC6\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0154 08A4ACC6\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0158 08A4CCC6\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 015c 08A4ECC6\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0160 08A41CC6\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0164 08A43CC6\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0168 08A45CC6\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 016c 08A47CC6\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0170 08A49CC6\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0174 08A4BCC6\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0178 08A4DCC6\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 017c 08A4FCC6\[^\n\]*\n" { set x [expr $x+1] } + -re "\[^\n\]*\n" { } + timeout { perror "timeout\n"; break } + eof { break } + } + } + + # This was intended to do any cleanup necessary. It kinda looks like it + # isn't needed, but just in case, please keep it in for now. + gas_finish + + # Did we find what we were looking for? If not, flunk it. + if [expr $x==96] then { pass $testname } else { fail $testname } +} + +proc do_ds {} { + set testname "ds.s: ds tests" + set x 0 + + gas_start "ds.s" "-al" + + # Check the assembled instruction against a table built by the HP assembler + # Any differences should be checked by hand -- with the number of problems + # I've seen in the HP assembler I don't completely trust it. + # + # Instead of having a variable for each match string just increment the + # total number of matches seen. That's simpler when testing large numbers + # of instructions (as these tests to). + while 1 { + expect { + -re "^ +\[0-9\]+ 0000 08A40446\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0004 08A42446\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0008 08A44446\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 000c 08A46446\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0010 08A48446\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0014 08A4A446\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0018 08A4C446\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 001c 08A4E446\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0020 08A41446\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0024 08A43446\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0028 08A45446\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 002c 08A47446\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0030 08A49446\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0034 08A4B446\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0038 08A4D446\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 003c 08A4F446\[^\n\]*\n" { set x [expr $x+1] } + -re "\[^\n\]*\n" { } + timeout { perror "timeout\n"; break } + eof { break } + } + } + + # This was intended to do any cleanup necessary. It kinda looks like it + # isn't needed, but just in case, please keep it in for now. + gas_finish + + # Did we find what we were looking for? If not, flunk it. + if [expr $x==16] then { pass $testname } else { fail $testname } +} + +proc do_comclr {} { + set testname "comclr.s: comclr tests" + set x 0 + + gas_start "comclr.s" "-al" + + # Check the assembled instruction against a table built by the HP assembler + # Any differences should be checked by hand -- with the number of problems + # I've seen in the HP assembler I don't completely trust it. + # + # Instead of having a variable for each match string just increment the + # total number of matches seen. That's simpler when testing large numbers + # of instructions (as these tests to). + while 1 { + expect { + -re "^ +\[0-9\]+ 0000 08A40886\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0004 08A42886\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0008 08A44886\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 000c 08A46886\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0010 08A48886\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0014 08A4A886\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0018 08A4C886\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 001c 08A4E886\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0020 08A41886\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0024 08A43886\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0028 08A45886\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 002c 08A47886\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0030 08A49886\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0034 08A4B886\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0038 08A4D886\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 003c 08A4F886\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0040 90A600F6\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0044 90A620F6\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0048 90A640F6\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 004c 90A660F6\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0050 90A680F6\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0054 90A6A0F6\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0058 90A6C0F6\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 005c 90A6E0F6\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0060 90A610F6\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0064 90A630F6\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0068 90A650F6\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 006c 90A670F6\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0070 90A690F6\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0074 90A6B0F6\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0078 90A6D0F6\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 007c 90A6F0F6\[^\n\]*\n" { set x [expr $x+1] } + -re "\[^\n\]*\n" { } + timeout { perror "timeout\n"; break } + eof { break } + } + } + + # This was intended to do any cleanup necessary. It kinda looks like it + # isn't needed, but just in case, please keep it in for now. + gas_finish + + # Did we find what we were looking for? If not, flunk it. + if [expr $x==32] then { pass $testname } else { fail $testname } +} + +proc do_logical {} { + set testname "logical.s: logical tests" + set x 0 + + gas_start "logical.s" "-al" + + # Check the assembled instruction against a table built by the HP assembler + # Any differences should be checked by hand -- with the number of problems + # I've seen in the HP assembler I don't completely trust it. + # + # Instead of having a variable for each match string just increment the + # total number of matches seen. That's simpler when testing large numbers + # of instructions (as these tests to). + while 1 { + expect { + -re "^ +\[0-9\]+ 0000 08A40246\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0004 08A42246\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0008 08A44246\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 000c 08A46246\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0010 08A4E246\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0014 08A41246\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0018 08A43246\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 001c 08A45246\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0020 08A47246\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0024 08A4F246\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0028 08A40286\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 002c 08A42286\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0030 08A44286\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0034 08A46286\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0038 08A4E286\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 003c 08A41286\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0040 08A43286\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0044 08A45286\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0048 08A47286\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 004c 08A4F286\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0050 08A40206\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0054 08A42206\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0058 08A44206\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 005c 08A46206\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0060 08A4E206\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0064 08A41206\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0068 08A43206\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 006c 08A45206\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0070 08A47206\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0074 08A4F206\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0078 08A40006\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 007c 08A42006\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0080 08A44006\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0084 08A46006\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0088 08A4E006\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 008c 08A41006\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0090 08A43006\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0094 08A45006\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0098 08A47006\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 009c 08A4F006\[^\n\]*\n" { set x [expr $x+1] } + -re "\[^\n\]*\n" { } + timeout { perror "timeout\n"; break } + eof { break } + } + } + + # This was intended to do any cleanup necessary. It kinda looks like it + # isn't needed, but just in case, please keep it in for now. + gas_finish + + # Did we find what we were looking for? If not, flunk it. + if [expr $x==40] then { pass $testname } else { fail $testname } +} + +proc do_unit {} { + set testname "unit.s: unit tests" + set x 0 + + gas_start "unit.s" "-al" + + # Check the assembled instruction against a table built by the HP assembler + # Any differences should be checked by hand -- with the number of problems + # I've seen in the HP assembler I don't completely trust it. + # + # Instead of having a variable for each match string just increment the + # total number of matches seen. That's simpler when testing large numbers + # of instructions (as these tests to). + while 1 { + expect { + -re "^ +\[0-9\]+ 0000 08A40386\[^\n]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0004 08A44386\[^\n]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0008 08A46386\[^\n]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 000c 08A48386\[^\n]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0010 08A4C386\[^\n]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0014 08A4E386\[^\n]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0018 08A41386\[^\n]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 001c 08A45386\[^\n]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0020 08A47386\[^\n]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0024 08A49386\[^\n]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0028 08A4D386\[^\n]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 002c 08A4F386\[^\n]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0030 08A40986\[^\n]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0034 08A44986\[^\n]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0038 08A46986\[^\n]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 003c 08A48986\[^\n]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0040 08A4C986\[^\n]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0044 08A4E986\[^\n]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0048 08A41986\[^\n]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 004c 08A45986\[^\n]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0050 08A47986\[^\n]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0054 08A49986\[^\n]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0058 08A4D986\[^\n]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 005c 08A4F986\[^\n]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0060 08A409C6\[^\n]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0064 08A449C6\[^\n]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0068 08A469C6\[^\n]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 006c 08A489C6\[^\n]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0070 08A4C9C6\[^\n]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0074 08A4E9C6\[^\n]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0078 08A419C6\[^\n]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 007c 08A459C6\[^\n]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0080 08A479C6\[^\n]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0084 08A499C6\[^\n]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0088 08A4D9C6\[^\n]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 008c 08A4F9C6\[^\n]*\n" { set x [expr $x+1] } + -re "\[^\n\]*\n" { } + timeout { perror "timeout\n"; break } + eof { break } + } + } + + # This was intended to do any cleanup necessary. It kinda looks like it + # isn't needed, but just in case, please keep it in for now. + gas_finish + + # Did we find what we were looking for? If not, flunk it. + if [expr $x==36] then { pass $testname } else { fail $testname } +} + +proc do_dcor {} { + set testname "dcor.s: dcor tests" + set x 0 + + gas_start "dcor.s" "-al" + + # Check the assembled instruction against a table built by the HP assembler + # Any differences should be checked by hand -- with the number of problems + # I've seen in the HP assembler I don't completely trust it. + # + # Instead of having a variable for each match string just increment the + # total number of matches seen. That's simpler when testing large numbers + # of instructions (as these tests to). + while 1 { + expect { + -re "^ +\[0-9\]+ 0000 08800B85\[^\n]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0004 08804B85\[^\n]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0008 08806B85\[^\n]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 000c 08808B85\[^\n]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0010 0880CB85\[^\n]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0014 0880EB85\[^\n]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0018 08801B85\[^\n]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 001c 08805B85\[^\n]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0020 08807B85\[^\n]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0024 08809B85\[^\n]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0028 0880DB85\[^\n]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 002c 0880FB85\[^\n]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0030 08800BC5\[^\n]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0034 08804BC5\[^\n]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0038 08806BC5\[^\n]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 003c 08808BC5\[^\n]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0040 0880CBC5\[^\n]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0044 0880EBC5\[^\n]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0048 08801BC5\[^\n]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 004c 08805BC5\[^\n]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0050 08807BC5\[^\n]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0054 08809BC5\[^\n]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0058 0880DBC5\[^\n]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 005c 0880FBC5\[^\n]*\n" { set x [expr $x+1] } + -re "\[^\n\]*\n" { } + timeout { perror "timeout\n"; break } + eof { break } + } + } + + # This was intended to do any cleanup necessary. It kinda looks like it + # isn't needed, but just in case, please keep it in for now. + gas_finish + + # Did we find what we were looking for? If not, flunk it. + if [expr $x==24] then { pass $testname } else { fail $testname } +} + +proc do_addi {} { + set testname "addi.s: addi tests" + set x 0 + + gas_start "addi.s" "-al" + + # Check the assembled instruction against a table built by the HP assembler + # Any differences should be checked by hand -- with the number of problems + # I've seen in the HP assembler I don't completely trust it. + # + # Instead of having a variable for each match string just increment the + # total number of matches seen. That's simpler when testing large numbers + # of instructions (as these tests to). + while 1 { + expect { + -re "^ +\[0-9\]+ 0000 B4A600F6\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0004 B4A620F6\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0008 B4A640F6\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 000c B4A660F6\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0010 B4A680F6\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0014 B4A6A0F6\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0018 B4A6C0F6\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 001c B4A6E0F6\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0020 B4A610F6\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0024 B4A630F6\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0028 B4A650F6\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 002c B4A670F6\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0030 B4A690F6\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0034 B4A6B0F6\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0038 B4A6D0F6\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 003c B4A6F0F6\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0040 B4A608F6\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0044 B4A628F6\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0048 B4A648F6\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 004c B4A668F6\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0050 B4A688F6\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0054 B4A6A8F6\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0058 B4A6C8F6\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 005c B4A6E8F6\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0060 B4A618F6\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0064 B4A638F6\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0068 B4A658F6\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 006c B4A678F6\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0070 B4A698F6\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0074 B4A6B8F6\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0078 B4A6D8F6\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 007c B4A6F8F6\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0080 B0A600F6\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0084 B0A620F6\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0088 B0A640F6\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 008c B0A660F6\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0090 B0A680F6\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0094 B0A6A0F6\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0098 B0A6C0F6\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 009c B0A6E0F6\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 00a0 B0A610F6\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 00a4 B0A630F6\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 00a8 B0A650F6\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 00ac B0A670F6\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 00b0 B0A690F6\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 00b4 B0A6B0F6\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 00b8 B0A6D0F6\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 00bc B0A6F0F6\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 00c0 B0A608F6\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 00c4 B0A628F6\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 00c8 B0A648F6\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 00cc B0A668F6\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 00d0 B0A688F6\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 00d4 B0A6A8F6\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 00d8 B0A6C8F6\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 00dc B0A6E8F6\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 00e0 B0A618F6\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 00e4 B0A638F6\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 00e8 B0A658F6\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 00ec B0A678F6\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 00f0 B0A698F6\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 00f4 B0A6B8F6\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 00f8 B0A6D8F6\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 00fc B0A6F8F6\[^\n\]*\n" { set x [expr $x+1] } + -re "\[^\n\]*\n" { } + timeout { perror "timeout\n"; break } + eof { break } + } + } + + # This was intended to do any cleanup necessary. It kinda looks like it + # isn't needed, but just in case, please keep it in for now. + gas_finish + + # Did we find what we were looking for? If not, flunk it. + if [expr $x==64] then { pass $testname } else { fail $testname } +} + +proc do_subi {} { + set testname "subi.s: subi tests" + set x 0 + + gas_start "subi.s" "-al" + + # Check the assembled instruction against a table built by the HP assembler + # Any differences should be checked by hand -- with the number of problems + # I've seen in the HP assembler I don't completely trust it. + # + # Instead of having a variable for each match string just increment the + # total number of matches seen. That's simpler when testing large numbers + # of instructions (as these tests to). + while 1 { + expect { + -re "^ +\[0-9\]+ 0000 94A600F6\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0004 94A620F6\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0008 94A640F6\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 000c 94A660F6\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0010 94A680F6\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0014 94A6A0F6\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0018 94A6C0F6\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 001c 94A6E0F6\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0020 94A610F6\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0024 94A630F6\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0028 94A650F6\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 002c 94A670F6\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0030 94A690F6\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0034 94A6B0F6\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0038 94A6D0F6\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 003c 94A6F0F6\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0040 94A608F6\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0044 94A628F6\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0048 94A648F6\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 004c 94A668F6\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0050 94A688F6\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0054 94A6A8F6\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0058 94A6C8F6\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 005c 94A6E8F6\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0060 94A618F6\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0064 94A638F6\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0068 94A658F6\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 006c 94A678F6\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0070 94A698F6\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0074 94A6B8F6\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0078 94A6D8F6\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 007c 94A6F8F6\[^\n\]*\n" { set x [expr $x+1] } + -re "\[^\n\]*\n" { } + timeout { perror "timeout\n"; break } + eof { break } + } + } + + # This was intended to do any cleanup necessary. It kinda looks like it + # isn't needed, but just in case, please keep it in for now. + gas_finish + + # Did we find what we were looking for? If not, flunk it. + if [expr $x==32] then { pass $testname } else { fail $testname } +} + +proc do_shift {} { + set testname "shift.s: shift tests" + set x 0 + + gas_start "shift.s" "-al" + + # Check the assembled instruction against a table built by the HP assembler + # Any differences should be checked by hand -- with the number of problems + # I've seen in the HP assembler I don't completely trust it. + # + # Instead of having a variable for each match string just increment the + # total number of matches seen. That's simpler when testing large numbers + # of instructions (as these tests to). + while 1 { + expect { + -re "^ +\[0-9\]+ 0000 D0A40006\[^\n]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0004 D0A42006\[^\n]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0008 D0A44006\[^\n]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 000c D0A46006\[^\n]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0010 D0A48006\[^\n]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0014 D0A4A006\[^\n]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0018 D0A4C006\[^\n]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 001c D0A4E006\[^\n]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0020 D0A40B46\[^\n]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0024 D0A42B46\[^\n]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0028 D0A44B46\[^\n]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 002c D0A46B46\[^\n]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0030 D0A48B46\[^\n]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0034 D0A4AB46\[^\n]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0038 D0A4CB46\[^\n]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 003c D0A4EB46\[^\n]*\n" { set x [expr $x+1] } + -re "\[^\n\]*\n" { } + timeout { perror "timeout\n"; break } + eof { break } + } + } + + # This was intended to do any cleanup necessary. It kinda looks like it + # isn't needed, but just in case, please keep it in for now. + gas_finish + + # Did we find what we were looking for? If not, flunk it. + if [expr $x==16] then { pass $testname } else { fail $testname } +} + +proc do_extract {} { + set testname "extract.s: extract tests" + set x 0 + + gas_start "extract.s" "-al" + + # Check the assembled instruction against a table built by the HP assembler + # Any differences should be checked by hand -- with the number of problems + # I've seen in the HP assembler I don't completely trust it. + # + # Instead of having a variable for each match string just increment the + # total number of matches seen. That's simpler when testing large numbers + # of instructions (as these tests to). + while 1 { + expect { + -re "^ +\[0-9\]+ 0000 D08618B6\[^\n]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0004 D08638B6\[^\n]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0008 D08658B6\[^\n]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 000c D08678B6\[^\n]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0010 D08698B6\[^\n]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0014 D086B8B6\[^\n]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0018 D086D8B6\[^\n]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 001c D086F8B6\[^\n]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0020 D0861CB6\[^\n]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0024 D0863CB6\[^\n]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0028 D0865CB6\[^\n]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 002c D0867CB6\[^\n]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0030 D0869CB6\[^\n]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0034 D086BCB6\[^\n]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0038 D086DCB6\[^\n]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 003c D086FCB6\[^\n]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0040 D086101B\[^\n]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0044 D086301B\[^\n]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0048 D086501B\[^\n]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 004c D086701B\[^\n]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0050 D086901B\[^\n]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0054 D086B01B\[^\n]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0058 D086D01B\[^\n]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 005c D086F01B\[^\n]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0060 D086141B\[^\n]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0064 D086341B\[^\n]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0068 D086541B\[^\n]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 006c D086741B\[^\n]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0070 D086941B\[^\n]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0074 D086B41B\[^\n]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0078 D086D41B\[^\n]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 007c D086F41B\[^\n]*\n" { set x [expr $x+1] } + -re "\[^\n\]*\n" { } + timeout { perror "timeout\n"; break } + eof { break } + } + } + + # This was intended to do any cleanup necessary. It kinda looks like it + # isn't needed, but just in case, please keep it in for now. + gas_finish + + # Did we find what we were looking for? If not, flunk it. + if [expr $x==32] then { pass $testname } else { fail $testname } +} + +proc do_deposit {} { + set testname "deposit.s: deposit tests" + set x 0 + + gas_start "deposit.s" "-al" + + # Check the assembled instruction against a table built by the HP assembler + # Any differences should be checked by hand -- with the number of problems + # I've seen in the HP assembler I don't completely trust it. + # + # Instead of having a variable for each match string just increment the + # total number of matches seen. That's simpler when testing large numbers + # of instructions (as these tests to). + while 1 { + expect { + -re "^ +\[0-9\]+ 0000 D4C40B56\[^\n]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0004 D4C42B56\[^\n]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0008 D4C44B56\[^\n]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 000c D4C46B56\[^\n]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0010 D4C48B56\[^\n]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0014 D4C4AB56\[^\n]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0018 D4C4CB56\[^\n]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 001c D4C4EB56\[^\n]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0020 D4C40F56\[^\n]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0024 D4C42F56\[^\n]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0028 D4C44F56\[^\n]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 002c D4C46F56\[^\n]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0030 D4C48F56\[^\n]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0034 D4C4AF56\[^\n]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0038 D4C4CF56\[^\n]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 003c D4C4EF56\[^\n]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0040 D4C4001B\[^\n]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0044 D4C4201B\[^\n]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0048 D4C4401B\[^\n]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 004c D4C4601B\[^\n]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0050 D4C4801B\[^\n]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0054 D4C4A01B\[^\n]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0058 D4C4C01B\[^\n]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 005c D4C4E01B\[^\n]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0060 D4C4041B\[^\n]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0064 D4C4241B\[^\n]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0068 D4C4441B\[^\n]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 006c D4C4641B\[^\n]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0070 D4C4841B\[^\n]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0074 D4C4A41B\[^\n]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0078 D4C4C41B\[^\n]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 007c D4C4E41B\[^\n]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0080 D4DF141B\[^\n]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0084 D4DF341B\[^\n]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0088 D4DF541B\[^\n]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 008c D4DF741B\[^\n]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0090 D4DF941B\[^\n]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0094 D4DFB41B\[^\n]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0098 D4DFD41B\[^\n]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 009c D4DFF41B\[^\n]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 00a0 D4DF101B\[^\n]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 00a4 D4DF301B\[^\n]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 00a8 D4DF501B\[^\n]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 00ac D4DF701B\[^\n]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 00b0 D4DF901B\[^\n]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 00b4 D4DFB01B\[^\n]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 00b8 D4DFD01B\[^\n]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 00bc D4DFF01B\[^\n]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 00c0 D4DF1F76\[^\n]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 00c4 D4DF3F76\[^\n]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 00c8 D4DF5F76\[^\n]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 00cc D4DF7F76\[^\n]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 00d0 D4DF9F76\[^\n]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 00d4 D4DFBF76\[^\n]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 00d8 D4DFDF76\[^\n]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 00dc D4DFFF76\[^\n]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 00e0 D4DF1B76\[^\n]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 00e4 D4DF3B76\[^\n]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 00e8 D4DF5B76\[^\n]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 00ec D4DF7B76\[^\n]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 00f0 D4DF9B76\[^\n]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 00f4 D4DFBB76\[^\n]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 00f8 D4DFDB76\[^\n]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 00fc D4DFFB76\[^\n]*\n" { set x [expr $x+1] } + -re "\[^\n\]*\n" { } + timeout { perror "timeout\n"; break } + eof { break } + } + } + + # This was intended to do any cleanup necessary. It kinda looks like it + # isn't needed, but just in case, please keep it in for now. + gas_finish + + # Did we find what we were looking for? If not, flunk it. + if [expr $x==64] then { pass $testname } else { fail $testname } +} + +proc do_system {} { + set testname "system.s: system tests" + set x 0 + + gas_start "system.s" "-al" + + # Check the assembled instruction against a table built by the HP assembler + # Any differences should be checked by hand -- with the number of problems + # I've seen in the HP assembler I don't completely trust it. + # + # Instead of having a variable for each match string just increment the + # total number of matches seen. That's simpler when testing large numbers + # of instructions (as these tests to). + while 1 { + expect { + -re "^ +\[0-9\]+ 0000 00018005\[^\n]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0004 00000C00\[^\n]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0008 00000CA0\[^\n]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 000c 00050D64\[^\n]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0010 00050E64\[^\n]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0014 00041860\[^\n]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0018 00A010A4\[^\n]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 001c 00041820\[^\n]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0020 01441840\[^\n]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0024 000004A4\[^\n]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0028 014008A4\[^\n]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 002c 00000400\[^\n]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0030 00100400\[^\n]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0034 140004D2\[^\n]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0038 04A61187\[^\n]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 003c 04A13187\[^\n]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0040 04A611C7\[^\n]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0044 04A131C7\[^\n]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0048 04A41346\[^\n]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 004c 04A41366\[^\n]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0050 04A41306\[^\n]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0054 04A41326\[^\n]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0058 04A41306\[^\n]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 005c 04A41040\[^\n]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0060 04A42040\[^\n]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0064 04A41000\[^\n]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0068 04A42000\[^\n]*\n" { set x [expr $x+1] } + -re "\[^\n\]*\n" { } + timeout { perror "timeout\n"; break } + eof { break } + } + } + + # This was intended to do any cleanup necessary. It kinda looks like it + # isn't needed, but just in case, please keep it in for now. + gas_finish + + # Did we find what we were looking for? If not, flunk it. + if [expr $x==27] then { pass $testname } else { fail $testname } +} + +proc do_purge {} { + set testname "purge.s: purge tests" + set x 0 + + gas_start "purge.s" "-al" + + # Check the assembled instruction against a table built by the HP assembler + # Any differences should be checked by hand -- with the number of problems + # I've seen in the HP assembler I don't completely trust it. + # + # Instead of having a variable for each match string just increment the + # total number of matches seen. That's simpler when testing large numbers + # of instructions (as these tests to). + while 1 { + expect { + -re "^ +\[0-9\]+ 0000 04A41200\[^\n]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0004 04A41220\[^\n]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0008 04A42200\[^\n]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 000c 04A42220\[^\n]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0010 04A41240\[^\n]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0014 04A41260\[^\n]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0018 04A42240\[^\n]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 001c 04A42260\[^\n]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0020 04A41380\[^\n]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0024 04A413A0\[^\n]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0028 04A41280\[^\n]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 002c 04A412A0\[^\n]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0030 04A42280\[^\n]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0034 04A422A0\[^\n]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0038 04A412C0\[^\n]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 003c 04A412E0\[^\n]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0040 04A422C0\[^\n]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0044 04A422E0\[^\n]*\n" { set x [expr $x+1] } + + -re "\[^\n\]*\n" { } + timeout { perror "timeout\n"; break } + eof { break } + } + } + + # This was intended to do any cleanup necessary. It kinda looks like it + # isn't needed, but just in case, please keep it in for now. + gas_finish + + # Did we find what we were looking for? If not, flunk it. + if [expr $x==18] then { pass $testname } else { fail $testname } +} + +proc do_fp_misc {} { + set testname "fp_misc.s: fp_misc tests" + set x 0 + + gas_start "fp_misc.s" "-al" + + # Check the assembled instruction against a table built by the HP assembler + # Any differences should be checked by hand -- with the number of problems + # I've seen in the HP assembler I don't completely trust it. + # + # Instead of having a variable for each match string just increment the + # total number of matches seen. That's simpler when testing large numbers + # of instructions (as these tests to). + while 1 { + expect { + -re "^ +\[0-9\]+ 0000 30002420\[^\n\]*\n" { set x [expr $x+1] } + -re "\[^\n\]*\n" { } + timeout { perror "timeout\n"; break } + eof { break } + } + } + + # This was intended to do any cleanup necessary. It kinda looks like it + # isn't needed, but just in case, please keep it in for now. + gas_finish + + # Did we find what we were looking for? If not, flunk it. + if [expr $x==1] then { pass $testname } else { fail $testname } +} + +proc do_fmem {} { + set testname "fmem.s: fmem tests" + set x 0 + + gas_start "fmem.s" "-al" + + # Check the assembled instruction against a table built by the HP assembler + # Any differences should be checked by hand -- with the number of problems + # I've seen in the HP assembler I don't completely trust it. + # + # Instead of having a variable for each match string just increment the + # total number of matches seen. That's simpler when testing large numbers + # of instructions (as these tests to). + while 1 { + expect { + -re "^ +\[0-9\]+ 0000 24A40006\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0004 24A42006\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0008 24A40026\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 000c 24A42026\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0010 2CA40006\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0014 2CA42006\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0018 2CA40026\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 001c 2CA42026\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0020 24A40206\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0024 24A42206\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0028 24A40226\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 002c 24A42226\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0030 2CA40206\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0034 2CA42206\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0038 2CA40226\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 003c 2CA42226\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0040 3CA40206\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0044 3CA42206\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0048 3CA40226\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 004c 3CA42226\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0050 24A01006\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0054 24A03026\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0058 24A01026\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 005c 2CA01006\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0060 2CA03026\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0064 2CA01026\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0068 24A01206\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 006c 24A03226\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0070 24A01226\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0074 2CA01206\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0078 2CA03226\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 007c 2CA01226\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0080 3CA01206\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0084 3CA03226\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0088 3CA01226\[^\n\]*\n" { set x [expr $x+1] } + -re "\[^\n\]*\n" { } + timeout { perror "timeout\n"; break } + eof { break } + } + } + + # This was intended to do any cleanup necessary. It kinda looks like it + # isn't needed, but just in case, please keep it in for now. + gas_finish + + # Did we find what we were looking for? If not, flunk it. + if [expr $x==35] then { pass $testname } else { fail $testname } +} + +proc do_fp_comp {} { + set testname "fp_comp.s: fp_comp tests" + set x 0 + + gas_start "fp_comp.s" "-al" + + # Check the assembled instruction against a table built by the HP assembler + # Any differences should be checked by hand -- with the number of problems + # I've seen in the HP assembler I don't completely trust it. + # + # Instead of having a variable for each match string just increment the + # total number of matches seen. That's simpler when testing large numbers + # of instructions (as these tests to). + while 1 { + expect { + -re "^ +\[0-9\]+ 0000 30A0400A\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0004 30A0480A\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0008 30A0580A\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 000c 32804018\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0010 32804818\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0014 30A0600A\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0018 30A0680A\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 001c 30A0780A\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0020 32806018\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0024 32806818\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0028 30A0800A\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 002c 30A0880A\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0030 30A0980A\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0034 32808018\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0038 32808818\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 003c 30A0A00A\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0040 30A0A80A\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0044 30A0B80A\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0048 3280A018\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 004c 3280A818\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0050 3088060C\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0054 30880E0C\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0058 30881E0C\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 005c 3298061C\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0060 32980E1C\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0064 32981E1C\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0068 3088260C\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 006c 30882E0C\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0070 30883E0C\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0074 3298261C\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0078 32982E1C\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 007c 32983E1C\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0080 3088460C\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0084 30884E0C\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0088 30885E0C\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 008c 3298461C\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0090 32984E1C\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0094 32985E1C\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0098 3088660C\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 009c 30886E0C\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 00a0 30887E0C\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 00a4 3298661C\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 00a8 32986E1C\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 00ac 32987E1C\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 00b0 3088860C\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 00b4 30888E0C\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 00b8 30889E0C\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 00bc 3298861C\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 00c0 32988E1C\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 00c4 32989E1C\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 00c8 180120E2\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 00cc 1A11A4D2\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 00d0 980120E2\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 00d4 9A11A4D2\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 00d8 38854706\[^\n\]*\n" { set x [expr $x+1] } + -re "\[^\n\]*\n" { } + timeout { perror "timeout\n"; break } + eof { break } + } + } + + # This was intended to do any cleanup necessary. It kinda looks like it + # isn't needed, but just in case, please keep it in for now. + gas_finish + + # Did we find what we were looking for? If not, flunk it. + if [expr $x==55] then { pass $testname } else { fail $testname } +} + +proc do_fp_conv {} { + set testname "fp_conv.s: fp_conv tests" + set x 0 + + gas_start "fp_conv.s" "-al" + + # Check the assembled instruction against a table built by the HP assembler + # Any differences should be checked by hand -- with the number of problems + # I've seen in the HP assembler I don't completely trust it. + # + # Instead of having a variable for each match string just increment the + # total number of matches seen. That's simpler when testing large numbers + # of instructions (as these tests to). + while 1 { + expect { + -re "^ +\[0-9\]+ 0000 30A0020A\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0004 30A0220A\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0008 30A0620A\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 000c 30A00A0A\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0010 30A02A0A\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0014 30A06A0A\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0018 30A01A0A\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 001c 30A03A0A\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0020 30A07A0A\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0024 32800218\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0028 32802218\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 002c 32806218\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0030 32800A18\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0034 32802A18\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0038 32806A18\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 003c 32801A18\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0040 32803A18\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0044 32807A18\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0048 30A0820A\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 004c 30A0A20A\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0050 30A0E20A\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0054 30A08A0A\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0058 30A0AA0A\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 005c 30A0EA0A\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0060 30A09A0A\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0064 30A0BA0A\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0068 30A0FA0A\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 006c 32808218\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0070 3280A218\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0074 3280E218\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0078 32808A18\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 007c 3280AA18\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0080 3280EA18\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0084 32809A18\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0088 3280BA18\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 008c 3280FA18\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0090 30A1020A\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0094 30A1220A\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0098 30A1620A\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 009c 30A10A0A\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 00a0 30A12A0A\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 00a4 30A16A0A\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 00a8 30A11A0A\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 00ac 30A13A0A\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 00b0 30A17A0A\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 00b4 32810218\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 00b8 32812218\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 00bc 32816218\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 00c0 32810A18\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 00c4 32812A18\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 00c8 32816A18\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 00cc 32811A18\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 00d0 32813A18\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 00d4 32817A18\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 00d8 30A1820A\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 00dc 30A1A20A\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 00e0 30A1E20A\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 00e4 30A18A0A\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 00e8 30A1AA0A\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 00ec 30A1EA0A\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 00f0 30A19A0A\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 00f4 30A1BA0A\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 00f8 30A1FA0A\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 00fc 32818218\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0100 3281A218\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0104 3281E218\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0108 32818A18\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 010c 3281AA18\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0110 3281EA18\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0114 32819A18\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0118 3281BA18\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 011c 3281FA18\[^\n\]*\n" { set x [expr $x+1] } + -re "\[^\n\]*\n" { } + timeout { perror "timeout\n"; break } + eof { break } + } + } + + # This was intended to do any cleanup necessary. It kinda looks like it + # isn't needed, but just in case, please keep it in for now. + gas_finish + + # Did we find what we were looking for? If not, flunk it. + if [expr $x==72] then { pass $testname } else { fail $testname } +} + +proc do_fp_fcmp {} { + set testname "fp_fcmp.s: fp_fcmp tests" + set x 0 + + gas_start "fp_fcmp.s" "-al" + + # Check the assembled instruction against a table built by the HP assembler + # Any differences should be checked by hand -- with the number of problems + # I've seen in the HP assembler I don't completely trust it. + # + # Instead of having a variable for each match string just increment the + # total number of matches seen. That's simpler when testing large numbers + # of instructions (as these tests to). + while 1 { + expect { + -re "^ +\[0-9\]+ 0000 30850400\[^\n\]*\n" {set x [expr $x+1] } + -re "^ +\[0-9\]+ 0004 30850401\[^\n\]*\n" {set x [expr $x+1] } + -re "^ +\[0-9\]+ 0008 30850402\[^\n\]*\n" {set x [expr $x+1] } + -re "^ +\[0-9\]+ 000c 30850403\[^\n\]*\n" {set x [expr $x+1] } + -re "^ +\[0-9\]+ 0010 30850404\[^\n\]*\n" {set x [expr $x+1] } + -re "^ +\[0-9\]+ 0014 30850405\[^\n\]*\n" {set x [expr $x+1] } + -re "^ +\[0-9\]+ 0018 30850406\[^\n\]*\n" {set x [expr $x+1] } + -re "^ +\[0-9\]+ 001c 30850407\[^\n\]*\n" {set x [expr $x+1] } + -re "^ +\[0-9\]+ 0020 30850408\[^\n\]*\n" {set x [expr $x+1] } + -re "^ +\[0-9\]+ 0024 30850409\[^\n\]*\n" {set x [expr $x+1] } + -re "^ +\[0-9\]+ 0028 3085040A\[^\n\]*\n" {set x [expr $x+1] } + -re "^ +\[0-9\]+ 002c 3085040B\[^\n\]*\n" {set x [expr $x+1] } + -re "^ +\[0-9\]+ 0030 3085040C\[^\n\]*\n" {set x [expr $x+1] } + -re "^ +\[0-9\]+ 0034 3085040D\[^\n\]*\n" {set x [expr $x+1] } + -re "^ +\[0-9\]+ 0038 3085040E\[^\n\]*\n" {set x [expr $x+1] } + -re "^ +\[0-9\]+ 003c 3085040F\[^\n\]*\n" {set x [expr $x+1] } + -re "^ +\[0-9\]+ 0040 30850410\[^\n\]*\n" {set x [expr $x+1] } + -re "^ +\[0-9\]+ 0044 30850411\[^\n\]*\n" {set x [expr $x+1] } + -re "^ +\[0-9\]+ 0048 30850412\[^\n\]*\n" {set x [expr $x+1] } + -re "^ +\[0-9\]+ 004c 30850413\[^\n\]*\n" {set x [expr $x+1] } + -re "^ +\[0-9\]+ 0050 30850414\[^\n\]*\n" {set x [expr $x+1] } + -re "^ +\[0-9\]+ 0054 30850415\[^\n\]*\n" {set x [expr $x+1] } + -re "^ +\[0-9\]+ 0058 30850416\[^\n\]*\n" {set x [expr $x+1] } + -re "^ +\[0-9\]+ 005c 30850417\[^\n\]*\n" {set x [expr $x+1] } + -re "^ +\[0-9\]+ 0060 30850418\[^\n\]*\n" {set x [expr $x+1] } + -re "^ +\[0-9\]+ 0064 30850419\[^\n\]*\n" {set x [expr $x+1] } + -re "^ +\[0-9\]+ 0068 3085041A\[^\n\]*\n" {set x [expr $x+1] } + -re "^ +\[0-9\]+ 006c 3085041B\[^\n\]*\n" {set x [expr $x+1] } + -re "^ +\[0-9\]+ 0070 3085041C\[^\n\]*\n" {set x [expr $x+1] } + -re "^ +\[0-9\]+ 0074 3085041D\[^\n\]*\n" {set x [expr $x+1] } + -re "^ +\[0-9\]+ 0078 3085041E\[^\n\]*\n" {set x [expr $x+1] } + -re "^ +\[0-9\]+ 007c 3085041F\[^\n\]*\n" {set x [expr $x+1] } + -re "^ +\[0-9\]+ 0080 30850C00\[^\n\]*\n" {set x [expr $x+1] } + -re "^ +\[0-9\]+ 0084 30850C01\[^\n\]*\n" {set x [expr $x+1] } + -re "^ +\[0-9\]+ 0088 30850C02\[^\n\]*\n" {set x [expr $x+1] } + -re "^ +\[0-9\]+ 008c 30850C03\[^\n\]*\n" {set x [expr $x+1] } + -re "^ +\[0-9\]+ 0090 30850C04\[^\n\]*\n" {set x [expr $x+1] } + -re "^ +\[0-9\]+ 0094 30850C05\[^\n\]*\n" {set x [expr $x+1] } + -re "^ +\[0-9\]+ 0098 30850C06\[^\n\]*\n" {set x [expr $x+1] } + -re "^ +\[0-9\]+ 009c 30850C07\[^\n\]*\n" {set x [expr $x+1] } + -re "^ +\[0-9\]+ 00a0 30850C08\[^\n\]*\n" {set x [expr $x+1] } + -re "^ +\[0-9\]+ 00a4 30850C09\[^\n\]*\n" {set x [expr $x+1] } + -re "^ +\[0-9\]+ 00a8 30850C0A\[^\n\]*\n" {set x [expr $x+1] } + -re "^ +\[0-9\]+ 00ac 30850C0B\[^\n\]*\n" {set x [expr $x+1] } + -re "^ +\[0-9\]+ 00b0 30850C0C\[^\n\]*\n" {set x [expr $x+1] } + -re "^ +\[0-9\]+ 00b4 30850C0D\[^\n\]*\n" {set x [expr $x+1] } + -re "^ +\[0-9\]+ 00b8 30850C0E\[^\n\]*\n" {set x [expr $x+1] } + -re "^ +\[0-9\]+ 00bc 30850C0F\[^\n\]*\n" {set x [expr $x+1] } + -re "^ +\[0-9\]+ 00c0 30850C10\[^\n\]*\n" {set x [expr $x+1] } + -re "^ +\[0-9\]+ 00c4 30850C11\[^\n\]*\n" {set x [expr $x+1] } + -re "^ +\[0-9\]+ 00c8 30850C12\[^\n\]*\n" {set x [expr $x+1] } + -re "^ +\[0-9\]+ 00cc 30850C13\[^\n\]*\n" {set x [expr $x+1] } + -re "^ +\[0-9\]+ 00d0 30850C14\[^\n\]*\n" {set x [expr $x+1] } + -re "^ +\[0-9\]+ 00d4 30850C15\[^\n\]*\n" {set x [expr $x+1] } + -re "^ +\[0-9\]+ 00d8 30850C16\[^\n\]*\n" {set x [expr $x+1] } + -re "^ +\[0-9\]+ 00dc 30850C17\[^\n\]*\n" {set x [expr $x+1] } + -re "^ +\[0-9\]+ 00e0 30850C18\[^\n\]*\n" {set x [expr $x+1] } + -re "^ +\[0-9\]+ 00e4 30850C19\[^\n\]*\n" {set x [expr $x+1] } + -re "^ +\[0-9\]+ 00e8 30850C1A\[^\n\]*\n" {set x [expr $x+1] } + -re "^ +\[0-9\]+ 00ec 30850C1B\[^\n\]*\n" {set x [expr $x+1] } + -re "^ +\[0-9\]+ 00f0 30850C1C\[^\n\]*\n" {set x [expr $x+1] } + -re "^ +\[0-9\]+ 00f4 30850C1D\[^\n\]*\n" {set x [expr $x+1] } + -re "^ +\[0-9\]+ 00f8 30850C1E\[^\n\]*\n" {set x [expr $x+1] } + -re "^ +\[0-9\]+ 00fc 30850C1F\[^\n\]*\n" {set x [expr $x+1] } + -re "^ +\[0-9\]+ 0100 30851C00\[^\n\]*\n" {set x [expr $x+1] } + -re "^ +\[0-9\]+ 0104 30851C01\[^\n\]*\n" {set x [expr $x+1] } + -re "^ +\[0-9\]+ 0108 30851C02\[^\n\]*\n" {set x [expr $x+1] } + -re "^ +\[0-9\]+ 010c 30851C03\[^\n\]*\n" {set x [expr $x+1] } + -re "^ +\[0-9\]+ 0110 30851C04\[^\n\]*\n" {set x [expr $x+1] } + -re "^ +\[0-9\]+ 0114 30851C05\[^\n\]*\n" {set x [expr $x+1] } + -re "^ +\[0-9\]+ 0118 30851C06\[^\n\]*\n" {set x [expr $x+1] } + -re "^ +\[0-9\]+ 011c 30851C07\[^\n\]*\n" {set x [expr $x+1] } + -re "^ +\[0-9\]+ 0120 30851C08\[^\n\]*\n" {set x [expr $x+1] } + -re "^ +\[0-9\]+ 0124 30851C09\[^\n\]*\n" {set x [expr $x+1] } + -re "^ +\[0-9\]+ 0128 30851C0A\[^\n\]*\n" {set x [expr $x+1] } + -re "^ +\[0-9\]+ 012c 30851C0B\[^\n\]*\n" {set x [expr $x+1] } + -re "^ +\[0-9\]+ 0130 30851C0C\[^\n\]*\n" {set x [expr $x+1] } + -re "^ +\[0-9\]+ 0134 30851C0D\[^\n\]*\n" {set x [expr $x+1] } + -re "^ +\[0-9\]+ 0138 30851C0E\[^\n\]*\n" {set x [expr $x+1] } + -re "^ +\[0-9\]+ 013c 30851C0F\[^\n\]*\n" {set x [expr $x+1] } + -re "^ +\[0-9\]+ 0140 30851C10\[^\n\]*\n" {set x [expr $x+1] } + -re "^ +\[0-9\]+ 0144 30851C11\[^\n\]*\n" {set x [expr $x+1] } + -re "^ +\[0-9\]+ 0148 30851C12\[^\n\]*\n" {set x [expr $x+1] } + -re "^ +\[0-9\]+ 014c 30851C13\[^\n\]*\n" {set x [expr $x+1] } + -re "^ +\[0-9\]+ 0150 30851C14\[^\n\]*\n" {set x [expr $x+1] } + -re "^ +\[0-9\]+ 0154 30851C15\[^\n\]*\n" {set x [expr $x+1] } + -re "^ +\[0-9\]+ 0158 30851C16\[^\n\]*\n" {set x [expr $x+1] } + -re "^ +\[0-9\]+ 015c 30851C17\[^\n\]*\n" {set x [expr $x+1] } + -re "^ +\[0-9\]+ 0160 30851C18\[^\n\]*\n" {set x [expr $x+1] } + -re "^ +\[0-9\]+ 0164 30851C19\[^\n\]*\n" {set x [expr $x+1] } + -re "^ +\[0-9\]+ 0168 30851C1A\[^\n\]*\n" {set x [expr $x+1] } + -re "^ +\[0-9\]+ 016c 30851C1B\[^\n\]*\n" {set x [expr $x+1] } + -re "^ +\[0-9\]+ 0170 30851C1C\[^\n\]*\n" {set x [expr $x+1] } + -re "^ +\[0-9\]+ 0174 30851C1D\[^\n\]*\n" {set x [expr $x+1] } + -re "^ +\[0-9\]+ 0178 30851C1E\[^\n\]*\n" {set x [expr $x+1] } + -re "^ +\[0-9\]+ 017c 30851C1F\[^\n\]*\n" {set x [expr $x+1] } + -re "\[^\n\]*\n" { } + timeout { perror "timeout\n"; break } + eof { break } + } + } + + # This was intended to do any cleanup necessary. It kinda looks like it + # isn't needed, but just in case, please keep it in for now. + gas_finish + + # Did we find what we were looking for? If not, flunk it. + if [expr $x==96] then { pass $testname } else { fail $testname } +} + +proc do_special {} { + set testname "special.s: special tests" + set x 0 + + gas_start "special.s" "-al" + + # Check the assembled instruction against a table built by the HP assembler + # Any differences should be checked by hand -- with the number of problems + # I've seen in the HP assembler I don't completely trust it. + # + # Instead of having a variable for each match string just increment the + # total number of matches seen. That's simpler when testing large numbers + # of instructions (as these tests to). + while 1 { + expect { + -re "^ +\[0-9\]+ 0000 04A41680\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0004 04A416A0\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0008 04A41A80\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 000c 04A41AA0\[^\n\]*\n" { set x [expr $x+1] } + -re "\[^\n\]*\n" { } + timeout { perror "timeout\n"; break } + eof { break } + } + } + + # This was intended to do any cleanup necessary. It kinda looks like it + # isn't needed, but just in case, please keep it in for now. + gas_finish + + # Did we find what we were looking for? If not, flunk it. + if [expr $x==4] then { pass $testname } else { fail $testname } +} + +proc do_spop {} { + set testname "spop.s: spop tests" + set x 0 + + # This tickles a bug in the expression parser. + gas_start "spop.s" "-al" + + # Check the assembled instruction against a table built by the HP assembler + # Any differences should be checked by hand -- with the number of problems + # I've seen in the HP assembler I don't completely trust it. + # + # Instead of having a variable for each match string just increment the + # total number of matches seen. That's simpler when testing large numbers + # of instructions (as these tests to). + while 1 { + expect { + -re "^ +\[0-9\]+ 0000 10000105\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0004 10001913\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0008 10000125\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 000c 10001933\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0010 10002B05\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0014 10039B05\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0018 10002B25\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 001c 10039B25\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0020 10A00505\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0024 10A01D13\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0028 10A00525\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 002c 10A01D33\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0030 10C50705\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0034 10C51F13\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0038 10C50725\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 003c 10C51F33\[^\n\]*\n" { set x [expr $x+1] } + -re "\[^\n\]*\n" { } + timeout { perror "timeout\n"; break } + eof { break } + } + } + + # This was intended to do any cleanup necessary. It kinda looks like it + # isn't needed, but just in case, please keep it in for now. + gas_finish + + # Did we find what we were looking for? If not, flunk it. + if [expr $x==16] then { pass $testname } else { fail $testname } +} + +proc do_copr {} { + set testname "copr.s: copr tests" + set x 0 + + gas_start "copr.s" "-al" + + # Check the assembled instruction against a table built by the HP assembler + # Any differences should be checked by hand -- with the number of problems + # I've seen in the HP assembler I don't completely trust it. + # + # Instead of having a variable for each match string just increment the + # total number of matches seen. That's simpler when testing large numbers + # of instructions (as these tests to). + while 1 { + expect { + -re "^ +\[0-9\]+ 0000 30000105\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0004 30000713\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0008 30000125\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 000c 30000733\[^\n\]*\n" { set x [expr $x+1] } + -re "\[^\n\]*\n" { } + timeout { perror "timeout\n"; break } + eof { break } + } + } + + # This was intended to do any cleanup necessary. It kinda looks like it + # isn't needed, but just in case, please keep it in for now. + gas_finish + + # Did we find what we were looking for? If not, flunk it. + if [expr $x==4] then { pass $testname } else { fail $testname } +} + +proc do_coprmem {} { + set testname "coprmem.s: copr memory tests" + set x 0 + + gas_start "coprmem.s" "-al" + + # Check the assembled instruction against a table built by the HP assembler + # Any differences should be checked by hand -- with the number of problems + # I've seen in the HP assembler I don't completely trust it. + # + # Instead of having a variable for each match string just increment the + # total number of matches seen. That's simpler when testing large numbers + # of instructions (as these tests to). + while 1 { + expect { + -re "^ +\[0-9\]+ 0000 2485011A\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0004 2485211A\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0008 2485013A\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 000c 2485213A\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0010 2C85011A\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0014 2C85211A\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0018 2C85013A\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 001c 2C85213A\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0020 2485031A\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0024 2485231A\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0028 2485033A\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 002c 2485233A\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0030 2C85031A\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0034 2C85231A\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0038 2C85033A\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 003c 2C85233A\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0040 2480111A\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0044 2480313A\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0048 2480113A\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 004c 2C80111A\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0050 2C80313A\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0054 2C80113A\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0058 2480131A\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 005c 2480333A\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0060 2480133A\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0064 2C80131A\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0068 2C80333A\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 006c 2C80133A\[^\n\]*\n" { set x [expr $x+1] } + -re "\[^\n\]*\n" { } + timeout { perror "timeout\n"; break } + eof { break } + } + } + + # This was intended to do any cleanup necessary. It kinda looks like it + # isn't needed, but just in case, please keep it in for now. + gas_finish + + # Did we find what we were looking for? If not, flunk it. + if [expr $x==28] then { pass $testname } else { fail $testname } +} + +proc do_fmem_LR_tests {} { + set testname "fmemLRbug.s: LR register selection on fp mem instructions" + set x 0 + + gas_start "fmemLRbug.s" "-al" + + # Make sure we correctly handle field selectors. + while 1 { + expect { + -re "^ +\[0-9\]+ 0000 27401246\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0004 27481206\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0008 27501206\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 000c 2F401206\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0010 2F481206\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0014 2F501206\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0018 27401046\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 001c 27481006\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0020 27501006\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0024 2F401006\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0028 2F481006\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 002c 2F501006\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0030 27401246\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0034 27481206\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0038 27501206\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 003c 2F401206\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0040 2F481206\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0044 2F501206\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0048 27401046\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 004c 27481006\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0050 27501006\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0054 2F401006\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0058 2F481006\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 005c 2F501006\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0060 27590246\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0064 27590206\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0068 27590206\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 006c 2F590206\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0070 2F590206\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0074 2F590206\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0078 27590046\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 007c 27590006\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0080 27590006\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0084 2F590006\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0088 2F590006\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 008c 2F590006\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0090 27590246\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0094 27590206\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0098 27590206\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 009c 2F590206\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 00a0 2F590206\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 00a4 2F590206\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 00a8 27590046\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 00ac 27590006\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 00b0 27590006\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 00b4 2F590006\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 00b8 2F590006\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 00bc 2F590006\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 00c0 E840C000\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 00c4 08000240\[^\n\]*\n" { set x [expr $x+1] } + -re "\[^\n\]*\n" { } + timeout { perror "timeout\n"; break } + eof { break } + } + } + + # This was intended to do any cleanup necessary. It kinda looks like it + # isn't needed, but just in case, please keep it in for now. + gas_finish + + # Did we find what we were looking for? If not, flunk it. + if [expr $x==50] then { pass $testname } else { fail $testname } +} + +if [istarget hppa*-*-*] then { + # Test the basic instruction parser. + do_imem + do_immed + do_branch + do_add + do_sh1add + do_sh2add + do_sh3add + do_sub + do_ds + do_comclr + do_logical + do_unit + do_dcor + do_addi + do_subi + do_shift + do_extract + do_deposit + do_system + do_purge + do_fp_misc + do_fmem + do_fp_comp + do_fp_conv + do_fp_fcmp + do_special + do_spop + do_copr + do_coprmem + + # The "weird.s" file from the gdb testsuite. Simply verify it + # assembles. + gas_test "weird.s" "" "" "stabs parsing" + + # Test that we correctly assemble some FP memory tests which + # L/R register selects. (Regression test for a bug Tege found). + do_fmem_LR_tests +} diff --git a/gas/testsuite/gas/hppa/basic/branch.s b/gas/testsuite/gas/hppa/basic/branch.s new file mode 100644 index 0000000..a1f839d --- /dev/null +++ b/gas/testsuite/gas/hppa/basic/branch.s @@ -0,0 +1,227 @@ + .SPACE $PRIVATE$ + .SUBSPA $DATA$,QUAD=1,ALIGN=8,ACCESS=31 + .SUBSPA $BSS$,QUAD=1,ALIGN=8,ACCESS=31,ZERO,SORT=82 + .SPACE $TEXT$ + .SUBSPA $LIT$,QUAD=0,ALIGN=8,ACCESS=44 + .SUBSPA $CODE$,QUAD=0,ALIGN=8,ACCESS=44,CODE_ONLY + + .SPACE $TEXT$ + .SUBSPA $CODE$ + + .align 4 +; More branching instructions than you ever knew what to do with. +; +; We could/should test some of the corner cases for register and +; immediate fields. We should also check the assorted field +; selectors to make sure they're handled correctly. +branch_tests: + bl branch_tests,%r2 + bl,n branch_tests,%r2 + b branch_tests + b,n branch_tests + gate branch_tests,%r2 + gate,n branch_tests,%r2 + blr %r4,%r2 + blr,n %r4,%r2 + blr %r4,%r0 + blr,n %r4,%r0 + bv %r0(%r2) + bv,n %r0(%r2) + be 0x1234(%sr1,%r2) + be,n 0x1234(%sr1,%r2) + ble 0x1234(%sr1,%r2) + ble,n 0x1234(%sr1,%r2) + +movb_tests: + movb %r4,%r26,movb_tests + movb,= %r4,%r26,movb_tests + movb,< %r4,%r26,movb_tests + movb,od %r4,%r26,movb_tests + movb,tr %r4,%r26,movb_tests + movb,<> %r4,%r26,movb_tests + movb,>= %r4,%r26,movb_tests + movb,ev %r4,%r26,movb_tests +movb_nullified_tests: + movb,n %r4,%r26,movb_tests + movb,=,n %r4,%r26,movb_tests + movb,<,n %r4,%r26,movb_tests + movb,od,n %r4,%r26,movb_tests + movb,tr,n %r4,%r26,movb_tests + movb,<>,n %r4,%r26,movb_tests + movb,>=,n %r4,%r26,movb_tests + movb,ev,n %r4,%r26,movb_tests + +movib_tests: + movib 5,%r26,movib_tests + movib,= 5,%r26,movib_tests + movib,< 5,%r26,movib_tests + movib,od 5,%r26,movib_tests + movib,tr 5,%r26,movib_tests + movib,<> 5,%r26,movib_tests + movib,>= 5,%r26,movib_tests + movib,ev 5,%r26,movib_tests +movib_nullified_tests: + movib,n 5,%r26,movib_tests + movib,=,n 5,%r26,movib_tests + movib,<,n 5,%r26,movib_tests + movib,od,n 5,%r26,movib_tests + movib,tr,n 5,%r26,movib_tests + movib,<>,n 5,%r26,movib_tests + movib,>=,n 5,%r26,movib_tests + movib,ev,n 5,%r26,movib_tests + +comb_tests: + comb %r0,%r4,comb_tests + comb,= %r0,%r4,comb_tests + comb,< %r0,%r4,comb_tests + comb,<= %r0,%r4,comb_tests + comb,<< %r0,%r4,comb_tests + comb,<<= %r0,%r4,comb_tests + comb,sv %r0,%r4,comb_tests + comb,od %r0,%r4,comb_tests + comb,tr %r0,%r4,comb_tests + comb,<> %r0,%r4,comb_tests + comb,>= %r0,%r4,comb_tests + comb,> %r0,%r4,comb_tests + comb,>>= %r0,%r4,comb_tests + comb,>> %r0,%r4,comb_tests + comb,nsv %r0,%r4,comb_tests + comb,ev %r0,%r4,comb_tests +comb_nullified_tests: + comb,n %r0,%r4,comb_tests + comb,=,n %r0,%r4,comb_tests + comb,<,n %r0,%r4,comb_tests + comb,<=,n %r0,%r4,comb_tests + comb,<<,n %r0,%r4,comb_tests + comb,<<=,n %r0,%r4,comb_tests + comb,sv,n %r0,%r4,comb_tests + comb,od,n %r0,%r4,comb_tests + comb,tr,n %r0,%r4,comb_tests + comb,<>,n %r0,%r4,comb_tests + comb,>=,n %r0,%r4,comb_tests + comb,>,n %r0,%r4,comb_tests + comb,>>=,n %r0,%r4,comb_tests + comb,>>,n %r0,%r4,comb_tests + comb,nsv,n %r0,%r4,comb_tests + comb,ev,n %r0,%r4,comb_tests + +comib_tests: + comib 0,%r4,comib_tests + comib,< 0,%r4,comib_tests + comib,<= 0,%r4,comib_tests + comib,<< 0,%r4,comib_tests + comib,<<= 0,%r4,comib_tests + comib,sv 0,%r4,comib_tests + comib,od 0,%r4,comib_tests + comib,tr 0,%r4,comib_tests + comib,<> 0,%r4,comib_tests + comib,>= 0,%r4,comib_tests + comib,> 0,%r4,comib_tests + comib,>>= 0,%r4,comib_tests + comib,>> 0,%r4,comib_tests + comib,nsv 0,%r4,comib_tests + comib,ev 0,%r4,comb_tests + +comib_nullified_tests: + comib,n 0,%r4,comib_tests + comib,=,n 0,%r4,comib_tests + comib,<,n 0,%r4,comib_tests + comib,<=,n 0,%r4,comib_tests + comib,<<,n 0,%r4,comib_tests + comib,<<=,n 0,%r4,comib_tests + comib,sv,n 0,%r4,comib_tests + comib,od,n 0,%r4,comib_tests + comib,tr,n 0,%r4,comib_tests + comib,<>,n 0,%r4,comib_tests + comib,>=,n 0,%r4,comib_tests + comib,>,n 0,%r4,comib_tests + comib,>>=,n 0,%r4,comib_tests + comib,>>,n 0,%r4,comib_tests + comib,nsv,n 0,%r4,comib_tests + comib,ev,n 0,%r4,comib_tests + + + +addb_tests: + addb %r1,%r4,addb_tests + addb,= %r1,%r4,addb_tests + addb,< %r1,%r4,addb_tests + addb,<= %r1,%r4,addb_tests + addb,nuv %r1,%r4,addb_tests + addb,znv %r1,%r4,addb_tests + addb,sv %r1,%r4,addb_tests + addb,od %r1,%r4,addb_tests + addb,tr %r1,%r4,addb_tests + addb,<> %r1,%r4,addb_tests + addb,>= %r1,%r4,addb_tests + addb,> %r1,%r4,addb_tests + addb,uv %r1,%r4,addb_tests + addb,vnz %r1,%r4,addb_tests + addb,nsv %r1,%r4,addb_tests + addb,ev %r1,%r4,addb_tests +addb_nullified_tests: + addb,n %r1,%r4,addb_tests + addb,=,n %r1,%r4,addb_tests + addb,<,n %r1,%r4,addb_tests + addb,<=,n %r1,%r4,addb_tests + addb,nuv,n %r1,%r4,addb_tests + addb,znv,n %r1,%r4,addb_tests + addb,sv,n %r1,%r4,addb_tests + addb,od,n %r1,%r4,addb_tests + addb,tr,n %r1,%r4,addb_tests + addb,<>,n %r1,%r4,addb_tests + addb,>=,n %r1,%r4,addb_tests + addb,>,n %r1,%r4,addb_tests + addb,uv,n %r1,%r4,addb_tests + addb,vnz,n %r1,%r4,addb_tests + addb,nsv,n %r1,%r4,addb_tests + addb,ev,n %r1,%r4,addb_tests + +addib_tests: + addib -1,%r4,addib_tests + addib,= -1,%r4,addib_tests + addib,< -1,%r4,addib_tests + addib,<= -1,%r4,addib_tests + addib,nuv -1,%r4,addib_tests + addib,znv -1,%r4,addib_tests + addib,sv -1,%r4,addib_tests + addib,od -1,%r4,addib_tests + addib,tr -1,%r4,addib_tests + addib,<> -1,%r4,addib_tests + addib,>= -1,%r4,addib_tests + addib,> -1,%r4,addib_tests + addib,uv -1,%r4,addib_tests + addib,vnz -1,%r4,addib_tests + addib,nsv -1,%r4,addib_tests + addib,ev -1,%r4,comb_tests + +addib_nullified_tests: + addib,n -1,%r4,addib_tests + addib,=,n -1,%r4,addib_tests + addib,<,n -1,%r4,addib_tests + addib,<=,n -1,%r4,addib_tests + addib,nuv,n -1,%r4,addib_tests + addib,znv,n -1,%r4,addib_tests + addib,sv,n -1,%r4,addib_tests + addib,od,n -1,%r4,addib_tests + addib,tr,n -1,%r4,addib_tests + addib,<>,n -1,%r4,addib_tests + addib,>=,n -1,%r4,addib_tests + addib,>,n -1,%r4,addib_tests + addib,uv,n -1,%r4,addib_tests + addib,vnz,n -1,%r4,addib_tests + addib,nsv,n -1,%r4,addib_tests + addib,ev,n -1,%r4,addib_tests + + +; Needs to check lots of stuff (like corner bit cases) +bb_tests: + bvb,< %r4,bb_tests + bvb,>= %r4,bb_tests + bvb,<,n %r4,bb_tests + bvb,>=,n %r4,bb_tests + bb,< %r4,5,bb_tests + bb,>= %r4,5,bb_tests + bb,<,n %r4,5,bb_tests + bb,>=,n %r4,5,bb_tests + diff --git a/gas/testsuite/gas/hppa/basic/comclr.s b/gas/testsuite/gas/hppa/basic/comclr.s new file mode 100644 index 0000000..a8e5aa6 --- /dev/null +++ b/gas/testsuite/gas/hppa/basic/comclr.s @@ -0,0 +1,50 @@ + .SPACE $PRIVATE$ + .SUBSPA $DATA$,QUAD=1,ALIGN=8,ACCESS=31 + .SUBSPA $BSS$,QUAD=1,ALIGN=8,ACCESS=31,ZERO,SORT=82 + .SPACE $TEXT$ + .SUBSPA $LIT$,QUAD=0,ALIGN=8,ACCESS=44 + .SUBSPA $CODE$,QUAD=0,ALIGN=8,ACCESS=44,CODE_ONLY + + .SPACE $TEXT$ + .SUBSPA $CODE$ + + .align 4 +; Basic immediate instruction tests. +; +; We could/should test some of the corner cases for register and +; immediate fields. We should also check the assorted field +; selectors to make sure they're handled correctly. + comclr %r4,%r5,%r6 + comclr,= %r4,%r5,%r6 + comclr,< %r4,%r5,%r6 + comclr,<= %r4,%r5,%r6 + comclr,<< %r4,%r5,%r6 + comclr,<<= %r4,%r5,%r6 + comclr,sv %r4,%r5,%r6 + comclr,od %r4,%r5,%r6 + comclr,tr %r4,%r5,%r6 + comclr,<> %r4,%r5,%r6 + comclr,>= %r4,%r5,%r6 + comclr,> %r4,%r5,%r6 + comclr,>>= %r4,%r5,%r6 + comclr,>> %r4,%r5,%r6 + comclr,nsv %r4,%r5,%r6 + comclr,ev %r4,%r5,%r6 + + comiclr 123,%r5,%r6 + comiclr,= 123,%r5,%r6 + comiclr,< 123,%r5,%r6 + comiclr,<= 123,%r5,%r6 + comiclr,<< 123,%r5,%r6 + comiclr,<<= 123,%r5,%r6 + comiclr,sv 123,%r5,%r6 + comiclr,od 123,%r5,%r6 + comiclr,tr 123,%r5,%r6 + comiclr,<> 123,%r5,%r6 + comiclr,>= 123,%r5,%r6 + comiclr,> 123,%r5,%r6 + comiclr,>>= 123,%r5,%r6 + comiclr,>> 123,%r5,%r6 + comiclr,nsv 123,%r5,%r6 + comiclr,ev 123,%r5,%r6 + diff --git a/gas/testsuite/gas/hppa/basic/copr.s b/gas/testsuite/gas/hppa/basic/copr.s new file mode 100644 index 0000000..77cb6a2 --- /dev/null +++ b/gas/testsuite/gas/hppa/basic/copr.s @@ -0,0 +1,19 @@ + .SPACE $PRIVATE$ + .SUBSPA $DATA$,QUAD=1,ALIGN=8,ACCESS=31 + .SUBSPA $BSS$,QUAD=1,ALIGN=8,ACCESS=31,ZERO,SORT=82 + .SPACE $TEXT$ + .SUBSPA $LIT$,QUAD=0,ALIGN=8,ACCESS=44 + .SUBSPA $CODE$,QUAD=0,ALIGN=8,ACCESS=44,CODE_ONLY + + .SPACE $TEXT$ + .SUBSPA $CODE$ + + .align 4 +; We could/should test some of the corner cases for register and +; immediate fields. We should also check the assorted field +; selectors to make sure they're handled correctly. +copr_tests: + copr,4,5 + copr,4,115 + copr,4,5,n + copr,4,115,n diff --git a/gas/testsuite/gas/hppa/basic/coprmem.s b/gas/testsuite/gas/hppa/basic/coprmem.s new file mode 100644 index 0000000..7eff151 --- /dev/null +++ b/gas/testsuite/gas/hppa/basic/coprmem.s @@ -0,0 +1,55 @@ + .SPACE $PRIVATE$ + .SUBSPA $DATA$,QUAD=1,ALIGN=8,ACCESS=31 + .SUBSPA $BSS$,QUAD=1,ALIGN=8,ACCESS=31,ZERO,SORT=82 + .SPACE $TEXT$ + .SUBSPA $LIT$,QUAD=0,ALIGN=8,ACCESS=44 + .SUBSPA $CODE$,QUAD=0,ALIGN=8,ACCESS=44,CODE_ONLY + + .SPACE $TEXT$ + .SUBSPA $CODE$ + + .align 4 +; Basic copr memory tests which also test the various +; addressing modes and completers. +; +; We could/should test some of the corner cases for register and +; immediate fields. We should also check the assorted field +; selectors to make sure they're handled correctly. +; +copr_indexing_load + + cldwx,4 %r5(%sr0,%r4),%r26 + cldwx,4,s %r5(%sr0,%r4),%r26 + cldwx,4,m %r5(%sr0,%r4),%r26 + cldwx,4,sm %r5(%sr0,%r4),%r26 + clddx,4 %r5(%sr0,%r4),%r26 + clddx,4,s %r5(%sr0,%r4),%r26 + clddx,4,m %r5(%sr0,%r4),%r26 + clddx,4,sm %r5(%sr0,%r4),%r26 + +copr_indexing_store + cstwx,4 %r26,%r5(%sr0,%r4) + cstwx,4,s %r26,%r5(%sr0,%r4) + cstwx,4,m %r26,%r5(%sr0,%r4) + cstwx,4,sm %r26,%r5(%sr0,%r4) + cstdx,4 %r26,%r5(%sr0,%r4) + cstdx,4,s %r26,%r5(%sr0,%r4) + cstdx,4,m %r26,%r5(%sr0,%r4) + cstdx,4,sm %r26,%r5(%sr0,%r4) + +copr_short_memory + cldws,4 0(%sr0,%r4),%r26 + cldws,4,mb 0(%sr0,%r4),%r26 + cldws,4,ma 0(%sr0,%r4),%r26 + cldds,4 0(%sr0,%r4),%r26 + cldds,4,mb 0(%sr0,%r4),%r26 + cldds,4,ma 0(%sr0,%r4),%r26 + cstws,4 %r26,0(%sr0,%r4) + cstws,4,mb %r26,0(%sr0,%r4) + cstws,4,ma %r26,0(%sr0,%r4) + cstds,4 %r26,0(%sr0,%r4) + cstds,4,mb %r26,0(%sr0,%r4) + cstds,4,ma %r26,0(%sr0,%r4) + +; gas fucks this up thinks it gets the expression 4 modulo 5 +; cldwx,4 %r5(0,%r4),%r%r26 diff --git a/gas/testsuite/gas/hppa/basic/dcor.s b/gas/testsuite/gas/hppa/basic/dcor.s new file mode 100644 index 0000000..8474554 --- /dev/null +++ b/gas/testsuite/gas/hppa/basic/dcor.s @@ -0,0 +1,41 @@ + .SPACE $PRIVATE$ + .SUBSPA $DATA$,QUAD=1,ALIGN=8,ACCESS=31 + .SUBSPA $BSS$,QUAD=1,ALIGN=8,ACCESS=31,ZERO,SORT=82 + .SPACE $TEXT$ + .SUBSPA $LIT$,QUAD=0,ALIGN=8,ACCESS=44 + .SUBSPA $CODE$,QUAD=0,ALIGN=8,ACCESS=44,CODE_ONLY + + .SPACE $TEXT$ + .SUBSPA $CODE$ + + .align 4 +; Basic immediate instruction tests. +; +; We could/should test some of the corner cases for register and +; immediate fields. We should also check the assorted field +; selectors to make sure they're handled correctly. + dcor %r4,%r5 + dcor,sbz %r4,%r5 + dcor,shz %r4,%r5 + dcor,sdc %r4,%r5 + dcor,sbc %r4,%r5 + dcor,shc %r4,%r5 + dcor,tr %r4,%r5 + dcor,nbz %r4,%r5 + dcor,nhz %r4,%r5 + dcor,ndc %r4,%r5 + dcor,nbc %r4,%r5 + dcor,nhc %r4,%r5 + + idcor %r4,%r5 + idcor,sbz %r4,%r5 + idcor,shz %r4,%r5 + idcor,sdc %r4,%r5 + idcor,sbc %r4,%r5 + idcor,shc %r4,%r5 + idcor,tr %r4,%r5 + idcor,nbz %r4,%r5 + idcor,nhz %r4,%r5 + idcor,ndc %r4,%r5 + idcor,nbc %r4,%r5 + idcor,nhc %r4,%r5 diff --git a/gas/testsuite/gas/hppa/basic/deposit.s b/gas/testsuite/gas/hppa/basic/deposit.s new file mode 100644 index 0000000..70853b3 --- /dev/null +++ b/gas/testsuite/gas/hppa/basic/deposit.s @@ -0,0 +1,88 @@ + .SPACE $PRIVATE$ + .SUBSPA $DATA$,QUAD=1,ALIGN=8,ACCESS=31 + .SUBSPA $BSS$,QUAD=1,ALIGN=8,ACCESS=31,ZERO,SORT=82 + .SPACE $TEXT$ + .SUBSPA $LIT$,QUAD=0,ALIGN=8,ACCESS=44 + .SUBSPA $CODE$,QUAD=0,ALIGN=8,ACCESS=44,CODE_ONLY + + .SPACE $TEXT$ + .SUBSPA $CODE$ + + .align 4 +; Basic immediate instruction tests. +; +; We could/should test some of the corner cases for register and +; immediate fields. We should also check the assorted field +; selectors to make sure they're handled correctly. + zdep %r4,5,10,%r6 + zdep,= %r4,5,10,%r6 + zdep,< %r4,5,10,%r6 + zdep,od %r4,5,10,%r6 + zdep,tr %r4,5,10,%r6 + zdep,<> %r4,5,10,%r6 + zdep,>= %r4,5,10,%r6 + zdep,ev %r4,5,10,%r6 + + dep %r4,5,10,%r6 + dep,= %r4,5,10,%r6 + dep,< %r4,5,10,%r6 + dep,od %r4,5,10,%r6 + dep,tr %r4,5,10,%r6 + dep,<> %r4,5,10,%r6 + dep,>= %r4,5,10,%r6 + dep,ev %r4,5,10,%r6 + + zvdep %r4,5,%r6 + zvdep,= %r4,5,%r6 + zvdep,< %r4,5,%r6 + zvdep,od %r4,5,%r6 + zvdep,tr %r4,5,%r6 + zvdep,<> %r4,5,%r6 + zvdep,>= %r4,5,%r6 + zvdep,ev %r4,5,%r6 + + vdep %r4,5,%r6 + vdep,= %r4,5,%r6 + vdep,< %r4,5,%r6 + vdep,od %r4,5,%r6 + vdep,tr %r4,5,%r6 + vdep,<> %r4,5,%r6 + vdep,>= %r4,5,%r6 + vdep,ev %r4,5,%r6 + + vdepi -1,5,%r6 + vdepi,= -1,5,%r6 + vdepi,< -1,5,%r6 + vdepi,od -1,5,%r6 + vdepi,tr -1,5,%r6 + vdepi,<> -1,5,%r6 + vdepi,>= -1,5,%r6 + vdepi,ev -1,5,%r6 + + zvdepi -1,5,%r6 + zvdepi,= -1,5,%r6 + zvdepi,< -1,5,%r6 + zvdepi,od -1,5,%r6 + zvdepi,tr -1,5,%r6 + zvdepi,<> -1,5,%r6 + zvdepi,>= -1,5,%r6 + zvdepi,ev -1,5,%r6 + + depi -1,4,10,%r6 + depi,= -1,4,10,%r6 + depi,< -1,4,10,%r6 + depi,od -1,4,10,%r6 + depi,tr -1,4,10,%r6 + depi,<> -1,4,10,%r6 + depi,>= -1,4,10,%r6 + depi,ev -1,4,10,%r6 + + zdepi -1,4,10,%r6 + zdepi,= -1,4,10,%r6 + zdepi,< -1,4,10,%r6 + zdepi,od -1,4,10,%r6 + zdepi,tr -1,4,10,%r6 + zdepi,<> -1,4,10,%r6 + zdepi,>= -1,4,10,%r6 + zdepi,ev -1,4,10,%r6 + diff --git a/gas/testsuite/gas/hppa/basic/ds.s b/gas/testsuite/gas/hppa/basic/ds.s new file mode 100644 index 0000000..5831e26 --- /dev/null +++ b/gas/testsuite/gas/hppa/basic/ds.s @@ -0,0 +1,32 @@ + .SPACE $PRIVATE$ + .SUBSPA $DATA$,QUAD=1,ALIGN=8,ACCESS=31 + .SUBSPA $BSS$,QUAD=1,ALIGN=8,ACCESS=31,ZERO,SORT=82 + .SPACE $TEXT$ + .SUBSPA $LIT$,QUAD=0,ALIGN=8,ACCESS=44 + .SUBSPA $CODE$,QUAD=0,ALIGN=8,ACCESS=44,CODE_ONLY + + .SPACE $TEXT$ + .SUBSPA $CODE$ + + .align 4 +; Basic immediate instruction tests. +; +; We could/should test some of the corner cases for register and +; immediate fields. We should also check the assorted field +; selectors to make sure they're handled correctly. + ds %r4,%r5,%r6 + ds,= %r4,%r5,%r6 + ds,< %r4,%r5,%r6 + ds,<= %r4,%r5,%r6 + ds,<< %r4,%r5,%r6 + ds,<<= %r4,%r5,%r6 + ds,sv %r4,%r5,%r6 + ds,od %r4,%r5,%r6 + ds,tr %r4,%r5,%r6 + ds,<> %r4,%r5,%r6 + ds,>= %r4,%r5,%r6 + ds,> %r4,%r5,%r6 + ds,>>= %r4,%r5,%r6 + ds,>> %r4,%r5,%r6 + ds,nsv %r4,%r5,%r6 + ds,ev %r4,%r5,%r6 diff --git a/gas/testsuite/gas/hppa/basic/extract.s b/gas/testsuite/gas/hppa/basic/extract.s new file mode 100644 index 0000000..29030f4 --- /dev/null +++ b/gas/testsuite/gas/hppa/basic/extract.s @@ -0,0 +1,51 @@ + .SPACE $PRIVATE$ + .SUBSPA $DATA$,QUAD=1,ALIGN=8,ACCESS=31 + .SUBSPA $BSS$,QUAD=1,ALIGN=8,ACCESS=31,ZERO,SORT=82 + .SPACE $TEXT$ + .SUBSPA $LIT$,QUAD=0,ALIGN=8,ACCESS=44 + .SUBSPA $CODE$,QUAD=0,ALIGN=8,ACCESS=44,CODE_ONLY + + .SPACE $TEXT$ + .SUBSPA $CODE$ + + .align 4 +; Basic immediate instruction tests. +; +; We could/should test some of the corner cases for register and +; immediate fields. We should also check the assorted field +; selectors to make sure they're handled correctly. + extru %r4,5,10,%r6 + extru,= %r4,5,10,%r6 + extru,< %r4,5,10,%r6 + extru,od %r4,5,10,%r6 + extru,tr %r4,5,10,%r6 + extru,<> %r4,5,10,%r6 + extru,>= %r4,5,10,%r6 + extru,ev %r4,5,10,%r6 + + extrs %r4,5,10,%r6 + extrs,= %r4,5,10,%r6 + extrs,< %r4,5,10,%r6 + extrs,od %r4,5,10,%r6 + extrs,tr %r4,5,10,%r6 + extrs,<> %r4,5,10,%r6 + extrs,>= %r4,5,10,%r6 + extrs,ev %r4,5,10,%r6 + + vextru %r4,5,%r6 + vextru,= %r4,5,%r6 + vextru,< %r4,5,%r6 + vextru,od %r4,5,%r6 + vextru,tr %r4,5,%r6 + vextru,<> %r4,5,%r6 + vextru,>= %r4,5,%r6 + vextru,ev %r4,5,%r6 + + vextrs %r4,5,%r6 + vextrs,= %r4,5,%r6 + vextrs,< %r4,5,%r6 + vextrs,od %r4,5,%r6 + vextrs,tr %r4,5,%r6 + vextrs,<> %r4,5,%r6 + vextrs,>= %r4,5,%r6 + vextrs,ev %r4,5,%r6 diff --git a/gas/testsuite/gas/hppa/basic/fmem.s b/gas/testsuite/gas/hppa/basic/fmem.s new file mode 100644 index 0000000..b730b40 --- /dev/null +++ b/gas/testsuite/gas/hppa/basic/fmem.s @@ -0,0 +1,52 @@ + .SPACE $PRIVATE$ + .SUBSPA $DATA$,QUAD=1,ALIGN=8,ACCESS=31 + .SUBSPA $BSS$,QUAD=1,ALIGN=8,ACCESS=31,ZERO,SORT=82 + .SPACE $TEXT$ + .SUBSPA $LIT$,QUAD=0,ALIGN=8,ACCESS=44 + .SUBSPA $CODE$,QUAD=0,ALIGN=8,ACCESS=44,CODE_ONLY + + .SPACE $TEXT$ + .SUBSPA $CODE$ + + .align 4 +; Basic immediate instruction tests. +; +; We could/should test some of the corner cases for register and +; immediate fields. We should also check the assorted field +; selectors to make sure they're handled correctly. + fldwx %r4(%sr0,%r5),%fr6 + fldwx,s %r4(%sr0,%r5),%fr6 + fldwx,m %r4(%sr0,%r5),%fr6 + fldwx,sm %r4(%sr0,%r5),%fr6 + flddx %r4(%sr0,%r5),%fr6 + flddx,s %r4(%sr0,%r5),%fr6 + flddx,m %r4(%sr0,%r5),%fr6 + flddx,sm %r4(%sr0,%r5),%fr6 + fstwx %fr6,%r4(%sr0,%r5) + fstwx,s %fr6,%r4(%sr0,%r5) + fstwx,m %fr6,%r4(%sr0,%r5) + fstwx,sm %fr6,%r4(%sr0,%r5) + fstdx %fr6,%r4(%sr0,%r5) + fstdx,s %fr6,%r4(%sr0,%r5) + fstdx,m %fr6,%r4(%sr0,%r5) + fstdx,sm %fr6,%r4(%sr0,%r5) + fstqx %fr6,%r4(%sr0,%r5) + fstqx,s %fr6,%r4(%sr0,%r5) + fstqx,m %fr6,%r4(%sr0,%r5) + fstqx,sm %fr6,%r4(%sr0,%r5) + + fldws 0(%sr0,%r5),%fr6 + fldws,mb 0(%sr0,%r5),%fr6 + fldws,ma 0(%sr0,%r5),%fr6 + fldds 0(%sr0,%r5),%fr6 + fldds,mb 0(%sr0,%r5),%fr6 + fldds,ma 0(%sr0,%r5),%fr6 + fstws %fr6,0(%sr0,%r5) + fstws,mb %fr6,0(%sr0,%r5) + fstws,ma %fr6,0(%sr0,%r5) + fstds %fr6,0(%sr0,%r5) + fstds,mb %fr6,0(%sr0,%r5) + fstds,ma %fr6,0(%sr0,%r5) + fstqs %fr6,0(%sr0,%r5) + fstqs,mb %fr6,0(%sr0,%r5) + fstqs,ma %fr6,0(%sr0,%r5) diff --git a/gas/testsuite/gas/hppa/basic/fmemLRbug.s b/gas/testsuite/gas/hppa/basic/fmemLRbug.s new file mode 100644 index 0000000..f1330bb --- /dev/null +++ b/gas/testsuite/gas/hppa/basic/fmemLRbug.s @@ -0,0 +1,76 @@ + .code + .export f +f + .proc + .callinfo frame=0,no_calls + .entry + + fstws %fr6R,0(%r26) + fstws %fr6L,4(%r26) + fstws %fr6,8(%r26) + + fstds %fr6R,0(%r26) + fstds %fr6L,4(%r26) + fstds %fr6,8(%r26) + + fldws 0(%r26),%fr6R + fldws 4(%r26),%fr6L + fldws 8(%r26),%fr6 + + fldds 0(%r26),%fr6R + fldds 4(%r26),%fr6L + fldds 8(%r26),%fr6 + + fstws %fr6R,0(%sr0,%r26) + fstws %fr6L,4(%sr0,%r26) + fstws %fr6,8(%sr0,%r26) + + fstds %fr6R,0(%sr0,%r26) + fstds %fr6L,4(%sr0,%r26) + fstds %fr6,8(%sr0,%r26) + + fldws 0(%sr0,%r26),%fr6R + fldws 4(%sr0,%r26),%fr6L + fldws 8(%sr0,%r26),%fr6 + + fldds 0(%sr0,%r26),%fr6R + fldds 4(%sr0,%r26),%fr6L + fldds 8(%sr0,%r26),%fr6 + + fstwx %fr6R,%r25(%r26) + fstwx %fr6L,%r25(%r26) + fstwx %fr6,%r25(%r26) + + fstdx %fr6R,%r25(%r26) + fstdx %fr6L,%r25(%r26) + fstdx %fr6,%r25(%r26) + + fldwx %r25(%r26),%fr6R + fldwx %r25(%r26),%fr6L + fldwx %r25(%r26),%fr6 + + flddx %r25(%r26),%fr6R + flddx %r25(%r26),%fr6L + flddx %r25(%r26),%fr6 + + fstwx %fr6R,%r25(%sr0,%r26) + fstwx %fr6L,%r25(%sr0,%r26) + fstwx %fr6,%r25(%sr0,%r26) + + fstdx %fr6R,%r25(%sr0,%r26) + fstdx %fr6L,%r25(%sr0,%r26) + fstdx %fr6,%r25(%sr0,%r26) + + fldwx %r25(%sr0,%r26),%fr6R + fldwx %r25(%sr0,%r26),%fr6L + fldwx %r25(%sr0,%r26),%fr6 + + flddx %r25(%sr0,%r26),%fr6R + flddx %r25(%sr0,%r26),%fr6L + flddx %r25(%sr0,%r26),%fr6 + + bv %r0(%r2) + nop + + .exit + .procend diff --git a/gas/testsuite/gas/hppa/basic/fp_comp.s b/gas/testsuite/gas/hppa/basic/fp_comp.s new file mode 100644 index 0000000..c1017f7 --- /dev/null +++ b/gas/testsuite/gas/hppa/basic/fp_comp.s @@ -0,0 +1,81 @@ + .SPACE $PRIVATE$ + .SUBSPA $DATA$,QUAD=1,ALIGN=8,ACCESS=31 + .SUBSPA $BSS$,QUAD=1,ALIGN=8,ACCESS=31,ZERO,SORT=82 + .SPACE $TEXT$ + .SUBSPA $LIT$,QUAD=0,ALIGN=8,ACCESS=44 + .SUBSPA $CODE$,QUAD=0,ALIGN=8,ACCESS=44,CODE_ONLY + + .SPACE $TEXT$ + .SUBSPA $CODE$ + + .align 4 +; Basic immediate instruction tests. +; +; We could/should test some of the corner cases for register and +; immediate fields. We should also check the assorted field +; selectors to make sure they're handled correctly. + fcpy,sgl %fr5,%fr10 + fcpy,dbl %fr5,%fr10 + fcpy,quad %fr5,%fr10 + fcpy,sgl %fr20,%fr24 + fcpy,dbl %fr20,%fr24 + + fabs,sgl %fr5,%fr10 + fabs,dbl %fr5,%fr10 + fabs,quad %fr5,%fr10 + fabs,sgl %fr20,%fr24 + fabs,dbl %fr20,%fr24 + + fsqrt,sgl %fr5,%fr10 + fsqrt,dbl %fr5,%fr10 + fsqrt,quad %fr5,%fr10 + fsqrt,sgl %fr20,%fr24 + fsqrt,dbl %fr20,%fr24 + + frnd,sgl %fr5,%fr10 + frnd,dbl %fr5,%fr10 + frnd,quad %fr5,%fr10 + frnd,sgl %fr20,%fr24 + frnd,dbl %fr20,%fr24 + + fadd,sgl %fr4,%fr8,%fr12 + fadd,dbl %fr4,%fr8,%fr12 + fadd,quad %fr4,%fr8,%fr12 + fadd,sgl %fr20,%fr24,%fr28 + fadd,dbl %fr20,%fr24,%fr28 + fadd,quad %fr20,%fr24,%fr28 + + fsub,sgl %fr4,%fr8,%fr12 + fsub,dbl %fr4,%fr8,%fr12 + fsub,quad %fr4,%fr8,%fr12 + fsub,sgl %fr20,%fr24,%fr28 + fsub,dbl %fr20,%fr24,%fr28 + fsub,quad %fr20,%fr24,%fr28 + + fmpy,sgl %fr4,%fr8,%fr12 + fmpy,dbl %fr4,%fr8,%fr12 + fmpy,quad %fr4,%fr8,%fr12 + fmpy,sgl %fr20,%fr24,%fr28 + fmpy,dbl %fr20,%fr24,%fr28 + fmpy,quad %fr20,%fr24,%fr28 + + fdiv,sgl %fr4,%fr8,%fr12 + fdiv,dbl %fr4,%fr8,%fr12 + fdiv,quad %fr4,%fr8,%fr12 + fdiv,sgl %fr20,%fr24,%fr28 + fdiv,dbl %fr20,%fr24,%fr28 + fdiv,quad %fr20,%fr24,%fr28 + + frem,sgl %fr4,%fr8,%fr12 + frem,dbl %fr4,%fr8,%fr12 + frem,quad %fr4,%fr8,%fr12 + frem,sgl %fr20,%fr24,%fr28 + frem,dbl %fr20,%fr24,%fr28 + frem,quad %fr20,%fr24,%fr28 + + fmpyadd,sgl %fr16,%fr17,%fr18,%fr19,%fr20 + fmpyadd,dbl %fr16,%fr17,%fr18,%fr19,%fr20 + fmpysub,sgl %fr16,%fr17,%fr18,%fr19,%fr20 + fmpysub,dbl %fr16,%fr17,%fr18,%fr19,%fr20 + + xmpyu %fr4,%fr5,%fr6 diff --git a/gas/testsuite/gas/hppa/basic/fp_conv.s b/gas/testsuite/gas/hppa/basic/fp_conv.s new file mode 100644 index 0000000..5a44cb1 --- /dev/null +++ b/gas/testsuite/gas/hppa/basic/fp_conv.s @@ -0,0 +1,92 @@ + .SPACE $PRIVATE$ + .SUBSPA $DATA$,QUAD=1,ALIGN=8,ACCESS=31 + .SUBSPA $BSS$,QUAD=1,ALIGN=8,ACCESS=31,ZERO,SORT=82 + .SPACE $TEXT$ + .SUBSPA $LIT$,QUAD=0,ALIGN=8,ACCESS=44 + .SUBSPA $CODE$,QUAD=0,ALIGN=8,ACCESS=44,CODE_ONLY + + .SPACE $TEXT$ + .SUBSPA $CODE$ + + .align 4 +; Basic immediate instruction tests. +; +; We could/should test some of the corner cases for register and +; immediate fields. We should also check the assorted field +; selectors to make sure they're handled correctly. + fcnvff,sgl,sgl %fr5,%fr10 + fcnvff,sgl,dbl %fr5,%fr10 + fcnvff,sgl,quad %fr5,%fr10 + fcnvff,dbl,sgl %fr5,%fr10 + fcnvff,dbl,dbl %fr5,%fr10 + fcnvff,dbl,quad %fr5,%fr10 + fcnvff,quad,sgl %fr5,%fr10 + fcnvff,quad,dbl %fr5,%fr10 + fcnvff,quad,quad %fr5,%fr10 + fcnvff,sgl,sgl %fr20,%fr24 + fcnvff,sgl,dbl %fr20,%fr24 + fcnvff,sgl,quad %fr20,%fr24 + fcnvff,dbl,sgl %fr20,%fr24 + fcnvff,dbl,dbl %fr20,%fr24 + fcnvff,dbl,quad %fr20,%fr24 + fcnvff,quad,sgl %fr20,%fr24 + fcnvff,quad,dbl %fr20,%fr24 + fcnvff,quad,quad %fr20,%fr24 + + fcnvxf,sgl,sgl %fr5,%fr10 + fcnvxf,sgl,dbl %fr5,%fr10 + fcnvxf,sgl,quad %fr5,%fr10 + fcnvxf,dbl,sgl %fr5,%fr10 + fcnvxf,dbl,dbl %fr5,%fr10 + fcnvxf,dbl,quad %fr5,%fr10 + fcnvxf,quad,sgl %fr5,%fr10 + fcnvxf,quad,dbl %fr5,%fr10 + fcnvxf,quad,quad %fr5,%fr10 + fcnvxf,sgl,sgl %fr20,%fr24 + fcnvxf,sgl,dbl %fr20,%fr24 + fcnvxf,sgl,quad %fr20,%fr24 + fcnvxf,dbl,sgl %fr20,%fr24 + fcnvxf,dbl,dbl %fr20,%fr24 + fcnvxf,dbl,quad %fr20,%fr24 + fcnvxf,quad,sgl %fr20,%fr24 + fcnvxf,quad,dbl %fr20,%fr24 + fcnvxf,quad,quad %fr20,%fr24 + + fcnvfx,sgl,sgl %fr5,%fr10 + fcnvfx,sgl,dbl %fr5,%fr10 + fcnvfx,sgl,quad %fr5,%fr10 + fcnvfx,dbl,sgl %fr5,%fr10 + fcnvfx,dbl,dbl %fr5,%fr10 + fcnvfx,dbl,quad %fr5,%fr10 + fcnvfx,quad,sgl %fr5,%fr10 + fcnvfx,quad,dbl %fr5,%fr10 + fcnvfx,quad,quad %fr5,%fr10 + fcnvfx,sgl,sgl %fr20,%fr24 + fcnvfx,sgl,dbl %fr20,%fr24 + fcnvfx,sgl,quad %fr20,%fr24 + fcnvfx,dbl,sgl %fr20,%fr24 + fcnvfx,dbl,dbl %fr20,%fr24 + fcnvfx,dbl,quad %fr20,%fr24 + fcnvfx,quad,sgl %fr20,%fr24 + fcnvfx,quad,dbl %fr20,%fr24 + fcnvfx,quad,quad %fr20,%fr24 + + fcnvfxt,sgl,sgl %fr5,%fr10 + fcnvfxt,sgl,dbl %fr5,%fr10 + fcnvfxt,sgl,quad %fr5,%fr10 + fcnvfxt,dbl,sgl %fr5,%fr10 + fcnvfxt,dbl,dbl %fr5,%fr10 + fcnvfxt,dbl,quad %fr5,%fr10 + fcnvfxt,quad,sgl %fr5,%fr10 + fcnvfxt,quad,dbl %fr5,%fr10 + fcnvfxt,quad,quad %fr5,%fr10 + fcnvfxt,sgl,sgl %fr20,%fr24 + fcnvfxt,sgl,dbl %fr20,%fr24 + fcnvfxt,sgl,quad %fr20,%fr24 + fcnvfxt,dbl,sgl %fr20,%fr24 + fcnvfxt,dbl,dbl %fr20,%fr24 + fcnvfxt,dbl,quad %fr20,%fr24 + fcnvfxt,quad,sgl %fr20,%fr24 + fcnvfxt,quad,dbl %fr20,%fr24 + fcnvfxt,quad,quad %fr20,%fr24 + diff --git a/gas/testsuite/gas/hppa/basic/fp_fcmp.s b/gas/testsuite/gas/hppa/basic/fp_fcmp.s new file mode 100644 index 0000000..fbd092c --- /dev/null +++ b/gas/testsuite/gas/hppa/basic/fp_fcmp.s @@ -0,0 +1,114 @@ + .SPACE $PRIVATE$ + .SUBSPA $DATA$,QUAD=1,ALIGN=8,ACCESS=31 + .SUBSPA $BSS$,QUAD=1,ALIGN=8,ACCESS=31,ZERO,SORT=82 + .SPACE $TEXT$ + .SUBSPA $LIT$,QUAD=0,ALIGN=8,ACCESS=44 + .SUBSPA $CODE$,QUAD=0,ALIGN=8,ACCESS=44,CODE_ONLY + + .SPACE $TEXT$ + .SUBSPA $CODE$ + + .align 4 +; Basic immediate instruction tests. +; +; We could/should test some of the corner cases for register and +; immediate fields. We should also check the assorted field +; selectors to make sure they're handled correctly. + fcmp,sgl,false? %fr4,%fr5 + fcmp,sgl,false %fr4,%fr5 + fcmp,sgl,? %fr4,%fr5 + fcmp,sgl,!<=> %fr4,%fr5 + fcmp,sgl,= %fr4,%fr5 + fcmp,sgl,=T %fr4,%fr5 + fcmp,sgl,?= %fr4,%fr5 + fcmp,sgl,!<> %fr4,%fr5 + fcmp,sgl,!?>= %fr4,%fr5 + fcmp,sgl,< %fr4,%fr5 + fcmp,sgl,?< %fr4,%fr5 + fcmp,sgl,!>= %fr4,%fr5 + fcmp,sgl,!?> %fr4,%fr5 + fcmp,sgl,<= %fr4,%fr5 + fcmp,sgl,?<= %fr4,%fr5 + fcmp,sgl,!> %fr4,%fr5 + fcmp,sgl,!?<= %fr4,%fr5 + fcmp,sgl,> %fr4,%fr5 + fcmp,sgl,?> %fr4,%fr5 + fcmp,sgl,!<= %fr4,%fr5 + fcmp,sgl,!?< %fr4,%fr5 + fcmp,sgl,>= %fr4,%fr5 + fcmp,sgl,?>= %fr4,%fr5 + fcmp,sgl,!< %fr4,%fr5 + fcmp,sgl,!?= %fr4,%fr5 + fcmp,sgl,<> %fr4,%fr5 + fcmp,sgl,!= %fr4,%fr5 + fcmp,sgl,!=T %fr4,%fr5 + fcmp,sgl,!? %fr4,%fr5 + fcmp,sgl,<=> %fr4,%fr5 + fcmp,sgl,true? %fr4,%fr5 + fcmp,sgl,true %fr4,%fr5 + + fcmp,dbl,false? %fr4,%fr5 + fcmp,dbl,false %fr4,%fr5 + fcmp,dbl,? %fr4,%fr5 + fcmp,dbl,!<=> %fr4,%fr5 + fcmp,dbl,= %fr4,%fr5 + fcmp,dbl,=T %fr4,%fr5 + fcmp,dbl,?= %fr4,%fr5 + fcmp,dbl,!<> %fr4,%fr5 + fcmp,dbl,!?>= %fr4,%fr5 + fcmp,dbl,< %fr4,%fr5 + fcmp,dbl,?< %fr4,%fr5 + fcmp,dbl,!>= %fr4,%fr5 + fcmp,dbl,!?> %fr4,%fr5 + fcmp,dbl,<= %fr4,%fr5 + fcmp,dbl,?<= %fr4,%fr5 + fcmp,dbl,!> %fr4,%fr5 + fcmp,dbl,!?<= %fr4,%fr5 + fcmp,dbl,> %fr4,%fr5 + fcmp,dbl,?> %fr4,%fr5 + fcmp,dbl,!<= %fr4,%fr5 + fcmp,dbl,!?< %fr4,%fr5 + fcmp,dbl,>= %fr4,%fr5 + fcmp,dbl,?>= %fr4,%fr5 + fcmp,dbl,!< %fr4,%fr5 + fcmp,dbl,!?= %fr4,%fr5 + fcmp,dbl,<> %fr4,%fr5 + fcmp,dbl,!= %fr4,%fr5 + fcmp,dbl,!=T %fr4,%fr5 + fcmp,dbl,!? %fr4,%fr5 + fcmp,dbl,<=> %fr4,%fr5 + fcmp,dbl,true? %fr4,%fr5 + fcmp,dbl,true %fr4,%fr5 + + fcmp,quad,false? %fr4,%fr5 + fcmp,quad,false %fr4,%fr5 + fcmp,quad,? %fr4,%fr5 + fcmp,quad,!<=> %fr4,%fr5 + fcmp,quad,= %fr4,%fr5 + fcmp,quad,=T %fr4,%fr5 + fcmp,quad,?= %fr4,%fr5 + fcmp,quad,!<> %fr4,%fr5 + fcmp,quad,!?>= %fr4,%fr5 + fcmp,quad,< %fr4,%fr5 + fcmp,quad,?< %fr4,%fr5 + fcmp,quad,!>= %fr4,%fr5 + fcmp,quad,!?> %fr4,%fr5 + fcmp,quad,<= %fr4,%fr5 + fcmp,quad,?<= %fr4,%fr5 + fcmp,quad,!> %fr4,%fr5 + fcmp,quad,!?<= %fr4,%fr5 + fcmp,quad,> %fr4,%fr5 + fcmp,quad,?> %fr4,%fr5 + fcmp,quad,!<= %fr4,%fr5 + fcmp,quad,!?< %fr4,%fr5 + fcmp,quad,>= %fr4,%fr5 + fcmp,quad,?>= %fr4,%fr5 + fcmp,quad,!< %fr4,%fr5 + fcmp,quad,!?= %fr4,%fr5 + fcmp,quad,<> %fr4,%fr5 + fcmp,quad,!= %fr4,%fr5 + fcmp,quad,!=T %fr4,%fr5 + fcmp,quad,!? %fr4,%fr5 + fcmp,quad,<=> %fr4,%fr5 + fcmp,quad,true? %fr4,%fr5 + fcmp,quad,true %fr4,%fr5 diff --git a/gas/testsuite/gas/hppa/basic/fp_misc.s b/gas/testsuite/gas/hppa/basic/fp_misc.s new file mode 100644 index 0000000..356ac04 --- /dev/null +++ b/gas/testsuite/gas/hppa/basic/fp_misc.s @@ -0,0 +1,18 @@ + .SPACE $PRIVATE$ + .SUBSPA $DATA$,QUAD=1,ALIGN=8,ACCESS=31 + .SUBSPA $BSS$,QUAD=1,ALIGN=8,ACCESS=31,ZERO,SORT=82 + .SPACE $TEXT$ + .SUBSPA $LIT$,QUAD=0,ALIGN=8,ACCESS=44 + .SUBSPA $CODE$,QUAD=0,ALIGN=8,ACCESS=44,CODE_ONLY + + .SPACE $TEXT$ + .SUBSPA $CODE$ + + .align 4 +; Basic immediate instruction tests. +; +; We could/should test some of the corner cases for register and +; immediate fields. We should also check the assorted field +; selectors to make sure they're handled correctly. +fpu_misc_tests: + ftest diff --git a/gas/testsuite/gas/hppa/basic/imem.s b/gas/testsuite/gas/hppa/basic/imem.s new file mode 100644 index 0000000..3c49c12 --- /dev/null +++ b/gas/testsuite/gas/hppa/basic/imem.s @@ -0,0 +1,93 @@ + .SPACE $PRIVATE$ + .SUBSPA $DATA$,QUAD=1,ALIGN=8,ACCESS=31 + .SUBSPA $BSS$,QUAD=1,ALIGN=8,ACCESS=31,ZERO,SORT=82 + .SPACE $TEXT$ + .SUBSPA $LIT$,QUAD=0,ALIGN=8,ACCESS=44 + .SUBSPA $CODE$,QUAD=0,ALIGN=8,ACCESS=44,CODE_ONLY + + .SPACE $TEXT$ + .SUBSPA $CODE$ + + .align 4 + .EXPORT integer_memory_tests,CODE + .EXPORT integer_indexing_load,CODE + .EXPORT integer_load_short_memory,CODE + .EXPORT integer_store_short_memory,CODE + .EXPORT main,CODE + .EXPORT main,ENTRY,PRIV_LEV=3,RTNVAL=GR +; Basic integer memory tests which also test the various +; addressing modes and completers. +; +; We could/should test some of the corner cases for register and +; immediate fields. We should also check the assorted field +; selectors to make sure they're handled correctly. +; +integer_memory_tests: + ldw 0(%sr0,%r4),%r26 + ldh 0(%sr0,%r4),%r26 + ldb 0(%sr0,%r4),%r26 + stw %r26,0(%sr0,%r4) + sth %r26,0(%sr0,%r4) + stb %r26,0(%sr0,%r4) + +; Should make sure pre/post modes are recognized correctly. + ldwm 0(%sr0,%r4),%r26 + stwm %r26,0(%sr0,%r4) + +integer_indexing_load: + ldwx %r5(%sr0,%r4),%r26 + ldwx,s %r5(%sr0,%r4),%r26 + ldwx,m %r5(%sr0,%r4),%r26 + ldwx,sm %r5(%sr0,%r4),%r26 + ldhx %r5(%sr0,%r4),%r26 + ldhx,s %r5(%sr0,%r4),%r26 + ldhx,m %r5(%sr0,%r4),%r26 + ldhx,sm %r5(%sr0,%r4),%r26 + ldbx %r5(%sr0,%r4),%r26 + ldbx,s %r5(%sr0,%r4),%r26 + ldbx,m %r5(%sr0,%r4),%r26 + ldbx,sm %r5(%sr0,%r4),%r26 + ldwax %r5(%r4),%r26 + ldwax,s %r5(%r4),%r26 + ldwax,m %r5(%r4),%r26 + ldwax,sm %r5(%r4),%r26 + ldcwx %r5(%sr0,%r4),%r26 + ldcwx,s %r5(%sr0,%r4),%r26 + ldcwx,m %r5(%sr0,%r4),%r26 + ldcwx,sm %r5(%sr0,%r4),%r26 + +integer_load_short_memory: + ldws 0(%sr0,%r4),%r26 + ldws,mb 0(%sr0,%r4),%r26 + ldws,ma 0(%sr0,%r4),%r26 + ldhs 0(%sr0,%r4),%r26 + ldhs,mb 0(%sr0,%r4),%r26 + ldhs,ma 0(%sr0,%r4),%r26 + ldbs 0(%sr0,%r4),%r26 + ldbs,mb 0(%sr0,%r4),%r26 + ldbs,ma 0(%sr0,%r4),%r26 + ldwas 0(%r4),%r26 + ldwas,mb 0(%r4),%r26 + ldwas,ma 0(%r4),%r26 + ldcws 0(%sr0,%r4),%r26 + ldcws,mb 0(%sr0,%r4),%r26 + ldcws,ma 0(%sr0,%r4),%r26 + +integer_store_short_memory: + stws %r26,0(%sr0,%r4) + stws,mb %r26,0(%sr0,%r4) + stws,ma %r26,0(%sr0,%r4) + sths %r26,0(%sr0,%r4) + sths,mb %r26,0(%sr0,%r4) + sths,ma %r26,0(%sr0,%r4) + stbs %r26,0(%sr0,%r4) + stbs,mb %r26,0(%sr0,%r4) + stbs,ma %r26,0(%sr0,%r4) + stwas %r26,0(%r4) + stwas,mb %r26,0(%r4) + stwas,ma %r26,0(%r4) + stbys %r26,0(%sr0,%r4) + stbys,b %r26,0(%sr0,%r4) + stbys,e %r26,0(%sr0,%r4) + stbys,b,m %r26,0(%sr0,%r4) + stbys,e,m %r26,0(%sr0,%r4) diff --git a/gas/testsuite/gas/hppa/basic/immed.s b/gas/testsuite/gas/hppa/basic/immed.s new file mode 100644 index 0000000..dd27d2f --- /dev/null +++ b/gas/testsuite/gas/hppa/basic/immed.s @@ -0,0 +1,21 @@ + .SPACE $PRIVATE$ + .SUBSPA $DATA$,QUAD=1,ALIGN=8,ACCESS=31 + .SUBSPA $BSS$,QUAD=1,ALIGN=8,ACCESS=31,ZERO,SORT=82 + .SPACE $TEXT$ + .SUBSPA $LIT$,QUAD=0,ALIGN=8,ACCESS=44 + .SUBSPA $CODE$,QUAD=0,ALIGN=8,ACCESS=44,CODE_ONLY + + .SPACE $TEXT$ + .SUBSPA $CODE$ + + .align 4 +; Basic immediate instruction tests. +; +; We could/should test some of the corner cases for register and +; immediate fields. We should also check the assorted field +; selectors to make sure they're handled correctly. +immediate_tests: + ldo 5(%r26),%r26 + ldil L%0xdeadbeef,%r26 + addil L%0xdeadbeef,%r5 + diff --git a/gas/testsuite/gas/hppa/basic/logical.s b/gas/testsuite/gas/hppa/basic/logical.s new file mode 100644 index 0000000..771059e --- /dev/null +++ b/gas/testsuite/gas/hppa/basic/logical.s @@ -0,0 +1,60 @@ + .SPACE $PRIVATE$ + .SUBSPA $DATA$,QUAD=1,ALIGN=8,ACCESS=31 + .SUBSPA $BSS$,QUAD=1,ALIGN=8,ACCESS=31,ZERO,SORT=82 + .SPACE $TEXT$ + .SUBSPA $LIT$,QUAD=0,ALIGN=8,ACCESS=44 + .SUBSPA $CODE$,QUAD=0,ALIGN=8,ACCESS=44,CODE_ONLY + + .SPACE $TEXT$ + .SUBSPA $CODE$ + + .align 4 +; Basic immediate instruction tests. +; +; We could/should test some of the corner cases for register and +; immediate fields. We should also check the assorted field +; selectors to make sure they're handled correctly. + or %r4,%r5,%r6 + or,= %r4,%r5,%r6 + or,< %r4,%r5,%r6 + or,<= %r4,%r5,%r6 + or,od %r4,%r5,%r6 + or,tr %r4,%r5,%r6 + or,<> %r4,%r5,%r6 + or,>= %r4,%r5,%r6 + or,> %r4,%r5,%r6 + or,ev %r4,%r5,%r6 + + xor %r4,%r5,%r6 + xor,= %r4,%r5,%r6 + xor,< %r4,%r5,%r6 + xor,<= %r4,%r5,%r6 + xor,od %r4,%r5,%r6 + xor,tr %r4,%r5,%r6 + xor,<> %r4,%r5,%r6 + xor,>= %r4,%r5,%r6 + xor,> %r4,%r5,%r6 + xor,ev %r4,%r5,%r6 + + and %r4,%r5,%r6 + and,= %r4,%r5,%r6 + and,< %r4,%r5,%r6 + and,<= %r4,%r5,%r6 + and,od %r4,%r5,%r6 + and,tr %r4,%r5,%r6 + and,<> %r4,%r5,%r6 + and,>= %r4,%r5,%r6 + and,> %r4,%r5,%r6 + and,ev %r4,%r5,%r6 + + andcm %r4,%r5,%r6 + andcm,= %r4,%r5,%r6 + andcm,< %r4,%r5,%r6 + andcm,<= %r4,%r5,%r6 + andcm,od %r4,%r5,%r6 + andcm,tr %r4,%r5,%r6 + andcm,<> %r4,%r5,%r6 + andcm,>= %r4,%r5,%r6 + andcm,> %r4,%r5,%r6 + andcm,ev %r4,%r5,%r6 + diff --git a/gas/testsuite/gas/hppa/basic/purge.s b/gas/testsuite/gas/hppa/basic/purge.s new file mode 100644 index 0000000..2319f90 --- /dev/null +++ b/gas/testsuite/gas/hppa/basic/purge.s @@ -0,0 +1,35 @@ + .SPACE $PRIVATE$ + .SUBSPA $DATA$,QUAD=1,ALIGN=8,ACCESS=31 + .SUBSPA $BSS$,QUAD=1,ALIGN=8,ACCESS=31,ZERO,SORT=82 + .SPACE $TEXT$ + .SUBSPA $LIT$,QUAD=0,ALIGN=8,ACCESS=44 + .SUBSPA $CODE$,QUAD=0,ALIGN=8,ACCESS=44,CODE_ONLY + + .SPACE $TEXT$ + .SUBSPA $CODE$ + + .align 4 +; Basic immediate instruction tests. +; +; We could/should test some of the corner cases for register and +; immediate fields. We should also check the assorted field +; selectors to make sure they're handled correctly. + pdtlb %r4(%sr0,%r5) + pdtlb,m %r4(%sr0,%r5) + pitlb %r4(%sr4,%r5) + pitlb,m %r4(%sr4,%r5) + pdtlbe %r4(%sr0,%r5) + pdtlbe,m %r4(%sr0,%r5) + pitlbe %r4(%sr4,%r5) + pitlbe,m %r4(%sr4,%r5) + pdc %r4(%sr0,%r5) + pdc,m %r4(%sr0,%r5) + fdc %r4(%sr0,%r5) + fdc,m %r4(%sr0,%r5) + fic %r4(%sr4,%r5) + fic,m %r4(%sr4,%r5) + fdce %r4(%sr0,%r5) + fdce,m %r4(%sr0,%r5) + fice %r4(%sr4,%r5) + fice,m %r4(%sr4,%r5) + diff --git a/gas/testsuite/gas/hppa/basic/sh1add.s b/gas/testsuite/gas/hppa/basic/sh1add.s new file mode 100644 index 0000000..325d6cc --- /dev/null +++ b/gas/testsuite/gas/hppa/basic/sh1add.s @@ -0,0 +1,67 @@ + .SPACE $PRIVATE$ + .SUBSPA $DATA$,QUAD=1,ALIGN=8,ACCESS=31 + .SUBSPA $BSS$,QUAD=1,ALIGN=8,ACCESS=31,ZERO,SORT=82 + .SPACE $TEXT$ + .SUBSPA $LIT$,QUAD=0,ALIGN=8,ACCESS=44 + .SUBSPA $CODE$,QUAD=0,ALIGN=8,ACCESS=44,CODE_ONLY + + .SPACE $TEXT$ + .SUBSPA $CODE$ + + .align 4 +; Basic immediate instruction tests. +; +; We could/should test some of the corner cases for register and +; immediate fields. We should also check the assorted field +; selectors to make sure they're handled correctly. + sh1add %r4,%r5,%r6 + sh1add,= %r4,%r5,%r6 + sh1add,< %r4,%r5,%r6 + sh1add,<= %r4,%r5,%r6 + sh1add,nuv %r4,%r5,%r6 + sh1add,znv %r4,%r5,%r6 + sh1add,sv %r4,%r5,%r6 + sh1add,od %r4,%r5,%r6 + sh1add,tr %r4,%r5,%r6 + sh1add,<> %r4,%r5,%r6 + sh1add,>= %r4,%r5,%r6 + sh1add,> %r4,%r5,%r6 + sh1add,uv %r4,%r5,%r6 + sh1add,vnz %r4,%r5,%r6 + sh1add,nsv %r4,%r5,%r6 + sh1add,ev %r4,%r5,%r6 + + sh1addl %r4,%r5,%r6 + sh1addl,= %r4,%r5,%r6 + sh1addl,< %r4,%r5,%r6 + sh1addl,<= %r4,%r5,%r6 + sh1addl,nuv %r4,%r5,%r6 + sh1addl,znv %r4,%r5,%r6 + sh1addl,sv %r4,%r5,%r6 + sh1addl,od %r4,%r5,%r6 + sh1addl,tr %r4,%r5,%r6 + sh1addl,<> %r4,%r5,%r6 + sh1addl,>= %r4,%r5,%r6 + sh1addl,> %r4,%r5,%r6 + sh1addl,uv %r4,%r5,%r6 + sh1addl,vnz %r4,%r5,%r6 + sh1addl,nsv %r4,%r5,%r6 + sh1addl,ev %r4,%r5,%r6 + + sh1addo %r4,%r5,%r6 + sh1addo,= %r4,%r5,%r6 + sh1addo,< %r4,%r5,%r6 + sh1addo,<= %r4,%r5,%r6 + sh1addo,nuv %r4,%r5,%r6 + sh1addo,znv %r4,%r5,%r6 + sh1addo,sv %r4,%r5,%r6 + sh1addo,od %r4,%r5,%r6 + sh1addo,tr %r4,%r5,%r6 + sh1addo,<> %r4,%r5,%r6 + sh1addo,>= %r4,%r5,%r6 + sh1addo,> %r4,%r5,%r6 + sh1addo,uv %r4,%r5,%r6 + sh1addo,vnz %r4,%r5,%r6 + sh1addo,nsv %r4,%r5,%r6 + sh1addo,ev %r4,%r5,%r6 + diff --git a/gas/testsuite/gas/hppa/basic/sh2add.s b/gas/testsuite/gas/hppa/basic/sh2add.s new file mode 100644 index 0000000..d19c99b --- /dev/null +++ b/gas/testsuite/gas/hppa/basic/sh2add.s @@ -0,0 +1,67 @@ + .SPACE $PRIVATE$ + .SUBSPA $DATA$,QUAD=1,ALIGN=8,ACCESS=31 + .SUBSPA $BSS$,QUAD=1,ALIGN=8,ACCESS=31,ZERO,SORT=82 + .SPACE $TEXT$ + .SUBSPA $LIT$,QUAD=0,ALIGN=8,ACCESS=44 + .SUBSPA $CODE$,QUAD=0,ALIGN=8,ACCESS=44,CODE_ONLY + + .SPACE $TEXT$ + .SUBSPA $CODE$ + + .align 4 +; Basic immediate instruction tests. +; +; We could/should test some of the corner cases for register and +; immediate fields. We should also check the assorted field +; selectors to make sure they're handled correctly. + sh2add %r4,%r5,%r6 + sh2add,= %r4,%r5,%r6 + sh2add,< %r4,%r5,%r6 + sh2add,<= %r4,%r5,%r6 + sh2add,nuv %r4,%r5,%r6 + sh2add,znv %r4,%r5,%r6 + sh2add,sv %r4,%r5,%r6 + sh2add,od %r4,%r5,%r6 + sh2add,tr %r4,%r5,%r6 + sh2add,<> %r4,%r5,%r6 + sh2add,>= %r4,%r5,%r6 + sh2add,> %r4,%r5,%r6 + sh2add,uv %r4,%r5,%r6 + sh2add,vnz %r4,%r5,%r6 + sh2add,nsv %r4,%r5,%r6 + sh2add,ev %r4,%r5,%r6 + + sh2addl %r4,%r5,%r6 + sh2addl,= %r4,%r5,%r6 + sh2addl,< %r4,%r5,%r6 + sh2addl,<= %r4,%r5,%r6 + sh2addl,nuv %r4,%r5,%r6 + sh2addl,znv %r4,%r5,%r6 + sh2addl,sv %r4,%r5,%r6 + sh2addl,od %r4,%r5,%r6 + sh2addl,tr %r4,%r5,%r6 + sh2addl,<> %r4,%r5,%r6 + sh2addl,>= %r4,%r5,%r6 + sh2addl,> %r4,%r5,%r6 + sh2addl,uv %r4,%r5,%r6 + sh2addl,vnz %r4,%r5,%r6 + sh2addl,nsv %r4,%r5,%r6 + sh2addl,ev %r4,%r5,%r6 + + sh2addo %r4,%r5,%r6 + sh2addo,= %r4,%r5,%r6 + sh2addo,< %r4,%r5,%r6 + sh2addo,<= %r4,%r5,%r6 + sh2addo,nuv %r4,%r5,%r6 + sh2addo,znv %r4,%r5,%r6 + sh2addo,sv %r4,%r5,%r6 + sh2addo,od %r4,%r5,%r6 + sh2addo,tr %r4,%r5,%r6 + sh2addo,<> %r4,%r5,%r6 + sh2addo,>= %r4,%r5,%r6 + sh2addo,> %r4,%r5,%r6 + sh2addo,uv %r4,%r5,%r6 + sh2addo,vnz %r4,%r5,%r6 + sh2addo,nsv %r4,%r5,%r6 + sh2addo,ev %r4,%r5,%r6 + diff --git a/gas/testsuite/gas/hppa/basic/sh3add.s b/gas/testsuite/gas/hppa/basic/sh3add.s new file mode 100644 index 0000000..a51e6e3 --- /dev/null +++ b/gas/testsuite/gas/hppa/basic/sh3add.s @@ -0,0 +1,67 @@ + .SPACE $PRIVATE$ + .SUBSPA $DATA$,QUAD=1,ALIGN=8,ACCESS=31 + .SUBSPA $BSS$,QUAD=1,ALIGN=8,ACCESS=31,ZERO,SORT=82 + .SPACE $TEXT$ + .SUBSPA $LIT$,QUAD=0,ALIGN=8,ACCESS=44 + .SUBSPA $CODE$,QUAD=0,ALIGN=8,ACCESS=44,CODE_ONLY + + .SPACE $TEXT$ + .SUBSPA $CODE$ + + .align 4 +; Basic immediate instruction tests. +; +; We could/should test some of the corner cases for register and +; immediate fields. We should also check the assorted field +; selectors to make sure they're handled correctly. + sh3add %r4,%r5,%r6 + sh3add,= %r4,%r5,%r6 + sh3add,< %r4,%r5,%r6 + sh3add,<= %r4,%r5,%r6 + sh3add,nuv %r4,%r5,%r6 + sh3add,znv %r4,%r5,%r6 + sh3add,sv %r4,%r5,%r6 + sh3add,od %r4,%r5,%r6 + sh3add,tr %r4,%r5,%r6 + sh3add,<> %r4,%r5,%r6 + sh3add,>= %r4,%r5,%r6 + sh3add,> %r4,%r5,%r6 + sh3add,uv %r4,%r5,%r6 + sh3add,vnz %r4,%r5,%r6 + sh3add,nsv %r4,%r5,%r6 + sh3add,ev %r4,%r5,%r6 + + sh3addl %r4,%r5,%r6 + sh3addl,= %r4,%r5,%r6 + sh3addl,< %r4,%r5,%r6 + sh3addl,<= %r4,%r5,%r6 + sh3addl,nuv %r4,%r5,%r6 + sh3addl,znv %r4,%r5,%r6 + sh3addl,sv %r4,%r5,%r6 + sh3addl,od %r4,%r5,%r6 + sh3addl,tr %r4,%r5,%r6 + sh3addl,<> %r4,%r5,%r6 + sh3addl,>= %r4,%r5,%r6 + sh3addl,> %r4,%r5,%r6 + sh3addl,uv %r4,%r5,%r6 + sh3addl,vnz %r4,%r5,%r6 + sh3addl,nsv %r4,%r5,%r6 + sh3addl,ev %r4,%r5,%r6 + + sh3addo %r4,%r5,%r6 + sh3addo,= %r4,%r5,%r6 + sh3addo,< %r4,%r5,%r6 + sh3addo,<= %r4,%r5,%r6 + sh3addo,nuv %r4,%r5,%r6 + sh3addo,znv %r4,%r5,%r6 + sh3addo,sv %r4,%r5,%r6 + sh3addo,od %r4,%r5,%r6 + sh3addo,tr %r4,%r5,%r6 + sh3addo,<> %r4,%r5,%r6 + sh3addo,>= %r4,%r5,%r6 + sh3addo,> %r4,%r5,%r6 + sh3addo,uv %r4,%r5,%r6 + sh3addo,vnz %r4,%r5,%r6 + sh3addo,nsv %r4,%r5,%r6 + sh3addo,ev %r4,%r5,%r6 + diff --git a/gas/testsuite/gas/hppa/basic/shift.s b/gas/testsuite/gas/hppa/basic/shift.s new file mode 100644 index 0000000..5cc621d --- /dev/null +++ b/gas/testsuite/gas/hppa/basic/shift.s @@ -0,0 +1,34 @@ + .SPACE $PRIVATE$ + .SUBSPA $DATA$,QUAD=1,ALIGN=8,ACCESS=31 + .SUBSPA $BSS$,QUAD=1,ALIGN=8,ACCESS=31,ZERO,SORT=82 + .SPACE $TEXT$ + .SUBSPA $LIT$,QUAD=0,ALIGN=8,ACCESS=44 + .SUBSPA $CODE$,QUAD=0,ALIGN=8,ACCESS=44,CODE_ONLY + + .SPACE $TEXT$ + .SUBSPA $CODE$ + + .align 4 +; Basic immediate instruction tests. +; +; We could/should test some of the corner cases for register and +; immediate fields. We should also check the assorted field +; selectors to make sure they're handled correctly. + vshd %r4,%r5,%r6 + vshd,= %r4,%r5,%r6 + vshd,< %r4,%r5,%r6 + vshd,od %r4,%r5,%r6 + vshd,tr %r4,%r5,%r6 + vshd,<> %r4,%r5,%r6 + vshd,>= %r4,%r5,%r6 + vshd,ev %r4,%r5,%r6 + + shd %r4,%r5,5,%r6 + shd,= %r4,%r5,5,%r6 + shd,< %r4,%r5,5,%r6 + shd,od %r4,%r5,5,%r6 + shd,tr %r4,%r5,5,%r6 + shd,<> %r4,%r5,5,%r6 + shd,>= %r4,%r5,5,%r6 + shd,ev %r4,%r5,5,%r6 + diff --git a/gas/testsuite/gas/hppa/basic/special.s b/gas/testsuite/gas/hppa/basic/special.s new file mode 100644 index 0000000..d341667 --- /dev/null +++ b/gas/testsuite/gas/hppa/basic/special.s @@ -0,0 +1,15 @@ + .SPACE $PRIVATE$ + .SUBSPA $DATA$,QUAD=1,ALIGN=8,ACCESS=31 + .SUBSPA $BSS$,QUAD=1,ALIGN=8,ACCESS=31,ZERO,SORT=82 + .SPACE $TEXT$ + .SUBSPA $LIT$,QUAD=0,ALIGN=8,ACCESS=44 + .SUBSPA $CODE$,QUAD=0,ALIGN=8,ACCESS=44,CODE_ONLY + + .SPACE $TEXT$ + .SUBSPA $CODE$ + + .align 4 + gfw %r4(%sr0,%r5) + gfw,m %r4(%sr0,%r5) + gfr %r4(%sr0,%r5) + gfr,m %r4(%sr0,%r5) diff --git a/gas/testsuite/gas/hppa/basic/spop.s b/gas/testsuite/gas/hppa/basic/spop.s new file mode 100644 index 0000000..9076a95 --- /dev/null +++ b/gas/testsuite/gas/hppa/basic/spop.s @@ -0,0 +1,34 @@ + .SPACE $PRIVATE$ + .SUBSPA $DATA$,QUAD=1,ALIGN=8,ACCESS=31 + .SUBSPA $BSS$,QUAD=1,ALIGN=8,ACCESS=31,ZERO,SORT=82 + .SPACE $TEXT$ + .SUBSPA $LIT$,QUAD=0,ALIGN=8,ACCESS=44 + .SUBSPA $CODE$,QUAD=0,ALIGN=8,ACCESS=44,CODE_ONLY + + .SPACE $TEXT$ + .SUBSPA $CODE$ + + .align 4 +; We could/should test some of the corner cases for register and +; immediate fields. We should also check the assorted field +; selectors to make sure they're handled correctly. +spop_tests: + spop0,4,5 + spop0,4,115 + spop0,4,5,n + spop0,4,115,n + spop1,4,5 %r5 + spop1,4,115 %r5 + spop1,4,5,n %r5 + spop1,4,115,n %r5 + spop2,4,5 %r5 + spop2,4,115 %r5 + spop2,4,5,n %r5 + spop2,4,115,n %r5 + spop3,4,5 %r5,%r6 + spop3,4,115 %r5,%r6 + spop3,4,5,n %r5,%r6 + spop3,4,115,n %r5,%r6 + +; Gas fucks this up... Thinks it has the expression 5 mod r5. +; spop1,4,5 %r5 diff --git a/gas/testsuite/gas/hppa/basic/sub.s b/gas/testsuite/gas/hppa/basic/sub.s new file mode 100644 index 0000000..64ff0df --- /dev/null +++ b/gas/testsuite/gas/hppa/basic/sub.s @@ -0,0 +1,117 @@ + .SPACE $PRIVATE$ + .SUBSPA $DATA$,QUAD=1,ALIGN=8,ACCESS=31 + .SUBSPA $BSS$,QUAD=1,ALIGN=8,ACCESS=31,ZERO,SORT=82 + .SPACE $TEXT$ + .SUBSPA $LIT$,QUAD=0,ALIGN=8,ACCESS=44 + .SUBSPA $CODE$,QUAD=0,ALIGN=8,ACCESS=44,CODE_ONLY + + .SPACE $TEXT$ + .SUBSPA $CODE$ + + .align 4 +; Basic immediate instruction tests. +; +; We could/should test some of the corner cases for register and +; immediate fields. We should also check the assorted field +; selectors to make sure they're handled correctly. + sub %r4,%r5,%r6 + sub,= %r4,%r5,%r6 + sub,< %r4,%r5,%r6 + sub,<= %r4,%r5,%r6 + sub,<< %r4,%r5,%r6 + sub,<<= %r4,%r5,%r6 + sub,sv %r4,%r5,%r6 + sub,od %r4,%r5,%r6 + sub,tr %r4,%r5,%r6 + sub,<> %r4,%r5,%r6 + sub,>= %r4,%r5,%r6 + sub,> %r4,%r5,%r6 + sub,>>= %r4,%r5,%r6 + sub,>> %r4,%r5,%r6 + sub,nsv %r4,%r5,%r6 + sub,ev %r4,%r5,%r6 + + subo %r4,%r5,%r6 + subo,= %r4,%r5,%r6 + subo,< %r4,%r5,%r6 + subo,<= %r4,%r5,%r6 + subo,<< %r4,%r5,%r6 + subo,<<= %r4,%r5,%r6 + subo,sv %r4,%r5,%r6 + subo,od %r4,%r5,%r6 + subo,tr %r4,%r5,%r6 + subo,<> %r4,%r5,%r6 + subo,>= %r4,%r5,%r6 + subo,> %r4,%r5,%r6 + subo,>>= %r4,%r5,%r6 + subo,>> %r4,%r5,%r6 + subo,nsv %r4,%r5,%r6 + subo,ev %r4,%r5,%r6 + + subb %r4,%r5,%r6 + subb,= %r4,%r5,%r6 + subb,< %r4,%r5,%r6 + subb,<= %r4,%r5,%r6 + subb,<< %r4,%r5,%r6 + subb,<<= %r4,%r5,%r6 + subb,sv %r4,%r5,%r6 + subb,od %r4,%r5,%r6 + subb,tr %r4,%r5,%r6 + subb,<> %r4,%r5,%r6 + subb,>= %r4,%r5,%r6 + subb,> %r4,%r5,%r6 + subb,>>= %r4,%r5,%r6 + subb,>> %r4,%r5,%r6 + subb,nsv %r4,%r5,%r6 + subb,ev %r4,%r5,%r6 + + subbo %r4,%r5,%r6 + subbo,= %r4,%r5,%r6 + subbo,< %r4,%r5,%r6 + subbo,<= %r4,%r5,%r6 + subbo,<< %r4,%r5,%r6 + subbo,<<= %r4,%r5,%r6 + subbo,sv %r4,%r5,%r6 + subbo,od %r4,%r5,%r6 + subbo,tr %r4,%r5,%r6 + subbo,<> %r4,%r5,%r6 + subbo,>= %r4,%r5,%r6 + subbo,> %r4,%r5,%r6 + subbo,>>= %r4,%r5,%r6 + subbo,>> %r4,%r5,%r6 + subbo,nsv %r4,%r5,%r6 + subbo,ev %r4,%r5,%r6 + + subt %r4,%r5,%r6 + subt,= %r4,%r5,%r6 + subt,< %r4,%r5,%r6 + subt,<= %r4,%r5,%r6 + subt,<< %r4,%r5,%r6 + subt,<<= %r4,%r5,%r6 + subt,sv %r4,%r5,%r6 + subt,od %r4,%r5,%r6 + subt,tr %r4,%r5,%r6 + subt,<> %r4,%r5,%r6 + subt,>= %r4,%r5,%r6 + subt,> %r4,%r5,%r6 + subt,>>= %r4,%r5,%r6 + subt,>> %r4,%r5,%r6 + subt,nsv %r4,%r5,%r6 + subt,ev %r4,%r5,%r6 + + subto %r4,%r5,%r6 + subto,= %r4,%r5,%r6 + subto,< %r4,%r5,%r6 + subto,<= %r4,%r5,%r6 + subto,<< %r4,%r5,%r6 + subto,<<= %r4,%r5,%r6 + subto,sv %r4,%r5,%r6 + subto,od %r4,%r5,%r6 + subto,tr %r4,%r5,%r6 + subto,<> %r4,%r5,%r6 + subto,>= %r4,%r5,%r6 + subto,> %r4,%r5,%r6 + subto,>>= %r4,%r5,%r6 + subto,>> %r4,%r5,%r6 + subto,nsv %r4,%r5,%r6 + subto,ev %r4,%r5,%r6 diff --git a/gas/testsuite/gas/hppa/basic/subi.s b/gas/testsuite/gas/hppa/basic/subi.s new file mode 100644 index 0000000..063267c --- /dev/null +++ b/gas/testsuite/gas/hppa/basic/subi.s @@ -0,0 +1,49 @@ + .SPACE $PRIVATE$ + .SUBSPA $DATA$,QUAD=1,ALIGN=8,ACCESS=31 + .SUBSPA $BSS$,QUAD=1,ALIGN=8,ACCESS=31,ZERO,SORT=82 + .SPACE $TEXT$ + .SUBSPA $LIT$,QUAD=0,ALIGN=8,ACCESS=44 + .SUBSPA $CODE$,QUAD=0,ALIGN=8,ACCESS=44,CODE_ONLY + + .SPACE $TEXT$ + .SUBSPA $CODE$ + + .align 4 +; Basic immediate instruction tests. +; +; We could/should test some of the corner cases for register and +; immediate fields. We should also check the assorted field +; selectors to make sure they're handled correctly. + subi 123,%r5,%r6 + subi,= 123,%r5,%r6 + subi,< 123,%r5,%r6 + subi,<= 123,%r5,%r6 + subi,<< 123,%r5,%r6 + subi,<<= 123,%r5,%r6 + subi,sv 123,%r5,%r6 + subi,od 123,%r5,%r6 + subi,tr 123,%r5,%r6 + subi,<> 123,%r5,%r6 + subi,>= 123,%r5,%r6 + subi,> 123,%r5,%r6 + subi,>>= 123,%r5,%r6 + subi,>> 123,%r5,%r6 + subi,nsv 123,%r5,%r6 + subi,ev 123,%r5,%r6 + + subio 123,%r5,%r6 + subio,= 123,%r5,%r6 + subio,< 123,%r5,%r6 + subio,<= 123,%r5,%r6 + subio,<< 123,%r5,%r6 + subio,<<= 123,%r5,%r6 + subio,sv 123,%r5,%r6 + subio,od 123,%r5,%r6 + subio,tr 123,%r5,%r6 + subio,<> 123,%r5,%r6 + subio,>= 123,%r5,%r6 + subio,> 123,%r5,%r6 + subio,>>= 123,%r5,%r6 + subio,>> 123,%r5,%r6 + subio,nsv 123,%r5,%r6 + subio,ev 123,%r5,%r6 diff --git a/gas/testsuite/gas/hppa/basic/system.s b/gas/testsuite/gas/hppa/basic/system.s new file mode 100644 index 0000000..1b2e7bf --- /dev/null +++ b/gas/testsuite/gas/hppa/basic/system.s @@ -0,0 +1,46 @@ + .SPACE $PRIVATE$ + .SUBSPA $DATA$,QUAD=1,ALIGN=8,ACCESS=31 + .SUBSPA $BSS$,QUAD=1,ALIGN=8,ACCESS=31,ZERO,SORT=82 + .SPACE $TEXT$ + .SUBSPA $LIT$,QUAD=0,ALIGN=8,ACCESS=44 + .SUBSPA $CODE$,QUAD=0,ALIGN=8,ACCESS=44,CODE_ONLY + + .SPACE $TEXT$ + .SUBSPA $CODE$ + + .align 4 +; Basic immediate instruction tests. +; +; We could/should test some of the corner cases for register and +; immediate fields. We should also check the assorted field +; selectors to make sure they're handled correctly. + break 5,12 + rfi + rfir + ssm 5,%r4 + rsm 5,%r4 + mtsm %r4 + ldsid (%sr0,%r5),%r4 + mtsp %r4,%sr0 + mtctl %r4,%cr10 + mfsp %sr0,%r4 + mfctl %cr10,%r4 + sync + syncdma + diag 1234 + + prober (%sr0,%r5),%r6,%r7 + proberi (%sr0,%r5),1,%r7 + probew (%sr0,%r5),%r6,%r7 + probewi (%sr0,%r5),1,%r7 + + lpa %r4(%sr0,%r5),%r6 + lpa,m %r4(%sr0,%r5),%r6 + lha %r4(%sr0,%r5),%r6 + lha,m %r4(%sr0,%r5),%r6 + lci %r4(%sr0,%r5),%r6 + + idtlba %r4,(%sr0,%r5) + iitlba %r4,(%sr4,%r5) + idtlbp %r4,(%sr0,%r5) + iitlbp %r4,(%sr4,%r5) diff --git a/gas/testsuite/gas/hppa/basic/unit.s b/gas/testsuite/gas/hppa/basic/unit.s new file mode 100644 index 0000000..b69b10e --- /dev/null +++ b/gas/testsuite/gas/hppa/basic/unit.s @@ -0,0 +1,55 @@ + .SPACE $PRIVATE$ + .SUBSPA $DATA$,QUAD=1,ALIGN=8,ACCESS=31 + .SUBSPA $BSS$,QUAD=1,ALIGN=8,ACCESS=31,ZERO,SORT=82 + .SPACE $TEXT$ + .SUBSPA $LIT$,QUAD=0,ALIGN=8,ACCESS=44 + .SUBSPA $CODE$,QUAD=0,ALIGN=8,ACCESS=44,CODE_ONLY + + .SPACE $TEXT$ + .SUBSPA $CODE$ + + .align 4 +; Basic immediate instruction tests. +; +; We could/should test some of the corner cases for register and +; immediate fields. We should also check the assorted field +; selectors to make sure they're handled correctly. + + uxor %r4,%r5,%r6 + uxor,sbz %r4,%r5,%r6 + uxor,shz %r4,%r5,%r6 + uxor,sdc %r4,%r5,%r6 + uxor,sbc %r4,%r5,%r6 + uxor,shc %r4,%r5,%r6 + uxor,tr %r4,%r5,%r6 + uxor,nbz %r4,%r5,%r6 + uxor,nhz %r4,%r5,%r6 + uxor,ndc %r4,%r5,%r6 + uxor,nbc %r4,%r5,%r6 + uxor,nhc %r4,%r5,%r6 + + uaddcm %r4,%r5,%r6 + uaddcm,sbz %r4,%r5,%r6 + uaddcm,shz %r4,%r5,%r6 + uaddcm,sdc %r4,%r5,%r6 + uaddcm,sbc %r4,%r5,%r6 + uaddcm,shc %r4,%r5,%r6 + uaddcm,tr %r4,%r5,%r6 + uaddcm,nbz %r4,%r5,%r6 + uaddcm,nhz %r4,%r5,%r6 + uaddcm,ndc %r4,%r5,%r6 + uaddcm,nbc %r4,%r5,%r6 + uaddcm,nhc %r4,%r5,%r6 + + uaddcmt %r4,%r5,%r6 + uaddcmt,sbz %r4,%r5,%r6 + uaddcmt,shz %r4,%r5,%r6 + uaddcmt,sdc %r4,%r5,%r6 + uaddcmt,sbc %r4,%r5,%r6 + uaddcmt,shc %r4,%r5,%r6 + uaddcmt,tr %r4,%r5,%r6 + uaddcmt,nbz %r4,%r5,%r6 + uaddcmt,nhz %r4,%r5,%r6 + uaddcmt,ndc %r4,%r5,%r6 + uaddcmt,nbc %r4,%r5,%r6 + uaddcmt,nhc %r4,%r5,%r6 diff --git a/gas/testsuite/gas/hppa/basic/weird.s b/gas/testsuite/gas/hppa/basic/weird.s new file mode 100644 index 0000000..6df4ea1 --- /dev/null +++ b/gas/testsuite/gas/hppa/basic/weird.s @@ -0,0 +1,870 @@ + .stabs "weird.c",0x64,0,0,Label0 +Label0: + .stabs "inttype:t1=bu4;0;32;",0x80,0,0,0 + + + .stabs "sym32: !#$%&'()*+,-./0123456789:;<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[]^_`abcdefghijklmnopqrstuvwxyz{|}~",0x80,0,0,0 + + .stabs "type32:t32= !#$%&'()*+,-./0123456789:;<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[]^_`abcdefghijklmnopqrstuvwxyz{|}~",0x80,0,0,0 + + + .stabs "attr104:G404=@h !#$%&'()*+,-./0123456789:<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[]^_`abcdefghijklmnopqrstuvwxyz{|}~;1",0x20,0,0, 0 + .stabs "attr105:G405=@i !#$%&'()*+,-./0123456789:<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[]^_`abcdefghijklmnopqrstuvwxyz{|}~;1",0x20,0,0, 0 + + .stabs "var0:G300=@a8;1",0x20,0,0, 0 + .export var0 + .data + .align 4 +var0: + .long 42 + + .stabs "sym33:! !#$%&'()*+,-./0123456789:;<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[]^_`abcdefghijklmnopqrstuvwxyz{|}~",0x80,0,0,0 + .stabs "sym35:# !#$%&'()*+,-./0123456789:;<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[]^_`abcdefghijklmnopqrstuvwxyz{|}~",0x80,0,0,0 + .stabs "sym36:$ !#$%&'()*+,-./0123456789:;<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[]^_`abcdefghijklmnopqrstuvwxyz{|}~",0x80,0,0,0 + .stabs "sym37:% !#$%&'()*+,-./0123456789:;<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[]^_`abcdefghijklmnopqrstuvwxyz{|}~",0x80,0,0,0 + .stabs "sym38:& !#$%&'()*+,-./0123456789:;<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[]^_`abcdefghijklmnopqrstuvwxyz{|}~",0x80,0,0,0 + .stabs "sym39:' !#$%&'()*+,-./0123456789:;<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[]^_`abcdefghijklmnopqrstuvwxyz{|}~",0x80,0,0,0 + .stabs "sym40:( !#$%&'()*+,-./0123456789:;<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[]^_`abcdefghijklmnopqrstuvwxyz{|}~",0x80,0,0,0 + .stabs "sym41:) !#$%&'()*+,-./0123456789:;<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[]^_`abcdefghijklmnopqrstuvwxyz{|}~",0x80,0,0,0 + .stabs "sym42:* !#$%&'()*+,-./0123456789:;<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[]^_`abcdefghijklmnopqrstuvwxyz{|}~",0x80,0,0,0 + .stabs "sym43:+ !#$%&'()*+,-./0123456789:;<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[]^_`abcdefghijklmnopqrstuvwxyz{|}~",0x80,0,0,0 + .stabs "sym44:, !#$%&'()*+,-./0123456789:;<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[]^_`abcdefghijklmnopqrstuvwxyz{|}~",0x80,0,0,0 + .stabs "sym45:- !#$%&'()*+,-./0123456789:;<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[]^_`abcdefghijklmnopqrstuvwxyz{|}~",0x80,0,0,0 + + .export attr122 + .data + .align 4 +attr122: + .long 42 + .export attr123 + .data + .align 4 +attr123: + .long 42 + .export attr124 + .data + .align 4 +attr124: + .long 42 + + .stabs "sym46:. !#$%&'()*+,-./0123456789:;<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[]^_`abcdefghijklmnopqrstuvwxyz{|}~",0x80,0,0,0 + .stabs "sym47:/ !#$%&'()*+,-./0123456789:;<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[]^_`abcdefghijklmnopqrstuvwxyz{|}~",0x80,0,0,0 + .stabs "sym48:0 !#$%&'()*+,-./0123456789:;<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[]^_`abcdefghijklmnopqrstuvwxyz{|}~",0x80,0,0,0 + .stabs "sym49:1 !#$%&'()*+,-./0123456789:;<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[]^_`abcdefghijklmnopqrstuvwxyz{|}~",0x80,0,0,0 + .stabs "sym50:2 !#$%&'()*+,-./0123456789:;<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[]^_`abcdefghijklmnopqrstuvwxyz{|}~",0x80,0,0,0 + + .stabs "attr96:G396=@` !#$%&'()*+,-./0123456789:<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[]^_`abcdefghijklmnopqrstuvwxyz{|}~;1",0x20,0,0, 0 + .stabs "attr97:G397=@a !#$%&'()*+,-./0123456789:<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[]^_`abcdefghijklmnopqrstuvwxyz{|}~;1",0x20,0,0, 0 + .stabs "attr98:G398=@b !#$%&'()*+,-./0123456789:<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[]^_`abcdefghijklmnopqrstuvwxyz{|}~;1",0x20,0,0, 0 + .stabs "attr99:G399=@c !#$%&'()*+,-./0123456789:<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[]^_`abcdefghijklmnopqrstuvwxyz{|}~;1",0x20,0,0, 0 + + .stabs "sym51:3 !#$%&'()*+,-./0123456789:;<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[]^_`abcdefghijklmnopqrstuvwxyz{|}~",0x80,0,0,0 + .stabs "sym52:4 !#$%&'()*+,-./0123456789:;<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[]^_`abcdefghijklmnopqrstuvwxyz{|}~",0x80,0,0,0 + .stabs "sym53:5 !#$%&'()*+,-./0123456789:;<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[]^_`abcdefghijklmnopqrstuvwxyz{|}~",0x80,0,0,0 + .stabs "sym54:6 !#$%&'()*+,-./0123456789:;<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[]^_`abcdefghijklmnopqrstuvwxyz{|}~",0x80,0,0,0 + .stabs "sym55:7 !#$%&'()*+,-./0123456789:;<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[]^_`abcdefghijklmnopqrstuvwxyz{|}~",0x80,0,0,0 + .stabs "sym56:8 !#$%&'()*+,-./0123456789:;<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[]^_`abcdefghijklmnopqrstuvwxyz{|}~",0x80,0,0,0 + .stabs "sym57:9 !#$%&'()*+,-./0123456789:;<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[]^_`abcdefghijklmnopqrstuvwxyz{|}~",0x80,0,0,0 + .stabs "sym58:: !#$%&'()*+,-./0123456789:;<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[]^_`abcdefghijklmnopqrstuvwxyz{|}~",0x80,0,0,0 + .stabs "sym59:; !#$%&'()*+,-./0123456789:;<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[]^_`abcdefghijklmnopqrstuvwxyz{|}~",0x80,0,0,0 + .stabs "sym60:< !#$%&'()*+,-./0123456789:;<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[]^_`abcdefghijklmnopqrstuvwxyz{|}~",0x80,0,0,0 + .stabs "sym61:= !#$%&'()*+,-./0123456789:;<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[]^_`abcdefghijklmnopqrstuvwxyz{|}~",0x80,0,0,0 + .stabs "sym62:> !#$%&'()*+,-./0123456789:;<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[]^_`abcdefghijklmnopqrstuvwxyz{|}~",0x80,0,0,0 + .stabs "sym63:? !#$%&'()*+,-./0123456789:;<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[]^_`abcdefghijklmnopqrstuvwxyz{|}~",0x80,0,0,0 + .stabs "sym64:@ !#$%&'()*+,-./0123456789:;<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[]^_`abcdefghijklmnopqrstuvwxyz{|}~",0x80,0,0,0 + .stabs "sym65:A !#$%&'()*+,-./0123456789:;<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[]^_`abcdefghijklmnopqrstuvwxyz{|}~",0x80,0,0,0 + .stabs "sym66:B !#$%&'()*+,-./0123456789:;<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[]^_`abcdefghijklmnopqrstuvwxyz{|}~",0x80,0,0,0 + .stabs "sym67:C !#$%&'()*+,-./0123456789:;<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[]^_`abcdefghijklmnopqrstuvwxyz{|}~",0x80,0,0,0 + .stabs "sym68:D !#$%&'()*+,-./0123456789:;<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[]^_`abcdefghijklmnopqrstuvwxyz{|}~",0x80,0,0,0 + .stabs "sym69:E !#$%&'()*+,-./0123456789:;<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[]^_`abcdefghijklmnopqrstuvwxyz{|}~",0x80,0,0,0 + .stabs "sym70:F !#$%&'()*+,-./0123456789:;<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[]^_`abcdefghijklmnopqrstuvwxyz{|}~",0x80,0,0,0 + .stabs "sym71:G !#$%&'()*+,-./0123456789:;<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[]^_`abcdefghijklmnopqrstuvwxyz{|}~",0x80,0,0,0 + .stabs "sym72:H !#$%&'()*+,-./0123456789:;<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[]^_`abcdefghijklmnopqrstuvwxyz{|}~",0x80,0,0,0 + .stabs "sym73:I !#$%&'()*+,-./0123456789:;<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[]^_`abcdefghijklmnopqrstuvwxyz{|}~",0x80,0,0,0 + .stabs "sym74:J !#$%&'()*+,-./0123456789:;<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[]^_`abcdefghijklmnopqrstuvwxyz{|}~",0x80,0,0,0 + .stabs "sym75:K !#$%&'()*+,-./0123456789:;<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[]^_`abcdefghijklmnopqrstuvwxyz{|}~",0x80,0,0,0 + .stabs "sym76:L !#$%&'()*+,-./0123456789:;<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[]^_`abcdefghijklmnopqrstuvwxyz{|}~",0x80,0,0,0 + .stabs "sym77:M !#$%&'()*+,-./0123456789:;<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[]^_`abcdefghijklmnopqrstuvwxyz{|}~",0x80,0,0,0 + .stabs "sym78:N !#$%&'()*+,-./0123456789:;<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[]^_`abcdefghijklmnopqrstuvwxyz{|}~",0x80,0,0,0 + .stabs "sym79:O !#$%&'()*+,-./0123456789:;<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[]^_`abcdefghijklmnopqrstuvwxyz{|}~",0x80,0,0,0 + .stabs "sym80:P !#$%&'()*+,-./0123456789:;<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[]^_`abcdefghijklmnopqrstuvwxyz{|}~",0x80,0,0,0 + .stabs "sym81:Q !#$%&'()*+,-./0123456789:;<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[]^_`abcdefghijklmnopqrstuvwxyz{|}~",0x80,0,0,0 + .stabs "sym82:R !#$%&'()*+,-./0123456789:;<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[]^_`abcdefghijklmnopqrstuvwxyz{|}~",0x80,0,0,0 + .stabs "sym83:S !#$%&'()*+,-./0123456789:;<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[]^_`abcdefghijklmnopqrstuvwxyz{|}~",0x80,0,0,0 + .stabs "sym84:T !#$%&'()*+,-./0123456789:;<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[]^_`abcdefghijklmnopqrstuvwxyz{|}~",0x80,0,0,0 + .stabs "sym85:U !#$%&'()*+,-./0123456789:;<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[]^_`abcdefghijklmnopqrstuvwxyz{|}~",0x80,0,0,0 + .stabs "sym86:V !#$%&'()*+,-./0123456789:;<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[]^_`abcdefghijklmnopqrstuvwxyz{|}~",0x80,0,0,0 + .stabs "sym87:W !#$%&'()*+,-./0123456789:;<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[]^_`abcdefghijklmnopqrstuvwxyz{|}~",0x80,0,0,0 + .stabs "sym88:X !#$%&'()*+,-./0123456789:;<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[]^_`abcdefghijklmnopqrstuvwxyz{|}~",0x80,0,0,0 + .stabs "sym89:Y !#$%&'()*+,-./0123456789:;<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[]^_`abcdefghijklmnopqrstuvwxyz{|}~",0x80,0,0,0 + .stabs "sym90:Z !#$%&'()*+,-./0123456789:;<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[]^_`abcdefghijklmnopqrstuvwxyz{|}~",0x80,0,0,0 + .stabs "sym91:[ !#$%&'()*+,-./0123456789:;<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[]^_`abcdefghijklmnopqrstuvwxyz{|}~",0x80,0,0,0 + + .stabs "sym93:] !#$%&'()*+,-./0123456789:;<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[]^_`abcdefghijklmnopqrstuvwxyz{|}~",0x80,0,0,0 + .stabs "sym94:^ !#$%&'()*+,-./0123456789:;<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[]^_`abcdefghijklmnopqrstuvwxyz{|}~",0x80,0,0,0 + .stabs "sym95:_ !#$%&'()*+,-./0123456789:;<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[]^_`abcdefghijklmnopqrstuvwxyz{|}~",0x80,0,0,0 + .stabs "sym96:` !#$%&'()*+,-./0123456789:;<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[]^_`abcdefghijklmnopqrstuvwxyz{|}~",0x80,0,0,0 + .stabs "sym97:a !#$%&'()*+,-./0123456789:;<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[]^_`abcdefghijklmnopqrstuvwxyz{|}~",0x80,0,0,0 + .stabs "sym98:b !#$%&'()*+,-./0123456789:;<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[]^_`abcdefghijklmnopqrstuvwxyz{|}~",0x80,0,0,0 + .stabs "sym99:c !#$%&'()*+,-./0123456789:;<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[]^_`abcdefghijklmnopqrstuvwxyz{|}~",0x80,0,0,0 + .stabs "sym100:d !#$%&'()*+,-./0123456789:;<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[]^_`abcdefghijklmnopqrstuvwxyz{|}~",0x80,0,0,0 + .stabs "sym101:e !#$%&'()*+,-./0123456789:;<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[]^_`abcdefghijklmnopqrstuvwxyz{|}~",0x80,0,0,0 + .stabs "sym102:f !#$%&'()*+,-./0123456789:;<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[]^_`abcdefghijklmnopqrstuvwxyz{|}~",0x80,0,0,0 + .stabs "sym103:g !#$%&'()*+,-./0123456789:;<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[]^_`abcdefghijklmnopqrstuvwxyz{|}~",0x80,0,0,0 + .stabs "sym104:h !#$%&'()*+,-./0123456789:;<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[]^_`abcdefghijklmnopqrstuvwxyz{|}~",0x80,0,0,0 + .stabs "sym105:i !#$%&'()*+,-./0123456789:;<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[]^_`abcdefghijklmnopqrstuvwxyz{|}~",0x80,0,0,0 + .stabs "sym106:j !#$%&'()*+,-./0123456789:;<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[]^_`abcdefghijklmnopqrstuvwxyz{|}~",0x80,0,0,0 + .stabs "sym107:k !#$%&'()*+,-./0123456789:;<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[]^_`abcdefghijklmnopqrstuvwxyz{|}~",0x80,0,0,0 + .stabs "sym108:l !#$%&'()*+,-./0123456789:;<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[]^_`abcdefghijklmnopqrstuvwxyz{|}~",0x80,0,0,0 + .stabs "sym109:m !#$%&'()*+,-./0123456789:;<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[]^_`abcdefghijklmnopqrstuvwxyz{|}~",0x80,0,0,0 + .stabs "sym110:n !#$%&'()*+,-./0123456789:;<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[]^_`abcdefghijklmnopqrstuvwxyz{|}~",0x80,0,0,0 + .stabs "sym111:o !#$%&'()*+,-./0123456789:;<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[]^_`abcdefghijklmnopqrstuvwxyz{|}~",0x80,0,0,0 + .stabs "sym112:p !#$%&'()*+,-./0123456789:;<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[]^_`abcdefghijklmnopqrstuvwxyz{|}~",0x80,0,0,0 + .stabs "sym113:q !#$%&'()*+,-./0123456789:;<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[]^_`abcdefghijklmnopqrstuvwxyz{|}~",0x80,0,0,0 + .stabs "sym114:r !#$%&'()*+,-./0123456789:;<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[]^_`abcdefghijklmnopqrstuvwxyz{|}~",0x80,0,0,0 + .stabs "sym115:s !#$%&'()*+,-./0123456789:;<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[]^_`abcdefghijklmnopqrstuvwxyz{|}~",0x80,0,0,0 + .stabs "sym116:t !#$%&'()*+,-./0123456789:;<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[]^_`abcdefghijklmnopqrstuvwxyz{|}~",0x80,0,0,0 + .stabs "sym117:u !#$%&'()*+,-./0123456789:;<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[]^_`abcdefghijklmnopqrstuvwxyz{|}~",0x80,0,0,0 + .stabs "sym118:v !#$%&'()*+,-./0123456789:;<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[]^_`abcdefghijklmnopqrstuvwxyz{|}~",0x80,0,0,0 + .stabs "sym119:w !#$%&'()*+,-./0123456789:;<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[]^_`abcdefghijklmnopqrstuvwxyz{|}~",0x80,0,0,0 + .stabs "sym120:x !#$%&'()*+,-./0123456789:;<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[]^_`abcdefghijklmnopqrstuvwxyz{|}~",0x80,0,0,0 + .stabs "sym121:y !#$%&'()*+,-./0123456789:;<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[]^_`abcdefghijklmnopqrstuvwxyz{|}~",0x80,0,0,0 + .stabs "sym122:z !#$%&'()*+,-./0123456789:;<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[]^_`abcdefghijklmnopqrstuvwxyz{|}~",0x80,0,0,0 + .stabs "sym123:{ !#$%&'()*+,-./0123456789:;<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[]^_`abcdefghijklmnopqrstuvwxyz{|}~",0x80,0,0,0 + .stabs "sym124:| !#$%&'()*+,-./0123456789:;<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[]^_`abcdefghijklmnopqrstuvwxyz{|}~",0x80,0,0,0 + .stabs "sym125:} !#$%&'()*+,-./0123456789:;<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[]^_`abcdefghijklmnopqrstuvwxyz{|}~",0x80,0,0,0 + .stabs "sym126:~ !#$%&'()*+,-./0123456789:;<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[]^_`abcdefghijklmnopqrstuvwxyz{|}~",0x80,0,0,0 + + .stabs "type33:t33=! !#$%&'()*+,-./0123456789:;<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[]^_`abcdefghijklmnopqrstuvwxyz{|}~",0x80,0,0,0 + .stabs "type35:t35=# !#$%&'()*+,-./0123456789:;<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[]^_`abcdefghijklmnopqrstuvwxyz{|}~",0x80,0,0,0 + .stabs "type36:t36=$ !#$%&'()*+,-./0123456789:;<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[]^_`abcdefghijklmnopqrstuvwxyz{|}~",0x80,0,0,0 + .stabs "type37:t37=% !#$%&'()*+,-./0123456789:;<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[]^_`abcdefghijklmnopqrstuvwxyz{|}~",0x80,0,0,0 + .stabs "type38:t38=& !#$%&'()*+,-./0123456789:;<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[]^_`abcdefghijklmnopqrstuvwxyz{|}~",0x80,0,0,0 + .stabs "type39:t39=' !#$%&'()*+,-./0123456789:;<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[]^_`abcdefghijklmnopqrstuvwxyz{|}~",0x80,0,0,0 + .stabs "type40:t40=( !#$%&'()*+,-./0123456789:;<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[]^_`abcdefghijklmnopqrstuvwxyz{|}~",0x80,0,0,0 + .stabs "type41:t41=) !#$%&'()*+,-./0123456789:;<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[]^_`abcdefghijklmnopqrstuvwxyz{|}~",0x80,0,0,0 + .stabs "type42:t42=* !#$%&'()*+,-./0123456789:;<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[]^_`abcdefghijklmnopqrstuvwxyz{|}~",0x80,0,0,0 + .stabs "type43:t43=+ !#$%&'()*+,-./0123456789:;<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[]^_`abcdefghijklmnopqrstuvwxyz{|}~",0x80,0,0,0 + .stabs "type44:t44=, !#$%&'()*+,-./0123456789:;<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[]^_`abcdefghijklmnopqrstuvwxyz{|}~",0x80,0,0,0 + .stabs "type45:t45=- !#$%&'()*+,-./0123456789:;<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[]^_`abcdefghijklmnopqrstuvwxyz{|}~",0x80,0,0,0 + .stabs "type46:t46=. !#$%&'()*+,-./0123456789:;<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[]^_`abcdefghijklmnopqrstuvwxyz{|}~",0x80,0,0,0 + .stabs "type47:t47=/ !#$%&'()*+,-./0123456789:;<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[]^_`abcdefghijklmnopqrstuvwxyz{|}~",0x80,0,0,0 + .stabs "type48:t48=0 !#$%&'()*+,-./0123456789:;<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[]^_`abcdefghijklmnopqrstuvwxyz{|}~",0x80,0,0,0 + .stabs "type49:t49=1 !#$%&'()*+,-./0123456789:;<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[]^_`abcdefghijklmnopqrstuvwxyz{|}~",0x80,0,0,0 + .stabs "type50:t50=2 !#$%&'()*+,-./0123456789:;<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[]^_`abcdefghijklmnopqrstuvwxyz{|}~",0x80,0,0,0 + .stabs "type51:t51=3 !#$%&'()*+,-./0123456789:;<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[]^_`abcdefghijklmnopqrstuvwxyz{|}~",0x80,0,0,0 + .stabs "type52:t52=4 !#$%&'()*+,-./0123456789:;<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[]^_`abcdefghijklmnopqrstuvwxyz{|}~",0x80,0,0,0 + .stabs "type53:t53=5 !#$%&'()*+,-./0123456789:;<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[]^_`abcdefghijklmnopqrstuvwxyz{|}~",0x80,0,0,0 + .stabs "type54:t54=6 !#$%&'()*+,-./0123456789:;<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[]^_`abcdefghijklmnopqrstuvwxyz{|}~",0x80,0,0,0 + .stabs "type55:t55=7 !#$%&'()*+,-./0123456789:;<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[]^_`abcdefghijklmnopqrstuvwxyz{|}~",0x80,0,0,0 + .stabs "type56:t56=8 !#$%&'()*+,-./0123456789:;<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[]^_`abcdefghijklmnopqrstuvwxyz{|}~",0x80,0,0,0 + .stabs "type57:t57=9 !#$%&'()*+,-./0123456789:;<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[]^_`abcdefghijklmnopqrstuvwxyz{|}~",0x80,0,0,0 + .stabs "type58:t58=: !#$%&'()*+,-./0123456789:;<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[]^_`abcdefghijklmnopqrstuvwxyz{|}~",0x80,0,0,0 + .stabs "type59:t59=; !#$%&'()*+,-./0123456789:;<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[]^_`abcdefghijklmnopqrstuvwxyz{|}~",0x80,0,0,0 + .stabs "type60:t60=< !#$%&'()*+,-./0123456789:;<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[]^_`abcdefghijklmnopqrstuvwxyz{|}~",0x80,0,0,0 + .stabs "type61:t61== !#$%&'()*+,-./0123456789:;<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[]^_`abcdefghijklmnopqrstuvwxyz{|}~",0x80,0,0,0 + .stabs "type62:t62=> !#$%&'()*+,-./0123456789:;<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[]^_`abcdefghijklmnopqrstuvwxyz{|}~",0x80,0,0,0 + .stabs "type63:t63=? !#$%&'()*+,-./0123456789:;<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[]^_`abcdefghijklmnopqrstuvwxyz{|}~",0x80,0,0,0 + .stabs "type64:t64=@ !#$%&'()*+,-./0123456789:;<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[]^_`abcdefghijklmnopqrstuvwxyz{|}~",0x80,0,0,0 + .stabs "type65:t65=A !#$%&'()*+,-./0123456789:;<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[]^_`abcdefghijklmnopqrstuvwxyz{|}~",0x80,0,0,0 + .stabs "type66:t66=B !#$%&'()*+,-./0123456789:;<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[]^_`abcdefghijklmnopqrstuvwxyz{|}~",0x80,0,0,0 + .stabs "type67:t67=C !#$%&'()*+,-./0123456789:;<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[]^_`abcdefghijklmnopqrstuvwxyz{|}~",0x80,0,0,0 + + .export attr66 + .data + .align 4 +attr66: + .long 42 + .export attr67 + .data + .align 4 +attr67: + .long 42 + .export attr68 + .data + .align 4 +attr68: + .long 42 + .export attr69 + .data + .align 4 +attr69: + .long 42 + + .stabs "type68:t68=D !#$%&'()*+,-./0123456789:;<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[]^_`abcdefghijklmnopqrstuvwxyz{|}~",0x80,0,0,0 + .stabs "type69:t69=E !#$%&'()*+,-./0123456789:;<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[]^_`abcdefghijklmnopqrstuvwxyz{|}~",0x80,0,0,0 + .stabs "type70:t70=F !#$%&'()*+,-./0123456789:;<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[]^_`abcdefghijklmnopqrstuvwxyz{|}~",0x80,0,0,0 + .stabs "type71:t71=G !#$%&'()*+,-./0123456789:;<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[]^_`abcdefghijklmnopqrstuvwxyz{|}~",0x80,0,0,0 + .stabs "type72:t72=H !#$%&'()*+,-./0123456789:;<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[]^_`abcdefghijklmnopqrstuvwxyz{|}~",0x80,0,0,0 + .stabs "type73:t73=I !#$%&'()*+,-./0123456789:;<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[]^_`abcdefghijklmnopqrstuvwxyz{|}~",0x80,0,0,0 + .stabs "type74:t74=J !#$%&'()*+,-./0123456789:;<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[]^_`abcdefghijklmnopqrstuvwxyz{|}~",0x80,0,0,0 + .stabs "type75:t75=K !#$%&'()*+,-./0123456789:;<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[]^_`abcdefghijklmnopqrstuvwxyz{|}~",0x80,0,0,0 + .stabs "type76:t76=L !#$%&'()*+,-./0123456789:;<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[]^_`abcdefghijklmnopqrstuvwxyz{|}~",0x80,0,0,0 + .stabs "type77:t77=M !#$%&'()*+,-./0123456789:;<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[]^_`abcdefghijklmnopqrstuvwxyz{|}~",0x80,0,0,0 + .stabs "type78:t78=N !#$%&'()*+,-./0123456789:;<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[]^_`abcdefghijklmnopqrstuvwxyz{|}~",0x80,0,0,0 + .stabs "type79:t79=O !#$%&'()*+,-./0123456789:;<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[]^_`abcdefghijklmnopqrstuvwxyz{|}~",0x80,0,0,0 + .stabs "type80:t80=P !#$%&'()*+,-./0123456789:;<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[]^_`abcdefghijklmnopqrstuvwxyz{|}~",0x80,0,0,0 + .stabs "type81:t81=Q !#$%&'()*+,-./0123456789:;<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[]^_`abcdefghijklmnopqrstuvwxyz{|}~",0x80,0,0,0 + .stabs "type82:t82=R !#$%&'()*+,-./0123456789:;<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[]^_`abcdefghijklmnopqrstuvwxyz{|}~",0x80,0,0,0 + .stabs "type83:t83=S !#$%&'()*+,-./0123456789:;<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[]^_`abcdefghijklmnopqrstuvwxyz{|}~",0x80,0,0,0 + .stabs "type84:t84=T !#$%&'()*+,-./0123456789:;<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[]^_`abcdefghijklmnopqrstuvwxyz{|}~",0x80,0,0,0 + .stabs "type85:t85=U !#$%&'()*+,-./0123456789:;<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[]^_`abcdefghijklmnopqrstuvwxyz{|}~",0x80,0,0,0 + .stabs "type86:t86=V !#$%&'()*+,-./0123456789:;<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[]^_`abcdefghijklmnopqrstuvwxyz{|}~",0x80,0,0,0 + .stabs "type87:t87=W !#$%&'()*+,-./0123456789:;<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[]^_`abcdefghijklmnopqrstuvwxyz{|}~",0x80,0,0,0 + + .stabs "attr69:G369=@E !#$%&'()*+,-./0123456789:<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[]^_`abcdefghijklmnopqrstuvwxyz{|}~;1",0x20,0,0, 0 + .stabs "attr70:G370=@F !#$%&'()*+,-./0123456789:<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[]^_`abcdefghijklmnopqrstuvwxyz{|}~;1",0x20,0,0, 0 + .stabs "attr71:G371=@G !#$%&'()*+,-./0123456789:<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[]^_`abcdefghijklmnopqrstuvwxyz{|}~;1",0x20,0,0, 0 + + .stabs "type88:t88=X !#$%&'()*+,-./0123456789:;<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[]^_`abcdefghijklmnopqrstuvwxyz{|}~",0x80,0,0,0 + .stabs "type89:t89=Y !#$%&'()*+,-./0123456789:;<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[]^_`abcdefghijklmnopqrstuvwxyz{|}~",0x80,0,0,0 + .stabs "type90:t90=Z !#$%&'()*+,-./0123456789:;<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[]^_`abcdefghijklmnopqrstuvwxyz{|}~",0x80,0,0,0 + .stabs "type91:t91=[ !#$%&'()*+,-./0123456789:;<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[]^_`abcdefghijklmnopqrstuvwxyz{|}~",0x80,0,0,0 + + .stabs "type93:t93=] !#$%&'()*+,-./0123456789:;<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[]^_`abcdefghijklmnopqrstuvwxyz{|}~",0x80,0,0,0 + .stabs "type94:t94=^ !#$%&'()*+,-./0123456789:;<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[]^_`abcdefghijklmnopqrstuvwxyz{|}~",0x80,0,0,0 + .stabs "type95:t95=_ !#$%&'()*+,-./0123456789:;<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[]^_`abcdefghijklmnopqrstuvwxyz{|}~",0x80,0,0,0 + .stabs "type96:t96=` !#$%&'()*+,-./0123456789:;<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[]^_`abcdefghijklmnopqrstuvwxyz{|}~",0x80,0,0,0 + .stabs "type97:t97=a !#$%&'()*+,-./0123456789:;<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[]^_`abcdefghijklmnopqrstuvwxyz{|}~",0x80,0,0,0 + .stabs "type98:t98=b !#$%&'()*+,-./0123456789:;<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[]^_`abcdefghijklmnopqrstuvwxyz{|}~",0x80,0,0,0 + .stabs "type99:t99=c !#$%&'()*+,-./0123456789:;<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[]^_`abcdefghijklmnopqrstuvwxyz{|}~",0x80,0,0,0 + .stabs "type100:t100=d !#$%&'()*+,-./0123456789:;<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[]^_`abcdefghijklmnopqrstuvwxyz{|}~",0x80,0,0,0 + .stabs "type101:t101=e !#$%&'()*+,-./0123456789:;<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[]^_`abcdefghijklmnopqrstuvwxyz{|}~",0x80,0,0,0 + .stabs "type102:t102=f !#$%&'()*+,-./0123456789:;<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[]^_`abcdefghijklmnopqrstuvwxyz{|}~",0x80,0,0,0 + .stabs "type103:t103=g !#$%&'()*+,-./0123456789:;<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[]^_`abcdefghijklmnopqrstuvwxyz{|}~",0x80,0,0,0 + .stabs "type104:t104=h !#$%&'()*+,-./0123456789:;<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[]^_`abcdefghijklmnopqrstuvwxyz{|}~",0x80,0,0,0 + .stabs "type105:t105=i !#$%&'()*+,-./0123456789:;<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[]^_`abcdefghijklmnopqrstuvwxyz{|}~",0x80,0,0,0 + .stabs "type106:t106=j !#$%&'()*+,-./0123456789:;<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[]^_`abcdefghijklmnopqrstuvwxyz{|}~",0x80,0,0,0 + .stabs "type107:t107=k !#$%&'()*+,-./0123456789:;<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[]^_`abcdefghijklmnopqrstuvwxyz{|}~",0x80,0,0,0 + .stabs "type108:t108=l !#$%&'()*+,-./0123456789:;<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[]^_`abcdefghijklmnopqrstuvwxyz{|}~",0x80,0,0,0 + .stabs "type109:t109=m !#$%&'()*+,-./0123456789:;<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[]^_`abcdefghijklmnopqrstuvwxyz{|}~",0x80,0,0,0 + .stabs "type110:t110=n !#$%&'()*+,-./0123456789:;<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[]^_`abcdefghijklmnopqrstuvwxyz{|}~",0x80,0,0,0 + .stabs "type111:t111=o !#$%&'()*+,-./0123456789:;<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[]^_`abcdefghijklmnopqrstuvwxyz{|}~",0x80,0,0,0 + .stabs "type112:t112=p !#$%&'()*+,-./0123456789:;<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[]^_`abcdefghijklmnopqrstuvwxyz{|}~",0x80,0,0,0 + .stabs "type113:t113=q !#$%&'()*+,-./0123456789:;<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[]^_`abcdefghijklmnopqrstuvwxyz{|}~",0x80,0,0,0 + .stabs "type114:t114=r !#$%&'()*+,-./0123456789:;<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[]^_`abcdefghijklmnopqrstuvwxyz{|}~",0x80,0,0,0 + .stabs "type115:t115=s !#$%&'()*+,-./0123456789:;<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[]^_`abcdefghijklmnopqrstuvwxyz{|}~",0x80,0,0,0 + .stabs "type116:t116=t !#$%&'()*+,-./0123456789:;<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[]^_`abcdefghijklmnopqrstuvwxyz{|}~",0x80,0,0,0 + .stabs "type117:t117=u !#$%&'()*+,-./0123456789:;<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[]^_`abcdefghijklmnopqrstuvwxyz{|}~",0x80,0,0,0 + .stabs "type118:t118=v !#$%&'()*+,-./0123456789:;<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[]^_`abcdefghijklmnopqrstuvwxyz{|}~",0x80,0,0,0 + .stabs "type119:t119=w !#$%&'()*+,-./0123456789:;<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[]^_`abcdefghijklmnopqrstuvwxyz{|}~",0x80,0,0,0 + .stabs "type120:t120=x !#$%&'()*+,-./0123456789:;<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[]^_`abcdefghijklmnopqrstuvwxyz{|}~",0x80,0,0,0 + .stabs "type121:t121=y !#$%&'()*+,-./0123456789:;<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[]^_`abcdefghijklmnopqrstuvwxyz{|}~",0x80,0,0,0 + .stabs "type122:t122=z !#$%&'()*+,-./0123456789:;<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[]^_`abcdefghijklmnopqrstuvwxyz{|}~",0x80,0,0,0 + .stabs "type123:t123={ !#$%&'()*+,-./0123456789:;<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[]^_`abcdefghijklmnopqrstuvwxyz{|}~",0x80,0,0,0 + .stabs "type124:t124=| !#$%&'()*+,-./0123456789:;<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[]^_`abcdefghijklmnopqrstuvwxyz{|}~",0x80,0,0,0 + .stabs "type125:t125=} !#$%&'()*+,-./0123456789:;<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[]^_`abcdefghijklmnopqrstuvwxyz{|}~",0x80,0,0,0 + .stabs "type126:t126=~ !#$%&'()*+,-./0123456789:;<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[]^_`abcdefghijklmnopqrstuvwxyz{|}~",0x80,0,0,0 + + .stabs "attr32:G332=@ !#$%&'()*+,-./0123456789:<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[]^_`abcdefghijklmnopqrstuvwxyz{|}~;1",0x20,0,0, 0 + .stabs "attr33:G333=@! !#$%&'()*+,-./0123456789:<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[]^_`abcdefghijklmnopqrstuvwxyz{|}~;1",0x20,0,0, 0 + .stabs "attr35:G334=@# !#$%&'()*+,-./0123456789:<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[]^_`abcdefghijklmnopqrstuvwxyz{|}~;1",0x20,0,0, 0 + + .stabs "primary:G200=ered:0,green:1,blue:2,;", 0x20,0,0, 0 + + .stabs "attr36:G335=@$ !#$%&'()*+,-./0123456789:<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[]^_`abcdefghijklmnopqrstuvwxyz{|}~;1",0x20,0,0, 0 + + .export primary + .data + .align 4 +primary: + .long 42 + + .stabs "attr37:G337=@% !#$%&'()*+,-./0123456789:<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[]^_`abcdefghijklmnopqrstuvwxyz{|}~;1",0x20,0,0, 0 + + .stabs "const69:c=e1,69", 0x80,0,0, 0 + + .stabs "const70:c=e190=bs2;0;16;,70", 0x80,0,0, 0 + + .stabs "attr38:G338=@& !#$%&'()*+,-./0123456789:<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[]^_`abcdefghijklmnopqrstuvwxyz{|}~;1",0x20,0,0, 0 + + .stabs "bad_neg0type:t201=s8field0:1,0,32;field2:-534,32,64;field3:-1,96,32;;", 0x80,0,0, 0 + + .stabs "bad_neg0:G201", 0x20,0,0, 0 + + .export bad_neg0 + .data + .align 4 +bad_neg0: + .long 42 + .long 43, 44, 45 + + .stabs "attr39:G339=@' !#$%&'()*+,-./0123456789:<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[]^_`abcdefghijklmnopqrstuvwxyz{|}~;1",0x20,0,0, 0 + .stabs "attr41:G341=@) !#$%&'()*+,-./0123456789:<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[]^_`abcdefghijklmnopqrstuvwxyz{|}~;1",0x20,0,0, 0 + .stabs "attr42:G342=@* !#$%&'()*+,-./0123456789:<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[]^_`abcdefghijklmnopqrstuvwxyz{|}~;1",0x20,0,0, 0 + .stabs "attr43:G343=@+ !#$%&'()*+,-./0123456789:<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[]^_`abcdefghijklmnopqrstuvwxyz{|}~;1",0x20,0,0, 0 + .stabs "attr44:G344=@, !#$%&'()*+,-./0123456789:<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[]^_`abcdefghijklmnopqrstuvwxyz{|}~;1",0x20,0,0, 0 + .stabs "attr46:G346=@. !#$%&'()*+,-./0123456789:<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[]^_`abcdefghijklmnopqrstuvwxyz{|}~;1",0x20,0,0, 0 + .stabs "attr47:G347=@/ !#$%&'()*+,-./0123456789:<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[]^_`abcdefghijklmnopqrstuvwxyz{|}~;1",0x20,0,0, 0 + .stabs "attr58:G358=@: !#$%&'()*+,-./0123456789:<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[]^_`abcdefghijklmnopqrstuvwxyz{|}~;1",0x20,0,0, 0 + + .stabs "attr59:G359=@;@ !#$%&'()*+,-./0123456789:<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[]^_`abcdefghijklmnopqrstuvwxyz{|}~;1",0x20,0,0, 0 + + .stabs "attr60:G360=@< !#$%&'()*+,-./0123456789:<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[]^_`abcdefghijklmnopqrstuvwxyz{|}~;1",0x20,0,0, 0 + .stabs "attr61:G361=@= !#$%&'()*+,-./0123456789:<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[]^_`abcdefghijklmnopqrstuvwxyz{|}~;1",0x20,0,0, 0 + .stabs "attr62:G362=@> !#$%&'()*+,-./0123456789:<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[]^_`abcdefghijklmnopqrstuvwxyz{|}~;1",0x20,0,0, 0 + .stabs "attr63:G363=@? !#$%&'()*+,-./0123456789:<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[]^_`abcdefghijklmnopqrstuvwxyz{|}~;1",0x20,0,0, 0 + .stabs "attr64:G364=@@ !#$%&'()*+,-./0123456789:<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[]^_`abcdefghijklmnopqrstuvwxyz{|}~;1",0x20,0,0, 0 + .stabs "attr65:G365=@A !#$%&'()*+,-./0123456789:<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[]^_`abcdefghijklmnopqrstuvwxyz{|}~;1",0x20,0,0, 0 + .stabs "attr66:G366=@B !#$%&'()*+,-./0123456789:<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[]^_`abcdefghijklmnopqrstuvwxyz{|}~;1",0x20,0,0, 0 + .stabs "attr67:G367=@C !#$%&'()*+,-./0123456789:<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[]^_`abcdefghijklmnopqrstuvwxyz{|}~;1",0x20,0,0, 0 + .stabs "attr68:G368=@D !#$%&'()*+,-./0123456789:<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[]^_`abcdefghijklmnopqrstuvwxyz{|}~;1",0x20,0,0, 0 + .stabs "attr72:G372=@H !#$%&'()*+,-./0123456789:<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[]^_`abcdefghijklmnopqrstuvwxyz{|}~;1",0x20,0,0, 0 + .stabs "attr73:G373=@I !#$%&'()*+,-./0123456789:<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[]^_`abcdefghijklmnopqrstuvwxyz{|}~;1",0x20,0,0, 0 + .stabs "attr74:G374=@J !#$%&'()*+,-./0123456789:<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[]^_`abcdefghijklmnopqrstuvwxyz{|}~;1",0x20,0,0, 0 + .stabs "attr75:G375=@K !#$%&'()*+,-./0123456789:<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[]^_`abcdefghijklmnopqrstuvwxyz{|}~;1",0x20,0,0, 0 + .stabs "attr76:G376=@L !#$%&'()*+,-./0123456789:<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[]^_`abcdefghijklmnopqrstuvwxyz{|}~;1",0x20,0,0, 0 + .stabs "attr77:G377=@M !#$%&'()*+,-./0123456789:<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[]^_`abcdefghijklmnopqrstuvwxyz{|}~;1",0x20,0,0, 0 + .stabs "attr78:G378=@N !#$%&'()*+,-./0123456789:<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[]^_`abcdefghijklmnopqrstuvwxyz{|}~;1",0x20,0,0, 0 + .stabs "attr79:G379=@O !#$%&'()*+,-./0123456789:<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[]^_`abcdefghijklmnopqrstuvwxyz{|}~;1",0x20,0,0, 0 + .stabs "attr80:G380=@P !#$%&'()*+,-./0123456789:<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[]^_`abcdefghijklmnopqrstuvwxyz{|}~;1",0x20,0,0, 0 + .stabs "attr81:G381=@Q !#$%&'()*+,-./0123456789:<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[]^_`abcdefghijklmnopqrstuvwxyz{|}~;1",0x20,0,0, 0 + .stabs "attr82:G382=@R !#$%&'()*+,-./0123456789:<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[]^_`abcdefghijklmnopqrstuvwxyz{|}~;1",0x20,0,0, 0 + .stabs "attr83:G383=@S !#$%&'()*+,-./0123456789:<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[]^_`abcdefghijklmnopqrstuvwxyz{|}~;1",0x20,0,0, 0 + .stabs "attr84:G384=@T !#$%&'()*+,-./0123456789:<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[]^_`abcdefghijklmnopqrstuvwxyz{|}~;1",0x20,0,0, 0 + .stabs "attr85:G385=@U !#$%&'()*+,-./0123456789:<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[]^_`abcdefghijklmnopqrstuvwxyz{|}~;1",0x20,0,0, 0 + .stabs "attr86:G386=@V !#$%&'()*+,-./0123456789:<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[]^_`abcdefghijklmnopqrstuvwxyz{|}~;1",0x20,0,0, 0 + .stabs "attr87:G387=@W !#$%&'()*+,-./0123456789:<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[]^_`abcdefghijklmnopqrstuvwxyz{|}~;1",0x20,0,0, 0 + .stabs "attr88:G388=@X !#$%&'()*+,-./0123456789:<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[]^_`abcdefghijklmnopqrstuvwxyz{|}~;1",0x20,0,0, 0 + .stabs "attr89:G389=@Y !#$%&'()*+,-./0123456789:<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[]^_`abcdefghijklmnopqrstuvwxyz{|}~;1",0x20,0,0, 0 + .stabs "attr90:G390=@Z !#$%&'()*+,-./0123456789:<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[]^_`abcdefghijklmnopqrstuvwxyz{|}~;1",0x20,0,0, 0 + .stabs "attr91:G391=@[ !#$%&'()*+,-./0123456789:<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[]^_`abcdefghijklmnopqrstuvwxyz{|}~;1",0x20,0,0, 0 + + .stabs "attr93:G393=@] !#$%&'()*+,-./0123456789:<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[]^_`abcdefghijklmnopqrstuvwxyz{|}~;1",0x20,0,0, 0 + + + .export _common0 + .data + .align 4 +_common0: + .long 42 + .long 24 + .long 22 + .export common0 + .data + .align 4 +common0: + .long 42 + .long 24 + .long 22 + .stabs "common0",0xe2,0,0,0 + .stabs "common0var0:S1", 0x20,0,0, 0 + .stabs "common0var1:S1", 0x20,0,0, 4 + .stabs "common0var2:S1", 0x20,0,0, 8 + .stabs "common0",0xe4,0,0,0 + + .stabs "attr94:G394=@^ !#$%&'()*+,-./0123456789:<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[]^_`abcdefghijklmnopqrstuvwxyz{|}~;1",0x20,0,0, 0 + .stabs "attr95:G395=@_ !#$%&'()*+,-./0123456789:<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[]^_`abcdefghijklmnopqrstuvwxyz{|}~;1",0x20,0,0, 0 + .stabs "attr100:G400=@d !#$%&'()*+,-./0123456789:<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[]^_`abcdefghijklmnopqrstuvwxyz{|}~;1",0x20,0,0, 0 + .stabs "attr101:G401=@e !#$%&'()*+,-./0123456789:<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[]^_`abcdefghijklmnopqrstuvwxyz{|}~;1",0x20,0,0, 0 + .stabs "attr102:G402=@f !#$%&'()*+,-./0123456789:<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[]^_`abcdefghijklmnopqrstuvwxyz{|}~;1",0x20,0,0, 0 + .stabs "attr103:G403=@g !#$%&'()*+,-./0123456789:<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[]^_`abcdefghijklmnopqrstuvwxyz{|}~;1",0x20,0,0, 0 + .stabs "attr106:G406=@j !#$%&'()*+,-./0123456789:<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[]^_`abcdefghijklmnopqrstuvwxyz{|}~;1",0x20,0,0, 0 + .stabs "attr107:G407=@k !#$%&'()*+,-./0123456789:<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[]^_`abcdefghijklmnopqrstuvwxyz{|}~;1",0x20,0,0, 0 + .stabs "attr108:G408=@l !#$%&'()*+,-./0123456789:<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[]^_`abcdefghijklmnopqrstuvwxyz{|}~;1",0x20,0,0, 0 + .stabs "attr109:G409=@m !#$%&'()*+,-./0123456789:<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[]^_`abcdefghijklmnopqrstuvwxyz{|}~;1",0x20,0,0, 0 + .stabs "attr110:G410=@n !#$%&'()*+,-./0123456789:<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[]^_`abcdefghijklmnopqrstuvwxyz{|}~;1",0x20,0,0, 0 + .stabs "attr111:G411=@o !#$%&'()*+,-./0123456789:<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[]^_`abcdefghijklmnopqrstuvwxyz{|}~;1",0x20,0,0, 0 + .stabs "attr112:G412=@p !#$%&'()*+,-./0123456789:<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[]^_`abcdefghijklmnopqrstuvwxyz{|}~;1",0x20,0,0, 0 + .stabs "attr113:G413=@q !#$%&'()*+,-./0123456789:<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[]^_`abcdefghijklmnopqrstuvwxyz{|}~;1",0x20,0,0, 0 + .stabs "attr114:G414=@r !#$%&'()*+,-./0123456789:<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[]^_`abcdefghijklmnopqrstuvwxyz{|}~;1",0x20,0,0, 0 + .stabs "attr115:G415=@s !#$%&'()*+,-./0123456789:<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[]^_`abcdefghijklmnopqrstuvwxyz{|}~;1",0x20,0,0, 0 + .stabs "attr116:G416=@t !#$%&'()*+,-./0123456789:<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[]^_`abcdefghijklmnopqrstuvwxyz{|}~;1",0x20,0,0, 0 + .stabs "attr117:G417=@u !#$%&'()*+,-./0123456789:<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[]^_`abcdefghijklmnopqrstuvwxyz{|}~;1",0x20,0,0, 0 + .stabs "attr118:G418=@v !#$%&'()*+,-./0123456789:<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[]^_`abcdefghijklmnopqrstuvwxyz{|}~;1",0x20,0,0, 0 + .stabs "attr119:G419=@w !#$%&'()*+,-./0123456789:<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[]^_`abcdefghijklmnopqrstuvwxyz{|}~;1",0x20,0,0, 0 + .stabs "attr120:G420=@x !#$%&'()*+,-./0123456789:<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[]^_`abcdefghijklmnopqrstuvwxyz{|}~;1",0x20,0,0, 0 + .stabs "attr121:G421=@y !#$%&'()*+,-./0123456789:<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[]^_`abcdefghijklmnopqrstuvwxyz{|}~;1",0x20,0,0, 0 + .stabs "attr122:G422=@z !#$%&'()*+,-./0123456789:<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[]^_`abcdefghijklmnopqrstuvwxyz{|}~;1",0x20,0,0, 0 + .stabs "attr123:G423=@{ !#$%&'()*+,-./0123456789:<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[]^_`abcdefghijklmnopqrstuvwxyz{|}~;1",0x20,0,0, 0 + .stabs "attr124:G424=@| !#$%&'()*+,-./0123456789:<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[]^_`abcdefghijklmnopqrstuvwxyz{|}~;1",0x20,0,0, 0 + .stabs "attr125:G425=@} !#$%&'()*+,-./0123456789:<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[]^_`abcdefghijklmnopqrstuvwxyz{|}~;1",0x20,0,0, 0 + .stabs "attr126:G426=@~ !#$%&'()*+,-./0123456789:<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[]^_`abcdefghijklmnopqrstuvwxyz{|}~;1",0x20,0,0, 0 + + .export attr32 + .data + .align 4 +attr32: + .long 42 + .export attr33 + .data + .align 4 +attr33: + .long 42 + .export attr35 + .data + .align 4 +attr35: + .long 42 + .export attr36 + .data + .align 4 +attr36: + .long 42 + .export attr37 + .data + .align 4 +attr37: + .long 42 + .export attr38 + .data + .align 4 +attr38: + .long 42 + .export attr39 + .data + .align 4 +attr39: + .long 42 + .export attr41 + .data + .align 4 +attr41: + .long 42 + .export attr42 + .data + .align 4 +attr42: + .long 42 + .export attr43 + .data + .align 4 +attr43: + .long 42 + .export attr44 + .data + .align 4 +attr44: + .long 42 + .export attr46 + .data + .align 4 +attr46: + .long 42 + .export attr47 + .data + .align 4 +attr47: + .long 42 + .export attr58 + .data + .align 4 +attr58: + .long 42 + .export attr59 + .data + .align 4 +attr59: + .long 42 + .export attr60 + .data + .align 4 +attr60: + .long 42 + .export attr61 + .data + .align 4 +attr61: + .long 42 + .export attr62 + .data + .align 4 +attr62: + .long 42 + .export attr63 + .data + .align 4 +attr63: + .long 42 + .export attr64 + .data + .align 4 +attr64: + .long 42 + .export attr65 + .data + .align 4 +attr65: + .long 42 + .export attr70 + .data + .align 4 +attr70: + .long 42 + .export attr71 + .data + .align 4 +attr71: + .long 42 + .export attr72 + .data + .align 4 +attr72: + .long 42 + .export attr73 + .data + .align 4 +attr73: + .long 42 + .export attr74 + .data + .align 4 +attr74: + .long 42 + .export attr75 + .data + .align 4 +attr75: + .long 42 + .export attr76 + .data + .align 4 +attr76: + .long 42 + .export attr77 + .data + .align 4 +attr77: + .long 42 + .export attr78 + .data + .align 4 +attr78: + .long 42 + .export attr79 + .data + .align 4 +attr79: + .long 42 + .export attr80 + .data + .align 4 +attr80: + .long 42 + .export attr81 + .data + .align 4 +attr81: + .long 42 + .export attr82 + .data + .align 4 +attr82: + .long 42 + .export attr83 + .data + .align 4 +attr83: + .long 42 + .export attr84 + .data + .align 4 +attr84: + .long 42 + + .stabs "float72type:t202=R87;9;", 0x80,0,0, 0 + + .stabs "int256var:G203=bu32;0;256;", 0x20,0,0, 0 + .export int256var + .data + .align 4 +int256var: + .long 42 + .long 0x2b, 0x2c, 0x2d, 0x2d, 0x2c, 0x2b, 0x2a + + + .stabs "consth:c=e1,4294967296", 0x80,0,0, 0 + + .stabs "consth2:c=e1,-734723985732642758928475678987234563284937456", 0x80,0,0, 0 + + .stabs "bad_neg0const:c=S201,128,128,11222211343434345656565677888877", 0x80,0,0, 0 + + .stabs "bad_type0:t(-3,7)", 0x80,0,0, 0 + .stabs "bad_type1:t(42,6)", 0x80,0,0, 0 + + .stabs "array_index0:t205=r1;0;5;", 0x80,0,0, 0 + .stabs "array0:G206=a205;1", 0x20,0,0, 0 + .export array0 + .data + .align 4 +array0: + .long 42 + .long 43, 44, 45, 46, 47 + + .stabs "array_index1:t207=", 0x80,0,0, 0 + .stabs "array1:G208=aeai1_red:0,ai1_green:1,ai1_blue:2,;;1", 0x20,0,0, 0 + .export array1 + .data + .align 4 +array1: + .long 42 + .long 43, 44 + + .stabs "inttype_one:t209=1", 0x80,0,0, 0 + .stabs "inttype_two:t210=1", 0x80,0,0, 0 + .stabs "one_var:G209", 0x20,0,0, 0 + .export one_var + .data + .align 4 +one_var: + .long 42 + .stabs "two_var:G210", 0x20,0,0, 0 + .export two_var + .data + .align 4 +two_var: + .long 42 + + .stabs "intp:t211=*1", 0x80,0,0, 0 + .stabs "pointer_to_int_var:G212=*1", 0x80,0,0, 0 + .stabs "intp_var:G211", 0x20,0,0, 0 + .export intp_var + .data + .align 4 +intp_var: + .long 42 + + .stabs "unrecog_const:c=xjksdflskd33,4;473;", 0x80,0,0, 0 + + .export attr85 + .data + .align 4 +attr85: + .long 42 + .export attr86 + .data + .align 4 +attr86: + .long 42 + .export attr87 + .data + .align 4 +attr87: + .long 42 + .export attr88 + .data + .align 4 +attr88: + .long 42 + .export attr89 + .data + .align 4 +attr89: + .long 42 + .export attr90 + .data + .align 4 +attr90: + .long 42 + .export attr91 + .data + .align 4 +attr91: + .long 42 + .export attr92 + .data + .align 4 +attr92: + .long 42 + .export attr93 + .data + .align 4 +attr93: + .long 42 + .export attr94 + .data + .align 4 +attr94: + .long 42 + .export attr95 + .data + .align 4 +attr95: + .long 42 + .export attr96 + .data + .align 4 +attr96: + .long 42 + .export attr97 + .data + .align 4 +attr97: + .long 42 + .export attr98 + .data + .align 4 +attr98: + .long 42 + .export attr99 + .data + .align 4 +attr99: + .long 42 + .export attr100 + .data + .align 4 +attr100: + .long 42 + .export attr101 + .data + .align 4 +attr101: + .long 42 + .export attr102 + .data + .align 4 +attr102: + .long 42 + .export attr103 + .data + .align 4 +attr103: + .long 42 + .export attr104 + .data + .align 4 +attr104: + .long 42 + .export attr105 + .data + .align 4 +attr105: + .long 42 + .export attr106 + .data + .align 4 +attr106: + .long 42 + .export attr107 + .data + .align 4 +attr107: + .long 42 + .export attr108 + .data + .align 4 +attr108: + .long 42 + .export attr109 + .data + .align 4 +attr109: + .long 42 + .export attr110 + .data + .align 4 +attr110: + .long 42 + .export attr111 + .data + .align 4 +attr111: + .long 42 + .export attr112 + .data + .align 4 +attr112: + .long 42 + .export attr113 + .data + .align 4 +attr113: + .long 42 + .export attr114 + .data + .align 4 +attr114: + .long 42 + .export attr115 + .data + .align 4 +attr115: + .long 42 + .export attr116 + .data + .align 4 +attr116: + .long 42 + .export attr117 + .data + .align 4 +attr117: + .long 42 + .export attr118 + .data + .align 4 +attr118: + .long 42 + .export attr119 + .data + .align 4 +attr119: + .long 42 + .export attr120 + .data + .align 4 +attr120: + .long 42 + .export attr121 + .data + .align 4 +attr121: + .long 42 + .export attr125 + .data + .align 4 +attr125: + .long 42 + .export attr126 + .data + .align 4 +attr126: + .long 42 + + .stabs "var1:G301=@s32;1",0x20,0,0, 0 + .export var1 + .data + .align 4 +var1: + .long 42 + .stabs "var2:G302=@p42;1",0x20,0,0, 0 + .export var2 + .data + .align 4 +var2: + .long 42 + .stabs "var3:G303=@P;1",0x20,0,0, 0 + .export var3 + .data + .align 4 +var3: + .long 42 + + + + + + + + + + + + + .stabs "v_comb:G448=s24!2,020,445=s12!1,120,444=s4x:1,0,32;;;$vb444:446=*444,0;a:/01,32,32;;;0264,447=s12!1,120,444;$vb444:446,0;b:/01,32,32;;;comb:/01,128,32;;", 0x20,0,0, 0 + + .export v_comb + .align 1 +v_comb: + .long v_comb_shared + .long 43 + .long v_comb_shared + .long 44 + .long 45 +v_comb_shared: + .long 42 + + .stabs "sym92:\\ !#$%&'()*+,-./0123456789:;<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[]^_`abcdefghijklmnopqrstuvwxyz{|}~",0x80,0,0,0 + .stabs "type92:t92=\\ !#$%&'()*+,-./0123456789:;<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[]^_`abcdefghijklmnopqrstuvwxyz{|}~",0x80,0,0,0 + .stabs "attr92:G392=@\\ !#$%&'()*+,-./0123456789:<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[]^_`abcdefghijklmnopqrstuvwxyz{|}~;1",0x20,0,0, 0 diff --git a/gas/testsuite/gas/hppa/parse/align1.s b/gas/testsuite/gas/hppa/parse/align1.s new file mode 100644 index 0000000..df81e96 --- /dev/null +++ b/gas/testsuite/gas/hppa/parse/align1.s @@ -0,0 +1,41 @@ + .SPACE $PRIVATE$ + .SUBSPA $DATA$,QUAD=1,ALIGN=8,ACCESS=31 + .SUBSPA $BSS$,QUAD=1,ALIGN=8,ACCESS=31,ZERO,SORT=82 + .SPACE $TEXT$ + .SUBSPA $LIT$,QUAD=0,ALIGN=8,ACCESS=44 + .SUBSPA $CODE$,QUAD=0,ALIGN=8,ACCESS=44,CODE_ONLY + + .SPACE $TEXT$ + .SUBSPA $CODE$ + + .align 1 + .align 8 + nop +; "8" assumed if no alignment given. + .align + nop + .align 4096 + nop + + + .SPACE $PRIVATE$ + .SUBSPA $BSS$ + + .ALIGN 8 +$L00BSS: +home_buff: + .BLOCK 1024 + .ALIGN 8 +current_buff: + .BLOCK 1024 + .ALIGN 4 +lock_file: + .BLOCK 4 + .ALIGN 8 +L332.name: + .BLOCK 30 + .ALIGN 4 +L352.last_case_wa: + .BLOCK 4 + + diff --git a/gas/testsuite/gas/hppa/parse/align2.s b/gas/testsuite/gas/hppa/parse/align2.s new file mode 100644 index 0000000..af734c8 --- /dev/null +++ b/gas/testsuite/gas/hppa/parse/align2.s @@ -0,0 +1,15 @@ + .SPACE $PRIVATE$ + .SUBSPA $DATA$,QUAD=1,ALIGN=8,ACCESS=31 + .SUBSPA $BSS$,QUAD=1,ALIGN=8,ACCESS=31,ZERO,SORT=82 + .SPACE $TEXT$ + .SUBSPA $LIT$,QUAD=0,ALIGN=8,ACCESS=44 + .SUBSPA $CODE$,QUAD=0,ALIGN=8,ACCESS=44,CODE_ONLY + + .SPACE $TEXT$ + .SUBSPA $CODE$ + + .align 3 + + + + diff --git a/gas/testsuite/gas/hppa/parse/appbug.s b/gas/testsuite/gas/hppa/parse/appbug.s new file mode 100644 index 0000000..7a37f9e --- /dev/null +++ b/gas/testsuite/gas/hppa/parse/appbug.s @@ -0,0 +1 @@ +# 1 "crt0.s" diff --git a/gas/testsuite/gas/hppa/parse/badfmpyadd.s b/gas/testsuite/gas/hppa/parse/badfmpyadd.s new file mode 100644 index 0000000..fd1c1f8 --- /dev/null +++ b/gas/testsuite/gas/hppa/parse/badfmpyadd.s @@ -0,0 +1,33 @@ + .SPACE $PRIVATE$ + .SUBSPA $DATA$,QUAD=1,ALIGN=8,ACCESS=31 + .SUBSPA $BSS$,QUAD=1,ALIGN=8,ACCESS=31,ZERO,SORT=82 + .SPACE $TEXT$ + .SUBSPA $LIT$,QUAD=0,ALIGN=8,ACCESS=44 + .SUBSPA $CODE$,QUAD=0,ALIGN=8,ACCESS=44,CODE_ONLY + .IMPORT $global$,DATA + .IMPORT $$dyncall,MILLICODE +; gcc_compiled.: + .SPACE $TEXT$ + .SUBSPA $CODE$ + + .align 4 + .EXPORT foobar,ENTRY,PRIV_LEV=3,ARGW0=FR,ARGW1=FU,ARGW2=FR,ARGW3=FU,RTNVAL=FR +foobar + .PROC + .CALLINFO FRAME=0,NO_CALLS + .ENTRY + ldo -64(%r30),%r20 + addil LR'x-$global$,%r27 + fldds 8(%r20),%fr4 + fldds 0(%r20),%fr22 + ldo RR'x-$global$(%r1),%r19 + fmpysub,sgl %fr5L,%fr7L,%fr5L,%fr22L,%fr4L + bv %r0(%r2) + fstds %fr5,0(%r19) + .EXIT + .PROCEND + .SPACE $PRIVATE$ + .SUBSPA $BSS$ + +x .comm 8 +y .comm 8 diff --git a/gas/testsuite/gas/hppa/parse/block1.s b/gas/testsuite/gas/hppa/parse/block1.s new file mode 100644 index 0000000..317699f --- /dev/null +++ b/gas/testsuite/gas/hppa/parse/block1.s @@ -0,0 +1,18 @@ + .SPACE $PRIVATE$ + .SUBSPA $DATA$,QUAD=1,ALIGN=8,ACCESS=31 + .SUBSPA $BSS$,QUAD=1,ALIGN=8,ACCESS=31,ZERO,SORT=82 + .SPACE $TEXT$ + .SUBSPA $LIT$,QUAD=0,ALIGN=8,ACCESS=44 + .SUBSPA $CODE$,QUAD=0,ALIGN=8,ACCESS=44,CODE_ONLY + + .SPACE $TEXT$ + .SUBSPA $DATA$ + +foo: + .block +bar: + .block 0x7fffffff +com: + + + diff --git a/gas/testsuite/gas/hppa/parse/block2.s b/gas/testsuite/gas/hppa/parse/block2.s new file mode 100644 index 0000000..1a3b5f1 --- /dev/null +++ b/gas/testsuite/gas/hppa/parse/block2.s @@ -0,0 +1,15 @@ + .SPACE $PRIVATE$ + .SUBSPA $DATA$,QUAD=1,ALIGN=8,ACCESS=31 + .SUBSPA $BSS$,QUAD=1,ALIGN=8,ACCESS=31,ZERO,SORT=82 + .SPACE $TEXT$ + .SUBSPA $LIT$,QUAD=0,ALIGN=8,ACCESS=44 + .SUBSPA $CODE$,QUAD=0,ALIGN=8,ACCESS=44,CODE_ONLY + + .SPACE $TEXT$ + .SUBSPA $DATA$ + +foo: + .block -1 + + + diff --git a/gas/testsuite/gas/hppa/parse/calldatabug.s b/gas/testsuite/gas/hppa/parse/calldatabug.s new file mode 100644 index 0000000..6c80cf4 --- /dev/null +++ b/gas/testsuite/gas/hppa/parse/calldatabug.s @@ -0,0 +1,189 @@ + .SPACE $PRIVATE$ + .SUBSPA $DATA$,QUAD=1,ALIGN=8,ACCESS=31 + .SPACE $TEXT$ + .SUBSPA $LIT$,QUAD=0,ALIGN=8,ACCESS=44 + .SUBSPA $CODE$,QUAD=0,ALIGN=8,ACCESS=44,CODE_ONLY + .IMPORT $global$,DATA + .IMPORT $$dyncall,MILLICODE +; gcc_compiled.: + .IMPORT printf,CODE + .SPACE $TEXT$ + .SUBSPA $CODE$ + + .align 4 +LC$0000: + .STRING "%d %lf %d\x0a\x00" + .align 4 + .EXPORT error__3AAAiidi + .EXPORT error__3AAAiidi,PRIV_LEV=3,ARGW0=GR,ARGW1=GR,ARGW2=GR,ARGW3=FR,ARGW4=FU,RTNVAL=GR +error__3AAAiidi: + .PROC + .CALLINFO FRAME=128,CALLS,SAVE_RP + .ENTRY + stw %r2,-20(%r30) + copy %r4,%r1 + copy %r30,%r4 + stwm %r1,128(%r30) + stw %r9,8(%r4) + stw %r8,12(%r4) + stw %r7,16(%r4) + stw %r6,20(%r4) + stw %r5,24(%r4) + copy %r26,%r5 + ldo -8(%r0),%r6 + ldo -32(%r4),%r19 + add %r19,%r6,%r7 + stw %r25,0(%r7) + ldo -12(%r0),%r8 + ldo -32(%r4),%r19 + add %r19,%r8,%r9 + stw %r24,0(%r9) + ldo -8(%r0),%r19 + ldo -32(%r4),%r20 + add %r20,%r19,%r19 + ldo -24(%r0),%r20 + ldo -32(%r4),%r21 + add %r21,%r20,%r20 + ldo -28(%r0),%r21 + ldo -32(%r4),%r22 + add %r22,%r21,%r21 + ldw 0(%r21),%r22 + stw %r22,-52(%r30) + ldil L'LC$0000,%r26 + ldo R'LC$0000(%r26),%r26 + ldw 0(%r19),%r25 + fldds 0(%r20),%fr7 + .CALL ARGW0=GR,ARGW1=GR,ARGW2=FR,ARGW3=FU + bl printf,%r2 + nop + bl,n L$0002,%r0 + bl,n L$0001,%r0 +L$0002: +L$0001: + ldw 8(%r4),%r9 + ldw 12(%r4),%r8 + ldw 16(%r4),%r7 + ldw 20(%r4),%r6 + ldw 24(%r4),%r5 + ldo 8(%r4),%r30 + ldw -28(%r30),%r2 + bv %r0(%r2) + ldwm -8(%r30),%r4 + .EXIT + .PROCEND + .align 4 + .EXPORT ok__3AAAidi + .EXPORT ok__3AAAidi,PRIV_LEV=3,ARGW0=GR,ARGW1=GR,ARGW2=FR,ARGW3=FU,RTNVAL=GR +ok__3AAAidi: + .PROC + .CALLINFO FRAME=128,CALLS,SAVE_RP + .ENTRY + stw %r2,-20(%r30) + copy %r4,%r1 + copy %r30,%r4 + stwm %r1,128(%r30) + stw %r9,8(%r4) + stw %r8,12(%r4) + stw %r7,16(%r4) + stw %r6,20(%r4) + stw %r5,24(%r4) + copy %r26,%r5 + ldo -8(%r0),%r6 + ldo -32(%r4),%r19 + add %r19,%r6,%r7 + stw %r25,0(%r7) + ldo -16(%r0),%r8 + ldo -32(%r4),%r19 + add %r19,%r8,%r9 + fstds %fr7,0(%r9) + ldo -8(%r0),%r19 + ldo -32(%r4),%r20 + add %r20,%r19,%r19 + ldo -16(%r0),%r20 + ldo -32(%r4),%r21 + add %r21,%r20,%r20 + ldo -20(%r0),%r21 + ldo -32(%r4),%r22 + add %r22,%r21,%r21 + ldw 0(%r21),%r22 + stw %r22,-52(%r30) + ldil L'LC$0000,%r26 + ldo R'LC$0000(%r26),%r26 + ldw 0(%r19),%r25 + fldds 0(%r20),%fr7 + .CALL ARGW0=GR,ARGW1=GR,ARGW2=FR,ARGW3=FU + bl printf,%r2 + nop + bl,n L$0004,%r0 + bl,n L$0003,%r0 +L$0004: +L$0003: + ldw 8(%r4),%r9 + ldw 12(%r4),%r8 + ldw 16(%r4),%r7 + ldw 20(%r4),%r6 + ldw 24(%r4),%r5 + ldo 8(%r4),%r30 + ldw -28(%r30),%r2 + bv %r0(%r2) + ldwm -8(%r30),%r4 + .EXIT + .PROCEND + .IMPORT __main,CODE + .align 8 +LC$0001: + ; .double 5.50000000000000000000e+00 + .word 1075183616 ; = 0x40160000 + .word 0 ; = 0x0 + .align 4 + .EXPORT main + .EXPORT main,PRIV_LEV=3,RTNVAL=GR +main: + .PROC + .CALLINFO FRAME=128,CALLS,SAVE_RP + .ENTRY + stw %r2,-20(%r30) + copy %r4,%r1 + copy %r30,%r4 + stwm %r1,128(%r30) + .CALL + bl __main,%r2 + nop + ldo -24(%r0),%r19 + ldo -32(%r30),%r20 + add %r20,%r19,%r19 + ldil L'LC$0001,%r20 + ldo R'LC$0001(%r20),%r21 + ldw 0(%r21),%r22 + ldw 4(%r21),%r23 + stw %r22,0(%r19) + stw %r23,4(%r19) + ldo 3(%r0),%r19 + stw %r19,-60(%r30) + ldo 8(%r4),%r26 + ldo 1(%r0),%r25 + ldo 4(%r0),%r24 + .CALL ARGW0=GR,ARGW1=GR,ARGW2=GR + bl error__3AAAiidi,%r2 + nop + ldo 3(%r0),%r19 + stw %r19,-52(%r30) + ldo 8(%r4),%r26 + ldo 1(%r0),%r25 + ldil L'LC$0001,%r19 + ldo R'LC$0001(%r19),%r20 + fldds 0(%r20),%fr7 + .CALL ARGW0=GR,ARGW1=GR,ARGW2=FR,ARGW3=FU + bl ok__3AAAidi,%r2 + nop + copy %r0,%r28 + bl,n L$0005,%r0 + bl,n L$0005,%r0 +L$0005: + ldo 8(%r4),%r30 + ldw -28(%r30),%r2 + bv %r0(%r2) + ldwm -8(%r30),%r4 + .EXIT + .PROCEND + diff --git a/gas/testsuite/gas/hppa/parse/callinfobug.s b/gas/testsuite/gas/hppa/parse/callinfobug.s new file mode 100644 index 0000000..c08c773 --- /dev/null +++ b/gas/testsuite/gas/hppa/parse/callinfobug.s @@ -0,0 +1,8 @@ + .space $TEXT$ + .subspa $CODE$ + .align 4 + .export divu,millicode + .proc + .callinfo millicode +divu + .procend diff --git a/gas/testsuite/gas/hppa/parse/defbug.s b/gas/testsuite/gas/hppa/parse/defbug.s new file mode 100644 index 0000000..064caf4 --- /dev/null +++ b/gas/testsuite/gas/hppa/parse/defbug.s @@ -0,0 +1,18 @@ + .SPACE $PRIVATE$ + .SUBSPA $DATA$,QUAD=1,ALIGN=8,ACCESS=31 + .SUBSPA $BSS$,QUAD=1,ALIGN=8,ACCESS=31,ZERO,SORT=82 + .SPACE $TEXT$ + .SUBSPA $LIT$,QUAD=0,ALIGN=8,ACCESS=44 + .SUBSPA $CODE$,QUAD=0,ALIGN=8,ACCESS=44,CODE_ONLY + + .SPACE $TEXT$ + .SUBSPA $CODE$ + + .align 4 + .import _seterrno + .export vfork ! .label vfork ! .proc! .callinfo no_calls! .entry ! .label __vfork ! mtsp %r0,%sr0! ldil L%0xc0000004,%r1! ble R%0xc0000004(%sr0,%r1)! ldi 66 ,%r22 ! b,n yyy! b,n __vfork ! b _seterrno! copy %r28,%r26! .label yyy + add,= %r0,%r29,%r0 + copy %r0,%r28 + bv,n (%r2) + .exit + .procend diff --git a/gas/testsuite/gas/hppa/parse/entrybug.s b/gas/testsuite/gas/hppa/parse/entrybug.s new file mode 100644 index 0000000..c4fe7a4 --- /dev/null +++ b/gas/testsuite/gas/hppa/parse/entrybug.s @@ -0,0 +1,24 @@ + .SPACE $PRIVATE$ + .SUBSPA $DATA$,QUAD=1,ALIGN=8,ACCESS=31 + .SUBSPA $BSS$,QUAD=1,ALIGN=8,ACCESS=31,ZERO,SORT=82 + .SPACE $TEXT$ + .SUBSPA $LIT$,QUAD=0,ALIGN=8,ACCESS=44 + .SUBSPA $CODE$,QUAD=0,ALIGN=8,ACCESS=44,CODE_ONLY + .IMPORT $global$,DATA + .IMPORT $$dyncall,MILLICODE +; gcc_compiled.: + .SPACE $TEXT$ + .SUBSPA $CODE$ + + .align 4 + .PARAM foo,RTNVAL=GR +foo: + .PROC + .CALLINFO FRAME=128,NO_CALLS,ENTRY_GR=1,ENTRY_FR=11 + .ENTRY + bv,n %r0(%r2) + .EXIT + .PROCEND + .SPACE $TEXT$ + .SUBSPA $LIT$ + diff --git a/gas/testsuite/gas/hppa/parse/exportbug.s b/gas/testsuite/gas/hppa/parse/exportbug.s new file mode 100644 index 0000000..4966415 --- /dev/null +++ b/gas/testsuite/gas/hppa/parse/exportbug.s @@ -0,0 +1,14 @@ + .SPACE $PRIVATE$ + .SUBSPA $DATA$,QUAD=1,ALIGN=8,ACCESS=31 + .SUBSPA $BSS$,QUAD=1,ALIGN=8,ACCESS=31,ZERO,SORT=82 + .SPACE $TEXT$ + .SUBSPA $LIT$,QUAD=0,ALIGN=8,ACCESS=44 + .SUBSPA $CODE$,QUAD=0,ALIGN=8,ACCESS=44,CODE_ONLY + + .SPACE $TEXT$ + .SUBSPA $CODE$ + + .align 4 + .EXPORT main,ENTRY,PRIV_LEV=3,RTNVAL=GR + + diff --git a/gas/testsuite/gas/hppa/parse/exprbug.s b/gas/testsuite/gas/hppa/parse/exprbug.s new file mode 100644 index 0000000..07bad42 --- /dev/null +++ b/gas/testsuite/gas/hppa/parse/exprbug.s @@ -0,0 +1,39 @@ + .space $TEXT$ + .subspa $CODE$ + + .align 8 + .export icode,data +icode: + .proc + .callinfo frame=0,no_calls + .entry + bv,n %r0(%r2) + .exit + nop + .procend + + ; + ; FIRST, argv array of pointers to args, 1st is same as path. + ; + .align 8 +ic_argv: + .word ic_argv1-icode ; second, pointer to 1st argument + .word ic_path-icode ; first, pointer to init path + .word 0 ; fourth, NULL argv terminator (pad) + .word 0 ; third, NULL argv terminator + +ic_path: + .blockz 4096 ; must be multiple of 4 bytes + .word 0 ; in case full string is used + .word 0 ; this will be the string terminator + +ic_argv1: + .blockz 4096 ; must be multiple of 4 bytes + .word 0 ; in case full string is used + .word 0 ; this will be the string terminator + + .export szicode,data +szicode: + .word szicode-icode + .word 0 ; must have at least one filler at end + diff --git a/gas/testsuite/gas/hppa/parse/fixup7bug.s b/gas/testsuite/gas/hppa/parse/fixup7bug.s new file mode 100644 index 0000000..23c8740 --- /dev/null +++ b/gas/testsuite/gas/hppa/parse/fixup7bug.s @@ -0,0 +1,6192 @@ + .SPACE $PRIVATE$ + .SUBSPA $DATA$,QUAD=1,ALIGN=8,ACCESS=31 + .SUBSPA $BSS$,QUAD=1,ALIGN=8,ACCESS=31,ZERO,SORT=82 + .SPACE $TEXT$ + .SUBSPA $LIT$,QUAD=0,ALIGN=8,ACCESS=44 + .SUBSPA $CODE$,QUAD=0,ALIGN=8,ACCESS=44,CODE_ONLY + .IMPORT $global$,DATA + .IMPORT $$dyncall,MILLICODE +; gcc_compiled.: + .IMPORT xmalloc,CODE + .IMPORT _obstack_newchunk,CODE + .IMPORT memset,CODE + .SPACE $TEXT$ + .SUBSPA $CODE$ + + .align 4 + .EXPORT alloc_type,CODE + .EXPORT alloc_type,ENTRY,PRIV_LEV=3,ARGW0=GR,RTNVAL=GR +alloc_type: + .PROC + .CALLINFO FRAME=192,CALLS,SAVE_RP + .ENTRY + stw %r2,-20(%r30) + copy %r4,%r1 + copy %r30,%r4 + stwm %r1,192(%r30) + stw %r7,32(%r4) + stw %r6,36(%r4) + stw %r5,40(%r4) + ldo -4(%r0),%r5 + ldo -32(%r4),%r19 + add %r19,%r5,%r6 + stw %r26,0(%r6) + ldo -4(%r0),%r19 + ldo -32(%r4),%r20 + add %r20,%r19,%r19 + ldw 0(%r19),%r20 + comiclr,= 0,%r20,%r0 + bl L$0002,%r0 + nop + ldo 52(%r0),%r26 + .CALL ARGW0=GR + bl xmalloc,%r2 + nop + copy %r28,%r7 + bl,n L$0003,%r0 +L$0002: + ldo -4(%r0),%r19 + ldo -32(%r4),%r21 + add %r21,%r19,%r20 + ldw 0(%r20),%r19 + ldo 120(%r19),%r20 + stw %r20,8(%r4) + ldw 8(%r4),%r19 + stw %r19,12(%r4) + ldo 52(%r0),%r19 + stw %r19,16(%r4) + ldw 12(%r4),%r19 + ldw 12(%r4),%r20 + ldw 16(%r19),%r19 + ldw 12(%r20),%r20 + sub %r19,%r20,%r19 + ldw 16(%r4),%r20 + comclr,< %r19,%r20,%r0 + bl L$0004,%r0 + nop + ldw 12(%r4),%r26 + ldw 16(%r4),%r25 + .CALL ARGW0=GR,ARGW1=GR + bl _obstack_newchunk,%r2 + nop + copy %r0,%r19 + bl,n L$0005,%r0 +L$0004: + copy %r0,%r19 +L$0005: + ldw 12(%r4),%r19 + ldw 12(%r4),%r20 + ldw 12(%r20),%r21 + ldw 16(%r4),%r22 + add %r21,%r22,%r20 + copy %r20,%r21 + stw %r21,12(%r19) + ldw 8(%r4),%r19 + stw %r19,20(%r4) + ldw 20(%r4),%r19 + ldw 8(%r19),%r20 + stw %r20,24(%r4) + ldw 20(%r4),%r19 + ldw 12(%r19),%r20 + ldw 24(%r4),%r19 + comclr,= %r20,%r19,%r0 + bl L$0006,%r0 + nop + ldw 20(%r4),%r19 + ldw 40(%r19),%r20 + copy %r20,%r21 + depi -1,1,1,%r21 + stw %r21,40(%r19) +L$0006: + ldw 20(%r4),%r19 + ldw 20(%r4),%r20 + ldw 20(%r4),%r21 + ldw 12(%r20),%r20 + ldw 24(%r21),%r21 + add %r20,%r21,%r20 + ldw 20(%r4),%r21 + ldw 24(%r21),%r22 + uaddcm %r0,%r22,%r21 + and %r20,%r21,%r20 + copy %r20,%r21 + stw %r21,12(%r19) + ldw 20(%r4),%r19 + ldw 20(%r4),%r20 + ldw 12(%r19),%r19 + ldw 4(%r20),%r20 + sub %r19,%r20,%r19 + ldw 20(%r4),%r20 + ldw 20(%r4),%r21 + ldw 16(%r20),%r20 + ldw 4(%r21),%r21 + sub %r20,%r21,%r20 + comclr,> %r19,%r20,%r0 + bl L$0007,%r0 + nop + ldw 20(%r4),%r19 + ldw 20(%r4),%r20 + ldw 16(%r20),%r21 + stw %r21,12(%r19) + copy %r21,%r19 + bl,n L$0008,%r0 +L$0007: + copy %r0,%r19 +L$0008: + ldw 20(%r4),%r19 + ldw 20(%r4),%r20 + ldw 12(%r20),%r21 + stw %r21,8(%r19) + ldw 24(%r4),%r7 +L$0003: + copy %r7,%r26 + copy %r0,%r25 + ldo 52(%r0),%r24 + .CALL ARGW0=GR,ARGW1=GR,ARGW2=GR + bl memset,%r2 + nop + stw %r0,0(%r7) + ldo -4(%r0),%r19 + ldo -32(%r4),%r20 + add %r20,%r19,%r19 + ldw 0(%r19),%r20 + stw %r20,12(%r7) + ldo -1(%r0),%r19 + stw %r19,44(%r7) + copy %r7,%r28 + bl,n L$0001,%r0 +L$0001: + ldw 32(%r4),%r7 + ldw 36(%r4),%r6 + ldw 40(%r4),%r5 + ldo 8(%r4),%r30 + ldw -28(%r30),%r2 + bv %r0(%r2) + ldwm -8(%r30),%r4 + .EXIT + .PROCEND + .align 4 + .EXPORT make_pointer_type,CODE + .EXPORT make_pointer_type,ENTRY,PRIV_LEV=3,ARGW0=GR,ARGW1=GR,RTNVAL=GR +make_pointer_type: + .PROC + .CALLINFO FRAME=192,CALLS,SAVE_RP + .ENTRY + stw %r2,-20(%r30) + copy %r4,%r1 + copy %r30,%r4 + stwm %r1,192(%r30) + stw %r9,16(%r4) + stw %r8,20(%r4) + stw %r7,24(%r4) + stw %r6,28(%r4) + stw %r5,32(%r4) + ldo -4(%r0),%r5 + ldo -32(%r4),%r19 + add %r19,%r5,%r6 + stw %r26,0(%r6) + ldo -8(%r0),%r7 + ldo -32(%r4),%r19 + add %r19,%r7,%r8 + stw %r25,0(%r8) + ldo -4(%r0),%r19 + ldo -32(%r4),%r21 + add %r21,%r19,%r20 + ldw 0(%r20),%r19 + ldw 20(%r19),%r9 + comiclr,<> 0,%r9,%r0 + bl L$0010,%r0 + nop + ldo -8(%r0),%r19 + ldo -32(%r4),%r20 + add %r20,%r19,%r19 + ldw 0(%r19),%r20 + comiclr,= 0,%r20,%r0 + bl L$0011,%r0 + nop + copy %r9,%r28 + bl,n L$0009,%r0 + bl,n L$0012,%r0 +L$0011: + ldo -8(%r0),%r19 + ldo -32(%r4),%r21 + add %r21,%r19,%r20 + ldw 0(%r20),%r19 + ldw 0(%r19),%r20 + comiclr,= 0,%r20,%r0 + bl L$0013,%r0 + nop + ldo -8(%r0),%r19 + ldo -32(%r4),%r21 + add %r21,%r19,%r20 + ldw 0(%r20),%r19 + stw %r9,0(%r19) + copy %r9,%r28 + bl,n L$0009,%r0 +L$0013: +L$0012: +L$0010: + ldo -8(%r0),%r19 + ldo -32(%r4),%r20 + add %r20,%r19,%r19 + ldw 0(%r19),%r20 + comiclr,<> 0,%r20,%r0 + bl L$0015,%r0 + nop + ldo -8(%r0),%r19 + ldo -32(%r4),%r21 + add %r21,%r19,%r20 + ldw 0(%r20),%r19 + ldw 0(%r19),%r20 + comiclr,= 0,%r20,%r0 + bl L$0014,%r0 + nop + bl,n L$0015,%r0 +L$0015: + ldo -4(%r0),%r19 + ldo -32(%r4),%r21 + add %r21,%r19,%r20 + ldw 0(%r20),%r19 + ldw 12(%r19),%r26 + .CALL ARGW0=GR + bl alloc_type,%r2 + nop + copy %r28,%r9 + ldo -8(%r0),%r19 + ldo -32(%r4),%r20 + add %r20,%r19,%r19 + ldw 0(%r19),%r20 + comiclr,<> 0,%r20,%r0 + bl L$0016,%r0 + nop + ldo -8(%r0),%r19 + ldo -32(%r4),%r21 + add %r21,%r19,%r20 + ldw 0(%r20),%r19 + stw %r9,0(%r19) +L$0016: + bl,n L$0017,%r0 +L$0014: + ldo -8(%r0),%r19 + ldo -32(%r4),%r21 + add %r21,%r19,%r20 + ldw 0(%r20),%r19 + ldw 0(%r19),%r9 + ldw 12(%r9),%r19 + stw %r19,8(%r4) + copy %r9,%r26 + copy %r0,%r25 + ldo 52(%r0),%r24 + .CALL ARGW0=GR,ARGW1=GR,ARGW2=GR + bl memset,%r2 + nop + ldw 8(%r4),%r19 + stw %r19,12(%r9) +L$0017: + ldo -4(%r0),%r19 + ldo -32(%r4),%r20 + add %r20,%r19,%r19 + ldw 0(%r19),%r20 + stw %r20,16(%r9) + ldo -4(%r0),%r19 + ldo -32(%r4),%r21 + add %r21,%r19,%r20 + ldw 0(%r20),%r19 + stw %r9,20(%r19) + ldo 4(%r0),%r19 + stw %r19,8(%r9) + ldo 1(%r0),%r19 + stw %r19,0(%r9) + ldh 32(%r9),%r19 + copy %r19,%r20 + depi -1,31,1,%r20 + sth %r20,32(%r9) + ldo -4(%r0),%r19 + ldo -32(%r4),%r21 + add %r21,%r19,%r20 + ldw 0(%r20),%r19 + ldw 20(%r19),%r20 + comiclr,= 0,%r20,%r0 + bl L$0018,%r0 + nop + ldo -4(%r0),%r19 + ldo -32(%r4),%r21 + add %r21,%r19,%r20 + ldw 0(%r20),%r19 + stw %r9,20(%r19) +L$0018: + copy %r9,%r28 + bl,n L$0009,%r0 +L$0009: + ldw 16(%r4),%r9 + ldw 20(%r4),%r8 + ldw 24(%r4),%r7 + ldw 28(%r4),%r6 + ldw 32(%r4),%r5 + ldo 8(%r4),%r30 + ldw -28(%r30),%r2 + bv %r0(%r2) + ldwm -8(%r30),%r4 + .EXIT + .PROCEND + .align 4 + .EXPORT lookup_pointer_type,CODE + .EXPORT lookup_pointer_type,ENTRY,PRIV_LEV=3,ARGW0=GR,RTNVAL=GR +lookup_pointer_type: + .PROC + .CALLINFO FRAME=128,CALLS,SAVE_RP + .ENTRY + stw %r2,-20(%r30) + copy %r4,%r1 + copy %r30,%r4 + stwm %r1,128(%r30) + stw %r6,8(%r4) + stw %r5,12(%r4) + ldo -4(%r0),%r5 + ldo -32(%r4),%r19 + add %r19,%r5,%r6 + stw %r26,0(%r6) + ldo -4(%r0),%r19 + ldo -32(%r4),%r20 + add %r20,%r19,%r19 + ldw 0(%r19),%r26 + copy %r0,%r25 + .CALL ARGW0=GR,ARGW1=GR + bl make_pointer_type,%r2 + nop + bl,n L$0019,%r0 +L$0019: + ldw 8(%r4),%r6 + ldw 12(%r4),%r5 + ldo 8(%r4),%r30 + ldw -28(%r30),%r2 + bv %r0(%r2) + ldwm -8(%r30),%r4 + .EXIT + .PROCEND + .align 4 + .EXPORT make_reference_type,CODE + .EXPORT make_reference_type,ENTRY,PRIV_LEV=3,ARGW0=GR,ARGW1=GR,RTNVAL=GR +make_reference_type: + .PROC + .CALLINFO FRAME=192,CALLS,SAVE_RP + .ENTRY + stw %r2,-20(%r30) + copy %r4,%r1 + copy %r30,%r4 + stwm %r1,192(%r30) + stw %r9,16(%r4) + stw %r8,20(%r4) + stw %r7,24(%r4) + stw %r6,28(%r4) + stw %r5,32(%r4) + ldo -4(%r0),%r5 + ldo -32(%r4),%r19 + add %r19,%r5,%r6 + stw %r26,0(%r6) + ldo -8(%r0),%r7 + ldo -32(%r4),%r19 + add %r19,%r7,%r8 + stw %r25,0(%r8) + ldo -4(%r0),%r19 + ldo -32(%r4),%r21 + add %r21,%r19,%r20 + ldw 0(%r20),%r19 + ldw 24(%r19),%r9 + comiclr,<> 0,%r9,%r0 + bl L$0021,%r0 + nop + ldo -8(%r0),%r19 + ldo -32(%r4),%r20 + add %r20,%r19,%r19 + ldw 0(%r19),%r20 + comiclr,= 0,%r20,%r0 + bl L$0022,%r0 + nop + copy %r9,%r28 + bl,n L$0020,%r0 + bl,n L$0023,%r0 +L$0022: + ldo -8(%r0),%r19 + ldo -32(%r4),%r21 + add %r21,%r19,%r20 + ldw 0(%r20),%r19 + ldw 0(%r19),%r20 + comiclr,= 0,%r20,%r0 + bl L$0024,%r0 + nop + ldo -8(%r0),%r19 + ldo -32(%r4),%r21 + add %r21,%r19,%r20 + ldw 0(%r20),%r19 + stw %r9,0(%r19) + copy %r9,%r28 + bl,n L$0020,%r0 +L$0024: +L$0023: +L$0021: + ldo -8(%r0),%r19 + ldo -32(%r4),%r20 + add %r20,%r19,%r19 + ldw 0(%r19),%r20 + comiclr,<> 0,%r20,%r0 + bl L$0026,%r0 + nop + ldo -8(%r0),%r19 + ldo -32(%r4),%r21 + add %r21,%r19,%r20 + ldw 0(%r20),%r19 + ldw 0(%r19),%r20 + comiclr,= 0,%r20,%r0 + bl L$0025,%r0 + nop + bl,n L$0026,%r0 +L$0026: + ldo -4(%r0),%r19 + ldo -32(%r4),%r21 + add %r21,%r19,%r20 + ldw 0(%r20),%r19 + ldw 12(%r19),%r26 + .CALL ARGW0=GR + bl alloc_type,%r2 + nop + copy %r28,%r9 + ldo -8(%r0),%r19 + ldo -32(%r4),%r20 + add %r20,%r19,%r19 + ldw 0(%r19),%r20 + comiclr,<> 0,%r20,%r0 + bl L$0027,%r0 + nop + ldo -8(%r0),%r19 + ldo -32(%r4),%r21 + add %r21,%r19,%r20 + ldw 0(%r20),%r19 + stw %r9,0(%r19) +L$0027: + bl,n L$0028,%r0 +L$0025: + ldo -8(%r0),%r19 + ldo -32(%r4),%r21 + add %r21,%r19,%r20 + ldw 0(%r20),%r19 + ldw 0(%r19),%r9 + ldw 12(%r9),%r19 + stw %r19,8(%r4) + copy %r9,%r26 + copy %r0,%r25 + ldo 52(%r0),%r24 + .CALL ARGW0=GR,ARGW1=GR,ARGW2=GR + bl memset,%r2 + nop + ldw 8(%r4),%r19 + stw %r19,12(%r9) +L$0028: + ldo -4(%r0),%r19 + ldo -32(%r4),%r20 + add %r20,%r19,%r19 + ldw 0(%r19),%r20 + stw %r20,16(%r9) + ldo -4(%r0),%r19 + ldo -32(%r4),%r21 + add %r21,%r19,%r20 + ldw 0(%r20),%r19 + stw %r9,24(%r19) + ldo 4(%r0),%r19 + stw %r19,8(%r9) + ldo 16(%r0),%r19 + stw %r19,0(%r9) + ldo -4(%r0),%r19 + ldo -32(%r4),%r21 + add %r21,%r19,%r20 + ldw 0(%r20),%r19 + ldw 24(%r19),%r20 + comiclr,= 0,%r20,%r0 + bl L$0029,%r0 + nop + ldo -4(%r0),%r19 + ldo -32(%r4),%r21 + add %r21,%r19,%r20 + ldw 0(%r20),%r19 + stw %r9,24(%r19) +L$0029: + copy %r9,%r28 + bl,n L$0020,%r0 +L$0020: + ldw 16(%r4),%r9 + ldw 20(%r4),%r8 + ldw 24(%r4),%r7 + ldw 28(%r4),%r6 + ldw 32(%r4),%r5 + ldo 8(%r4),%r30 + ldw -28(%r30),%r2 + bv %r0(%r2) + ldwm -8(%r30),%r4 + .EXIT + .PROCEND + .align 4 + .EXPORT lookup_reference_type,CODE + .EXPORT lookup_reference_type,ENTRY,PRIV_LEV=3,ARGW0=GR,RTNVAL=GR +lookup_reference_type: + .PROC + .CALLINFO FRAME=128,CALLS,SAVE_RP + .ENTRY + stw %r2,-20(%r30) + copy %r4,%r1 + copy %r30,%r4 + stwm %r1,128(%r30) + stw %r6,8(%r4) + stw %r5,12(%r4) + ldo -4(%r0),%r5 + ldo -32(%r4),%r19 + add %r19,%r5,%r6 + stw %r26,0(%r6) + ldo -4(%r0),%r19 + ldo -32(%r4),%r20 + add %r20,%r19,%r19 + ldw 0(%r19),%r26 + copy %r0,%r25 + .CALL ARGW0=GR,ARGW1=GR + bl make_reference_type,%r2 + nop + bl,n L$0030,%r0 +L$0030: + ldw 8(%r4),%r6 + ldw 12(%r4),%r5 + ldo 8(%r4),%r30 + ldw -28(%r30),%r2 + bv %r0(%r2) + ldwm -8(%r30),%r4 + .EXIT + .PROCEND + .align 4 + .EXPORT make_function_type,CODE + .EXPORT make_function_type,ENTRY,PRIV_LEV=3,ARGW0=GR,ARGW1=GR,RTNVAL=GR +make_function_type: + .PROC + .CALLINFO FRAME=192,CALLS,SAVE_RP + .ENTRY + stw %r2,-20(%r30) + copy %r4,%r1 + copy %r30,%r4 + stwm %r1,192(%r30) + stw %r9,16(%r4) + stw %r8,20(%r4) + stw %r7,24(%r4) + stw %r6,28(%r4) + stw %r5,32(%r4) + ldo -4(%r0),%r5 + ldo -32(%r4),%r19 + add %r19,%r5,%r6 + stw %r26,0(%r6) + ldo -8(%r0),%r7 + ldo -32(%r4),%r19 + add %r19,%r7,%r8 + stw %r25,0(%r8) + ldo -4(%r0),%r19 + ldo -32(%r4),%r21 + add %r21,%r19,%r20 + ldw 0(%r20),%r19 + ldw 28(%r19),%r9 + comiclr,<> 0,%r9,%r0 + bl L$0032,%r0 + nop + ldo -8(%r0),%r19 + ldo -32(%r4),%r20 + add %r20,%r19,%r19 + ldw 0(%r19),%r20 + comiclr,= 0,%r20,%r0 + bl L$0033,%r0 + nop + copy %r9,%r28 + bl,n L$0031,%r0 + bl,n L$0034,%r0 +L$0033: + ldo -8(%r0),%r19 + ldo -32(%r4),%r21 + add %r21,%r19,%r20 + ldw 0(%r20),%r19 + ldw 0(%r19),%r20 + comiclr,= 0,%r20,%r0 + bl L$0035,%r0 + nop + ldo -8(%r0),%r19 + ldo -32(%r4),%r21 + add %r21,%r19,%r20 + ldw 0(%r20),%r19 + stw %r9,0(%r19) + copy %r9,%r28 + bl,n L$0031,%r0 +L$0035: +L$0034: +L$0032: + ldo -8(%r0),%r19 + ldo -32(%r4),%r20 + add %r20,%r19,%r19 + ldw 0(%r19),%r20 + comiclr,<> 0,%r20,%r0 + bl L$0037,%r0 + nop + ldo -8(%r0),%r19 + ldo -32(%r4),%r21 + add %r21,%r19,%r20 + ldw 0(%r20),%r19 + ldw 0(%r19),%r20 + comiclr,= 0,%r20,%r0 + bl L$0036,%r0 + nop + bl,n L$0037,%r0 +L$0037: + ldo -4(%r0),%r19 + ldo -32(%r4),%r21 + add %r21,%r19,%r20 + ldw 0(%r20),%r19 + ldw 12(%r19),%r26 + .CALL ARGW0=GR + bl alloc_type,%r2 + nop + copy %r28,%r9 + ldo -8(%r0),%r19 + ldo -32(%r4),%r20 + add %r20,%r19,%r19 + ldw 0(%r19),%r20 + comiclr,<> 0,%r20,%r0 + bl L$0038,%r0 + nop + ldo -8(%r0),%r19 + ldo -32(%r4),%r21 + add %r21,%r19,%r20 + ldw 0(%r20),%r19 + stw %r9,0(%r19) +L$0038: + bl,n L$0039,%r0 +L$0036: + ldo -8(%r0),%r19 + ldo -32(%r4),%r21 + add %r21,%r19,%r20 + ldw 0(%r20),%r19 + ldw 0(%r19),%r9 + ldw 12(%r9),%r19 + stw %r19,8(%r4) + copy %r9,%r26 + copy %r0,%r25 + ldo 52(%r0),%r24 + .CALL ARGW0=GR,ARGW1=GR,ARGW2=GR + bl memset,%r2 + nop + ldw 8(%r4),%r19 + stw %r19,12(%r9) +L$0039: + ldo -4(%r0),%r19 + ldo -32(%r4),%r20 + add %r20,%r19,%r19 + ldw 0(%r19),%r20 + stw %r20,16(%r9) + ldo -4(%r0),%r19 + ldo -32(%r4),%r21 + add %r21,%r19,%r20 + ldw 0(%r20),%r19 + stw %r9,28(%r19) + ldo 1(%r0),%r19 + stw %r19,8(%r9) + ldo 6(%r0),%r19 + stw %r19,0(%r9) + ldo -4(%r0),%r19 + ldo -32(%r4),%r21 + add %r21,%r19,%r20 + ldw 0(%r20),%r19 + ldw 28(%r19),%r20 + comiclr,= 0,%r20,%r0 + bl L$0040,%r0 + nop + ldo -4(%r0),%r19 + ldo -32(%r4),%r21 + add %r21,%r19,%r20 + ldw 0(%r20),%r19 + stw %r9,28(%r19) +L$0040: + copy %r9,%r28 + bl,n L$0031,%r0 +L$0031: + ldw 16(%r4),%r9 + ldw 20(%r4),%r8 + ldw 24(%r4),%r7 + ldw 28(%r4),%r6 + ldw 32(%r4),%r5 + ldo 8(%r4),%r30 + ldw -28(%r30),%r2 + bv %r0(%r2) + ldwm -8(%r30),%r4 + .EXIT + .PROCEND + .align 4 + .EXPORT lookup_function_type,CODE + .EXPORT lookup_function_type,ENTRY,PRIV_LEV=3,ARGW0=GR,RTNVAL=GR +lookup_function_type: + .PROC + .CALLINFO FRAME=128,CALLS,SAVE_RP + .ENTRY + stw %r2,-20(%r30) + copy %r4,%r1 + copy %r30,%r4 + stwm %r1,128(%r30) + stw %r6,8(%r4) + stw %r5,12(%r4) + ldo -4(%r0),%r5 + ldo -32(%r4),%r19 + add %r19,%r5,%r6 + stw %r26,0(%r6) + ldo -4(%r0),%r19 + ldo -32(%r4),%r20 + add %r20,%r19,%r19 + ldw 0(%r19),%r26 + copy %r0,%r25 + .CALL ARGW0=GR,ARGW1=GR + bl make_function_type,%r2 + nop + bl,n L$0041,%r0 +L$0041: + ldw 8(%r4),%r6 + ldw 12(%r4),%r5 + ldo 8(%r4),%r30 + ldw -28(%r30),%r2 + bv %r0(%r2) + ldwm -8(%r30),%r4 + .EXIT + .PROCEND + .IMPORT smash_to_member_type,CODE + .align 4 + .EXPORT lookup_member_type,CODE + .EXPORT lookup_member_type,ENTRY,PRIV_LEV=3,ARGW0=GR,ARGW1=GR,RTNVAL=GR +lookup_member_type: + .PROC + .CALLINFO FRAME=128,CALLS,SAVE_RP + .ENTRY + stw %r2,-20(%r30) + copy %r4,%r1 + copy %r30,%r4 + stwm %r1,128(%r30) + stw %r8,8(%r4) + stw %r7,12(%r4) + stw %r6,16(%r4) + stw %r5,20(%r4) + ldo 24(%r4),%r1 + fstds,ma %fr12,8(%r1) + ldo -4(%r0),%r5 + ldo -32(%r4),%r19 + add %r19,%r5,%r6 + stw %r26,0(%r6) + ldo -8(%r0),%r7 + ldo -32(%r4),%r19 + add %r19,%r7,%r8 + stw %r25,0(%r8) + ldo -4(%r0),%r19 + ldo -32(%r4),%r21 + add %r21,%r19,%r20 + ldw 0(%r20),%r19 + ldw 12(%r19),%r26 + .CALL ARGW0=GR + bl alloc_type,%r2 + nop + stw %r28,-16(%r30) + fldws -16(%r30),%fr12 + ldo -8(%r0),%r19 + ldo -32(%r4),%r20 + add %r20,%r19,%r19 + ldo -4(%r0),%r20 + ldo -32(%r4),%r21 + add %r21,%r20,%r20 + fstws %fr12,-16(%r30) + ldw -16(%r30),%r26 + ldw 0(%r19),%r25 + ldw 0(%r20),%r24 + .CALL ARGW0=GR,ARGW1=GR,ARGW2=GR + bl smash_to_member_type,%r2 + nop + fstws %fr12,-16(%r30) + ldw -16(%r30),%r28 + bl,n L$0042,%r0 +L$0042: + ldw 8(%r4),%r8 + ldw 12(%r4),%r7 + ldw 16(%r4),%r6 + ldw 20(%r4),%r5 + ldo 24(%r4),%r1 + fldds,ma 8(%r1),%fr12 + ldo 8(%r4),%r30 + ldw -28(%r30),%r2 + bv %r0(%r2) + ldwm -8(%r30),%r4 + .EXIT + .PROCEND + .align 4 + .EXPORT allocate_stub_method,CODE + .EXPORT allocate_stub_method,ENTRY,PRIV_LEV=3,ARGW0=GR,RTNVAL=GR +allocate_stub_method: + .PROC + .CALLINFO FRAME=128,CALLS,SAVE_RP + .ENTRY + stw %r2,-20(%r30) + copy %r4,%r1 + copy %r30,%r4 + stwm %r1,128(%r30) + stw %r6,16(%r4) + stw %r5,20(%r4) + ldo -4(%r0),%r5 + ldo -32(%r4),%r19 + add %r19,%r5,%r6 + stw %r26,0(%r6) + ldo -4(%r0),%r19 + ldo -32(%r4),%r21 + add %r21,%r19,%r20 + ldw 0(%r20),%r19 + ldw 12(%r19),%r26 + .CALL ARGW0=GR + bl alloc_type,%r2 + nop + stw %r28,8(%r4) + ldw 8(%r4),%r19 + ldo -4(%r0),%r20 + ldo -32(%r4),%r21 + add %r21,%r20,%r20 + ldw 0(%r20),%r21 + stw %r21,16(%r19) + ldw 8(%r4),%r19 + ldo 4(%r0),%r20 + sth %r20,32(%r19) + ldw 8(%r4),%r19 + ldo 15(%r0),%r20 + stw %r20,0(%r19) + ldw 8(%r4),%r19 + ldo 1(%r0),%r20 + stw %r20,8(%r19) + ldw 8(%r4),%r28 + bl,n L$0043,%r0 +L$0043: + ldw 16(%r4),%r6 + ldw 20(%r4),%r5 + ldo 8(%r4),%r30 + ldw -28(%r30),%r2 + bv %r0(%r2) + ldwm -8(%r30),%r4 + .EXIT + .PROCEND + .IMPORT builtin_type_int,DATA + .align 4 + .EXPORT create_array_type,CODE + .EXPORT create_array_type,ENTRY,PRIV_LEV=3,ARGW0=GR,ARGW1=GR,RTNVAL=GR +create_array_type: + .PROC + .CALLINFO FRAME=192,CALLS,SAVE_RP + .ENTRY + stw %r2,-20(%r30) + copy %r4,%r1 + copy %r30,%r4 + stwm %r1,192(%r30) + stw %r10,56(%r4) + stw %r9,60(%r4) + stw %r8,64(%r4) + stw %r7,68(%r4) + stw %r6,72(%r4) + stw %r5,76(%r4) + ldo -4(%r0),%r5 + ldo -32(%r4),%r19 + add %r19,%r5,%r6 + stw %r26,0(%r6) + ldo -8(%r0),%r7 + ldo -32(%r4),%r19 + add %r19,%r7,%r8 + stw %r25,0(%r8) + ldo -4(%r0),%r19 + ldo -32(%r4),%r21 + add %r21,%r19,%r20 + ldw 0(%r20),%r19 + ldw 12(%r19),%r26 + .CALL ARGW0=GR + bl alloc_type,%r2 + nop + stw %r28,8(%r4) + ldw 8(%r4),%r19 + ldo 2(%r0),%r20 + stw %r20,0(%r19) + ldw 8(%r4),%r19 + ldo -4(%r0),%r20 + ldo -32(%r4),%r21 + add %r21,%r20,%r20 + ldw 0(%r20),%r21 + stw %r21,16(%r19) + ldw 8(%r4),%r19 + ldo -8(%r0),%r20 + ldo -32(%r4),%r21 + add %r21,%r20,%r20 + ldo -4(%r0),%r21 + ldo -32(%r4),%r23 + add %r23,%r21,%r22 + ldw 0(%r22),%r21 + ldw 0(%r20),%r20 + ldw 8(%r21),%r21 + stw %r20,-16(%r30) + fldws -16(%r30),%fr5 + stw %r21,-16(%r30) + fldws -16(%r30),%fr5R + xmpyu %fr5,%fr5R,%fr4 + fstws %fr4R,-16(%r30) + ldw -16(%r30),%r24 + stw %r24,8(%r19) + ldw 8(%r4),%r19 + ldo 1(%r0),%r20 + sth %r20,34(%r19) + ldw 8(%r4),%r9 + ldw 8(%r4),%r19 + ldw 12(%r19),%r20 + comiclr,<> 0,%r20,%r0 + bl L$0050,%r0 + nop + ldw 8(%r4),%r19 + ldw 12(%r19),%r20 + ldo 120(%r20),%r19 + stw %r19,16(%r4) + ldw 16(%r4),%r19 + stw %r19,20(%r4) + ldo 16(%r0),%r19 + stw %r19,24(%r4) + ldw 20(%r4),%r19 + ldw 20(%r4),%r20 + ldw 16(%r19),%r19 + ldw 12(%r20),%r20 + sub %r19,%r20,%r19 + ldw 24(%r4),%r20 + comclr,< %r19,%r20,%r0 + bl L$0045,%r0 + nop + ldw 20(%r4),%r26 + ldw 24(%r4),%r25 + .CALL ARGW0=GR,ARGW1=GR + bl _obstack_newchunk,%r2 + nop + copy %r0,%r19 + bl,n L$0046,%r0 +L$0045: + copy %r0,%r19 +L$0046: + ldw 20(%r4),%r19 + ldw 20(%r4),%r20 + ldw 12(%r20),%r21 + ldw 24(%r4),%r22 + add %r21,%r22,%r20 + copy %r20,%r21 + stw %r21,12(%r19) + ldw 16(%r4),%r19 + stw %r19,28(%r4) + ldw 28(%r4),%r19 + ldw 8(%r19),%r20 + stw %r20,32(%r4) + ldw 28(%r4),%r19 + ldw 12(%r19),%r20 + ldw 32(%r4),%r19 + comclr,= %r20,%r19,%r0 + bl L$0047,%r0 + nop + ldw 28(%r4),%r19 + ldw 40(%r19),%r20 + copy %r20,%r21 + depi -1,1,1,%r21 + stw %r21,40(%r19) +L$0047: + ldw 28(%r4),%r19 + ldw 28(%r4),%r20 + ldw 28(%r4),%r21 + ldw 12(%r20),%r20 + ldw 24(%r21),%r21 + add %r20,%r21,%r20 + ldw 28(%r4),%r21 + ldw 24(%r21),%r22 + uaddcm %r0,%r22,%r21 + and %r20,%r21,%r20 + copy %r20,%r21 + stw %r21,12(%r19) + ldw 28(%r4),%r19 + ldw 28(%r4),%r20 + ldw 12(%r19),%r19 + ldw 4(%r20),%r20 + sub %r19,%r20,%r19 + ldw 28(%r4),%r20 + ldw 28(%r4),%r21 + ldw 16(%r20),%r20 + ldw 4(%r21),%r21 + sub %r20,%r21,%r20 + comclr,> %r19,%r20,%r0 + bl L$0048,%r0 + nop + ldw 28(%r4),%r19 + ldw 28(%r4),%r20 + ldw 16(%r20),%r21 + stw %r21,12(%r19) + copy %r21,%r19 + bl,n L$0049,%r0 +L$0048: + copy %r0,%r19 +L$0049: + ldw 28(%r4),%r19 + ldw 28(%r4),%r20 + ldw 12(%r20),%r21 + stw %r21,8(%r19) + ldw 32(%r4),%r10 + bl,n L$0051,%r0 +L$0050: + ldo 16(%r0),%r26 + .CALL ARGW0=GR + bl xmalloc,%r2 + nop + copy %r28,%r10 +L$0051: + stw %r10,36(%r9) + ldw 8(%r4),%r19 + ldw 12(%r19),%r26 + .CALL ARGW0=GR + bl alloc_type,%r2 + nop + stw %r28,12(%r4) + ldw 12(%r4),%r19 + ldo 11(%r0),%r20 + stw %r20,0(%r19) + ldw 12(%r4),%r19 + addil L'builtin_type_int-$global$,%r27 + ldw R'builtin_type_int-$global$(%r1),%r20 + stw %r20,16(%r19) + ldw 12(%r4),%r19 + ldo 4(%r0),%r20 + stw %r20,8(%r19) + ldw 12(%r4),%r19 + ldo 2(%r0),%r20 + sth %r20,34(%r19) + ldw 12(%r4),%r9 + ldw 12(%r4),%r19 + ldw 12(%r19),%r20 + comiclr,<> 0,%r20,%r0 + bl L$0057,%r0 + nop + ldw 12(%r4),%r19 + ldw 12(%r19),%r20 + ldo 120(%r20),%r19 + stw %r19,36(%r4) + ldw 36(%r4),%r19 + stw %r19,40(%r4) + ldo 32(%r0),%r19 + stw %r19,44(%r4) + ldw 40(%r4),%r19 + ldw 40(%r4),%r20 + ldw 16(%r19),%r19 + ldw 12(%r20),%r20 + sub %r19,%r20,%r19 + ldw 44(%r4),%r20 + comclr,< %r19,%r20,%r0 + bl L$0052,%r0 + nop + ldw 40(%r4),%r26 + ldw 44(%r4),%r25 + .CALL ARGW0=GR,ARGW1=GR + bl _obstack_newchunk,%r2 + nop + copy %r0,%r19 + bl,n L$0053,%r0 +L$0052: + copy %r0,%r19 +L$0053: + ldw 40(%r4),%r19 + ldw 40(%r4),%r20 + ldw 12(%r20),%r21 + ldw 44(%r4),%r22 + add %r21,%r22,%r20 + copy %r20,%r21 + stw %r21,12(%r19) + ldw 36(%r4),%r19 + stw %r19,48(%r4) + ldw 48(%r4),%r19 + ldw 8(%r19),%r20 + stw %r20,52(%r4) + ldw 48(%r4),%r19 + ldw 12(%r19),%r20 + ldw 52(%r4),%r19 + comclr,= %r20,%r19,%r0 + bl L$0054,%r0 + nop + ldw 48(%r4),%r19 + ldw 40(%r19),%r20 + copy %r20,%r21 + depi -1,1,1,%r21 + stw %r21,40(%r19) +L$0054: + ldw 48(%r4),%r19 + ldw 48(%r4),%r20 + ldw 48(%r4),%r21 + ldw 12(%r20),%r20 + ldw 24(%r21),%r21 + add %r20,%r21,%r20 + ldw 48(%r4),%r21 + ldw 24(%r21),%r22 + uaddcm %r0,%r22,%r21 + and %r20,%r21,%r20 + copy %r20,%r21 + stw %r21,12(%r19) + ldw 48(%r4),%r19 + ldw 48(%r4),%r20 + ldw 12(%r19),%r19 + ldw 4(%r20),%r20 + sub %r19,%r20,%r19 + ldw 48(%r4),%r20 + ldw 48(%r4),%r21 + ldw 16(%r20),%r20 + ldw 4(%r21),%r21 + sub %r20,%r21,%r20 + comclr,> %r19,%r20,%r0 + bl L$0055,%r0 + nop + ldw 48(%r4),%r19 + ldw 48(%r4),%r20 + ldw 16(%r20),%r21 + stw %r21,12(%r19) + copy %r21,%r19 + bl,n L$0056,%r0 +L$0055: + copy %r0,%r19 +L$0056: + ldw 48(%r4),%r19 + ldw 48(%r4),%r20 + ldw 12(%r20),%r21 + stw %r21,8(%r19) + ldw 52(%r4),%r10 + bl,n L$0058,%r0 +L$0057: + ldo 32(%r0),%r26 + .CALL ARGW0=GR + bl xmalloc,%r2 + nop + copy %r28,%r10 +L$0058: + stw %r10,36(%r9) + ldw 12(%r4),%r19 + ldw 36(%r19),%r20 + stw %r0,0(%r20) + ldw 12(%r4),%r19 + ldo 16(%r0),%r20 + ldw 36(%r19),%r21 + add %r20,%r21,%r19 + ldo -8(%r0),%r20 + ldo -32(%r4),%r22 + add %r22,%r20,%r21 + ldw 0(%r21),%r20 + ldo -1(%r20),%r21 + stw %r21,0(%r19) + ldw 12(%r4),%r20 + ldw 36(%r20),%r19 + addil L'builtin_type_int-$global$,%r27 + ldw R'builtin_type_int-$global$(%r1),%r20 + stw %r20,8(%r19) + ldw 12(%r4),%r19 + ldo 16(%r0),%r20 + ldw 36(%r19),%r21 + add %r20,%r21,%r19 + addil L'builtin_type_int-$global$,%r27 + ldw R'builtin_type_int-$global$(%r1),%r20 + stw %r20,8(%r19) + ldw 8(%r4),%r19 + ldw 36(%r19),%r20 + ldw 12(%r4),%r19 + stw %r19,8(%r20) + ldw 8(%r4),%r19 + ldo -1(%r0),%r20 + stw %r20,44(%r19) + ldw 8(%r4),%r28 + bl,n L$0044,%r0 +L$0044: + ldw 56(%r4),%r10 + ldw 60(%r4),%r9 + ldw 64(%r4),%r8 + ldw 68(%r4),%r7 + ldw 72(%r4),%r6 + ldw 76(%r4),%r5 + ldo 8(%r4),%r30 + ldw -28(%r30),%r2 + bv %r0(%r2) + ldwm -8(%r30),%r4 + .EXIT + .PROCEND + .align 4 + .EXPORT smash_to_member_type,CODE + .EXPORT smash_to_member_type,ENTRY,PRIV_LEV=3,ARGW0=GR,ARGW1=GR,ARGW2=GR +smash_to_member_type: + .PROC + .CALLINFO FRAME=192,CALLS,SAVE_RP + .ENTRY + stw %r2,-20(%r30) + copy %r4,%r1 + copy %r30,%r4 + stwm %r1,192(%r30) + stw %r10,16(%r4) + stw %r9,20(%r4) + stw %r8,24(%r4) + stw %r7,28(%r4) + stw %r6,32(%r4) + stw %r5,36(%r4) + ldo -4(%r0),%r5 + ldo -32(%r4),%r19 + add %r19,%r5,%r6 + stw %r26,0(%r6) + ldo -8(%r0),%r7 + ldo -32(%r4),%r19 + add %r19,%r7,%r8 + stw %r25,0(%r8) + ldo -12(%r0),%r9 + ldo -32(%r4),%r19 + add %r19,%r9,%r10 + stw %r24,0(%r10) + ldo -4(%r0),%r19 + ldo -32(%r4),%r21 + add %r21,%r19,%r20 + ldw 0(%r20),%r19 + ldw 12(%r19),%r20 + stw %r20,8(%r4) + ldo -4(%r0),%r19 + ldo -32(%r4),%r20 + add %r20,%r19,%r19 + ldw 0(%r19),%r26 + copy %r0,%r25 + ldo 52(%r0),%r24 + .CALL ARGW0=GR,ARGW1=GR,ARGW2=GR + bl memset,%r2 + nop + ldo -4(%r0),%r19 + ldo -32(%r4),%r21 + add %r21,%r19,%r20 + ldw 0(%r20),%r19 + ldw 8(%r4),%r20 + stw %r20,12(%r19) + ldo -4(%r0),%r19 + ldo -32(%r4),%r21 + add %r21,%r19,%r20 + ldw 0(%r20),%r19 + ldo -12(%r0),%r20 + ldo -32(%r4),%r21 + add %r21,%r20,%r20 + ldw 0(%r20),%r21 + stw %r21,16(%r19) + ldo -4(%r0),%r19 + ldo -32(%r4),%r21 + add %r21,%r19,%r20 + ldw 0(%r20),%r19 + ldo -8(%r0),%r20 + ldo -32(%r4),%r21 + add %r21,%r20,%r20 + ldw 0(%r20),%r21 + stw %r21,40(%r19) + ldo -4(%r0),%r19 + ldo -32(%r4),%r21 + add %r21,%r19,%r20 + ldw 0(%r20),%r19 + ldo 1(%r0),%r20 + stw %r20,8(%r19) + ldo -4(%r0),%r19 + ldo -32(%r4),%r21 + add %r21,%r19,%r20 + ldw 0(%r20),%r19 + ldo 14(%r0),%r20 + stw %r20,0(%r19) +L$0059: + ldw 16(%r4),%r10 + ldw 20(%r4),%r9 + ldw 24(%r4),%r8 + ldw 28(%r4),%r7 + ldw 32(%r4),%r6 + ldw 36(%r4),%r5 + ldo 8(%r4),%r30 + ldw -28(%r30),%r2 + bv %r0(%r2) + ldwm -8(%r30),%r4 + .EXIT + .PROCEND + .align 4 + .EXPORT smash_to_method_type,CODE + .EXPORT smash_to_method_type,ENTRY,PRIV_LEV=3,ARGW0=GR,ARGW1=GR,ARGW2=GR,ARGW3=GR +smash_to_method_type: + .PROC + .CALLINFO FRAME=192,CALLS,SAVE_RP + .ENTRY + stw %r2,-20(%r30) + copy %r4,%r1 + copy %r30,%r4 + stwm %r1,192(%r30) + stw %r12,16(%r4) + stw %r11,20(%r4) + stw %r10,24(%r4) + stw %r9,28(%r4) + stw %r8,32(%r4) + stw %r7,36(%r4) + stw %r6,40(%r4) + stw %r5,44(%r4) + ldo -4(%r0),%r5 + ldo -32(%r4),%r19 + add %r19,%r5,%r6 + stw %r26,0(%r6) + ldo -8(%r0),%r7 + ldo -32(%r4),%r19 + add %r19,%r7,%r8 + stw %r25,0(%r8) + ldo -12(%r0),%r9 + ldo -32(%r4),%r19 + add %r19,%r9,%r10 + stw %r24,0(%r10) + ldo -16(%r0),%r11 + ldo -32(%r4),%r19 + add %r19,%r11,%r12 + stw %r23,0(%r12) + ldo -4(%r0),%r19 + ldo -32(%r4),%r21 + add %r21,%r19,%r20 + ldw 0(%r20),%r19 + ldw 12(%r19),%r20 + stw %r20,8(%r4) + ldo -4(%r0),%r19 + ldo -32(%r4),%r20 + add %r20,%r19,%r19 + ldw 0(%r19),%r26 + copy %r0,%r25 + ldo 52(%r0),%r24 + .CALL ARGW0=GR,ARGW1=GR,ARGW2=GR + bl memset,%r2 + nop + ldo -4(%r0),%r19 + ldo -32(%r4),%r21 + add %r21,%r19,%r20 + ldw 0(%r20),%r19 + ldw 8(%r4),%r20 + stw %r20,12(%r19) + ldo -4(%r0),%r19 + ldo -32(%r4),%r21 + add %r21,%r19,%r20 + ldw 0(%r20),%r19 + ldo -12(%r0),%r20 + ldo -32(%r4),%r21 + add %r21,%r20,%r20 + ldw 0(%r20),%r21 + stw %r21,16(%r19) + ldo -4(%r0),%r19 + ldo -32(%r4),%r21 + add %r21,%r19,%r20 + ldw 0(%r20),%r19 + ldo -8(%r0),%r20 + ldo -32(%r4),%r21 + add %r21,%r20,%r20 + ldw 0(%r20),%r21 + stw %r21,40(%r19) + ldo -4(%r0),%r19 + ldo -32(%r4),%r21 + add %r21,%r19,%r20 + ldw 0(%r20),%r19 + ldo -16(%r0),%r20 + ldo -32(%r4),%r21 + add %r21,%r20,%r20 + ldw 0(%r20),%r21 + stw %r21,48(%r19) + ldo -4(%r0),%r19 + ldo -32(%r4),%r21 + add %r21,%r19,%r20 + ldw 0(%r20),%r19 + ldo 1(%r0),%r20 + stw %r20,8(%r19) + ldo -4(%r0),%r19 + ldo -32(%r4),%r21 + add %r21,%r19,%r20 + ldw 0(%r20),%r19 + ldo 15(%r0),%r20 + stw %r20,0(%r19) +L$0060: + ldw 16(%r4),%r12 + ldw 20(%r4),%r11 + ldw 24(%r4),%r10 + ldw 28(%r4),%r9 + ldw 32(%r4),%r8 + ldw 36(%r4),%r7 + ldw 40(%r4),%r6 + ldw 44(%r4),%r5 + ldo 8(%r4),%r30 + ldw -28(%r30),%r2 + bv %r0(%r2) + ldwm -8(%r30),%r4 + .EXIT + .PROCEND + .IMPORT strncmp,CODE + .align 4 +LC$0000: + .STRING "struct \x00" + .align 4 +LC$0001: + .STRING "union \x00" + .align 4 +LC$0002: + .STRING "enum \x00" + .align 4 + .EXPORT type_name_no_tag,CODE + .EXPORT type_name_no_tag,ENTRY,PRIV_LEV=3,ARGW0=GR,RTNVAL=GR +type_name_no_tag: + .PROC + .CALLINFO FRAME=128,CALLS,SAVE_RP + .ENTRY + stw %r2,-20(%r30) + copy %r4,%r1 + copy %r30,%r4 + stwm %r1,128(%r30) + stw %r6,8(%r4) + stw %r5,12(%r4) + copy %r26,%r5 + ldw 4(%r5),%r6 + comiclr,<> 0,%r6,%r0 + bl L$0062,%r0 + nop + ldw 0(%r5),%r19 + comiclr,<> 4,%r19,%r0 + bl L$0066,%r0 + nop + comiclr,>= 4,%r19,%r0 + bl L$0072,%r0 + nop + comiclr,<> 3,%r19,%r0 + bl L$0064,%r0 + nop + bl,n L$0070,%r0 +L$0072: + comiclr,<> 5,%r19,%r0 + bl L$0068,%r0 + nop + bl,n L$0070,%r0 +L$0064: + copy %r6,%r26 + ldil L'LC$0000,%r25 + ldo R'LC$0000(%r25),%r25 + ldo 7(%r0),%r24 + .CALL ARGW0=GR,ARGW1=GR,ARGW2=GR + bl strncmp,%r2 + nop + copy %r28,%r19 + comiclr,= 0,%r19,%r0 + bl L$0065,%r0 + nop + ldo 7(%r6),%r6 +L$0065: + bl,n L$0063,%r0 +L$0066: + copy %r6,%r26 + ldil L'LC$0001,%r25 + ldo R'LC$0001(%r25),%r25 + ldo 6(%r0),%r24 + .CALL ARGW0=GR,ARGW1=GR,ARGW2=GR + bl strncmp,%r2 + nop + copy %r28,%r19 + comiclr,= 0,%r19,%r0 + bl L$0067,%r0 + nop + ldo 6(%r6),%r6 +L$0067: + bl,n L$0063,%r0 +L$0068: + copy %r6,%r26 + ldil L'LC$0002,%r25 + ldo R'LC$0002(%r25),%r25 + ldo 5(%r0),%r24 + .CALL ARGW0=GR,ARGW1=GR,ARGW2=GR + bl strncmp,%r2 + nop + copy %r28,%r19 + comiclr,= 0,%r19,%r0 + bl L$0069,%r0 + nop + ldo 5(%r6),%r6 +L$0069: + bl,n L$0063,%r0 +L$0070: + bl,n L$0063,%r0 +L$0063: +L$0062: + copy %r6,%r28 + bl,n L$0061,%r0 +L$0061: + ldw 8(%r4),%r6 + ldw 12(%r4),%r5 + ldo 8(%r4),%r30 + ldw -28(%r30),%r2 + bv %r0(%r2) + ldwm -8(%r30),%r4 + .EXIT + .PROCEND + .IMPORT current_language,DATA + .IMPORT strcmp,CODE + .align 4 + .EXPORT lookup_primitive_typename,CODE + .EXPORT lookup_primitive_typename,ENTRY,PRIV_LEV=3,ARGW0=GR,RTNVAL=GR +lookup_primitive_typename: + .PROC + .CALLINFO FRAME=128,CALLS,SAVE_RP + .ENTRY + stw %r2,-20(%r30) + copy %r4,%r1 + copy %r30,%r4 + stwm %r1,128(%r30) + stw %r6,16(%r4) + stw %r5,20(%r4) + ldo -4(%r0),%r5 + ldo -32(%r4),%r19 + add %r19,%r5,%r6 + stw %r26,0(%r6) + addil L'current_language-$global$,%r27 + ldw R'current_language-$global$(%r1),%r19 + ldw 8(%r19),%r20 + stw %r20,8(%r4) +L$0074: + ldw 8(%r4),%r19 + ldw 0(%r19),%r20 + comiclr,<> 0,%r20,%r0 + bl L$0075,%r0 + nop + ldw 8(%r4),%r19 + ldw 0(%r19),%r20 + ldw 0(%r20),%r19 + ldo -4(%r0),%r20 + ldo -32(%r4),%r21 + add %r21,%r20,%r20 + ldw 4(%r19),%r26 + ldw 0(%r20),%r25 + .CALL ARGW0=GR,ARGW1=GR + bl strcmp,%r2 + nop + copy %r28,%r19 + comiclr,= 0,%r19,%r0 + bl L$0077,%r0 + nop + ldw 8(%r4),%r19 + ldw 0(%r19),%r20 + ldw 0(%r20),%r28 + bl,n L$0073,%r0 +L$0077: +L$0076: + ldw 8(%r4),%r19 + ldo 4(%r19),%r20 + stw %r20,8(%r4) + bl,n L$0074,%r0 +L$0075: + copy %r0,%r28 + bl,n L$0073,%r0 +L$0073: + ldw 16(%r4),%r6 + ldw 20(%r4),%r5 + ldo 8(%r4),%r30 + ldw -28(%r30),%r2 + bv %r0(%r2) + ldwm -8(%r30),%r4 + .EXIT + .PROCEND + .IMPORT lookup_symbol,CODE + .IMPORT error,CODE + .align 4 +LC$0003: + .STRING "No type named %s.\x00" + .align 4 + .EXPORT lookup_typename,CODE + .EXPORT lookup_typename,ENTRY,PRIV_LEV=3,ARGW0=GR,ARGW1=GR,ARGW2=GR,RTNVAL=GR +lookup_typename: + .PROC + .CALLINFO FRAME=192,CALLS,SAVE_RP + .ENTRY + stw %r2,-20(%r30) + copy %r4,%r1 + copy %r30,%r4 + stwm %r1,192(%r30) + stw %r12,8(%r4) + stw %r11,12(%r4) + stw %r10,16(%r4) + stw %r9,20(%r4) + stw %r8,24(%r4) + stw %r7,28(%r4) + stw %r6,32(%r4) + stw %r5,36(%r4) + ldo -4(%r0),%r5 + ldo -32(%r4),%r19 + add %r19,%r5,%r6 + stw %r26,0(%r6) + ldo -8(%r0),%r7 + ldo -32(%r4),%r19 + add %r19,%r7,%r8 + stw %r25,0(%r8) + ldo -12(%r0),%r9 + ldo -32(%r4),%r19 + add %r19,%r9,%r10 + stw %r24,0(%r10) + ldo -4(%r0),%r19 + ldo -32(%r4),%r20 + add %r20,%r19,%r19 + ldo -8(%r0),%r20 + ldo -32(%r4),%r21 + add %r21,%r20,%r20 + stw %r0,-52(%r30) + ldw 0(%r19),%r26 + ldw 0(%r20),%r25 + ldo 1(%r0),%r24 + copy %r0,%r23 + .CALL ARGW0=GR,ARGW1=GR,ARGW2=GR,ARGW3=GR + bl lookup_symbol,%r2 + nop + copy %r28,%r11 + comiclr,<> 0,%r11,%r0 + bl L$0080,%r0 + nop + ldw 8(%r11),%r19 + comiclr,= 8,%r19,%r0 + bl L$0080,%r0 + nop + bl,n L$0079,%r0 +L$0080: + ldo -4(%r0),%r19 + ldo -32(%r4),%r20 + add %r20,%r19,%r19 + ldw 0(%r19),%r26 + .CALL ARGW0=GR + bl lookup_primitive_typename,%r2 + nop + copy %r28,%r12 + comiclr,<> 0,%r12,%r0 + bl L$0081,%r0 + nop + copy %r12,%r28 + bl,n L$0078,%r0 + bl,n L$0082,%r0 +L$0081: + comiclr,= 0,%r12,%r0 + bl L$0083,%r0 + nop + ldo -12(%r0),%r19 + ldo -32(%r4),%r20 + add %r20,%r19,%r19 + ldw 0(%r19),%r20 + comiclr,<> 0,%r20,%r0 + bl L$0083,%r0 + nop + copy %r0,%r28 + bl,n L$0078,%r0 + bl,n L$0084,%r0 +L$0083: + ldo -4(%r0),%r19 + ldo -32(%r4),%r20 + add %r20,%r19,%r19 + ldil L'LC$0003,%r26 + ldo R'LC$0003(%r26),%r26 + ldw 0(%r19),%r25 + .CALL ARGW0=GR,ARGW1=GR + bl error,%r2 + nop +L$0084: +L$0082: +L$0079: + ldw 12(%r11),%r28 + bl,n L$0078,%r0 +L$0078: + ldw 8(%r4),%r12 + ldw 12(%r4),%r11 + ldw 16(%r4),%r10 + ldw 20(%r4),%r9 + ldw 24(%r4),%r8 + ldw 28(%r4),%r7 + ldw 32(%r4),%r6 + ldw 36(%r4),%r5 + ldo 8(%r4),%r30 + ldw -28(%r30),%r2 + bv %r0(%r2) + ldwm -8(%r30),%r4 + .EXIT + .PROCEND + .IMPORT alloca,CODE + .IMPORT strlen,CODE + .IMPORT strcpy,CODE + .align 4 +LC$0004: + .STRING "unsigned \x00" + .align 4 + .EXPORT lookup_unsigned_typename,CODE + .EXPORT lookup_unsigned_typename,ENTRY,PRIV_LEV=3,ARGW0=GR,RTNVAL=GR +lookup_unsigned_typename: + .PROC + .CALLINFO FRAME=128,CALLS,SAVE_RP + .ENTRY + stw %r2,-20(%r30) + copy %r4,%r1 + copy %r30,%r4 + stwm %r1,128(%r30) + stw %r6,16(%r4) + stw %r5,20(%r4) + ldo -4(%r0),%r5 + ldo -32(%r4),%r19 + add %r19,%r5,%r6 + stw %r26,0(%r6) + ldo -4(%r0),%r19 + ldo -32(%r4),%r20 + add %r20,%r19,%r19 + ldw 0(%r19),%r26 + .CALL ARGW0=GR + bl strlen,%r2 + nop + copy %r28,%r19 + ldo 10(%r19),%r20 + ldo 7(%r20),%r21 + copy %r21,%r19 + ldo 63(%r19),%r20 + extru %r20,25,26,%r19 + zdep %r19,25,26,%r20 + ldo -96(%r30),%r19 + add %r30,%r20,%r30 + ldo 7(%r19),%r20 + extru %r20,28,29,%r19 + zdep %r19,28,29,%r20 + stw %r20,8(%r4) + ldw 8(%r4),%r26 + ldil L'LC$0004,%r25 + ldo R'LC$0004(%r25),%r25 + .CALL ARGW0=GR,ARGW1=GR + bl strcpy,%r2 + nop + ldw 8(%r4),%r20 + ldo 9(%r20),%r19 + ldo -4(%r0),%r20 + ldo -32(%r4),%r21 + add %r21,%r20,%r20 + copy %r19,%r26 + ldw 0(%r20),%r25 + .CALL ARGW0=GR,ARGW1=GR + bl strcpy,%r2 + nop + ldw 8(%r4),%r26 + copy %r0,%r25 + copy %r0,%r24 + .CALL ARGW0=GR,ARGW1=GR,ARGW2=GR + bl lookup_typename,%r2 + nop + bl,n L$0085,%r0 +L$0085: + ldw 16(%r4),%r6 + ldw 20(%r4),%r5 + ldo 8(%r4),%r30 + ldw -28(%r30),%r2 + bv %r0(%r2) + ldwm -8(%r30),%r4 + .EXIT + .PROCEND + .align 4 +LC$0005: + .STRING "signed \x00" + .align 4 + .EXPORT lookup_signed_typename,CODE + .EXPORT lookup_signed_typename,ENTRY,PRIV_LEV=3,ARGW0=GR,RTNVAL=GR +lookup_signed_typename: + .PROC + .CALLINFO FRAME=128,CALLS,SAVE_RP + .ENTRY + stw %r2,-20(%r30) + copy %r4,%r1 + copy %r30,%r4 + stwm %r1,128(%r30) + stw %r6,16(%r4) + stw %r5,20(%r4) + ldo -4(%r0),%r5 + ldo -32(%r4),%r19 + add %r19,%r5,%r6 + stw %r26,0(%r6) + ldo -4(%r0),%r19 + ldo -32(%r4),%r20 + add %r20,%r19,%r19 + ldw 0(%r19),%r26 + .CALL ARGW0=GR + bl strlen,%r2 + nop + copy %r28,%r19 + ldo 8(%r19),%r20 + ldo 7(%r20),%r21 + copy %r21,%r19 + ldo 63(%r19),%r20 + extru %r20,25,26,%r19 + zdep %r19,25,26,%r20 + ldo -96(%r30),%r19 + add %r30,%r20,%r30 + ldo 7(%r19),%r20 + extru %r20,28,29,%r19 + zdep %r19,28,29,%r20 + stw %r20,12(%r4) + ldw 12(%r4),%r26 + ldil L'LC$0005,%r25 + ldo R'LC$0005(%r25),%r25 + .CALL ARGW0=GR,ARGW1=GR + bl strcpy,%r2 + nop + ldw 12(%r4),%r20 + ldo 7(%r20),%r19 + ldo -4(%r0),%r20 + ldo -32(%r4),%r21 + add %r21,%r20,%r20 + copy %r19,%r26 + ldw 0(%r20),%r25 + .CALL ARGW0=GR,ARGW1=GR + bl strcpy,%r2 + nop + ldw 12(%r4),%r26 + copy %r0,%r25 + ldo 1(%r0),%r24 + .CALL ARGW0=GR,ARGW1=GR,ARGW2=GR + bl lookup_typename,%r2 + nop + stw %r28,8(%r4) + ldw 8(%r4),%r19 + comiclr,<> 0,%r19,%r0 + bl L$0087,%r0 + nop + ldw 8(%r4),%r28 + bl,n L$0086,%r0 +L$0087: + ldo -4(%r0),%r19 + ldo -32(%r4),%r20 + add %r20,%r19,%r19 + ldw 0(%r19),%r26 + copy %r0,%r25 + copy %r0,%r24 + .CALL ARGW0=GR,ARGW1=GR,ARGW2=GR + bl lookup_typename,%r2 + nop + bl,n L$0086,%r0 +L$0086: + ldw 16(%r4),%r6 + ldw 20(%r4),%r5 + ldo 8(%r4),%r30 + ldw -28(%r30),%r2 + bv %r0(%r2) + ldwm -8(%r30),%r4 + .EXIT + .PROCEND + .align 4 +LC$0006: + .STRING "No struct type named %s.\x00" + .align 4 +LC$0007: + .STRING "This context has class, union or enum %s, not a struct.\x00" + .align 4 + .EXPORT lookup_struct,CODE + .EXPORT lookup_struct,ENTRY,PRIV_LEV=3,ARGW0=GR,ARGW1=GR,RTNVAL=GR +lookup_struct: + .PROC + .CALLINFO FRAME=128,CALLS,SAVE_RP + .ENTRY + stw %r2,-20(%r30) + copy %r4,%r1 + copy %r30,%r4 + stwm %r1,128(%r30) + stw %r9,8(%r4) + stw %r8,12(%r4) + stw %r7,16(%r4) + stw %r6,20(%r4) + stw %r5,24(%r4) + ldo -4(%r0),%r5 + ldo -32(%r4),%r19 + add %r19,%r5,%r6 + stw %r26,0(%r6) + ldo -8(%r0),%r7 + ldo -32(%r4),%r19 + add %r19,%r7,%r8 + stw %r25,0(%r8) + ldo -4(%r0),%r19 + ldo -32(%r4),%r20 + add %r20,%r19,%r19 + ldo -8(%r0),%r20 + ldo -32(%r4),%r21 + add %r21,%r20,%r20 + stw %r0,-52(%r30) + ldw 0(%r19),%r26 + ldw 0(%r20),%r25 + ldo 2(%r0),%r24 + copy %r0,%r23 + .CALL ARGW0=GR,ARGW1=GR,ARGW2=GR,ARGW3=GR + bl lookup_symbol,%r2 + nop + copy %r28,%r9 + comiclr,= 0,%r9,%r0 + bl L$0089,%r0 + nop + ldo -4(%r0),%r19 + ldo -32(%r4),%r20 + add %r20,%r19,%r19 + ldil L'LC$0006,%r26 + ldo R'LC$0006(%r26),%r26 + ldw 0(%r19),%r25 + .CALL ARGW0=GR,ARGW1=GR + bl error,%r2 + nop +L$0089: + ldw 12(%r9),%r19 + ldw 0(%r19),%r20 + comiclr,<> 3,%r20,%r0 + bl L$0090,%r0 + nop + ldo -4(%r0),%r19 + ldo -32(%r4),%r20 + add %r20,%r19,%r19 + ldil L'LC$0007,%r26 + ldo R'LC$0007(%r26),%r26 + ldw 0(%r19),%r25 + .CALL ARGW0=GR,ARGW1=GR + bl error,%r2 + nop +L$0090: + ldw 12(%r9),%r28 + bl,n L$0088,%r0 +L$0088: + ldw 8(%r4),%r9 + ldw 12(%r4),%r8 + ldw 16(%r4),%r7 + ldw 20(%r4),%r6 + ldw 24(%r4),%r5 + ldo 8(%r4),%r30 + ldw -28(%r30),%r2 + bv %r0(%r2) + ldwm -8(%r30),%r4 + .EXIT + .PROCEND + .align 4 +LC$0008: + .STRING "No union type named %s.\x00" + .align 4 +LC$0009: + .STRING "This context has class, struct or enum %s, not a union.\x00" + .align 4 + .EXPORT lookup_union,CODE + .EXPORT lookup_union,ENTRY,PRIV_LEV=3,ARGW0=GR,ARGW1=GR,RTNVAL=GR +lookup_union: + .PROC + .CALLINFO FRAME=128,CALLS,SAVE_RP + .ENTRY + stw %r2,-20(%r30) + copy %r4,%r1 + copy %r30,%r4 + stwm %r1,128(%r30) + stw %r9,8(%r4) + stw %r8,12(%r4) + stw %r7,16(%r4) + stw %r6,20(%r4) + stw %r5,24(%r4) + ldo -4(%r0),%r5 + ldo -32(%r4),%r19 + add %r19,%r5,%r6 + stw %r26,0(%r6) + ldo -8(%r0),%r7 + ldo -32(%r4),%r19 + add %r19,%r7,%r8 + stw %r25,0(%r8) + ldo -4(%r0),%r19 + ldo -32(%r4),%r20 + add %r20,%r19,%r19 + ldo -8(%r0),%r20 + ldo -32(%r4),%r21 + add %r21,%r20,%r20 + stw %r0,-52(%r30) + ldw 0(%r19),%r26 + ldw 0(%r20),%r25 + ldo 2(%r0),%r24 + copy %r0,%r23 + .CALL ARGW0=GR,ARGW1=GR,ARGW2=GR,ARGW3=GR + bl lookup_symbol,%r2 + nop + copy %r28,%r9 + comiclr,= 0,%r9,%r0 + bl L$0092,%r0 + nop + ldo -4(%r0),%r19 + ldo -32(%r4),%r20 + add %r20,%r19,%r19 + ldil L'LC$0008,%r26 + ldo R'LC$0008(%r26),%r26 + ldw 0(%r19),%r25 + .CALL ARGW0=GR,ARGW1=GR + bl error,%r2 + nop +L$0092: + ldw 12(%r9),%r19 + ldw 0(%r19),%r20 + comiclr,<> 4,%r20,%r0 + bl L$0093,%r0 + nop + ldo -4(%r0),%r19 + ldo -32(%r4),%r20 + add %r20,%r19,%r19 + ldil L'LC$0009,%r26 + ldo R'LC$0009(%r26),%r26 + ldw 0(%r19),%r25 + .CALL ARGW0=GR,ARGW1=GR + bl error,%r2 + nop +L$0093: + ldw 12(%r9),%r28 + bl,n L$0091,%r0 +L$0091: + ldw 8(%r4),%r9 + ldw 12(%r4),%r8 + ldw 16(%r4),%r7 + ldw 20(%r4),%r6 + ldw 24(%r4),%r5 + ldo 8(%r4),%r30 + ldw -28(%r30),%r2 + bv %r0(%r2) + ldwm -8(%r30),%r4 + .EXIT + .PROCEND + .align 4 +LC$0010: + .STRING "No enum type named %s.\x00" + .align 4 +LC$0011: + .STRING "This context has class, struct or union %s, not an enum.\x00" + .align 4 + .EXPORT lookup_enum,CODE + .EXPORT lookup_enum,ENTRY,PRIV_LEV=3,ARGW0=GR,ARGW1=GR,RTNVAL=GR +lookup_enum: + .PROC + .CALLINFO FRAME=128,CALLS,SAVE_RP + .ENTRY + stw %r2,-20(%r30) + copy %r4,%r1 + copy %r30,%r4 + stwm %r1,128(%r30) + stw %r9,8(%r4) + stw %r8,12(%r4) + stw %r7,16(%r4) + stw %r6,20(%r4) + stw %r5,24(%r4) + ldo -4(%r0),%r5 + ldo -32(%r4),%r19 + add %r19,%r5,%r6 + stw %r26,0(%r6) + ldo -8(%r0),%r7 + ldo -32(%r4),%r19 + add %r19,%r7,%r8 + stw %r25,0(%r8) + ldo -4(%r0),%r19 + ldo -32(%r4),%r20 + add %r20,%r19,%r19 + ldo -8(%r0),%r20 + ldo -32(%r4),%r21 + add %r21,%r20,%r20 + stw %r0,-52(%r30) + ldw 0(%r19),%r26 + ldw 0(%r20),%r25 + ldo 2(%r0),%r24 + copy %r0,%r23 + .CALL ARGW0=GR,ARGW1=GR,ARGW2=GR,ARGW3=GR + bl lookup_symbol,%r2 + nop + copy %r28,%r9 + comiclr,= 0,%r9,%r0 + bl L$0095,%r0 + nop + ldo -4(%r0),%r19 + ldo -32(%r4),%r20 + add %r20,%r19,%r19 + ldil L'LC$0010,%r26 + ldo R'LC$0010(%r26),%r26 + ldw 0(%r19),%r25 + .CALL ARGW0=GR,ARGW1=GR + bl error,%r2 + nop +L$0095: + ldw 12(%r9),%r19 + ldw 0(%r19),%r20 + comiclr,<> 5,%r20,%r0 + bl L$0096,%r0 + nop + ldo -4(%r0),%r19 + ldo -32(%r4),%r20 + add %r20,%r19,%r19 + ldil L'LC$0011,%r26 + ldo R'LC$0011(%r26),%r26 + ldw 0(%r19),%r25 + .CALL ARGW0=GR,ARGW1=GR + bl error,%r2 + nop +L$0096: + ldw 12(%r9),%r28 + bl,n L$0094,%r0 +L$0094: + ldw 8(%r4),%r9 + ldw 12(%r4),%r8 + ldw 16(%r4),%r7 + ldw 20(%r4),%r6 + ldw 24(%r4),%r5 + ldo 8(%r4),%r30 + ldw -28(%r30),%r2 + bv %r0(%r2) + ldwm -8(%r30),%r4 + .EXIT + .PROCEND + .IMPORT strcat,CODE + .align 4 +LC$0012: + .STRING "<\x00" + .align 4 +LC$0013: + .STRING " >\x00" + .align 4 +LC$0014: + .STRING "No template type named %s.\x00" + .align 4 + .EXPORT lookup_template_type,CODE + .EXPORT lookup_template_type,ENTRY,PRIV_LEV=3,ARGW0=GR,ARGW1=GR,ARGW2=GR,RTNVAL=GR +lookup_template_type: + .PROC + .CALLINFO FRAME=192,CALLS,SAVE_RP + .ENTRY + stw %r2,-20(%r30) + copy %r4,%r1 + copy %r30,%r4 + stwm %r1,192(%r30) + stw %r11,16(%r4) + stw %r10,20(%r4) + stw %r9,24(%r4) + stw %r8,28(%r4) + stw %r7,32(%r4) + stw %r6,36(%r4) + stw %r5,40(%r4) + ldo -4(%r0),%r5 + ldo -32(%r4),%r19 + add %r19,%r5,%r6 + stw %r26,0(%r6) + ldo -8(%r0),%r7 + ldo -32(%r4),%r19 + add %r19,%r7,%r8 + stw %r25,0(%r8) + ldo -12(%r0),%r9 + ldo -32(%r4),%r19 + add %r19,%r9,%r10 + stw %r24,0(%r10) + ldo -4(%r0),%r19 + ldo -32(%r4),%r20 + add %r20,%r19,%r19 + ldw 0(%r19),%r26 + .CALL ARGW0=GR + bl strlen,%r2 + nop + copy %r28,%r11 + ldo -8(%r0),%r19 + ldo -32(%r4),%r21 + add %r21,%r19,%r20 + ldw 0(%r20),%r19 + ldw 4(%r19),%r26 + .CALL ARGW0=GR + bl strlen,%r2 + nop + copy %r28,%r19 + add %r11,%r19,%r20 + ldo 4(%r20),%r19 + ldo 7(%r19),%r20 + copy %r20,%r19 + ldo 63(%r19),%r20 + extru %r20,25,26,%r19 + zdep %r19,25,26,%r20 + ldo -96(%r30),%r19 + add %r30,%r20,%r30 + ldo 7(%r19),%r20 + extru %r20,28,29,%r19 + zdep %r19,28,29,%r20 + stw %r20,12(%r4) + ldo -4(%r0),%r19 + ldo -32(%r4),%r20 + add %r20,%r19,%r19 + ldw 12(%r4),%r26 + ldw 0(%r19),%r25 + .CALL ARGW0=GR,ARGW1=GR + bl strcpy,%r2 + nop + ldw 12(%r4),%r26 + ldil L'LC$0012,%r25 + ldo R'LC$0012(%r25),%r25 + .CALL ARGW0=GR,ARGW1=GR + bl strcat,%r2 + nop + ldo -8(%r0),%r19 + ldo -32(%r4),%r21 + add %r21,%r19,%r20 + ldw 0(%r20),%r19 + ldw 12(%r4),%r26 + ldw 4(%r19),%r25 + .CALL ARGW0=GR,ARGW1=GR + bl strcat,%r2 + nop + ldw 12(%r4),%r26 + ldil L'LC$0013,%r25 + ldo R'LC$0013(%r25),%r25 + .CALL ARGW0=GR,ARGW1=GR + bl strcat,%r2 + nop + ldo -12(%r0),%r19 + ldo -32(%r4),%r20 + add %r20,%r19,%r19 + stw %r0,-52(%r30) + ldw 12(%r4),%r26 + ldw 0(%r19),%r25 + ldo 1(%r0),%r24 + copy %r0,%r23 + .CALL ARGW0=GR,ARGW1=GR,ARGW2=GR,ARGW3=GR + bl lookup_symbol,%r2 + nop + stw %r28,8(%r4) + ldw 8(%r4),%r19 + comiclr,= 0,%r19,%r0 + bl L$0098,%r0 + nop + ldo -4(%r0),%r19 + ldo -32(%r4),%r20 + add %r20,%r19,%r19 + ldil L'LC$0014,%r26 + ldo R'LC$0014(%r26),%r26 + ldw 0(%r19),%r25 + .CALL ARGW0=GR,ARGW1=GR + bl error,%r2 + nop +L$0098: + ldw 8(%r4),%r19 + ldw 12(%r19),%r20 + ldw 0(%r20),%r19 + comiclr,<> 3,%r19,%r0 + bl L$0099,%r0 + nop + ldo -4(%r0),%r19 + ldo -32(%r4),%r20 + add %r20,%r19,%r19 + ldil L'LC$0007,%r26 + ldo R'LC$0007(%r26),%r26 + ldw 0(%r19),%r25 + .CALL ARGW0=GR,ARGW1=GR + bl error,%r2 + nop +L$0099: + ldw 8(%r4),%r19 + ldw 12(%r19),%r28 + bl,n L$0097,%r0 +L$0097: + ldw 16(%r4),%r11 + ldw 20(%r4),%r10 + ldw 24(%r4),%r9 + ldw 28(%r4),%r8 + ldw 32(%r4),%r7 + ldw 36(%r4),%r6 + ldw 40(%r4),%r5 + ldo 8(%r4),%r30 + ldw -28(%r30),%r2 + bv %r0(%r2) + ldwm -8(%r30),%r4 + .EXIT + .PROCEND + .IMPORT current_target,DATA + .IMPORT fflush,CODE + .IMPORT __iob,DATA + .IMPORT fprintf,CODE + .align 4 +LC$0015: + .STRING "Type \x00" + .IMPORT type_print,CODE + .align 4 +LC$0016: + .STRING "\x00" + .align 4 +LC$0017: + .STRING " is not a structure or union type.\x00" + .IMPORT check_stub_type,CODE + .align 4 +LC$0018: + .STRING " has no component named \x00" + .IMPORT fputs_filtered,CODE + .align 4 +LC$0019: + .STRING ".\x00" + .align 4 + .EXPORT lookup_struct_elt_type,CODE + .EXPORT lookup_struct_elt_type,ENTRY,PRIV_LEV=3,ARGW0=GR,ARGW1=GR,ARGW2=GR,RTNVAL=GR +lookup_struct_elt_type: + .PROC + .CALLINFO FRAME=192,CALLS,SAVE_RP + .ENTRY + stw %r2,-20(%r30) + copy %r4,%r1 + copy %r30,%r4 + stwm %r1,192(%r30) + stw %r11,24(%r4) + stw %r10,28(%r4) + stw %r9,32(%r4) + stw %r8,36(%r4) + stw %r7,40(%r4) + stw %r6,44(%r4) + stw %r5,48(%r4) + ldo -4(%r0),%r5 + ldo -32(%r4),%r19 + add %r19,%r5,%r6 + stw %r26,0(%r6) + ldo -8(%r0),%r7 + ldo -32(%r4),%r19 + add %r19,%r7,%r8 + stw %r25,0(%r8) + ldo -12(%r0),%r9 + ldo -32(%r4),%r19 + add %r19,%r9,%r10 + stw %r24,0(%r10) + ldo -4(%r0),%r19 + ldo -32(%r4),%r21 + add %r21,%r19,%r20 + ldw 0(%r20),%r19 + ldw 0(%r19),%r20 + comiclr,<> 1,%r20,%r0 + bl L$0102,%r0 + nop + ldo -4(%r0),%r19 + ldo -32(%r4),%r21 + add %r21,%r19,%r20 + ldw 0(%r20),%r19 + ldw 0(%r19),%r20 + ldo 16(%r0),%r19 + comclr,<> %r20,%r19,%r0 + bl L$0102,%r0 + nop + bl,n L$0101,%r0 +L$0102: + ldo -4(%r0),%r19 + ldo -32(%r4),%r20 + add %r20,%r19,%r19 + ldo -4(%r0),%r20 + ldo -32(%r4),%r22 + add %r22,%r20,%r21 + ldw 0(%r21),%r20 + ldw 16(%r20),%r21 + stw %r21,0(%r19) +L$0101: + ldo -4(%r0),%r19 + ldo -32(%r4),%r21 + add %r21,%r19,%r20 + ldw 0(%r20),%r19 + ldw 0(%r19),%r20 + comiclr,<> 3,%r20,%r0 + bl L$0103,%r0 + nop + ldo -4(%r0),%r19 + ldo -32(%r4),%r21 + add %r21,%r19,%r20 + ldw 0(%r20),%r19 + ldw 0(%r19),%r20 + comiclr,<> 4,%r20,%r0 + bl L$0103,%r0 + nop + addil L'current_target-$global$,%r27 + ldw R'current_target-$global$(%r1),%r19 + ldw 76(%r19),%r11 + copy %r11,%r22 + .CALL ARGW0=GR + bl $$dyncall,%r31 + copy %r31,%r2 + addil L'__iob-$global$+16,%r27 + ldo R'__iob-$global$+16(%r1),%r26 + .CALL ARGW0=GR + bl fflush,%r2 + nop + addil L'__iob-$global$+32,%r27 + ldo R'__iob-$global$+32(%r1),%r26 + ldil L'LC$0015,%r25 + ldo R'LC$0015(%r25),%r25 + .CALL ARGW0=GR,ARGW1=GR + bl fprintf,%r2 + nop + ldo -4(%r0),%r19 + ldo -32(%r4),%r20 + add %r20,%r19,%r19 + ldw 0(%r19),%r26 + ldil L'LC$0016,%r25 + ldo R'LC$0016(%r25),%r25 + addil L'__iob-$global$+32,%r27 + ldo R'__iob-$global$+32(%r1),%r24 + ldo -1(%r0),%r23 + .CALL ARGW0=GR,ARGW1=GR,ARGW2=GR,ARGW3=GR + bl type_print,%r2 + nop + ldil L'LC$0017,%r26 + ldo R'LC$0017(%r26),%r26 + .CALL ARGW0=GR + bl error,%r2 + nop +L$0103: + ldo -4(%r0),%r19 + ldo -32(%r4),%r20 + add %r20,%r19,%r19 + ldw 0(%r19),%r26 + .CALL ARGW0=GR + bl check_stub_type,%r2 + nop + ldo -4(%r0),%r19 + ldo -32(%r4),%r21 + add %r21,%r19,%r20 + ldw 0(%r20),%r19 + ldh 34(%r19),%r20 + extrs %r20,31,16,%r19 + ldo -1(%r19),%r20 + stw %r20,8(%r4) +L$0104: + ldo -4(%r0),%r19 + ldo -32(%r4),%r21 + add %r21,%r19,%r20 + ldw 0(%r20),%r19 + ldw 48(%r19),%r20 + ldh 0(%r20),%r21 + extrs %r21,31,16,%r19 + ldw 8(%r4),%r20 + comclr,>= %r20,%r19,%r0 + bl L$0105,%r0 + nop + ldo -4(%r0),%r19 + ldo -32(%r4),%r21 + add %r21,%r19,%r20 + ldw 0(%r20),%r19 + ldw 8(%r4),%r20 + zdep %r20,27,28,%r21 + ldw 36(%r19),%r20 + add %r21,%r20,%r19 + ldw 12(%r19),%r20 + stw %r20,12(%r4) + ldw 12(%r4),%r19 + comiclr,<> 0,%r19,%r0 + bl L$0107,%r0 + nop + ldo -8(%r0),%r19 + ldo -32(%r4),%r20 + add %r20,%r19,%r19 + ldw 12(%r4),%r26 + ldw 0(%r19),%r25 + .CALL ARGW0=GR,ARGW1=GR + bl strcmp,%r2 + nop + copy %r28,%r19 + comiclr,= 0,%r19,%r0 + bl L$0107,%r0 + nop + ldo -4(%r0),%r19 + ldo -32(%r4),%r21 + add %r21,%r19,%r20 + ldw 0(%r20),%r19 + ldw 8(%r4),%r20 + zdep %r20,27,28,%r21 + ldw 36(%r19),%r20 + add %r21,%r20,%r19 + ldw 8(%r19),%r28 + bl,n L$0100,%r0 +L$0107: +L$0106: + ldw 8(%r4),%r19 + ldo -1(%r19),%r20 + stw %r20,8(%r4) + bl,n L$0104,%r0 +L$0105: + nop + ldo -4(%r0),%r19 + ldo -32(%r4),%r21 + add %r21,%r19,%r20 + ldw 0(%r20),%r19 + ldw 48(%r19),%r20 + ldh 0(%r20),%r21 + extrs %r21,31,16,%r19 + ldo -1(%r19),%r20 + stw %r20,8(%r4) +L$0108: + ldw 8(%r4),%r19 + comiclr,<= 0,%r19,%r0 + bl L$0109,%r0 + nop + ldo -4(%r0),%r19 + ldo -32(%r4),%r21 + add %r21,%r19,%r20 + ldw 0(%r20),%r19 + ldw 8(%r4),%r20 + zdep %r20,27,28,%r21 + ldw 36(%r19),%r20 + add %r21,%r20,%r19 + ldo -8(%r0),%r20 + ldo -32(%r4),%r21 + add %r21,%r20,%r20 + ldw 8(%r19),%r26 + ldw 0(%r20),%r25 + copy %r0,%r24 + .CALL ARGW0=GR,ARGW1=GR,ARGW2=GR + bl lookup_struct_elt_type,%r2 + nop + stw %r28,16(%r4) + ldw 16(%r4),%r19 + comiclr,<> 0,%r19,%r0 + bl L$0111,%r0 + nop + ldw 16(%r4),%r28 + bl,n L$0100,%r0 +L$0111: +L$0110: + ldw 8(%r4),%r19 + ldo -1(%r19),%r20 + stw %r20,8(%r4) + bl,n L$0108,%r0 +L$0109: + ldo -12(%r0),%r19 + ldo -32(%r4),%r20 + add %r20,%r19,%r19 + ldw 0(%r19),%r20 + comiclr,<> 0,%r20,%r0 + bl L$0112,%r0 + nop + copy %r0,%r28 + bl,n L$0100,%r0 +L$0112: + addil L'current_target-$global$,%r27 + ldw R'current_target-$global$(%r1),%r19 + ldw 76(%r19),%r11 + copy %r11,%r22 + .CALL ARGW0=GR + bl $$dyncall,%r31 + copy %r31,%r2 + addil L'__iob-$global$+16,%r27 + ldo R'__iob-$global$+16(%r1),%r26 + .CALL ARGW0=GR + bl fflush,%r2 + nop + addil L'__iob-$global$+32,%r27 + ldo R'__iob-$global$+32(%r1),%r26 + ldil L'LC$0015,%r25 + ldo R'LC$0015(%r25),%r25 + .CALL ARGW0=GR,ARGW1=GR + bl fprintf,%r2 + nop + ldo -4(%r0),%r19 + ldo -32(%r4),%r20 + add %r20,%r19,%r19 + ldw 0(%r19),%r26 + ldil L'LC$0016,%r25 + ldo R'LC$0016(%r25),%r25 + addil L'__iob-$global$+32,%r27 + ldo R'__iob-$global$+32(%r1),%r24 + ldo -1(%r0),%r23 + .CALL ARGW0=GR,ARGW1=GR,ARGW2=GR,ARGW3=GR + bl type_print,%r2 + nop + addil L'__iob-$global$+32,%r27 + ldo R'__iob-$global$+32(%r1),%r26 + ldil L'LC$0018,%r25 + ldo R'LC$0018(%r25),%r25 + .CALL ARGW0=GR,ARGW1=GR + bl fprintf,%r2 + nop + ldo -8(%r0),%r19 + ldo -32(%r4),%r20 + add %r20,%r19,%r19 + ldw 0(%r19),%r26 + addil L'__iob-$global$+32,%r27 + ldo R'__iob-$global$+32(%r1),%r25 + .CALL ARGW0=GR,ARGW1=GR + bl fputs_filtered,%r2 + nop + ldil L'LC$0019,%r26 + ldo R'LC$0019(%r26),%r26 + .CALL ARGW0=GR + bl error,%r2 + nop + ldo -1(%r0),%r28 + bl,n L$0100,%r0 +L$0100: + ldw 24(%r4),%r11 + ldw 28(%r4),%r10 + ldw 32(%r4),%r9 + ldw 36(%r4),%r8 + ldw 40(%r4),%r7 + ldw 44(%r4),%r6 + ldw 48(%r4),%r5 + ldo 8(%r4),%r30 + ldw -28(%r30),%r2 + bv %r0(%r2) + ldwm -8(%r30),%r4 + .EXIT + .PROCEND + .align 4 + .EXPORT fill_in_vptr_fieldno,CODE + .EXPORT fill_in_vptr_fieldno,ENTRY,PRIV_LEV=3,ARGW0=GR +fill_in_vptr_fieldno: + .PROC + .CALLINFO FRAME=128,CALLS,SAVE_RP + .ENTRY + stw %r2,-20(%r30) + copy %r4,%r1 + copy %r30,%r4 + stwm %r1,128(%r30) + stw %r6,16(%r4) + stw %r5,20(%r4) + ldo -4(%r0),%r5 + ldo -32(%r4),%r19 + add %r19,%r5,%r6 + stw %r26,0(%r6) + ldo -4(%r0),%r19 + ldo -32(%r4),%r21 + add %r21,%r19,%r20 + ldw 0(%r20),%r19 + ldw 44(%r19),%r20 + comiclr,> 0,%r20,%r0 + bl L$0114,%r0 + nop + ldo 1(%r0),%r19 + stw %r19,8(%r4) +L$0115: + ldo -4(%r0),%r19 + ldo -32(%r4),%r21 + add %r21,%r19,%r20 + ldw 0(%r20),%r19 + ldw 48(%r19),%r20 + ldh 0(%r20),%r21 + extrs %r21,31,16,%r19 + ldw 8(%r4),%r20 + comclr,< %r20,%r19,%r0 + bl L$0116,%r0 + nop + ldo -4(%r0),%r19 + ldo -32(%r4),%r21 + add %r21,%r19,%r20 + ldw 0(%r20),%r19 + ldw 8(%r4),%r20 + zdep %r20,27,28,%r21 + ldw 36(%r19),%r20 + add %r21,%r20,%r19 + ldw 8(%r19),%r26 + .CALL ARGW0=GR + bl fill_in_vptr_fieldno,%r2 + nop + ldo -4(%r0),%r19 + ldo -32(%r4),%r21 + add %r21,%r19,%r20 + ldw 0(%r20),%r19 + ldw 8(%r4),%r20 + zdep %r20,27,28,%r21 + ldw 36(%r19),%r20 + add %r21,%r20,%r19 + ldw 8(%r19),%r20 + ldw 44(%r20),%r19 + comiclr,<= 0,%r19,%r0 + bl L$0118,%r0 + nop + ldo -4(%r0),%r19 + ldo -32(%r4),%r21 + add %r21,%r19,%r20 + ldw 0(%r20),%r19 + ldo -4(%r0),%r20 + ldo -32(%r4),%r22 + add %r22,%r20,%r21 + ldw 0(%r21),%r20 + ldw 8(%r4),%r21 + zdep %r21,27,28,%r22 + ldw 36(%r20),%r21 + add %r22,%r21,%r20 + ldw 8(%r20),%r21 + ldw 44(%r21),%r20 + stw %r20,44(%r19) + ldo -4(%r0),%r19 + ldo -32(%r4),%r21 + add %r21,%r19,%r20 + ldw 0(%r20),%r19 + ldo -4(%r0),%r20 + ldo -32(%r4),%r22 + add %r22,%r20,%r21 + ldw 0(%r21),%r20 + ldw 8(%r4),%r21 + zdep %r21,27,28,%r22 + ldw 36(%r20),%r21 + add %r22,%r21,%r20 + ldw 8(%r20),%r21 + ldw 40(%r21),%r20 + stw %r20,40(%r19) + bl,n L$0116,%r0 +L$0118: +L$0117: + ldw 8(%r4),%r19 + ldo 1(%r19),%r20 + stw %r20,8(%r4) + bl,n L$0115,%r0 +L$0116: +L$0114: +L$0113: + ldw 16(%r4),%r6 + ldw 20(%r4),%r5 + ldo 8(%r4),%r30 + ldw -28(%r30),%r2 + bv %r0(%r2) + ldwm -8(%r30),%r4 + .EXIT + .PROCEND + .EXPORT stub_noname_complaint,DATA + .align 4 +LC$0020: + .STRING "stub type has NULL name\x00" + .SPACE $PRIVATE$ + .SUBSPA $DATA$ + + .align 4 +stub_noname_complaint: + .word LC$0020 + .word 0 + .word 0 + .IMPORT complain,CODE + .IMPORT memcpy,CODE + .SPACE $TEXT$ + .SUBSPA $CODE$ + + .align 4 + .EXPORT check_stub_type,CODE + .EXPORT check_stub_type,ENTRY,PRIV_LEV=3,ARGW0=GR +check_stub_type: + .PROC + .CALLINFO FRAME=128,CALLS,SAVE_RP + .ENTRY + stw %r2,-20(%r30) + copy %r4,%r1 + copy %r30,%r4 + stwm %r1,128(%r30) + stw %r6,16(%r4) + stw %r5,20(%r4) + ldo -4(%r0),%r5 + ldo -32(%r4),%r19 + add %r19,%r5,%r6 + stw %r26,0(%r6) + ldo -4(%r0),%r19 + ldo -32(%r4),%r21 + add %r21,%r19,%r20 + ldw 0(%r20),%r19 + ldh 32(%r19),%r20 + ldo 4(%r0),%r21 + and %r20,%r21,%r19 + extrs %r19,31,16,%r20 + comiclr,<> 0,%r20,%r0 + bl L$0120,%r0 + nop + ldo -4(%r0),%r19 + ldo -32(%r4),%r20 + add %r20,%r19,%r19 + ldw 0(%r19),%r26 + .CALL ARGW0=GR + bl type_name_no_tag,%r2 + nop + stw %r28,8(%r4) + ldw 8(%r4),%r19 + comiclr,= 0,%r19,%r0 + bl L$0121,%r0 + nop + addil L'stub_noname_complaint-$global$,%r27 + ldo R'stub_noname_complaint-$global$(%r1),%r26 + copy %r0,%r25 + .CALL ARGW0=GR,ARGW1=GR + bl complain,%r2 + nop + bl,n L$0119,%r0 +L$0121: + stw %r0,-52(%r30) + ldw 8(%r4),%r26 + copy %r0,%r25 + ldo 2(%r0),%r24 + copy %r0,%r23 + .CALL ARGW0=GR,ARGW1=GR,ARGW2=GR,ARGW3=GR + bl lookup_symbol,%r2 + nop + stw %r28,12(%r4) + ldw 12(%r4),%r19 + comiclr,<> 0,%r19,%r0 + bl L$0122,%r0 + nop + ldo -4(%r0),%r19 + ldo -32(%r4),%r20 + add %r20,%r19,%r19 + ldw 12(%r4),%r20 + ldw 0(%r19),%r26 + ldw 12(%r20),%r25 + ldo 52(%r0),%r24 + .CALL ARGW0=GR,ARGW1=GR,ARGW2=GR + bl memcpy,%r2 + nop +L$0122: +L$0120: +L$0119: + ldw 16(%r4),%r6 + ldw 20(%r4),%r5 + ldo 8(%r4),%r30 + ldw -28(%r30),%r2 + bv %r0(%r2) + ldwm -8(%r30),%r4 + .EXIT + .PROCEND + .IMPORT gdb_mangle_name,CODE + .IMPORT cplus_demangle,CODE + .align 4 +LC$0021: + .STRING "Internal: Cannot demangle mangled name `%s'.\x00" + .IMPORT strchr,CODE + .IMPORT parse_and_eval_type,CODE + .IMPORT builtin_type_void,DATA + .IMPORT free,CODE + .align 4 + .EXPORT check_stub_method,CODE + .EXPORT check_stub_method,ENTRY,PRIV_LEV=3,ARGW0=GR,ARGW1=GR,ARGW2=GR +check_stub_method: + .PROC + .CALLINFO FRAME=192,CALLS,SAVE_RP + .ENTRY + stw %r2,-20(%r30) + copy %r4,%r1 + copy %r30,%r4 + stwm %r1,192(%r30) + stw %r11,64(%r4) + stw %r10,68(%r4) + stw %r9,72(%r4) + stw %r8,76(%r4) + stw %r7,80(%r4) + stw %r6,84(%r4) + stw %r5,88(%r4) + ldo -4(%r0),%r5 + ldo -32(%r4),%r19 + add %r19,%r5,%r6 + stw %r26,0(%r6) + ldo -8(%r0),%r7 + ldo -32(%r4),%r19 + add %r19,%r7,%r8 + stw %r25,0(%r8) + ldo -12(%r0),%r9 + ldo -32(%r4),%r19 + add %r19,%r9,%r10 + stw %r24,0(%r10) + ldo -4(%r0),%r19 + ldo -32(%r4),%r20 + add %r20,%r19,%r19 + ldo -8(%r0),%r20 + ldo -32(%r4),%r21 + add %r21,%r20,%r20 + ldo -12(%r0),%r21 + ldo -32(%r4),%r22 + add %r22,%r21,%r21 + ldw 0(%r19),%r26 + ldw 0(%r20),%r25 + ldw 0(%r21),%r24 + .CALL ARGW0=GR,ARGW1=GR,ARGW2=GR + bl gdb_mangle_name,%r2 + nop + stw %r28,12(%r4) + ldw 12(%r4),%r26 + ldo 3(%r0),%r25 + .CALL ARGW0=GR,ARGW1=GR + bl cplus_demangle,%r2 + nop + stw %r28,16(%r4) + stw %r0,28(%r4) + ldo 1(%r0),%r19 + stw %r19,32(%r4) + ldw 16(%r4),%r19 + comiclr,= 0,%r19,%r0 + bl L$0124,%r0 + nop + ldil L'LC$0021,%r26 + ldo R'LC$0021(%r26),%r26 + ldw 12(%r4),%r25 + .CALL ARGW0=GR,ARGW1=GR + bl error,%r2 + nop +L$0124: + ldw 16(%r4),%r26 + ldo 40(%r0),%r25 + .CALL ARGW0=GR,ARGW1=GR + bl strchr,%r2 + nop + copy %r28,%r19 + ldo 1(%r19),%r20 + stw %r20,20(%r4) + ldw 20(%r4),%r19 + stw %r19,24(%r4) +L$0125: + ldw 24(%r4),%r19 + ldb 0(%r19),%r20 + extrs %r20,31,8,%r19 + comiclr,<> 0,%r19,%r0 + bl L$0126,%r0 + nop + ldw 24(%r4),%r19 + ldb 0(%r19),%r20 + extrs %r20,31,8,%r19 + ldo 40(%r0),%r20 + comclr,= %r19,%r20,%r0 + bl L$0127,%r0 + nop + ldw 28(%r4),%r19 + ldo 1(%r19),%r20 + stw %r20,28(%r4) + bl,n L$0128,%r0 +L$0127: + ldw 24(%r4),%r19 + ldb 0(%r19),%r20 + extrs %r20,31,8,%r19 + ldo 41(%r0),%r20 + comclr,= %r19,%r20,%r0 + bl L$0129,%r0 + nop + ldw 28(%r4),%r19 + ldo -1(%r19),%r20 + stw %r20,28(%r4) + bl,n L$0130,%r0 +L$0129: + ldw 24(%r4),%r19 + ldb 0(%r19),%r20 + extrs %r20,31,8,%r19 + ldo 44(%r0),%r20 + comclr,= %r19,%r20,%r0 + bl L$0131,%r0 + nop + ldw 28(%r4),%r19 + comiclr,= 0,%r19,%r0 + bl L$0131,%r0 + nop + ldw 32(%r4),%r19 + ldo 1(%r19),%r20 + stw %r20,32(%r4) +L$0131: +L$0130: +L$0128: + ldw 24(%r4),%r19 + ldo 1(%r19),%r20 + stw %r20,24(%r4) + bl,n L$0125,%r0 +L$0126: + ldo -4(%r0),%r19 + ldo -32(%r4),%r21 + add %r21,%r19,%r20 + ldw 0(%r20),%r19 + ldw 12(%r19),%r20 + comiclr,<> 0,%r20,%r0 + bl L$0137,%r0 + nop + ldo -4(%r0),%r19 + ldo -32(%r4),%r21 + add %r21,%r19,%r20 + ldw 0(%r20),%r19 + ldw 12(%r19),%r20 + ldo 120(%r20),%r19 + stw %r19,44(%r4) + ldw 44(%r4),%r19 + stw %r19,48(%r4) + ldw 32(%r4),%r20 + ldo 2(%r20),%r19 + zdep %r19,29,30,%r20 + stw %r20,52(%r4) + ldw 48(%r4),%r19 + ldw 48(%r4),%r20 + ldw 16(%r19),%r19 + ldw 12(%r20),%r20 + sub %r19,%r20,%r19 + ldw 52(%r4),%r20 + comclr,< %r19,%r20,%r0 + bl L$0132,%r0 + nop + ldw 48(%r4),%r26 + ldw 52(%r4),%r25 + .CALL ARGW0=GR,ARGW1=GR + bl _obstack_newchunk,%r2 + nop + copy %r0,%r19 + bl,n L$0133,%r0 +L$0132: + copy %r0,%r19 +L$0133: + ldw 48(%r4),%r19 + ldw 48(%r4),%r20 + ldw 12(%r20),%r21 + ldw 52(%r4),%r22 + add %r21,%r22,%r20 + copy %r20,%r21 + stw %r21,12(%r19) + ldw 44(%r4),%r19 + stw %r19,56(%r4) + ldw 56(%r4),%r19 + ldw 8(%r19),%r20 + stw %r20,60(%r4) + ldw 56(%r4),%r19 + ldw 12(%r19),%r20 + ldw 60(%r4),%r19 + comclr,= %r20,%r19,%r0 + bl L$0134,%r0 + nop + ldw 56(%r4),%r19 + ldw 40(%r19),%r20 + copy %r20,%r21 + depi -1,1,1,%r21 + stw %r21,40(%r19) +L$0134: + ldw 56(%r4),%r19 + ldw 56(%r4),%r20 + ldw 56(%r4),%r21 + ldw 12(%r20),%r20 + ldw 24(%r21),%r21 + add %r20,%r21,%r20 + ldw 56(%r4),%r21 + ldw 24(%r21),%r22 + uaddcm %r0,%r22,%r21 + and %r20,%r21,%r20 + copy %r20,%r21 + stw %r21,12(%r19) + ldw 56(%r4),%r19 + ldw 56(%r4),%r20 + ldw 12(%r19),%r19 + ldw 4(%r20),%r20 + sub %r19,%r20,%r19 + ldw 56(%r4),%r20 + ldw 56(%r4),%r21 + ldw 16(%r20),%r20 + ldw 4(%r21),%r21 + sub %r20,%r21,%r20 + comclr,> %r19,%r20,%r0 + bl L$0135,%r0 + nop + ldw 56(%r4),%r19 + ldw 56(%r4),%r20 + ldw 16(%r20),%r21 + stw %r21,12(%r19) + copy %r21,%r19 + bl,n L$0136,%r0 +L$0135: + copy %r0,%r19 +L$0136: + ldw 56(%r4),%r19 + ldw 56(%r4),%r20 + ldw 12(%r20),%r21 + stw %r21,8(%r19) + ldw 60(%r4),%r11 + bl,n L$0138,%r0 +L$0137: + ldw 32(%r4),%r20 + ldo 2(%r20),%r19 + zdep %r19,29,30,%r20 + copy %r20,%r26 + .CALL ARGW0=GR + bl xmalloc,%r2 + nop + copy %r28,%r11 +L$0138: + stw %r11,36(%r4) + ldw 20(%r4),%r19 + stw %r19,24(%r4) + ldo -4(%r0),%r19 + ldo -32(%r4),%r20 + add %r20,%r19,%r19 + ldw 0(%r19),%r26 + .CALL ARGW0=GR + bl lookup_pointer_type,%r2 + nop + copy %r28,%r19 + ldw 36(%r4),%r20 + stw %r19,0(%r20) + ldo 1(%r0),%r19 + stw %r19,32(%r4) + ldw 24(%r4),%r19 + ldb 0(%r19),%r20 + extrs %r20,31,8,%r19 + ldo 41(%r0),%r20 + comclr,<> %r19,%r20,%r0 + bl L$0139,%r0 + nop + stw %r0,28(%r4) +L$0140: + ldw 24(%r4),%r19 + ldb 0(%r19),%r20 + extrs %r20,31,8,%r19 + comiclr,<> 0,%r19,%r0 + bl L$0141,%r0 + nop + ldw 28(%r4),%r19 + comiclr,>= 0,%r19,%r0 + bl L$0142,%r0 + nop + ldw 24(%r4),%r19 + ldb 0(%r19),%r20 + extrs %r20,31,8,%r19 + ldo 44(%r0),%r20 + comclr,<> %r19,%r20,%r0 + bl L$0143,%r0 + nop + ldw 24(%r4),%r19 + ldb 0(%r19),%r20 + extrs %r20,31,8,%r19 + ldo 41(%r0),%r20 + comclr,<> %r19,%r20,%r0 + bl L$0143,%r0 + nop + bl,n L$0142,%r0 +L$0143: + ldw 24(%r4),%r19 + ldw 20(%r4),%r20 + sub %r19,%r20,%r19 + ldw 20(%r4),%r26 + copy %r19,%r25 + .CALL ARGW0=GR,ARGW1=GR + bl parse_and_eval_type,%r2 + nop + copy %r28,%r19 + ldw 32(%r4),%r20 + zdep %r20,29,30,%r21 + ldw 36(%r4),%r22 + add %r21,%r22,%r20 + stw %r19,0(%r20) + ldw 32(%r4),%r19 + ldo 1(%r19),%r20 + stw %r20,32(%r4) + ldw 24(%r4),%r19 + ldo 1(%r19),%r20 + stw %r20,20(%r4) +L$0142: + ldw 24(%r4),%r19 + ldb 0(%r19),%r20 + extrs %r20,31,8,%r19 + ldo 40(%r0),%r20 + comclr,= %r19,%r20,%r0 + bl L$0144,%r0 + nop + ldw 28(%r4),%r19 + ldo 1(%r19),%r20 + stw %r20,28(%r4) + bl,n L$0145,%r0 +L$0144: + ldw 24(%r4),%r19 + ldb 0(%r19),%r20 + extrs %r20,31,8,%r19 + ldo 41(%r0),%r20 + comclr,= %r19,%r20,%r0 + bl L$0146,%r0 + nop + ldw 28(%r4),%r19 + ldo -1(%r19),%r20 + stw %r20,28(%r4) +L$0146: +L$0145: + ldw 24(%r4),%r19 + ldo 1(%r19),%r20 + stw %r20,24(%r4) + bl,n L$0140,%r0 +L$0141: +L$0139: + ldo -2(%r0),%r19 + ldw 24(%r4),%r20 + add %r19,%r20,%r19 + ldb 0(%r19),%r20 + extrs %r20,31,8,%r19 + ldo 46(%r0),%r20 + comclr,<> %r19,%r20,%r0 + bl L$0147,%r0 + nop + ldw 32(%r4),%r19 + zdep %r19,29,30,%r20 + ldw 36(%r4),%r21 + add %r20,%r21,%r19 + addil L'builtin_type_void-$global$,%r27 + ldw R'builtin_type_void-$global$(%r1),%r20 + stw %r20,0(%r19) + bl,n L$0148,%r0 +L$0147: + ldw 32(%r4),%r19 + zdep %r19,29,30,%r20 + ldw 36(%r4),%r21 + add %r20,%r21,%r19 + stw %r0,0(%r19) +L$0148: + ldw 16(%r4),%r26 + .CALL ARGW0=GR + bl free,%r2 + nop + ldo -4(%r0),%r19 + ldo -32(%r4),%r20 + add %r20,%r19,%r19 + ldw 0(%r19),%r20 + ldw 48(%r20),%r19 + ldo -8(%r0),%r20 + ldo -32(%r4),%r21 + add %r21,%r20,%r20 + ldw 0(%r20),%r21 + zdep %r21,30,31,%r20 + add %r20,%r21,%r20 + zdep %r20,29,30,%r20 + ldw 20(%r19),%r21 + add %r20,%r21,%r19 + ldw 8(%r19),%r20 + stw %r20,8(%r4) + ldo -12(%r0),%r19 + ldo -32(%r4),%r20 + add %r20,%r19,%r19 + ldw 0(%r19),%r20 + zdep %r20,29,30,%r19 + add %r19,%r20,%r19 + zdep %r19,29,30,%r19 + ldw 8(%r4),%r20 + add %r19,%r20,%r19 + ldw 12(%r4),%r20 + stw %r20,0(%r19) + ldo -12(%r0),%r19 + ldo -32(%r4),%r20 + add %r20,%r19,%r19 + ldw 0(%r19),%r20 + zdep %r20,29,30,%r19 + add %r19,%r20,%r19 + zdep %r19,29,30,%r19 + ldw 8(%r4),%r20 + add %r19,%r20,%r19 + ldw 4(%r19),%r20 + stw %r20,40(%r4) + ldw 40(%r4),%r19 + ldo -4(%r0),%r20 + ldo -32(%r4),%r21 + add %r21,%r20,%r20 + ldw 0(%r20),%r21 + stw %r21,40(%r19) + ldw 40(%r4),%r19 + ldw 36(%r4),%r20 + stw %r20,48(%r19) + ldw 40(%r4),%r19 + ldw 40(%r4),%r20 + ldh 32(%r20),%r21 + copy %r21,%r20 + depi 0,29,1,%r20 + sth %r20,32(%r19) + ldo -12(%r0),%r19 + ldo -32(%r4),%r20 + add %r20,%r19,%r19 + ldw 0(%r19),%r20 + zdep %r20,29,30,%r19 + add %r19,%r20,%r19 + zdep %r19,29,30,%r19 + ldw 8(%r4),%r20 + add %r19,%r20,%r19 + ldw 16(%r19),%r20 + copy %r20,%r21 + depi 0,4,1,%r21 + stw %r21,16(%r19) +L$0123: + ldw 64(%r4),%r11 + ldw 68(%r4),%r10 + ldw 72(%r4),%r9 + ldw 76(%r4),%r8 + ldw 80(%r4),%r7 + ldw 84(%r4),%r6 + ldw 88(%r4),%r5 + ldo 8(%r4),%r30 + ldw -28(%r30),%r2 + bv %r0(%r2) + ldwm -8(%r30),%r4 + .EXIT + .PROCEND + .align 4 + .EXPORT allocate_cplus_struct_type,CODE + .EXPORT allocate_cplus_struct_type,ENTRY,PRIV_LEV=3,ARGW0=GR +allocate_cplus_struct_type: + .PROC + .CALLINFO FRAME=192,CALLS,SAVE_RP + .ENTRY + stw %r2,-20(%r30) + copy %r4,%r1 + copy %r30,%r4 + stwm %r1,192(%r30) + stw %r8,32(%r4) + stw %r7,36(%r4) + stw %r6,40(%r4) + stw %r5,44(%r4) + ldo -4(%r0),%r5 + ldo -32(%r4),%r19 + add %r19,%r5,%r6 + stw %r26,0(%r6) + ldo -4(%r0),%r19 + ldo -32(%r4),%r20 + add %r20,%r19,%r19 + ldw 0(%r19),%r20 + ldw 48(%r20),%r19 + ldil L'cplus_struct_default,%r20 + ldo R'cplus_struct_default(%r20),%r20 + comclr,= %r19,%r20,%r0 + bl L$0150,%r0 + nop + ldo -4(%r0),%r19 + ldo -32(%r4),%r20 + add %r20,%r19,%r19 + ldw 0(%r19),%r7 + ldo -4(%r0),%r19 + ldo -32(%r4),%r21 + add %r21,%r19,%r20 + ldw 0(%r20),%r19 + ldw 12(%r19),%r20 + comiclr,<> 0,%r20,%r0 + bl L$0156,%r0 + nop + ldo -4(%r0),%r19 + ldo -32(%r4),%r21 + add %r21,%r19,%r20 + ldw 0(%r20),%r19 + ldw 12(%r19),%r20 + ldo 120(%r20),%r19 + stw %r19,8(%r4) + ldw 8(%r4),%r19 + stw %r19,12(%r4) + ldo 24(%r0),%r19 + stw %r19,16(%r4) + ldw 12(%r4),%r19 + ldw 12(%r4),%r20 + ldw 16(%r19),%r19 + ldw 12(%r20),%r20 + sub %r19,%r20,%r19 + ldw 16(%r4),%r20 + comclr,< %r19,%r20,%r0 + bl L$0151,%r0 + nop + ldw 12(%r4),%r26 + ldw 16(%r4),%r25 + .CALL ARGW0=GR,ARGW1=GR + bl _obstack_newchunk,%r2 + nop + copy %r0,%r19 + bl,n L$0152,%r0 +L$0151: + copy %r0,%r19 +L$0152: + ldw 12(%r4),%r19 + ldw 12(%r4),%r20 + ldw 12(%r20),%r21 + ldw 16(%r4),%r22 + add %r21,%r22,%r20 + copy %r20,%r21 + stw %r21,12(%r19) + ldw 8(%r4),%r19 + stw %r19,20(%r4) + ldw 20(%r4),%r19 + ldw 8(%r19),%r20 + stw %r20,24(%r4) + ldw 20(%r4),%r19 + ldw 12(%r19),%r20 + ldw 24(%r4),%r19 + comclr,= %r20,%r19,%r0 + bl L$0153,%r0 + nop + ldw 20(%r4),%r19 + ldw 40(%r19),%r20 + copy %r20,%r21 + depi -1,1,1,%r21 + stw %r21,40(%r19) +L$0153: + ldw 20(%r4),%r19 + ldw 20(%r4),%r20 + ldw 20(%r4),%r21 + ldw 12(%r20),%r20 + ldw 24(%r21),%r21 + add %r20,%r21,%r20 + ldw 20(%r4),%r21 + ldw 24(%r21),%r22 + uaddcm %r0,%r22,%r21 + and %r20,%r21,%r20 + copy %r20,%r21 + stw %r21,12(%r19) + ldw 20(%r4),%r19 + ldw 20(%r4),%r20 + ldw 12(%r19),%r19 + ldw 4(%r20),%r20 + sub %r19,%r20,%r19 + ldw 20(%r4),%r20 + ldw 20(%r4),%r21 + ldw 16(%r20),%r20 + ldw 4(%r21),%r21 + sub %r20,%r21,%r20 + comclr,> %r19,%r20,%r0 + bl L$0154,%r0 + nop + ldw 20(%r4),%r19 + ldw 20(%r4),%r20 + ldw 16(%r20),%r21 + stw %r21,12(%r19) + copy %r21,%r19 + bl,n L$0155,%r0 +L$0154: + copy %r0,%r19 +L$0155: + ldw 20(%r4),%r19 + ldw 20(%r4),%r20 + ldw 12(%r20),%r21 + stw %r21,8(%r19) + ldw 24(%r4),%r8 + bl,n L$0157,%r0 +L$0156: + ldo 24(%r0),%r26 + .CALL ARGW0=GR + bl xmalloc,%r2 + nop + copy %r28,%r8 +L$0157: + stw %r8,48(%r7) + ldo -4(%r0),%r19 + ldo -32(%r4),%r21 + add %r21,%r19,%r20 + ldw 0(%r20),%r19 + ldw 48(%r19),%r20 + ldil L'cplus_struct_default,%r19 + copy %r20,%r21 + ldo R'cplus_struct_default(%r19),%r22 + ldws,ma 4(%r22),%r19 + ldws,ma 4(%r22),%r20 + stws,ma %r19,4(%r21) + ldws,ma 4(%r22),%r19 + stws,ma %r20,4(%r21) + ldws,ma 4(%r22),%r20 + stws,ma %r19,4(%r21) + ldws,ma 4(%r22),%r19 + stws,ma %r20,4(%r21) + ldws,ma 4(%r22),%r20 + stws,ma %r19,4(%r21) + stw %r20,0(%r21) +L$0150: +L$0149: + ldw 32(%r4),%r8 + ldw 36(%r4),%r7 + ldw 40(%r4),%r6 + ldw 44(%r4),%r5 + ldo 8(%r4),%r30 + ldw -28(%r30),%r2 + bv %r0(%r2) + ldwm -8(%r30),%r4 + .EXIT + .PROCEND + .IMPORT obsavestring,CODE + .align 4 + .EXPORT init_type,CODE + .EXPORT init_type,ENTRY,PRIV_LEV=3,ARGW0=GR,ARGW1=GR,ARGW2=GR,ARGW3=GR,RTNVAL=GR +init_type: + .PROC + .CALLINFO FRAME=192,CALLS,SAVE_RP + .ENTRY + stw %r2,-20(%r30) + copy %r4,%r1 + copy %r30,%r4 + stwm %r1,192(%r30) + stw %r14,8(%r4) + stw %r13,12(%r4) + stw %r12,16(%r4) + stw %r11,20(%r4) + stw %r10,24(%r4) + stw %r9,28(%r4) + stw %r8,32(%r4) + stw %r7,36(%r4) + stw %r6,40(%r4) + stw %r5,44(%r4) + ldo -4(%r0),%r5 + ldo -32(%r4),%r19 + add %r19,%r5,%r6 + stw %r26,0(%r6) + ldo -8(%r0),%r7 + ldo -32(%r4),%r19 + add %r19,%r7,%r8 + stw %r25,0(%r8) + ldo -12(%r0),%r9 + ldo -32(%r4),%r19 + add %r19,%r9,%r10 + stw %r24,0(%r10) + ldo -16(%r0),%r11 + ldo -32(%r4),%r19 + add %r19,%r11,%r12 + stw %r23,0(%r12) + ldo -20(%r0),%r19 + ldo -32(%r4),%r20 + add %r20,%r19,%r19 + ldw 0(%r19),%r26 + .CALL ARGW0=GR + bl alloc_type,%r2 + nop + copy %r28,%r13 + ldo -4(%r0),%r19 + ldo -32(%r4),%r20 + add %r20,%r19,%r19 + ldw 0(%r19),%r20 + stw %r20,0(%r13) + ldo -8(%r0),%r19 + ldo -32(%r4),%r20 + add %r20,%r19,%r19 + ldw 0(%r19),%r20 + stw %r20,8(%r13) + ldo -12(%r0),%r19 + ldo -32(%r4),%r20 + add %r20,%r19,%r19 + ldh 32(%r13),%r20 + ldh 2(%r19),%r19 + or %r20,%r19,%r20 + sth %r20,32(%r13) + ldo -16(%r0),%r19 + ldo -32(%r4),%r20 + add %r20,%r19,%r19 + ldw 0(%r19),%r20 + comiclr,<> 0,%r20,%r0 + bl L$0159,%r0 + nop + ldo -20(%r0),%r19 + ldo -32(%r4),%r20 + add %r20,%r19,%r19 + ldw 0(%r19),%r20 + comiclr,<> 0,%r20,%r0 + bl L$0159,%r0 + nop + ldo -16(%r0),%r19 + ldo -32(%r4),%r20 + add %r20,%r19,%r14 + ldo -16(%r0),%r19 + ldo -32(%r4),%r20 + add %r20,%r19,%r19 + ldw 0(%r19),%r26 + .CALL ARGW0=GR + bl strlen,%r2 + nop + copy %r28,%r19 + ldo -20(%r0),%r20 + ldo -32(%r4),%r21 + add %r21,%r20,%r20 + ldw 0(%r20),%r21 + ldo 120(%r21),%r20 + ldw 0(%r14),%r26 + copy %r19,%r25 + copy %r20,%r24 + .CALL ARGW0=GR,ARGW1=GR,ARGW2=GR + bl obsavestring,%r2 + nop + copy %r28,%r19 + stw %r19,4(%r13) + bl,n L$0160,%r0 +L$0159: + ldo -16(%r0),%r19 + ldo -32(%r4),%r20 + add %r20,%r19,%r19 + ldw 0(%r19),%r20 + stw %r20,4(%r13) +L$0160: + ldo -4(%r0),%r19 + ldo -32(%r4),%r20 + add %r20,%r19,%r19 + ldw 0(%r19),%r20 + comiclr,<> 3,%r20,%r0 + bl L$0162,%r0 + nop + ldo -4(%r0),%r19 + ldo -32(%r4),%r20 + add %r20,%r19,%r19 + ldw 0(%r19),%r20 + comiclr,<> 4,%r20,%r0 + bl L$0162,%r0 + nop + bl,n L$0161,%r0 +L$0162: + ldil L'cplus_struct_default,%r19 + ldo R'cplus_struct_default(%r19),%r19 + stw %r19,48(%r13) +L$0161: + copy %r13,%r28 + bl,n L$0158,%r0 +L$0158: + ldw 8(%r4),%r14 + ldw 12(%r4),%r13 + ldw 16(%r4),%r12 + ldw 20(%r4),%r11 + ldw 24(%r4),%r10 + ldw 28(%r4),%r9 + ldw 32(%r4),%r8 + ldw 36(%r4),%r7 + ldw 40(%r4),%r6 + ldw 44(%r4),%r5 + ldo 8(%r4),%r30 + ldw -28(%r30),%r2 + bv %r0(%r2) + ldwm -8(%r30),%r4 + .EXIT + .PROCEND + .align 4 +LC$0022: + .STRING "internal error - invalid fundamental type id %d\x00" + .align 4 +LC$0023: + .STRING "internal error: unhandled type id %d\x00" + .align 4 +LC$0024: + .STRING "void\x00" + .align 4 +LC$0025: + .STRING "boolean\x00" + .align 4 +LC$0026: + .STRING "string\x00" + .align 4 +LC$0027: + .STRING "char\x00" + .align 4 +LC$0028: + .STRING "signed char\x00" + .align 4 +LC$0029: + .STRING "unsigned char\x00" + .align 4 +LC$0030: + .STRING "short\x00" + .align 4 +LC$0031: + .STRING "unsigned short\x00" + .align 4 +LC$0032: + .STRING "int\x00" + .align 4 +LC$0033: + .STRING "unsigned int\x00" + .align 4 +LC$0034: + .STRING "fixed decimal\x00" + .align 4 +LC$0035: + .STRING "long\x00" + .align 4 +LC$0036: + .STRING "unsigned long\x00" + .align 4 +LC$0037: + .STRING "long long\x00" + .align 4 +LC$0038: + .STRING "signed long long\x00" + .align 4 +LC$0039: + .STRING "unsigned long long\x00" + .align 4 +LC$0040: + .STRING "float\x00" + .align 4 +LC$0041: + .STRING "double\x00" + .align 4 +LC$0042: + .STRING "floating decimal\x00" + .align 4 +LC$0043: + .STRING "long double\x00" + .align 4 +LC$0044: + .STRING "complex\x00" + .align 4 +LC$0045: + .STRING "double complex\x00" + .align 4 +LC$0046: + .STRING "long double complex\x00" + .align 4 + .EXPORT lookup_fundamental_type,CODE + .EXPORT lookup_fundamental_type,ENTRY,PRIV_LEV=3,ARGW0=GR,ARGW1=GR,RTNVAL=GR +lookup_fundamental_type: + .PROC + .CALLINFO FRAME=192,CALLS,SAVE_RP + .ENTRY + stw %r2,-20(%r30) + copy %r4,%r1 + copy %r30,%r4 + stwm %r1,192(%r30) + stw %r12,32(%r4) + stw %r11,36(%r4) + stw %r10,40(%r4) + stw %r9,44(%r4) + stw %r8,48(%r4) + stw %r7,52(%r4) + stw %r6,56(%r4) + stw %r5,60(%r4) + ldo -4(%r0),%r5 + ldo -32(%r4),%r19 + add %r19,%r5,%r6 + stw %r26,0(%r6) + ldo -8(%r0),%r7 + ldo -32(%r4),%r19 + add %r19,%r7,%r8 + stw %r25,0(%r8) + copy %r0,%r9 + ldo -8(%r0),%r19 + ldo -32(%r4),%r20 + add %r20,%r19,%r19 + ldw 0(%r19),%r20 + comiclr,<= 0,%r20,%r0 + bl L$0165,%r0 + nop + ldo -8(%r0),%r19 + ldo -32(%r4),%r20 + add %r20,%r19,%r19 + ldw 0(%r19),%r20 + ldo 25(%r0),%r19 + comclr,<= %r20,%r19,%r0 + bl L$0165,%r0 + nop + bl,n L$0164,%r0 +L$0165: + ldo -8(%r0),%r19 + ldo -32(%r4),%r20 + add %r20,%r19,%r19 + ldil L'LC$0022,%r26 + ldo R'LC$0022(%r26),%r26 + ldw 0(%r19),%r25 + .CALL ARGW0=GR,ARGW1=GR + bl error,%r2 + nop + bl,n L$0166,%r0 +L$0164: + ldo -4(%r0),%r19 + ldo -32(%r4),%r21 + add %r21,%r19,%r20 + ldw 0(%r20),%r19 + ldw 196(%r19),%r20 + comiclr,= 0,%r20,%r0 + bl L$0167,%r0 + nop + ldo 104(%r0),%r11 + ldo -4(%r0),%r19 + ldo -32(%r4),%r20 + add %r20,%r19,%r19 + ldw 0(%r19),%r12 + ldo -4(%r0),%r19 + ldo -32(%r4),%r21 + add %r21,%r19,%r20 + ldw 0(%r20),%r19 + ldo 120(%r19),%r20 + stw %r20,8(%r4) + ldw 8(%r4),%r19 + stw %r19,12(%r4) + stw %r11,16(%r4) + ldw 12(%r4),%r19 + ldw 12(%r4),%r20 + ldw 16(%r19),%r19 + ldw 12(%r20),%r20 + sub %r19,%r20,%r19 + ldw 16(%r4),%r20 + comclr,< %r19,%r20,%r0 + bl L$0168,%r0 + nop + ldw 12(%r4),%r26 + ldw 16(%r4),%r25 + .CALL ARGW0=GR,ARGW1=GR + bl _obstack_newchunk,%r2 + nop + copy %r0,%r19 + bl,n L$0169,%r0 +L$0168: + copy %r0,%r19 +L$0169: + ldw 12(%r4),%r19 + ldw 12(%r4),%r20 + ldw 12(%r20),%r21 + ldw 16(%r4),%r22 + add %r21,%r22,%r20 + copy %r20,%r21 + stw %r21,12(%r19) + ldw 8(%r4),%r19 + stw %r19,20(%r4) + ldw 20(%r4),%r19 + ldw 8(%r19),%r20 + stw %r20,24(%r4) + ldw 20(%r4),%r19 + ldw 12(%r19),%r20 + ldw 24(%r4),%r19 + comclr,= %r20,%r19,%r0 + bl L$0170,%r0 + nop + ldw 20(%r4),%r19 + ldw 40(%r19),%r20 + copy %r20,%r21 + depi -1,1,1,%r21 + stw %r21,40(%r19) +L$0170: + ldw 20(%r4),%r19 + ldw 20(%r4),%r20 + ldw 20(%r4),%r21 + ldw 12(%r20),%r20 + ldw 24(%r21),%r21 + add %r20,%r21,%r20 + ldw 20(%r4),%r21 + ldw 24(%r21),%r22 + uaddcm %r0,%r22,%r21 + and %r20,%r21,%r20 + copy %r20,%r21 + stw %r21,12(%r19) + ldw 20(%r4),%r19 + ldw 20(%r4),%r20 + ldw 12(%r19),%r19 + ldw 4(%r20),%r20 + sub %r19,%r20,%r19 + ldw 20(%r4),%r20 + ldw 20(%r4),%r21 + ldw 16(%r20),%r20 + ldw 4(%r21),%r21 + sub %r20,%r21,%r20 + comclr,> %r19,%r20,%r0 + bl L$0171,%r0 + nop + ldw 20(%r4),%r19 + ldw 20(%r4),%r20 + ldw 16(%r20),%r21 + stw %r21,12(%r19) + copy %r21,%r19 + bl,n L$0172,%r0 +L$0171: + copy %r0,%r19 +L$0172: + ldw 20(%r4),%r19 + ldw 20(%r4),%r20 + ldw 12(%r20),%r21 + stw %r21,8(%r19) + ldw 24(%r4),%r19 + stw %r19,196(%r12) + ldo -4(%r0),%r19 + ldo -32(%r4),%r21 + add %r21,%r19,%r20 + ldw 0(%r20),%r19 + ldw 196(%r19),%r26 + copy %r0,%r25 + copy %r11,%r24 + .CALL ARGW0=GR,ARGW1=GR,ARGW2=GR + bl memset,%r2 + nop +L$0167: + ldo -4(%r0),%r19 + ldo -32(%r4),%r21 + add %r21,%r19,%r20 + ldw 0(%r20),%r19 + ldo -8(%r0),%r20 + ldo -32(%r4),%r21 + add %r21,%r20,%r20 + ldw 0(%r20),%r21 + zdep %r21,29,30,%r20 + ldw 196(%r19),%r19 + add %r20,%r19,%r10 + ldw 0(%r10),%r9 + comiclr,= 0,%r9,%r0 + bl L$0173,%r0 + nop + ldo -8(%r0),%r19 + ldo -32(%r4),%r20 + add %r20,%r19,%r19 + ldw 0(%r19),%r20 + addi,uv -26,%r20,%r0 + blr,n %r20,%r0 + b,n L$0175 +L$0202: + b L$0176 + nop + b L$0177 + nop + b L$0179 + nop + b L$0180 + nop + b L$0181 + nop + b L$0182 + nop + b L$0183 + nop + b L$0184 + nop + b L$0185 + nop + b L$0186 + nop + b L$0187 + nop + b L$0189 + nop + b L$0190 + nop + b L$0191 + nop + b L$0192 + nop + b L$0193 + nop + b L$0194 + nop + b L$0195 + nop + b L$0196 + nop + b L$0198 + nop + b L$0199 + nop + b L$0200 + nop + b L$0201 + nop + b L$0178 + nop + b L$0188 + nop + b L$0197 + nop +L$0175: + ldo -8(%r0),%r19 + ldo -32(%r4),%r20 + add %r20,%r19,%r19 + ldil L'LC$0023,%r26 + ldo R'LC$0023(%r26),%r26 + ldw 0(%r19),%r25 + .CALL ARGW0=GR,ARGW1=GR + bl error,%r2 + nop + bl,n L$0174,%r0 +L$0176: + ldo -4(%r0),%r19 + ldo -32(%r4),%r20 + add %r20,%r19,%r19 + ldw 0(%r19),%r20 + stw %r20,-52(%r30) + ldo 9(%r0),%r26 + ldo 1(%r0),%r25 + copy %r0,%r24 + ldil L'LC$0024,%r23 + ldo R'LC$0024(%r23),%r23 + .CALL ARGW0=GR,ARGW1=GR,ARGW2=GR,ARGW3=GR + bl init_type,%r2 + nop + copy %r28,%r9 + bl,n L$0174,%r0 +L$0177: + ldo -4(%r0),%r19 + ldo -32(%r4),%r20 + add %r20,%r19,%r19 + ldw 0(%r19),%r20 + stw %r20,-52(%r30) + ldo 7(%r0),%r26 + ldo 4(%r0),%r25 + ldo 1(%r0),%r24 + ldil L'LC$0025,%r23 + ldo R'LC$0025(%r23),%r23 + .CALL ARGW0=GR,ARGW1=GR,ARGW2=GR,ARGW3=GR + bl init_type,%r2 + nop + copy %r28,%r9 + bl,n L$0174,%r0 +L$0178: + ldo -4(%r0),%r19 + ldo -32(%r4),%r20 + add %r20,%r19,%r19 + ldw 0(%r19),%r20 + stw %r20,-52(%r30) + ldo 12(%r0),%r26 + ldo 1(%r0),%r25 + copy %r0,%r24 + ldil L'LC$0026,%r23 + ldo R'LC$0026(%r23),%r23 + .CALL ARGW0=GR,ARGW1=GR,ARGW2=GR,ARGW3=GR + bl init_type,%r2 + nop + copy %r28,%r9 + bl,n L$0174,%r0 +L$0179: + ldo -4(%r0),%r19 + ldo -32(%r4),%r20 + add %r20,%r19,%r19 + ldw 0(%r19),%r20 + stw %r20,-52(%r30) + ldo 7(%r0),%r26 + ldo 1(%r0),%r25 + copy %r0,%r24 + ldil L'LC$0027,%r23 + ldo R'LC$0027(%r23),%r23 + .CALL ARGW0=GR,ARGW1=GR,ARGW2=GR,ARGW3=GR + bl init_type,%r2 + nop + copy %r28,%r9 + bl,n L$0174,%r0 +L$0180: + ldo -4(%r0),%r19 + ldo -32(%r4),%r20 + add %r20,%r19,%r19 + ldw 0(%r19),%r20 + stw %r20,-52(%r30) + ldo 7(%r0),%r26 + ldo 1(%r0),%r25 + ldo 2(%r0),%r24 + ldil L'LC$0028,%r23 + ldo R'LC$0028(%r23),%r23 + .CALL ARGW0=GR,ARGW1=GR,ARGW2=GR,ARGW3=GR + bl init_type,%r2 + nop + copy %r28,%r9 + bl,n L$0174,%r0 +L$0181: + ldo -4(%r0),%r19 + ldo -32(%r4),%r20 + add %r20,%r19,%r19 + ldw 0(%r19),%r20 + stw %r20,-52(%r30) + ldo 7(%r0),%r26 + ldo 1(%r0),%r25 + ldo 1(%r0),%r24 + ldil L'LC$0029,%r23 + ldo R'LC$0029(%r23),%r23 + .CALL ARGW0=GR,ARGW1=GR,ARGW2=GR,ARGW3=GR + bl init_type,%r2 + nop + copy %r28,%r9 + bl,n L$0174,%r0 +L$0182: + ldo -4(%r0),%r19 + ldo -32(%r4),%r20 + add %r20,%r19,%r19 + ldw 0(%r19),%r20 + stw %r20,-52(%r30) + ldo 7(%r0),%r26 + ldo 2(%r0),%r25 + copy %r0,%r24 + ldil L'LC$0030,%r23 + ldo R'LC$0030(%r23),%r23 + .CALL ARGW0=GR,ARGW1=GR,ARGW2=GR,ARGW3=GR + bl init_type,%r2 + nop + copy %r28,%r9 + bl,n L$0174,%r0 +L$0183: + ldo -4(%r0),%r19 + ldo -32(%r4),%r20 + add %r20,%r19,%r19 + ldw 0(%r19),%r20 + stw %r20,-52(%r30) + ldo 7(%r0),%r26 + ldo 2(%r0),%r25 + ldo 2(%r0),%r24 + ldil L'LC$0030,%r23 + ldo R'LC$0030(%r23),%r23 + .CALL ARGW0=GR,ARGW1=GR,ARGW2=GR,ARGW3=GR + bl init_type,%r2 + nop + copy %r28,%r9 + bl,n L$0174,%r0 +L$0184: + ldo -4(%r0),%r19 + ldo -32(%r4),%r20 + add %r20,%r19,%r19 + ldw 0(%r19),%r20 + stw %r20,-52(%r30) + ldo 7(%r0),%r26 + ldo 2(%r0),%r25 + ldo 1(%r0),%r24 + ldil L'LC$0031,%r23 + ldo R'LC$0031(%r23),%r23 + .CALL ARGW0=GR,ARGW1=GR,ARGW2=GR,ARGW3=GR + bl init_type,%r2 + nop + copy %r28,%r9 + bl,n L$0174,%r0 +L$0185: + ldo -4(%r0),%r19 + ldo -32(%r4),%r20 + add %r20,%r19,%r19 + ldw 0(%r19),%r20 + stw %r20,-52(%r30) + ldo 7(%r0),%r26 + ldo 4(%r0),%r25 + copy %r0,%r24 + ldil L'LC$0032,%r23 + ldo R'LC$0032(%r23),%r23 + .CALL ARGW0=GR,ARGW1=GR,ARGW2=GR,ARGW3=GR + bl init_type,%r2 + nop + copy %r28,%r9 + bl,n L$0174,%r0 +L$0186: + ldo -4(%r0),%r19 + ldo -32(%r4),%r20 + add %r20,%r19,%r19 + ldw 0(%r19),%r20 + stw %r20,-52(%r30) + ldo 7(%r0),%r26 + ldo 4(%r0),%r25 + ldo 2(%r0),%r24 + ldil L'LC$0032,%r23 + ldo R'LC$0032(%r23),%r23 + .CALL ARGW0=GR,ARGW1=GR,ARGW2=GR,ARGW3=GR + bl init_type,%r2 + nop + copy %r28,%r9 + bl,n L$0174,%r0 +L$0187: + ldo -4(%r0),%r19 + ldo -32(%r4),%r20 + add %r20,%r19,%r19 + ldw 0(%r19),%r20 + stw %r20,-52(%r30) + ldo 7(%r0),%r26 + ldo 4(%r0),%r25 + ldo 1(%r0),%r24 + ldil L'LC$0033,%r23 + ldo R'LC$0033(%r23),%r23 + .CALL ARGW0=GR,ARGW1=GR,ARGW2=GR,ARGW3=GR + bl init_type,%r2 + nop + copy %r28,%r9 + bl,n L$0174,%r0 +L$0188: + ldo -4(%r0),%r19 + ldo -32(%r4),%r20 + add %r20,%r19,%r19 + ldw 0(%r19),%r20 + stw %r20,-52(%r30) + ldo 7(%r0),%r26 + ldo 4(%r0),%r25 + copy %r0,%r24 + ldil L'LC$0034,%r23 + ldo R'LC$0034(%r23),%r23 + .CALL ARGW0=GR,ARGW1=GR,ARGW2=GR,ARGW3=GR + bl init_type,%r2 + nop + copy %r28,%r9 + bl,n L$0174,%r0 +L$0189: + ldo -4(%r0),%r19 + ldo -32(%r4),%r20 + add %r20,%r19,%r19 + ldw 0(%r19),%r20 + stw %r20,-52(%r30) + ldo 7(%r0),%r26 + ldo 4(%r0),%r25 + copy %r0,%r24 + ldil L'LC$0035,%r23 + ldo R'LC$0035(%r23),%r23 + .CALL ARGW0=GR,ARGW1=GR,ARGW2=GR,ARGW3=GR + bl init_type,%r2 + nop + copy %r28,%r9 + bl,n L$0174,%r0 +L$0190: + ldo -4(%r0),%r19 + ldo -32(%r4),%r20 + add %r20,%r19,%r19 + ldw 0(%r19),%r20 + stw %r20,-52(%r30) + ldo 7(%r0),%r26 + ldo 4(%r0),%r25 + ldo 2(%r0),%r24 + ldil L'LC$0035,%r23 + ldo R'LC$0035(%r23),%r23 + .CALL ARGW0=GR,ARGW1=GR,ARGW2=GR,ARGW3=GR + bl init_type,%r2 + nop + copy %r28,%r9 + bl,n L$0174,%r0 +L$0191: + ldo -4(%r0),%r19 + ldo -32(%r4),%r20 + add %r20,%r19,%r19 + ldw 0(%r19),%r20 + stw %r20,-52(%r30) + ldo 7(%r0),%r26 + ldo 4(%r0),%r25 + ldo 1(%r0),%r24 + ldil L'LC$0036,%r23 + ldo R'LC$0036(%r23),%r23 + .CALL ARGW0=GR,ARGW1=GR,ARGW2=GR,ARGW3=GR + bl init_type,%r2 + nop + copy %r28,%r9 + bl,n L$0174,%r0 +L$0192: + ldo -4(%r0),%r19 + ldo -32(%r4),%r20 + add %r20,%r19,%r19 + ldw 0(%r19),%r20 + stw %r20,-52(%r30) + ldo 7(%r0),%r26 + ldo 8(%r0),%r25 + copy %r0,%r24 + ldil L'LC$0037,%r23 + ldo R'LC$0037(%r23),%r23 + .CALL ARGW0=GR,ARGW1=GR,ARGW2=GR,ARGW3=GR + bl init_type,%r2 + nop + copy %r28,%r9 + bl,n L$0174,%r0 +L$0193: + ldo -4(%r0),%r19 + ldo -32(%r4),%r20 + add %r20,%r19,%r19 + ldw 0(%r19),%r20 + stw %r20,-52(%r30) + ldo 7(%r0),%r26 + ldo 8(%r0),%r25 + ldo 2(%r0),%r24 + ldil L'LC$0038,%r23 + ldo R'LC$0038(%r23),%r23 + .CALL ARGW0=GR,ARGW1=GR,ARGW2=GR,ARGW3=GR + bl init_type,%r2 + nop + copy %r28,%r9 + bl,n L$0174,%r0 +L$0194: + ldo -4(%r0),%r19 + ldo -32(%r4),%r20 + add %r20,%r19,%r19 + ldw 0(%r19),%r20 + stw %r20,-52(%r30) + ldo 7(%r0),%r26 + ldo 8(%r0),%r25 + ldo 1(%r0),%r24 + ldil L'LC$0039,%r23 + ldo R'LC$0039(%r23),%r23 + .CALL ARGW0=GR,ARGW1=GR,ARGW2=GR,ARGW3=GR + bl init_type,%r2 + nop + copy %r28,%r9 + bl,n L$0174,%r0 +L$0195: + ldo -4(%r0),%r19 + ldo -32(%r4),%r20 + add %r20,%r19,%r19 + ldw 0(%r19),%r20 + stw %r20,-52(%r30) + ldo 8(%r0),%r26 + ldo 4(%r0),%r25 + copy %r0,%r24 + ldil L'LC$0040,%r23 + ldo R'LC$0040(%r23),%r23 + .CALL ARGW0=GR,ARGW1=GR,ARGW2=GR,ARGW3=GR + bl init_type,%r2 + nop + copy %r28,%r9 + bl,n L$0174,%r0 +L$0196: + ldo -4(%r0),%r19 + ldo -32(%r4),%r20 + add %r20,%r19,%r19 + ldw 0(%r19),%r20 + stw %r20,-52(%r30) + ldo 8(%r0),%r26 + ldo 8(%r0),%r25 + copy %r0,%r24 + ldil L'LC$0041,%r23 + ldo R'LC$0041(%r23),%r23 + .CALL ARGW0=GR,ARGW1=GR,ARGW2=GR,ARGW3=GR + bl init_type,%r2 + nop + copy %r28,%r9 + bl,n L$0174,%r0 +L$0197: + ldo -4(%r0),%r19 + ldo -32(%r4),%r20 + add %r20,%r19,%r19 + ldw 0(%r19),%r20 + stw %r20,-52(%r30) + ldo 8(%r0),%r26 + ldo 8(%r0),%r25 + copy %r0,%r24 + ldil L'LC$0042,%r23 + ldo R'LC$0042(%r23),%r23 + .CALL ARGW0=GR,ARGW1=GR,ARGW2=GR,ARGW3=GR + bl init_type,%r2 + nop + copy %r28,%r9 + bl,n L$0174,%r0 +L$0198: + ldo -4(%r0),%r19 + ldo -32(%r4),%r20 + add %r20,%r19,%r19 + ldw 0(%r19),%r20 + stw %r20,-52(%r30) + ldo 8(%r0),%r26 + ldo 16(%r0),%r25 + copy %r0,%r24 + ldil L'LC$0043,%r23 + ldo R'LC$0043(%r23),%r23 + .CALL ARGW0=GR,ARGW1=GR,ARGW2=GR,ARGW3=GR + bl init_type,%r2 + nop + copy %r28,%r9 + bl,n L$0174,%r0 +L$0199: + ldo -4(%r0),%r19 + ldo -32(%r4),%r20 + add %r20,%r19,%r19 + ldw 0(%r19),%r20 + stw %r20,-52(%r30) + ldo 8(%r0),%r26 + ldo 8(%r0),%r25 + copy %r0,%r24 + ldil L'LC$0044,%r23 + ldo R'LC$0044(%r23),%r23 + .CALL ARGW0=GR,ARGW1=GR,ARGW2=GR,ARGW3=GR + bl init_type,%r2 + nop + copy %r28,%r9 + bl,n L$0174,%r0 +L$0200: + ldo -4(%r0),%r19 + ldo -32(%r4),%r20 + add %r20,%r19,%r19 + ldw 0(%r19),%r20 + stw %r20,-52(%r30) + ldo 8(%r0),%r26 + ldo 16(%r0),%r25 + copy %r0,%r24 + ldil L'LC$0045,%r23 + ldo R'LC$0045(%r23),%r23 + .CALL ARGW0=GR,ARGW1=GR,ARGW2=GR,ARGW3=GR + bl init_type,%r2 + nop + copy %r28,%r9 + bl,n L$0174,%r0 +L$0201: + ldo -4(%r0),%r19 + ldo -32(%r4),%r20 + add %r20,%r19,%r19 + ldw 0(%r19),%r20 + stw %r20,-52(%r30) + ldo 8(%r0),%r26 + ldo 16(%r0),%r25 + copy %r0,%r24 + ldil L'LC$0046,%r23 + ldo R'LC$0046(%r23),%r23 + .CALL ARGW0=GR,ARGW1=GR,ARGW2=GR,ARGW3=GR + bl init_type,%r2 + nop + copy %r28,%r9 + bl,n L$0174,%r0 +L$0174: + stw %r9,0(%r10) +L$0173: +L$0166: + copy %r9,%r28 + bl,n L$0163,%r0 +L$0163: + ldw 32(%r4),%r12 + ldw 36(%r4),%r11 + ldw 40(%r4),%r10 + ldw 44(%r4),%r9 + ldw 48(%r4),%r8 + ldw 52(%r4),%r7 + ldw 56(%r4),%r6 + ldw 60(%r4),%r5 + ldo 8(%r4),%r30 + ldw -28(%r30),%r2 + bv %r0(%r2) + ldwm -8(%r30),%r4 + .EXIT + .PROCEND + .IMPORT puts_filtered,CODE + .align 4 +LC$0047: + .STRING " \x00" + .IMPORT printf_filtered,CODE + .align 4 +LC$0048: + .STRING "1\x00" + .align 4 +LC$0049: + .STRING "0\x00" + .align 4 +print_bit_vector: + .PROC + .CALLINFO FRAME=128,CALLS,SAVE_RP + .ENTRY + stw %r2,-20(%r30) + copy %r4,%r1 + copy %r30,%r4 + stwm %r1,128(%r30) + stw %r8,16(%r4) + stw %r7,20(%r4) + stw %r6,24(%r4) + stw %r5,28(%r4) + ldo -4(%r0),%r5 + ldo -32(%r4),%r19 + add %r19,%r5,%r6 + stw %r26,0(%r6) + ldo -8(%r0),%r7 + ldo -32(%r4),%r19 + add %r19,%r7,%r8 + stw %r25,0(%r8) + stw %r0,8(%r4) +L$0204: + ldo -8(%r0),%r19 + ldo -32(%r4),%r20 + add %r20,%r19,%r19 + ldw 8(%r4),%r20 + ldw 0(%r19),%r19 + comclr,< %r20,%r19,%r0 + bl L$0205,%r0 + nop + ldw 8(%r4),%r19 + ldw 8(%r4),%r20 + comiclr,> 0,%r19,%r0 + bl L$0208,%r0 + nop + ldo 7(%r19),%r19 +L$0208: + extrs %r19,28,29,%r19 + zdep %r19,28,29,%r21 + sub %r20,%r21,%r19 + comiclr,= 0,%r19,%r0 + bl L$0207,%r0 + nop + ldil L'LC$0047,%r26 + ldo R'LC$0047(%r26),%r26 + .CALL ARGW0=GR + bl puts_filtered,%r2 + nop +L$0207: + ldw 8(%r4),%r20 + extrs %r20,28,29,%r19 + ldo -4(%r0),%r20 + ldo -32(%r4),%r21 + add %r21,%r20,%r20 + ldw 0(%r20),%r21 + add %r19,%r21,%r20 + ldb 0(%r20),%r19 + ldw 8(%r4),%r20 + extru %r20,31,3,%r21 + subi,>>= 31,%r21,%r20 + copy %r0,%r20 + mtsar %r20 + vextrs %r19,32,%r19 + extru %r19,31,1,%r20 + comiclr,<> 0,%r20,%r0 + bl L$0209,%r0 + nop + ldil L'LC$0048,%r26 + ldo R'LC$0048(%r26),%r26 + .CALL ARGW0=GR + bl printf_filtered,%r2 + nop + bl,n L$0210,%r0 +L$0209: + ldil L'LC$0049,%r26 + ldo R'LC$0049(%r26),%r26 + .CALL ARGW0=GR + bl printf_filtered,%r2 + nop +L$0210: +L$0206: + ldw 8(%r4),%r19 + ldo 1(%r19),%r20 + stw %r20,8(%r4) + bl,n L$0204,%r0 +L$0205: +L$0203: + ldw 16(%r4),%r8 + ldw 20(%r4),%r7 + ldw 24(%r4),%r6 + ldw 28(%r4),%r5 + ldo 8(%r4),%r30 + ldw -28(%r30),%r2 + bv %r0(%r2) + ldwm -8(%r30),%r4 + .EXIT + .PROCEND + .IMPORT recursive_dump_type,CODE + .align 4 +print_arg_types: + .PROC + .CALLINFO FRAME=128,CALLS,SAVE_RP + .ENTRY + stw %r2,-20(%r30) + copy %r4,%r1 + copy %r30,%r4 + stwm %r1,128(%r30) + stw %r8,8(%r4) + stw %r7,12(%r4) + stw %r6,16(%r4) + stw %r5,20(%r4) + ldo -4(%r0),%r5 + ldo -32(%r4),%r19 + add %r19,%r5,%r6 + stw %r26,0(%r6) + ldo -8(%r0),%r7 + ldo -32(%r4),%r19 + add %r19,%r7,%r8 + stw %r25,0(%r8) + ldo -4(%r0),%r19 + ldo -32(%r4),%r20 + add %r20,%r19,%r19 + ldw 0(%r19),%r20 + comiclr,<> 0,%r20,%r0 + bl L$0212,%r0 + nop +L$0213: + ldo -4(%r0),%r19 + ldo -32(%r4),%r21 + add %r21,%r19,%r20 + ldw 0(%r20),%r19 + ldw 0(%r19),%r20 + comiclr,<> 0,%r20,%r0 + bl L$0214,%r0 + nop + ldo -4(%r0),%r19 + ldo -32(%r4),%r21 + add %r21,%r19,%r20 + ldw 0(%r20),%r19 + ldo -8(%r0),%r20 + ldo -32(%r4),%r21 + add %r21,%r20,%r20 + ldw 0(%r20),%r21 + ldo 2(%r21),%r20 + ldw 0(%r19),%r26 + copy %r20,%r25 + .CALL ARGW0=GR,ARGW1=GR + bl recursive_dump_type,%r2 + nop + ldo -4(%r0),%r19 + ldo -32(%r4),%r20 + add %r20,%r19,%r19 + ldw 0(%r19),%r20 + ldo 4(%r20),%r21 + stw %r21,0(%r19) + ldw 0(%r20),%r19 + ldw 0(%r19),%r20 + comiclr,= 9,%r20,%r0 + bl L$0215,%r0 + nop + bl,n L$0214,%r0 +L$0215: + bl,n L$0213,%r0 +L$0214: +L$0212: +L$0211: + ldw 8(%r4),%r8 + ldw 12(%r4),%r7 + ldw 16(%r4),%r6 + ldw 20(%r4),%r5 + ldo 8(%r4),%r30 + ldw -28(%r30),%r2 + bv %r0(%r2) + ldwm -8(%r30),%r4 + .EXIT + .PROCEND + .IMPORT printfi_filtered,CODE + .align 4 +LC$0050: + .STRING "fn_fieldlists 0x%x\x0a\x00" + .align 4 +LC$0051: + .STRING "[%d] name '%s' (0x%x) length %d\x0a\x00" + .align 4 +LC$0052: + .STRING "[%d] physname '%s' (0x%x)\x0a\x00" + .align 4 +LC$0053: + .STRING "type 0x%x\x0a\x00" + .align 4 +LC$0054: + .STRING "args 0x%x\x0a\x00" + .align 4 +LC$0055: + .STRING "fcontext 0x%x\x0a\x00" + .align 4 +LC$0056: + .STRING "is_const %d\x0a\x00" + .align 4 +LC$0057: + .STRING "is_volatile %d\x0a\x00" + .align 4 +LC$0058: + .STRING "is_private %d\x0a\x00" + .align 4 +LC$0059: + .STRING "is_protected %d\x0a\x00" + .align 4 +LC$0060: + .STRING "is_stub %d\x0a\x00" + .align 4 +LC$0061: + .STRING "voffset %u\x0a\x00" + .align 4 +dump_fn_fieldlists: + .PROC + .CALLINFO FRAME=192,CALLS,SAVE_RP + .ENTRY + stw %r2,-20(%r30) + copy %r4,%r1 + copy %r30,%r4 + stwm %r1,192(%r30) + stw %r8,24(%r4) + stw %r7,28(%r4) + stw %r6,32(%r4) + stw %r5,36(%r4) + ldo -4(%r0),%r5 + ldo -32(%r4),%r19 + add %r19,%r5,%r6 + stw %r26,0(%r6) + ldo -8(%r0),%r7 + ldo -32(%r4),%r19 + add %r19,%r7,%r8 + stw %r25,0(%r8) + ldo -8(%r0),%r19 + ldo -32(%r4),%r20 + add %r20,%r19,%r19 + ldo -4(%r0),%r20 + ldo -32(%r4),%r21 + add %r21,%r20,%r20 + ldw 0(%r20),%r21 + ldw 48(%r21),%r20 + ldw 0(%r19),%r26 + ldil L'LC$0050,%r25 + ldo R'LC$0050(%r25),%r25 + ldw 20(%r20),%r24 + .CALL ARGW0=GR,ARGW1=GR,ARGW2=GR + bl printfi_filtered,%r2 + nop + stw %r0,8(%r4) +L$0217: + ldo -4(%r0),%r19 + ldo -32(%r4),%r21 + add %r21,%r19,%r20 + ldw 0(%r20),%r19 + ldw 48(%r19),%r20 + ldh 2(%r20),%r21 + extrs %r21,31,16,%r19 + ldw 8(%r4),%r20 + comclr,< %r20,%r19,%r0 + bl L$0218,%r0 + nop + ldo -4(%r0),%r19 + ldo -32(%r4),%r20 + add %r20,%r19,%r19 + ldw 0(%r19),%r20 + ldw 48(%r20),%r19 + ldw 8(%r4),%r21 + zdep %r21,30,31,%r20 + add %r20,%r21,%r20 + zdep %r20,29,30,%r20 + ldw 20(%r19),%r21 + add %r20,%r21,%r19 + ldw 8(%r19),%r20 + stw %r20,16(%r4) + ldo -8(%r0),%r19 + ldo -32(%r4),%r20 + add %r20,%r19,%r19 + ldw 0(%r19),%r20 + ldo 2(%r20),%r19 + ldo -4(%r0),%r20 + ldo -32(%r4),%r21 + add %r21,%r20,%r20 + ldw 0(%r20),%r21 + ldw 48(%r21),%r20 + ldw 8(%r4),%r22 + zdep %r22,30,31,%r21 + add %r21,%r22,%r21 + zdep %r21,29,30,%r21 + ldw 20(%r20),%r22 + add %r21,%r22,%r20 + ldo -4(%r0),%r21 + ldo -32(%r4),%r22 + add %r22,%r21,%r21 + ldw 0(%r21),%r22 + ldw 48(%r22),%r21 + ldw 8(%r4),%r23 + zdep %r23,30,31,%r22 + add %r22,%r23,%r22 + zdep %r22,29,30,%r22 + ldw 20(%r21),%r23 + add %r22,%r23,%r21 + ldw 0(%r21),%r22 + stw %r22,-52(%r30) + ldo -4(%r0),%r21 + ldo -32(%r4),%r22 + add %r22,%r21,%r21 + ldw 0(%r21),%r22 + ldw 48(%r22),%r21 + ldw 8(%r4),%r23 + zdep %r23,30,31,%r22 + add %r22,%r23,%r22 + zdep %r22,29,30,%r22 + ldw 20(%r21),%r23 + add %r22,%r23,%r21 + ldw 4(%r21),%r22 + stw %r22,-56(%r30) + copy %r19,%r26 + ldil L'LC$0051,%r25 + ldo R'LC$0051(%r25),%r25 + ldw 8(%r4),%r24 + ldw 0(%r20),%r23 + .CALL ARGW0=GR,ARGW1=GR,ARGW2=GR,ARGW3=GR + bl printfi_filtered,%r2 + nop + stw %r0,12(%r4) +L$0220: + ldo -4(%r0),%r19 + ldo -32(%r4),%r20 + add %r20,%r19,%r19 + ldw 0(%r19),%r20 + ldw 48(%r20),%r19 + ldw 8(%r4),%r21 + zdep %r21,30,31,%r20 + add %r20,%r21,%r20 + zdep %r20,29,30,%r20 + ldw 20(%r19),%r21 + add %r20,%r21,%r19 + ldw 12(%r4),%r20 + ldw 4(%r19),%r19 + comclr,< %r20,%r19,%r0 + bl L$0221,%r0 + nop + ldo -8(%r0),%r19 + ldo -32(%r4),%r20 + add %r20,%r19,%r19 + ldw 0(%r19),%r20 + ldo 4(%r20),%r19 + ldw 12(%r4),%r21 + zdep %r21,29,30,%r20 + add %r20,%r21,%r20 + zdep %r20,29,30,%r20 + ldw 16(%r4),%r21 + add %r20,%r21,%r20 + ldw 12(%r4),%r22 + zdep %r22,29,30,%r21 + add %r21,%r22,%r21 + zdep %r21,29,30,%r21 + ldw 16(%r4),%r22 + add %r21,%r22,%r21 + ldw 0(%r21),%r22 + stw %r22,-52(%r30) + copy %r19,%r26 + ldil L'LC$0052,%r25 + ldo R'LC$0052(%r25),%r25 + ldw 12(%r4),%r24 + ldw 0(%r20),%r23 + .CALL ARGW0=GR,ARGW1=GR,ARGW2=GR,ARGW3=GR + bl printfi_filtered,%r2 + nop + ldo -8(%r0),%r19 + ldo -32(%r4),%r20 + add %r20,%r19,%r19 + ldw 0(%r19),%r20 + ldo 8(%r20),%r19 + ldw 12(%r4),%r21 + zdep %r21,29,30,%r20 + add %r20,%r21,%r20 + zdep %r20,29,30,%r20 + ldw 16(%r4),%r21 + add %r20,%r21,%r20 + copy %r19,%r26 + ldil L'LC$0053,%r25 + ldo R'LC$0053(%r25),%r25 + ldw 4(%r20),%r24 + .CALL ARGW0=GR,ARGW1=GR,ARGW2=GR + bl printfi_filtered,%r2 + nop + ldw 12(%r4),%r20 + zdep %r20,29,30,%r19 + add %r19,%r20,%r19 + zdep %r19,29,30,%r19 + ldw 16(%r4),%r20 + add %r19,%r20,%r19 + ldo -8(%r0),%r20 + ldo -32(%r4),%r21 + add %r21,%r20,%r20 + ldw 0(%r20),%r21 + ldo 10(%r21),%r20 + ldw 4(%r19),%r26 + copy %r20,%r25 + .CALL ARGW0=GR,ARGW1=GR + bl recursive_dump_type,%r2 + nop + ldo -8(%r0),%r19 + ldo -32(%r4),%r20 + add %r20,%r19,%r19 + ldw 0(%r19),%r20 + ldo 8(%r20),%r19 + ldw 12(%r4),%r21 + zdep %r21,29,30,%r20 + add %r20,%r21,%r20 + zdep %r20,29,30,%r20 + ldw 16(%r4),%r22 + add %r20,%r22,%r21 + ldw 4(%r21),%r20 + copy %r19,%r26 + ldil L'LC$0054,%r25 + ldo R'LC$0054(%r25),%r25 + ldw 48(%r20),%r24 + .CALL ARGW0=GR,ARGW1=GR,ARGW2=GR + bl printfi_filtered,%r2 + nop + ldw 12(%r4),%r20 + zdep %r20,29,30,%r19 + add %r19,%r20,%r19 + zdep %r19,29,30,%r19 + ldw 16(%r4),%r21 + add %r19,%r21,%r20 + ldw 4(%r20),%r19 + ldo -8(%r0),%r20 + ldo -32(%r4),%r21 + add %r21,%r20,%r20 + ldw 48(%r19),%r26 + ldw 0(%r20),%r25 + .CALL ARGW0=GR,ARGW1=GR + bl print_arg_types,%r2 + nop + ldo -8(%r0),%r19 + ldo -32(%r4),%r20 + add %r20,%r19,%r19 + ldw 0(%r19),%r20 + ldo 8(%r20),%r19 + ldw 12(%r4),%r21 + zdep %r21,29,30,%r20 + add %r20,%r21,%r20 + zdep %r20,29,30,%r20 + ldw 16(%r4),%r21 + add %r20,%r21,%r20 + copy %r19,%r26 + ldil L'LC$0055,%r25 + ldo R'LC$0055(%r25),%r25 + ldw 12(%r20),%r24 + .CALL ARGW0=GR,ARGW1=GR,ARGW2=GR + bl printfi_filtered,%r2 + nop + ldo -8(%r0),%r19 + ldo -32(%r4),%r20 + add %r20,%r19,%r19 + ldw 0(%r19),%r20 + ldo 8(%r20),%r19 + ldw 12(%r4),%r21 + zdep %r21,29,30,%r20 + add %r20,%r21,%r20 + zdep %r20,29,30,%r20 + ldw 16(%r4),%r21 + add %r20,%r21,%r20 + ldw 16(%r20),%r21 + extru %r21,0+1-1,1,%r20 + copy %r19,%r26 + ldil L'LC$0056,%r25 + ldo R'LC$0056(%r25),%r25 + copy %r20,%r24 + .CALL ARGW0=GR,ARGW1=GR,ARGW2=GR + bl printfi_filtered,%r2 + nop + ldo -8(%r0),%r19 + ldo -32(%r4),%r20 + add %r20,%r19,%r19 + ldw 0(%r19),%r20 + ldo 8(%r20),%r19 + ldw 12(%r4),%r21 + zdep %r21,29,30,%r20 + add %r20,%r21,%r20 + zdep %r20,29,30,%r20 + ldw 16(%r4),%r21 + add %r20,%r21,%r20 + ldw 16(%r20),%r21 + extru %r21,1+1-1,1,%r20 + copy %r19,%r26 + ldil L'LC$0057,%r25 + ldo R'LC$0057(%r25),%r25 + copy %r20,%r24 + .CALL ARGW0=GR,ARGW1=GR,ARGW2=GR + bl printfi_filtered,%r2 + nop + ldo -8(%r0),%r19 + ldo -32(%r4),%r20 + add %r20,%r19,%r19 + ldw 0(%r19),%r20 + ldo 8(%r20),%r19 + ldw 12(%r4),%r21 + zdep %r21,29,30,%r20 + add %r20,%r21,%r20 + zdep %r20,29,30,%r20 + ldw 16(%r4),%r21 + add %r20,%r21,%r20 + ldw 16(%r20),%r21 + extru %r21,2+1-1,1,%r20 + copy %r19,%r26 + ldil L'LC$0058,%r25 + ldo R'LC$0058(%r25),%r25 + copy %r20,%r24 + .CALL ARGW0=GR,ARGW1=GR,ARGW2=GR + bl printfi_filtered,%r2 + nop + ldo -8(%r0),%r19 + ldo -32(%r4),%r20 + add %r20,%r19,%r19 + ldw 0(%r19),%r20 + ldo 8(%r20),%r19 + ldw 12(%r4),%r21 + zdep %r21,29,30,%r20 + add %r20,%r21,%r20 + zdep %r20,29,30,%r20 + ldw 16(%r4),%r21 + add %r20,%r21,%r20 + ldw 16(%r20),%r21 + extru %r21,3+1-1,1,%r20 + copy %r19,%r26 + ldil L'LC$0059,%r25 + ldo R'LC$0059(%r25),%r25 + copy %r20,%r24 + .CALL ARGW0=GR,ARGW1=GR,ARGW2=GR + bl printfi_filtered,%r2 + nop + ldo -8(%r0),%r19 + ldo -32(%r4),%r20 + add %r20,%r19,%r19 + ldw 0(%r19),%r20 + ldo 8(%r20),%r19 + ldw 12(%r4),%r21 + zdep %r21,29,30,%r20 + add %r20,%r21,%r20 + zdep %r20,29,30,%r20 + ldw 16(%r4),%r21 + add %r20,%r21,%r20 + ldw 16(%r20),%r21 + extru %r21,4+1-1,1,%r20 + copy %r19,%r26 + ldil L'LC$0060,%r25 + ldo R'LC$0060(%r25),%r25 + copy %r20,%r24 + .CALL ARGW0=GR,ARGW1=GR,ARGW2=GR + bl printfi_filtered,%r2 + nop + ldo -8(%r0),%r19 + ldo -32(%r4),%r20 + add %r20,%r19,%r19 + ldw 0(%r19),%r20 + ldo 8(%r20),%r19 + ldw 12(%r4),%r21 + zdep %r21,29,30,%r20 + add %r20,%r21,%r20 + zdep %r20,29,30,%r20 + ldw 16(%r4),%r21 + add %r20,%r21,%r20 + ldw 16(%r20),%r21 + extru %r21,8+24-1,24,%r22 + ldo -2(%r22),%r20 + copy %r19,%r26 + ldil L'LC$0061,%r25 + ldo R'LC$0061(%r25),%r25 + copy %r20,%r24 + .CALL ARGW0=GR,ARGW1=GR,ARGW2=GR + bl printfi_filtered,%r2 + nop +L$0222: + ldw 12(%r4),%r19 + ldo 1(%r19),%r20 + stw %r20,12(%r4) + bl,n L$0220,%r0 +L$0221: +L$0219: + ldw 8(%r4),%r19 + ldo 1(%r19),%r20 + stw %r20,8(%r4) + bl,n L$0217,%r0 +L$0218: +L$0216: + ldw 24(%r4),%r8 + ldw 28(%r4),%r7 + ldw 32(%r4),%r6 + ldw 36(%r4),%r5 + ldo 8(%r4),%r30 + ldw -28(%r30),%r2 + bv %r0(%r2) + ldwm -8(%r30),%r4 + .EXIT + .PROCEND + .align 4 +LC$0062: + .STRING "n_baseclasses %d\x0a\x00" + .align 4 +LC$0063: + .STRING "nfn_fields %d\x0a\x00" + .align 4 +LC$0064: + .STRING "nfn_fields_total %d\x0a\x00" + .align 4 +LC$0065: + .STRING "virtual_field_bits (%d bits at *0x%x)\x00" + .align 4 +LC$0066: + .STRING "\x0a\x00" + .align 4 +LC$0067: + .STRING "private_field_bits (%d bits at *0x%x)\x00" + .align 4 +LC$0068: + .STRING "protected_field_bits (%d bits at *0x%x)\x00" + .align 4 +print_cplus_stuff: + .PROC + .CALLINFO FRAME=128,CALLS,SAVE_RP + .ENTRY + stw %r2,-20(%r30) + copy %r4,%r1 + copy %r30,%r4 + stwm %r1,128(%r30) + stw %r8,16(%r4) + stw %r7,20(%r4) + stw %r6,24(%r4) + stw %r5,28(%r4) + ldo -4(%r0),%r5 + ldo -32(%r4),%r19 + add %r19,%r5,%r6 + stw %r26,0(%r6) + ldo -8(%r0),%r7 + ldo -32(%r4),%r19 + add %r19,%r7,%r8 + stw %r25,0(%r8) + ldo -8(%r0),%r19 + ldo -32(%r4),%r20 + add %r20,%r19,%r19 + ldo -4(%r0),%r20 + ldo -32(%r4),%r22 + add %r22,%r20,%r21 + ldw 0(%r21),%r20 + ldw 48(%r20),%r21 + ldh 0(%r21),%r22 + extrs %r22,31,16,%r20 + ldw 0(%r19),%r26 + ldil L'LC$0062,%r25 + ldo R'LC$0062(%r25),%r25 + copy %r20,%r24 + .CALL ARGW0=GR,ARGW1=GR,ARGW2=GR + bl printfi_filtered,%r2 + nop + ldo -8(%r0),%r19 + ldo -32(%r4),%r20 + add %r20,%r19,%r19 + ldo -4(%r0),%r20 + ldo -32(%r4),%r22 + add %r22,%r20,%r21 + ldw 0(%r21),%r20 + ldw 48(%r20),%r21 + ldh 2(%r21),%r22 + extrs %r22,31,16,%r20 + ldw 0(%r19),%r26 + ldil L'LC$0063,%r25 + ldo R'LC$0063(%r25),%r25 + copy %r20,%r24 + .CALL ARGW0=GR,ARGW1=GR,ARGW2=GR + bl printfi_filtered,%r2 + nop + ldo -8(%r0),%r19 + ldo -32(%r4),%r20 + add %r20,%r19,%r19 + ldo -4(%r0),%r20 + ldo -32(%r4),%r21 + add %r21,%r20,%r20 + ldw 0(%r20),%r21 + ldw 48(%r21),%r20 + ldw 0(%r19),%r26 + ldil L'LC$0064,%r25 + ldo R'LC$0064(%r25),%r25 + ldw 4(%r20),%r24 + .CALL ARGW0=GR,ARGW1=GR,ARGW2=GR + bl printfi_filtered,%r2 + nop + ldo -4(%r0),%r19 + ldo -32(%r4),%r21 + add %r21,%r19,%r20 + ldw 0(%r20),%r19 + ldw 48(%r19),%r20 + ldh 0(%r20),%r21 + extrs %r21,31,16,%r19 + comiclr,< 0,%r19,%r0 + bl L$0224,%r0 + nop + ldo -8(%r0),%r19 + ldo -32(%r4),%r20 + add %r20,%r19,%r19 + ldo -4(%r0),%r20 + ldo -32(%r4),%r22 + add %r22,%r20,%r21 + ldw 0(%r21),%r20 + ldw 48(%r20),%r21 + ldh 0(%r21),%r22 + extrs %r22,31,16,%r20 + ldo -4(%r0),%r21 + ldo -32(%r4),%r22 + add %r22,%r21,%r21 + ldw 0(%r21),%r22 + ldw 48(%r22),%r21 + ldw 0(%r19),%r26 + ldil L'LC$0065,%r25 + ldo R'LC$0065(%r25),%r25 + copy %r20,%r24 + ldw 8(%r21),%r23 + .CALL ARGW0=GR,ARGW1=GR,ARGW2=GR,ARGW3=GR + bl printfi_filtered,%r2 + nop + ldo -4(%r0),%r19 + ldo -32(%r4),%r20 + add %r20,%r19,%r19 + ldw 0(%r19),%r20 + ldw 48(%r20),%r19 + ldo -4(%r0),%r20 + ldo -32(%r4),%r22 + add %r22,%r20,%r21 + ldw 0(%r21),%r20 + ldw 48(%r20),%r21 + ldh 0(%r21),%r22 + extrs %r22,31,16,%r20 + ldw 8(%r19),%r26 + copy %r20,%r25 + .CALL ARGW0=GR,ARGW1=GR + bl print_bit_vector,%r2 + nop + ldil L'LC$0066,%r26 + ldo R'LC$0066(%r26),%r26 + .CALL ARGW0=GR + bl puts_filtered,%r2 + nop +L$0224: + ldo -4(%r0),%r19 + ldo -32(%r4),%r21 + add %r21,%r19,%r20 + ldw 0(%r20),%r19 + ldh 34(%r19),%r20 + extrs %r20,31,16,%r19 + comiclr,< 0,%r19,%r0 + bl L$0225,%r0 + nop + ldo -4(%r0),%r19 + ldo -32(%r4),%r21 + add %r21,%r19,%r20 + ldw 0(%r20),%r19 + ldw 48(%r19),%r20 + ldw 12(%r20),%r19 + comiclr,<> 0,%r19,%r0 + bl L$0226,%r0 + nop + ldo -8(%r0),%r19 + ldo -32(%r4),%r20 + add %r20,%r19,%r19 + ldo -4(%r0),%r20 + ldo -32(%r4),%r22 + add %r22,%r20,%r21 + ldw 0(%r21),%r20 + ldh 34(%r20),%r21 + extrs %r21,31,16,%r20 + ldo -4(%r0),%r21 + ldo -32(%r4),%r22 + add %r22,%r21,%r21 + ldw 0(%r21),%r22 + ldw 48(%r22),%r21 + ldw 0(%r19),%r26 + ldil L'LC$0067,%r25 + ldo R'LC$0067(%r25),%r25 + copy %r20,%r24 + ldw 12(%r21),%r23 + .CALL ARGW0=GR,ARGW1=GR,ARGW2=GR,ARGW3=GR + bl printfi_filtered,%r2 + nop + ldo -4(%r0),%r19 + ldo -32(%r4),%r20 + add %r20,%r19,%r19 + ldw 0(%r19),%r20 + ldw 48(%r20),%r19 + ldo -4(%r0),%r20 + ldo -32(%r4),%r22 + add %r22,%r20,%r21 + ldw 0(%r21),%r20 + ldh 34(%r20),%r21 + extrs %r21,31,16,%r20 + ldw 12(%r19),%r26 + copy %r20,%r25 + .CALL ARGW0=GR,ARGW1=GR + bl print_bit_vector,%r2 + nop + ldil L'LC$0066,%r26 + ldo R'LC$0066(%r26),%r26 + .CALL ARGW0=GR + bl puts_filtered,%r2 + nop +L$0226: + ldo -4(%r0),%r19 + ldo -32(%r4),%r21 + add %r21,%r19,%r20 + ldw 0(%r20),%r19 + ldw 48(%r19),%r20 + ldw 16(%r20),%r19 + comiclr,<> 0,%r19,%r0 + bl L$0227,%r0 + nop + ldo -8(%r0),%r19 + ldo -32(%r4),%r20 + add %r20,%r19,%r19 + ldo -4(%r0),%r20 + ldo -32(%r4),%r22 + add %r22,%r20,%r21 + ldw 0(%r21),%r20 + ldh 34(%r20),%r21 + extrs %r21,31,16,%r20 + ldo -4(%r0),%r21 + ldo -32(%r4),%r22 + add %r22,%r21,%r21 + ldw 0(%r21),%r22 + ldw 48(%r22),%r21 + ldw 0(%r19),%r26 + ldil L'LC$0068,%r25 + ldo R'LC$0068(%r25),%r25 + copy %r20,%r24 + ldw 16(%r21),%r23 + .CALL ARGW0=GR,ARGW1=GR,ARGW2=GR,ARGW3=GR + bl printfi_filtered,%r2 + nop + ldo -4(%r0),%r19 + ldo -32(%r4),%r20 + add %r20,%r19,%r19 + ldw 0(%r19),%r20 + ldw 48(%r20),%r19 + ldo -4(%r0),%r20 + ldo -32(%r4),%r22 + add %r22,%r20,%r21 + ldw 0(%r21),%r20 + ldh 34(%r20),%r21 + extrs %r21,31,16,%r20 + ldw 16(%r19),%r26 + copy %r20,%r25 + .CALL ARGW0=GR,ARGW1=GR + bl print_bit_vector,%r2 + nop + ldil L'LC$0066,%r26 + ldo R'LC$0066(%r26),%r26 + .CALL ARGW0=GR + bl puts_filtered,%r2 + nop +L$0227: +L$0225: + ldo -4(%r0),%r19 + ldo -32(%r4),%r21 + add %r21,%r19,%r20 + ldw 0(%r20),%r19 + ldw 48(%r19),%r20 + ldh 2(%r20),%r21 + extrs %r21,31,16,%r19 + comiclr,< 0,%r19,%r0 + bl L$0228,%r0 + nop + ldo -4(%r0),%r19 + ldo -32(%r4),%r20 + add %r20,%r19,%r19 + ldo -8(%r0),%r20 + ldo -32(%r4),%r21 + add %r21,%r20,%r20 + ldw 0(%r19),%r26 + ldw 0(%r20),%r25 + .CALL ARGW0=GR,ARGW1=GR + bl dump_fn_fieldlists,%r2 + nop +L$0228: +L$0223: + ldw 16(%r4),%r8 + ldw 20(%r4),%r7 + ldw 24(%r4),%r6 + ldw 28(%r4),%r5 + ldo 8(%r4),%r30 + ldw -28(%r30),%r2 + bv %r0(%r2) + ldwm -8(%r30),%r4 + .EXIT + .PROCEND + .align 4 +LC$0069: + .STRING "type node 0x%x\x0a\x00" + .align 4 +LC$0070: + .STRING "name '%s' (0x%x)\x0a\x00" + .align 4 +LC$0071: + .STRING "<NULL>\x00" + .align 4 +LC$0072: + .STRING "code 0x%x \x00" + .align 4 +LC$0073: + .STRING "(TYPE_CODE_UNDEF)\x00" + .align 4 +LC$0074: + .STRING "(TYPE_CODE_PTR)\x00" + .align 4 +LC$0075: + .STRING "(TYPE_CODE_ARRAY)\x00" + .align 4 +LC$0076: + .STRING "(TYPE_CODE_STRUCT)\x00" + .align 4 +LC$0077: + .STRING "(TYPE_CODE_UNION)\x00" + .align 4 +LC$0078: + .STRING "(TYPE_CODE_ENUM)\x00" + .align 4 +LC$0079: + .STRING "(TYPE_CODE_FUNC)\x00" + .align 4 +LC$0080: + .STRING "(TYPE_CODE_INT)\x00" + .align 4 +LC$0081: + .STRING "(TYPE_CODE_FLT)\x00" + .align 4 +LC$0082: + .STRING "(TYPE_CODE_VOID)\x00" + .align 4 +LC$0083: + .STRING "(TYPE_CODE_SET)\x00" + .align 4 +LC$0084: + .STRING "(TYPE_CODE_RANGE)\x00" + .align 4 +LC$0085: + .STRING "(TYPE_CODE_PASCAL_ARRAY)\x00" + .align 4 +LC$0086: + .STRING "(TYPE_CODE_ERROR)\x00" + .align 4 +LC$0087: + .STRING "(TYPE_CODE_MEMBER)\x00" + .align 4 +LC$0088: + .STRING "(TYPE_CODE_METHOD)\x00" + .align 4 +LC$0089: + .STRING "(TYPE_CODE_REF)\x00" + .align 4 +LC$0090: + .STRING "(TYPE_CODE_CHAR)\x00" + .align 4 +LC$0091: + .STRING "(TYPE_CODE_BOOL)\x00" + .align 4 +LC$0092: + .STRING "(UNKNOWN TYPE CODE)\x00" + .align 4 +LC$0093: + .STRING "length %d\x0a\x00" + .align 4 +LC$0094: + .STRING "objfile 0x%x\x0a\x00" + .align 4 +LC$0095: + .STRING "target_type 0x%x\x0a\x00" + .align 4 +LC$0096: + .STRING "pointer_type 0x%x\x0a\x00" + .align 4 +LC$0097: + .STRING "reference_type 0x%x\x0a\x00" + .align 4 +LC$0098: + .STRING "function_type 0x%x\x0a\x00" + .align 4 +LC$0099: + .STRING "flags 0x%x\x00" + .align 4 +LC$0100: + .STRING " TYPE_FLAG_UNSIGNED\x00" + .align 4 +LC$0101: + .STRING " TYPE_FLAG_SIGNED\x00" + .align 4 +LC$0102: + .STRING " TYPE_FLAG_STUB\x00" + .align 4 +LC$0103: + .STRING "nfields %d 0x%x\x0a\x00" + .align 4 +LC$0104: + .STRING "[%d] bitpos %d bitsize %d type 0x%x name '%s' (0x%x)\x0a\x00" + .align 4 +LC$0105: + .STRING "vptr_basetype 0x%x\x0a\x00" + .align 4 +LC$0106: + .STRING "vptr_fieldno %d\x0a\x00" + .align 4 +LC$0107: + .STRING "arg_types 0x%x\x0a\x00" + .align 4 +LC$0108: + .STRING "cplus_stuff 0x%x\x0a\x00" + .align 4 +LC$0109: + .STRING "type_specific 0x%x\x00" + .align 4 +LC$0110: + .STRING " (unknown data form)\x00" + .align 4 + .EXPORT recursive_dump_type,CODE + .EXPORT recursive_dump_type,ENTRY,PRIV_LEV=3,ARGW0=GR,ARGW1=GR +recursive_dump_type: + .PROC + .CALLINFO FRAME=128,CALLS,SAVE_RP + .ENTRY + stw %r2,-20(%r30) + copy %r4,%r1 + copy %r30,%r4 + stwm %r1,128(%r30) + stw %r8,16(%r4) + stw %r7,20(%r4) + stw %r6,24(%r4) + stw %r5,28(%r4) + ldo -4(%r0),%r5 + ldo -32(%r4),%r19 + add %r19,%r5,%r6 + stw %r26,0(%r6) + ldo -8(%r0),%r7 + ldo -32(%r4),%r19 + add %r19,%r7,%r8 + stw %r25,0(%r8) + ldo -8(%r0),%r19 + ldo -32(%r4),%r20 + add %r20,%r19,%r19 + ldo -4(%r0),%r20 + ldo -32(%r4),%r21 + add %r21,%r20,%r20 + ldw 0(%r19),%r26 + ldil L'LC$0069,%r25 + ldo R'LC$0069(%r25),%r25 + ldw 0(%r20),%r24 + .CALL ARGW0=GR,ARGW1=GR,ARGW2=GR + bl printfi_filtered,%r2 + nop + ldo -8(%r0),%r19 + ldo -32(%r4),%r20 + add %r20,%r19,%r19 + ldo -4(%r0),%r20 + ldo -32(%r4),%r22 + add %r22,%r20,%r21 + ldw 0(%r21),%r20 + ldo -4(%r0),%r21 + ldo -32(%r4),%r22 + add %r22,%r21,%r21 + ldw 0(%r21),%r22 + ldw 4(%r22),%r21 + ldo -4(%r0),%r22 + ldo -32(%r4),%r24 + add %r24,%r22,%r23 + ldw 0(%r23),%r22 + ldw 4(%r22),%r23 + comiclr,= 0,%r23,%r0 + bl L$0230,%r0 + nop + ldil L'LC$0071,%r21 + ldo R'LC$0071(%r21),%r21 +L$0230: + ldw 0(%r19),%r26 + ldil L'LC$0070,%r25 + ldo R'LC$0070(%r25),%r25 + ldw 4(%r20),%r24 + copy %r21,%r23 + .CALL ARGW0=GR,ARGW1=GR,ARGW2=GR,ARGW3=GR + bl printfi_filtered,%r2 + nop + ldo -8(%r0),%r19 + ldo -32(%r4),%r20 + add %r20,%r19,%r19 + ldo -4(%r0),%r20 + ldo -32(%r4),%r22 + add %r22,%r20,%r21 + ldw 0(%r21),%r20 + ldw 0(%r19),%r26 + ldil L'LC$0072,%r25 + ldo R'LC$0072(%r25),%r25 + ldw 0(%r20),%r24 + .CALL ARGW0=GR,ARGW1=GR,ARGW2=GR + bl printfi_filtered,%r2 + nop + ldo -4(%r0),%r19 + ldo -32(%r4),%r21 + add %r21,%r19,%r20 + ldw 0(%r20),%r19 + ldw 0(%r19),%r20 + addi,uv -19,%r20,%r0 + blr,n %r20,%r0 + b,n L$0251 +L$0252: + b L$0232 + nop + b L$0233 + nop + b L$0234 + nop + b L$0235 + nop + b L$0236 + nop + b L$0237 + nop + b L$0238 + nop + b L$0239 + nop + b L$0240 + nop + b L$0241 + nop + b L$0242 + nop + b L$0243 + nop + b L$0244 + nop + b L$0245 + nop + b L$0246 + nop + b L$0247 + nop + b L$0248 + nop + b L$0249 + nop + b L$0250 + nop +L$0232: + ldil L'LC$0073,%r26 + ldo R'LC$0073(%r26),%r26 + .CALL ARGW0=GR + bl printf_filtered,%r2 + nop + bl,n L$0231,%r0 +L$0233: + ldil L'LC$0074,%r26 + ldo R'LC$0074(%r26),%r26 + .CALL ARGW0=GR + bl printf_filtered,%r2 + nop + bl,n L$0231,%r0 +L$0234: + ldil L'LC$0075,%r26 + ldo R'LC$0075(%r26),%r26 + .CALL ARGW0=GR + bl printf_filtered,%r2 + nop + bl,n L$0231,%r0 +L$0235: + ldil L'LC$0076,%r26 + ldo R'LC$0076(%r26),%r26 + .CALL ARGW0=GR + bl printf_filtered,%r2 + nop + bl,n L$0231,%r0 +L$0236: + ldil L'LC$0077,%r26 + ldo R'LC$0077(%r26),%r26 + .CALL ARGW0=GR + bl printf_filtered,%r2 + nop + bl,n L$0231,%r0 +L$0237: + ldil L'LC$0078,%r26 + ldo R'LC$0078(%r26),%r26 + .CALL ARGW0=GR + bl printf_filtered,%r2 + nop + bl,n L$0231,%r0 +L$0238: + ldil L'LC$0079,%r26 + ldo R'LC$0079(%r26),%r26 + .CALL ARGW0=GR + bl printf_filtered,%r2 + nop + bl,n L$0231,%r0 +L$0239: + ldil L'LC$0080,%r26 + ldo R'LC$0080(%r26),%r26 + .CALL ARGW0=GR + bl printf_filtered,%r2 + nop + bl,n L$0231,%r0 +L$0240: + ldil L'LC$0081,%r26 + ldo R'LC$0081(%r26),%r26 + .CALL ARGW0=GR + bl printf_filtered,%r2 + nop + bl,n L$0231,%r0 +L$0241: + ldil L'LC$0082,%r26 + ldo R'LC$0082(%r26),%r26 + .CALL ARGW0=GR + bl printf_filtered,%r2 + nop + bl,n L$0231,%r0 +L$0242: + ldil L'LC$0083,%r26 + ldo R'LC$0083(%r26),%r26 + .CALL ARGW0=GR + bl printf_filtered,%r2 + nop + bl,n L$0231,%r0 +L$0243: + ldil L'LC$0084,%r26 + ldo R'LC$0084(%r26),%r26 + .CALL ARGW0=GR + bl printf_filtered,%r2 + nop + bl,n L$0231,%r0 +L$0244: + ldil L'LC$0085,%r26 + ldo R'LC$0085(%r26),%r26 + .CALL ARGW0=GR + bl printf_filtered,%r2 + nop + bl,n L$0231,%r0 +L$0245: + ldil L'LC$0086,%r26 + ldo R'LC$0086(%r26),%r26 + .CALL ARGW0=GR + bl printf_filtered,%r2 + nop + bl,n L$0231,%r0 +L$0246: + ldil L'LC$0087,%r26 + ldo R'LC$0087(%r26),%r26 + .CALL ARGW0=GR + bl printf_filtered,%r2 + nop + bl,n L$0231,%r0 +L$0247: + ldil L'LC$0088,%r26 + ldo R'LC$0088(%r26),%r26 + .CALL ARGW0=GR + bl printf_filtered,%r2 + nop + bl,n L$0231,%r0 +L$0248: + ldil L'LC$0089,%r26 + ldo R'LC$0089(%r26),%r26 + .CALL ARGW0=GR + bl printf_filtered,%r2 + nop + bl,n L$0231,%r0 +L$0249: + ldil L'LC$0090,%r26 + ldo R'LC$0090(%r26),%r26 + .CALL ARGW0=GR + bl printf_filtered,%r2 + nop + bl,n L$0231,%r0 +L$0250: + ldil L'LC$0091,%r26 + ldo R'LC$0091(%r26),%r26 + .CALL ARGW0=GR + bl printf_filtered,%r2 + nop + bl,n L$0231,%r0 +L$0251: + ldil L'LC$0092,%r26 + ldo R'LC$0092(%r26),%r26 + .CALL ARGW0=GR + bl printf_filtered,%r2 + nop + bl,n L$0231,%r0 +L$0231: + ldil L'LC$0066,%r26 + ldo R'LC$0066(%r26),%r26 + .CALL ARGW0=GR + bl puts_filtered,%r2 + nop + ldo -8(%r0),%r19 + ldo -32(%r4),%r20 + add %r20,%r19,%r19 + ldo -4(%r0),%r20 + ldo -32(%r4),%r22 + add %r22,%r20,%r21 + ldw 0(%r21),%r20 + ldw 0(%r19),%r26 + ldil L'LC$0093,%r25 + ldo R'LC$0093(%r25),%r25 + ldw 8(%r20),%r24 + .CALL ARGW0=GR,ARGW1=GR,ARGW2=GR + bl printfi_filtered,%r2 + nop + ldo -8(%r0),%r19 + ldo -32(%r4),%r20 + add %r20,%r19,%r19 + ldo -4(%r0),%r20 + ldo -32(%r4),%r22 + add %r22,%r20,%r21 + ldw 0(%r21),%r20 + ldw 0(%r19),%r26 + ldil L'LC$0094,%r25 + ldo R'LC$0094(%r25),%r25 + ldw 12(%r20),%r24 + .CALL ARGW0=GR,ARGW1=GR,ARGW2=GR + bl printfi_filtered,%r2 + nop + ldo -8(%r0),%r19 + ldo -32(%r4),%r20 + add %r20,%r19,%r19 + ldo -4(%r0),%r20 + ldo -32(%r4),%r22 + add %r22,%r20,%r21 + ldw 0(%r21),%r20 + ldw 0(%r19),%r26 + ldil L'LC$0095,%r25 + ldo R'LC$0095(%r25),%r25 + ldw 16(%r20),%r24 + .CALL ARGW0=GR,ARGW1=GR,ARGW2=GR + bl printfi_filtered,%r2 + nop + ldo -4(%r0),%r19 + ldo -32(%r4),%r21 + add %r21,%r19,%r20 + ldw 0(%r20),%r19 + ldw 16(%r19),%r20 + comiclr,<> 0,%r20,%r0 + bl L$0253,%r0 + nop + ldo -4(%r0),%r19 + ldo -32(%r4),%r21 + add %r21,%r19,%r20 + ldw 0(%r20),%r19 + ldo -8(%r0),%r20 + ldo -32(%r4),%r21 + add %r21,%r20,%r20 + ldw 0(%r20),%r21 + ldo 2(%r21),%r20 + ldw 16(%r19),%r26 + copy %r20,%r25 + .CALL ARGW0=GR,ARGW1=GR + bl recursive_dump_type,%r2 + nop +L$0253: + ldo -8(%r0),%r19 + ldo -32(%r4),%r20 + add %r20,%r19,%r19 + ldo -4(%r0),%r20 + ldo -32(%r4),%r22 + add %r22,%r20,%r21 + ldw 0(%r21),%r20 + ldw 0(%r19),%r26 + ldil L'LC$0096,%r25 + ldo R'LC$0096(%r25),%r25 + ldw 20(%r20),%r24 + .CALL ARGW0=GR,ARGW1=GR,ARGW2=GR + bl printfi_filtered,%r2 + nop + ldo -8(%r0),%r19 + ldo -32(%r4),%r20 + add %r20,%r19,%r19 + ldo -4(%r0),%r20 + ldo -32(%r4),%r22 + add %r22,%r20,%r21 + ldw 0(%r21),%r20 + ldw 0(%r19),%r26 + ldil L'LC$0097,%r25 + ldo R'LC$0097(%r25),%r25 + ldw 24(%r20),%r24 + .CALL ARGW0=GR,ARGW1=GR,ARGW2=GR + bl printfi_filtered,%r2 + nop + ldo -8(%r0),%r19 + ldo -32(%r4),%r20 + add %r20,%r19,%r19 + ldo -4(%r0),%r20 + ldo -32(%r4),%r22 + add %r22,%r20,%r21 + ldw 0(%r21),%r20 + ldw 0(%r19),%r26 + ldil L'LC$0098,%r25 + ldo R'LC$0098(%r25),%r25 + ldw 28(%r20),%r24 + .CALL ARGW0=GR,ARGW1=GR,ARGW2=GR + bl printfi_filtered,%r2 + nop + ldo -8(%r0),%r19 + ldo -32(%r4),%r20 + add %r20,%r19,%r19 + ldo -4(%r0),%r20 + ldo -32(%r4),%r22 + add %r22,%r20,%r21 + ldw 0(%r21),%r20 + ldh 32(%r20),%r21 + extrs %r21,31,16,%r20 + ldw 0(%r19),%r26 + ldil L'LC$0099,%r25 + ldo R'LC$0099(%r25),%r25 + copy %r20,%r24 + .CALL ARGW0=GR,ARGW1=GR,ARGW2=GR + bl printfi_filtered,%r2 + nop + ldo -4(%r0),%r19 + ldo -32(%r4),%r21 + add %r21,%r19,%r20 + ldw 0(%r20),%r19 + ldh 32(%r19),%r20 + extru %r20,31,1,%r19 + extrs %r19,31,16,%r20 + comiclr,<> 0,%r20,%r0 + bl L$0254,%r0 + nop + ldil L'LC$0100,%r26 + ldo R'LC$0100(%r26),%r26 + .CALL ARGW0=GR + bl puts_filtered,%r2 + nop +L$0254: + ldo -4(%r0),%r19 + ldo -32(%r4),%r21 + add %r21,%r19,%r20 + ldw 0(%r20),%r19 + ldh 32(%r19),%r20 + ldo 2(%r0),%r21 + and %r20,%r21,%r19 + extrs %r19,31,16,%r20 + comiclr,<> 0,%r20,%r0 + bl L$0255,%r0 + nop + ldil L'LC$0101,%r26 + ldo R'LC$0101(%r26),%r26 + .CALL ARGW0=GR + bl puts_filtered,%r2 + nop +L$0255: + ldo -4(%r0),%r19 + ldo -32(%r4),%r21 + add %r21,%r19,%r20 + ldw 0(%r20),%r19 + ldh 32(%r19),%r20 + ldo 4(%r0),%r21 + and %r20,%r21,%r19 + extrs %r19,31,16,%r20 + comiclr,<> 0,%r20,%r0 + bl L$0256,%r0 + nop + ldil L'LC$0102,%r26 + ldo R'LC$0102(%r26),%r26 + .CALL ARGW0=GR + bl puts_filtered,%r2 + nop +L$0256: + ldil L'LC$0066,%r26 + ldo R'LC$0066(%r26),%r26 + .CALL ARGW0=GR + bl puts_filtered,%r2 + nop + ldo -8(%r0),%r19 + ldo -32(%r4),%r20 + add %r20,%r19,%r19 + ldo -4(%r0),%r20 + ldo -32(%r4),%r22 + add %r22,%r20,%r21 + ldw 0(%r21),%r20 + ldh 34(%r20),%r21 + extrs %r21,31,16,%r20 + ldo -4(%r0),%r21 + ldo -32(%r4),%r23 + add %r23,%r21,%r22 + ldw 0(%r22),%r21 + ldw 0(%r19),%r26 + ldil L'LC$0103,%r25 + ldo R'LC$0103(%r25),%r25 + copy %r20,%r24 + ldw 36(%r21),%r23 + .CALL ARGW0=GR,ARGW1=GR,ARGW2=GR,ARGW3=GR + bl printfi_filtered,%r2 + nop + stw %r0,8(%r4) +L$0257: + ldo -4(%r0),%r19 + ldo -32(%r4),%r21 + add %r21,%r19,%r20 + ldw 0(%r20),%r19 + ldh 34(%r19),%r20 + extrs %r20,31,16,%r19 + ldw 8(%r4),%r20 + comclr,< %r20,%r19,%r0 + bl L$0258,%r0 + nop + ldo -8(%r0),%r19 + ldo -32(%r4),%r20 + add %r20,%r19,%r19 + ldw 0(%r19),%r20 + ldo 2(%r20),%r19 + ldo -4(%r0),%r20 + ldo -32(%r4),%r22 + add %r22,%r20,%r21 + ldw 0(%r21),%r20 + ldw 8(%r4),%r21 + zdep %r21,27,28,%r22 + ldw 36(%r20),%r21 + add %r22,%r21,%r20 + ldo -4(%r0),%r21 + ldo -32(%r4),%r23 + add %r23,%r21,%r22 + ldw 0(%r22),%r21 + ldw 8(%r4),%r22 + zdep %r22,27,28,%r23 + ldw 36(%r21),%r22 + add %r23,%r22,%r21 + ldw 4(%r21),%r22 + stw %r22,-52(%r30) + ldo -4(%r0),%r21 + ldo -32(%r4),%r23 + add %r23,%r21,%r22 + ldw 0(%r22),%r21 + ldw 8(%r4),%r22 + zdep %r22,27,28,%r23 + ldw 36(%r21),%r22 + add %r23,%r22,%r21 + ldw 8(%r21),%r22 + stw %r22,-56(%r30) + ldo -4(%r0),%r21 + ldo -32(%r4),%r23 + add %r23,%r21,%r22 + ldw 0(%r22),%r21 + ldw 8(%r4),%r22 + zdep %r22,27,28,%r23 + ldw 36(%r21),%r22 + add %r23,%r22,%r21 + ldw 12(%r21),%r22 + stw %r22,-60(%r30) + ldo -4(%r0),%r21 + ldo -32(%r4),%r23 + add %r23,%r21,%r22 + ldw 0(%r22),%r21 + ldw 8(%r4),%r22 + zdep %r22,27,28,%r23 + ldw 36(%r21),%r22 + add %r23,%r22,%r21 + ldw 12(%r21),%r22 + stw %r22,-64(%r30) + ldo -4(%r0),%r21 + ldo -32(%r4),%r23 + add %r23,%r21,%r22 + ldw 0(%r22),%r21 + ldw 8(%r4),%r22 + zdep %r22,27,28,%r23 + ldw 36(%r21),%r22 + add %r23,%r22,%r21 + ldw 12(%r21),%r22 + comiclr,= 0,%r22,%r0 + bl L$0260,%r0 + nop + ldil L'LC$0071,%r21 + ldo R'LC$0071(%r21),%r21 + stw %r21,-64(%r30) +L$0260: + copy %r19,%r26 + ldil L'LC$0104,%r25 + ldo R'LC$0104(%r25),%r25 + ldw 8(%r4),%r24 + ldw 0(%r20),%r23 + .CALL ARGW0=GR,ARGW1=GR,ARGW2=GR,ARGW3=GR + bl printfi_filtered,%r2 + nop + ldo -4(%r0),%r19 + ldo -32(%r4),%r21 + add %r21,%r19,%r20 + ldw 0(%r20),%r19 + ldw 8(%r4),%r20 + zdep %r20,27,28,%r21 + ldw 36(%r19),%r20 + add %r21,%r20,%r19 + ldw 8(%r19),%r20 + comiclr,<> 0,%r20,%r0 + bl L$0261,%r0 + nop + ldo -4(%r0),%r19 + ldo -32(%r4),%r21 + add %r21,%r19,%r20 + ldw 0(%r20),%r19 + ldw 8(%r4),%r20 + zdep %r20,27,28,%r21 + ldw 36(%r19),%r20 + add %r21,%r20,%r19 + ldo -8(%r0),%r20 + ldo -32(%r4),%r21 + add %r21,%r20,%r20 + ldw 0(%r20),%r21 + ldo 4(%r21),%r20 + ldw 8(%r19),%r26 + copy %r20,%r25 + .CALL ARGW0=GR,ARGW1=GR + bl recursive_dump_type,%r2 + nop +L$0261: +L$0259: + ldw 8(%r4),%r19 + ldo 1(%r19),%r20 + stw %r20,8(%r4) + bl,n L$0257,%r0 +L$0258: + ldo -8(%r0),%r19 + ldo -32(%r4),%r20 + add %r20,%r19,%r19 + ldo -4(%r0),%r20 + ldo -32(%r4),%r22 + add %r22,%r20,%r21 + ldw 0(%r21),%r20 + ldw 0(%r19),%r26 + ldil L'LC$0105,%r25 + ldo R'LC$0105(%r25),%r25 + ldw 40(%r20),%r24 + .CALL ARGW0=GR,ARGW1=GR,ARGW2=GR + bl printfi_filtered,%r2 + nop + ldo -4(%r0),%r19 + ldo -32(%r4),%r21 + add %r21,%r19,%r20 + ldw 0(%r20),%r19 + ldw 40(%r19),%r20 + comiclr,<> 0,%r20,%r0 + bl L$0262,%r0 + nop + ldo -4(%r0),%r19 + ldo -32(%r4),%r21 + add %r21,%r19,%r20 + ldw 0(%r20),%r19 + ldo -8(%r0),%r20 + ldo -32(%r4),%r21 + add %r21,%r20,%r20 + ldw 0(%r20),%r21 + ldo 2(%r21),%r20 + ldw 40(%r19),%r26 + copy %r20,%r25 + .CALL ARGW0=GR,ARGW1=GR + bl recursive_dump_type,%r2 + nop +L$0262: + ldo -8(%r0),%r19 + ldo -32(%r4),%r20 + add %r20,%r19,%r19 + ldo -4(%r0),%r20 + ldo -32(%r4),%r22 + add %r22,%r20,%r21 + ldw 0(%r21),%r20 + ldw 0(%r19),%r26 + ldil L'LC$0106,%r25 + ldo R'LC$0106(%r25),%r25 + ldw 44(%r20),%r24 + .CALL ARGW0=GR,ARGW1=GR,ARGW2=GR + bl printfi_filtered,%r2 + nop + ldo -4(%r0),%r19 + ldo -32(%r4),%r20 + add %r20,%r19,%r19 + ldw 0(%r19),%r20 + ldw 0(%r20),%r19 + comiclr,<> 6,%r19,%r0 + bl L$0265,%r0 + nop + comiclr,>= 6,%r19,%r0 + bl L$0270,%r0 + nop + comiclr,<> 3,%r19,%r0 + bl L$0266,%r0 + nop + bl,n L$0267,%r0 +L$0270: + comiclr,<> 15,%r19,%r0 + bl L$0264,%r0 + nop + bl,n L$0267,%r0 +L$0264: +L$0265: + ldo -8(%r0),%r19 + ldo -32(%r4),%r20 + add %r20,%r19,%r19 + ldo -4(%r0),%r20 + ldo -32(%r4),%r22 + add %r22,%r20,%r21 + ldw 0(%r21),%r20 + ldw 0(%r19),%r26 + ldil L'LC$0107,%r25 + ldo R'LC$0107(%r25),%r25 + ldw 48(%r20),%r24 + .CALL ARGW0=GR,ARGW1=GR,ARGW2=GR + bl printfi_filtered,%r2 + nop + ldo -4(%r0),%r19 + ldo -32(%r4),%r21 + add %r21,%r19,%r20 + ldw 0(%r20),%r19 + ldo -8(%r0),%r20 + ldo -32(%r4),%r21 + add %r21,%r20,%r20 + ldw 48(%r19),%r26 + ldw 0(%r20),%r25 + .CALL ARGW0=GR,ARGW1=GR + bl print_arg_types,%r2 + nop + bl,n L$0263,%r0 +L$0266: + ldo -8(%r0),%r19 + ldo -32(%r4),%r20 + add %r20,%r19,%r19 + ldo -4(%r0),%r20 + ldo -32(%r4),%r22 + add %r22,%r20,%r21 + ldw 0(%r21),%r20 + ldw 0(%r19),%r26 + ldil L'LC$0108,%r25 + ldo R'LC$0108(%r25),%r25 + ldw 48(%r20),%r24 + .CALL ARGW0=GR,ARGW1=GR,ARGW2=GR + bl printfi_filtered,%r2 + nop + ldo -4(%r0),%r19 + ldo -32(%r4),%r20 + add %r20,%r19,%r19 + ldo -8(%r0),%r20 + ldo -32(%r4),%r21 + add %r21,%r20,%r20 + ldw 0(%r19),%r26 + ldw 0(%r20),%r25 + .CALL ARGW0=GR,ARGW1=GR + bl print_cplus_stuff,%r2 + nop + bl,n L$0263,%r0 +L$0267: + ldo -8(%r0),%r19 + ldo -32(%r4),%r20 + add %r20,%r19,%r19 + ldo -4(%r0),%r20 + ldo -32(%r4),%r22 + add %r22,%r20,%r21 + ldw 0(%r21),%r20 + ldw 0(%r19),%r26 + ldil L'LC$0109,%r25 + ldo R'LC$0109(%r25),%r25 + ldw 48(%r20),%r24 + .CALL ARGW0=GR,ARGW1=GR,ARGW2=GR + bl printfi_filtered,%r2 + nop + ldo -4(%r0),%r19 + ldo -32(%r4),%r21 + add %r21,%r19,%r20 + ldw 0(%r20),%r19 + ldw 48(%r19),%r20 + comiclr,<> 0,%r20,%r0 + bl L$0268,%r0 + nop + ldil L'LC$0110,%r26 + ldo R'LC$0110(%r26),%r26 + .CALL ARGW0=GR + bl printf_filtered,%r2 + nop +L$0268: + ldil L'LC$0066,%r26 + ldo R'LC$0066(%r26),%r26 + .CALL ARGW0=GR + bl printf_filtered,%r2 + nop + bl,n L$0263,%r0 +L$0263: +L$0229: + ldw 16(%r4),%r8 + ldw 20(%r4),%r7 + ldw 24(%r4),%r6 + ldw 28(%r4),%r5 + ldo 8(%r4),%r30 + ldw -28(%r30),%r2 + bv %r0(%r2) + ldwm -8(%r30),%r4 + .EXIT + .PROCEND + .SPACE $PRIVATE$ + .SUBSPA $BSS$ + +cplus_struct_default: .comm 24 + diff --git a/gas/testsuite/gas/hppa/parse/global.s b/gas/testsuite/gas/hppa/parse/global.s new file mode 100644 index 0000000..550c4a5 --- /dev/null +++ b/gas/testsuite/gas/hppa/parse/global.s @@ -0,0 +1,15 @@ + .SPACE $PRIVATE$ + .SUBSPA $DATA$,QUAD=1,ALIGN=8,ACCESS=31 + .SUBSPA $BSS$,QUAD=1,ALIGN=8,ACCESS=31,ZERO,SORT=82 + .SPACE $TEXT$ + .SUBSPA $LIT$,QUAD=0,ALIGN=8,ACCESS=44 + .SUBSPA $CODE$,QUAD=0,ALIGN=8,ACCESS=44,CODE_ONLY + + .SPACE $TEXT$ + .SUBSPA $CODE$ + .IMPORT foo,data + + .align 4 +; Official gas code will not accept sym-$global$. + addil L%foo-$global$,%r27 + diff --git a/gas/testsuite/gas/hppa/parse/labelbug.s b/gas/testsuite/gas/hppa/parse/labelbug.s new file mode 100644 index 0000000..3f36a71 --- /dev/null +++ b/gas/testsuite/gas/hppa/parse/labelbug.s @@ -0,0 +1,35 @@ + .SPACE $PRIVATE$ + .SUBSPA $DATA$,QUAD=1,ALIGN=8,ACCESS=31 + .SUBSPA $BSS$,QUAD=1,ALIGN=8,ACCESS=31,ZERO,SORT=82 + .SPACE $TEXT$, SORT=8 + .SUBSPA $LIT$,QUAD=0,ALIGN=8,ACCESS=44 + .SUBSPA $CODE$,QUAD=0,ALIGN=8,ACCESS=44,CODE_ONLY + + .SPACE $TEXT$ + .SUBSPA $CODE$ + + .align 4 +; A comment. This should not be interpreted as a label, but both of the +; following statements should. +label_without_colon +label_with_colon: + +; A problem tege found... +; Input scrubbing in gas makes life a real nightmare for assemblers +; in which the *position* within a line determines how to interpret +; a stream a characters. These test one particular case where gas +; had the tendency to delete the whitespace between the opcode and +; operands if a label without a colon began a line, and the operands +; started with a non-numeric character. +L$1 add %r2,%r2,%r2 +L$2: add %r2,%r2,%r2 +L$3 + add %r2,%r2,%r2 + +L$4 add %r2,%r2,%r2 +L$5: add %r2,%r2,%r2 +L$6 + add %r2,%r2,%r2 + +; An instruction or pseudo-op may begin anywhere after column 0. + b,n label_without_colon diff --git a/gas/testsuite/gas/hppa/parse/linesepbug.s b/gas/testsuite/gas/hppa/parse/linesepbug.s new file mode 100644 index 0000000..a819c15 --- /dev/null +++ b/gas/testsuite/gas/hppa/parse/linesepbug.s @@ -0,0 +1,20 @@ + .SPACE $PRIVATE$ + .SUBSPA $DATA$,QUAD=1,ALIGN=8,ACCESS=31 + .SUBSPA $BSS$,QUAD=1,ALIGN=8,ACCESS=31,ZERO,SORT=82 + .SPACE $TEXT$ + .SUBSPA $LIT$,QUAD=0,ALIGN=8,ACCESS=44 + .SUBSPA $CODE$,QUAD=0,ALIGN=8,ACCESS=44,CODE_ONLY + + .SPACE $TEXT$ + .SUBSPA $CODE$ + + .align 4 +; Basic immediate instruction tests. +; +; We could/should test some of the corner cases for register and +; immediate fields. We should also check the assorted field +; selectors to make sure they're handled correctly. + +foo: + .WORD 0 !.IMPORT $bar$,DATA + diff --git a/gas/testsuite/gas/hppa/parse/lselbug.s b/gas/testsuite/gas/hppa/parse/lselbug.s new file mode 100644 index 0000000..29cd997 --- /dev/null +++ b/gas/testsuite/gas/hppa/parse/lselbug.s @@ -0,0 +1,18 @@ + .SPACE $PRIVATE$ + .SUBSPA $DATA$,QUAD=1,ALIGN=8,ACCESS=31 + .SUBSPA $BSS$,QUAD=1,ALIGN=8,ACCESS=31,ZERO,SORT=82 + .SPACE $TEXT$ + .SUBSPA $LIT$,QUAD=0,ALIGN=8,ACCESS=44 + .SUBSPA $CODE$,QUAD=0,ALIGN=8,ACCESS=44,CODE_ONLY + + .SPACE $TEXT$ + .SUBSPA $CODE$ + + .align 4 +; In gas-1.36 the ldil instruction using parenthesis generated +; garbage bits while the one without parens worked fine. + ldil L%(0x00040000 | 0x00000008 | 0x00000002),%r21 + ldo L%(0x00040000 | 0x00000008 | 0x00000002) (%r21),%r21 + ldil L%0x00040000 | 0x00000008 | 0x00000002,%r21 + ldo L%0x00040000 | 0x00000008 | 0x00000002 (%r21),%r21 + diff --git a/gas/testsuite/gas/hppa/parse/nosubspace.s b/gas/testsuite/gas/hppa/parse/nosubspace.s new file mode 100644 index 0000000..2904603 --- /dev/null +++ b/gas/testsuite/gas/hppa/parse/nosubspace.s @@ -0,0 +1,21 @@ + .SPACE $TEXT$ + + .align 4 + .EXPORT mpn_add_n + .EXPORT mpn_add_n,PRIV_LEV=3,ARGW0=GR,ARGW1=GR,ARGW2=GR,ARGW3=GR,RTNVAL=GR +mpn_add_n: + .PROC + .CALLINFO FRAME=0,NO_CALLS + .ENTRY + + add %r0,%r0,%r0 ; reset cy +Loop: + ldws,ma 4(0,%r25),%r20 + ldws,ma 4(0,%r24),%r19 + + addc %r19,%r20,%r19 + addib,<> -1,%r23,Loop + stws,ma %r19,4(0,%r26) + + bv 0(2) + addc %r0,%r0,%r28 diff --git a/gas/testsuite/gas/hppa/parse/parse.exp b/gas/testsuite/gas/hppa/parse/parse.exp new file mode 100644 index 0000000..da4c2a7 --- /dev/null +++ b/gas/testsuite/gas/hppa/parse/parse.exp @@ -0,0 +1,222 @@ +# Copyright (C) 1993, 1996, 1997 Free Software Foundation, Inc. + +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; either version 2 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + +# Please email any bugs, comments, and/or additions to this file to: +# DejaGnu@cygnus.com + +# Written by the Center for Software Science at the University of Utah +# and by Cygnus Support. + +proc do_string_tests {} { + set testname "stringer.s: Test embedded quotes and octal escapes in strings" + set x 0 + + gas_start "stringer.s" "-al" + + # Instead of having a variable for each match string just increment the + # total number of matches seen. That's simpler when testing large numbers + # of instructions (as these tests to). + while 1 { + expect { + -re "^ +\[0-9\]+ 0000 23696E63\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 6C756465\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 6B2E6465\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 66220A00\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0014 09307831\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 3233\[^\n\]*\n" { set x [expr $x+1] } + -re "\[^\n\]*\n" { } + timeout { perror "timeout\n"; break } + eof { break } + } + } + + # This was intended to do any cleanup necessary. It kinda looks like it + # isn't needed, but just in case, please keep it in for now. + gas_finish + + # Did we find what we were looking for? If not, flunk it. + if [expr $x==6] then { pass $testname } else { fail $testname } +} + +proc do_lsel_test {} { + set testname "lselbugs.s: lselbug" + set x 0 + + gas_start "lselbug.s" "-al" + + # Make sure we correctly handle field selectors. + while 1 { + expect { + -re "^ +\[0-9\]+ 0000 22A04000\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0004 36B50100\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0008 22A04000\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 000c 36B50100\[^\n\]*\n" { set x [expr $x+1] } + -re "\[^\n\]*\n" { } + timeout { perror "timeout\n"; break } + eof { break } + } + } + + # This was intended to do any cleanup necessary. It kinda looks like it + # isn't needed, but just in case, please keep it in for now. + gas_finish + + # Did we find what we were looking for? If not, flunk it. + if [expr $x==4] then { pass $testname } else { fail $testname } +} + +proc do_valid_align_tests {} { + set testname "align1.s: valid alignment tests" + set x 0 + + gas_start "align1.s" "-al" + + # Make sure we correctly handle field selectors. + while 1 { + expect { + -re "^ +\[0-9\]+ 0000 08000240\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0008 08000240\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 1000 08000240\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0000\[^\n\]*BLOCK\[^\n\]*1024\[^\n\]*\n" + { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0400\[^\n\]*BLOCK\[^\n\]*1024\[^\n\]*\n" + { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0800\[^\n\]*BLOCK\[^\n\]*4\[^\n\]*\n" + { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0804\[^\n\]*ALIGN\[^\n\]*8\[^\n\]*\n" + { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0808\[^\n\]*BLOCK\[^\n\]*30\[^\n\]*\n" + { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0826\[^\n\]*ALIGN\[^\n\]*4\[^\n\]*\n" + { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0828\[^\n\]*BLOCK\[^\n\]*4\[^\n\]*\n" + { set x [expr $x+1] } + -re "\[^\n\]*\n" { } + timeout { perror "timeout\n"; break } + eof { break } + } + } + + # This was intended to do any cleanup necessary. It kinda looks like it + # isn't needed, but just in case, please keep it in for now. + gas_finish + + # Did we find what we were looking for? If not, flunk it. + if [expr $x==10] then { pass $testname } else { fail $testname } +} + +if [istarget hppa*-*-*] then { + # GAS-2.0 does not always parse ! as a line separator when it should. + setup_xfail hppa*-*-* + gas_test "linesepbug.s" "" "" "line separator bug" + + # Make sure GAS accepts syntax for accessing static data. + gas_test "global.s" "" "" "check for sym-\$global\$ acceptance" + + # GAS-2.0 (and 1.36 for that matter) can not handle a .proc which + # has no label before it. + gas_test "procbug.s" "" "" "Label following .proc" + + # One is required to explicitly IMPORT any non-local symbol used + # in an assembly file. Make sure we give an error if we use + # an undefined symbol. + setup_xfail hppa*-*-* + gas_test_error "undefbug.s" "" "Check for error when using undefined symbol" + + # This file has code and assembler directives before switching into any + # space/subspace pair. This should report an error for SOM (it is not + # an error for ELF. The file also has mismatched entry/exit and + # proc/procend pairs which are errors for both SOM and ELF. + gas_test_error "nosubspace.s" "" "Check for error(s) in input file " + + # This file should return errors for both the ENTRY_GR and ENTRY_FR + # directives (they are out-of-range) + gas_test_error "entrybug.s" "" "Check for error on entry_gr and entry_fr" + + # Make sure embedded quotes and octal escapes in strings work + do_string_tests + + # Make sure we do not die on a .version directive + gas_test "versionbug.s" "" "" ".version directive" + + # Make sure we give an error on a bogus .space directive. + # recent version of gas2 went into infinite loops printing + # errors on this test. + gas_test_error "spacebug.s" "" "Check for error on bogus .space directive" + + # GAS should give an error for this test. + gas_test_error "calldatabug.s" "" "Check for invalid aguments on .call" + + # Old versions of gas incorrectly gave errors on some valid .EXPORT lines + gas_test "exportbug.s" "" "" "syntax check for an old .EXPORT bug" + + # Old versions of gas choked on this file for some reason + gas_test "fixup7bug.s" "" "" "check for old \"fixup7\" gas bug" + + # Test an L% selector parsing bug which existed in gas-1.36 + do_lsel_test + + # First check how some valid alignments are handled. + do_valid_align_tests + + # Now check to make sure an invalid argument is flagged as an error. + gas_test_error "align2.s" "" "Check for error on bogus argument to .align" + + # GAS can't handle upper bound for a PA .block[z] directive + setup_xfail hppa*-*-* + gas_test "block1.s" "" "" "Check min/max values for .block" + + # Now check for an invalid argument + gas_test_error "block2.s" "" "Check for error on bogus argument to .block" + + # GAS-1.36 choked on this file. + # FIXME. Should check relocations made for this test! + gas_test "exprbug.s" "" "" "Check for sym1-sym2 acceptance" + + # Bad things happen in the PA ELF backend (others too?) if a non-default + # section is created... + setup_xfail hppa*-*-*elf* + gas_test "ssbug.s" "" "" "Check for acceptance of non-default subspaces" + + # To be compatable with certain "features" of the HP compiler + # non-existant registers should default to %r0. + gas_test "defbug.s" "" "" "Missing register should default to %%r0" + + # Make sure GAS understands a reasonable set of standard predefined + # registers. eg %rp, %dp, %sp, etc. + gas_test "stdreg.s" "" "" "Test standard predefined registers" + + # Make sure GAS will accept a label without a colon. + gas_test "labelbug.s" "" "" "Test label without colon" + + # Make sure we grok # line directives. + gas_test "appbug.s" "" "" "Test acceptance of #line directives" + + # Make sure we give errors if a floating point format is specified + # for an xmpyu instruction (integer multiple) + gas_test_error "xmpyubug.s" "" "Check for error on bogus argument to xmpyu" + + # Make sure gas handles various kinds of .reg pseudo-ops + gas_test "regpopbug.s" "" "" "Test for bugs in .reg pseudo-op" + + # Check some bugs that have appeared in parsing .callinfo directives + gas_test "callinfobug.s" "" "" "Test for bugs in .callinfo directive" + + # Check for bogus registers in single precision fmpyadd/fmpysub + # instructions + gas_test_error "badfmpyadd.s" "" "Check for error on bad fmpyadd insn" +} + diff --git a/gas/testsuite/gas/hppa/parse/procbug.s b/gas/testsuite/gas/hppa/parse/procbug.s new file mode 100644 index 0000000..5ae5057 --- /dev/null +++ b/gas/testsuite/gas/hppa/parse/procbug.s @@ -0,0 +1,16 @@ + .space $TEXT$ + .subspa $CODE$ + .align 4 + .export divu,entry + .proc + .callinfo +divu: stws,ma %r4,4(%r5) ; save registers on stack + .procend + + .export divu2,entry + .proc + .callinfo + .entry +divu2: stws,ma %r4,4(%r5) ; save registers on stack + .exit + .procend diff --git a/gas/testsuite/gas/hppa/parse/regpopbug.s b/gas/testsuite/gas/hppa/parse/regpopbug.s new file mode 100644 index 0000000..46db262 --- /dev/null +++ b/gas/testsuite/gas/hppa/parse/regpopbug.s @@ -0,0 +1,17 @@ + .SPACE $PRIVATE$ + .SUBSPA $DATA$,QUAD=1,ALIGN=8,ACCESS=31 + .SUBSPA $BSS$,QUAD=1,ALIGN=8,ACCESS=31,ZERO,SORT=82 + .SPACE $TEXT$ + .SUBSPA $LIT$,QUAD=0,ALIGN=8,ACCESS=44 + .SUBSPA $CODE$,QUAD=0,ALIGN=8,ACCESS=44,CODE_ONLY + + .SPACE $TEXT$ + .SUBSPA $CODE$ + +r0 .reg %r0 +shift .reg %sar +fpreg10 .reg %fr10 +shift2 .reg shift + +; Make sure we didn't botch .equ... +yabba .equ r0 + shift diff --git a/gas/testsuite/gas/hppa/parse/spacebug.s b/gas/testsuite/gas/hppa/parse/spacebug.s new file mode 100644 index 0000000..183b401 --- /dev/null +++ b/gas/testsuite/gas/hppa/parse/spacebug.s @@ -0,0 +1,3 @@ +start: .long 0, 1, 2, 3, 4, 5, 6, 7 + .space 0x20 - (. - start) +foo: .long 42 diff --git a/gas/testsuite/gas/hppa/parse/ssbug.s b/gas/testsuite/gas/hppa/parse/ssbug.s new file mode 100644 index 0000000..1960e0d --- /dev/null +++ b/gas/testsuite/gas/hppa/parse/ssbug.s @@ -0,0 +1,10 @@ + .SPACE $PRIVATE$ + .SUBSPA $DATA$,QUAD=1,ALIGN=8,ACCESS=31 + .SUBSPA $BSS$,QUAD=1,ALIGN=8,ACCESS=31,ZERO,SORT=82 + .SUBSPA $SHORTBSS$,QUAD=1,ALIGN=8,ACCESS=31,ZERO,SORT=80 + .SPACE $TEXT$ + .SUBSPA $LIT$,QUAD=0,ALIGN=8,ACCESS=44 + .SUBSPA $CODE$,QUAD=0,ALIGN=8,ACCESS=44,CODE_ONLY + + + diff --git a/gas/testsuite/gas/hppa/parse/stdreg.s b/gas/testsuite/gas/hppa/parse/stdreg.s new file mode 100644 index 0000000..e42978e --- /dev/null +++ b/gas/testsuite/gas/hppa/parse/stdreg.s @@ -0,0 +1,27 @@ + .SPACE $PRIVATE$ + .SUBSPA $DATA$,QUAD=1,ALIGN=8,ACCESS=31 + .SUBSPA $BSS$,QUAD=1,ALIGN=8,ACCESS=31,ZERO,SORT=82 + .SPACE $TEXT$ + .SUBSPA $LIT$,QUAD=0,ALIGN=8,ACCESS=44 + .SUBSPA $CODE$,QUAD=0,ALIGN=8,ACCESS=44,CODE_ONLY + + .SPACE $TEXT$ + .SUBSPA $CODE$ + + .align 4 + .export foo +foo: + .proc + .callinfo no_calls + .entry + ldi 15,%sp + ldi 15,%rp + ldi 15,%dp + ldi 15,%ret0 + ldi 15,%ret1 + ldi 15,%arg0 + ldi 15,%arg1 + ldi 15,%arg2 + ldi 15,%arg3 + .exit + .procend diff --git a/gas/testsuite/gas/hppa/parse/stringer.s b/gas/testsuite/gas/hppa/parse/stringer.s new file mode 100644 index 0000000..06c5e6d --- /dev/null +++ b/gas/testsuite/gas/hppa/parse/stringer.s @@ -0,0 +1,19 @@ + .SPACE $PRIVATE$ + .SUBSPA $DATA$,QUAD=1,ALIGN=8,ACCESS=31 + .SUBSPA $BSS$,QUAD=1,ALIGN=8,ACCESS=31,ZERO,SORT=82 + .SPACE $TEXT$ + .SUBSPA $LIT$,QUAD=0,ALIGN=8,ACCESS=44 + .SUBSPA $CODE$,QUAD=0,ALIGN=8,ACCESS=44,CODE_ONLY + + .SPACE $PRIVATE$ + .SUBSPA $DATA$ + + +; GAS used to mis-parse the embedded quotes + .STRING "#include \"awk.def\"\x0a\x00" + +; Octal escapes used to consume > 3 chars which led to this +; string being screwed in a big way. + .STRING "\0110x123" + + diff --git a/gas/testsuite/gas/hppa/parse/undefbug.s b/gas/testsuite/gas/hppa/parse/undefbug.s new file mode 100644 index 0000000..d5eda92 --- /dev/null +++ b/gas/testsuite/gas/hppa/parse/undefbug.s @@ -0,0 +1,14 @@ + .SPACE $PRIVATE$ + .SUBSPA $DATA$,QUAD=1,ALIGN=8,ACCESS=31 + .SUBSPA $BSS$,QUAD=1,ALIGN=8,ACCESS=31,ZERO,SORT=82 + .SPACE $TEXT$ + .SUBSPA $LIT$,QUAD=0,ALIGN=8,ACCESS=44 + .SUBSPA $CODE$,QUAD=0,ALIGN=8,ACCESS=44,CODE_ONLY + + .SPACE $TEXT$ + .SUBSPA $CODE$ + + .align 4 + bl somewhere,%r2 + nop + diff --git a/gas/testsuite/gas/hppa/parse/versionbug.s b/gas/testsuite/gas/hppa/parse/versionbug.s new file mode 100644 index 0000000..9fef1b7 --- /dev/null +++ b/gas/testsuite/gas/hppa/parse/versionbug.s @@ -0,0 +1,9 @@ + .SPACE $PRIVATE$ + .SUBSPA $DATA$,QUAD=1,ALIGN=8,ACCESS=31 + .SUBSPA $BSS$,QUAD=1,ALIGN=8,ACCESS=31,ZERO,SORT=82 + .SPACE $TEXT$ + .SUBSPA $LIT$,QUAD=0,ALIGN=8,ACCESS=44 + .SUBSPA $CODE$,QUAD=0,ALIGN=8,ACCESS=44,CODE_ONLY + + .VERSION "abc123" + diff --git a/gas/testsuite/gas/hppa/parse/xmpyubug.s b/gas/testsuite/gas/hppa/parse/xmpyubug.s new file mode 100644 index 0000000..3ee7274 --- /dev/null +++ b/gas/testsuite/gas/hppa/parse/xmpyubug.s @@ -0,0 +1,17 @@ + .SPACE $PRIVATE$ + .SUBSPA $DATA$,QUAD=1,ALIGN=8,ACCESS=31 + .SUBSPA $BSS$,QUAD=1,ALIGN=8,ACCESS=31,ZERO,SORT=82 + .SPACE $TEXT$ + .SUBSPA $LIT$,QUAD=0,ALIGN=8,ACCESS=44 + .SUBSPA $CODE$,QUAD=0,ALIGN=8,ACCESS=44,CODE_ONLY + + .SPACE $TEXT$ + .SUBSPA $CODE$ + + .align 4 +; No format selector for xmpyu! + xmpyu,sgl %fr4,%fr5,%fr6 + xmpyu,dbl %fr4,%fr5,%fr6 + xmpyu,quad %fr4,%fr5,%fr6 + + diff --git a/gas/testsuite/gas/hppa/reloc/applybug.s b/gas/testsuite/gas/hppa/reloc/applybug.s new file mode 100644 index 0000000..f8ed6e8 --- /dev/null +++ b/gas/testsuite/gas/hppa/reloc/applybug.s @@ -0,0 +1,130 @@ + .SPACE $PRIVATE$ + .SUBSPA $DATA$,QUAD=1,ALIGN=8,ACCESS=31 + .SUBSPA $BSS$,QUAD=1,ALIGN=8,ACCESS=31,ZERO,SORT=82 + .SPACE $TEXT$ + .SUBSPA $LIT$,QUAD=0,ALIGN=8,ACCESS=44 + .SUBSPA $CODE$,QUAD=0,ALIGN=8,ACCESS=44,CODE_ONLY + .IMPORT $global$,DATA + .IMPORT $$dyncall,MILLICODE +; gcc_compiled.: + .SPACE $PRIVATE$ + .SUBSPA $DATA$ + + .align 4 +tab___2 + .word L$0002 + .word L$0003 + .word L$0004 + .SPACE $TEXT$ + .SUBSPA $CODE$ + + .align 4 + .EXPORT execute,CODE + .EXPORT execute,ENTRY,PRIV_LEV=3,ARGW0=GR,RTNVAL=GR +execute + .PROC + .CALLINFO FRAME=0,NO_CALLS + .ENTRY + addil L'buf-$global$,%r27 + ldo R'buf-$global$(%r1),%r20 + ldil L'L$0002,%r19 + movb,<> %r26,%r26,L$0002 + ldo R'L$0002(%r19),%r22 + copy %r0,%r21 + addil L'tab___2-$global$,%r27 + ldo R'tab___2-$global$(%r1),%r23 + addil L'optab-$global$,%r27 + ldo R'optab-$global$(%r1),%r20 +L$0009 + sh2add %r21,%r23,%r19 + ldh 2(%r19),%r19 + ldo 1(%r21),%r21 + sub %r19,%r22,%r19 + comib,>= 2,%r21,L$0009 + sths,ma %r19,2(%r20) + bv,n %r0(%r2) +L$0002 + ldi 120,%r19 + stbs,ma %r19,1(%r20) + ldhs,ma 2(%r26),%r19 + add %r22,%r19,%r19 + bv,n %r0(%r19) +L$0003 + ldi 121,%r19 + stbs,ma %r19,1(%r20) + ldhs,ma 2(%r26),%r19 + add %r22,%r19,%r19 + bv,n %r0(%r19) +L$0004 + ldi 122,%r19 + stb %r19,0(%r20) + bv %r0(%r2) + stbs,mb %r0,1(%r20) + .EXIT + .PROCEND + .IMPORT __main,CODE + .IMPORT strcmp,CODE + .SPACE $TEXT$ + .SUBSPA $LIT$ + + .align 4 +L$C0000 + .STRING "xyxyz\x00" + .IMPORT abort,CODE + .IMPORT exit,CODE + .SPACE $TEXT$ + .SUBSPA $CODE$ + + .align 4 + .EXPORT main,CODE + .EXPORT main,ENTRY,PRIV_LEV=3,RTNVAL=GR +main + .PROC + .CALLINFO FRAME=128,CALLS,SAVE_RP + .ENTRY + stw %r2,-20(%r30) + .CALL + bl __main,%r2 + ldo 128(%r30),%r30 + .CALL ARGW0=GR + bl execute,%r2 + copy %r0,%r26 + addil L'optab-$global$,%r27 + copy %r1,%r19 + ldo R'optab-$global$(%r19),%r21 + ldh 2(%r21),%r20 + ldh R'optab-$global$(%r19),%r19 + addil L'p-$global$,%r27 + copy %r1,%r22 + sth %r20,R'p-$global$(%r22) + ldo R'p-$global$(%r22),%r26 + sth %r20,4(%r26) + sth %r19,2(%r26) + ldh 4(%r21),%r19 + .CALL ARGW0=GR + bl execute,%r2 + sth %r19,6(%r26) + addil L'buf-$global$,%r27 + copy %r1,%r19 + ldo R'buf-$global$(%r19),%r26 + ldil L'L$C0000,%r25 + .CALL ARGW0=GR,ARGW1=GR + bl strcmp,%r2 + ldo R'L$C0000(%r25),%r25 + comib,=,n 0,%r28,L$0011 + .CALL + bl abort,%r2 + nop +L$0011 + .CALL ARGW0=GR + bl exit,%r2 + copy %r0,%r26 + nop + .EXIT + .PROCEND + .SPACE $PRIVATE$ + .SUBSPA $BSS$ + +optab .comm 10 +buf .comm 10 +p .comm 10 diff --git a/gas/testsuite/gas/hppa/reloc/blebug.s b/gas/testsuite/gas/hppa/reloc/blebug.s new file mode 100644 index 0000000..0930774 --- /dev/null +++ b/gas/testsuite/gas/hppa/reloc/blebug.s @@ -0,0 +1,16 @@ + .SPACE $PRIVATE$ + .SUBSPA $DATA$,QUAD=1,ALIGN=8,ACCESS=31 + .SUBSPA $BSS$,QUAD=1,ALIGN=8,ACCESS=31,ZERO,SORT=82 + .SPACE $TEXT$ + .SUBSPA $LIT$,QUAD=0,ALIGN=8,ACCESS=44 + .SUBSPA $CODE$,QUAD=0,ALIGN=8,ACCESS=44,CODE_ONLY + + .SPACE $TEXT$ + .SUBSPA $CODE$ + + .align 4 + .IMPORT $$dyncall,MILLICODE ; Code for dynamic function calls. + +_sigtramp: + ldil L%$$dyncall,%r2 ; whose address is in r22. + ble R%$$dyncall(%sr4,%r2) diff --git a/gas/testsuite/gas/hppa/reloc/blebug2.s b/gas/testsuite/gas/hppa/reloc/blebug2.s new file mode 100644 index 0000000..9577b53 --- /dev/null +++ b/gas/testsuite/gas/hppa/reloc/blebug2.s @@ -0,0 +1,14 @@ + .SPACE $PRIVATE$ + .SUBSPA $DATA$,QUAD=1,ALIGN=8,ACCESS=31 + .SUBSPA $BSS$,QUAD=1,ALIGN=8,ACCESS=31,ZERO,SORT=82 + .SPACE $TEXT$ + .SUBSPA $LIT$,QUAD=0,ALIGN=8,ACCESS=44 + .SUBSPA $CODE$,QUAD=0,ALIGN=8,ACCESS=44,CODE_ONLY + + .SPACE $TEXT$ + .SUBSPA $CODE$ + + .align 4 + + ldil L%0xc0001004,%r1 + ble R%0xc0001004(%sr7,%r1) diff --git a/gas/testsuite/gas/hppa/reloc/blebug3.s b/gas/testsuite/gas/hppa/reloc/blebug3.s new file mode 100644 index 0000000..5ee9b3b --- /dev/null +++ b/gas/testsuite/gas/hppa/reloc/blebug3.s @@ -0,0 +1,14 @@ + .SPACE $PRIVATE$ + .SUBSPA $DATA$,QUAD=1,ALIGN=8,ACCESS=31 + .SUBSPA $BSS$,QUAD=1,ALIGN=8,ACCESS=31,ZERO,SORT=82 + .SPACE $TEXT$ + .SUBSPA $LIT$,QUAD=0,ALIGN=8,ACCESS=44 + .SUBSPA $CODE$,QUAD=0,ALIGN=8,ACCESS=44,CODE_ONLY + + .SPACE $TEXT$ + .SUBSPA $CODE$ + + .align 4 + .import yabba,code + + ble R%yabba(%sr4,%r0) diff --git a/gas/testsuite/gas/hppa/reloc/exitbug.s b/gas/testsuite/gas/hppa/reloc/exitbug.s new file mode 100644 index 0000000..8898e35 --- /dev/null +++ b/gas/testsuite/gas/hppa/reloc/exitbug.s @@ -0,0 +1,19 @@ + .SPACE $PRIVATE$ + .SUBSPA $DATA$,QUAD=1,ALIGN=8,ACCESS=31 + .SUBSPA $BSS$,QUAD=1,ALIGN=8,ACCESS=31,ZERO,SORT=82 + .SPACE $TEXT$ + .SUBSPA $LIT$,QUAD=0,ALIGN=8,ACCESS=44 + .SUBSPA $CODE$,QUAD=0,ALIGN=8,ACCESS=44,CODE_ONLY + .IMPORT $global$,DATA + .IMPORT $$dyncall,MILLICODE +; gcc_compiled.: + .SPACE $TEXT$ + .SUBSPA $CODE$ + + .align 4 + .EXPORT foo,CODE + .EXPORT foo,ENTRY,PRIV_LEV=3 +foo: + .PROC + .CALLINFO FRAME=0 + .PROCEND diff --git a/gas/testsuite/gas/hppa/reloc/fixupbug.s b/gas/testsuite/gas/hppa/reloc/fixupbug.s new file mode 100644 index 0000000..8a58d02 --- /dev/null +++ b/gas/testsuite/gas/hppa/reloc/fixupbug.s @@ -0,0 +1,19 @@ + .SPACE $PRIVATE$ + .SUBSPA $DATA$,QUAD=1,ALIGN=8,ACCESS=31 + .SUBSPA $BSS$,QUAD=1,ALIGN=8,ACCESS=31,ZERO,SORT=82 + .SPACE $TEXT$ + .SUBSPA $LIT$,QUAD=0,ALIGN=8,ACCESS=44 + .SUBSPA $CODE$,QUAD=0,ALIGN=8,ACCESS=44,CODE_ONLY + .SUBSPA $MILLICODE$,QUAD=0,ALIGN=8,ACCESS=44,SORT=8 + + .SPACE $TEXT$ + .SUBSPA $CODE$ + + b,n $$foo + nop + nop + + .SPACE $TEXT$ + .SUBSPA $MILLICODE$ +$$foo: + nop diff --git a/gas/testsuite/gas/hppa/reloc/funcrelocbug.s b/gas/testsuite/gas/hppa/reloc/funcrelocbug.s new file mode 100644 index 0000000..46a43bc6 --- /dev/null +++ b/gas/testsuite/gas/hppa/reloc/funcrelocbug.s @@ -0,0 +1,186 @@ + .SPACE $PRIVATE$ + .SUBSPA $DATA$,QUAD=1,ALIGN=8,ACCESS=31 + .SUBSPA $BSS$,QUAD=1,ALIGN=8,ACCESS=31,ZERO,SORT=82 + .SPACE $TEXT$ + .SUBSPA $LIT$,QUAD=0,ALIGN=8,ACCESS=44 + .SUBSPA $CODE$,QUAD=0,ALIGN=8,ACCESS=44,CODE_ONLY + .IMPORT $global$,DATA + .IMPORT $$dyncall,MILLICODE +; gcc_compiled.: + .SPACE $TEXT$ + .SUBSPA $CODE$ + + .align 4 + .EXPORT g,CODE + .EXPORT g,ENTRY,PRIV_LEV=3,ARGW0=GR,ARGW1=GR,ARGW2=GR,RTNVAL=GR +g + .PROC + .CALLINFO FRAME=128,CALLS,SAVE_RP,SAVE_SP,ENTRY_GR=3 + .ENTRY + stw %r2,-20(%r30) + copy %r3,%r1 + copy %r30,%r3 + stwm %r1,128(%r30) + stw %r26,-36(%r3) + stw %r25,-40(%r3) + stw %r24,-44(%r3) + ldw -36(%r3),%r26 + ldw -40(%r3),%r25 + ldw -44(%r3),%r19 + copy %r19,%r22 + .CALL ARGW0=GR + bl $$dyncall,%r31 + copy %r31,%r2 + copy %r28,%r19 + comiclr,<> 0,%r19,%r0 + bl,n L$0002,%r0 + ldw -36(%r3),%r28 + bl,n L$0001,%r0 + bl,n L$0003,%r0 +L$0002 + ldw -40(%r3),%r28 + bl,n L$0001,%r0 +L$0003 +L$0001 + ldw -20(%r3),%r2 + ldo 64(%r3),%r30 + ldwm -64(%r30),%r3 + bv,n %r0(%r2) + .EXIT + .PROCEND + .align 4 +f2___4 + .PROC + .CALLINFO FRAME=64,NO_CALLS,SAVE_SP,ENTRY_GR=3 + .ENTRY + copy %r3,%r1 + copy %r30,%r3 + stwm %r1,64(%r30) + stw %r29,8(%r3) + stw %r26,-36(%r3) + stw %r25,-40(%r3) + ldw -36(%r3),%r19 + ldw -40(%r3),%r20 + comclr,>= %r20,%r19,%r19 + ldi 1,%r19 + copy %r19,%r28 + bl,n L$0005,%r0 +L$0005 + ldo 64(%r3),%r30 + ldwm -64(%r30),%r3 + bv,n %r0(%r2) + .EXIT + .PROCEND + .IMPORT abort,CODE + .SPACE $PRIVATE$ + .SUBSPA $DATA$ + + .align 4 +L$TRAMP0000 + ldw 36(%r22),%r21 + bb,>=,n %r21,30,.+16 + depi 0,31,2,%r21 + ldw 4(%r21),%r19 + ldw 0(%r21),%r21 + ldsid (%r21),%r1 + mtsp %r1,%sr0 + be 0(%sr0,%r21) + ldw 40(%r22),%r29 + .word 0 + .word 0 + .SPACE $TEXT$ + .SUBSPA $CODE$ + + .align 4 + .EXPORT f,CODE + .EXPORT f,ENTRY,PRIV_LEV=3,RTNVAL=GR +f + .PROC + .CALLINFO FRAME=192,CALLS,SAVE_RP,SAVE_SP,ENTRY_GR=3 + .ENTRY + stw %r2,-20(%r30) + copy %r3,%r1 + copy %r30,%r3 + stwm %r1,192(%r30) + ldo 16(%r3),%r19 + addil L'L$TRAMP0000-$global$,%r27 + ldo R'L$TRAMP0000-$global$(%r1),%r22 + ldo 40(%r0),%r20 + ldws,ma 4(%r22),%r21 + addib,>= -4,%r20,.-4 + stws,ma %r21,4(%r19) + ldil L'f2___4,%r20 + ldo R'f2___4(%r20),%r19 + stw %r19,52(%r3) + ldo 8(%r3),%r19 + stw %r19,56(%r3) + ldo 16(%r3),%r19 + ldo 48(%r3),%r20 + fdc %r0(%r19) + fdc %r0(%r20) + sync + ldo 32(%r19),%r22 + mfsp %sr0,%r21 + ldsid (%r19),%r20 + mtsp %r20,%sr0 + fic %r0(%sr0,%r19) + fic %r0(%sr0,%r22) + sync + mtsp %r21,%sr0 + nop + nop + nop + nop + nop + nop + ldo 16(%r3),%r19 + ldi 1,%r26 + ldi 2,%r25 + copy %r19,%r24 + .CALL ARGW0=NO,ARGW1=NO,ARGW2=NO,ARGW3=NO + bl g,%r2 + nop + copy %r28,%r19 + comiclr,<> 2,%r19,%r0 + bl,n L$0006,%r0 + .CALL ARGW0=NO,ARGW1=NO,ARGW2=NO,ARGW3=NO + bl abort,%r2 + nop +L$0006 +L$0004 + ldw -20(%r3),%r2 + ldo 64(%r3),%r30 + ldwm -64(%r30),%r3 + bv,n %r0(%r2) + .EXIT + .PROCEND + .IMPORT __main,CODE + .IMPORT exit,CODE + .align 4 + .EXPORT main,CODE + .EXPORT main,ENTRY,PRIV_LEV=3,RTNVAL=GR +main + .PROC + .CALLINFO FRAME=128,CALLS,SAVE_RP,SAVE_SP,ENTRY_GR=3 + .ENTRY + stw %r2,-20(%r30) + copy %r3,%r1 + copy %r30,%r3 + stwm %r1,128(%r30) + .CALL ARGW0=NO,ARGW1=NO,ARGW2=NO,ARGW3=NO + bl __main,%r2 + nop + .CALL ARGW0=NO,ARGW1=NO,ARGW2=NO,ARGW3=NO + bl f,%r2 + nop + copy %r0,%r26 + .CALL ARGW0=NO,ARGW1=NO,ARGW2=NO,ARGW3=NO + bl exit,%r2 + nop +L$0007 + ldw -20(%r3),%r2 + ldo 64(%r3),%r30 + ldwm -64(%r30),%r3 + bv,n %r0(%r2) + .EXIT + .PROCEND diff --git a/gas/testsuite/gas/hppa/reloc/labelopbug.s b/gas/testsuite/gas/hppa/reloc/labelopbug.s new file mode 100644 index 0000000..3cdc421 --- /dev/null +++ b/gas/testsuite/gas/hppa/reloc/labelopbug.s @@ -0,0 +1,37 @@ + .SPACE $PRIVATE$ + .SUBSPA $DATA$,QUAD=1,ALIGN=8,ACCESS=31 + .SUBSPA $BSS$,QUAD=1,ALIGN=8,ACCESS=31,ZERO,SORT=82 + .SPACE $TEXT$ + .SUBSPA $LIT$,QUAD=0,ALIGN=8,ACCESS=44 + .SUBSPA $CODE$,QUAD=0,ALIGN=8,ACCESS=44,CODE_ONLY + .IMPORT $global$,DATA + .IMPORT $$dyncall,MILLICODE +; gcc_compiled.: + .SPACE $TEXT$ + .SUBSPA $CODE$ + + .align 4 +s: + .PROC + .CALLINFO FRAME=128,CALLS,SAVE_RP + .ENTRY + stw %r2,-20(%r30) + copy %r4,%r1 + copy %r30,%r4 + stwm %r1,128(%r30) + stw %r30,12(%r4) + ldil L'L$0007,%r19 + ldo R'L$0007(%r19),%r19 + comib,>= 0,%r26,L$0002 + stw %r19,8(%r4) +L$0003: +L$0002: + b L$0001 + ldo 1(%r0),%r28 +L$0007: + ldil L'L$0002,%r19 + ldo R'L$0002(%r19),%r19 + comb,= %r29,%r19,L$0002 + ldo -8(%r4),%r4 + .EXIT + .PROCEND diff --git a/gas/testsuite/gas/hppa/reloc/longcall.s b/gas/testsuite/gas/hppa/reloc/longcall.s new file mode 100644 index 0000000..fc3996f --- /dev/null +++ b/gas/testsuite/gas/hppa/reloc/longcall.s @@ -0,0 +1,40 @@ + .SPACE $PRIVATE$ + .SUBSPA $DATA$,QUAD=1,ALIGN=8,ACCESS=31 + .SUBSPA $BSS$,QUAD=1,ALIGN=8,ACCESS=31,ZERO,SORT=82 + .SPACE $TEXT$ + .SUBSPA $LIT$,QUAD=0,ALIGN=8,ACCESS=44 + .SUBSPA $CODE$,QUAD=0,ALIGN=8,ACCESS=44,CODE_ONLY + .IMPORT $global$,DATA + .IMPORT $$dyncall,MILLICODE +; gcc_compiled.: + .IMPORT bar,CODE + .SPACE $TEXT$ + .SUBSPA $CODE$ + + .align 4 + .EXPORT foo,CODE + .EXPORT foo,ENTRY,PRIV_LEV=3,RTNVAL=GR +foo + .PROC + .CALLINFO FRAME=64,CALLS,SAVE_RP + .ENTRY + stw %r2,-20(%r30) + .CALL + bl bar,%r2 + ldo 64(%r30),%r30 + .blockz 262144 + ldw -84(%r30),%r2 + bv %r0(%r2) + ldo -64(%r30),%r30 + .EXIT + .PROCEND + .align 4 + .EXPORT bar,CODE + .EXPORT bar,ENTRY,PRIV_LEV=3,RTNVAL=GR +bar + .PROC + .CALLINFO FRAME=0,NO_CALLS + .ENTRY + bv,n %r0(%r2) + .EXIT + .PROCEND diff --git a/gas/testsuite/gas/hppa/reloc/picreloc.s b/gas/testsuite/gas/hppa/reloc/picreloc.s new file mode 100644 index 0000000..639a44c --- /dev/null +++ b/gas/testsuite/gas/hppa/reloc/picreloc.s @@ -0,0 +1,13 @@ + + .SPACE $TEXT$,SORT=8 + .SUBSPA $CODE$,QUAD=0,ALIGN=4,ACCESS=0x2c,CODE_ONLY,SORT=24 + .SPACE $PRIVATE$,SORT=16 + .SUBSPA $DATA$,QUAD=1,ALIGN=8,ACCESS=0x1f,SORT=16 +bogo + .ALIGN 8 + .WORD bogo+4 ; = 0x4 + .STRING "\x00\x00\x00{\x00\x00\x01\xC8\x00\x00\x03\x15" + .SPACE $PRIVATE$ + .SUBSPA $DATA$ + .EXPORT bogo + .END diff --git a/gas/testsuite/gas/hppa/reloc/plabelbug.s b/gas/testsuite/gas/hppa/reloc/plabelbug.s new file mode 100644 index 0000000..ee05b32 --- /dev/null +++ b/gas/testsuite/gas/hppa/reloc/plabelbug.s @@ -0,0 +1,47 @@ + .SPACE $PRIVATE$ + .SUBSPA $DATA$,QUAD=1,ALIGN=8,ACCESS=31 + .SUBSPA $BSS$,QUAD=1,ALIGN=8,ACCESS=31,ZERO,SORT=82 + .SPACE $TEXT$ + .SUBSPA $LIT$,QUAD=0,ALIGN=8,ACCESS=44 + .SUBSPA $CODE$,QUAD=0,ALIGN=8,ACCESS=44,CODE_ONLY + .IMPORT $global$,DATA + .IMPORT $$dyncall,MILLICODE +; gcc_compiled.: + .IMPORT abort,CODE + .EXPORT f,DATA + .SPACE $PRIVATE$ + .SUBSPA $DATA$ + + .align 4 +f: + .word P%abort + .word P%abort + .IMPORT __main,CODE + .IMPORT printf,CODE + .SPACE $TEXT$ + .SUBSPA $CODE$ + + .align 4 +LC$0000: + .STRING "frob\x0a\x00" + .align 4 + .EXPORT main,CODE + .EXPORT main,ENTRY,PRIV_LEV=3,RTNVAL=GR +main: + .PROC + .CALLINFO FRAME=128,CALLS,SAVE_RP + .ENTRY + stw %r2,-20(%r30) + ldo 128(%r30),%r30 + .CALL + bl __main,%r2 + nop + ldil L'LC$0000,%r26 + .CALL ARGW0=GR + bl printf,%r2 + ldo R'LC$0000(%r26),%r26 + ldw -148(%r30),%r2 + bv %r0(%r2) + ldo -128(%r30),%r30 + .EXIT + .PROCEND diff --git a/gas/testsuite/gas/hppa/reloc/r_no_reloc.s b/gas/testsuite/gas/hppa/reloc/r_no_reloc.s new file mode 100644 index 0000000..026f2d0 --- /dev/null +++ b/gas/testsuite/gas/hppa/reloc/r_no_reloc.s @@ -0,0 +1,45 @@ + .COPYRIGHT "MetaWare Incorporated, 1992" + .VERSION "hc2.6a -O1 t3.c\n" + + .SPACE $PRIVATE$,SORT=16 + .SUBSPA $BSS$,QUAD=1,ALIGN=8,ACCESS=0x1F,SORT=80,ZERO + .SUBSPA $DATA$,QUAD=1,ALIGN=8,ACCESS=0x1F,SORT=16 + + .SPACE $TEXT$,SORT=8 + .SUBSPA $CODE$,QUAD=0,ALIGN=4,ACCESS=44,CODE_ONLY,SORT=24 + + .SPACE $PRIVATE$ + .SUBSPA $DATA$ + .ALIGN 8 +$L00DATA + .ALIGN 8 + .EXPORT s +s + .WORD 0x0 + .BLOCKZ 786425 + .BLOCKZ 7 + + .SPACE $TEXT$ + .SUBSPA $CODE$ +L$001.3 +g .PROC + .CALLINFO FRAME=0,NO_CALLS + .ENTRY + ;ldo 120(%r0),%r28 --> to delay slot + bv %r0(%r2) + .EXIT + ldo 120(%r0),%r28 + .PROCEND + + + .SPACE $PRIVATE$ + .SUBSPA $DATA$ + .ALIGN 4 + .EXPORT l +l + .WORD P'g + .IMPORT common,DATA ; common section, size=0 + .IMPORT $global$,DATA + .EXPORT g,ENTRY,PRIV_LEV=3,RTNVAL=GR + .END + diff --git a/gas/testsuite/gas/hppa/reloc/reduce.s b/gas/testsuite/gas/hppa/reloc/reduce.s new file mode 100644 index 0000000..737752f --- /dev/null +++ b/gas/testsuite/gas/hppa/reloc/reduce.s @@ -0,0 +1,48 @@ + .SPACE $PRIVATE$ + .SUBSPA $DATA$,QUAD=1,ALIGN=8,ACCESS=31 + .SUBSPA $BSS$,QUAD=1,ALIGN=8,ACCESS=31,ZERO,SORT=82 + .SPACE $TEXT$ + .SUBSPA $LIT$,QUAD=0,ALIGN=8,ACCESS=44 + .SUBSPA $CODE$,QUAD=0,ALIGN=8,ACCESS=44,CODE_ONLY + .IMPORT $global$,DATA + .IMPORT $$dyncall,MILLICODE +; gcc_compiled.: + .SPACE $TEXT$ + .SUBSPA $CODE$ + + .align 4 + .PARAM foo,RTNVAL=GR +foo: + .PROC + .CALLINFO FRAME=0,NO_CALLS + .ENTRY + bv,n %r0(%r2) + .EXIT + .PROCEND + .SPACE $TEXT$ + .SUBSPA $CODE$ + + .align 4 +LC$0000: + .word P%foo + .SPACE $TEXT$ + .SUBSPA $CODE$ + + .align 4 + .EXPORT bar,CODE + .EXPORT bar,ENTRY,PRIV_LEV=3,RTNVAL=GR +bar: + .PROC + .CALLINFO FRAME=128,CALLS,SAVE_RP + .ENTRY + ldil L'LC$0000,%r19 + ldw R'LC$0000(%r19),%r26 + stw %r2,-20(%r30) + .CALL ARGW0=GR + bl foo,%r2 + ldo 128(%r30),%r30 + ldw -148(%r30),%r2 + bv %r0(%r2) + ldo -128(%r30),%r30 + .EXIT + .PROCEND diff --git a/gas/testsuite/gas/hppa/reloc/reduce2.s b/gas/testsuite/gas/hppa/reloc/reduce2.s new file mode 100644 index 0000000..6c3fa37 --- /dev/null +++ b/gas/testsuite/gas/hppa/reloc/reduce2.s @@ -0,0 +1,80 @@ + .SPACE $PRIVATE$ + .SUBSPA $DATA$,QUAD=1,ALIGN=8,ACCESS=31 + .SUBSPA $BSS$,QUAD=1,ALIGN=8,ACCESS=31,ZERO,SORT=82 + .SPACE $TEXT$ + .SUBSPA $LIT$,QUAD=0,ALIGN=8,ACCESS=44 + .SUBSPA $CODE$,QUAD=0,ALIGN=8,ACCESS=44,CODE_ONLY + .IMPORT $global$,DATA + .IMPORT $$dyncall,MILLICODE +; gcc_compiled.: + .SPACE $TEXT$ + .SUBSPA $LIT$ + + .align 8 +L$P0000 + .word 0x12345678 + .word 0x0 + + .align 8 +L$C0000 + .word 0x3ff00000 + .word 0x0 + .SPACE $TEXT$ + .SUBSPA $CODE$ + + .align 4 + .EXPORT g,ENTRY,PRIV_LEV=3,RTNVAL=FR +g + .PROC + .CALLINFO FRAME=0,NO_CALLS + .ENTRY + stw %r19,-32(%r30) + ldw T'L$C0000(%r19),%r20 + bv %r0(%r2) + fldds 0(%r20),%fr4 + .EXIT + .PROCEND + .IMPORT abort,CODE + .IMPORT exit,CODE + .SPACE $TEXT$ + .SUBSPA $LIT$ + + .align 8 +L$C0001 + .word 0x3ff00000 + .word 0x0 + .SPACE $TEXT$ + .SUBSPA $CODE$ + + .align 4 + .EXPORT main,ENTRY,PRIV_LEV=3,RTNVAL=GR +main + .PROC + .CALLINFO FRAME=128,CALLS,SAVE_RP,ENTRY_GR=3 + .ENTRY + stw %r2,-20(%r30) + ldo 128(%r30),%r30 + stw %r19,-32(%r30) + stw %r4,-128(%r30) + + copy %r19,%r4 + .CALL + bl g,%r2 + copy %r4,%r19 + copy %r4,%r19 + ldw T'L$C0001(%r19),%r20 + fldds 0(%r20),%fr8 + fcmp,dbl,= %fr4,%fr8 + ftest + add,tr %r0,%r0,%r0 + b,n L$0003 + .CALL + bl abort,%r2 + nop +L$0003 + .CALL ARGW0=GR + bl exit,%r2 + ldi 0,%r26 + nop + .EXIT + .PROCEND diff --git a/gas/testsuite/gas/hppa/reloc/reduce3.s b/gas/testsuite/gas/hppa/reloc/reduce3.s new file mode 100644 index 0000000..9671e78 --- /dev/null +++ b/gas/testsuite/gas/hppa/reloc/reduce3.s @@ -0,0 +1,51 @@ + .SPACE $PRIVATE$ + .SUBSPA $DATA$,QUAD=1,ALIGN=8,ACCESS=31 + .SUBSPA $BSS$,QUAD=1,ALIGN=8,ACCESS=31,ZERO,SORT=82 + .SPACE $TEXT$ + .SUBSPA $LIT$,QUAD=0,ALIGN=8,ACCESS=44 + .SUBSPA $CODE$,QUAD=0,ALIGN=8,ACCESS=44,CODE_ONLY + .IMPORT $global$,DATA + .IMPORT $$dyncall,MILLICODE +; gcc_compiled.: + .EXPORT blah,DATA + .SPACE $PRIVATE$ + .SUBSPA $DATA$ + + .align 8 +blah + ; .double 0e+00 + .word 0 ; = 0x0 + .word 0 ; = 0x0 + .EXPORT foo,DATA + .align 8 +foo + ; .double 0e+00 + .word 0 ; = 0x0 + .word 0 ; = 0x0 + .EXPORT yabba,DATA + .align 4 +yabba + .word 1 + .SPACE $TEXT$ + .SUBSPA $CODE$ + + .align 4 + .EXPORT bar,CODE + .EXPORT bar,ENTRY,PRIV_LEV=3,RTNVAL=GR +bar + .PROC + .CALLINFO FRAME=64,NO_CALLS,SAVE_SP,ENTRY_GR=3 + .ENTRY + copy %r3,%r1 + copy %r30,%r3 + stwm %r1,64(%r30) + addil L'yabba-$global$,%r27 + ldo R'yabba-$global$(%r1),%r19 + ldi 2,%r20 + stw %r20,0(%r19) +L$0001 + ldo 64(%r3),%r30 + ldwm -64(%r30),%r3 + bv,n %r0(%r2) + .EXIT + .PROCEND diff --git a/gas/testsuite/gas/hppa/reloc/reloc.exp b/gas/testsuite/gas/hppa/reloc/reloc.exp new file mode 100644 index 0000000..ccb236c --- /dev/null +++ b/gas/testsuite/gas/hppa/reloc/reloc.exp @@ -0,0 +1,679 @@ +# Copyright (C) 1993, 1996, 1997 Free Software Foundation, Inc. + +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; either version 2 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + +# Please email any bugs, comments, and/or additions to this file to: +# DejaGnu@cygnus.com + +# Written by the Center for Software Science at the University of Utah +# and by Cygnus Support. + +proc do_ble_relocation_test {} { + set testname "blebug.s: Test for proper relocation for BLE (part 2)" + set x 0 + + if [gas_test_old "blebug.s" "" "Proper relocation for BLE (part 1)"] then { + objdump_start_no_subdir "a.out" "-r" + + if ![istarget hppa*-*-*elf*] then { + # At one time both versions of the assembler would incorrectly use + # a PC-relative relocation for a BLE instruction. + while 1 { + expect { + -re "^00000004\[^\n\]*ABS_CALL\[^\n\]*\n" { set x 1 } + -re "\[^\n\]*\n" { } + timeout { perror "timeout\n"; break } + eof { break } + } + } + } else { + # At one time both versions of the assembler would incorrectly use + # a PC-relative relocation for a BLE instruction. + while 1 { + expect { + -re "^00000000\[^\n\]*DIR21L\[^\n\]*\n" { set x 1 } + -re "^00000004\[^\n\]*DIR17R\[^\n\]*\n" { set x 1 } + -re "\[^\n\]*\n" { } + timeout { perror "timeout\n"; break } + eof { break } + } + } + } + } + + # This was intended to do any cleanup necessary. It kinda looks like it + # isn't needed, but just in case, please keep it in for now. + objdump_finish + + # Did we find what we were looking for? If not, flunk it. + if [expr $x==1] then { pass $testname } else { fail $testname } +} + +proc do_relocation_reduction_tests {} { + set testname "reduce.s: Test relocation reductions (part 2)" + set x 0 + + if [gas_test_old "reduce.s" "" "Relocation reductions (part1)"] then { + objdump_start_no_subdir "a.out" "-r" + + # Check to make sure relocations involving procedure labels + # are not reduced to a relocation involving some other symbol. + # Doing so makes generating parameter relocation stubs impossible. + while 1 { + expect { + -re "^00000004\[^\n\]*PLABEL\[^\n\]*foo\[^\n\]*\n" + { set x [expr $x+1] } + -re "^00000014\[^\n\]*PCREL\[^\n\]*foo\[^\n\]*\n" + { set x [expr $x+1] } + -re "\[^\n\]*\n" { } + timeout { perror "timeout\n"; break } + eof { break } + } + } + } + + # This was intended to do any cleanup necessary. It kinda looks like it + # isn't needed, but just in case, please keep it in for now. + objdump_finish + + # Did we find what we were looking for? If not, flunk it. + if [expr $x==2] then { pass $testname } else { fail $testname } + + set testname "reduce2.s: More relocation reduction tests (part 2)" + set x 0 + + if [gas_test_old "reduce2.s" "" "More relocatoin reductions (part1)"] then { + objdump_start_no_subdir "a.out" "-r" + + # Check to make sure DLT relative relocs are not reduced to sym+addend + # Doing so doesn't work as one might expect + while 1 { + expect { + -re "^00000004\[^\n\]*DLT\[^\n\]*L.C0000\[^\n\]*\n" + { set x [expr $x+1] } + -re "^0000001c\[^\n\]*DLT\[^\n\]*L.C0000\[^\n\]*\n" + { set x [expr $x+1] } + -re "^00000030\[^\n\]*DLT\[^\n\]*L.C0001\[^\n\]*\n" + { set x [expr $x+1] } + -re "^00000048\[^\n\]*DLT\[^\n\]*L.C0001\[^\n\]*\n" + { set x [expr $x+1] } + -re "\[^\n\]*\n" { } + timeout { perror "timeout\n"; break } + eof { break } + } + } + } + + # This was intended to do any cleanup necessary. It kinda looks like it + # isn't needed, but just in case, please keep it in for now. + objdump_finish + + # Did we find what we were looking for? If not, flunk it. + if [expr $x==2] then { pass $testname } else { fail $testname } + + set testname "reduce3.s: Test even more relocation reductions (part 2)" + set x 0 + + if [gas_test_old "reduce3.s" "" "Even more relocation reductions (part1)"] then { + objdump_start_no_subdir "a.out" "-r" + + # Check to make sure relocations involving procedure labels + # are not reduced to a relocation involving some other symbol. + # Doing so makes generating parameter relocation stubs impossible. + while 1 { + expect { + -re "^0000000c\[^\n\]*yabba\[^\n\+\]*\n" + { set x [expr $x+1] } + -re "^0000000c\[^\n\]*yabba\+\[^\n\]*\n" + { set x 0; break } + -re "^00000010\[^\n\]*yabba\[^\n\+\]*\n" + { set x [expr $x+1] } + -re "^00000010\[^\n\]*yabba\+\[^\n\]*\n" + { set x 0; break } + -re "\[^\n\]*\n" { } + timeout { perror "timeout\n"; break } + eof { break } + } + } + } + + # This was intended to do any cleanup necessary. It kinda looks like it + # isn't needed, but just in case, please keep it in for now. + objdump_finish + + # Did we find what we were looking for? If not, flunk it. + if [expr $x==2] then { pass $testname } else { fail $testname } +} + +proc do_ble_mode_selector_test {} { + set testname "blebug2.s: blebug2" + set x 0 + + gas_start "blebug2.s" "-al" + + # GAS uses too many bits on the BLE instruction. + while 1 { + expect { + -re "^ +\[0-9\]+ 0000 20202801\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0004 E420E008\[^\n\]*\n" { set x [expr $x+1] } + -re "\[^\n\]*\n" { } + timeout { perror "timeout\n"; break } + eof { break } + } + } + + # This was intended to do any cleanup necessary. It kinda looks like it + # isn't needed, but just in case, please keep it in for now. + gas_finish + + # Did we find what we were looking for? If not, flunk it. + if [expr $x==2] then { pass $testname } else { fail $testname } +} + +proc do_ble_relocation_test {} { + set testname "blebug3.s: blebug3" + set x 0 + + gas_start "blebug3.s" "-al" + + while 1 { + expect { + -re "^ +\[0-9\]+ 0000 E4002000\[^\n\]*\n" { set x [expr $x+1] } + -re "\[^\n\]*\n" { } + timeout { perror "timeout\n"; break } + eof { break } + } + } + + # This was intended to do any cleanup necessary. It kinda looks like it + # isn't needed, but just in case, please keep it in for now. + gas_finish + + # Did we find what we were looking for? If not, flunk it. + if [expr $x==1] then { pass $testname } else { fail $testname } +} + +proc do_plabel_relocation_test {} { + set testname "plabelbug.s: Old gas-1.36 plabel bug (part 2)" + set x 0 + + if [gas_test_old "plabelbug.s" "" "Old gas-1.36 plabel bug (part 1)"] { + objdump_start_no_subdir "a.out" "-r" + + # Check that we make PLABEL relocation entries when they're needed. + while 1 { + expect { + -re "^00000000\[^\n\]*PLABEL\[^\n\]*\n" + { set x [expr $x+1] } + -re "^00000004\[^\n\]*PLABEL\[^\n\]*\n" + { set x [expr $x+1] } + -re "\[^\n\]*\n" { } + timeout { perror "timeout\n"; break } + eof { break } + } + } + + # This was intended to do any cleanup necessary. It kinda looks like it + # isn't needed, but just in case, please keep it in for now. + objdump_finish + + # Did we find what we were looking for? If not, flunk it. + if [expr $x==2] then { pass $testname } else { fail $testname } + } +} + +proc do_selector_scope_test {} { + set testname "selectorbug.s: Test scope of field selector" + set x 0 + + if [gas_test_old "selectorbug.s" "" "Test scope of field selector (part 1)"] { + objdump_start_no_subdir "a.out" "-r" + + # Check to make sure the relocation entry after the plabel is correct. + # If an old field selector was incorrectly "carried" over, then + # this test will fail. + if [istarget hppa*-*-*elf*] then { + while 1 { + expect { + -re "^00000014\[^\n\]*DIR32\[^\n\]*\n" + { set x 1 } + -re "^00000014\[^\n\]*PLABEL\[^\n\]*foo\[^\n\]*\n" + { set x 0 } + -re "\[^\n\]*\n" { } + timeout { perror "timeout\n"; break } + eof { break } + } + } + } else { + while 1 { + expect { + -re "^00000014\[^\n\]*DATA_ONE\[^\n\]*\n" + { set x 1 } + -re "^00000014\[^\n\]*PLABEL\[^\n\]*foo\[^\n\]*\n" + { set x 0 } + -re "\[^\n\]*\n" { } + timeout { perror "timeout\n"; break } + eof { break } + } + } + } + + # This was intended to do any cleanup necessary. It kinda looks like it + # isn't needed, but just in case, please keep it in for now. + objdump_finish + + # Did we find what we were looking for? If not, flunk it. + if [expr $x==1] then { pass $testname } else { fail $testname } + } +} + +proc do_local_label_as_operand_test {} { + set testname "labelopbug.s: Test local label as operand (non-branching)" + set x 0 + + if [gas_test_old "labelopbug.s" "" "Local label as operand (part 1)"] { + objdump_start_no_subdir "a.out" "-r" + + # Check to make sure we handle difference of local lables as an operand + # to a non-branching instruction correctly. + while 1 { + expect { + -re "^0000002c\[^\n\]*0x00000024\[^\n\]*\n" + { set x [expr $x+1] } + -re "^00000030\[^\n\]*0x00000024\[^\n\]*\n" + { set x [expr $x+1] } + -re "\[^\n\]*\n" { } + timeout { perror "timeout\n"; break } + eof { break } + } + } + + # This was intended to do any cleanup necessary. It kinda looks like it + # isn't needed, but just in case, please keep it in for now. + objdump_finish + + # Did we find what we were looking for? If not, flunk it. + if [expr $x==2] then { pass $testname } else { fail $testname } + } +} + +proc do_exit_relocation_test {} { + set testname "exitbug.s: Test for bogus R_EXIT relocation (part 2)" + set x 0 + + # Elf (osf) does not use ENTRY/EXIT relocations. + # I guess we could look at the unwind subspaces it builds... + # Until then, make sure it still assembles. + if [istarget hppa*-*-*elf*] then { + gas_test_old "exitbug.s" "" "Test for bogus R_EXIT relocation (part 1)" + return; + } + + if [gas_test_old "exitbug.s" "" "Test for bogus R_EXIT relocation (part 1)"] { + objdump_start_no_subdir "a.out" "-r" + + # Note that a match here is really a FAILURE! + while 1 { + expect { + -re "^00000000\[^\n\]*R_EXIT\[^\n\]*\n" + { set x [expr $x+1] } + -re "\[^\n\]*\n" { } + timeout { perror "timeout\n"; break } + eof { break } + } + } + + # This was intended to do any cleanup necessary. It kinda looks like it + # isn't needed, but just in case, please keep it in for now. + objdump_finish + + # Did we find what we were looking for? If not, flunk it. + if [expr $x==0] then { pass $testname } else { fail $testname } + } +} + +proc do_cross_space_fixup_test_1 {} { + set testname "fixupbug.s: Test cross space jump/call fixup bug (part 2)" + set x 0 + + # ELF (osf) doesn't really handle extra sections too well... + if [istarget hppa*-*-*elf*] then { + return; + } + + if [gas_test_old "fixupbug.s" "" "Test cross space jump/call fixup bug (part 1)"] { + objdump_start_no_subdir "a.out" "-r" + + # Make sure GAS generated a fixup/relocation for the cross-space + # branch/call + while 1 { + expect { + -re "^00000000\[^\n\]*PCREL_CALL\[^\n\]*\n" + { set x [expr $x+1] } + -re "\[^\n\]*\n" { } + timeout { perror "timeout\n"; break } + eof { break } + } + } + + # This was intended to do any cleanup necessary. It kinda looks like it + # isn't needed, but just in case, please keep it in for now. + objdump_finish + + # Did we find what we were looking for? If not, flunk it. + if [expr $x==1] then { pass $testname } else { fail $testname } + } +} + +proc do_cross_space_fixup_test_2 {} { + set testname "fixupbug.s: Test cross space jump/call fixup bug (part 3)" + set x 0 + + # ELF (osf) doesn't really handle extra sections too well... + if [istarget hppa*-*-*elf*] then { + return; + } + + gas_start "fixupbug.s" "-al" + + while 1 { + expect { + -re "^ +\[0-9\]+ 0000 E8000002\[^\n\]*\n" { set x [expr $x+1] } + -re "\[^\n\]*\n" { } + timeout { perror "timeout\n"; break } + eof { break } + } + } + + # This was intended to do any cleanup necessary. It kinda looks like it + # isn't needed, but just in case, please keep it in for now. + gas_finish + + # Did we find what we were looking for? If not, flunk it. + if [expr $x==1] then { pass $testname } else { fail $testname } +} + +proc do_round_mode_test {} { + set testname "roundmode.s: Test switching of rounding modes (part 2)" + set x 0 + + if [gas_test_old "roundmode.s" "" "Test switch of rounding modes(part 1)"] { + objdump_start_no_subdir "a.out" "-r" + + # Make sure GAS generated correct relocations to switch rounding modes. + # Also make sure (for SOM) that redundant rounding mode relocations + # were eliminated. + if [istarget hppa*-*-*elf*] then { + while 1 { + expect { + -re "^00000000\[^\n\]*DIR21L\[^\n\]*\n" + { set x [expr $x+1] } + -re "^00000004\[^\n\]*DIR14R\[^\n\]*\n" + { set x [expr $x+1] } + -re "^00000008\[^\n\]*DIR21L\[^\n\]*\n" + { set x [expr $x+1] } + -re "^0000000c\[^\n\]*DIR14R\[^\n\]*\n" + { set x [expr $x+1] } + -re "^00000010\[^\n\]*DIR21L\[^\n\]*\n" + { set x [expr $x+1] } + -re "^00000014\[^\n\]*DIR14R\[^\n\]*\n" + { set x [expr $x+1] } + -re "^00000018\[^\n\]*DIR21L\[^\n\]*\n" + { set x [expr $x+1] } + -re "^0000001c\[^\n\]*DIR14R\[^\n\]*\n" + { set x [expr $x+1] } + -re "\[^\n\]*\n" { } + timeout { perror "timeout\n"; break } + eof { break } + } + } + } else { + while 1 { + expect { + -re "^00000000\[^\n\]*R_R_MODE\[^\n\]*\n" + { set x [expr $x+1] } + -re "^00000004\[^\n\]*R_R_MODE\[^\n\]*\n" + { fail $testname } + -re "^00000008\[^\n\]*R_N_MODE\[^\n\]*\n" + { set x [expr $x+1] } + -re "^0000000c\[^\n\]*R_N_MODE\[^\n\]*\n" + { fail $testname } + -re "^00000010\[^\n\]*R_R_MODE\[^\n\]*\n" + { set x [expr $x+1] } + -re "^00000014\[^\n\]*R_R_MODE\[^\n\]*\n" + { fail $testname } + -re "^0000001c\[^\n\]*R_R_MODE\[^\n\]*\n" + { fail $testname } + -re "\[^\n\]*\n" { } + timeout { perror "timeout\n"; break } + eof { break } + } + } + } + + # This was intended to do any cleanup necessary. It kinda looks like it + # isn't needed, but just in case, please keep it in for now. + objdump_finish + + # Did we find what we were looking for? If not, flunk it. + if [istarget hppa*-*-*elf*] then { + if [expr $x==8] then { pass $testname } else { fail $testname } + } else { + if [expr $x==3] then { pass $testname } else { fail $testname } + } + } +} + +proc do_function_reloc_bug {} { + set testname "funcrelocbug.s: Test for reloc bug in non-plabel function reference (part 2)" + set x 0 + + if [gas_test_old "funcrelocbug.s" "" "Test for reloc bug in non-plabel function reference (part 1)"] { + objdump_start_no_subdir "a.out" "-r" + + # Make sure GAS generated a correct relocation for the reference. + # branch/call + while 1 { + expect { + -re "^000000cc\[^\n\]*f2___4\[^\n+\]*\n" + { set x [expr $x+1] } + -re "^000000d0\[^\n\]*f2___4\[^\n+\]*\n" + { set x [expr $x+1] } + -re "\[^\n\]*\n" { } + timeout { perror "timeout\n"; break } + eof { break } + } + } + + # This was intended to do any cleanup necessary. It kinda looks like it + # isn't needed, but just in case, please keep it in for now. + objdump_finish + + # Did we find what we were looking for? If not, flunk it. + if [expr $x==2] then { pass $testname } else { fail $testname } + + set testname "funcrelocbug.s: Test for reloc bug in non-plabel function reference (part3)" + set x 0 + + objdump_start_no_subdir "a.out" "--prefix-addresses -d" + # Make sure we didn't put anything in the instruction itself! + while 1 { + expect { + -re "^000000cc\[^\n\]*ldil 0,r20\[^\n\]*\n" + { set x [expr $x+1] } + -re "^000000d0\[^\n\]*ldo 0\[\(\]+r20\[\)\]+,r19\[^\n\]*\n" + { set x [expr $x+1] } + -re "\[^\n\]*\n" { } + timeout { perror "timeout\n"; break } + eof { break } + } + } + + # This was intended to do any cleanup necessary. It kinda looks like it + # isn't needed, but just in case, please keep it in for now. + objdump_finish + + # Did we find what we were looking for? If not, flunk it. + if [expr $x==2] then { pass $testname } else { fail $testname } + } + +} + +proc do_r_no_reloc {} { + set testname "r_no_reloc.s: Test for reloc bug in 4-byte R_NO_RELCOATION fixups (part 2)" + set x 0 + + if [gas_test_old "r_no_reloc.s" "" "Test for reloc bug in 4-byte R_NO_RELOCATION fixups (part 1)"] { + objdump_start_no_subdir "a.out" "-r" + + # Make sure GAS generated a correct relocation for the reference. + while 1 { + expect { + -re "^000c0004\[^\n\]*PLABEL\[^\n]*g\[^\n\]*\n" + { set x [expr $x+1] } + -re "\[^\n\]*\n" { } + timeout { perror "timeout\n"; break } + eof { break } + } + } + + # This was intended to do any cleanup necessary. It kinda looks like it + # isn't needed, but just in case, please keep it in for now. + objdump_finish + + # Did we find what we were looking for? If not, flunk it. + if [expr $x==1] then { pass $testname } else { fail $testname } + + } +} + +proc do_pic_relocation_test {} { + set testname "picreloc.s: Test for proper PIC relocation (part 2)" + set x 0 + + # ELF (osf) doesn't really handle extra sections too well... + if [istarget hppa*-*-*elf*] then { + return; + } + + gas_start "picreloc.s" "-al" + + while 1 { + expect { + -re "^ +\[0-9\]+ 0000 00000004\[^\n\]*\n" { set x [expr $x+1] } + -re "\[^\n\]*\n" { } + timeout { perror "timeout\n"; break } + eof { break } + } + } + + # This was intended to do any cleanup necessary. It kinda looks like it + # isn't needed, but just in case, please keep it in for now. + gas_finish + + # Did we find what we were looking for? If not, flunk it. + if [expr $x==1] then { pass $testname } else { fail $testname } +} + +proc do_apply_test {} { + set testname "applybug.s: Test for proper fixup appliation (part 2)" + set x 0 + + # ELF (osf) doesn't really handle extra sections too well... + if [istarget hppa*-*-*elf*] then { + return; + } + + gas_start "applybug.s" "-al" + + while 1 { + expect { + -re "^ +\[0-9\]+ 0000 00000000\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0004 00000000\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0008 00000000\[^\n\]*\n" { set x [expr $x+1] } + -re "\[^\n\]*\n" { } + timeout { perror "timeout\n"; break } + eof { break } + } + } + + # This was intended to do any cleanup necessary. It kinda looks like it + # isn't needed, but just in case, please keep it in for now. + gas_finish + + # Did we find what we were looking for? If not, flunk it. + if [expr $x==3] then { pass $testname } else { fail $testname } +} +if [istarget hppa*-*-*] then { + # Make sure we put the right relocation entry on a BLE instruction. + do_ble_relocation_test + + # Make sure relocation reductions are not too agressive about + # adjusting relocations against some symbols. + do_relocation_reduction_tests + + # Check that mode selectors on a ble instruction actually work. + do_ble_mode_selector_test + + # Check that we take the -8 adjustment into account when zeroing + # out the displacement field in a ble instruction with a reloc + do_ble_relocation_test + + # 1.36 simply didn't generate all the plabels it should have. Make + # sure gas-2 does. + do_plabel_relocation_test + + # Make sure a field selector only effects the current instruction + # or assembler directive. + do_selector_scope_test + + # This should really generate a relocation. It would make life much + # easier on the optimizing linker. Until then just make sure the + # difference is computed correctly. + do_local_label_as_operand_test + + # GAS2 incorrectly generated R_EXIT relocations when .exit directives + # were not in the source code. + do_exit_relocation_test + + # GAS2 incorrectly thought it could apply a fixup for a pc-relative + # branch/call which crossed different subspaces. + # Also check that the assembled instruction is correct + do_cross_space_fixup_test_1 + do_cross_space_fixup_test_2 + + # Make sure we switch rounding modes correctly + do_round_mode_test + + # Test for a bug found when a function was used in a non-branching + # instruction *without* a plabel (for portable runtime model) + do_function_reloc_bug + + # Test for an off-by-one bug in the handling of 4-byte R_NO_RELOCATION + # fixups. + do_r_no_reloc + + # Test a relocation problem which shows up when building shared + # libraries in SOM + do_pic_relocation_test + + # Test a problem with md_apply_fix that was introduced when fixing + # the pic relocation test. + do_apply_test + + # Make sure gas doesn't resolve long-calls which are to be fixed + # by the linker + gas_test "longcall.s" "" "" "Avoid resolving long-calls" +} diff --git a/gas/testsuite/gas/hppa/reloc/roundmode.s b/gas/testsuite/gas/hppa/reloc/roundmode.s new file mode 100644 index 0000000..5a87e63 --- /dev/null +++ b/gas/testsuite/gas/hppa/reloc/roundmode.s @@ -0,0 +1,23 @@ + .SPACE $PRIVATE$ + .SUBSPA $DATA$,QUAD=1,ALIGN=8,ACCESS=31 + .SUBSPA $BSS$,QUAD=1,ALIGN=8,ACCESS=31,ZERO,SORT=82 + .SPACE $TEXT$ + .SUBSPA $LIT$,QUAD=0,ALIGN=8,ACCESS=44 + .SUBSPA $CODE$,QUAD=0,ALIGN=8,ACCESS=44,CODE_ONLY + + .SPACE $TEXT$ + .SUBSPA $CODE$ + + .align 4 + .IMPORT foo,data + +; Switch in/out of different rounding modes. +; Also make sure we "optimize" away useless rounding mode relocations + addil LR'foo-0x12345,%r27 + ldo RR'foo-0x12345(%r1),%r1 + addil L'foo-0x12345,%r27 + ldo R'foo-0x12345(%r1),%r1 + addil LR'foo-0x12345,%r27 + ldo RR'foo-0x12345(%r1),%r1 + addil LR'foo-0x12345,%r27 + ldo RR'foo-0x12345(%r1),%r1 diff --git a/gas/testsuite/gas/hppa/reloc/selectorbug.s b/gas/testsuite/gas/hppa/reloc/selectorbug.s new file mode 100644 index 0000000..6925d38 --- /dev/null +++ b/gas/testsuite/gas/hppa/reloc/selectorbug.s @@ -0,0 +1,28 @@ + .SPACE $PRIVATE$ + .SUBSPA $DATA$,QUAD=1,ALIGN=8,ACCESS=31 + .SUBSPA $BSS$,QUAD=1,ALIGN=8,ACCESS=31,ZERO,SORT=82 + .SPACE $TEXT$ + .SUBSPA $LIT$,QUAD=0,ALIGN=8,ACCESS=44 + .SUBSPA $CODE$,QUAD=0,ALIGN=8,ACCESS=44,CODE_ONLY + .IMPORT $global$,DATA + .IMPORT $$dyncall,MILLICODE +; gcc_compiled.: + .EXPORT intVec_error_handler,DATA + .SPACE $PRIVATE$ + .SUBSPA $DATA$ + +intVec_error_handler: + .word P%default_intVec_error_handler__FPCc + .SPACE $TEXT$ + .SUBSPA $CODE$ + + .align 4 + .EXPORT foo,CODE + .EXPORT foo,ENTRY,PRIV_LEV=3 +foo: + .PROC + .CALLINFO FRAME=0 + .ENTRY + .stabd 68,0,41 + .EXIT + .PROCEND diff --git a/gas/testsuite/gas/hppa/unsorted/align3.s b/gas/testsuite/gas/hppa/unsorted/align3.s new file mode 100644 index 0000000..8bd2408 --- /dev/null +++ b/gas/testsuite/gas/hppa/unsorted/align3.s @@ -0,0 +1,20 @@ + .SPACE $PRIVATE$ + .SUBSPA $DATA$,QUAD=1,ALIGN=8,ACCESS=31 + .SPACE $TEXT$ + .SUBSPA $CODE$,QUAD=0,ALIGN=8,ACCESS=44,CODE_ONLY + + .blockz 4 + +main: + .SPACE $PRIVATE$ + .SUBSPA $DATA$ + + .SPACE $TEXT$ + .SUBSPA $CODE$ + + .PROC + .CALLINFO FRAME=0 + .ENTRY + nop + .EXIT + .PROCEND diff --git a/gas/testsuite/gas/hppa/unsorted/align4.s b/gas/testsuite/gas/hppa/unsorted/align4.s new file mode 100644 index 0000000..9f2f99b --- /dev/null +++ b/gas/testsuite/gas/hppa/unsorted/align4.s @@ -0,0 +1,4 @@ + .space $TEXT$ + .subspa $YABBA$ + .subspa $MILLICODE$ + .align 64 diff --git a/gas/testsuite/gas/hppa/unsorted/brlenbug.s b/gas/testsuite/gas/hppa/unsorted/brlenbug.s new file mode 100644 index 0000000..58e5c7e --- /dev/null +++ b/gas/testsuite/gas/hppa/unsorted/brlenbug.s @@ -0,0 +1,3502 @@ + .SPACE $PRIVATE$ + .SUBSPA $DATA$,QUAD=1,ALIGN=8,ACCESS=31 + .SUBSPA $BSS$,QUAD=1,ALIGN=8,ACCESS=31,ZERO,SORT=82 + .SPACE $TEXT$ + .SUBSPA $LIT$,QUAD=0,ALIGN=8,ACCESS=44 + .SUBSPA $CODE$,QUAD=0,ALIGN=8,ACCESS=44,CODE_ONLY + .IMPORT $global$,DATA + .IMPORT $$dyncall,MILLICODE +; gcc_compiled.: + .SPACE $PRIVATE$ + .SUBSPA $DATA$ + + .align 4 +done___2 + .word 0 + .IMPORT memset,CODE + .EXPORT re_syntax_options,DATA + .align 4 +re_syntax_options + .word 0 + .SPACE $PRIVATE$ + .SUBSPA $DATA$ + + .align 4 +re_error_msg + .word 0 + .word L$C0000 + .word L$C0001 + .word L$C0002 + .word L$C0003 + .word L$C0004 + .word L$C0005 + .word L$C0006 + .word L$C0007 + .word L$C0008 + .word L$C0009 + .word L$C0010 + .word L$C0011 + .word L$C0012 + .word L$C0013 + .word L$C0014 + .word L$C0015 + .SPACE $TEXT$ + .SUBSPA $LIT$ + + .align 4 +L$C0015 + .STRING "Unmatched ) or \\)\x00" + .align 4 +L$C0014 + .STRING "Regular expression too big\x00" + .align 4 +L$C0013 + .STRING "Premature end of regular expression\x00" + .align 4 +L$C0012 + .STRING "Invalid preceding regular expression\x00" + .align 4 +L$C0011 + .STRING "Memory exhausted\x00" + .align 4 +L$C0010 + .STRING "Invalid range end\x00" + .align 4 +L$C0009 + .STRING "Invalid content of \\{\\}\x00" + .align 4 +L$C0008 + .STRING "Unmatched \\{\x00" + .align 4 +L$C0007 + .STRING "Unmatched ( or \\(\x00" + .align 4 +L$C0006 + .STRING "Unmatched [ or [^\x00" + .align 4 +L$C0005 + .STRING "Invalid back reference\x00" + .align 4 +L$C0004 + .STRING "Trailing backslash\x00" + .align 4 +L$C0003 + .STRING "Invalid character class name\x00" + .align 4 +L$C0002 + .STRING "Invalid collation character\x00" + .align 4 +L$C0001 + .STRING "Invalid regular expression\x00" + .align 4 +L$C0000 + .STRING "No match\x00" + .EXPORT re_max_failures,DATA + .SPACE $PRIVATE$ + .SUBSPA $DATA$ + + .align 4 +re_max_failures + .word 2000 + .IMPORT malloc,CODE + .IMPORT realloc,CODE + .IMPORT free,CODE + .IMPORT strcmp,CODE + .SPACE $TEXT$ + .SUBSPA $LIT$ + + .align 4 +L$C0016 + .STRING "alnum\x00" + .align 4 +L$C0017 + .STRING "alpha\x00" + .align 4 +L$C0018 + .STRING "blank\x00" + .align 4 +L$C0019 + .STRING "cntrl\x00" + .align 4 +L$C0020 + .STRING "digit\x00" + .align 4 +L$C0021 + .STRING "graph\x00" + .align 4 +L$C0022 + .STRING "lower\x00" + .align 4 +L$C0023 + .STRING "print\x00" + .align 4 +L$C0024 + .STRING "punct\x00" + .align 4 +L$C0025 + .STRING "space\x00" + .align 4 +L$C0026 + .STRING "upper\x00" + .align 4 +L$C0027 + .STRING "xdigit\x00" + .IMPORT __alnum,DATA + .IMPORT __ctype2,DATA + .IMPORT __ctype,DATA + .IMPORT at_begline_loc_p,CODE + .IMPORT at_endline_loc_p,CODE + .IMPORT store_op1,CODE + .IMPORT insert_op1,CODE + .IMPORT store_op2,CODE + .IMPORT insert_op2,CODE + .IMPORT compile_range,CODE + .IMPORT group_in_compile_stack,CODE + .SPACE $TEXT$ + .SUBSPA $CODE$ + + .align 4 +regex_compile + .PROC + .CALLINFO FRAME=320,CALLS,SAVE_RP,ENTRY_GR=18 + .ENTRY + stw %r2,-20(%r30) ;# 8989 reload_outsi+2/6 + ldo 320(%r30),%r30 ;# 8991 addsi3/2 + stw %r18,-168(%r30) ;# 8993 reload_outsi+2/6 + stw %r17,-164(%r30) ;# 8995 reload_outsi+2/6 + stw %r16,-160(%r30) ;# 8997 reload_outsi+2/6 + stw %r15,-156(%r30) ;# 8999 reload_outsi+2/6 + stw %r14,-152(%r30) ;# 9001 reload_outsi+2/6 + stw %r13,-148(%r30) ;# 9003 reload_outsi+2/6 + stw %r12,-144(%r30) ;# 9005 reload_outsi+2/6 + stw %r11,-140(%r30) ;# 9007 reload_outsi+2/6 + stw %r10,-136(%r30) ;# 9009 reload_outsi+2/6 + stw %r9,-132(%r30) ;# 9011 reload_outsi+2/6 + stw %r8,-128(%r30) ;# 9013 reload_outsi+2/6 + stw %r7,-124(%r30) ;# 9015 reload_outsi+2/6 + stw %r6,-120(%r30) ;# 9017 reload_outsi+2/6 + stw %r5,-116(%r30) ;# 9019 reload_outsi+2/6 + stw %r4,-112(%r30) ;# 9021 reload_outsi+2/6 + stw %r3,-108(%r30) ;# 9023 reload_outsi+2/6 + stw %r26,-276(%r30) ;# 4 reload_outsi+2/6 + ldi 0,%r9 ;# 25 reload_outsi+2/2 + ldi 0,%r8 ;# 28 reload_outsi+2/2 + stw %r0,-260(%r30) ;# 34 reload_outsi+2/6 + ldi 0,%r10 ;# 31 reload_outsi+2/2 + ldi 640,%r26 ;# 37 reload_outsi+2/2 + ldw -276(%r30),%r1 ;# 8774 reload_outsi+2/5 + copy %r24,%r15 ;# 8 reload_outsi+2/1 + stw %r1,-296(%r30) ;# 2325 reload_outsi+2/6 + copy %r23,%r5 ;# 10 reload_outsi+2/1 + addl %r1,%r25,%r16 ;# 19 addsi3/1 + .CALL ARGW0=GR + bl malloc,%r2 ;# 39 call_value_internal_symref + ldw 20(%r5),%r14 ;# 22 reload_outsi+2/5 + comib,<> 0,%r28,L$0021 ;# 48 bleu+1 + stw %r28,-312(%r30) ;# 43 reload_outsi+2/6 +L$0953 + bl L$0867,%r0 ;# 53 jump + ldi 12,%r28 ;# 51 reload_outsi+2/2 +L$0021 + ldi 32,%r19 ;# 58 reload_outsi+2/2 + stw %r19,-308(%r30) ;# 59 reload_outsi+2/6 + stw %r0,-304(%r30) ;# 62 reload_outsi+2/6 + stw %r15,12(%r5) ;# 65 reload_outsi+2/6 + stw %r0,8(%r5) ;# 85 reload_outsi+2/6 + stw %r0,24(%r5) ;# 88 reload_outsi+2/6 + addil LR'done___2-$global$,%r27 ;# 92 pic2_lo_sum+1 + ldw 28(%r5),%r19 ;# 68 reload_outsi+2/5 + ldw RR'done___2-$global$(%r1),%r20 ;# 94 reload_outsi+2/5 + depi 0,3,1,%r19 ;# 69 andsi3/2 + depi 0,6,2,%r19 ;# 80 andsi3/2 + comib,<> 0,%r20,L$0022 ;# 95 bleu+1 + stw %r19,28(%r5) ;# 82 reload_outsi+2/6 + addil LR're_syntax_table-$global$,%r27 ;# 99 pic2_lo_sum+1 + ldo RR're_syntax_table-$global$(%r1),%r4 ;# 100 movhi-2 + copy %r4,%r26 ;# 101 reload_outsi+2/1 + ldi 0,%r25 ;# 102 reload_outsi+2/2 + .CALL ARGW0=GR,ARGW1=GR,ARGW2=GR + bl memset,%r2 ;# 104 call_value_internal_symref + ldi 256,%r24 ;# 103 reload_outsi+2/2 + ldi 1,%r20 ;# 8732 movqi+1/2 + ldo 97(%r4),%r19 ;# 8736 addsi3/2 + ldo 122(%r4),%r4 ;# 8738 addsi3/2 + stbs,ma %r20,1(%r19) ;# 115 movqi+1/6 +L$1155 + comb,>=,n %r4,%r19,L$1155 ;# 121 bleu+1 + stbs,ma %r20,1(%r19) ;# 115 movqi+1/6 + ldi 1,%r21 ;# 8717 movqi+1/2 + addil LR're_syntax_table-$global$,%r27 ;# 8712 pic2_lo_sum+1 + ldo RR're_syntax_table-$global$(%r1),%r19 ;# 8715 movhi-2 + ldo 65(%r19),%r20 ;# 8721 addsi3/2 + ldo 90(%r19),%r19 ;# 8723 addsi3/2 + stbs,ma %r21,1(%r20) ;# 138 movqi+1/6 +L$1156 + comb,>=,n %r19,%r20,L$1156 ;# 144 bleu+1 + stbs,ma %r21,1(%r20) ;# 138 movqi+1/6 + ldi 48,%r20 ;# 151 reload_outsi+2/2 + ldi 57,%r22 ;# 7976 reload_outsi+2/2 + ldi 1,%r21 ;# 8707 movqi+1/2 + addil LR're_syntax_table-$global$+48,%r27 ;# 8705 pic2_lo_sum+1 + ldo RR're_syntax_table-$global$+48(%r1),%r19 ;# 8711 movhi-2 +L$0037 + ldo 1(%r20),%r20 ;# 164 addsi3/2 + comb,>= %r22,%r20,L$0037 ;# 167 bleu+1 + stbs,ma %r21,1(%r19) ;# 161 movqi+1/6 + addil LR're_syntax_table-$global$,%r27 ;# 174 pic2_lo_sum+1 + ldo RR're_syntax_table-$global$(%r1),%r19 ;# 175 movhi-2 + ldi 1,%r20 ;# 176 movqi+1/2 + stb %r20,95(%r19) ;# 177 movqi+1/6 + addil LR'done___2-$global$,%r27 ;# 178 pic2_lo_sum+1 + ldi 1,%r19 ;# 180 reload_outsi+2/2 + stw %r19,RR'done___2-$global$(%r1) ;# 181 reload_outsi+2/6 +L$0022 + ldw 4(%r5),%r19 ;# 187 reload_outsi+2/5 + comib,<>,n 0,%r19,L$0039 ;# 189 bleu+1 + ldw 0(%r5),%r26 ;# 193 reload_outsi+2/5 + comib,=,n 0,%r26,L$0040 ;# 195 bleu+1 + .CALL ARGW0=GR,ARGW1=GR + bl realloc,%r2 ;# 205 call_value_internal_symref + ldi 32,%r25 ;# 203 reload_outsi+2/2 + bl L$1157,%r0 ;# 211 jump + stw %r28,0(%r5) ;# 223 reload_outsi+2/6 +L$0040 + .CALL ARGW0=GR + bl malloc,%r2 ;# 219 call_value_internal_symref + ldi 32,%r26 ;# 217 reload_outsi+2/2 + stw %r28,0(%r5) ;# 223 reload_outsi+2/6 +L$1157 + ldw 0(%r5),%r19 ;# 228 reload_outsi+2/5 + comib,<> 0,%r19,L$0042 ;# 230 bleu+1 + ldi 32,%r19 ;# 243 reload_outsi+2/2 + .CALL ARGW0=GR + bl free,%r2 ;# 234 call_internal_symref + ldw -312(%r30),%r26 ;# 232 reload_outsi+2/5 + bl L$0867,%r0 ;# 238 jump + ldi 12,%r28 ;# 51 reload_outsi+2/2 +L$0042 + stw %r19,4(%r5) ;# 244 reload_outsi+2/6 +L$0039 + ldw 0(%r5),%r6 ;# 249 reload_outsi+2/5 + ldw -296(%r30),%r19 ;# 7981 reload_outsi+2/5 + comclr,<> %r16,%r19,%r0 ;# 7982 bleu+1 + bl L$0044,%r0 + copy %r6,%r12 ;# 253 reload_outsi+2/1 + ldw -296(%r30),%r19 ;# 2334 reload_outsi+2/5 +L$1178 + ldbs,ma 1(%r19),%r7 ;# 277 zero_extendqisi2/2 + comib,= 0,%r14,L$0047 ;# 282 bleu+1 + stw %r19,-296(%r30) ;# 2337 reload_outsi+2/6 + addl %r14,%r7,%r19 ;# 283 addsi3/1 + ldb 0(%r19),%r7 ;# 286 zero_extendqisi2/2 +L$0047 + ldo -10(%r7),%r19 ;# 7895 addsi3/2 + addi,uv -115,%r19,%r0 ;# 7896 casesi0 + blr,n %r19,%r0 + b,n L$0076 +L$0863 + bl L$0376,%r0 + nop ;# 9092 switch_jump +L$0954 + bl L$0076,%r0 + nop ;# 9095 switch_jump +L$0955 + bl L$0076,%r0 + nop ;# 9098 switch_jump +L$0956 + bl L$0076,%r0 + nop ;# 9101 switch_jump +L$0957 + bl L$0076,%r0 + nop ;# 9104 switch_jump +L$0958 + bl L$0076,%r0 + nop ;# 9107 switch_jump +L$0959 + bl L$0076,%r0 + nop ;# 9110 switch_jump +L$0960 + bl L$0076,%r0 + nop ;# 9113 switch_jump +L$0961 + bl L$0076,%r0 + nop ;# 9116 switch_jump +L$0962 + bl L$0076,%r0 + nop ;# 9119 switch_jump +L$0963 + bl L$0076,%r0 + nop ;# 9122 switch_jump +L$0964 + bl L$0076,%r0 + nop ;# 9125 switch_jump +L$0965 + bl L$0076,%r0 + nop ;# 9128 switch_jump +L$0966 + bl L$0076,%r0 + nop ;# 9131 switch_jump +L$0967 + bl L$0076,%r0 + nop ;# 9134 switch_jump +L$0968 + bl L$0076,%r0 + nop ;# 9137 switch_jump +L$0969 + bl L$0076,%r0 + nop ;# 9140 switch_jump +L$0970 + bl L$0076,%r0 + nop ;# 9143 switch_jump +L$0971 + bl L$0076,%r0 + nop ;# 9146 switch_jump +L$0972 + bl L$0076,%r0 + nop ;# 9149 switch_jump +L$0973 + bl L$0076,%r0 + nop ;# 9152 switch_jump +L$0974 + bl L$0076,%r0 + nop ;# 9155 switch_jump +L$0975 + bl L$0076,%r0 + nop ;# 9158 switch_jump +L$0976 + bl L$0076,%r0 + nop ;# 9161 switch_jump +L$0977 + bl L$0076,%r0 + nop ;# 9164 switch_jump +L$0978 + bl L$0076,%r0 + nop ;# 9167 switch_jump +L$0979 + bl L$0077,%r0 ;# 9170 switch_jump + ldw -296(%r30),%r26 ;# 2349 reload_outsi+2/5 +L$0980 + bl L$0076,%r0 + nop ;# 9173 switch_jump +L$0981 + bl L$0076,%r0 + nop ;# 9176 switch_jump +L$0982 + bl L$0076,%r0 + nop ;# 9179 switch_jump +L$0983 + bl L$0368,%r0 + nop ;# 9182 switch_jump +L$0984 + bl L$0372,%r0 + nop ;# 9185 switch_jump +L$0985 + bl L$0104,%r0 + nop ;# 9188 switch_jump +L$0986 + bl L$1158,%r0 ;# 9191 switch_jump + ldi 1026,%r19 ;# 662 reload_outsi+2/2 +L$0987 + bl L$0076,%r0 + nop ;# 9194 switch_jump +L$0988 + bl L$0076,%r0 + nop ;# 9197 switch_jump +L$0989 + bl L$0196,%r0 ;# 9200 switch_jump + ldw 0(%r5),%r4 ;# 8027 reload_outsi+2/5 +L$0990 + bl L$0076,%r0 + nop ;# 9203 switch_jump +L$0991 + bl L$0076,%r0 + nop ;# 9206 switch_jump +L$0992 + bl L$0076,%r0 + nop ;# 9209 switch_jump +L$0993 + bl L$0076,%r0 + nop ;# 9212 switch_jump +L$0994 + bl L$0076,%r0 + nop ;# 9215 switch_jump +L$0995 + bl L$0076,%r0 + nop ;# 9218 switch_jump +L$0996 + bl L$0076,%r0 + nop ;# 9221 switch_jump +L$0997 + bl L$0076,%r0 + nop ;# 9224 switch_jump +L$0998 + bl L$0076,%r0 + nop ;# 9227 switch_jump +L$0999 + bl L$0076,%r0 + nop ;# 9230 switch_jump +L$1000 + bl L$0076,%r0 + nop ;# 9233 switch_jump +L$1001 + bl L$0076,%r0 + nop ;# 9236 switch_jump +L$1002 + bl L$0076,%r0 + nop ;# 9239 switch_jump +L$1003 + bl L$0076,%r0 + nop ;# 9242 switch_jump +L$1004 + bl L$0076,%r0 + nop ;# 9245 switch_jump +L$1005 + bl L$0076,%r0 + nop ;# 9248 switch_jump +L$1006 + bl L$0101,%r0 ;# 9251 switch_jump + ldi 1026,%r19 ;# 662 reload_outsi+2/2 +L$1007 + bl L$0076,%r0 + nop ;# 9254 switch_jump +L$1008 + bl L$0076,%r0 + nop ;# 9257 switch_jump +L$1009 + bl L$0076,%r0 + nop ;# 9260 switch_jump +L$1010 + bl L$0076,%r0 + nop ;# 9263 switch_jump +L$1011 + bl L$0076,%r0 + nop ;# 9266 switch_jump +L$1012 + bl L$0076,%r0 + nop ;# 9269 switch_jump +L$1013 + bl L$0076,%r0 + nop ;# 9272 switch_jump +L$1014 + bl L$0076,%r0 + nop ;# 9275 switch_jump +L$1015 + bl L$0076,%r0 + nop ;# 9278 switch_jump +L$1016 + bl L$0076,%r0 + nop ;# 9281 switch_jump +L$1017 + bl L$0076,%r0 + nop ;# 9284 switch_jump +L$1018 + bl L$0076,%r0 + nop ;# 9287 switch_jump +L$1019 + bl L$0076,%r0 + nop ;# 9290 switch_jump +L$1020 + bl L$0076,%r0 + nop ;# 9293 switch_jump +L$1021 + bl L$0076,%r0 + nop ;# 9296 switch_jump +L$1022 + bl L$0076,%r0 + nop ;# 9299 switch_jump +L$1023 + bl L$0076,%r0 + nop ;# 9302 switch_jump +L$1024 + bl L$0076,%r0 + nop ;# 9305 switch_jump +L$1025 + bl L$0076,%r0 + nop ;# 9308 switch_jump +L$1026 + bl L$0076,%r0 + nop ;# 9311 switch_jump +L$1027 + bl L$0076,%r0 + nop ;# 9314 switch_jump +L$1028 + bl L$0076,%r0 + nop ;# 9317 switch_jump +L$1029 + bl L$0076,%r0 + nop ;# 9320 switch_jump +L$1030 + bl L$0076,%r0 + nop ;# 9323 switch_jump +L$1031 + bl L$0076,%r0 + nop ;# 9326 switch_jump +L$1032 + bl L$0076,%r0 + nop ;# 9329 switch_jump +L$1033 + bl L$0076,%r0 + nop ;# 9332 switch_jump +L$1034 + bl L$0216,%r0 ;# 9335 switch_jump + ldw -296(%r30),%r19 ;# 2418 reload_outsi+2/5 +L$1035 + bl L$0387,%r0 ;# 9338 switch_jump + ldw -296(%r30),%r19 ;# 3797 reload_outsi+2/5 +L$1036 + bl L$0076,%r0 + nop ;# 9341 switch_jump +L$1037 + bl L$0053,%r0 ;# 9344 switch_jump + ldw -276(%r30),%r1 ;# 8777 reload_outsi+2/5 +L$1038 + bl L$0076,%r0 + nop ;# 9347 switch_jump +L$1039 + bl L$0076,%r0 + nop ;# 9350 switch_jump +L$1040 + bl L$0076,%r0 + nop ;# 9353 switch_jump +L$1041 + bl L$0076,%r0 + nop ;# 9356 switch_jump +L$1042 + bl L$0076,%r0 + nop ;# 9359 switch_jump +L$1043 + bl L$0076,%r0 + nop ;# 9362 switch_jump +L$1044 + bl L$0076,%r0 + nop ;# 9365 switch_jump +L$1045 + bl L$0076,%r0 + nop ;# 9368 switch_jump +L$1046 + bl L$0076,%r0 + nop ;# 9371 switch_jump +L$1047 + bl L$0076,%r0 + nop ;# 9374 switch_jump +L$1048 + bl L$0076,%r0 + nop ;# 9377 switch_jump +L$1049 + bl L$0076,%r0 + nop ;# 9380 switch_jump +L$1050 + bl L$0076,%r0 + nop ;# 9383 switch_jump +L$1051 + bl L$0076,%r0 + nop ;# 9386 switch_jump +L$1052 + bl L$0076,%r0 + nop ;# 9389 switch_jump +L$1053 + bl L$0076,%r0 + nop ;# 9392 switch_jump +L$1054 + bl L$0076,%r0 + nop ;# 9395 switch_jump +L$1055 + bl L$0076,%r0 + nop ;# 9398 switch_jump +L$1056 + bl L$0076,%r0 + nop ;# 9401 switch_jump +L$1057 + bl L$0076,%r0 + nop ;# 9404 switch_jump +L$1058 + bl L$0076,%r0 + nop ;# 9407 switch_jump +L$1059 + bl L$0076,%r0 + nop ;# 9410 switch_jump +L$1060 + bl L$0076,%r0 + nop ;# 9413 switch_jump +L$1061 + bl L$0076,%r0 + nop ;# 9416 switch_jump +L$1062 + bl L$0076,%r0 + nop ;# 9419 switch_jump +L$1063 + bl L$0076,%r0 + nop ;# 9422 switch_jump +L$1064 + bl L$0076,%r0 + nop ;# 9425 switch_jump +L$1065 + bl L$0076,%r0 + nop ;# 9428 switch_jump +L$1066 + bl L$0383,%r0 ;# 9431 switch_jump + ldi 4608,%r20 ;# 3778 reload_outsi+2/2 +L$1067 + bl L$0380,%r0 + nop ;# 9434 switch_jump +L$1068 + bl,n L$0076,%r0 ;# 7899 jump +L$0053 + ldw -296(%r30),%r25 ;# 2343 reload_outsi+2/5 + ldo 1(%r1),%r19 ;# 306 addsi3/2 + comb,=,n %r19,%r25,L$0055 ;# 308 bleu+1 + bb,< %r15,28,L$0055 ;# 313 bleu+3 + ldw -276(%r30),%r26 ;# 315 reload_outsi+2/5 + .CALL ARGW0=GR,ARGW1=GR,ARGW2=GR + bl at_begline_loc_p,%r2 ;# 321 call_value_internal_symref + copy %r15,%r24 ;# 319 reload_outsi+2/1 + extrs %r28,31,8,%r28 ;# 324 extendqisi2 + comiclr,<> 0,%r28,%r0 ;# 326 bleu+1 + bl,n L$0076,%r0 +L$0055 + ldw 0(%r5),%r4 ;# 7986 reload_outsi+2/5 + ldw 4(%r5),%r20 ;# 7989 reload_outsi+2/5 + sub %r6,%r4,%r19 ;# 7987 subsi3/1 + ldo 1(%r19),%r19 ;# 7988 addsi3/2 + comb,>>=,n %r20,%r19,L$0060 ;# 7990 bleu+1 + ldil L'65536,%r3 ;# 8701 reload_outsi+2/3 +L$0061 + comclr,<> %r3,%r20,%r0 ;# 357 bleu+1 + bl L$0944,%r0 + zdep %r20,30,31,%r19 ;# 367 ashlsi3+1 + comb,>>= %r3,%r19,L$0066 ;# 375 bleu+1 + stw %r19,4(%r5) ;# 369 reload_outsi+2/6 + stw %r3,4(%r5) ;# 378 reload_outsi+2/6 +L$0066 + ldw 0(%r5),%r26 ;# 385 reload_outsi+2/5 + .CALL ARGW0=GR,ARGW1=GR + bl realloc,%r2 ;# 389 call_value_internal_symref + ldw 4(%r5),%r25 ;# 387 reload_outsi+2/5 + comib,= 0,%r28,L$0953 ;# 397 bleu+1 + stw %r28,0(%r5) ;# 393 reload_outsi+2/6 + comb,= %r28,%r4,L$0059 ;# 407 bleu+1 + sub %r6,%r4,%r19 ;# 409 subsi3/1 + addl %r28,%r19,%r6 ;# 412 addsi3/1 + sub %r12,%r4,%r19 ;# 413 subsi3/1 + comib,= 0,%r10,L$0069 ;# 418 bleu+1 + addl %r28,%r19,%r12 ;# 416 addsi3/1 + sub %r10,%r4,%r19 ;# 419 subsi3/1 + addl %r28,%r19,%r10 ;# 422 addsi3/1 +L$0069 + comib,= 0,%r8,L$0070 ;# 425 bleu+1 + sub %r8,%r4,%r19 ;# 426 subsi3/1 + addl %r28,%r19,%r8 ;# 429 addsi3/1 +L$0070 + comib,= 0,%r9,L$0059 ;# 432 bleu+1 + sub %r9,%r4,%r19 ;# 433 subsi3/1 + addl %r28,%r19,%r9 ;# 436 addsi3/1 +L$0059 + ldw 0(%r5),%r4 ;# 337 reload_outsi+2/5 + ldw 4(%r5),%r20 ;# 341 reload_outsi+2/5 + sub %r6,%r4,%r19 ;# 338 subsi3/1 + ldo 1(%r19),%r19 ;# 339 addsi3/2 + comb,<< %r20,%r19,L$0061 + nop ;# 343 bleu+1 +L$0060 + ldi 8,%r19 ;# 458 movqi+1/2 + bl L$0043,%r0 ;# 479 jump + stbs,ma %r19,1(%r6) ;# 459 movqi+1/6 +L$0077 + comb,=,n %r16,%r26,L$0079 ;# 485 bleu+1 + bb,< %r15,28,L$0079 ;# 490 bleu+3 + copy %r16,%r25 ;# 494 reload_outsi+2/1 + .CALL ARGW0=GR,ARGW1=GR,ARGW2=GR + bl at_endline_loc_p,%r2 ;# 498 call_value_internal_symref + copy %r15,%r24 ;# 496 reload_outsi+2/1 + extrs %r28,31,8,%r28 ;# 501 extendqisi2 + comiclr,<> 0,%r28,%r0 ;# 503 bleu+1 + bl,n L$0076,%r0 +L$0079 + ldw 0(%r5),%r4 ;# 7994 reload_outsi+2/5 + ldw 4(%r5),%r20 ;# 7997 reload_outsi+2/5 + sub %r6,%r4,%r19 ;# 7995 subsi3/1 + ldo 1(%r19),%r19 ;# 7996 addsi3/2 + comb,>>=,n %r20,%r19,L$0084 ;# 7998 bleu+1 + ldil L'65536,%r3 ;# 8699 reload_outsi+2/3 +L$0085 + comclr,<> %r3,%r20,%r0 ;# 534 bleu+1 + bl L$0944,%r0 + zdep %r20,30,31,%r19 ;# 544 ashlsi3+1 + comb,>>= %r3,%r19,L$0090 ;# 552 bleu+1 + stw %r19,4(%r5) ;# 546 reload_outsi+2/6 + stw %r3,4(%r5) ;# 555 reload_outsi+2/6 +L$0090 + ldw 0(%r5),%r26 ;# 562 reload_outsi+2/5 + .CALL ARGW0=GR,ARGW1=GR + bl realloc,%r2 ;# 566 call_value_internal_symref + ldw 4(%r5),%r25 ;# 564 reload_outsi+2/5 + comib,= 0,%r28,L$0953 ;# 574 bleu+1 + stw %r28,0(%r5) ;# 570 reload_outsi+2/6 + comb,= %r28,%r4,L$0083 ;# 584 bleu+1 + sub %r6,%r4,%r19 ;# 586 subsi3/1 + addl %r28,%r19,%r6 ;# 589 addsi3/1 + sub %r12,%r4,%r19 ;# 590 subsi3/1 + comib,= 0,%r10,L$0093 ;# 595 bleu+1 + addl %r28,%r19,%r12 ;# 593 addsi3/1 + sub %r10,%r4,%r19 ;# 596 subsi3/1 + addl %r28,%r19,%r10 ;# 599 addsi3/1 +L$0093 + comib,= 0,%r8,L$0094 ;# 602 bleu+1 + sub %r8,%r4,%r19 ;# 603 subsi3/1 + addl %r28,%r19,%r8 ;# 606 addsi3/1 +L$0094 + comib,= 0,%r9,L$0083 ;# 609 bleu+1 + sub %r9,%r4,%r19 ;# 610 subsi3/1 + addl %r28,%r19,%r9 ;# 613 addsi3/1 +L$0083 + ldw 0(%r5),%r4 ;# 514 reload_outsi+2/5 + ldw 4(%r5),%r20 ;# 518 reload_outsi+2/5 + sub %r6,%r4,%r19 ;# 515 subsi3/1 + ldo 1(%r19),%r19 ;# 516 addsi3/2 + comb,<< %r20,%r19,L$0085 + nop ;# 520 bleu+1 +L$0084 + ldi 9,%r19 ;# 635 movqi+1/2 + bl L$0043,%r0 ;# 656 jump + stbs,ma %r19,1(%r6) ;# 636 movqi+1/6 +L$0877 + bl L$0110,%r0 ;# 897 jump + stw %r21,-296(%r30) ;# 2391 reload_outsi+2/6 +L$0101 +L$1158 + and %r15,%r19,%r19 ;# 663 andsi3/1 + comiclr,= 0,%r19,%r0 ;# 665 bleu+1 + bl,n L$0076,%r0 +L$0104 + comib,<> 0,%r8,L$0105 ;# 674 bleu+1 + ldi 0,%r13 ;# 711 reload_outsi+2/2 + extrs,>= %r15,26,1,%r0 ;# 681 bleu+3 + extrs,< %r15,27,1,%r0 ;# 700 movsi-4 + nop + bl,n L$0076,%r0 +L$0105 + ldi 0,%r11 ;# 714 reload_outsi+2/2 + ldi 0,%r22 ;# 716 reload_outsi+2/2 + ldi 43,%r24 ;# 8688 reload_outsi+2/2 + ldi 63,%r23 ;# 8690 reload_outsi+2/2 + ldi 42,%r28 ;# 8692 reload_outsi+2/2 + ldi 2,%r19 ;# 8694 reload_outsi+2/2 + and %r15,%r19,%r25 ;# 8695 andsi3/1 + ldi 92,%r26 ;# 8697 reload_outsi+2/2 +L$0109 + comb,= %r24,%r7,L$0112 ;# 727 bleu+1 + copy %r11,%r19 ;# 8780 reload_outsi+2/1 + depi -1,31,1,%r19 ;# 729 iorsi3+1/2 + bl L$0113,%r0 ;# 731 jump + extrs %r19,31,8,%r19 ;# 730 extendqisi2 +L$0112 + extrs %r11,31,8,%r19 ;# 734 extendqisi2 +L$0113 +L$1159 + comb,= %r23,%r7,L$0114 ;# 744 bleu+1 + copy %r19,%r11 ;# 737 reload_outsi+2/1 + copy %r22,%r19 ;# 8783 reload_outsi+2/1 + depi -1,31,1,%r19 ;# 746 iorsi3+1/2 + bl L$0115,%r0 ;# 748 jump + extrs %r19,31,8,%r19 ;# 747 extendqisi2 +L$0114 + extrs %r22,31,8,%r19 ;# 751 extendqisi2 +L$0115 + ldw -296(%r30),%r21 ;# 2355 reload_outsi+2/5 + comb,= %r16,%r21,L$0110 ;# 757 bleu+1 + copy %r19,%r22 ;# 754 reload_outsi+2/1 + copy %r21,%r20 ;# 8743 reload_outsi+2/1 + ldbs,ma 1(%r20),%r7 ;# 776 zero_extendqisi2/2 + comib,= 0,%r14,L$0118 ;# 781 bleu+1 + stw %r20,-296(%r30) ;# 2364 reload_outsi+2/6 + addl %r14,%r7,%r19 ;# 782 addsi3/1 + ldb 0(%r19),%r7 ;# 785 zero_extendqisi2/2 +L$0118 + comb,= %r28,%r7,L$0109 + nop ;# 802 bleu+1 + comib,<>,n 0,%r25,L$0869 ;# 807 bleu+1 + comb,= %r24,%r7,L$1159 ;# 811 bleu+1 + extrs %r11,31,8,%r19 ;# 734 extendqisi2 + comb,= %r23,%r7,L$0109 ;# 815 bleu+1 + ldw -296(%r30),%r19 ;# 2400 reload_outsi+2/5 + bl,n L$1160,%r0 ;# 827 jump +L$0869 + comb,<> %r26,%r7,L$0126 ;# 831 bleu+1 + ldw -296(%r30),%r19 ;# 2400 reload_outsi+2/5 + comclr,<> %r16,%r20,%r0 ;# 835 bleu+1 + bl L$0903,%r0 + ldo 1(%r20),%r19 ;# 863 addsi3/2 + ldb 1(%r21),%r3 ;# 860 zero_extendqisi2/2 + comib,= 0,%r14,L$0129 ;# 865 bleu+1 + stw %r19,-296(%r30) ;# 2379 reload_outsi+2/6 + addl %r14,%r3,%r19 ;# 866 addsi3/1 + ldb 0(%r19),%r3 ;# 869 zero_extendqisi2/2 +L$0129 + comb,= %r24,%r3,L$0109 ;# 886 bleu+1 + copy %r3,%r7 ;# 903 reload_outsi+2/1 + comb,<> %r23,%r3,L$0877 + nop ;# 890 bleu+1 + bl,n L$0109,%r0 ;# 905 jump +L$0126 +L$1160 + ldo -1(%r19),%r19 ;# 910 addsi3/2 + stw %r19,-296(%r30) ;# 2397 reload_outsi+2/6 +L$0110 + comiclr,<> 0,%r8,%r0 ;# 927 bleu+1 + bl L$1161,%r0 + ldw -296(%r30),%r19 ;# 2328 reload_outsi+2/5 + comib,=,n 0,%r22,L$0137 ;# 934 bleu+1 + ldw 0(%r5),%r3 ;# 8002 reload_outsi+2/5 + ldw 4(%r5),%r20 ;# 8005 reload_outsi+2/5 + sub %r6,%r3,%r19 ;# 8003 subsi3/1 + ldo 3(%r19),%r19 ;# 8004 addsi3/2 + comb,>>=,n %r20,%r19,L$0139 ;# 8006 bleu+1 + ldil L'65536,%r4 ;# 8686 reload_outsi+2/3 +L$0140 + comclr,<> %r4,%r20,%r0 ;# 961 bleu+1 + bl L$0944,%r0 + zdep %r20,30,31,%r19 ;# 971 ashlsi3+1 + comb,>>= %r4,%r19,L$0145 ;# 979 bleu+1 + stw %r19,4(%r5) ;# 973 reload_outsi+2/6 + stw %r4,4(%r5) ;# 982 reload_outsi+2/6 +L$0145 + ldw 0(%r5),%r26 ;# 989 reload_outsi+2/5 + .CALL ARGW0=GR,ARGW1=GR + bl realloc,%r2 ;# 993 call_value_internal_symref + ldw 4(%r5),%r25 ;# 991 reload_outsi+2/5 + comib,= 0,%r28,L$0953 ;# 1001 bleu+1 + stw %r28,0(%r5) ;# 997 reload_outsi+2/6 + comb,= %r28,%r3,L$0138 ;# 1011 bleu+1 + sub %r6,%r3,%r19 ;# 1013 subsi3/1 + addl %r28,%r19,%r6 ;# 1016 addsi3/1 + sub %r12,%r3,%r19 ;# 1017 subsi3/1 + comib,= 0,%r10,L$0148 ;# 1022 bleu+1 + addl %r28,%r19,%r12 ;# 1020 addsi3/1 + sub %r10,%r3,%r19 ;# 1023 subsi3/1 + addl %r28,%r19,%r10 ;# 1026 addsi3/1 +L$0148 + comib,= 0,%r8,L$0149 ;# 1029 bleu+1 + sub %r8,%r3,%r19 ;# 1030 subsi3/1 + addl %r28,%r19,%r8 ;# 1033 addsi3/1 +L$0149 + comib,= 0,%r9,L$0138 ;# 1036 bleu+1 + sub %r9,%r3,%r19 ;# 1037 subsi3/1 + addl %r28,%r19,%r9 ;# 1040 addsi3/1 +L$0138 + ldw 0(%r5),%r3 ;# 941 reload_outsi+2/5 + ldw 4(%r5),%r20 ;# 945 reload_outsi+2/5 + sub %r6,%r3,%r19 ;# 942 subsi3/1 + ldo 3(%r19),%r19 ;# 943 addsi3/2 + comb,<< %r20,%r19,L$0140 + nop ;# 947 bleu+1 +L$0139 + comib,= 0,%r14,L$0154 ;# 1063 bleu+1 + ldw -296(%r30),%r19 ;# 2403 reload_outsi+2/5 + ldb -2(%r19),%r19 ;# 1066 zero_extendqisi2/2 + addl %r14,%r19,%r19 ;# 1067 addsi3/1 + bl L$0947,%r0 ;# 1071 jump + ldb 0(%r19),%r19 ;# 1069 movqi+1/5 +L$0154 + ldb -2(%r19),%r19 ;# 1075 movqi+1/5 +L$0947 + comib,= 0,%r14,L$0156 ;# 1079 bleu+1 + extrs %r19,31,8,%r20 ;# 1076 extendqisi2 + ldb 46(%r14),%r19 ;# 1081 movqi+1/5 + extrs %r19,31,8,%r19 ;# 1082 extendqisi2 + comb,= %r19,%r20,L$0157 ;# 1084 bleu+1 + ldi 17,%r26 ;# 1159 reload_outsi+2/2 + bl,n L$1162,%r0 ;# 1085 jump +L$0156 + ldi 46,%r19 ;# 1089 reload_outsi+2/2 + comb,<> %r19,%r20,L$1162 ;# 1091 bleu+1 + ldi 17,%r26 ;# 1159 reload_outsi+2/2 +L$0157 + comib,= 0,%r11,L$0153 ;# 1096 bleu+1 + ldw -296(%r30),%r19 ;# 2409 reload_outsi+2/5 + comb,<<= %r16,%r19,L$1162 ;# 1098 bleu+1 + ldi 17,%r26 ;# 1159 reload_outsi+2/2 + comib,=,n 0,%r14,L$0158 ;# 1100 bleu+1 + ldb 0(%r19),%r19 ;# 1103 zero_extendqisi2/2 + addl %r14,%r19,%r19 ;# 1104 addsi3/1 +L$0158 + ldb 0(%r19),%r19 ;# 1112 movqi+1/5 + comib,= 0,%r14,L$0160 ;# 1116 bleu+1 + extrs %r19,31,8,%r20 ;# 1113 extendqisi2 + ldb 10(%r14),%r19 ;# 1118 movqi+1/5 + extrs %r19,31,8,%r19 ;# 1119 extendqisi2 + comb,= %r19,%r20,L$0161 ;# 1121 bleu+1 + ldi 17,%r26 ;# 1159 reload_outsi+2/2 + bl,n L$1162,%r0 ;# 1122 jump +L$0160 + comib,<> 10,%r20,L$1162 ;# 1126 bleu+1 + ldi 17,%r26 ;# 1159 reload_outsi+2/2 +L$0161 + bb,< %r15,25,L$1162 ;# 1134 bleu+3 + ldi 17,%r26 ;# 1159 reload_outsi+2/2 + ldi 12,%r26 ;# 1140 reload_outsi+2/2 + copy %r6,%r25 ;# 1142 reload_outsi+2/1 + sub %r8,%r6,%r24 ;# 1137 subsi3/1 + .CALL ARGW0=GR,ARGW1=GR,ARGW2=GR + bl store_op1,%r2 ;# 1146 call_internal_symref + ldo -3(%r24),%r24 ;# 1144 addsi3/2 + bl L$0162,%r0 ;# 1151 jump + ldi 1,%r13 ;# 1149 reload_outsi+2/2 +L$0153 + ldi 17,%r26 ;# 1159 reload_outsi+2/2 +L$1162 + copy %r6,%r25 ;# 1161 reload_outsi+2/1 + sub %r8,%r6,%r24 ;# 1156 subsi3/1 + .CALL ARGW0=GR,ARGW1=GR,ARGW2=GR + bl store_op1,%r2 ;# 1165 call_internal_symref + ldo -6(%r24),%r24 ;# 1163 addsi3/2 +L$0162 + ldo 3(%r6),%r6 ;# 1168 addsi3/2 +L$0137 + ldw 0(%r5),%r3 ;# 8010 reload_outsi+2/5 + ldw 4(%r5),%r20 ;# 8013 reload_outsi+2/5 + sub %r6,%r3,%r19 ;# 8011 subsi3/1 + ldo 3(%r19),%r19 ;# 8012 addsi3/2 + comb,>>=,n %r20,%r19,L$0164 ;# 8014 bleu+1 + ldil L'65536,%r4 ;# 8684 reload_outsi+2/3 +L$0165 + comclr,<> %r4,%r20,%r0 ;# 1195 bleu+1 + bl L$0944,%r0 + zdep %r20,30,31,%r19 ;# 1205 ashlsi3+1 + comb,>>= %r4,%r19,L$0170 ;# 1213 bleu+1 + stw %r19,4(%r5) ;# 1207 reload_outsi+2/6 + stw %r4,4(%r5) ;# 1216 reload_outsi+2/6 +L$0170 + ldw 0(%r5),%r26 ;# 1223 reload_outsi+2/5 + .CALL ARGW0=GR,ARGW1=GR + bl realloc,%r2 ;# 1227 call_value_internal_symref + ldw 4(%r5),%r25 ;# 1225 reload_outsi+2/5 + comib,= 0,%r28,L$0953 ;# 1235 bleu+1 + stw %r28,0(%r5) ;# 1231 reload_outsi+2/6 + comb,= %r28,%r3,L$0163 ;# 1245 bleu+1 + sub %r6,%r3,%r19 ;# 1247 subsi3/1 + addl %r28,%r19,%r6 ;# 1250 addsi3/1 + sub %r12,%r3,%r19 ;# 1251 subsi3/1 + comib,= 0,%r10,L$0173 ;# 1256 bleu+1 + addl %r28,%r19,%r12 ;# 1254 addsi3/1 + sub %r10,%r3,%r19 ;# 1257 subsi3/1 + addl %r28,%r19,%r10 ;# 1260 addsi3/1 +L$0173 + comib,= 0,%r8,L$0174 ;# 1263 bleu+1 + sub %r8,%r3,%r19 ;# 1264 subsi3/1 + addl %r28,%r19,%r8 ;# 1267 addsi3/1 +L$0174 + comib,= 0,%r9,L$0163 ;# 1270 bleu+1 + sub %r9,%r3,%r19 ;# 1271 subsi3/1 + addl %r28,%r19,%r9 ;# 1274 addsi3/1 +L$0163 + ldw 0(%r5),%r3 ;# 1175 reload_outsi+2/5 + ldw 4(%r5),%r20 ;# 1179 reload_outsi+2/5 + sub %r6,%r3,%r19 ;# 1176 subsi3/1 + ldo 3(%r19),%r19 ;# 1177 addsi3/2 + comb,<< %r20,%r19,L$0165 + nop ;# 1181 bleu+1 +L$0164 + ldi 14,%r26 ;# 8786 reload_outsi+2/2 + comiclr,= 0,%r13,%r0 ;# 1310 beq-1/2 + ldi 15,%r26 + copy %r8,%r25 ;# 1312 reload_outsi+2/1 + sub %r6,%r8,%r24 ;# 1314 subsi3/1 + .CALL ARGW0=GR,ARGW1=GR,ARGW2=GR,ARGW3=GR + bl insert_op1,%r2 ;# 1318 call_internal_symref + copy %r6,%r23 ;# 1316 reload_outsi+2/1 + ldi 0,%r9 ;# 1321 reload_outsi+2/2 + comib,<> 0,%r11,L$0043 ;# 1326 bleu+1 + ldo 3(%r6),%r6 ;# 1323 addsi3/2 + ldw 0(%r5),%r3 ;# 8019 reload_outsi+2/5 + ldw 4(%r5),%r20 ;# 8022 reload_outsi+2/5 + sub %r6,%r3,%r19 ;# 8020 subsi3/1 + ldo 3(%r19),%r19 ;# 8021 addsi3/2 + comb,>>=,n %r20,%r19,L$0182 ;# 8023 bleu+1 + ldil L'65536,%r4 ;# 8682 reload_outsi+2/3 +L$0183 + comb,= %r4,%r20,L$0944 ;# 1352 bleu+1 + zdep %r20,30,31,%r19 ;# 1362 ashlsi3+1 + comb,>>= %r4,%r19,L$0188 ;# 1370 bleu+1 + stw %r19,4(%r5) ;# 1364 reload_outsi+2/6 + stw %r4,4(%r5) ;# 1373 reload_outsi+2/6 +L$0188 + ldw 0(%r5),%r26 ;# 1380 reload_outsi+2/5 + .CALL ARGW0=GR,ARGW1=GR + bl realloc,%r2 ;# 1384 call_value_internal_symref + ldw 4(%r5),%r25 ;# 1382 reload_outsi+2/5 + comib,= 0,%r28,L$0953 ;# 1392 bleu+1 + stw %r28,0(%r5) ;# 1388 reload_outsi+2/6 + comb,= %r28,%r3,L$0181 ;# 1402 bleu+1 + sub %r6,%r3,%r19 ;# 1404 subsi3/1 + addl %r28,%r19,%r6 ;# 1407 addsi3/1 + sub %r12,%r3,%r19 ;# 1408 subsi3/1 + comib,= 0,%r10,L$0191 ;# 1413 bleu+1 + addl %r28,%r19,%r12 ;# 1411 addsi3/1 + sub %r10,%r3,%r19 ;# 1414 subsi3/1 + addl %r28,%r19,%r10 ;# 1417 addsi3/1 +L$0191 + comib,= 0,%r8,L$0192 ;# 1420 bleu+1 + sub %r8,%r3,%r19 ;# 1421 subsi3/1 + addl %r28,%r19,%r8 ;# 1424 addsi3/1 +L$0192 + comib,= 0,%r9,L$0181 ;# 1427 bleu+1 + sub %r9,%r3,%r19 ;# 1428 subsi3/1 + addl %r28,%r19,%r9 ;# 1431 addsi3/1 +L$0181 + ldw 0(%r5),%r3 ;# 1332 reload_outsi+2/5 + ldw 4(%r5),%r20 ;# 1336 reload_outsi+2/5 + sub %r6,%r3,%r19 ;# 1333 subsi3/1 + ldo 3(%r19),%r19 ;# 1334 addsi3/2 + comb,<< %r20,%r19,L$0183 + nop ;# 1338 bleu+1 +L$0182 + ldi 18,%r26 ;# 1454 reload_outsi+2/2 + copy %r8,%r25 ;# 1456 reload_outsi+2/1 + ldi 3,%r24 ;# 1458 reload_outsi+2/2 + .CALL ARGW0=GR,ARGW1=GR,ARGW2=GR,ARGW3=GR + bl insert_op1,%r2 ;# 1462 call_internal_symref + copy %r6,%r23 ;# 1460 reload_outsi+2/1 + bl L$0043,%r0 ;# 1470 jump + ldo 3(%r6),%r6 ;# 1464 addsi3/2 +L$0196 + ldw 4(%r5),%r20 ;# 8030 reload_outsi+2/5 + sub %r6,%r4,%r19 ;# 8028 subsi3/1 + ldo 1(%r19),%r19 ;# 8029 addsi3/2 + comb,>>= %r20,%r19,L$0201 ;# 8031 bleu+1 + copy %r6,%r8 ;# 1475 reload_outsi+2/1 + ldil L'65536,%r3 ;# 8680 reload_outsi+2/3 +L$0202 + comb,= %r3,%r20,L$0944 ;# 1503 bleu+1 + zdep %r20,30,31,%r19 ;# 1513 ashlsi3+1 + comb,>>= %r3,%r19,L$0207 ;# 1521 bleu+1 + stw %r19,4(%r5) ;# 1515 reload_outsi+2/6 + stw %r3,4(%r5) ;# 1524 reload_outsi+2/6 +L$0207 + ldw 0(%r5),%r26 ;# 1531 reload_outsi+2/5 + .CALL ARGW0=GR,ARGW1=GR + bl realloc,%r2 ;# 1535 call_value_internal_symref + ldw 4(%r5),%r25 ;# 1533 reload_outsi+2/5 + comib,= 0,%r28,L$0953 ;# 1543 bleu+1 + stw %r28,0(%r5) ;# 1539 reload_outsi+2/6 + comb,= %r28,%r4,L$0200 ;# 1553 bleu+1 + sub %r6,%r4,%r19 ;# 1555 subsi3/1 + addl %r28,%r19,%r6 ;# 1558 addsi3/1 + sub %r12,%r4,%r19 ;# 1559 subsi3/1 + comib,= 0,%r10,L$0210 ;# 1564 bleu+1 + addl %r28,%r19,%r12 ;# 1562 addsi3/1 + sub %r10,%r4,%r19 ;# 1565 subsi3/1 + addl %r28,%r19,%r10 ;# 1568 addsi3/1 +L$0210 + comib,= 0,%r8,L$0211 ;# 1571 bleu+1 + sub %r8,%r4,%r19 ;# 1572 subsi3/1 + addl %r28,%r19,%r8 ;# 1575 addsi3/1 +L$0211 + comib,= 0,%r9,L$0200 ;# 1578 bleu+1 + sub %r9,%r4,%r19 ;# 1579 subsi3/1 + addl %r28,%r19,%r9 ;# 1582 addsi3/1 +L$0200 + ldw 0(%r5),%r4 ;# 1483 reload_outsi+2/5 + ldw 4(%r5),%r20 ;# 1487 reload_outsi+2/5 + sub %r6,%r4,%r19 ;# 1484 subsi3/1 + ldo 1(%r19),%r19 ;# 1485 addsi3/2 + comb,<< %r20,%r19,L$0202 + nop ;# 1489 bleu+1 +L$0201 + ldi 2,%r19 ;# 1604 movqi+1/2 + bl L$0043,%r0 ;# 1617 jump + stbs,ma %r19,1(%r6) ;# 1605 movqi+1/6 +L$0216 + comb,= %r16,%r19,L$0902 ;# 1626 bleu+1 + ldi 0,%r13 ;# 1623 reload_outsi+2/2 + ldw 0(%r5),%r3 ;# 8035 reload_outsi+2/5 + ldw 4(%r5),%r20 ;# 8038 reload_outsi+2/5 + sub %r6,%r3,%r19 ;# 8036 subsi3/1 + ldo 34(%r19),%r19 ;# 8037 addsi3/2 + comb,>>= %r20,%r19,L$0219 ;# 8039 bleu+1 + ldil L'65536,%r4 ;# 8678 reload_outsi+2/3 +L$0220 + comb,= %r4,%r20,L$0944 ;# 1661 bleu+1 + zdep %r20,30,31,%r19 ;# 1671 ashlsi3+1 + comb,>>= %r4,%r19,L$0225 ;# 1679 bleu+1 + stw %r19,4(%r5) ;# 1673 reload_outsi+2/6 + stw %r4,4(%r5) ;# 1682 reload_outsi+2/6 +L$0225 + ldw 0(%r5),%r26 ;# 1689 reload_outsi+2/5 + .CALL ARGW0=GR,ARGW1=GR + bl realloc,%r2 ;# 1693 call_value_internal_symref + ldw 4(%r5),%r25 ;# 1691 reload_outsi+2/5 + comib,= 0,%r28,L$0953 ;# 1701 bleu+1 + stw %r28,0(%r5) ;# 1697 reload_outsi+2/6 + comb,= %r28,%r3,L$0218 ;# 1711 bleu+1 + sub %r6,%r3,%r19 ;# 1713 subsi3/1 + addl %r28,%r19,%r6 ;# 1716 addsi3/1 + sub %r12,%r3,%r19 ;# 1717 subsi3/1 + comib,= 0,%r10,L$0228 ;# 1722 bleu+1 + addl %r28,%r19,%r12 ;# 1720 addsi3/1 + sub %r10,%r3,%r19 ;# 1723 subsi3/1 + addl %r28,%r19,%r10 ;# 1726 addsi3/1 +L$0228 + comib,= 0,%r8,L$0229 ;# 1729 bleu+1 + sub %r8,%r3,%r19 ;# 1730 subsi3/1 + addl %r28,%r19,%r8 ;# 1733 addsi3/1 +L$0229 + comib,= 0,%r9,L$0218 ;# 1736 bleu+1 + sub %r9,%r3,%r19 ;# 1737 subsi3/1 + addl %r28,%r19,%r9 ;# 1740 addsi3/1 +L$0218 + ldw 0(%r5),%r3 ;# 1641 reload_outsi+2/5 + ldw 4(%r5),%r20 ;# 1645 reload_outsi+2/5 + sub %r6,%r3,%r19 ;# 1642 subsi3/1 + ldo 34(%r19),%r19 ;# 1643 addsi3/2 + comb,<< %r20,%r19,L$0220 + nop ;# 1647 bleu+1 +L$0219 + ldw 0(%r5),%r4 ;# 8043 reload_outsi+2/5 + ldw 4(%r5),%r20 ;# 8046 reload_outsi+2/5 + sub %r6,%r4,%r19 ;# 8044 subsi3/1 + ldo 1(%r19),%r19 ;# 8045 addsi3/2 + comb,>>= %r20,%r19,L$0237 ;# 8047 bleu+1 + copy %r6,%r8 ;# 1763 reload_outsi+2/1 + ldil L'65536,%r3 ;# 8676 reload_outsi+2/3 +L$0238 + comb,= %r3,%r20,L$0944 ;# 1791 bleu+1 + zdep %r20,30,31,%r19 ;# 1801 ashlsi3+1 + comb,>>= %r3,%r19,L$0243 ;# 1809 bleu+1 + stw %r19,4(%r5) ;# 1803 reload_outsi+2/6 + stw %r3,4(%r5) ;# 1812 reload_outsi+2/6 +L$0243 + ldw 0(%r5),%r26 ;# 1819 reload_outsi+2/5 + .CALL ARGW0=GR,ARGW1=GR + bl realloc,%r2 ;# 1823 call_value_internal_symref + ldw 4(%r5),%r25 ;# 1821 reload_outsi+2/5 + comib,= 0,%r28,L$0953 ;# 1831 bleu+1 + stw %r28,0(%r5) ;# 1827 reload_outsi+2/6 + comb,= %r28,%r4,L$0236 ;# 1841 bleu+1 + sub %r6,%r4,%r19 ;# 1843 subsi3/1 + addl %r28,%r19,%r6 ;# 1846 addsi3/1 + sub %r12,%r4,%r19 ;# 1847 subsi3/1 + comib,= 0,%r10,L$0246 ;# 1852 bleu+1 + addl %r28,%r19,%r12 ;# 1850 addsi3/1 + sub %r10,%r4,%r19 ;# 1853 subsi3/1 + addl %r28,%r19,%r10 ;# 1856 addsi3/1 +L$0246 + comib,= 0,%r8,L$0247 ;# 1859 bleu+1 + sub %r8,%r4,%r19 ;# 1860 subsi3/1 + addl %r28,%r19,%r8 ;# 1863 addsi3/1 +L$0247 + comib,= 0,%r9,L$0236 ;# 1866 bleu+1 + sub %r9,%r4,%r19 ;# 1867 subsi3/1 + addl %r28,%r19,%r9 ;# 1870 addsi3/1 +L$0236 + ldw 0(%r5),%r4 ;# 1771 reload_outsi+2/5 + ldw 4(%r5),%r20 ;# 1775 reload_outsi+2/5 + sub %r6,%r4,%r19 ;# 1772 subsi3/1 + ldo 1(%r19),%r19 ;# 1773 addsi3/2 + comb,<< %r20,%r19,L$0238 + nop ;# 1777 bleu+1 +L$0237 + copy %r6,%r22 ;# 1909 reload_outsi+2/1 + ldo 1(%r6),%r6 ;# 1891 addsi3/2 + ldw -296(%r30),%r19 ;# 2421 reload_outsi+2/5 + ldb 0(%r19),%r19 ;# 1893 movqi+1/5 + ldi 94,%r21 ;# 1896 reload_outsi+2/2 + extrs %r19,31,8,%r19 ;# 1894 extendqisi2 + comb,<> %r21,%r19,L$0251 ;# 1898 bleu+1 + ldi 3,%r20 ;# 8051 movqi+1/2 + ldi 4,%r20 ;# 1900 movqi+1/2 +L$0251 + stb %r20,0(%r22) ;# 1911 movqi+1/6 + ldw -296(%r30),%r20 ;# 2424 reload_outsi+2/5 + ldb 0(%r20),%r19 ;# 1923 movqi+1/5 + extrs %r19,31,8,%r19 ;# 1924 extendqisi2 + comb,<> %r21,%r19,L$0254 ;# 1928 bleu+1 + ldo 1(%r20),%r19 ;# 1930 addsi3/2 + stw %r19,-296(%r30) ;# 2427 reload_outsi+2/6 +L$0254 + ldw 0(%r5),%r4 ;# 8052 reload_outsi+2/5 + ldw 4(%r5),%r20 ;# 8055 reload_outsi+2/5 + ldw -296(%r30),%r1 ;# 2433 reload_outsi+2/5 + sub %r6,%r4,%r19 ;# 8053 subsi3/1 + ldo 1(%r19),%r19 ;# 8054 addsi3/2 + comb,>>= %r20,%r19,L$0259 ;# 8056 bleu+1 + stw %r1,-268(%r30) ;# 8789 reload_outsi+2/6 + ldil L'65536,%r3 ;# 8674 reload_outsi+2/3 +L$0260 + comb,= %r3,%r20,L$0944 ;# 1962 bleu+1 + zdep %r20,30,31,%r19 ;# 1972 ashlsi3+1 + comb,>>= %r3,%r19,L$0265 ;# 1980 bleu+1 + stw %r19,4(%r5) ;# 1974 reload_outsi+2/6 + stw %r3,4(%r5) ;# 1983 reload_outsi+2/6 +L$0265 + ldw 0(%r5),%r26 ;# 1990 reload_outsi+2/5 + .CALL ARGW0=GR,ARGW1=GR + bl realloc,%r2 ;# 1994 call_value_internal_symref + ldw 4(%r5),%r25 ;# 1992 reload_outsi+2/5 + comib,= 0,%r28,L$0953 ;# 2002 bleu+1 + stw %r28,0(%r5) ;# 1998 reload_outsi+2/6 + comb,= %r28,%r4,L$0258 ;# 2012 bleu+1 + sub %r6,%r4,%r19 ;# 2014 subsi3/1 + addl %r28,%r19,%r6 ;# 2017 addsi3/1 + sub %r12,%r4,%r19 ;# 2018 subsi3/1 + comib,= 0,%r10,L$0268 ;# 2023 bleu+1 + addl %r28,%r19,%r12 ;# 2021 addsi3/1 + sub %r10,%r4,%r19 ;# 2024 subsi3/1 + addl %r28,%r19,%r10 ;# 2027 addsi3/1 +L$0268 + comib,= 0,%r8,L$0269 ;# 2030 bleu+1 + sub %r8,%r4,%r19 ;# 2031 subsi3/1 + addl %r28,%r19,%r8 ;# 2034 addsi3/1 +L$0269 + comib,= 0,%r9,L$0258 ;# 2037 bleu+1 + sub %r9,%r4,%r19 ;# 2038 subsi3/1 + addl %r28,%r19,%r9 ;# 2041 addsi3/1 +L$0258 + ldw 0(%r5),%r4 ;# 1942 reload_outsi+2/5 + ldw 4(%r5),%r20 ;# 1946 reload_outsi+2/5 + sub %r6,%r4,%r19 ;# 1943 subsi3/1 + ldo 1(%r19),%r19 ;# 1944 addsi3/2 + comb,<< %r20,%r19,L$0260 + nop ;# 1948 bleu+1 +L$0259 + ldi 32,%r19 ;# 2063 movqi+1/2 + stbs,ma %r19,1(%r6) ;# 2064 movqi+1/6 + copy %r6,%r26 ;# 2077 reload_outsi+2/1 + ldi 0,%r25 ;# 2079 reload_outsi+2/2 + .CALL ARGW0=GR,ARGW1=GR,ARGW2=GR + bl memset,%r2 ;# 2083 call_value_internal_symref + ldi 32,%r24 ;# 2081 reload_outsi+2/2 + ldb -2(%r6),%r19 ;# 2087 zero_extendqisi2/2 + comib,<> 4,%r19,L$0274 ;# 2089 bleu+1 + ldi 93,%r17 ;# 8622 reload_outsi+2/2 + bb,>=,n %r15,23,L$0274 ;# 2094 movsi-4 + ldb 1(%r6),%r19 ;# 2097 movqi+1/5 + depi -1,29,1,%r19 ;# 2099 iorsi3+1/2 + stb %r19,1(%r6) ;# 2101 movqi+1/6 +L$0274 + ldi 4,%r18 ;# 8628 reload_outsi+2/2 + and %r15,%r18,%r1 ;# 8629 andsi3/1 + stw %r1,-252(%r30) ;# 8792 reload_outsi+2/6 + ldo -288(%r30),%r11 ;# 8632 addsi3/2 +L$0275 + ldw -296(%r30),%r20 ;# 2436 reload_outsi+2/5 +L$1165 + comb,= %r16,%r20,L$0902 ;# 2109 bleu+1 + copy %r20,%r21 ;# 8745 reload_outsi+2/1 + ldbs,ma 1(%r21),%r7 ;# 2134 zero_extendqisi2/2 + comib,= 0,%r14,L$0280 ;# 2139 bleu+1 + stw %r21,-296(%r30) ;# 2445 reload_outsi+2/6 + addl %r14,%r7,%r19 ;# 2140 addsi3/1 + ldb 0(%r19),%r7 ;# 2143 zero_extendqisi2/2 +L$0280 + bb,>= %r15,31,L$0285 ;# 2159 movsi-4 + ldi 92,%r19 ;# 2161 reload_outsi+2/2 + comb,<>,n %r19,%r7,L$0285 ;# 2163 bleu+1 + comb,= %r16,%r21,L$0903 ;# 2167 bleu+1 + ldo 1(%r21),%r19 ;# 2195 addsi3/2 + ldb 1(%r20),%r3 ;# 2192 zero_extendqisi2/2 + comib,= 0,%r14,L$0288 ;# 2197 bleu+1 + stw %r19,-296(%r30) ;# 2460 reload_outsi+2/6 + addl %r14,%r3,%r19 ;# 2198 addsi3/1 + ldb 0(%r19),%r3 ;# 2201 zero_extendqisi2/2 +L$0288 + extru %r3,28,29,%r19 ;# 2216 lshrsi3/2 + addl %r6,%r19,%r19 ;# 2219 addsi3/1 + bl L$0948,%r0 ;# 2235 jump + extru %r3,31,3,%r20 ;# 2222 andsi3/1 +L$0285 + comb,<>,n %r17,%r7,L$0293 ;# 2243 bleu+1 + ldw -268(%r30),%r1 ;# 8798 reload_outsi+2/5 + ldw -296(%r30),%r20 ;# 2466 reload_outsi+2/5 + ldo 1(%r1),%r19 ;# 2244 addsi3/2 + comb,<>,n %r19,%r20,L$0276 ;# 2246 bleu+1 +L$0293 + comib,= 0,%r13,L$0294 ;# 2253 bleu+1 + ldi 45,%r1 ;# 8801 reload_outsi+2/2 + comb,<> %r1,%r7,L$1163 ;# 2257 bleu+1 + ldw -296(%r30),%r20 ;# 2524 reload_outsi+2/5 + ldw -296(%r30),%r19 ;# 2469 reload_outsi+2/5 + ldb 0(%r19),%r19 ;# 2259 movqi+1/5 + extrs %r19,31,8,%r19 ;# 2260 extendqisi2 + comb,<>,n %r17,%r19,L$0895 ;# 2264 bleu+1 +L$0294 + ldi 45,%r1 ;# 8804 reload_outsi+2/2 + comb,<> %r1,%r7,L$1163 ;# 2280 bleu+1 + ldw -296(%r30),%r20 ;# 2524 reload_outsi+2/5 + ldw -276(%r30),%r1 ;# 8807 reload_outsi+2/5 + ldo -2(%r20),%r19 ;# 2281 addsi3/2 + comb,>>,n %r1,%r19,L$1179 ;# 2283 bleu+1 + ldb -2(%r20),%r19 ;# 2285 movqi+1/5 + ldi 91,%r1 ;# 8810 reload_outsi+2/2 + extrs %r19,31,8,%r19 ;# 2286 extendqisi2 + comb,= %r1,%r19,L$1163 ;# 2290 bleu+1 + ldw -276(%r30),%r1 ;# 8813 reload_outsi+2/5 +L$1179 + ldo -3(%r20),%r19 ;# 2294 addsi3/2 + comb,>>,n %r1,%r19,L$0297 ;# 2296 bleu+1 + ldb -3(%r20),%r19 ;# 2298 movqi+1/5 + ldi 91,%r1 ;# 8816 reload_outsi+2/2 + extrs %r19,31,8,%r19 ;# 2299 extendqisi2 + comb,<> %r1,%r19,L$1164 ;# 2303 bleu+1 + ldw -296(%r30),%r19 ;# 2487 reload_outsi+2/5 + ldb -2(%r20),%r19 ;# 2305 movqi+1/5 + ldi 94,%r20 ;# 2308 reload_outsi+2/2 + extrs %r19,31,8,%r19 ;# 2306 extendqisi2 + comb,= %r20,%r19,L$1163 ;# 2310 bleu+1 + ldw -296(%r30),%r20 ;# 2524 reload_outsi+2/5 +L$0297 + ldw -296(%r30),%r19 ;# 2487 reload_outsi+2/5 +L$1164 + ldb 0(%r19),%r19 ;# 2315 movqi+1/5 + extrs %r19,31,8,%r19 ;# 2316 extendqisi2 + comb,<> %r17,%r19,L$0302 ;# 2320 bleu+1 + ldw -296(%r30),%r20 ;# 2524 reload_outsi+2/5 +L$1163 + ldb 0(%r20),%r19 ;# 2526 movqi+1/5 + ldi 45,%r1 ;# 8819 reload_outsi+2/2 + extrs %r19,31,8,%r19 ;# 2527 extendqisi2 + comb,<>,n %r1,%r19,L$0300 ;# 2531 bleu+1 + ldb 1(%r20),%r19 ;# 2535 movqi+1/5 + extrs %r19,31,8,%r19 ;# 2536 extendqisi2 + comb,=,n %r17,%r19,L$0300 ;# 2540 bleu+1 + comb,= %r16,%r20,L$0922 ;# 2550 bleu+1 + ldo 1(%r20),%r19 ;# 2559 addsi3/2 + stw %r19,-296(%r30) ;# 2561 reload_outsi+2/6 +L$0302 + stw %r6,-52(%r30) ;# 2588 reload_outsi+2/6 + ldo -296(%r30),%r26 ;# 2590 addsi3/2 + copy %r16,%r25 ;# 2592 reload_outsi+2/1 + copy %r14,%r24 ;# 2594 reload_outsi+2/1 + .CALL ARGW0=GR,ARGW1=GR,ARGW2=GR,ARGW3=GR + bl compile_range,%r2 ;# 2598 call_value_internal_symref + copy %r15,%r23 ;# 2596 reload_outsi+2/1 + movb,= %r28,%r4,L$1165 ;# 2603 decrement_and_branch_until_zero+2/1 + ldw -296(%r30),%r20 ;# 2436 reload_outsi+2/5 + .CALL ARGW0=GR + bl free,%r2 ;# 2607 call_internal_symref + ldw -312(%r30),%r26 ;# 2605 reload_outsi+2/5 + bl L$0867,%r0 ;# 2611 jump + copy %r4,%r28 ;# 2609 reload_outsi+2/1 +L$0300 + ldw -252(%r30),%r1 ;# 8822 reload_outsi+2/5 + comib,= 0,%r1,L$0309 ;# 2624 bleu+1 + ldi 91,%r1 ;# 8825 reload_outsi+2/2 + comb,<> %r1,%r7,L$1166 ;# 2628 bleu+1 + ldi 0,%r13 ;# 3624 reload_outsi+2/2 + ldw -296(%r30),%r20 ;# 2630 reload_outsi+2/5 + ldb 0(%r20),%r19 ;# 2632 movqi+1/5 + ldi 58,%r1 ;# 8828 reload_outsi+2/2 + extrs %r19,31,8,%r19 ;# 2633 extendqisi2 + comb,<>,n %r1,%r19,L$1166 ;# 2637 bleu+1 + comb,= %r16,%r20,L$0922 ;# 2647 bleu+1 + ldo 1(%r20),%r19 ;# 2656 addsi3/2 + stw %r19,-296(%r30) ;# 2658 reload_outsi+2/6 + comb,= %r16,%r19,L$0902 ;# 2689 bleu+1 + ldi 0,%r3 ;# 2684 reload_outsi+2/2 +L$0317 + ldw -296(%r30),%r19 ;# 2709 reload_outsi+2/5 + comb,= %r16,%r19,L$0922 ;# 2711 bleu+1 + ldo 1(%r19),%r20 ;# 2720 addsi3/2 + stw %r20,-296(%r30) ;# 2722 reload_outsi+2/6 + comib,= 0,%r14,L$0321 ;# 2729 bleu+1 + ldb 0(%r19),%r7 ;# 2725 zero_extendqisi2/2 + addl %r14,%r7,%r19 ;# 2730 addsi3/1 + ldb 0(%r19),%r7 ;# 2733 zero_extendqisi2/2 +L$0321 + ldi 58,%r1 ;# 8831 reload_outsi+2/2 + comb,= %r1,%r7,L$1167 ;# 2750 bleu+1 + addl %r11,%r3,%r19 ;# 2789 addsi3/1 + comb,=,n %r17,%r7,L$1167 ;# 2754 bleu+1 + comb,=,n %r16,%r20,L$1167 ;# 2758 bleu+1 + comib,= 6,%r3,L$1167 ;# 2760 bleu+1 + copy %r3,%r20 ;# 2770 reload_outsi+2/1 + ldo 1(%r20),%r19 ;# 2771 addsi3/2 + extru %r19,31,8,%r3 ;# 2772 zero_extendqisi2/1 + addl %r11,%r20,%r20 ;# 2776 addsi3/1 + bl L$0317,%r0 ;# 2783 jump + stb %r7,0(%r20) ;# 2778 movqi+1/6 +L$1167 + comb,<> %r1,%r7,L$0328 ;# 2796 bleu+1 + stb %r0,0(%r19) ;# 2791 movqi+1/6 + ldw -296(%r30),%r19 ;# 2798 reload_outsi+2/5 + ldb 0(%r19),%r19 ;# 2800 movqi+1/5 + extrs %r19,31,8,%r19 ;# 2801 extendqisi2 + comb,<> %r17,%r19,L$1168 ;# 2805 bleu+1 + ldi 255,%r19 ;# 8069 reload_outsi+2/2 + copy %r11,%r26 ;# 2813 reload_outsi+2/1 + ldil LR'L$C0016,%r1 ;# 8835 add_high_const+3 + ldo RR'L$C0016(%r1),%r1 ;# 8836 movhi-2 + .CALL ARGW0=GR,ARGW1=GR + bl strcmp,%r2 ;# 2817 call_value_internal_symref + copy %r1,%r25 ;# 2815 reload_outsi+2/1 + copy %r11,%r26 ;# 2829 reload_outsi+2/1 + ldil LR'L$C0017,%r1 ;# 8837 add_high_const+3 + ldo RR'L$C0017(%r1),%r1 ;# 8838 movhi-2 + copy %r1,%r25 ;# 2831 reload_outsi+2/1 + comiclr,<> 0,%r28,%r28 ;# 2821 scc + ldi 1,%r28 + .CALL ARGW0=GR,ARGW1=GR + bl strcmp,%r2 ;# 2833 call_value_internal_symref + stw %r28,-244(%r30) ;# 8841 reload_outsi+2/6 + copy %r11,%r26 ;# 2845 reload_outsi+2/1 + ldil LR'L$C0018,%r1 ;# 8842 add_high_const+3 + ldo RR'L$C0018(%r1),%r1 ;# 8843 movhi-2 + copy %r1,%r25 ;# 2847 reload_outsi+2/1 + comiclr,<> 0,%r28,%r28 ;# 2837 scc + ldi 1,%r28 + .CALL ARGW0=GR,ARGW1=GR + bl strcmp,%r2 ;# 2849 call_value_internal_symref + stw %r28,-236(%r30) ;# 8846 reload_outsi+2/6 + copy %r11,%r26 ;# 2861 reload_outsi+2/1 + ldil LR'L$C0019,%r1 ;# 8847 add_high_const+3 + ldo RR'L$C0019(%r1),%r1 ;# 8848 movhi-2 + copy %r1,%r25 ;# 2863 reload_outsi+2/1 + comiclr,<> 0,%r28,%r28 ;# 2853 scc + ldi 1,%r28 + .CALL ARGW0=GR,ARGW1=GR + bl strcmp,%r2 ;# 2865 call_value_internal_symref + stw %r28,-228(%r30) ;# 8851 reload_outsi+2/6 + copy %r11,%r26 ;# 2877 reload_outsi+2/1 + ldil LR'L$C0020,%r1 ;# 8852 add_high_const+3 + ldo RR'L$C0020(%r1),%r1 ;# 8853 movhi-2 + copy %r1,%r25 ;# 2879 reload_outsi+2/1 + comiclr,<> 0,%r28,%r28 ;# 2869 scc + ldi 1,%r28 + .CALL ARGW0=GR,ARGW1=GR + bl strcmp,%r2 ;# 2881 call_value_internal_symref + stw %r28,-220(%r30) ;# 8856 reload_outsi+2/6 + copy %r11,%r26 ;# 2893 reload_outsi+2/1 + ldil LR'L$C0021,%r1 ;# 8857 add_high_const+3 + ldo RR'L$C0021(%r1),%r1 ;# 8858 movhi-2 + copy %r1,%r25 ;# 2895 reload_outsi+2/1 + comiclr,<> 0,%r28,%r28 ;# 2885 scc + ldi 1,%r28 + .CALL ARGW0=GR,ARGW1=GR + bl strcmp,%r2 ;# 2897 call_value_internal_symref + stw %r28,-212(%r30) ;# 8861 reload_outsi+2/6 + copy %r11,%r26 ;# 2909 reload_outsi+2/1 + ldil LR'L$C0022,%r1 ;# 8862 add_high_const+3 + ldo RR'L$C0022(%r1),%r1 ;# 8863 movhi-2 + copy %r1,%r25 ;# 2911 reload_outsi+2/1 + comiclr,<> 0,%r28,%r28 ;# 2901 scc + ldi 1,%r28 + .CALL ARGW0=GR,ARGW1=GR + bl strcmp,%r2 ;# 2913 call_value_internal_symref + stw %r28,-204(%r30) ;# 8866 reload_outsi+2/6 + copy %r11,%r26 ;# 2925 reload_outsi+2/1 + ldil LR'L$C0023,%r1 ;# 8867 add_high_const+3 + ldo RR'L$C0023(%r1),%r1 ;# 8868 movhi-2 + copy %r1,%r25 ;# 2927 reload_outsi+2/1 + comiclr,<> 0,%r28,%r28 ;# 2917 scc + ldi 1,%r28 + .CALL ARGW0=GR,ARGW1=GR + bl strcmp,%r2 ;# 2929 call_value_internal_symref + stw %r28,-196(%r30) ;# 8871 reload_outsi+2/6 + copy %r11,%r26 ;# 2941 reload_outsi+2/1 + ldil LR'L$C0024,%r1 ;# 8872 add_high_const+3 + ldo RR'L$C0024(%r1),%r1 ;# 8873 movhi-2 + copy %r1,%r25 ;# 2943 reload_outsi+2/1 + comiclr,<> 0,%r28,%r28 ;# 2933 scc + ldi 1,%r28 + .CALL ARGW0=GR,ARGW1=GR + bl strcmp,%r2 ;# 2945 call_value_internal_symref + stw %r28,-188(%r30) ;# 8876 reload_outsi+2/6 + copy %r11,%r26 ;# 2957 reload_outsi+2/1 + ldil LR'L$C0025,%r1 ;# 8877 add_high_const+3 + ldo RR'L$C0025(%r1),%r1 ;# 8878 movhi-2 + copy %r1,%r25 ;# 2959 reload_outsi+2/1 + comiclr,<> 0,%r28,%r28 ;# 2949 scc + ldi 1,%r28 + .CALL ARGW0=GR,ARGW1=GR + bl strcmp,%r2 ;# 2961 call_value_internal_symref + stw %r28,-180(%r30) ;# 8881 reload_outsi+2/6 + copy %r11,%r26 ;# 2973 reload_outsi+2/1 + ldil LR'L$C0026,%r19 ;# 2970 add_high_const+3 + ldo RR'L$C0026(%r19),%r3 ;# 2971 movhi-2 + copy %r3,%r25 ;# 2975 reload_outsi+2/1 + comiclr,<> 0,%r28,%r28 ;# 2965 scc + ldi 1,%r28 + .CALL ARGW0=GR,ARGW1=GR + bl strcmp,%r2 ;# 2977 call_value_internal_symref + stw %r28,-172(%r30) ;# 8884 reload_outsi+2/6 + copy %r11,%r26 ;# 2989 reload_outsi+2/1 + ldil LR'L$C0027,%r19 ;# 2986 add_high_const+3 + ldo RR'L$C0027(%r19),%r4 ;# 2987 movhi-2 + comiclr,<> 0,%r28,%r13 ;# 2981 scc + ldi 1,%r13 + .CALL ARGW0=GR,ARGW1=GR + bl strcmp,%r2 ;# 2993 call_value_internal_symref + copy %r4,%r25 ;# 2991 reload_outsi+2/1 + copy %r11,%r26 ;# 3005 reload_outsi+2/1 + ldil LR'L$C0017,%r1 ;# 8885 add_high_const+3 + ldo RR'L$C0017(%r1),%r1 ;# 8886 movhi-2 + comiclr,<> 0,%r28,%r7 ;# 2997 scc + ldi 1,%r7 + .CALL ARGW0=GR,ARGW1=GR + bl strcmp,%r2 ;# 3009 call_value_internal_symref + copy %r1,%r25 ;# 3007 reload_outsi+2/1 + comib,= 0,%r28,L$0329 ;# 3013 bleu+1 + copy %r11,%r26 ;# 3018 reload_outsi+2/1 + .CALL ARGW0=GR,ARGW1=GR + bl strcmp,%r2 ;# 3022 call_value_internal_symref + copy %r3,%r25 ;# 3020 reload_outsi+2/1 + comib,= 0,%r28,L$0329 ;# 3026 bleu+1 + copy %r11,%r26 ;# 3031 reload_outsi+2/1 + ldil LR'L$C0022,%r1 ;# 8887 add_high_const+3 + ldo RR'L$C0022(%r1),%r1 ;# 8888 movhi-2 + .CALL ARGW0=GR,ARGW1=GR + bl strcmp,%r2 ;# 3035 call_value_internal_symref + copy %r1,%r25 ;# 3033 reload_outsi+2/1 + comib,= 0,%r28,L$0329 ;# 3039 bleu+1 + copy %r11,%r26 ;# 3044 reload_outsi+2/1 + ldil LR'L$C0020,%r1 ;# 8889 add_high_const+3 + ldo RR'L$C0020(%r1),%r1 ;# 8890 movhi-2 + .CALL ARGW0=GR,ARGW1=GR + bl strcmp,%r2 ;# 3048 call_value_internal_symref + copy %r1,%r25 ;# 3046 reload_outsi+2/1 + comib,= 0,%r28,L$0329 ;# 3052 bleu+1 + copy %r11,%r26 ;# 3057 reload_outsi+2/1 + ldil LR'L$C0016,%r1 ;# 8891 add_high_const+3 + ldo RR'L$C0016(%r1),%r1 ;# 8892 movhi-2 + .CALL ARGW0=GR,ARGW1=GR + bl strcmp,%r2 ;# 3061 call_value_internal_symref + copy %r1,%r25 ;# 3059 reload_outsi+2/1 + comib,= 0,%r28,L$0329 ;# 3065 bleu+1 + copy %r11,%r26 ;# 3070 reload_outsi+2/1 + .CALL ARGW0=GR,ARGW1=GR + bl strcmp,%r2 ;# 3074 call_value_internal_symref + copy %r4,%r25 ;# 3072 reload_outsi+2/1 + comib,= 0,%r28,L$0329 ;# 3078 bleu+1 + copy %r11,%r26 ;# 3083 reload_outsi+2/1 + ldil LR'L$C0025,%r1 ;# 8893 add_high_const+3 + ldo RR'L$C0025(%r1),%r1 ;# 8894 movhi-2 + .CALL ARGW0=GR,ARGW1=GR + bl strcmp,%r2 ;# 3087 call_value_internal_symref + copy %r1,%r25 ;# 3085 reload_outsi+2/1 + comib,= 0,%r28,L$0329 ;# 3091 bleu+1 + copy %r11,%r26 ;# 3096 reload_outsi+2/1 + ldil LR'L$C0023,%r1 ;# 8895 add_high_const+3 + ldo RR'L$C0023(%r1),%r1 ;# 8896 movhi-2 + .CALL ARGW0=GR,ARGW1=GR + bl strcmp,%r2 ;# 3100 call_value_internal_symref + copy %r1,%r25 ;# 3098 reload_outsi+2/1 + comib,= 0,%r28,L$0329 ;# 3104 bleu+1 + copy %r11,%r26 ;# 3109 reload_outsi+2/1 + ldil LR'L$C0024,%r1 ;# 8897 add_high_const+3 + ldo RR'L$C0024(%r1),%r1 ;# 8898 movhi-2 + .CALL ARGW0=GR,ARGW1=GR + bl strcmp,%r2 ;# 3113 call_value_internal_symref + copy %r1,%r25 ;# 3111 reload_outsi+2/1 + comib,= 0,%r28,L$0329 ;# 3117 bleu+1 + copy %r11,%r26 ;# 3122 reload_outsi+2/1 + ldil LR'L$C0021,%r1 ;# 8899 add_high_const+3 + ldo RR'L$C0021(%r1),%r1 ;# 8900 movhi-2 + .CALL ARGW0=GR,ARGW1=GR + bl strcmp,%r2 ;# 3126 call_value_internal_symref + copy %r1,%r25 ;# 3124 reload_outsi+2/1 + comib,= 0,%r28,L$0329 ;# 3130 bleu+1 + copy %r11,%r26 ;# 3135 reload_outsi+2/1 + ldil LR'L$C0019,%r1 ;# 8901 add_high_const+3 + ldo RR'L$C0019(%r1),%r1 ;# 8902 movhi-2 + .CALL ARGW0=GR,ARGW1=GR + bl strcmp,%r2 ;# 3139 call_value_internal_symref + copy %r1,%r25 ;# 3137 reload_outsi+2/1 + comib,= 0,%r28,L$0329 ;# 3143 bleu+1 + copy %r11,%r26 ;# 3148 reload_outsi+2/1 + ldil LR'L$C0018,%r1 ;# 8903 add_high_const+3 + ldo RR'L$C0018(%r1),%r1 ;# 8904 movhi-2 + .CALL ARGW0=GR,ARGW1=GR + bl strcmp,%r2 ;# 3152 call_value_internal_symref + copy %r1,%r25 ;# 3150 reload_outsi+2/1 + comib,<>,n 0,%r28,L$0900 ;# 3156 bleu+1 +L$0329 + ldw -296(%r30),%r19 ;# 3173 reload_outsi+2/5 + comb,= %r16,%r19,L$0922 ;# 3175 bleu+1 + ldo 1(%r19),%r19 ;# 3184 addsi3/2 + comb,= %r16,%r19,L$0902 ;# 3214 bleu+1 + stw %r19,-296(%r30) ;# 3186 reload_outsi+2/6 + ldi 0,%r22 ;# 3227 reload_outsi+2/2 + addil LR'__alnum-$global$,%r27 ;# 8596 pic2_lo_sum+1 + copy %r1,%r2 ;# 8907 reload_outsi+2/1 + addil LR'__ctype2-$global$,%r27 ;# 8598 pic2_lo_sum+1 + copy %r1,%r23 ;# 8910 reload_outsi+2/1 + addil LR'__ctype-$global$,%r27 ;# 8600 pic2_lo_sum+1 + copy %r1,%r4 ;# 8913 reload_outsi+2/1 + ldi 32,%r25 ;# 8605 reload_outsi+2/2 + ldi 2,%r24 ;# 8607 reload_outsi+2/2 + ldi 16,%r31 ;# 8609 reload_outsi+2/2 + ldi 8,%r29 ;# 8611 reload_outsi+2/2 + ldi 128,%r28 ;# 8613 reload_outsi+2/2 + ldi 255,%r26 ;# 8615 reload_outsi+2/2 + ldw -244(%r30),%r1 ;# 8916 reload_outsi+2/5 +L$1173 + comib,=,n 0,%r1,L$0343 ;# 3240 bleu+1 + stw %r22,RR'__alnum-$global$(%r2) ;# 3244 reload_outsi+2/6 + ldw RR'__ctype2-$global$(%r23),%r19 ;# 3248 reload_outsi+2/5 + ldw RR'__ctype-$global$(%r4),%r21 ;# 3260 reload_outsi+2/5 + addl %r19,%r22,%r19 ;# 3253 addsi3/1 + addl %r21,%r22,%r21 ;# 3265 addsi3/1 + ldb 0(%r19),%r20 ;# 3255 movqi+1/5 + ldb 0(%r21),%r19 ;# 3267 movqi+1/5 + extru %r20,31,1,%r20 ;# 3256 andsi3/1 + and %r19,%r18,%r19 ;# 3270 andsi3/1 + or %r20,%r19,%r20 ;# 3278 xordi3-1 + comib,<> 0,%r20,L$1169 ;# 3280 bleu+1 + extru %r22,31,8,%r19 ;# 3330 zero_extendqisi2/1 +L$0343 + ldw -236(%r30),%r1 ;# 8919 reload_outsi+2/5 + comib,= 0,%r1,L$0344 ;# 3285 bleu+1 + ldw RR'__ctype2-$global$(%r23),%r19 ;# 3289 reload_outsi+2/5 + addl %r19,%r22,%r19 ;# 3290 addsi3/1 + ldb 0(%r19),%r19 ;# 3292 movqi+1/5 + bb,< %r19,31,L$1169 ;# 3296 bleu+3 + extru %r22,31,8,%r19 ;# 3330 zero_extendqisi2/1 +L$0344 + ldw -228(%r30),%r1 ;# 8922 reload_outsi+2/5 + comib,=,n 0,%r1,L$0345 ;# 3301 bleu+1 + comb,= %r25,%r22,L$1169 ;# 3305 bleu+1 + extru %r22,31,8,%r19 ;# 3330 zero_extendqisi2/1 + comib,= 9,%r22,L$1170 ;# 3307 bleu+1 + extru %r19,28,29,%r21 ;# 3332 lshrsi3/2 +L$0345 + ldw -220(%r30),%r1 ;# 8925 reload_outsi+2/5 + comib,= 0,%r1,L$0341 ;# 3312 bleu+1 + ldw RR'__ctype-$global$(%r4),%r19 ;# 3316 reload_outsi+2/5 + addl %r19,%r22,%r19 ;# 3317 addsi3/1 + ldb 0(%r19),%r19 ;# 3319 movqi+1/5 + and %r19,%r25,%r19 ;# 3322 andsi3/1 + comib,= 0,%r19,L$0341 ;# 3325 bleu+1 + extru %r22,31,8,%r19 ;# 3330 zero_extendqisi2/1 +L$1169 + extru %r19,28,29,%r21 ;# 3332 lshrsi3/2 +L$1170 + addl %r6,%r21,%r21 ;# 3335 addsi3/1 + extru %r19,31,3,%r19 ;# 3339 andsi3/1 + subi 31,%r19,%r19 ;# 3340 subsi3/2 + ldb 0(%r21),%r20 ;# 3343 movqi+1/5 + mtsar %r19 ;# 8928 reload_outsi+2/7 + vdepi -1,1,%r20 ;# 3348 vdepi_ior + stb %r20,0(%r21) ;# 3350 movqi+1/6 +L$0341 + ldw -212(%r30),%r1 ;# 8931 reload_outsi+2/5 + comib,= 0,%r1,L$0348 ;# 3354 bleu+1 + ldw RR'__ctype-$global$(%r4),%r19 ;# 3358 reload_outsi+2/5 + addl %r19,%r22,%r19 ;# 3359 addsi3/1 + ldb 0(%r19),%r19 ;# 3361 movqi+1/5 + and %r19,%r18,%r19 ;# 3364 andsi3/1 + comib,<> 0,%r19,L$1171 ;# 3367 bleu+1 + extru %r22,31,8,%r19 ;# 3426 zero_extendqisi2/1 +L$0348 + ldw -204(%r30),%r1 ;# 8934 reload_outsi+2/5 + comib,= 0,%r1,L$0349 ;# 3372 bleu+1 + ldw RR'__ctype2-$global$(%r23),%r19 ;# 3376 reload_outsi+2/5 + addl %r19,%r22,%r19 ;# 3377 addsi3/1 + ldb 0(%r19),%r19 ;# 3379 movqi+1/5 + and %r19,%r24,%r19 ;# 3382 andsi3/1 + comib,<> 0,%r19,L$1171 ;# 3385 bleu+1 + extru %r22,31,8,%r19 ;# 3426 zero_extendqisi2/1 +L$0349 + ldw -196(%r30),%r1 ;# 8937 reload_outsi+2/5 + comib,= 0,%r1,L$0350 ;# 3390 bleu+1 + ldw RR'__ctype-$global$(%r4),%r19 ;# 3394 reload_outsi+2/5 + addl %r19,%r22,%r19 ;# 3395 addsi3/1 + ldb 0(%r19),%r19 ;# 3397 movqi+1/5 + and %r19,%r24,%r19 ;# 3400 andsi3/1 + comib,<> 0,%r19,L$1171 ;# 3403 bleu+1 + extru %r22,31,8,%r19 ;# 3426 zero_extendqisi2/1 +L$0350 + ldw -188(%r30),%r1 ;# 8940 reload_outsi+2/5 + comib,= 0,%r1,L$0346 ;# 3408 bleu+1 + ldw RR'__ctype2-$global$(%r23),%r19 ;# 3412 reload_outsi+2/5 + addl %r19,%r22,%r19 ;# 3413 addsi3/1 + ldb 0(%r19),%r19 ;# 3415 movqi+1/5 + and %r19,%r18,%r19 ;# 3418 andsi3/1 + comib,= 0,%r19,L$0346 ;# 3421 bleu+1 + extru %r22,31,8,%r19 ;# 3426 zero_extendqisi2/1 +L$1171 + extru %r19,28,29,%r21 ;# 3428 lshrsi3/2 + addl %r6,%r21,%r21 ;# 3431 addsi3/1 + extru %r19,31,3,%r19 ;# 3435 andsi3/1 + subi 31,%r19,%r19 ;# 3436 subsi3/2 + ldb 0(%r21),%r20 ;# 3439 movqi+1/5 + mtsar %r19 ;# 8943 reload_outsi+2/7 + vdepi -1,1,%r20 ;# 3444 vdepi_ior + stb %r20,0(%r21) ;# 3446 movqi+1/6 +L$0346 + ldw -180(%r30),%r1 ;# 8946 reload_outsi+2/5 + comib,= 0,%r1,L$0353 ;# 3450 bleu+1 + ldw RR'__ctype-$global$(%r4),%r19 ;# 3454 reload_outsi+2/5 + addl %r19,%r22,%r19 ;# 3455 addsi3/1 + ldb 0(%r19),%r19 ;# 3457 movqi+1/5 + and %r19,%r31,%r19 ;# 3460 andsi3/1 + comib,<> 0,%r19,L$1172 ;# 3463 bleu+1 + extru %r22,31,8,%r19 ;# 3520 zero_extendqisi2/1 +L$0353 + ldw -172(%r30),%r1 ;# 8949 reload_outsi+2/5 + comib,= 0,%r1,L$0354 ;# 3468 bleu+1 + ldw RR'__ctype-$global$(%r4),%r19 ;# 3472 reload_outsi+2/5 + addl %r19,%r22,%r19 ;# 3473 addsi3/1 + ldb 0(%r19),%r19 ;# 3475 movqi+1/5 + and %r19,%r29,%r19 ;# 3478 andsi3/1 + comib,<> 0,%r19,L$1172 ;# 3481 bleu+1 + extru %r22,31,8,%r19 ;# 3520 zero_extendqisi2/1 +L$0354 + comib,= 0,%r13,L$0355 ;# 3486 bleu+1 + ldw RR'__ctype-$global$(%r4),%r19 ;# 3490 reload_outsi+2/5 + addl %r19,%r22,%r19 ;# 3491 addsi3/1 + ldb 0(%r19),%r19 ;# 3493 movqi+1/5 + bb,< %r19,31,L$1172 ;# 3497 bleu+3 + extru %r22,31,8,%r19 ;# 3520 zero_extendqisi2/1 +L$0355 + comib,= 0,%r7,L$0339 ;# 3502 bleu+1 + ldw RR'__ctype-$global$(%r4),%r19 ;# 3506 reload_outsi+2/5 + addl %r19,%r22,%r19 ;# 3507 addsi3/1 + ldb 0(%r19),%r19 ;# 3509 movqi+1/5 + and %r19,%r28,%r19 ;# 3512 andsi3/1 + comib,= 0,%r19,L$0339 ;# 3515 bleu+1 + extru %r22,31,8,%r19 ;# 3520 zero_extendqisi2/1 +L$1172 + extru %r19,28,29,%r21 ;# 3522 lshrsi3/2 + addl %r6,%r21,%r21 ;# 3525 addsi3/1 + extru %r19,31,3,%r19 ;# 3529 andsi3/1 + subi 31,%r19,%r19 ;# 3530 subsi3/2 + ldb 0(%r21),%r20 ;# 3533 movqi+1/5 + mtsar %r19 ;# 8952 reload_outsi+2/7 + vdepi -1,1,%r20 ;# 3538 vdepi_ior + stb %r20,0(%r21) ;# 3540 movqi+1/6 +L$0339 + ldo 1(%r22),%r22 ;# 3546 addsi3/2 + comb,>=,n %r26,%r22,L$1173 ;# 3233 bleu+1 + ldw -244(%r30),%r1 ;# 8916 reload_outsi+2/5 + bl L$0275,%r0 ;# 3559 jump + ldi 1,%r13 ;# 3556 reload_outsi+2/2 +L$0328 + ldi 255,%r19 ;# 8069 reload_outsi+2/2 +L$1168 + comb,= %r19,%r3,L$0359 ;# 8070 bleu+1 + copy %r19,%r21 ;# 8595 reload_outsi+2/1 +L$0360 + ldo -1(%r3),%r20 ;# 3571 addsi3/2 + ldw -296(%r30),%r19 ;# 3583 reload_outsi+2/5 + extru %r20,31,8,%r3 ;# 3572 zero_extendqisi2/1 + ldo -1(%r19),%r19 ;# 3584 addsi3/2 + comb,<> %r21,%r3,L$0360 ;# 3577 bleu+1 + stw %r19,-296(%r30) ;# 3588 reload_outsi+2/6 +L$0359 + ldb 11(%r6),%r19 ;# 3599 movqi+1/5 + depi -1,28,1,%r19 ;# 3601 iorsi3+1/2 + stb %r19,11(%r6) ;# 3603 movqi+1/6 + ldb 7(%r6),%r19 ;# 3606 movqi+1/5 + ldi 0,%r13 ;# 3613 reload_outsi+2/2 + depi -1,29,1,%r19 ;# 3608 iorsi3+1/2 + bl L$0275,%r0 ;# 3618 jump + stb %r19,7(%r6) ;# 3610 movqi+1/6 +L$0309 + ldi 0,%r13 ;# 3624 reload_outsi+2/2 +L$1166 + extru %r7,21+8-1,8,%r19 ;# 3627 extzv + addl %r6,%r19,%r19 ;# 3630 addsi3/1 + extru %r7,31,3,%r20 ;# 3633 andsi3/1 +L$0948 + subi 31,%r20,%r20 ;# 3634 subsi3/2 + ldb 0(%r19),%r21 ;# 3637 movqi+1/5 + mtsar %r20 ;# 8955 reload_outsi+2/7 + vdepi -1,1,%r21 ;# 3642 vdepi_ior + bl L$0275,%r0 ;# 3653 jump + stb %r21,0(%r19) ;# 3644 movqi+1/6 +L$0276 + ldb -1(%r6),%r20 ;# 8074 movqi+1/5 + extru %r20,31,8,%r19 ;# 8075 zero_extendqisi2/1 + comib,= 0,%r19,L$0364 ;# 8076 bleu+1 + addl %r19,%r6,%r19 ;# 8079 addsi3/1 + ldb -1(%r19),%r19 ;# 8082 zero_extendqisi2/2 + comib,<> 0,%r19,L$0364 ;# 8083 bleu+1 + ldo -1(%r20),%r19 ;# 8242 addsi3/2 + bl L$1183,%r0 ;# 8253 jump + stb %r19,-1(%r6) ;# 3688 movqi+1/6 +L$0365 + ldo -1(%r19),%r19 ;# 3686 addsi3/2 + stb %r19,-1(%r6) ;# 3688 movqi+1/6 +L$1183 + extru %r19,31,8,%r19 ;# 3662 zero_extendqisi2/1 + comib,= 0,%r19,L$0364 ;# 3664 bleu+1 + addl %r19,%r6,%r19 ;# 3668 addsi3/1 + ldb -1(%r19),%r19 ;# 3672 zero_extendqisi2/2 + comib,=,n 0,%r19,L$0365 ;# 3674 bleu+1 + ldb -1(%r6),%r19 ;# 3683 movqi+1/5 +L$0364 + ldb -1(%r6),%r19 ;# 3700 zero_extendqisi2/2 + bl L$0043,%r0 ;# 3705 jump + addl %r6,%r19,%r6 ;# 3701 addsi3/1 +L$0368 + bb,>=,n %r15,18,L$0076 ;# 3713 movsi-4 + bl L$1181,%r0 ;# 3721 jump + ldw 24(%r5),%r19 ;# 3861 reload_outsi+2/5 +L$0372 + bb,>=,n %r15,18,L$0076 ;# 3730 movsi-4 + bl,n L$0374,%r0 ;# 3738 jump +L$0376 + bb,>=,n %r15,20,L$0076 ;# 3747 movsi-4 + bl,n L$0378,%r0 ;# 3755 jump +L$0380 + bb,>=,n %r15,16,L$0076 ;# 3764 movsi-4 + bl,n L$0378,%r0 ;# 3772 jump +L$0383 + and %r15,%r20,%r19 ;# 3779 andsi3/1 + comb,= %r20,%r19,L$1174 ;# 3783 bleu+1 + ldi -1,%r4 ;# 5074 reload_outsi+2/2 + bl,n L$0076,%r0 ;# 3791 jump +L$0387 + comb,=,n %r16,%r19,L$0903 ;# 3799 bleu+1 + ldb 0(%r19),%r7 ;# 3831 zero_extendqisi2/2 + ldo 1(%r19),%r19 ;# 3826 addsi3/2 + stw %r19,-296(%r30) ;# 3828 reload_outsi+2/6 + ldo -39(%r7),%r19 ;# 7446 addsi3/2 + addi,uv -86,%r19,%r0 ;# 7447 casesi0 + blr,n %r19,%r0 + b,n L$0397 +L$0817 + bl L$0759,%r0 ;# 9437 switch_jump + ldw 0(%r5),%r4 ;# 8204 reload_outsi+2/5 +L$1069 + bl L$0395,%r0 + nop ;# 9440 switch_jump +L$1070 + bl L$0422,%r0 + nop ;# 9443 switch_jump +L$1071 + bl L$0397,%r0 + nop ;# 9446 switch_jump +L$1072 + bl L$0811,%r0 + nop ;# 9449 switch_jump +L$1073 + bl L$0397,%r0 + nop ;# 9452 switch_jump +L$1074 + bl L$0397,%r0 + nop ;# 9455 switch_jump +L$1075 + bl L$0397,%r0 + nop ;# 9458 switch_jump +L$1076 + bl L$0397,%r0 + nop ;# 9461 switch_jump +L$1077 + bl L$0397,%r0 + nop ;# 9464 switch_jump +L$1078 + bl L$0787,%r0 + nop ;# 9467 switch_jump +L$1079 + bl L$0787,%r0 + nop ;# 9470 switch_jump +L$1080 + bl L$0787,%r0 + nop ;# 9473 switch_jump +L$1081 + bl L$0787,%r0 + nop ;# 9476 switch_jump +L$1082 + bl L$0787,%r0 + nop ;# 9479 switch_jump +L$1083 + bl L$0787,%r0 + nop ;# 9482 switch_jump +L$1084 + bl L$0787,%r0 + nop ;# 9485 switch_jump +L$1085 + bl L$0787,%r0 + nop ;# 9488 switch_jump +L$1086 + bl L$0787,%r0 + nop ;# 9491 switch_jump +L$1087 + bl L$0397,%r0 + nop ;# 9494 switch_jump +L$1088 + bl L$0397,%r0 + nop ;# 9497 switch_jump +L$1089 + bl L$0659,%r0 ;# 9500 switch_jump + ldw 0(%r5),%r4 ;# 8164 reload_outsi+2/5 +L$1090 + bl L$0397,%r0 + nop ;# 9503 switch_jump +L$1091 + bl L$0679,%r0 ;# 9506 switch_jump + ldw 0(%r5),%r4 ;# 8172 reload_outsi+2/5 +L$1092 + bl L$0811,%r0 + nop ;# 9509 switch_jump +L$1093 + bl L$0397,%r0 + nop ;# 9512 switch_jump +L$1094 + bl L$0397,%r0 + nop ;# 9515 switch_jump +L$1095 + bl L$0719,%r0 ;# 9518 switch_jump + ldw 0(%r5),%r4 ;# 8188 reload_outsi+2/5 +L$1096 + bl L$0397,%r0 + nop ;# 9521 switch_jump +L$1097 + bl L$0397,%r0 + nop ;# 9524 switch_jump +L$1098 + bl L$0397,%r0 + nop ;# 9527 switch_jump +L$1099 + bl L$0397,%r0 + nop ;# 9530 switch_jump +L$1100 + bl L$0397,%r0 + nop ;# 9533 switch_jump +L$1101 + bl L$0397,%r0 + nop ;# 9536 switch_jump +L$1102 + bl L$0397,%r0 + nop ;# 9539 switch_jump +L$1103 + bl L$0397,%r0 + nop ;# 9542 switch_jump +L$1104 + bl L$0397,%r0 + nop ;# 9545 switch_jump +L$1105 + bl L$0397,%r0 + nop ;# 9548 switch_jump +L$1106 + bl L$0397,%r0 + nop ;# 9551 switch_jump +L$1107 + bl L$0397,%r0 + nop ;# 9554 switch_jump +L$1108 + bl L$0397,%r0 + nop ;# 9557 switch_jump +L$1109 + bl L$0397,%r0 + nop ;# 9560 switch_jump +L$1110 + bl L$0397,%r0 + nop ;# 9563 switch_jump +L$1111 + bl L$0397,%r0 + nop ;# 9566 switch_jump +L$1112 + bl L$0397,%r0 + nop ;# 9569 switch_jump +L$1113 + bl L$0397,%r0 + nop ;# 9572 switch_jump +L$1114 + bl L$0397,%r0 + nop ;# 9575 switch_jump +L$1115 + bl L$0397,%r0 + nop ;# 9578 switch_jump +L$1116 + bl L$0639,%r0 ;# 9581 switch_jump + ldw 0(%r5),%r4 ;# 8156 reload_outsi+2/5 +L$1117 + bl L$0397,%r0 + nop ;# 9584 switch_jump +L$1118 + bl L$0397,%r0 + nop ;# 9587 switch_jump +L$1119 + bl L$0397,%r0 + nop ;# 9590 switch_jump +L$1120 + bl L$0397,%r0 + nop ;# 9593 switch_jump +L$1121 + bl L$0397,%r0 + nop ;# 9596 switch_jump +L$1122 + bl L$0397,%r0 + nop ;# 9599 switch_jump +L$1123 + bl L$0397,%r0 + nop ;# 9602 switch_jump +L$1124 + bl L$0397,%r0 + nop ;# 9605 switch_jump +L$1125 + bl L$0739,%r0 ;# 9608 switch_jump + ldw 0(%r5),%r4 ;# 8196 reload_outsi+2/5 +L$1126 + bl L$0397,%r0 + nop ;# 9611 switch_jump +L$1127 + bl L$0699,%r0 ;# 9614 switch_jump + ldw 0(%r5),%r4 ;# 8180 reload_outsi+2/5 +L$1128 + bl L$0397,%r0 + nop ;# 9617 switch_jump +L$1129 + bl L$0397,%r0 + nop ;# 9620 switch_jump +L$1130 + bl L$0397,%r0 + nop ;# 9623 switch_jump +L$1131 + bl L$0397,%r0 + nop ;# 9626 switch_jump +L$1132 + bl L$0397,%r0 + nop ;# 9629 switch_jump +L$1133 + bl L$0397,%r0 + nop ;# 9632 switch_jump +L$1134 + bl L$0397,%r0 + nop ;# 9635 switch_jump +L$1135 + bl L$0397,%r0 + nop ;# 9638 switch_jump +L$1136 + bl L$0397,%r0 + nop ;# 9641 switch_jump +L$1137 + bl L$0397,%r0 + nop ;# 9644 switch_jump +L$1138 + bl L$0397,%r0 + nop ;# 9647 switch_jump +L$1139 + bl L$0397,%r0 + nop ;# 9650 switch_jump +L$1140 + bl L$0397,%r0 + nop ;# 9653 switch_jump +L$1141 + bl L$0397,%r0 + nop ;# 9656 switch_jump +L$1142 + bl L$0397,%r0 + nop ;# 9659 switch_jump +L$1143 + bl L$0397,%r0 + nop ;# 9662 switch_jump +L$1144 + bl L$0397,%r0 + nop ;# 9665 switch_jump +L$1145 + bl L$0397,%r0 + nop ;# 9668 switch_jump +L$1146 + bl L$0397,%r0 + nop ;# 9671 switch_jump +L$1147 + bl L$0397,%r0 + nop ;# 9674 switch_jump +L$1148 + bl L$0619,%r0 ;# 9677 switch_jump + ldw 0(%r5),%r4 ;# 8148 reload_outsi+2/5 +L$1149 + bl L$0397,%r0 + nop ;# 9680 switch_jump +L$1150 + bl L$0397,%r0 + nop ;# 9683 switch_jump +L$1151 + bl L$0397,%r0 + nop ;# 9686 switch_jump +L$1152 + bl L$0506,%r0 + nop ;# 9689 switch_jump +L$1153 + bl L$0472,%r0 ;# 9692 switch_jump + ldil L'33792,%r19 ;# 4724 add_high_const+3 +L$1154 + bl,n L$0397,%r0 ;# 7450 jump +L$0395 + bb,<,n %r15,18,L$0397 ;# 3853 bleu+3 + ldw 24(%r5),%r19 ;# 3861 reload_outsi+2/5 +L$1181 + ldo 1(%r19),%r19 ;# 3862 addsi3/2 + stw %r19,24(%r5) ;# 3866 reload_outsi+2/6 + ldw -304(%r30),%r20 ;# 3871 reload_outsi+2/5 + ldw -260(%r30),%r1 ;# 8958 reload_outsi+2/5 + ldw -308(%r30),%r19 ;# 3873 reload_outsi+2/5 + ldo 1(%r1),%r1 ;# 3868 addsi3/2 + comb,<> %r19,%r20,L$0398 ;# 3875 bleu+1 + stw %r1,-260(%r30) ;# 8961 reload_outsi+2/6 + zdep %r20,28,29,%r25 ;# 3885 ashlsi3+1 + sh1addl %r20,%r25,%r25 ;# 3886 ashlsi3-2 + ldw -312(%r30),%r26 ;# 3890 reload_outsi+2/5 + .CALL ARGW0=GR,ARGW1=GR + bl realloc,%r2 ;# 3894 call_value_internal_symref + zdep %r25,29,30,%r25 ;# 3892 ashlsi3+1 + comib,= 0,%r28,L$0953 ;# 3903 bleu+1 + stw %r28,-312(%r30) ;# 3898 reload_outsi+2/6 + ldw -308(%r30),%r19 ;# 3912 reload_outsi+2/5 + zdep %r19,30,31,%r19 ;# 3914 ashlsi3+1 + stw %r19,-308(%r30) ;# 3916 reload_outsi+2/6 +L$0398 + ldw -304(%r30),%r20 ;# 3921 reload_outsi+2/5 + ldw -312(%r30),%r21 ;# 3923 reload_outsi+2/5 + ldw 0(%r5),%r19 ;# 3933 reload_outsi+2/5 + sh2addl %r20,%r20,%r20 ;# 3928 ashlsi3-2 + sh2addl %r20,%r21,%r21 ;# 3931 ashlsi3-2 + sub %r12,%r19,%r19 ;# 3934 subsi3/1 + stw %r19,0(%r21) ;# 3936 reload_outsi+2/6 + ldw -304(%r30),%r19 ;# 3939 reload_outsi+2/5 + ldw -312(%r30),%r20 ;# 3941 reload_outsi+2/5 + sh2addl %r19,%r19,%r19 ;# 3946 ashlsi3-2 + comib,= 0,%r10,L$0400 ;# 3951 bleu+1 + sh2addl %r19,%r20,%r20 ;# 3949 ashlsi3-2 + ldw 0(%r5),%r19 ;# 3953 reload_outsi+2/5 + sub %r10,%r19,%r19 ;# 3954 subsi3/1 + ldo 1(%r19),%r19 ;# 3955 addsi3/2 + bl L$0401,%r0 ;# 3958 jump + stw %r19,4(%r20) ;# 3957 reload_outsi+2/6 +L$0400 + stw %r0,4(%r20) ;# 3962 reload_outsi+2/6 +L$0401 + ldw -304(%r30),%r20 ;# 3966 reload_outsi+2/5 + ldw -312(%r30),%r21 ;# 3968 reload_outsi+2/5 + ldw 0(%r5),%r19 ;# 3978 reload_outsi+2/5 + sh2addl %r20,%r20,%r20 ;# 3973 ashlsi3-2 + sh2addl %r20,%r21,%r21 ;# 3976 ashlsi3-2 + sub %r6,%r19,%r19 ;# 3979 subsi3/1 + stw %r19,12(%r21) ;# 3981 reload_outsi+2/6 + ldw -304(%r30),%r19 ;# 3984 reload_outsi+2/5 + ldw -312(%r30),%r20 ;# 3986 reload_outsi+2/5 + ldw -260(%r30),%r1 ;# 8964 reload_outsi+2/5 + sh2addl %r19,%r19,%r19 ;# 3991 ashlsi3-2 + sh2addl %r19,%r20,%r20 ;# 3994 ashlsi3-2 + ldi 255,%r19 ;# 3999 reload_outsi+2/2 + comb,<< %r19,%r1,L$0402 ;# 4001 bleu+1 + stw %r1,16(%r20) ;# 3996 reload_outsi+2/6 + ldw -304(%r30),%r20 ;# 4005 reload_outsi+2/5 + ldw -312(%r30),%r21 ;# 4007 reload_outsi+2/5 + ldw 0(%r5),%r19 ;# 4017 reload_outsi+2/5 + sh2addl %r20,%r20,%r20 ;# 4012 ashlsi3-2 + sh2addl %r20,%r21,%r21 ;# 4015 ashlsi3-2 + sub %r6,%r19,%r19 ;# 4018 subsi3/1 + ldo 2(%r19),%r19 ;# 4019 addsi3/2 + stw %r19,8(%r21) ;# 4021 reload_outsi+2/6 + ldw 0(%r5),%r4 ;# 8087 reload_outsi+2/5 + ldw 4(%r5),%r20 ;# 8090 reload_outsi+2/5 + sub %r6,%r4,%r19 ;# 8088 subsi3/1 + ldo 3(%r19),%r19 ;# 8089 addsi3/2 + comb,>>=,n %r20,%r19,L$0407 ;# 8091 bleu+1 + ldil L'65536,%r3 ;# 8593 reload_outsi+2/3 +L$0408 + comb,= %r3,%r20,L$0944 ;# 4049 bleu+1 + zdep %r20,30,31,%r19 ;# 4059 ashlsi3+1 + comb,>>= %r3,%r19,L$0413 ;# 4067 bleu+1 + stw %r19,4(%r5) ;# 4061 reload_outsi+2/6 + stw %r3,4(%r5) ;# 4070 reload_outsi+2/6 +L$0413 + ldw 0(%r5),%r26 ;# 4077 reload_outsi+2/5 + .CALL ARGW0=GR,ARGW1=GR + bl realloc,%r2 ;# 4081 call_value_internal_symref + ldw 4(%r5),%r25 ;# 4079 reload_outsi+2/5 + comib,= 0,%r28,L$0953 ;# 4089 bleu+1 + stw %r28,0(%r5) ;# 4085 reload_outsi+2/6 + comb,= %r28,%r4,L$0406 ;# 4099 bleu+1 + sub %r6,%r4,%r19 ;# 4101 subsi3/1 + comib,= 0,%r10,L$0416 ;# 4110 bleu+1 + addl %r28,%r19,%r6 ;# 4104 addsi3/1 + sub %r10,%r4,%r19 ;# 4111 subsi3/1 + addl %r28,%r19,%r10 ;# 4114 addsi3/1 +L$0416 + comib,= 0,%r8,L$0417 ;# 4117 bleu+1 + sub %r8,%r4,%r19 ;# 4118 subsi3/1 + addl %r28,%r19,%r8 ;# 4121 addsi3/1 +L$0417 + comib,= 0,%r9,L$0406 ;# 4124 bleu+1 + sub %r9,%r4,%r19 ;# 4125 subsi3/1 + addl %r28,%r19,%r9 ;# 4128 addsi3/1 +L$0406 + ldw 0(%r5),%r4 ;# 4029 reload_outsi+2/5 + ldw 4(%r5),%r20 ;# 4033 reload_outsi+2/5 + sub %r6,%r4,%r19 ;# 4030 subsi3/1 + ldo 3(%r19),%r19 ;# 4031 addsi3/2 + comb,<< %r20,%r19,L$0408 + nop ;# 4035 bleu+1 +L$0407 + ldi 5,%r19 ;# 4150 movqi+1/2 + stbs,ma %r19,1(%r6) ;# 4151 movqi+1/6 + ldb -257(%r30),%r1 ;# 4156 movqi+1/5 + stbs,ma %r1,1(%r6) ;# 8968 movqi+1/6 + stbs,ma %r0,1(%r6) ;# 4159 movqi+1/6 +L$0402 + ldi 0,%r10 ;# 4182 reload_outsi+2/2 + ldi 0,%r8 ;# 4185 reload_outsi+2/2 + copy %r6,%r12 ;# 4188 reload_outsi+2/1 + ldw -304(%r30),%r19 ;# 4174 reload_outsi+2/5 + ldi 0,%r9 ;# 4191 reload_outsi+2/2 + ldo 1(%r19),%r19 ;# 4175 addsi3/2 + bl L$0043,%r0 ;# 4193 jump + stw %r19,-304(%r30) ;# 4179 reload_outsi+2/6 +L$0422 + bb,< %r15,18,L$0397 ;# 4201 bleu+3 + ldw -304(%r30),%r19 ;# 4207 reload_outsi+2/5 + comib,<>,n 0,%r19,L$0374 ;# 4209 bleu+1 + bb,>=,n %r15,14,L$0950 ;# 4215 movsi-4 + bl,n L$0397,%r0 ;# 4230 jump +L$0374 + comib,=,n 0,%r10,L$0427 ;# 4237 bleu+1 + ldw 0(%r5),%r4 ;# 8095 reload_outsi+2/5 + ldw 4(%r5),%r20 ;# 8098 reload_outsi+2/5 + sub %r6,%r4,%r19 ;# 8096 subsi3/1 + ldo 1(%r19),%r19 ;# 8097 addsi3/2 + comb,>>=,n %r20,%r19,L$0432 ;# 8099 bleu+1 + ldil L'65536,%r3 ;# 8591 reload_outsi+2/3 +L$0433 + comb,= %r3,%r20,L$0944 ;# 4266 bleu+1 + zdep %r20,30,31,%r19 ;# 4276 ashlsi3+1 + comb,>>= %r3,%r19,L$0438 ;# 4284 bleu+1 + stw %r19,4(%r5) ;# 4278 reload_outsi+2/6 + stw %r3,4(%r5) ;# 4287 reload_outsi+2/6 +L$0438 + ldw 0(%r5),%r26 ;# 4294 reload_outsi+2/5 + .CALL ARGW0=GR,ARGW1=GR + bl realloc,%r2 ;# 4298 call_value_internal_symref + ldw 4(%r5),%r25 ;# 4296 reload_outsi+2/5 + comib,= 0,%r28,L$0953 ;# 4306 bleu+1 + stw %r28,0(%r5) ;# 4302 reload_outsi+2/6 + comb,= %r28,%r4,L$0431 ;# 4316 bleu+1 + sub %r6,%r4,%r19 ;# 4318 subsi3/1 + addl %r28,%r19,%r6 ;# 4321 addsi3/1 + sub %r12,%r4,%r19 ;# 4322 subsi3/1 + comib,= 0,%r10,L$0441 ;# 4327 bleu+1 + addl %r28,%r19,%r12 ;# 4325 addsi3/1 + sub %r10,%r4,%r19 ;# 4328 subsi3/1 + addl %r28,%r19,%r10 ;# 4331 addsi3/1 +L$0441 + comib,= 0,%r8,L$0442 ;# 4334 bleu+1 + sub %r8,%r4,%r19 ;# 4335 subsi3/1 + addl %r28,%r19,%r8 ;# 4338 addsi3/1 +L$0442 + comib,= 0,%r9,L$0431 ;# 4341 bleu+1 + sub %r9,%r4,%r19 ;# 4342 subsi3/1 + addl %r28,%r19,%r9 ;# 4345 addsi3/1 +L$0431 + ldw 0(%r5),%r4 ;# 4246 reload_outsi+2/5 + ldw 4(%r5),%r20 ;# 4250 reload_outsi+2/5 + sub %r6,%r4,%r19 ;# 4247 subsi3/1 + ldo 1(%r19),%r19 ;# 4248 addsi3/2 + comb,<< %r20,%r19,L$0433 + nop ;# 4252 bleu+1 +L$0432 + ldi 19,%r19 ;# 4367 movqi+1/2 + stbs,ma %r19,1(%r6) ;# 4368 movqi+1/6 + uaddcm %r6,%r10,%r24 ;# 4381 adddi3+1 + ldi 13,%r26 ;# 4384 reload_outsi+2/2 + copy %r10,%r25 ;# 4386 reload_outsi+2/1 + .CALL ARGW0=GR,ARGW1=GR,ARGW2=GR + bl store_op1,%r2 ;# 4390 call_internal_symref + ldo -3(%r24),%r24 ;# 4388 addsi3/2 +L$0427 + ldw -304(%r30),%r19 ;# 4395 reload_outsi+2/5 + comib,<>,n 0,%r19,L$0447 ;# 4397 bleu+1 + bb,<,n %r15,14,L$0076 ;# 4403 bleu+3 +L$0950 + .CALL ARGW0=GR + bl free,%r2 ;# 4414 call_internal_symref + ldw -312(%r30),%r26 ;# 4412 reload_outsi+2/5 + bl L$0867,%r0 ;# 4418 jump + ldi 16,%r28 ;# 4416 reload_outsi+2/2 +L$0447 + ldo -1(%r19),%r19 ;# 4427 addsi3/2 + stw %r19,-304(%r30) ;# 4431 reload_outsi+2/6 + ldw -312(%r30),%r20 ;# 4436 reload_outsi+2/5 + sh2addl %r19,%r19,%r19 ;# 4441 ashlsi3-2 + sh2addl %r19,%r20,%r20 ;# 4444 ashlsi3-2 + ldw 0(%r5),%r21 ;# 4446 reload_outsi+2/5 + ldw 0(%r20),%r19 ;# 4448 reload_outsi+2/5 + ldw 4(%r20),%r20 ;# 4464 reload_outsi+2/5 + comib,= 0,%r20,L$0450 ;# 4466 bleu+1 + addl %r21,%r19,%r12 ;# 4449 addsi3/1 + addl %r21,%r20,%r19 ;# 4483 addsi3/1 + bl L$0451,%r0 ;# 4485 jump + ldo -1(%r19),%r10 ;# 4484 addsi3/2 +L$0450 + ldi 0,%r10 ;# 4489 reload_outsi+2/2 +L$0451 + ldw -304(%r30),%r19 ;# 4493 reload_outsi+2/5 + ldw -312(%r30),%r20 ;# 4495 reload_outsi+2/5 + ldw 0(%r5),%r21 ;# 4505 reload_outsi+2/5 + sh2addl %r19,%r19,%r19 ;# 4500 ashlsi3-2 + sh2addl %r19,%r20,%r20 ;# 4503 ashlsi3-2 + ldw 12(%r20),%r19 ;# 4507 reload_outsi+2/5 + ldw 16(%r20),%r7 ;# 4523 reload_outsi+2/5 + addl %r21,%r19,%r8 ;# 4508 addsi3/1 + ldi 255,%r19 ;# 4529 reload_outsi+2/2 + comb,<< %r19,%r7,L$0043 ;# 4531 bleu+1 + ldi 0,%r9 ;# 4526 reload_outsi+2/2 + ldw 8(%r20),%r19 ;# 4550 reload_outsi+2/5 + ldw -260(%r30),%r1 ;# 8971 reload_outsi+2/5 + addl %r21,%r19,%r19 ;# 4551 addsi3/1 + sub %r1,%r7,%r20 ;# 4557 subsi3/1 + stb %r20,0(%r19) ;# 4559 movqi+1/6 + ldw 0(%r5),%r4 ;# 8103 reload_outsi+2/5 + ldw 4(%r5),%r20 ;# 8106 reload_outsi+2/5 + sub %r6,%r4,%r19 ;# 8104 subsi3/1 + ldo 3(%r19),%r19 ;# 8105 addsi3/2 + comb,>>=,n %r20,%r19,L$0457 ;# 8107 bleu+1 + ldil L'65536,%r3 ;# 8589 reload_outsi+2/3 +L$0458 + comb,= %r3,%r20,L$0944 ;# 4587 bleu+1 + zdep %r20,30,31,%r19 ;# 4597 ashlsi3+1 + comb,>>= %r3,%r19,L$0463 ;# 4605 bleu+1 + stw %r19,4(%r5) ;# 4599 reload_outsi+2/6 + stw %r3,4(%r5) ;# 4608 reload_outsi+2/6 +L$0463 + ldw 0(%r5),%r26 ;# 4615 reload_outsi+2/5 + .CALL ARGW0=GR,ARGW1=GR + bl realloc,%r2 ;# 4619 call_value_internal_symref + ldw 4(%r5),%r25 ;# 4617 reload_outsi+2/5 + comib,= 0,%r28,L$0953 ;# 4627 bleu+1 + stw %r28,0(%r5) ;# 4623 reload_outsi+2/6 + comb,= %r28,%r4,L$0456 ;# 4637 bleu+1 + sub %r6,%r4,%r19 ;# 4639 subsi3/1 + addl %r28,%r19,%r6 ;# 4642 addsi3/1 + sub %r12,%r4,%r19 ;# 4643 subsi3/1 + comib,= 0,%r10,L$0466 ;# 4648 bleu+1 + addl %r28,%r19,%r12 ;# 4646 addsi3/1 + sub %r10,%r4,%r19 ;# 4649 subsi3/1 + addl %r28,%r19,%r10 ;# 4652 addsi3/1 +L$0466 + comib,= 0,%r8,L$0467 ;# 4655 bleu+1 + sub %r8,%r4,%r19 ;# 4656 subsi3/1 + addl %r28,%r19,%r8 ;# 4659 addsi3/1 +L$0467 + comib,= 0,%r9,L$0456 ;# 4662 bleu+1 + sub %r9,%r4,%r19 ;# 4663 subsi3/1 + addl %r28,%r19,%r9 ;# 4666 addsi3/1 +L$0456 + ldw 0(%r5),%r4 ;# 4567 reload_outsi+2/5 + ldw 4(%r5),%r20 ;# 4571 reload_outsi+2/5 + sub %r6,%r4,%r19 ;# 4568 subsi3/1 + ldo 3(%r19),%r19 ;# 4569 addsi3/2 + comb,<< %r20,%r19,L$0458 + nop ;# 4573 bleu+1 +L$0457 + ldi 6,%r19 ;# 4688 movqi+1/2 + stbs,ma %r19,1(%r6) ;# 4689 movqi+1/6 + stbs,ma %r7,1(%r6) ;# 4694 movqi+1/6 + ldw -260(%r30),%r1 ;# 8974 reload_outsi+2/5 + sub %r1,%r7,%r19 ;# 4700 subsi3/1 + bl L$0043,%r0 ;# 4720 jump + stbs,ma %r19,1(%r6) ;# 4702 movqi+1/6 +L$0472 + ldo R'33792(%r19),%r19 ;# 4725 movhi-2 + and %r15,%r19,%r19 ;# 4726 andsi3/1 + comib,<>,n 0,%r19,L$0397 ;# 4728 bleu+1 +L$0378 + bb,<,n %r15,21,L$0076 ;# 4739 bleu+3 + ldw 0(%r5),%r3 ;# 8111 reload_outsi+2/5 + ldw 4(%r5),%r20 ;# 8114 reload_outsi+2/5 + sub %r6,%r3,%r19 ;# 8112 subsi3/1 + ldo 3(%r19),%r19 ;# 8113 addsi3/2 + comb,>>=,n %r20,%r19,L$0476 ;# 8115 bleu+1 + ldil L'65536,%r4 ;# 8587 reload_outsi+2/3 +L$0477 + comb,= %r4,%r20,L$0944 ;# 4768 bleu+1 + zdep %r20,30,31,%r19 ;# 4778 ashlsi3+1 + comb,>>= %r4,%r19,L$0482 ;# 4786 bleu+1 + stw %r19,4(%r5) ;# 4780 reload_outsi+2/6 + stw %r4,4(%r5) ;# 4789 reload_outsi+2/6 +L$0482 + ldw 0(%r5),%r26 ;# 4796 reload_outsi+2/5 + .CALL ARGW0=GR,ARGW1=GR + bl realloc,%r2 ;# 4800 call_value_internal_symref + ldw 4(%r5),%r25 ;# 4798 reload_outsi+2/5 + comib,= 0,%r28,L$0953 ;# 4808 bleu+1 + stw %r28,0(%r5) ;# 4804 reload_outsi+2/6 + comb,= %r28,%r3,L$0475 ;# 4818 bleu+1 + sub %r6,%r3,%r19 ;# 4820 subsi3/1 + addl %r28,%r19,%r6 ;# 4823 addsi3/1 + sub %r12,%r3,%r19 ;# 4824 subsi3/1 + comib,= 0,%r10,L$0485 ;# 4829 bleu+1 + addl %r28,%r19,%r12 ;# 4827 addsi3/1 + sub %r10,%r3,%r19 ;# 4830 subsi3/1 + addl %r28,%r19,%r10 ;# 4833 addsi3/1 +L$0485 + comib,= 0,%r8,L$0486 ;# 4836 bleu+1 + sub %r8,%r3,%r19 ;# 4837 subsi3/1 + addl %r28,%r19,%r8 ;# 4840 addsi3/1 +L$0486 + comib,= 0,%r9,L$0475 ;# 4843 bleu+1 + sub %r9,%r3,%r19 ;# 4844 subsi3/1 + addl %r28,%r19,%r9 ;# 4847 addsi3/1 +L$0475 + ldw 0(%r5),%r3 ;# 4748 reload_outsi+2/5 + ldw 4(%r5),%r20 ;# 4752 reload_outsi+2/5 + sub %r6,%r3,%r19 ;# 4749 subsi3/1 + ldo 3(%r19),%r19 ;# 4750 addsi3/2 + comb,<< %r20,%r19,L$0477 + nop ;# 4754 bleu+1 +L$0476 + ldi 14,%r26 ;# 4873 reload_outsi+2/2 + copy %r12,%r25 ;# 4875 reload_outsi+2/1 + sub %r6,%r25,%r24 ;# 4870 subsi3/1 + ldo 3(%r24),%r24 ;# 4877 addsi3/2 + .CALL ARGW0=GR,ARGW1=GR,ARGW2=GR,ARGW3=GR + bl insert_op1,%r2 ;# 4881 call_internal_symref + copy %r6,%r23 ;# 4879 reload_outsi+2/1 + ldi 0,%r9 ;# 4884 reload_outsi+2/2 + comib,= 0,%r10,L$0490 ;# 4889 bleu+1 + ldo 3(%r6),%r6 ;# 4886 addsi3/2 + ldi 13,%r26 ;# 4894 reload_outsi+2/2 + copy %r10,%r25 ;# 4896 reload_outsi+2/1 + sub %r6,%r25,%r24 ;# 4891 subsi3/1 + .CALL ARGW0=GR,ARGW1=GR,ARGW2=GR + bl store_op1,%r2 ;# 4900 call_internal_symref + ldo -3(%r24),%r24 ;# 4898 addsi3/2 +L$0490 + ldw 0(%r5),%r3 ;# 8119 reload_outsi+2/5 + ldw 4(%r5),%r20 ;# 8122 reload_outsi+2/5 + sub %r6,%r3,%r19 ;# 8120 subsi3/1 + ldo 3(%r19),%r19 ;# 8121 addsi3/2 + comb,>>= %r20,%r19,L$0492 ;# 8123 bleu+1 + copy %r6,%r10 ;# 4904 reload_outsi+2/1 + ldil L'65536,%r4 ;# 8585 reload_outsi+2/3 +L$0493 + comb,= %r4,%r20,L$0944 ;# 4929 bleu+1 + zdep %r20,30,31,%r19 ;# 4939 ashlsi3+1 + comb,>>= %r4,%r19,L$0498 ;# 4947 bleu+1 + stw %r19,4(%r5) ;# 4941 reload_outsi+2/6 + stw %r4,4(%r5) ;# 4950 reload_outsi+2/6 +L$0498 + ldw 0(%r5),%r26 ;# 4957 reload_outsi+2/5 + .CALL ARGW0=GR,ARGW1=GR + bl realloc,%r2 ;# 4961 call_value_internal_symref + ldw 4(%r5),%r25 ;# 4959 reload_outsi+2/5 + comib,= 0,%r28,L$0953 ;# 4969 bleu+1 + stw %r28,0(%r5) ;# 4965 reload_outsi+2/6 + comb,= %r28,%r3,L$0491 ;# 4979 bleu+1 + sub %r6,%r3,%r19 ;# 4981 subsi3/1 + comib,= 0,%r10,L$0501 ;# 4990 bleu+1 + addl %r28,%r19,%r6 ;# 4984 addsi3/1 + sub %r10,%r3,%r19 ;# 4991 subsi3/1 + addl %r28,%r19,%r10 ;# 4994 addsi3/1 +L$0501 + comib,= 0,%r8,L$0502 ;# 4997 bleu+1 + sub %r8,%r3,%r19 ;# 4998 subsi3/1 + addl %r28,%r19,%r8 ;# 5001 addsi3/1 +L$0502 + comib,= 0,%r9,L$0491 ;# 5004 bleu+1 + sub %r9,%r3,%r19 ;# 5005 subsi3/1 + addl %r28,%r19,%r9 ;# 5008 addsi3/1 +L$0491 + ldw 0(%r5),%r3 ;# 4909 reload_outsi+2/5 + ldw 4(%r5),%r20 ;# 4913 reload_outsi+2/5 + sub %r6,%r3,%r19 ;# 4910 subsi3/1 + ldo 3(%r19),%r19 ;# 4911 addsi3/2 + comb,<< %r20,%r19,L$0493 + nop ;# 4915 bleu+1 +L$0492 + ldo 3(%r6),%r6 ;# 5030 addsi3/2 + ldi 0,%r8 ;# 5033 reload_outsi+2/2 + bl L$0043,%r0 ;# 5038 jump + copy %r6,%r12 ;# 5036 reload_outsi+2/1 +L$0506 + bb,>= %r15,22,L$0397 ;# 5046 movsi-4 + ldi 4608,%r20 ;# 5048 reload_outsi+2/2 + and %r15,%r20,%r19 ;# 5049 andsi3/1 + comb,= %r20,%r19,L$0397 ;# 5053 bleu+1 + ldw -296(%r30),%r20 ;# 5055 reload_outsi+2/5 + ldw -276(%r30),%r1 ;# 8977 reload_outsi+2/5 + ldo -2(%r20),%r19 ;# 5056 addsi3/2 + comb,<> %r1,%r19,L$1175 ;# 5058 bleu+1 + ldi -1,%r4 ;# 5074 reload_outsi+2/2 + comb,=,n %r16,%r20,L$0397 ;# 5062 bleu+1 +L$1174 + ldw -296(%r30),%r20 ;# 5079 reload_outsi+2/5 +L$1175 + copy %r4,%r11 ;# 5076 reload_outsi+2/1 + comb,<> %r16,%r20,L$0517 ;# 5085 bleu+1 + ldo -1(%r20),%r23 ;# 5080 addsi3/2 + bb,>=,n %r15,19,L$0915 ;# 5092 movsi-4 + bl L$1182,%r0 ;# 5107 jump + stw %r23,-296(%r30) ;# 5968 reload_outsi+2/6 +L$0517 + ldo 1(%r20),%r19 ;# 5134 addsi3/2 + stw %r19,-296(%r30) ;# 5136 reload_outsi+2/6 + comib,= 0,%r14,L$0515 ;# 5143 bleu+1 + ldb 0(%r20),%r7 ;# 5139 zero_extendqisi2/2 + addl %r14,%r7,%r19 ;# 5144 addsi3/1 + ldb 0(%r19),%r7 ;# 5147 zero_extendqisi2/2 +L$0515 + addil LR'__ctype-$global$,%r27 ;# 8257 pic2_lo_sum+1 + ldw RR'__ctype-$global$(%r1),%r21 ;# 8259 reload_outsi+2/5 + addl %r21,%r7,%r19 ;# 8260 addsi3/1 + ldb 0(%r19),%r19 ;# 8261 movqi+1/5 + bb,>= %r19,29,L$0513 ;# 8265 movsi-4 + ldi 4,%r20 ;# 8263 reload_outsi+2/2 + copy %r20,%r22 ;# 8583 reload_outsi+2/1 +L$0522 + comiclr,< -1,%r11,%r0 ;# 8128 movsicc+1/1 + ldi 0,%r11 + sh2addl %r11,%r11,%r19 ;# 5188 ashlsi3-2 + sh1addl %r19,%r7,%r19 ;# 5191 ashlsi3-2 + ldw -296(%r30),%r20 ;# 5194 reload_outsi+2/5 + comb,= %r16,%r20,L$0513 ;# 5196 bleu+1 + ldo -48(%r19),%r11 ;# 5192 addsi3/2 + ldo 1(%r20),%r19 ;# 5215 addsi3/2 + stw %r19,-296(%r30) ;# 5217 reload_outsi+2/6 + comib,= 0,%r14,L$0520 ;# 5224 bleu+1 + ldb 0(%r20),%r7 ;# 5220 zero_extendqisi2/2 + addl %r14,%r7,%r19 ;# 5225 addsi3/1 + ldb 0(%r19),%r7 ;# 5228 zero_extendqisi2/2 +L$0520 + addl %r21,%r7,%r19 ;# 5166 addsi3/1 + ldb 0(%r19),%r19 ;# 5168 movqi+1/5 + and %r19,%r22,%r19 ;# 5172 andsi3/1 + comib,<> 0,%r19,L$0522 + nop ;# 5174 bleu+1 +L$0513 + ldi 44,%r19 ;# 5252 reload_outsi+2/2 + comb,<> %r19,%r7,L$0532 ;# 5254 bleu+1 + ldw -296(%r30),%r20 ;# 5259 reload_outsi+2/5 + comb,= %r16,%r20,L$0533 ;# 5261 bleu+1 + ldo 1(%r20),%r19 ;# 5278 addsi3/2 + stw %r19,-296(%r30) ;# 5280 reload_outsi+2/6 + comib,= 0,%r14,L$0535 ;# 5287 bleu+1 + ldb 0(%r20),%r7 ;# 5283 zero_extendqisi2/2 + addl %r14,%r7,%r19 ;# 5288 addsi3/1 + ldb 0(%r19),%r7 ;# 5291 zero_extendqisi2/2 +L$0535 + addil LR'__ctype-$global$,%r27 ;# 8269 pic2_lo_sum+1 + ldw RR'__ctype-$global$(%r1),%r21 ;# 8271 reload_outsi+2/5 + addl %r21,%r7,%r19 ;# 8272 addsi3/1 + ldb 0(%r19),%r19 ;# 8273 movqi+1/5 + bb,>= %r19,29,L$0533 ;# 8277 movsi-4 + ldi 4,%r20 ;# 8275 reload_outsi+2/2 + copy %r20,%r22 ;# 8578 reload_outsi+2/1 +L$0542 + comiclr,< -1,%r4,%r0 ;# 8132 movsicc+1/1 + ldi 0,%r4 + sh2addl %r4,%r4,%r19 ;# 5332 ashlsi3-2 + sh1addl %r19,%r7,%r19 ;# 5335 ashlsi3-2 + ldw -296(%r30),%r20 ;# 5338 reload_outsi+2/5 + comb,= %r16,%r20,L$0533 ;# 5340 bleu+1 + ldo -48(%r19),%r4 ;# 5336 addsi3/2 + ldo 1(%r20),%r19 ;# 5359 addsi3/2 + stw %r19,-296(%r30) ;# 5361 reload_outsi+2/6 + comib,= 0,%r14,L$0540 ;# 5368 bleu+1 + ldb 0(%r20),%r7 ;# 5364 zero_extendqisi2/2 + addl %r14,%r7,%r19 ;# 5369 addsi3/1 + ldb 0(%r19),%r7 ;# 5372 zero_extendqisi2/2 +L$0540 + addl %r21,%r7,%r19 ;# 5310 addsi3/1 + ldb 0(%r19),%r19 ;# 5312 movqi+1/5 + and %r19,%r22,%r19 ;# 5316 andsi3/1 + comib,<> 0,%r19,L$0542 + nop ;# 5318 bleu+1 +L$0533 + comiclr,< -1,%r4,%r0 ;# 8136 beq-1/4 + zdepi -1,31,15,%r4 + bl,n L$0553,%r0 ;# 5401 jump +L$0532 + copy %r11,%r4 ;# 5406 reload_outsi+2/1 +L$0553 + comib,> 0,%r11,L$0951 ;# 5410 bleu+1 + zdepi -1,31,15,%r19 ;# 5412 reload_outsi+2/4 + comb,<,n %r19,%r4,L$0951 ;# 5414 bleu+1 + comb,<,n %r4,%r11,L$0951 ;# 5416 bleu+1 + bb,< %r15,19,L$1176 ;# 5451 bleu+3 + ldi 125,%r19 ;# 5514 reload_outsi+2/2 + ldi 92,%r19 ;# 5455 reload_outsi+2/2 + comb,<> %r19,%r7,L$0915 ;# 5457 bleu+1 + ldw -296(%r30),%r20 ;# 5473 reload_outsi+2/5 + comb,= %r16,%r20,L$0922 ;# 5475 bleu+1 + ldo 1(%r20),%r19 ;# 5484 addsi3/2 + stw %r19,-296(%r30) ;# 5486 reload_outsi+2/6 + comib,= 0,%r14,L$0558 ;# 5493 bleu+1 + ldb 0(%r20),%r7 ;# 5489 zero_extendqisi2/2 + addl %r14,%r7,%r19 ;# 5494 addsi3/1 + ldb 0(%r19),%r7 ;# 5497 zero_extendqisi2/2 +L$0558 + ldi 125,%r19 ;# 5514 reload_outsi+2/2 +L$1176 + comb,=,n %r19,%r7,L$0566 ;# 5516 bleu+1 +L$0951 + bb,<,n %r15,19,L$0511 ;# 5523 bleu+3 + .CALL ARGW0=GR + bl free,%r2 ;# 5534 call_internal_symref + ldw -312(%r30),%r26 ;# 5532 reload_outsi+2/5 + bl L$0867,%r0 ;# 5538 jump + ldi 10,%r28 ;# 5536 reload_outsi+2/2 +L$0566 + comib,<>,n 0,%r8,L$0569 ;# 5545 bleu+1 + bb,<,n %r15,26,L$0917 ;# 5552 bleu+3 + bb,>=,n %r15,27,L$0511 ;# 5571 movsi-4 + copy %r6,%r8 ;# 5574 reload_outsi+2/1 +L$0569 + comib,<> 0,%r4,L$0574 ;# 5587 bleu+1 + ldi 10,%r13 ;# 8980 reload_outsi+2/2 + ldw 0(%r5),%r3 ;# 8139 reload_outsi+2/5 + ldw 4(%r5),%r20 ;# 8142 reload_outsi+2/5 + sub %r6,%r3,%r19 ;# 8140 subsi3/1 + ldo 3(%r19),%r19 ;# 8141 addsi3/2 + comb,>>=,n %r20,%r19,L$0576 ;# 8143 bleu+1 + ldil L'65536,%r4 ;# 8573 reload_outsi+2/3 +L$0577 + comb,= %r4,%r20,L$0944 ;# 5613 bleu+1 + zdep %r20,30,31,%r19 ;# 5623 ashlsi3+1 + comb,>>= %r4,%r19,L$0582 ;# 5631 bleu+1 + stw %r19,4(%r5) ;# 5625 reload_outsi+2/6 + stw %r4,4(%r5) ;# 5634 reload_outsi+2/6 +L$0582 + ldw 0(%r5),%r26 ;# 5641 reload_outsi+2/5 + .CALL ARGW0=GR,ARGW1=GR + bl realloc,%r2 ;# 5645 call_value_internal_symref + ldw 4(%r5),%r25 ;# 5643 reload_outsi+2/5 + comib,= 0,%r28,L$0953 ;# 5653 bleu+1 + stw %r28,0(%r5) ;# 5649 reload_outsi+2/6 + comb,= %r28,%r3,L$0575 ;# 5663 bleu+1 + sub %r6,%r3,%r19 ;# 5665 subsi3/1 + addl %r28,%r19,%r6 ;# 5668 addsi3/1 + sub %r12,%r3,%r19 ;# 5669 subsi3/1 + comib,= 0,%r10,L$0585 ;# 5674 bleu+1 + addl %r28,%r19,%r12 ;# 5672 addsi3/1 + sub %r10,%r3,%r19 ;# 5675 subsi3/1 + addl %r28,%r19,%r10 ;# 5678 addsi3/1 +L$0585 + comib,= 0,%r8,L$0586 ;# 5681 bleu+1 + sub %r8,%r3,%r19 ;# 5682 subsi3/1 + addl %r28,%r19,%r8 ;# 5685 addsi3/1 +L$0586 + comib,= 0,%r9,L$0575 ;# 5688 bleu+1 + sub %r9,%r3,%r19 ;# 5689 subsi3/1 + addl %r28,%r19,%r9 ;# 5692 addsi3/1 +L$0575 + ldw 0(%r5),%r3 ;# 5593 reload_outsi+2/5 + ldw 4(%r5),%r20 ;# 5597 reload_outsi+2/5 + sub %r6,%r3,%r19 ;# 5594 subsi3/1 + ldo 3(%r19),%r19 ;# 5595 addsi3/2 + comb,<< %r20,%r19,L$0577 + nop ;# 5599 bleu+1 +L$0576 + ldi 12,%r26 ;# 5718 reload_outsi+2/2 + copy %r8,%r25 ;# 5720 reload_outsi+2/1 + sub %r6,%r8,%r24 ;# 5722 subsi3/1 + .CALL ARGW0=GR,ARGW1=GR,ARGW2=GR,ARGW3=GR + bl insert_op1,%r2 ;# 5726 call_internal_symref + copy %r6,%r23 ;# 5724 reload_outsi+2/1 + bl L$0590,%r0 ;# 5730 jump + ldo 3(%r6),%r6 ;# 5728 addsi3/2 +L$0574 + comiclr,> 2,%r4,%r0 ;# 8282 beq-1/2 + ldi 20,%r13 + ldw 0(%r5),%r3 ;# 8285 reload_outsi+2/5 + ldw 4(%r5),%r20 ;# 8288 reload_outsi+2/5 + sub %r6,%r3,%r19 ;# 8286 subsi3/1 + addl %r19,%r13,%r19 ;# 8287 addsi3/1 + comb,>>=,n %r20,%r19,L$0868 ;# 8289 bleu+1 + ldil L'65536,%r7 ;# 8571 reload_outsi+2/3 +L$0595 + comb,= %r7,%r20,L$0944 ;# 5769 bleu+1 + zdep %r20,30,31,%r19 ;# 5779 ashlsi3+1 + comb,>>= %r7,%r19,L$0600 ;# 5787 bleu+1 + stw %r19,4(%r5) ;# 5781 reload_outsi+2/6 + stw %r7,4(%r5) ;# 5790 reload_outsi+2/6 +L$0600 + ldw 0(%r5),%r26 ;# 5797 reload_outsi+2/5 + .CALL ARGW0=GR,ARGW1=GR + bl realloc,%r2 ;# 5801 call_value_internal_symref + ldw 4(%r5),%r25 ;# 5799 reload_outsi+2/5 + comib,= 0,%r28,L$0953 ;# 5809 bleu+1 + stw %r28,0(%r5) ;# 5805 reload_outsi+2/6 + comb,= %r28,%r3,L$0593 ;# 5819 bleu+1 + sub %r6,%r3,%r19 ;# 5821 subsi3/1 + addl %r28,%r19,%r6 ;# 5824 addsi3/1 + sub %r12,%r3,%r19 ;# 5825 subsi3/1 + comib,= 0,%r10,L$0603 ;# 5830 bleu+1 + addl %r28,%r19,%r12 ;# 5828 addsi3/1 + sub %r10,%r3,%r19 ;# 5831 subsi3/1 + addl %r28,%r19,%r10 ;# 5834 addsi3/1 +L$0603 + comib,= 0,%r8,L$0604 ;# 5837 bleu+1 + sub %r8,%r3,%r19 ;# 5838 subsi3/1 + addl %r28,%r19,%r8 ;# 5841 addsi3/1 +L$0604 + comib,= 0,%r9,L$0593 ;# 5844 bleu+1 + sub %r9,%r3,%r19 ;# 5845 subsi3/1 + addl %r28,%r19,%r9 ;# 5848 addsi3/1 +L$0593 + ldw 0(%r5),%r3 ;# 5749 reload_outsi+2/5 + ldw 4(%r5),%r20 ;# 5753 reload_outsi+2/5 + sub %r6,%r3,%r19 ;# 5750 subsi3/1 + addl %r19,%r13,%r19 ;# 5751 addsi3/1 + comb,<< %r20,%r19,L$0595 + nop ;# 5755 bleu+1 +L$0868 + comib,>= 1,%r4,L$0608 ;# 5872 bleu+1 + ldo 5(%r6),%r19 ;# 5870 addsi3/2 + sub %r19,%r8,%r19 ;# 5874 subsi3/1 + bl L$0609,%r0 ;# 5876 jump + ldo 2(%r19),%r24 ;# 5875 addsi3/2 +L$0608 + sub %r19,%r8,%r19 ;# 5879 subsi3/1 + ldo -3(%r19),%r24 ;# 5880 addsi3/2 +L$0609 + ldi 20,%r26 ;# 5885 reload_outsi+2/2 + copy %r8,%r25 ;# 5887 reload_outsi+2/1 + copy %r11,%r23 ;# 5891 reload_outsi+2/1 + .CALL ARGW0=GR,ARGW1=GR,ARGW2=GR,ARGW3=GR + bl insert_op2,%r2 ;# 5893 call_internal_symref + stw %r6,-52(%r30) ;# 5883 reload_outsi+2/6 + ldo 5(%r6),%r6 ;# 5895 addsi3/2 + ldi 22,%r26 ;# 5900 reload_outsi+2/2 + copy %r8,%r25 ;# 5902 reload_outsi+2/1 + ldi 5,%r24 ;# 5904 reload_outsi+2/2 + copy %r11,%r23 ;# 5906 reload_outsi+2/1 + .CALL ARGW0=GR,ARGW1=GR,ARGW2=GR,ARGW3=GR + bl insert_op2,%r2 ;# 5908 call_internal_symref + stw %r6,-52(%r30) ;# 5898 reload_outsi+2/6 + comib,>= 1,%r4,L$0590 ;# 5913 bleu+1 + ldo 5(%r6),%r6 ;# 5910 addsi3/2 + ldi 21,%r26 ;# 5921 reload_outsi+2/2 + copy %r6,%r25 ;# 5923 reload_outsi+2/1 + sub %r8,%r6,%r24 ;# 5917 subsi3/1 + ldo 2(%r24),%r24 ;# 5925 addsi3/2 + ldo -1(%r4),%r4 ;# 5919 addsi3/2 + .CALL ARGW0=GR,ARGW1=GR,ARGW2=GR,ARGW3=GR + bl store_op2,%r2 ;# 5929 call_internal_symref + copy %r4,%r23 ;# 5927 reload_outsi+2/1 + ldo 5(%r6),%r6 ;# 5931 addsi3/2 + stw %r6,-52(%r30) ;# 5936 reload_outsi+2/6 + ldi 22,%r26 ;# 5938 reload_outsi+2/2 + copy %r8,%r25 ;# 5940 reload_outsi+2/1 + sub %r6,%r8,%r24 ;# 5942 subsi3/1 + .CALL ARGW0=GR,ARGW1=GR,ARGW2=GR,ARGW3=GR + bl insert_op2,%r2 ;# 5946 call_internal_symref + copy %r4,%r23 ;# 5944 reload_outsi+2/1 + ldo 5(%r6),%r6 ;# 5948 addsi3/2 +L$0590 + bl L$0043,%r0 ;# 5963 jump + ldi 0,%r9 ;# 5956 reload_outsi+2/2 +L$0511 + stw %r23,-296(%r30) ;# 5968 reload_outsi+2/6 +L$1182 + ldw -296(%r30),%r20 ;# 5977 reload_outsi+2/5 + comb,= %r16,%r20,L$0922 ;# 5979 bleu+1 + ldo 1(%r20),%r21 ;# 5988 addsi3/2 + ldb 0(%r20),%r20 ;# 5992 movqi+1/5 + stw %r21,-296(%r30) ;# 5990 reload_outsi+2/6 + comib,= 0,%r14,L$0612 ;# 5997 bleu+1 + extru %r20,31,8,%r7 ;# 5993 zero_extendqisi2/1 + addl %r14,%r7,%r19 ;# 5998 addsi3/1 + ldb 0(%r19),%r7 ;# 6001 zero_extendqisi2/2 +L$0612 + bb,< %r15,19,L$0076 ;# 6019 bleu+3 + ldw -276(%r30),%r1 ;# 8983 reload_outsi+2/5 + comb,>>= %r1,%r21,L$0076 ;# 6025 bleu+1 + extrs %r20,31,8,%r20 ;# 6030 extendqisi2 + ldi 92,%r19 ;# 6032 reload_outsi+2/2 + comb,=,n %r19,%r20,L$0397 ;# 6034 bleu+1 + bl,n L$0076,%r0 ;# 6042 jump +L$0619 + ldw 4(%r5),%r20 ;# 8151 reload_outsi+2/5 + sub %r6,%r4,%r19 ;# 8149 subsi3/1 + ldo 1(%r19),%r19 ;# 8150 addsi3/2 + comb,>>= %r20,%r19,L$0624 ;# 8152 bleu+1 + copy %r6,%r8 ;# 6047 reload_outsi+2/1 + ldil L'65536,%r3 ;# 8569 reload_outsi+2/3 +L$0625 + comb,= %r3,%r20,L$0944 ;# 6075 bleu+1 + zdep %r20,30,31,%r19 ;# 6085 ashlsi3+1 + comb,>>= %r3,%r19,L$0630 ;# 6093 bleu+1 + stw %r19,4(%r5) ;# 6087 reload_outsi+2/6 + stw %r3,4(%r5) ;# 6096 reload_outsi+2/6 +L$0630 + ldw 0(%r5),%r26 ;# 6103 reload_outsi+2/5 + .CALL ARGW0=GR,ARGW1=GR + bl realloc,%r2 ;# 6107 call_value_internal_symref + ldw 4(%r5),%r25 ;# 6105 reload_outsi+2/5 + comiclr,<> 0,%r28,%r0 ;# 6115 bleu+1 + bl L$0953,%r0 + stw %r28,0(%r5) ;# 6111 reload_outsi+2/6 + comb,= %r28,%r4,L$0623 ;# 6125 bleu+1 + sub %r6,%r4,%r19 ;# 6127 subsi3/1 + addl %r28,%r19,%r6 ;# 6130 addsi3/1 + sub %r12,%r4,%r19 ;# 6131 subsi3/1 + comib,= 0,%r10,L$0633 ;# 6136 bleu+1 + addl %r28,%r19,%r12 ;# 6134 addsi3/1 + sub %r10,%r4,%r19 ;# 6137 subsi3/1 + addl %r28,%r19,%r10 ;# 6140 addsi3/1 +L$0633 + comib,= 0,%r8,L$0634 ;# 6143 bleu+1 + sub %r8,%r4,%r19 ;# 6144 subsi3/1 + addl %r28,%r19,%r8 ;# 6147 addsi3/1 +L$0634 + comib,= 0,%r9,L$0623 ;# 6150 bleu+1 + sub %r9,%r4,%r19 ;# 6151 subsi3/1 + addl %r28,%r19,%r9 ;# 6154 addsi3/1 +L$0623 + ldw 0(%r5),%r4 ;# 6055 reload_outsi+2/5 + ldw 4(%r5),%r20 ;# 6059 reload_outsi+2/5 + sub %r6,%r4,%r19 ;# 6056 subsi3/1 + ldo 1(%r19),%r19 ;# 6057 addsi3/2 + comb,<< %r20,%r19,L$0625 + nop ;# 6061 bleu+1 +L$0624 + ldi 23,%r19 ;# 6176 movqi+1/2 + bl L$0043,%r0 ;# 6189 jump + stbs,ma %r19,1(%r6) ;# 6177 movqi+1/6 +L$0639 + ldw 4(%r5),%r20 ;# 8159 reload_outsi+2/5 + sub %r6,%r4,%r19 ;# 8157 subsi3/1 + ldo 1(%r19),%r19 ;# 8158 addsi3/2 + comb,>>= %r20,%r19,L$0644 ;# 8160 bleu+1 + copy %r6,%r8 ;# 6194 reload_outsi+2/1 + ldil L'65536,%r3 ;# 8567 reload_outsi+2/3 +L$0645 + comb,= %r3,%r20,L$0944 ;# 6222 bleu+1 + zdep %r20,30,31,%r19 ;# 6232 ashlsi3+1 + comb,>>= %r3,%r19,L$0650 ;# 6240 bleu+1 + stw %r19,4(%r5) ;# 6234 reload_outsi+2/6 + stw %r3,4(%r5) ;# 6243 reload_outsi+2/6 +L$0650 + ldw 0(%r5),%r26 ;# 6250 reload_outsi+2/5 + .CALL ARGW0=GR,ARGW1=GR + bl realloc,%r2 ;# 6254 call_value_internal_symref + ldw 4(%r5),%r25 ;# 6252 reload_outsi+2/5 + comiclr,<> 0,%r28,%r0 ;# 6262 bleu+1 + bl L$0953,%r0 + stw %r28,0(%r5) ;# 6258 reload_outsi+2/6 + comb,= %r28,%r4,L$0643 ;# 6272 bleu+1 + sub %r6,%r4,%r19 ;# 6274 subsi3/1 + addl %r28,%r19,%r6 ;# 6277 addsi3/1 + sub %r12,%r4,%r19 ;# 6278 subsi3/1 + comib,= 0,%r10,L$0653 ;# 6283 bleu+1 + addl %r28,%r19,%r12 ;# 6281 addsi3/1 + sub %r10,%r4,%r19 ;# 6284 subsi3/1 + addl %r28,%r19,%r10 ;# 6287 addsi3/1 +L$0653 + comib,= 0,%r8,L$0654 ;# 6290 bleu+1 + sub %r8,%r4,%r19 ;# 6291 subsi3/1 + addl %r28,%r19,%r8 ;# 6294 addsi3/1 +L$0654 + comib,= 0,%r9,L$0643 ;# 6297 bleu+1 + sub %r9,%r4,%r19 ;# 6298 subsi3/1 + addl %r28,%r19,%r9 ;# 6301 addsi3/1 +L$0643 + ldw 0(%r5),%r4 ;# 6202 reload_outsi+2/5 + ldw 4(%r5),%r20 ;# 6206 reload_outsi+2/5 + sub %r6,%r4,%r19 ;# 6203 subsi3/1 + ldo 1(%r19),%r19 ;# 6204 addsi3/2 + comb,<< %r20,%r19,L$0645 + nop ;# 6208 bleu+1 +L$0644 + ldi 24,%r19 ;# 6323 movqi+1/2 + bl L$0043,%r0 ;# 6336 jump + stbs,ma %r19,1(%r6) ;# 6324 movqi+1/6 +L$0659 + ldw 4(%r5),%r20 ;# 8167 reload_outsi+2/5 + sub %r6,%r4,%r19 ;# 8165 subsi3/1 + ldo 1(%r19),%r19 ;# 8166 addsi3/2 + comb,>>=,n %r20,%r19,L$0664 ;# 8168 bleu+1 + ldil L'65536,%r3 ;# 8565 reload_outsi+2/3 +L$0665 + comb,= %r3,%r20,L$0944 ;# 6366 bleu+1 + zdep %r20,30,31,%r19 ;# 6376 ashlsi3+1 + comb,>>= %r3,%r19,L$0670 ;# 6384 bleu+1 + stw %r19,4(%r5) ;# 6378 reload_outsi+2/6 + stw %r3,4(%r5) ;# 6387 reload_outsi+2/6 +L$0670 + ldw 0(%r5),%r26 ;# 6394 reload_outsi+2/5 + .CALL ARGW0=GR,ARGW1=GR + bl realloc,%r2 ;# 6398 call_value_internal_symref + ldw 4(%r5),%r25 ;# 6396 reload_outsi+2/5 + comiclr,<> 0,%r28,%r0 ;# 6406 bleu+1 + bl L$0953,%r0 + stw %r28,0(%r5) ;# 6402 reload_outsi+2/6 + comb,= %r28,%r4,L$0663 ;# 6416 bleu+1 + sub %r6,%r4,%r19 ;# 6418 subsi3/1 + addl %r28,%r19,%r6 ;# 6421 addsi3/1 + sub %r12,%r4,%r19 ;# 6422 subsi3/1 + comib,= 0,%r10,L$0673 ;# 6427 bleu+1 + addl %r28,%r19,%r12 ;# 6425 addsi3/1 + sub %r10,%r4,%r19 ;# 6428 subsi3/1 + addl %r28,%r19,%r10 ;# 6431 addsi3/1 +L$0673 + comib,= 0,%r8,L$0674 ;# 6434 bleu+1 + sub %r8,%r4,%r19 ;# 6435 subsi3/1 + addl %r28,%r19,%r8 ;# 6438 addsi3/1 +L$0674 + comib,= 0,%r9,L$0663 ;# 6441 bleu+1 + sub %r9,%r4,%r19 ;# 6442 subsi3/1 + addl %r28,%r19,%r9 ;# 6445 addsi3/1 +L$0663 + ldw 0(%r5),%r4 ;# 6346 reload_outsi+2/5 + ldw 4(%r5),%r20 ;# 6350 reload_outsi+2/5 + sub %r6,%r4,%r19 ;# 6347 subsi3/1 + ldo 1(%r19),%r19 ;# 6348 addsi3/2 + comb,<< %r20,%r19,L$0665 + nop ;# 6352 bleu+1 +L$0664 + ldi 25,%r19 ;# 6467 movqi+1/2 + bl L$0043,%r0 ;# 6480 jump + stbs,ma %r19,1(%r6) ;# 6468 movqi+1/6 +L$0679 + ldw 4(%r5),%r20 ;# 8175 reload_outsi+2/5 + sub %r6,%r4,%r19 ;# 8173 subsi3/1 + ldo 1(%r19),%r19 ;# 8174 addsi3/2 + comb,>>=,n %r20,%r19,L$0684 ;# 8176 bleu+1 + ldil L'65536,%r3 ;# 8563 reload_outsi+2/3 +L$0685 + comb,= %r3,%r20,L$0944 ;# 6510 bleu+1 + zdep %r20,30,31,%r19 ;# 6520 ashlsi3+1 + comb,>>= %r3,%r19,L$0690 ;# 6528 bleu+1 + stw %r19,4(%r5) ;# 6522 reload_outsi+2/6 + stw %r3,4(%r5) ;# 6531 reload_outsi+2/6 +L$0690 + ldw 0(%r5),%r26 ;# 6538 reload_outsi+2/5 + .CALL ARGW0=GR,ARGW1=GR + bl realloc,%r2 ;# 6542 call_value_internal_symref + ldw 4(%r5),%r25 ;# 6540 reload_outsi+2/5 + comiclr,<> 0,%r28,%r0 ;# 6550 bleu+1 + bl L$0953,%r0 + stw %r28,0(%r5) ;# 6546 reload_outsi+2/6 + comb,= %r28,%r4,L$0683 ;# 6560 bleu+1 + sub %r6,%r4,%r19 ;# 6562 subsi3/1 + addl %r28,%r19,%r6 ;# 6565 addsi3/1 + sub %r12,%r4,%r19 ;# 6566 subsi3/1 + comib,= 0,%r10,L$0693 ;# 6571 bleu+1 + addl %r28,%r19,%r12 ;# 6569 addsi3/1 + sub %r10,%r4,%r19 ;# 6572 subsi3/1 + addl %r28,%r19,%r10 ;# 6575 addsi3/1 +L$0693 + comib,= 0,%r8,L$0694 ;# 6578 bleu+1 + sub %r8,%r4,%r19 ;# 6579 subsi3/1 + addl %r28,%r19,%r8 ;# 6582 addsi3/1 +L$0694 + comib,= 0,%r9,L$0683 ;# 6585 bleu+1 + sub %r9,%r4,%r19 ;# 6586 subsi3/1 + addl %r28,%r19,%r9 ;# 6589 addsi3/1 +L$0683 + ldw 0(%r5),%r4 ;# 6490 reload_outsi+2/5 + ldw 4(%r5),%r20 ;# 6494 reload_outsi+2/5 + sub %r6,%r4,%r19 ;# 6491 subsi3/1 + ldo 1(%r19),%r19 ;# 6492 addsi3/2 + comb,<< %r20,%r19,L$0685 + nop ;# 6496 bleu+1 +L$0684 + ldi 26,%r19 ;# 6611 movqi+1/2 + bl L$0043,%r0 ;# 6624 jump + stbs,ma %r19,1(%r6) ;# 6612 movqi+1/6 +L$0699 + ldw 4(%r5),%r20 ;# 8183 reload_outsi+2/5 + sub %r6,%r4,%r19 ;# 8181 subsi3/1 + ldo 1(%r19),%r19 ;# 8182 addsi3/2 + comb,>>=,n %r20,%r19,L$0704 ;# 8184 bleu+1 + ldil L'65536,%r3 ;# 8561 reload_outsi+2/3 +L$0705 + comb,= %r3,%r20,L$0944 ;# 6654 bleu+1 + zdep %r20,30,31,%r19 ;# 6664 ashlsi3+1 + comb,>>= %r3,%r19,L$0710 ;# 6672 bleu+1 + stw %r19,4(%r5) ;# 6666 reload_outsi+2/6 + stw %r3,4(%r5) ;# 6675 reload_outsi+2/6 +L$0710 + ldw 0(%r5),%r26 ;# 6682 reload_outsi+2/5 + .CALL ARGW0=GR,ARGW1=GR + bl realloc,%r2 ;# 6686 call_value_internal_symref + ldw 4(%r5),%r25 ;# 6684 reload_outsi+2/5 + comiclr,<> 0,%r28,%r0 ;# 6694 bleu+1 + bl L$0953,%r0 + stw %r28,0(%r5) ;# 6690 reload_outsi+2/6 + comb,= %r28,%r4,L$0703 ;# 6704 bleu+1 + sub %r6,%r4,%r19 ;# 6706 subsi3/1 + addl %r28,%r19,%r6 ;# 6709 addsi3/1 + sub %r12,%r4,%r19 ;# 6710 subsi3/1 + comib,= 0,%r10,L$0713 ;# 6715 bleu+1 + addl %r28,%r19,%r12 ;# 6713 addsi3/1 + sub %r10,%r4,%r19 ;# 6716 subsi3/1 + addl %r28,%r19,%r10 ;# 6719 addsi3/1 +L$0713 + comib,= 0,%r8,L$0714 ;# 6722 bleu+1 + sub %r8,%r4,%r19 ;# 6723 subsi3/1 + addl %r28,%r19,%r8 ;# 6726 addsi3/1 +L$0714 + comib,= 0,%r9,L$0703 ;# 6729 bleu+1 + sub %r9,%r4,%r19 ;# 6730 subsi3/1 + addl %r28,%r19,%r9 ;# 6733 addsi3/1 +L$0703 + ldw 0(%r5),%r4 ;# 6634 reload_outsi+2/5 + ldw 4(%r5),%r20 ;# 6638 reload_outsi+2/5 + sub %r6,%r4,%r19 ;# 6635 subsi3/1 + ldo 1(%r19),%r19 ;# 6636 addsi3/2 + comb,<< %r20,%r19,L$0705 + nop ;# 6640 bleu+1 +L$0704 + ldi 27,%r19 ;# 6755 movqi+1/2 + bl L$0043,%r0 ;# 6768 jump + stbs,ma %r19,1(%r6) ;# 6756 movqi+1/6 +L$0719 + ldw 4(%r5),%r20 ;# 8191 reload_outsi+2/5 + sub %r6,%r4,%r19 ;# 8189 subsi3/1 + ldo 1(%r19),%r19 ;# 8190 addsi3/2 + comb,>>=,n %r20,%r19,L$0724 ;# 8192 bleu+1 + ldil L'65536,%r3 ;# 8559 reload_outsi+2/3 +L$0725 + comb,= %r3,%r20,L$0944 ;# 6798 bleu+1 + zdep %r20,30,31,%r19 ;# 6808 ashlsi3+1 + comb,>>= %r3,%r19,L$0730 ;# 6816 bleu+1 + stw %r19,4(%r5) ;# 6810 reload_outsi+2/6 + stw %r3,4(%r5) ;# 6819 reload_outsi+2/6 +L$0730 + ldw 0(%r5),%r26 ;# 6826 reload_outsi+2/5 + .CALL ARGW0=GR,ARGW1=GR + bl realloc,%r2 ;# 6830 call_value_internal_symref + ldw 4(%r5),%r25 ;# 6828 reload_outsi+2/5 + comiclr,<> 0,%r28,%r0 ;# 6838 bleu+1 + bl L$0953,%r0 + stw %r28,0(%r5) ;# 6834 reload_outsi+2/6 + comb,= %r28,%r4,L$0723 ;# 6848 bleu+1 + sub %r6,%r4,%r19 ;# 6850 subsi3/1 + addl %r28,%r19,%r6 ;# 6853 addsi3/1 + sub %r12,%r4,%r19 ;# 6854 subsi3/1 + comib,= 0,%r10,L$0733 ;# 6859 bleu+1 + addl %r28,%r19,%r12 ;# 6857 addsi3/1 + sub %r10,%r4,%r19 ;# 6860 subsi3/1 + addl %r28,%r19,%r10 ;# 6863 addsi3/1 +L$0733 + comib,= 0,%r8,L$0734 ;# 6866 bleu+1 + sub %r8,%r4,%r19 ;# 6867 subsi3/1 + addl %r28,%r19,%r8 ;# 6870 addsi3/1 +L$0734 + comib,= 0,%r9,L$0723 ;# 6873 bleu+1 + sub %r9,%r4,%r19 ;# 6874 subsi3/1 + addl %r28,%r19,%r9 ;# 6877 addsi3/1 +L$0723 + ldw 0(%r5),%r4 ;# 6778 reload_outsi+2/5 + ldw 4(%r5),%r20 ;# 6782 reload_outsi+2/5 + sub %r6,%r4,%r19 ;# 6779 subsi3/1 + ldo 1(%r19),%r19 ;# 6780 addsi3/2 + comb,<< %r20,%r19,L$0725 + nop ;# 6784 bleu+1 +L$0724 + ldi 28,%r19 ;# 6899 movqi+1/2 + bl L$0043,%r0 ;# 6912 jump + stbs,ma %r19,1(%r6) ;# 6900 movqi+1/6 +L$0739 + ldw 4(%r5),%r20 ;# 8199 reload_outsi+2/5 + sub %r6,%r4,%r19 ;# 8197 subsi3/1 + ldo 1(%r19),%r19 ;# 8198 addsi3/2 + comb,>>=,n %r20,%r19,L$0744 ;# 8200 bleu+1 + ldil L'65536,%r3 ;# 8557 reload_outsi+2/3 +L$0745 + comb,= %r3,%r20,L$0944 ;# 6942 bleu+1 + zdep %r20,30,31,%r19 ;# 6952 ashlsi3+1 + comb,>>= %r3,%r19,L$0750 ;# 6960 bleu+1 + stw %r19,4(%r5) ;# 6954 reload_outsi+2/6 + stw %r3,4(%r5) ;# 6963 reload_outsi+2/6 +L$0750 + ldw 0(%r5),%r26 ;# 6970 reload_outsi+2/5 + .CALL ARGW0=GR,ARGW1=GR + bl realloc,%r2 ;# 6974 call_value_internal_symref + ldw 4(%r5),%r25 ;# 6972 reload_outsi+2/5 + comiclr,<> 0,%r28,%r0 ;# 6982 bleu+1 + bl L$0953,%r0 + stw %r28,0(%r5) ;# 6978 reload_outsi+2/6 + comb,= %r28,%r4,L$0743 ;# 6992 bleu+1 + sub %r6,%r4,%r19 ;# 6994 subsi3/1 + addl %r28,%r19,%r6 ;# 6997 addsi3/1 + sub %r12,%r4,%r19 ;# 6998 subsi3/1 + comib,= 0,%r10,L$0753 ;# 7003 bleu+1 + addl %r28,%r19,%r12 ;# 7001 addsi3/1 + sub %r10,%r4,%r19 ;# 7004 subsi3/1 + addl %r28,%r19,%r10 ;# 7007 addsi3/1 +L$0753 + comib,= 0,%r8,L$0754 ;# 7010 bleu+1 + sub %r8,%r4,%r19 ;# 7011 subsi3/1 + addl %r28,%r19,%r8 ;# 7014 addsi3/1 +L$0754 + comib,= 0,%r9,L$0743 ;# 7017 bleu+1 + sub %r9,%r4,%r19 ;# 7018 subsi3/1 + addl %r28,%r19,%r9 ;# 7021 addsi3/1 +L$0743 + ldw 0(%r5),%r4 ;# 6922 reload_outsi+2/5 + ldw 4(%r5),%r20 ;# 6926 reload_outsi+2/5 + sub %r6,%r4,%r19 ;# 6923 subsi3/1 + ldo 1(%r19),%r19 ;# 6924 addsi3/2 + comb,<< %r20,%r19,L$0745 + nop ;# 6928 bleu+1 +L$0744 + ldi 10,%r19 ;# 7043 movqi+1/2 + bl L$0043,%r0 ;# 7056 jump + stbs,ma %r19,1(%r6) ;# 7044 movqi+1/6 +L$0759 + ldw 4(%r5),%r20 ;# 8207 reload_outsi+2/5 + sub %r6,%r4,%r19 ;# 8205 subsi3/1 + ldo 1(%r19),%r19 ;# 8206 addsi3/2 + comb,>>=,n %r20,%r19,L$0764 ;# 8208 bleu+1 + ldil L'65536,%r3 ;# 8555 reload_outsi+2/3 +L$0765 + comb,= %r3,%r20,L$0944 ;# 7086 bleu+1 + zdep %r20,30,31,%r19 ;# 7096 ashlsi3+1 + comb,>>= %r3,%r19,L$0770 ;# 7104 bleu+1 + stw %r19,4(%r5) ;# 7098 reload_outsi+2/6 + stw %r3,4(%r5) ;# 7107 reload_outsi+2/6 +L$0770 + ldw 0(%r5),%r26 ;# 7114 reload_outsi+2/5 + .CALL ARGW0=GR,ARGW1=GR + bl realloc,%r2 ;# 7118 call_value_internal_symref + ldw 4(%r5),%r25 ;# 7116 reload_outsi+2/5 + comiclr,<> 0,%r28,%r0 ;# 7126 bleu+1 + bl L$0953,%r0 + stw %r28,0(%r5) ;# 7122 reload_outsi+2/6 + comb,= %r28,%r4,L$0763 ;# 7136 bleu+1 + sub %r6,%r4,%r19 ;# 7138 subsi3/1 + addl %r28,%r19,%r6 ;# 7141 addsi3/1 + sub %r12,%r4,%r19 ;# 7142 subsi3/1 + comib,= 0,%r10,L$0773 ;# 7147 bleu+1 + addl %r28,%r19,%r12 ;# 7145 addsi3/1 + sub %r10,%r4,%r19 ;# 7148 subsi3/1 + addl %r28,%r19,%r10 ;# 7151 addsi3/1 +L$0773 + comib,= 0,%r8,L$0774 ;# 7154 bleu+1 + sub %r8,%r4,%r19 ;# 7155 subsi3/1 + addl %r28,%r19,%r8 ;# 7158 addsi3/1 +L$0774 + comib,= 0,%r9,L$0763 ;# 7161 bleu+1 + sub %r9,%r4,%r19 ;# 7162 subsi3/1 + addl %r28,%r19,%r9 ;# 7165 addsi3/1 +L$0763 + ldw 0(%r5),%r4 ;# 7066 reload_outsi+2/5 + ldw 4(%r5),%r20 ;# 7070 reload_outsi+2/5 + sub %r6,%r4,%r19 ;# 7067 subsi3/1 + ldo 1(%r19),%r19 ;# 7068 addsi3/2 + comb,<< %r20,%r19,L$0765 + nop ;# 7072 bleu+1 +L$0764 + ldi 11,%r19 ;# 7187 movqi+1/2 + bl L$0043,%r0 ;# 7200 jump + stbs,ma %r19,1(%r6) ;# 7188 movqi+1/6 +L$0787 + bb,< %r15,17,L$0076 ;# 7216 bleu+3 + ldo -48(%r7),%r19 ;# 7224 addsi3/2 + ldw -260(%r30),%r1 ;# 8986 reload_outsi+2/5 + extru %r19,31,8,%r3 ;# 7225 zero_extendqisi2/1 + comb,<< %r1,%r3,L$0939 ;# 7230 bleu+1 + ldo -312(%r30),%r26 ;# 7244 addsi3/2 + .CALL ARGW0=GR,ARGW1=GR + bl group_in_compile_stack,%r2 ;# 7248 call_value_internal_symref + copy %r3,%r25 ;# 7246 reload_outsi+2/1 + extrs %r28,31,8,%r28 ;# 7251 extendqisi2 + comib,<>,n 0,%r28,L$0076 ;# 7253 bleu+1 + ldw 0(%r5),%r4 ;# 8212 reload_outsi+2/5 + ldw 4(%r5),%r20 ;# 8215 reload_outsi+2/5 + sub %r6,%r4,%r19 ;# 8213 subsi3/1 + ldo 2(%r19),%r19 ;# 8214 addsi3/2 + comb,>>= %r20,%r19,L$0795 ;# 8216 bleu+1 + copy %r6,%r8 ;# 7260 reload_outsi+2/1 + ldil L'65536,%r7 ;# 8553 reload_outsi+2/3 +L$0796 + comb,= %r7,%r20,L$0944 ;# 7288 bleu+1 + zdep %r20,30,31,%r19 ;# 7298 ashlsi3+1 + comb,>>= %r7,%r19,L$0801 ;# 7306 bleu+1 + stw %r19,4(%r5) ;# 7300 reload_outsi+2/6 + stw %r7,4(%r5) ;# 7309 reload_outsi+2/6 +L$0801 + ldw 0(%r5),%r26 ;# 7316 reload_outsi+2/5 + .CALL ARGW0=GR,ARGW1=GR + bl realloc,%r2 ;# 7320 call_value_internal_symref + ldw 4(%r5),%r25 ;# 7318 reload_outsi+2/5 + comiclr,<> 0,%r28,%r0 ;# 7328 bleu+1 + bl L$0953,%r0 + stw %r28,0(%r5) ;# 7324 reload_outsi+2/6 + comb,= %r28,%r4,L$0794 ;# 7338 bleu+1 + sub %r6,%r4,%r19 ;# 7340 subsi3/1 + addl %r28,%r19,%r6 ;# 7343 addsi3/1 + sub %r12,%r4,%r19 ;# 7344 subsi3/1 + comib,= 0,%r10,L$0804 ;# 7349 bleu+1 + addl %r28,%r19,%r12 ;# 7347 addsi3/1 + sub %r10,%r4,%r19 ;# 7350 subsi3/1 + addl %r28,%r19,%r10 ;# 7353 addsi3/1 +L$0804 + comib,= 0,%r8,L$0805 ;# 7356 bleu+1 + sub %r8,%r4,%r19 ;# 7357 subsi3/1 + addl %r28,%r19,%r8 ;# 7360 addsi3/1 +L$0805 + comib,= 0,%r9,L$0794 ;# 7363 bleu+1 + sub %r9,%r4,%r19 ;# 7364 subsi3/1 + addl %r28,%r19,%r9 ;# 7367 addsi3/1 +L$0794 + ldw 0(%r5),%r4 ;# 7268 reload_outsi+2/5 + ldw 4(%r5),%r20 ;# 7272 reload_outsi+2/5 + sub %r6,%r4,%r19 ;# 7269 subsi3/1 + ldo 2(%r19),%r19 ;# 7270 addsi3/2 + comb,<< %r20,%r19,L$0796 + nop ;# 7274 bleu+1 +L$0795 + ldi 7,%r19 ;# 7389 movqi+1/2 + stbs,ma %r19,1(%r6) ;# 7390 movqi+1/6 + bl L$0043,%r0 ;# 7405 jump + stbs,ma %r3,1(%r6) ;# 7393 movqi+1/6 +L$0811 + bb,< %r15,30,L$0104 + nop ;# 7414 bleu+3 +L$0397 + comib,= 0,%r14,L$0815 ;# 7429 bleu+1 + addl %r14,%r7,%r19 ;# 7430 addsi3/1 + bl L$0816,%r0 ;# 7434 jump + ldb 0(%r19),%r19 ;# 7433 zero_extendqisi2/2 +L$0815 + copy %r7,%r19 ;# 7438 reload_outsi+2/1 +L$0816 + copy %r19,%r7 ;# 7441 reload_outsi+2/1 +L$0076 + comib,=,n 0,%r9,L$0820 ;# 7460 bleu+1 + ldb 0(%r9),%r20 ;# 7463 zero_extendqisi2/2 + addl %r9,%r20,%r19 ;# 7464 addsi3/1 + ldo 1(%r19),%r19 ;# 7465 addsi3/2 + comb,<> %r6,%r19,L$0820 ;# 7467 bleu+1 + ldi 255,%r19 ;# 7472 reload_outsi+2/2 + comb,= %r19,%r20,L$0820 ;# 7474 bleu+1 + ldw -296(%r30),%r21 ;# 7476 reload_outsi+2/5 + ldb 0(%r21),%r19 ;# 7478 movqi+1/5 + extrs %r19,31,8,%r20 ;# 7479 extendqisi2 + ldi 42,%r19 ;# 7481 reload_outsi+2/2 + comb,= %r19,%r20,L$0820 ;# 7483 bleu+1 + ldi 94,%r19 ;# 7490 reload_outsi+2/2 + comb,=,n %r19,%r20,L$0820 ;# 7492 bleu+1 + bb,>= %r15,30,L$0821 ;# 7497 movsi-4 + ldi 92,%r19 ;# 7504 reload_outsi+2/2 + comb,<>,n %r19,%r20,L$0822 ;# 7506 bleu+1 + ldb 1(%r21),%r19 ;# 7510 movqi+1/5 + extrs %r19,31,8,%r20 ;# 7511 extendqisi2 +L$0821 + ldi 43,%r19 ;# 7534 reload_outsi+2/2 + comb,= %r19,%r20,L$0820 ;# 7536 bleu+1 + ldi 63,%r19 ;# 7543 reload_outsi+2/2 + comb,=,n %r19,%r20,L$0820 ;# 7545 bleu+1 +L$0822 + bb,>=,n %r15,22,L$0819 ;# 7553 movsi-4 + bb,>= %r15,19,L$0823 ;# 7558 movsi-4 + ldw -296(%r30),%r19 ;# 7560 reload_outsi+2/5 + ldb 0(%r19),%r19 ;# 7562 movqi+1/5 + ldi 123,%r20 ;# 7565 reload_outsi+2/2 + extrs %r19,31,8,%r19 ;# 7563 extendqisi2 + comb,=,n %r20,%r19,L$0820 ;# 7567 bleu+1 + ldw 0(%r5),%r4 ;# 8228 reload_outsi+2/5 + bl,n L$1177,%r0 ;# 7568 jump +L$0823 + ldw -296(%r30),%r21 ;# 7572 reload_outsi+2/5 + ldb 0(%r21),%r19 ;# 7574 movqi+1/5 + ldi 92,%r20 ;# 7577 reload_outsi+2/2 + extrs %r19,31,8,%r19 ;# 7575 extendqisi2 + comb,<>,n %r20,%r19,L$0819 ;# 7579 bleu+1 + ldb 1(%r21),%r19 ;# 7583 movqi+1/5 + ldi 123,%r20 ;# 7586 reload_outsi+2/2 + extrs %r19,31,8,%r19 ;# 7584 extendqisi2 + comb,<>,n %r20,%r19,L$0819 ;# 7588 bleu+1 +L$0820 + ldw 0(%r5),%r4 ;# 8220 reload_outsi+2/5 + ldw 4(%r5),%r20 ;# 8223 reload_outsi+2/5 + sub %r6,%r4,%r19 ;# 8221 subsi3/1 + ldo 2(%r19),%r19 ;# 8222 addsi3/2 + comb,>>= %r20,%r19,L$0829 ;# 8224 bleu+1 + copy %r6,%r8 ;# 7596 reload_outsi+2/1 + ldil L'65536,%r3 ;# 8551 reload_outsi+2/3 +L$0830 + comb,= %r3,%r20,L$0944 ;# 7624 bleu+1 + zdep %r20,30,31,%r19 ;# 7634 ashlsi3+1 + comb,>>= %r3,%r19,L$0835 ;# 7642 bleu+1 + stw %r19,4(%r5) ;# 7636 reload_outsi+2/6 + stw %r3,4(%r5) ;# 7645 reload_outsi+2/6 +L$0835 + ldw 0(%r5),%r26 ;# 7652 reload_outsi+2/5 + .CALL ARGW0=GR,ARGW1=GR + bl realloc,%r2 ;# 7656 call_value_internal_symref + ldw 4(%r5),%r25 ;# 7654 reload_outsi+2/5 + comiclr,<> 0,%r28,%r0 ;# 7664 bleu+1 + bl L$0953,%r0 + stw %r28,0(%r5) ;# 7660 reload_outsi+2/6 + comb,= %r28,%r4,L$0828 ;# 7674 bleu+1 + sub %r6,%r4,%r19 ;# 7676 subsi3/1 + addl %r28,%r19,%r6 ;# 7679 addsi3/1 + sub %r12,%r4,%r19 ;# 7680 subsi3/1 + comib,= 0,%r10,L$0838 ;# 7685 bleu+1 + addl %r28,%r19,%r12 ;# 7683 addsi3/1 + sub %r10,%r4,%r19 ;# 7686 subsi3/1 + addl %r28,%r19,%r10 ;# 7689 addsi3/1 +L$0838 + comib,= 0,%r8,L$0839 ;# 7692 bleu+1 + sub %r8,%r4,%r19 ;# 7693 subsi3/1 + addl %r28,%r19,%r8 ;# 7696 addsi3/1 +L$0839 + comib,= 0,%r9,L$0828 ;# 7699 bleu+1 + sub %r9,%r4,%r19 ;# 7700 subsi3/1 + addl %r28,%r19,%r9 ;# 7703 addsi3/1 +L$0828 + ldw 0(%r5),%r4 ;# 7604 reload_outsi+2/5 + ldw 4(%r5),%r20 ;# 7608 reload_outsi+2/5 + sub %r6,%r4,%r19 ;# 7605 subsi3/1 + ldo 2(%r19),%r19 ;# 7606 addsi3/2 + comb,<< %r20,%r19,L$0830 + nop ;# 7610 bleu+1 +L$0829 + ldi 1,%r19 ;# 7725 movqi+1/2 + stbs,ma %r19,1(%r6) ;# 7726 movqi+1/6 + stbs,ma %r0,1(%r6) ;# 7729 movqi+1/6 + ldo -1(%r6),%r9 ;# 7741 addsi3/2 +L$0819 + ldw 0(%r5),%r4 ;# 8228 reload_outsi+2/5 +L$1177 + ldw 4(%r5),%r20 ;# 8231 reload_outsi+2/5 + sub %r6,%r4,%r19 ;# 8229 subsi3/1 + ldo 1(%r19),%r19 ;# 8230 addsi3/2 + comb,>>=,n %r20,%r19,L$0848 ;# 8232 bleu+1 + ldil L'65536,%r3 ;# 8549 reload_outsi+2/3 +L$0849 + comb,= %r3,%r20,L$0944 ;# 7771 bleu+1 + zdep %r20,30,31,%r19 ;# 7781 ashlsi3+1 + comb,>>= %r3,%r19,L$0854 ;# 7789 bleu+1 + stw %r19,4(%r5) ;# 7783 reload_outsi+2/6 + stw %r3,4(%r5) ;# 7792 reload_outsi+2/6 +L$0854 + ldw 0(%r5),%r26 ;# 7799 reload_outsi+2/5 + .CALL ARGW0=GR,ARGW1=GR + bl realloc,%r2 ;# 7803 call_value_internal_symref + ldw 4(%r5),%r25 ;# 7801 reload_outsi+2/5 + comiclr,<> 0,%r28,%r0 ;# 7811 bleu+1 + bl L$0953,%r0 + stw %r28,0(%r5) ;# 7807 reload_outsi+2/6 + comb,= %r28,%r4,L$0847 ;# 7821 bleu+1 + sub %r6,%r4,%r19 ;# 7823 subsi3/1 + addl %r28,%r19,%r6 ;# 7826 addsi3/1 + sub %r12,%r4,%r19 ;# 7827 subsi3/1 + comib,= 0,%r10,L$0857 ;# 7832 bleu+1 + addl %r28,%r19,%r12 ;# 7830 addsi3/1 + sub %r10,%r4,%r19 ;# 7833 subsi3/1 + addl %r28,%r19,%r10 ;# 7836 addsi3/1 +L$0857 + comib,= 0,%r8,L$0858 ;# 7839 bleu+1 + sub %r8,%r4,%r19 ;# 7840 subsi3/1 + addl %r28,%r19,%r8 ;# 7843 addsi3/1 +L$0858 + comib,= 0,%r9,L$0847 ;# 7846 bleu+1 + sub %r9,%r4,%r19 ;# 7847 subsi3/1 + addl %r28,%r19,%r9 ;# 7850 addsi3/1 +L$0847 + ldw 0(%r5),%r4 ;# 7751 reload_outsi+2/5 + ldw 4(%r5),%r20 ;# 7755 reload_outsi+2/5 + sub %r6,%r4,%r19 ;# 7752 subsi3/1 + ldo 1(%r19),%r19 ;# 7753 addsi3/2 + comb,<< %r20,%r19,L$0849 + nop ;# 7757 bleu+1 +L$0848 + stbs,ma %r7,1(%r6) ;# 7872 movqi+1/6 + ldb 0(%r9),%r19 ;# 7885 movqi+1/5 + ldo 1(%r19),%r19 ;# 7888 addsi3/2 + stb %r19,0(%r9) ;# 7890 movqi+1/6 +L$0043 + ldw -296(%r30),%r19 ;# 2328 reload_outsi+2/5 +L$1161 + comclr,= %r16,%r19,%r0 ;# 258 bleu+1 + bl L$1178,%r0 + ldw -296(%r30),%r19 ;# 2334 reload_outsi+2/5 +L$0044 + comib,= 0,%r10,L$0865 ;# 7913 bleu+1 + ldi 13,%r26 ;# 7918 reload_outsi+2/2 + copy %r10,%r25 ;# 7920 reload_outsi+2/1 + sub %r6,%r25,%r24 ;# 7915 subsi3/1 + .CALL ARGW0=GR,ARGW1=GR,ARGW2=GR + bl store_op1,%r2 ;# 7924 call_internal_symref + ldo -3(%r24),%r24 ;# 7922 addsi3/2 +L$0865 + ldw -304(%r30),%r19 ;# 7928 reload_outsi+2/5 + comib,<>,n 0,%r19,L$0866 ;# 7930 bleu+1 + .CALL ARGW0=GR + bl free,%r2 ;# 7946 call_internal_symref + ldw -312(%r30),%r26 ;# 7944 reload_outsi+2/5 + ldw 0(%r5),%r19 ;# 7949 reload_outsi+2/5 + ldi 0,%r28 ;# 7955 reload_outsi+2/2 + sub %r6,%r19,%r19 ;# 7950 subsi3/1 + bl L$0867,%r0 ;# 7957 jump + stw %r19,8(%r5) ;# 7952 reload_outsi+2/6 +L$0895 + .CALL ARGW0=GR + bl free,%r2 ;# 2269 call_internal_symref + ldw -312(%r30),%r26 ;# 2267 reload_outsi+2/5 + bl L$0867,%r0 ;# 2273 jump + ldi 11,%r28 ;# 2271 reload_outsi+2/2 +L$0900 + .CALL ARGW0=GR + bl free,%r2 ;# 3161 call_internal_symref + ldw -312(%r30),%r26 ;# 3159 reload_outsi+2/5 + bl L$0867,%r0 ;# 3165 jump + ldi 4,%r28 ;# 3163 reload_outsi+2/2 +L$0902 + .CALL ARGW0=GR + bl free,%r2 ;# 3218 call_internal_symref + ldw -312(%r30),%r26 ;# 3216 reload_outsi+2/5 + bl L$0867,%r0 ;# 3222 jump + ldi 7,%r28 ;# 3220 reload_outsi+2/2 +L$0903 + .CALL ARGW0=GR + bl free,%r2 ;# 3803 call_internal_symref + ldw -312(%r30),%r26 ;# 3801 reload_outsi+2/5 + bl L$0867,%r0 ;# 3807 jump + ldi 5,%r28 ;# 3805 reload_outsi+2/2 +L$0915 + .CALL ARGW0=GR + bl free,%r2 ;# 5461 call_internal_symref + ldw -312(%r30),%r26 ;# 5459 reload_outsi+2/5 + bl L$0867,%r0 ;# 5465 jump + ldi 9,%r28 ;# 5463 reload_outsi+2/2 +L$0917 + .CALL ARGW0=GR + bl free,%r2 ;# 5557 call_internal_symref + ldw -312(%r30),%r26 ;# 5555 reload_outsi+2/5 + bl L$0867,%r0 ;# 5561 jump + ldi 13,%r28 ;# 5559 reload_outsi+2/2 +L$0922 + bl L$0867,%r0 ;# 5983 jump + ldi 14,%r28 ;# 5981 reload_outsi+2/2 +L$0939 + .CALL ARGW0=GR + bl free,%r2 ;# 7235 call_internal_symref + ldw -312(%r30),%r26 ;# 7233 reload_outsi+2/5 + bl L$0867,%r0 ;# 7239 jump + ldi 6,%r28 ;# 7237 reload_outsi+2/2 +L$0944 + bl L$0867,%r0 ;# 7775 jump + ldi 15,%r28 ;# 7773 reload_outsi+2/2 +L$0866 + .CALL ARGW0=GR + bl free,%r2 ;# 7935 call_internal_symref + ldw -312(%r30),%r26 ;# 7933 reload_outsi+2/5 + ldi 8,%r28 ;# 7937 reload_outsi+2/2 +L$0867 + ldw -340(%r30),%r2 ;# 9026 reload_outsi+2/5 + ldw -168(%r30),%r18 ;# 9028 reload_outsi+2/5 + ldw -164(%r30),%r17 ;# 9030 reload_outsi+2/5 + ldw -160(%r30),%r16 ;# 9032 reload_outsi+2/5 + ldw -156(%r30),%r15 ;# 9034 reload_outsi+2/5 + ldw -152(%r30),%r14 ;# 9036 reload_outsi+2/5 + ldw -148(%r30),%r13 ;# 9038 reload_outsi+2/5 + ldw -144(%r30),%r12 ;# 9040 reload_outsi+2/5 + ldw -140(%r30),%r11 ;# 9042 reload_outsi+2/5 + ldw -136(%r30),%r10 ;# 9044 reload_outsi+2/5 + ldw -132(%r30),%r9 ;# 9046 reload_outsi+2/5 + ldw -128(%r30),%r8 ;# 9048 reload_outsi+2/5 + ldw -124(%r30),%r7 ;# 9050 reload_outsi+2/5 + ldw -120(%r30),%r6 ;# 9052 reload_outsi+2/5 + ldw -116(%r30),%r5 ;# 9054 reload_outsi+2/5 + ldw -112(%r30),%r4 ;# 9056 reload_outsi+2/5 + ldw -108(%r30),%r3 ;# 9058 reload_outsi+2/5 + bv %r0(%r2) ;# 9061 return_internal + ldo -320(%r30),%r30 ;# 9060 addsi3/2 + .EXIT + .PROCEND + .SPACE $PRIVATE$ + .SUBSPA $BSS$ + + .align 1 +re_syntax_table + .block 256 diff --git a/gas/testsuite/gas/hppa/unsorted/common.s b/gas/testsuite/gas/hppa/unsorted/common.s new file mode 100644 index 0000000..d92b0cb --- /dev/null +++ b/gas/testsuite/gas/hppa/unsorted/common.s @@ -0,0 +1,8 @@ + .text +text_symbol: + .long 1 + .long external_symbol + .data +data_symbol: + .long 2 +common_symbol .comm 4 diff --git a/gas/testsuite/gas/hppa/unsorted/fragbug.s b/gas/testsuite/gas/hppa/unsorted/fragbug.s new file mode 100644 index 0000000..5734193 --- /dev/null +++ b/gas/testsuite/gas/hppa/unsorted/fragbug.s @@ -0,0 +1,3 @@ + .SPACE $TEXT$ + .SUBSPA $CODE$ + nop diff --git a/gas/testsuite/gas/hppa/unsorted/globalbug.s b/gas/testsuite/gas/hppa/unsorted/globalbug.s new file mode 100644 index 0000000..d0f05f6 --- /dev/null +++ b/gas/testsuite/gas/hppa/unsorted/globalbug.s @@ -0,0 +1,16 @@ + + .space $PRIVATE$ + .subspa $GLOBAL$ + .export $global$ +$global$ + .space $TEXT$ + .subspa $CODE$ + + .proc + .callinfo +ivaaddr + nop + nop + addil L%ivaaddr-$global$,%dp + ldo R%ivaaddr-$global$(%r1),%r19 + .procend diff --git a/gas/testsuite/gas/hppa/unsorted/importbug.s b/gas/testsuite/gas/hppa/unsorted/importbug.s new file mode 100644 index 0000000..104afb6 --- /dev/null +++ b/gas/testsuite/gas/hppa/unsorted/importbug.s @@ -0,0 +1,42 @@ + .SPACE $PRIVATE$ + .SUBSPA $DATA$,QUAD=1,ALIGN=8,ACCESS=31 + .SUBSPA $BSS$,QUAD=1,ALIGN=8,ACCESS=31,ZERO,SORT=82 + .SPACE $TEXT$ + .SUBSPA $LIT$,QUAD=0,ALIGN=8,ACCESS=44 + .SUBSPA $CODE$,QUAD=0,ALIGN=8,ACCESS=44,CODE_ONLY + .IMPORT $global$,DATA + .IMPORT $$dyncall,MILLICODE +; gcc_compiled.: + .EXPORT foo,DATA + .SPACE $PRIVATE$ + .SUBSPA $DATA$ + + .align 4 +foo: + .word 0 + .IMPORT __main,CODE + .SPACE $TEXT$ + .SUBSPA $CODE$ + + .align 4 + .EXPORT main,CODE + .EXPORT main,ENTRY,PRIV_LEV=3,RTNVAL=GR +main: + .PROC + .CALLINFO FRAME=64,CALLS,SAVE_RP,SAVE_SP,ENTRY_GR=3 + .ENTRY + .import foo + stw %r2,-20(0,%r30) + copy %r3,%r1 + copy %r30,%r3 + stwm %r1,64(%r30) + .CALL + bl __main,%r2 + nop +L$0001: + ldw -20(%r3),%r2 + ldo 64(%r3),%r30 + ldwm -64(%r30),%r3 + bv,n %r0(%r2) + .EXIT + .PROCEND diff --git a/gas/testsuite/gas/hppa/unsorted/labeldiffs.s b/gas/testsuite/gas/hppa/unsorted/labeldiffs.s new file mode 100644 index 0000000..6ee66f9 --- /dev/null +++ b/gas/testsuite/gas/hppa/unsorted/labeldiffs.s @@ -0,0 +1,40 @@ +; Should check to make sure something useful gets put on those .word +; statements. + .space $TEXT$ + .subspa $CODE$ + + .align 8 + .export icode,data +icode: + .proc + .callinfo frame=0,no_calls + .entry + bv,n %r0(%r2) + .exit + nop + .procend + + ; + ; FIRST, argv array of pointers to args, 1st is same as path. + ; + .align 8 +ic_argv: + .word ic_argv1-icode ; second, pointer to 1st argument + .word ic_path-icode ; first, pointer to init path + .word 0 ; fourth, NULL argv terminator (pad) + .word 0 ; third, NULL argv terminator + +ic_path: + .blockz 4096 ; must be multiple of 4 bytes + .word 0 ; in case full string is used + .word 0 ; this will be the string terminator + +ic_argv1: + .blockz 4096 ; must be multiple of 4 bytes + .word 0 ; in case full string is used + .word 0 ; this will be the string terminator + + .export szicode,data +szicode: + .word szicode-icode + .word 0 ; must have at least one filler at end diff --git a/gas/testsuite/gas/hppa/unsorted/locallabel.s b/gas/testsuite/gas/hppa/unsorted/locallabel.s new file mode 100644 index 0000000..7d5721e --- /dev/null +++ b/gas/testsuite/gas/hppa/unsorted/locallabel.s @@ -0,0 +1,15 @@ + .SPACE $PRIVATE$ + .SUBSPA $DATA$,QUAD=1,ALIGN=8,ACCESS=31 + .SUBSPA $BSS$,QUAD=1,ALIGN=8,ACCESS=31,ZERO,SORT=82 + .SPACE $TEXT$ + .SUBSPA $LIT$,QUAD=0,ALIGN=8,ACCESS=44 + .SUBSPA $CODE$,QUAD=0,ALIGN=8,ACCESS=44,CODE_ONLY + + .SPACE $TEXT$ + .SUBSPA $CODE$ + + .align 4 + +Label: +L$01234: + diff --git a/gas/testsuite/gas/hppa/unsorted/ss_align.s b/gas/testsuite/gas/hppa/unsorted/ss_align.s new file mode 100644 index 0000000..6e98eb2 --- /dev/null +++ b/gas/testsuite/gas/hppa/unsorted/ss_align.s @@ -0,0 +1,12 @@ + .SPACE $PRIVATE$ + .SUBSPA $DATA$,QUAD=1,ALIGN=64,ACCESS=31 + .SPACE $TEXT$ + .SUBSPA $LIT$,QUAD=0,ALIGN=8,ACCESS=44 + .SUBSPA $CODE$,QUAD=0,ALIGN=8,ACCESS=44,CODE_ONLY + .IMPORT $global$,DATA + .IMPORT $$dyncall,MILLICODE +; gcc_compiled.: + .SPACE $PRIVATE$ + .SUBSPA $DATA$ +sym1: .WORD 2 + diff --git a/gas/testsuite/gas/hppa/unsorted/unsorted.exp b/gas/testsuite/gas/hppa/unsorted/unsorted.exp new file mode 100644 index 0000000..31300c7 --- /dev/null +++ b/gas/testsuite/gas/hppa/unsorted/unsorted.exp @@ -0,0 +1,258 @@ +# Copyright (C) 1993, 1997 Free Software Foundation, Inc. + +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; either version 2 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + +# Please email any bugs, comments, and/or additions to this file to: +# DejaGnu@cygnus.com + +# Written by the Center for Software Science at the University of Utah +# and by Cygnus Support. + +proc do_subspace_align_test {} { + set testname "ss_align.s: Test subspace alignment (part 2)" + set x 0 + + if [gas_test_old "ss_align.s" "" "subspace alignment (part 1)"] then { + objdump_start_no_subdir "a.out" "-h" + + # Check the headers for the correct alignment value for the + # .data section (elf) or the $DATA$ subspace (som). + if [istarget hppa*-*-*elf*] then { + while 1 { + expect { + -re "data\[^\n\]* 2..6\[^\n\]*\n" { set x 1 } + -re "\[^\n\]*\n" { } + timeout { perror "timeout\n"; break } + eof { break } + } + } + } else { + while 1 { + expect { + -re "DATA\[^\n\]* 2..6\[^\n\]*\n" { set x 1 } + -re "\[^\n\]*\n" { } + timeout { perror "timeout\n"; break } + eof { break } + } + } + } + + # This was intended to do any cleanup necessary. It kinda looks like it + # isn't needed, but just in case, please keep it in for now. + objdump_finish + + # Did we find what we were looking for? If not, flunk it. + if [expr $x==1] then { pass $testname } else { fail $testname } + } +} + +proc do_local_label_test {} { + set testname "locallabel.s: Elimination of local labels (part 2)" + set x 0 + + if [gas_test_old "locallabel.s" "" "Elimination of local labels (part1)"] { + objdump_start_no_subdir "a.out" "-t" + + while 1 { + expect { + -re "^00000000\[^\n\]*Label\[^\n\]*\n" { set x 1 } + -re "^00000000\[^\n\]*L\$01234\[^\n\]*\n" { set x 0 } + -re "\[^\n\]*\n" { } + timeout { perror "timeout\n"; break } + eof { break } + } + } + + # This was intended to do any cleanup necessary. It kinda looks like it + # isn't needed, but just in case, please keep it in for now. + objdump_finish + + # Did we find what we were looking for? If not, flunk it. + if [expr $x==1] then { pass $testname } else { fail $testname } + } +} + +proc do_frchain_test {} { + set testname "fragbug.s: Test bug in frag chaining (part 2)" + set x 0 + + if [gas_test_old "fragbug.s" "" "Test bug in frag chaining (part1)"] { + objdump_start_no_subdir "a.out" "--prefix-addresses -d" + + while 1 { + expect { + -re "^0x00000000\[^\n\]*nop\[^\n\]*\n" { set x 1 } + -re "^0x00000004\[^\n\]*nop\[^\n\]*\n" { set x 0 } + -re "\[^\n\]*\n" { } + timeout { perror "timeout\n"; break } + eof { break } + } + } + + # This was intended to do any cleanup necessary. It kinda looks like it + # isn't needed, but just in case, please keep it in for now. + objdump_finish + + # Did we find what we were looking for? If not, flunk it. + if [expr $x==1] then { pass $testname } else { fail $testname } + } +} + +proc do_align3_test {} { + set testname "align3.s: Test for alignment bug when switching subspaces (part2)" + set x 0 + + if [gas_test_old "align3.s" "" "Test for alignment bug when switching subspaces (part1)"] { + objdump_start_no_subdir "a.out" "--prefix-addresses -d" + + while 1 { + expect { + -re "\[^\n\]* <main> nop\[^\n\]*\n" { set x 1 } + -re "\[^\n\]* <.*end_main> nop\[^\n\]*\n" { set x 1 } + -re "\[^\n\]* <main+.*> nop\[^\n\]*\n" { set x 0 } + -re "\[^\n\]*\n" { } + timeout { perror "timeout\n"; break } + eof { break } + } + } + + # This was intended to do any cleanup necessary. It kinda looks like it + # isn't needed, but just in case, please keep it in for now. + objdump_finish + + # Did we find what we were looking for? If not, flunk it. + if [expr $x==1] then { pass $testname } else { fail $testname } + } +} + +proc do_align4_test {} { + set testname "align4.s: More subspace alignment tests (part2)" + set x 0 + + if [istarget hppa*-*-*elf*] then { + return + } + + if [gas_test_old "align4.s" "" "More subspace alignment tests (part1)"] { + objdump_start_no_subdir "a.out" "-h" + + while 1 { + expect { + -re "\[^\n\]*MILLICODE\[^\n\]*2..6\[^\n\]*\n" + { set x [expr $x+1] } + -re "\[^\n\]*YABBA\[^\n\]*2..3\[^\n\]*\n" + { set x [expr $x+1] } + timeout { perror "timeout\n"; break } + eof { break } + } + } + + # This was intended to do any cleanup necessary. It kinda looks like it + # isn't needed, but just in case, please keep it in for now. + objdump_finish + + # Did we find what we were looking for? If not, flunk it. + if [expr $x==2] then { pass $testname } else { fail $testname } + } +} + +proc do_import_test {} { + set testname "importbug.s: Test for bug in .import directive (part2)" + set x 0 + + if [gas_test_old "importbug.s" "" "Test for bug in .import directive (part1)"] { + objdump_start_no_subdir "a.out" "--syms" + + while 1 { + expect { + -re "\[^\n\]*.DATA..foo\[^\n\]*\n" { set x 1 } + -re "\[^\n\]*.data.*foo\[^\n\]*\n" { set x 1 } + -re "\[^\n\]*\n" { } + timeout { perror "timeout\n"; break } + eof { break } + } + } + + # This was intended to do any cleanup necessary. It kinda looks like it + # isn't needed, but just in case, please keep it in for now. + objdump_finish + + # Did we find what we were looking for? If not, flunk it. + if [expr $x==1] then { pass $testname } else { fail $testname } + } +} + +proc do_common_test {} { + set testname "common.s: Test for bug in .comm handling (part2)" + set x 0 + + if [gas_test_old "common.s" "" "Test for bug in .comm handling (part1)"] { + objdump_start_no_subdir "a.out" "--syms" + + while 1 { + expect { + -re "\[^\n\]*.COM.*common_symbol\[^\n\]*\n" { set x 1 } + -re "\[^\n\]*\n" { } + timeout { perror "timeout\n"; break } + eof { break } + } + } + + # This was intended to do any cleanup necessary. It kinda looks like it + # isn't needed, but just in case, please keep it in for now. + objdump_finish + + # Did we find what we were looking for? If not, flunk it. + if [expr $x==1] then { pass $testname } else { fail $testname } + } +} + +if [istarget hppa*-*-*] then { + # Make sure subspace alignment requests from the subspace directives + # are honored + do_subspace_align_test + + # Make sure the correct labels end up in the symbol table + do_local_label_test + + # GAS-1.36 choked on this file. + gas_test "labeldiffs.s" "" "" "Difference of labels" + + # Test a recent bug where frag chaining wasn't working correctly. + do_frchain_test + + # Test bug where switching between subspaces creates bogus alignments + do_align3_test + + # Test bug where switching between subspaces creates bogus alignments + do_align4_test + + # Test a problem where $global$ is defined, then used within the + # same source file. + setup_xfail hppa*-*-* + gas_test "globalbug.s" "" "" "Use \$global\$ in file which defines it" + + # Test that importing a defined symbol doesn't screw up the symbol's + # space/subspace. + do_import_test + + # Test for a buglet in the handling of common symbols + do_common_test + + # Test for an off-by-2 bug in range check for conditional branches + gas_test_error "brlenbug.s" "" "Check for error(s) in branch length" + +} + diff --git a/gas/testsuite/gas/i386/amd.d b/gas/testsuite/gas/i386/amd.d new file mode 100644 index 0000000..2fe8b0e --- /dev/null +++ b/gas/testsuite/gas/i386/amd.d @@ -0,0 +1,37 @@ +#objdump: -dw +#name: i386 amd + +.*: +file format .* + +Disassembly of section .text: + +0+000 <.text>: + 0: 0f 0d 03 [ ]*prefetch \(%ebx\) + 3: 0f 0d 0c 75 00 10 00 00 [ ]*prefetchw 0x1000\(,%esi,2\) + b: 0f 0e [ ]*femms + d: 0f 0f 00 bf [ ]*pavgusb \(%eax\),%mm0 + 11: 0f 0f 48 02 1d [ ]*pf2id 0x2\(%eax\),%mm1 + 16: 0f 0f 90 00 01 00 00 ae [ ]*pfacc 0x100\(%eax\),%mm2 + 1e: 0f 0f 1e 9e [ ]*pfadd \(%esi\),%mm3 + 22: 0f 0f 66 02 b0 [ ]*pfcmpeq 0x2\(%esi\),%mm4 + 27: 0f 0f ae 90 90 00 00 90 [ ]*pfcmpge 0x9090\(%esi\),%mm5 + 2f: 0f 0f 74 75 00 a0 [ ]*pfcmpgt 0x0\(%ebp,%esi,2\),%mm6 + 35: 0f 0f 7c 75 02 a4 [ ]*pfmax 0x2\(%ebp,%esi,2\),%mm7 + 3b: 0f 0f 84 75 90 90 90 90 94 [ ]*pfmin 0x90909090\(%ebp,%esi,2\),%mm0 + 44: 0f 0f 0d 04 00 00 00 b4 [ ]*pfmul 0x4,%mm1 + 4c: 2e 0f 0f 54 c3 07 96 [ ]*pfrcp %cs:0x7\(%ebx,%eax,8\),%mm2 + 53: 0f 0f d8 a6 [ ]*pfrcpit1 %mm0,%mm3 + 57: 0f 0f e1 b6 [ ]*pfrcpit2 %mm1,%mm4 + 5b: 0f 0f ea a7 [ ]*pfrsqit1 %mm2,%mm5 + 5f: 0f 0f f3 97 [ ]*pfrsqrt %mm3,%mm6 + 63: 0f 0f fc 9a [ ]*pfsub %mm4,%mm7 + 67: 0f 0f c5 aa [ ]*pfsubr %mm5,%mm0 + 6b: 0f 0f ce 0d [ ]*pi2fd %mm6,%mm1 + 6f: 0f 0f d7 b7 [ ]*pfmulhrw %mm7,%mm2 + 73: 2e 0f [ ]*\(bad\) + 75: 0f 54 [ ]*\(bad\) + 77: c3 [ ]*ret + 78: 07 [ ]*pop %es + 79: c3 [ ]*ret + 7a: 90 [ ]*nop + 7b: 90 [ ]*nop diff --git a/gas/testsuite/gas/i386/amd.s b/gas/testsuite/gas/i386/amd.s new file mode 100644 index 0000000..5e4d581 --- /dev/null +++ b/gas/testsuite/gas/i386/amd.s @@ -0,0 +1,33 @@ +#AMD 3DNow! instructions + +.text + prefetch (%ebx) + prefetchw 0x1000(,%esi,2) + femms + pavgusb (%eax),%mm0 + pf2id 2(%eax),%mm1 + pfacc 0x100(%eax),%mm2 + pfadd (%esi),%mm3 + pfcmpeq 2(%esi),%mm4 + pfcmpge 0x9090(%esi),%mm5 + pfcmpgt (%ebp,%esi,2),%mm6 + pfmax 2(%ebp,%esi,2),%mm7 + pfmin 0x90909090(%ebp,%esi,2),%mm0 + pfmul 4,%mm1 + pfrcp %cs:7(%ebx,%eax,8),%mm2 + pfrcpit1 %mm0,%mm3 + pfrcpit2 %mm1,%mm4 + pfrsqit1 %mm2,%mm5 + pfrsqrt %mm3,%mm6 + pfsub %mm4,%mm7 + pfsubr %mm5,%mm0 + pi2fd %mm6,%mm1 + pmulhrw %mm7,%mm2 + +# This is a 3DNow! instruction, with a prefix, that isn't quite right +# Everything's good bar the opcode suffix +.byte 0x2e, 0x0f, 0x0f, 0x54, 0xc3, 0x07, 0xc3 + +# to make us insensitive to alignment + nop + nop diff --git a/gas/testsuite/gas/i386/float.l b/gas/testsuite/gas/i386/float.l new file mode 100644 index 0000000..6d6cadd --- /dev/null +++ b/gas/testsuite/gas/i386/float.l @@ -0,0 +1,81 @@ +.*: Assembler messages: +.*:3: Warning:.*faddp.* +.*:14: Warning:.*fsubp.* +.*:25: Warning:.*fsubrp.* +.*:36: Warning:.*fmulp.* +.*:47: Warning:.*fdivp.* +.*:58: Warning:.*fdivrp.* + 1 [ ]*.psize 0 + 2 [ ]*.text + 3 0000 DEC1 [ ]*fadd +.*Warning:.*faddp.* + 4 0002 D8C3 [ ]*fadd %st\(3\) + 5 0004 D8C3 [ ]*fadd %st\(3\),%st + 6 0006 DCC3 [ ]*fadd %st,%st\(3\) + 7 0008 D803 [ ]*fadds \(%ebx\) + 8 000a DC03 [ ]*faddl \(%ebx\) + 9 000c DE03 [ ]*fiadds \(%ebx\) + 10 000e DA03 [ ]*fiaddl \(%ebx\) + 11 0010 DEC1 [ ]*faddp + 12 0012 DEC3 [ ]*faddp %st\(3\) + 13 0014 DEC3 [ ]*faddp %st,%st\(3\) + 14 0016 DEE1 [ ]*fsub +.*Warning:.*fsubp.* + 15 0018 D8E3 [ ]*fsub %st\(3\) + 16 001a D8E3 [ ]*fsub %st\(3\),%st + 17 001c DCE3 [ ]*fsub %st,%st\(3\) + 18 001e D823 [ ]*fsubs \(%ebx\) + 19 0020 DC23 [ ]*fsubl \(%ebx\) + 20 0022 DE23 [ ]*fisubs \(%ebx\) + 21 0024 DA23 [ ]*fisubl \(%ebx\) + 22 0026 DEE1 [ ]*fsubp + 23 0028 DEE3 [ ]*fsubp %st\(3\) + 24 002a DEE3 [ ]*fsubp %st,%st\(3\) + 25 002c DEE9 [ ]*fsubr +.*Warning:.*fsubrp.* + 26 002e D8EB [ ]*fsubr %st\(3\) + 27 0030 D8EB [ ]*fsubr %st\(3\),%st + 28 0032 DCEB [ ]*fsubr %st,%st\(3\) + 29 0034 D82B [ ]*fsubrs \(%ebx\) + 30 0036 DC2B [ ]*fsubrl \(%ebx\) + 31 0038 DE2B [ ]*fisubrs \(%ebx\) + 32 003a DA2B [ ]*fisubrl \(%ebx\) + 33 003c DEE9 [ ]*fsubrp + 34 003e DEEB [ ]*fsubrp %st\(3\) + 35 0040 DEEB [ ]*fsubrp %st,%st\(3\) + 36 0042 DEC9 [ ]*fmul +.*Warning:.*fmulp.* + 37 0044 D8CB [ ]*fmul %st\(3\) + 38 0046 D8CB [ ]*fmul %st\(3\),%st + 39 0048 DCCB [ ]*fmul %st,%st\(3\) + 40 004a D80B [ ]*fmuls \(%ebx\) + 41 004c DC0B [ ]*fmull \(%ebx\) + 42 004e DE0B [ ]*fimuls \(%ebx\) + 43 0050 DA0B [ ]*fimull \(%ebx\) + 44 0052 DEC9 [ ]*fmulp + 45 0054 DECB [ ]*fmulp %st\(3\) + 46 0056 DECB [ ]*fmulp %st,%st\(3\) + 47 0058 DEF1 [ ]*fdiv +.*Warning:.*fdivp.* + 48 005a D8F3 [ ]*fdiv %st\(3\) + 49 005c D8F3 [ ]*fdiv %st\(3\),%st + 50 005e DCF3 [ ]*fdiv %st,%st\(3\) + 51 0060 D833 [ ]*fdivs \(%ebx\) + 52 0062 DC33 [ ]*fdivl \(%ebx\) + 53 0064 DE33 [ ]*fidivs \(%ebx\) + 54 0066 DA33 [ ]*fidivl \(%ebx\) + 55 0068 DEF1 [ ]*fdivp + 56 006a DEF3 [ ]*fdivp %st\(3\) + 57 006c DEF3 [ ]*fdivp %st,%st\(3\) + 58 006e DEF9 [ ]*fdivr +.*Warning:.*fdivrp.* + 59 0070 D8FB [ ]*fdivr %st\(3\) + 60 0072 D8FB [ ]*fdivr %st\(3\),%st + 61 0074 DCFB [ ]*fdivr %st,%st\(3\) + 62 0076 D83B [ ]*fdivrs \(%ebx\) + 63 0078 DC3B [ ]*fdivrl \(%ebx\) + 64 007a DE3B [ ]*fidivrs \(%ebx\) + 65 007c DA3B [ ]*fidivrl \(%ebx\) + 66 007e DEF9 [ ]*fdivrp + 67 0080 DEFB [ ]*fdivrp %st\(3\) + 68 0082 DEFB [ ]*fdivrp %st,%st\(3\) diff --git a/gas/testsuite/gas/i386/float.s b/gas/testsuite/gas/i386/float.s new file mode 100644 index 0000000..6bb09f8 --- /dev/null +++ b/gas/testsuite/gas/i386/float.s @@ -0,0 +1,68 @@ +.psize 0 +.text + fadd + fadd %st(3) + fadd %st(3),%st + fadd %st,%st(3) + fadds (%ebx) + faddl (%ebx) + fiadds (%ebx) + fiaddl (%ebx) + faddp + faddp %st(3) + faddp %st,%st(3) + fsub + fsub %st(3) + fsub %st(3),%st + fsub %st,%st(3) + fsubs (%ebx) + fsubl (%ebx) + fisubs (%ebx) + fisubl (%ebx) + fsubp + fsubp %st(3) + fsubp %st,%st(3) + fsubr + fsubr %st(3) + fsubr %st(3),%st + fsubr %st,%st(3) + fsubrs (%ebx) + fsubrl (%ebx) + fisubrs (%ebx) + fisubrl (%ebx) + fsubrp + fsubrp %st(3) + fsubrp %st,%st(3) + fmul + fmul %st(3) + fmul %st(3),%st + fmul %st,%st(3) + fmuls (%ebx) + fmull (%ebx) + fimuls (%ebx) + fimull (%ebx) + fmulp + fmulp %st(3) + fmulp %st,%st(3) + fdiv + fdiv %st(3) + fdiv %st(3),%st + fdiv %st,%st(3) + fdivs (%ebx) + fdivl (%ebx) + fidivs (%ebx) + fidivl (%ebx) + fdivp + fdivp %st(3) + fdivp %st,%st(3) + fdivr + fdivr %st(3) + fdivr %st(3),%st + fdivr %st,%st(3) + fdivrs (%ebx) + fdivrl (%ebx) + fidivrs (%ebx) + fidivrl (%ebx) + fdivrp + fdivrp %st(3) + fdivrp %st,%st(3) diff --git a/gas/testsuite/gas/i386/general.l b/gas/testsuite/gas/i386/general.l new file mode 100644 index 0000000..a403447 --- /dev/null +++ b/gas/testsuite/gas/i386/general.l @@ -0,0 +1,205 @@ +.*: Assembler messages: +.*:10: Warning:.* +.*:12: Warning:.* +.*:19: Warning:.* +.*:22: Warning:.* +.*:81: Warning:.* +.*:82: Warning:.* +.*:83: Warning:.* +.*:84: Warning:.* +.*:85: Warning:.* +.*:86: Warning:.* +.*:87: Warning:.* +.*:88: Warning:.* +.*:89: Warning:.* +.*:90: Warning:.* +.*:91: Warning:.* +.*:92: Warning:.* +.*:93: Warning:.* +.*:94: Warning:.* +.*:95: Warning:.* +.*:96: Warning:.* +.*:97: Warning:.* +.*:98: Warning:.* +.*:99: Warning:.* +.*:100: Warning:.* +.*:101: Warning:.* +.*:135: Warning:.* + 1 .psize 0 + 2 .text + 3 # test various segment reg insns + 4 0000 1E push %ds + 5 0001 1E pushl %ds + 6 0002 1F pop %ds + 7 0003 1F popl %ds + 8 0004 8CD8 mov %ds,%eax + 9 0006 8CD8 movl %ds,%eax + 10 0008 8CD8 movl %ds,%ax +.*Warning:.* + 11 000a 8ED8 mov %eax,%ds + 12 000c 8ED8 movl %ax,%ds +.*Warning:.* + 13 000e 8ED8 movl %eax,%ds + 14 + 15 0010 661E pushw %ds + 16 0012 661F popw %ds + 17 0014 668CD8 mov %ds,%ax + 18 0017 668CD8 movw %ds,%ax + 19 001a 668CD8 movw %ds,%eax +.*Warning:.* + 20 001d 8ED8 mov %ax,%ds + 21 001f 8ED8 movw %ax,%ds + 22 0021 8ED8 movw %eax,%ds +.*Warning:.* + 23 + 24 # test various pushes + 25 0023 6A0A pushl \$10 + 26 0025 666A0A pushw \$10 + 27 0028 6A0A push \$10 + 28 002a 68E80300 00 pushl \$1000 + 29 002f 6668E803 pushw \$1000 + 30 0033 68E80300 00 push \$1000 + 31 0038 FF355700 0000 pushl 1f + 32 003e 66FF3557 000000 pushw 1f + 33 0045 FF355700 0000 push 1f + 34 004b FFB30C00 0000 push \(1f-.\)\(%ebx\) + 35 0051 FF350600 0000 push 1f-. + 36 # these, and others like them should have no operand size prefix + 37 0057 0F00D1 1: lldt %cx + 38 005a 0F01F0 lmsw %ax + 39 + 40 # Just to make sure these don't become illegal due to over-enthusiastic + 41 # register checking + 42 005d 660FBEF8 movsbw %al,%di + 43 0061 0FBEC8 movsbl %al,%ecx + 44 0064 0FBFC8 movswl %ax,%ecx + 45 0067 660FB6F8 movzbw %al,%di + 46 006b 0FB6C8 movzbl %al,%ecx + 47 006e 0FB7C8 movzwl %ax,%ecx + 48 + 49 0071 EC in %dx,%al + 50 0072 66ED in %dx,%ax + 51 0074 ED in %dx,%eax + 52 0075 EC in \(%dx\),%al + 53 0076 66ED in \(%dx\),%ax + 54 0078 ED in \(%dx\),%eax + 55 0079 EC inb %dx,%al + 56 007a 66ED inw %dx,%ax + 57 007c ED inl %dx,%eax + 58 007d EC inb %dx + 59 007e 66ED inw %dx + 60 0080 ED inl %dx + 61 0081 E4FF inb \$255 + 62 0083 66E502 inw \$2 + 63 0086 E504 inl \$4 + 64 0088 EF outl %eax,%dx + 65 0089 E62A out %al, \$42 + 66 008b 66E50D in \$13, %ax + 67 # These are used in AIX. + 68 008e 66ED inw \(%dx\) + 69 0090 66EF outw \(%dx\) + 70 + 71 0092 A4 movsb + 72 0093 66A7 cmpsw + 73 0095 AF scasl + 74 0096 D7 xlatb + 75 0097 2EA5 movsl %cs:\(%esi\),%es:\(%edi\) + 76 0099 0F9303 setae \(%ebx\) + 77 009c 0F9303 setaeb \(%ebx\) + 78 009f 0F93C0 setae %al + 79 + 80 #these should give warnings + 81 00a2 0C01 orb \$1,%ax +.*Warning:.* + 82 00a4 0C01 orb \$1,%eax +.*Warning:.* + 83 00a6 80CB01 orb \$1,%bx +.*Warning:.* + 84 00a9 80CB01 orb \$1,%ebx +.*Warning:.* + 85 00ac D9C1 fldl %st\(1\) +.*Warning:.* + 86 00ae DDD2 fstl %st\(2\) +.*Warning:.* + 87 00b0 DDDB fstpl %st\(3\) +.*Warning:.* + 88 00b2 D8D4 fcoml %st\(4\) +.*Warning:.* + 89 00b4 D8DD fcompl %st\(5\) +.*Warning:.* + 90 00b6 DEC1 faddp %st\(1\),%st +.*Warning:.* + 91 00b8 DECA fmulp %st\(2\),%st +.*Warning:.* + 92 00ba DEE3 fsubp %st\(3\),%st +.*Warning:.* + 93 00bc DEEC fsubrp %st\(4\),%st +.*Warning:.* + 94 00be DEF5 fdivp %st\(5\),%st +.*Warning:.* + 95 00c0 DEFE fdivrp %st\(6\),%st +.*Warning:.* + 96 00c2 DEC1 fadd +.*Warning:.* + 97 00c4 DEE1 fsub +.*Warning:.* + 98 00c6 DEC9 fmul +.*Warning:.* + 99 00c8 DEF1 fdiv +.*Warning:.* + 100 00ca DEE9 fsubr +.*Warning:.* + 101 00cc DEF9 fdivr +.*Warning:.* + 102 #these should all be legal + 103 00ce 0FA31556 341200 btl %edx, 0x123456 + 104 00d5 0FA3D0 btl %edx, %eax + 105 00d8 0C01 orb \$1,%al + 106 00da 80CB01 orb \$1,%bl + 107 00dd A1110000 00 movl 17,%eax + 108 00e2 A1110000 00 mov 17,%eax + 109 00e7 66ED inw %dx,%ax + 110 00e9 ED inl %dx,%eax + 111 00ea 66ED inw \(%dx\),%ax + 112 00ec ED inl \(%dx\),%eax + 113 00ed EC in \(%dx\),%al + 114 00ee 66ED in \(%dx\),%ax + 115 00f0 ED in \(%dx\),%eax + 116 00f1 0FB61437 movzbl \(%edi,%esi\),%edx + 117 00f5 0FB6451C movzbl 28\(%ebp\),%eax + 118 00f9 0FB6C0 movzbl %al,%eax + 119 00fc 0FB6F1 movzbl %cl,%esi + 120 00ff 26D7 xlat %es:\(%ebx\) + 121 0101 D7 xlat + 122 0102 D7 xlatb + 123 0103 DDD8 1: fstp %st\(0\) + 124 0105 E2FC loop 1b + 125 0107 F6F1 divb %cl + 126 0109 66F7F1 divw %cx + 127 010c F7F1 divl %ecx + 128 010e F6F1 div %cl + 129 0110 66F7F1 div %cx + 130 0113 F7F1 div %ecx + 131 0115 F6F1 div %cl,%al + 132 0117 66F7F1 div %cx,%ax + 133 011a F7F1 div %ecx,%eax + 134 011c 8EDE mov %si,%ds + 135 011e 8EDE movl %si,%ds # warning here +.*Warning:.* + 136 0120 1E pushl %ds + 137 0121 1E push %ds + 138 0122 A0000000 00 mov 0,%al + 139 0127 66A10000 0100 mov 0x10000,%ax + 140 012d 89C3 mov %eax,%ebx + 141 012f 9C pushf + 142 0130 9C pushfl + 143 0131 669C pushfw + 144 0133 9D popf + 145 0134 9D popfl + 146 0135 669D popfw + 147 0137 89341D00 000000 mov %esi,\(,%ebx,1\) + 148 013e 80250000 00007F andb \$~0x80,foo + 149 + 150 # Force a good alignment. + 151 0145 0000 .word 0 + 152 0147 00 .byte 0 diff --git a/gas/testsuite/gas/i386/general.s b/gas/testsuite/gas/i386/general.s new file mode 100644 index 0000000..d73f489 --- /dev/null +++ b/gas/testsuite/gas/i386/general.s @@ -0,0 +1,152 @@ +.psize 0 +.text +# test various segment reg insns + push %ds + pushl %ds + pop %ds + popl %ds + mov %ds,%eax + movl %ds,%eax + movl %ds,%ax + mov %eax,%ds + movl %ax,%ds + movl %eax,%ds + + pushw %ds + popw %ds + mov %ds,%ax + movw %ds,%ax + movw %ds,%eax + mov %ax,%ds + movw %ax,%ds + movw %eax,%ds + +# test various pushes + pushl $10 + pushw $10 + push $10 + pushl $1000 + pushw $1000 + push $1000 + pushl 1f + pushw 1f + push 1f + push (1f-.)(%ebx) + push 1f-. +# these, and others like them should have no operand size prefix +1: lldt %cx + lmsw %ax + +# Just to make sure these don't become illegal due to over-enthusiastic +# register checking + movsbw %al,%di + movsbl %al,%ecx + movswl %ax,%ecx + movzbw %al,%di + movzbl %al,%ecx + movzwl %ax,%ecx + + in %dx,%al + in %dx,%ax + in %dx,%eax + in (%dx),%al + in (%dx),%ax + in (%dx),%eax + inb %dx,%al + inw %dx,%ax + inl %dx,%eax + inb %dx + inw %dx + inl %dx + inb $255 + inw $2 + inl $4 + outl %eax,%dx + out %al, $42 + in $13, %ax +# These are used in AIX. + inw (%dx) + outw (%dx) + + movsb + cmpsw + scasl + xlatb + movsl %cs:(%esi),%es:(%edi) + setae (%ebx) + setaeb (%ebx) + setae %al + +#these should give warnings + orb $1,%ax + orb $1,%eax + orb $1,%bx + orb $1,%ebx + fldl %st(1) + fstl %st(2) + fstpl %st(3) + fcoml %st(4) + fcompl %st(5) + faddp %st(1),%st + fmulp %st(2),%st + fsubp %st(3),%st + fsubrp %st(4),%st + fdivp %st(5),%st + fdivrp %st(6),%st + fadd + fsub + fmul + fdiv + fsubr + fdivr +#these should all be legal + btl %edx, 0x123456 + btl %edx, %eax + orb $1,%al + orb $1,%bl + movl 17,%eax + mov 17,%eax + inw %dx,%ax + inl %dx,%eax + inw (%dx),%ax + inl (%dx),%eax + in (%dx),%al + in (%dx),%ax + in (%dx),%eax + movzbl (%edi,%esi),%edx + movzbl 28(%ebp),%eax + movzbl %al,%eax + movzbl %cl,%esi + xlat %es:(%ebx) + xlat + xlatb +1: fstp %st(0) + loop 1b + divb %cl + divw %cx + divl %ecx + div %cl + div %cx + div %ecx + div %cl,%al + div %cx,%ax + div %ecx,%eax + mov %si,%ds + movl %si,%ds # warning here + pushl %ds + push %ds + mov 0,%al + mov 0x10000,%ax + mov %eax,%ebx + pushf + pushfl + pushfw + popf + popfl + popfw + mov %esi,(,%ebx,1) + andb $~0x80,foo + + # Force a good alignment. + .word 0 + .byte 0 diff --git a/gas/testsuite/gas/i386/i386.exp b/gas/testsuite/gas/i386/i386.exp new file mode 100644 index 0000000..cef1ff7 --- /dev/null +++ b/gas/testsuite/gas/i386/i386.exp @@ -0,0 +1,34 @@ +# +# i386 tests +# +proc run_list_test { name opts } { + global srcdir subdir + set testname "i386 $name" + set file $srcdir/$subdir/$name + gas_run ${name}.s $opts ">&dump.out" + if { [regexp_diff "dump.out" "${file}.l"] } then { + fail $testname + verbose "output is [file_contents "dump.out"]" 2 + return + } + pass $testname +} + + +if [istarget "i*86-*-*"] then { + + run_list_test "float" "-al" + run_list_test "general" "-al --listing-lhs-width=2" + run_list_test "inval" "-al" + run_list_test "modrm" "-al --listing-lhs-width=2" + run_dump_test "opcode" + run_dump_test "prefix" + run_dump_test "amd" + + # The reloc and white tests require support for 8 and 16 bit + # relocs, so we only run them for ELF targets. + if {[istarget "*-*-elf*"] || [istarget "*-*-linux*"]} then { + run_dump_test "reloc" + run_list_test "white" "-al --listing-lhs-width=3" + } +} diff --git a/gas/testsuite/gas/i386/inval.l b/gas/testsuite/gas/i386/inval.l new file mode 100644 index 0000000..e789499 --- /dev/null +++ b/gas/testsuite/gas/i386/inval.l @@ -0,0 +1,98 @@ +.*: Assembler messages: +.*:3: Error: .* +.*:4: Error: .* +.*:5: Error: .* +.*:6: Error: .* +.*:7: Error: .* +.*:8: Error: .* +.*:9: Error: .* +.*:10: Error: .* +.*:11: Error: .* +.*:12: Error: .* +.*:13: Error: .* +.*:14: Error: .* +.*:15: Error: .* +.*:16: Error: .* +.*:17: Error: .* +.*:18: Error: .* +.*:19: Error: .* +.*:20: Error: .* +.*:21: Error: .* +.*:22: Error: .* +.*:23: Error: .* +.*:24: Error: .* +.*:25: Error: .* +.*:26: Error: .* +.*:27: Error: .* +.*:28: Error: .* +.*:29: Error: .* +.*:30: Error: .* +.*:31: Error: .* +.*:32: Error: .* +.*:33: Error: .* +.*:34: Error: .* +.*:35: Error: .* +.*:36: Error: .* +.*:37: Error: .* +.*:38: Error: .* +.*:39: Error: .* +.*:40: Error: .* +.*:41: Error: .* +.*:42: Error: .* +.*:43: Error: .* +.*:44: Error: .* +.*:45: Error: .* +.*:46: Error: .* +.*:47: Error: .* +.*:48: Error: .* +GAS LISTING .* + + + 1 [ ]* .text + 2 [ ]*# All the following should be illegal + 3 [ ]* mov \(%dx\),%al + 4 [ ]* mov \(%eax,%esp,2\),%al + 5 [ ]* setae %eax + 6 [ ]* pushb %ds + 7 [ ]* popb %ds + 8 [ ]* pushb %al + 9 [ ]* popb %al + 10 [ ]* pushb %ah + 11 [ ]* popb %ah + 12 [ ]* pushb %ax + 13 [ ]* popb %ax + 14 [ ]* pushb %eax + 15 [ ]* popb %eax + 16 [ ]* movb %ds,%ax + 17 [ ]* movb %ds,%eax + 18 [ ]* movb %ax,%ds + 19 [ ]* movb %eax,%ds + 20 [ ]* movdb %eax,%mm0 + 21 [ ]* movqb 0,%mm0 + 22 [ ]* ldsb 0,%eax + 23 [ ]* setnew 0 + 24 [ ]* movdw %eax,%mm0 + 25 [ ]* movqw 0,%mm0 + 26 [ ]* div %cx,%al + 27 [ ]* div %cl,%ax + 28 [ ]* div %ecx,%al + 29 [ ]* imul 10,%bx,%ecx + 30 [ ]* imul 10,%bx,%al + 31 [ ]* popab + 32 [ ]* stil + 33 [ ]* aaab + 34 [ ]* cwdel + 35 [ ]* cwdw + 36 [ ]* callww 0 + 37 [ ]*foo: jaw foo + 38 [ ]* jcxzw foo + 39 [ ]* jecxzl foo + 40 [ ]* loopb foo + 41 [ ]* xlatw %es:%bx + 42 [ ]* xlatl %es:%bx + 43 [ ]* intl 2 + 44 [ ]* int3b + 45 [ ]* hltb + 46 [ ]* fstb %st\(0\) + 47 [ ]* fcompll 28\(%ebp\) + 48 [ ]* fldlw \(%eax\) diff --git a/gas/testsuite/gas/i386/inval.s b/gas/testsuite/gas/i386/inval.s new file mode 100644 index 0000000..e37a18e --- /dev/null +++ b/gas/testsuite/gas/i386/inval.s @@ -0,0 +1,48 @@ + .text +# All the following should be illegal + mov (%dx),%al + mov (%eax,%esp,2),%al + setae %eax + pushb %ds + popb %ds + pushb %al + popb %al + pushb %ah + popb %ah + pushb %ax + popb %ax + pushb %eax + popb %eax + movb %ds,%ax + movb %ds,%eax + movb %ax,%ds + movb %eax,%ds + movdb %eax,%mm0 + movqb 0,%mm0 + ldsb 0,%eax + setnew 0 + movdw %eax,%mm0 + movqw 0,%mm0 + div %cx,%al + div %cl,%ax + div %ecx,%al + imul 10,%bx,%ecx + imul 10,%bx,%al + popab + stil + aaab + cwdel + cwdw + callww 0 +foo: jaw foo + jcxzw foo + jecxzl foo + loopb foo + xlatw %es:%bx + xlatl %es:%bx + intl 2 + int3b + hltb + fstb %st(0) + fcompll 28(%ebp) + fldlw (%eax) diff --git a/gas/testsuite/gas/i386/modrm.l b/gas/testsuite/gas/i386/modrm.l new file mode 100644 index 0000000..8a1bc79 --- /dev/null +++ b/gas/testsuite/gas/i386/modrm.l @@ -0,0 +1,1984 @@ +.*: Assembler messages: +.*:128: Warning:.* +.*:129: Warning:.* +.*:130: Warning:.* +.*:131: Warning:.* +.*:132: Warning:.* +.*:133: Warning:.* +.*:134: Warning:.* +.*:135: Warning:.* +.*:192: Warning:.* +.*:193: Warning:.* +.*:194: Warning:.* +.*:195: Warning:.* +.*:196: Warning:.* +.*:197: Warning:.* +.*:198: Warning:.* +.*:199: Warning:.* +.*:256: Warning:.* +.*:257: Warning:.* +.*:258: Warning:.* +.*:259: Warning:.* +.*:260: Warning:.* +.*:261: Warning:.* +.*:262: Warning:.* +.*:263: Warning:.* +.*:384: Warning:.* +.*:385: Warning:.* +.*:386: Warning:.* +.*:387: Warning:.* +.*:388: Warning:.* +.*:389: Warning:.* +.*:390: Warning:.* +.*:391: Warning:.* +.*:448: Warning:.* +.*:449: Warning:.* +.*:450: Warning:.* +.*:451: Warning:.* +.*:452: Warning:.* +.*:453: Warning:.* +.*:454: Warning:.* +.*:455: Warning:.* +.*:512: Warning:.* +.*:513: Warning:.* +.*:514: Warning:.* +.*:515: Warning:.* +.*:516: Warning:.* +.*:517: Warning:.* +.*:518: Warning:.* +.*:519: Warning:.* +.*:640: Warning:.* +.*:641: Warning:.* +.*:642: Warning:.* +.*:643: Warning:.* +.*:644: Warning:.* +.*:645: Warning:.* +.*:646: Warning:.* +.*:647: Warning:.* +.*:704: Warning:.* +.*:705: Warning:.* +.*:706: Warning:.* +.*:707: Warning:.* +.*:708: Warning:.* +.*:709: Warning:.* +.*:710: Warning:.* +.*:711: Warning:.* +.*:768: Warning:.* +.*:769: Warning:.* +.*:770: Warning:.* +.*:771: Warning:.* +.*:772: Warning:.* +.*:773: Warning:.* +.*:774: Warning:.* +.*:775: Warning:.* +.*:812: Warning:.* +.*:820: Warning:.* +.*:828: Warning:.* +.*:833: Warning:.* +.*:834: Warning:.* +.*:835: Warning:.* +.*:961: Warning:.* +.*:962: Warning:.* +.*:963: Warning:.* +.*:964: Warning:.* +.*:965: Warning:.* +.*:966: Warning:.* +.*:967: Warning:.* +.*:968: Warning:.* +.*:1025: Warning:.* +.*:1026: Warning:.* +.*:1027: Warning:.* +.*:1028: Warning:.* +.*:1029: Warning:.* +.*:1030: Warning:.* +.*:1031: Warning:.* +.*:1032: Warning:.* +.*:1089: Warning:.* +.*:1090: Warning:.* +.*:1091: Warning:.* +.*:1092: Warning:.* +.*:1093: Warning:.* +.*:1094: Warning:.* +.*:1095: Warning:.* +.*:1096: Warning:.* +.*:1217: Warning:.* +.*:1218: Warning:.* +.*:1219: Warning:.* +.*:1220: Warning:.* +.*:1221: Warning:.* +.*:1222: Warning:.* +.*:1223: Warning:.* +.*:1224: Warning:.* +.*:1281: Warning:.* +.*:1282: Warning:.* +.*:1283: Warning:.* +.*:1284: Warning:.* +.*:1285: Warning:.* +.*:1286: Warning:.* +.*:1287: Warning:.* +.*:1288: Warning:.* +.*:1345: Warning:.* +.*:1346: Warning:.* +.*:1347: Warning:.* +.*:1348: Warning:.* +.*:1349: Warning:.* +.*:1350: Warning:.* +.*:1351: Warning:.* +.*:1352: Warning:.* +.*:1473: Warning:.* +.*:1474: Warning:.* +.*:1475: Warning:.* +.*:1476: Warning:.* +.*:1477: Warning:.* +.*:1478: Warning:.* +.*:1479: Warning:.* +.*:1480: Warning:.* +.*:1537: Warning:.* +.*:1538: Warning:.* +.*:1539: Warning:.* +.*:1540: Warning:.* +.*:1541: Warning:.* +.*:1542: Warning:.* +.*:1543: Warning:.* +.*:1544: Warning:.* +.*:1601: Warning:.* +.*:1602: Warning:.* +.*:1603: Warning:.* +.*:1604: Warning:.* +.*:1605: Warning:.* +.*:1606: Warning:.* +.*:1607: Warning:.* +.*:1608: Warning:.* +.*:1645: Warning:.* +.*:1653: Warning:.* +.*:1661: Warning:.* +.*:1666: Warning:.* +.*:1667: Warning:.* +.*:1668: Warning:.* + 1 .psize 0 + 2 .text + 3 0000 368C18 mov %ds,%ss:\(%eax\) + 4 0003 368C19 mov %ds,%ss:\(%ecx\) + 5 0006 368C1A mov %ds,%ss:\(%edx\) + 6 0009 368C1B mov %ds,%ss:\(%ebx\) + 7 000c 368C1D00 000000 mov %ds,%ss:0 + 8 0013 368C1E mov %ds,%ss:\(%esi\) + 9 0016 368C1F mov %ds,%ss:\(%edi\) + 10 0019 368C5812 mov %ds,%ss:0x12\(%eax\) + 11 001d 368C5912 mov %ds,%ss:0x12\(%ecx\) + 12 0021 368C5A12 mov %ds,%ss:0x12\(%edx\) + 13 0025 368C5B12 mov %ds,%ss:0x12\(%ebx\) + 14 0029 8C5D12 mov %ds,%ss:0x12\(%ebp\) + 15 002c 368C5E12 mov %ds,%ss:0x12\(%esi\) + 16 0030 368C5F12 mov %ds,%ss:0x12\(%edi\) + 17 0034 368C9878 563412 mov %ds,%ss:0x12345678\(%eax\) + 18 003b 368C9978 563412 mov %ds,%ss:0x12345678\(%ecx\) + 19 0042 368C9A78 563412 mov %ds,%ss:0x12345678\(%edx\) + 20 0049 368C9B78 563412 mov %ds,%ss:0x12345678\(%ebx\) + 21 0050 8C9D7856 3412 mov %ds,%ss:0x12345678\(%ebp\) + 22 0056 368C9E78 563412 mov %ds,%ss:0x12345678\(%esi\) + 23 005d 368C9F78 563412 mov %ds,%ss:0x12345678\(%edi\) + 24 0064 8CD8 mov %ds,%eax + 25 0066 8CD9 mov %ds,%ecx + 26 0068 8CDA mov %ds,%edx + 27 006a 8CDB mov %ds,%ebx + 28 006c 8CDC mov %ds,%esp + 29 006e 8CDD mov %ds,%ebp + 30 0070 8CDE mov %ds,%esi + 31 0072 8CDF mov %ds,%edi + 32 0074 368C1C00 mov %ds,%ss:\(%eax,%eax,1\) + 33 0078 368C1C01 mov %ds,%ss:\(%ecx,%eax,1\) + 34 007c 368C1C02 mov %ds,%ss:\(%edx,%eax,1\) + 35 0080 368C1C03 mov %ds,%ss:\(%ebx,%eax,1\) + 36 0084 8C1C04 mov %ds,%ss:\(%esp,%eax,1\) + 37 0087 368C1C05 00000000 mov %ds,%ss:\(,%eax,1\) + 38 008f 368C1C06 mov %ds,%ss:\(%esi,%eax,1\) + 39 0093 368C1C07 mov %ds,%ss:\(%edi,%eax,1\) + 40 0097 368C1C08 mov %ds,%ss:\(%eax,%ecx,1\) + 41 009b 368C1C09 mov %ds,%ss:\(%ecx,%ecx,1\) + 42 009f 368C1C0A mov %ds,%ss:\(%edx,%ecx,1\) + 43 00a3 368C1C0B mov %ds,%ss:\(%ebx,%ecx,1\) + 44 00a7 8C1C0C mov %ds,%ss:\(%esp,%ecx,1\) + 45 00aa 368C1C0D 00000000 mov %ds,%ss:\(,%ecx,1\) + 46 00b2 368C1C0E mov %ds,%ss:\(%esi,%ecx,1\) + 47 00b6 368C1C0F mov %ds,%ss:\(%edi,%ecx,1\) + 48 00ba 368C1C10 mov %ds,%ss:\(%eax,%edx,1\) + 49 00be 368C1C11 mov %ds,%ss:\(%ecx,%edx,1\) + 50 00c2 368C1C12 mov %ds,%ss:\(%edx,%edx,1\) + 51 00c6 368C1C13 mov %ds,%ss:\(%ebx,%edx,1\) + 52 00ca 8C1C14 mov %ds,%ss:\(%esp,%edx,1\) + 53 00cd 368C1C15 00000000 mov %ds,%ss:\(,%edx,1\) + 54 00d5 368C1C16 mov %ds,%ss:\(%esi,%edx,1\) + 55 00d9 368C1C17 mov %ds,%ss:\(%edi,%edx,1\) + 56 00dd 368C1C18 mov %ds,%ss:\(%eax,%ebx,1\) + 57 00e1 368C1C19 mov %ds,%ss:\(%ecx,%ebx,1\) + 58 00e5 368C1C1A mov %ds,%ss:\(%edx,%ebx,1\) + 59 00e9 368C1C1B mov %ds,%ss:\(%ebx,%ebx,1\) + 60 00ed 8C1C1C mov %ds,%ss:\(%esp,%ebx,1\) + 61 00f0 368C1C1D 00000000 mov %ds,%ss:\(,%ebx,1\) + 62 00f8 368C1C1E mov %ds,%ss:\(%esi,%ebx,1\) + 63 00fc 368C1C1F mov %ds,%ss:\(%edi,%ebx,1\) + 64 0100 368C18 mov %ds,%ss:\(%eax,1\) + 65 0103 368C19 mov %ds,%ss:\(%ecx,1\) + 66 0106 368C1A mov %ds,%ss:\(%edx,1\) + 67 0109 368C1B mov %ds,%ss:\(%ebx,1\) + 68 010c 8C1C24 mov %ds,%ss:\(%esp,1\) + 69 010f 368C1D00 000000 mov %ds,%ss:\(,1\) + 70 0116 368C1E mov %ds,%ss:\(%esi,1\) + 71 0119 368C1F mov %ds,%ss:\(%edi,1\) + 72 011c 368C1C28 mov %ds,%ss:\(%eax,%ebp,1\) + 73 0120 368C1C29 mov %ds,%ss:\(%ecx,%ebp,1\) + 74 0124 368C1C2A mov %ds,%ss:\(%edx,%ebp,1\) + 75 0128 368C1C2B mov %ds,%ss:\(%ebx,%ebp,1\) + 76 012c 8C1C2C mov %ds,%ss:\(%esp,%ebp,1\) + 77 012f 368C1C2D 00000000 mov %ds,%ss:\(,%ebp,1\) + 78 0137 368C1C2E mov %ds,%ss:\(%esi,%ebp,1\) + 79 013b 368C1C2F mov %ds,%ss:\(%edi,%ebp,1\) + 80 013f 368C1C30 mov %ds,%ss:\(%eax,%esi,1\) + 81 0143 368C1C31 mov %ds,%ss:\(%ecx,%esi,1\) + 82 0147 368C1C32 mov %ds,%ss:\(%edx,%esi,1\) + 83 014b 368C1C33 mov %ds,%ss:\(%ebx,%esi,1\) + 84 014f 8C1C34 mov %ds,%ss:\(%esp,%esi,1\) + 85 0152 368C1C35 00000000 mov %ds,%ss:\(,%esi,1\) + 86 015a 368C1C36 mov %ds,%ss:\(%esi,%esi,1\) + 87 015e 368C1C37 mov %ds,%ss:\(%edi,%esi,1\) + 88 0162 368C1C38 mov %ds,%ss:\(%eax,%edi,1\) + 89 0166 368C1C39 mov %ds,%ss:\(%ecx,%edi,1\) + 90 016a 368C1C3A mov %ds,%ss:\(%edx,%edi,1\) + 91 016e 368C1C3B mov %ds,%ss:\(%ebx,%edi,1\) + 92 0172 8C1C3C mov %ds,%ss:\(%esp,%edi,1\) + 93 0175 368C1C3D 00000000 mov %ds,%ss:\(,%edi,1\) + 94 017d 368C1C3E mov %ds,%ss:\(%esi,%edi,1\) + 95 0181 368C1C3F mov %ds,%ss:\(%edi,%edi,1\) + 96 0185 368C1C40 mov %ds,%ss:\(%eax,%eax,2\) + 97 0189 368C1C41 mov %ds,%ss:\(%ecx,%eax,2\) + 98 018d 368C1C42 mov %ds,%ss:\(%edx,%eax,2\) + 99 0191 368C1C43 mov %ds,%ss:\(%ebx,%eax,2\) + 100 0195 8C1C44 mov %ds,%ss:\(%esp,%eax,2\) + 101 0198 368C1C45 00000000 mov %ds,%ss:\(,%eax,2\) + 102 01a0 368C1C46 mov %ds,%ss:\(%esi,%eax,2\) + 103 01a4 368C1C47 mov %ds,%ss:\(%edi,%eax,2\) + 104 01a8 368C1C48 mov %ds,%ss:\(%eax,%ecx,2\) + 105 01ac 368C1C49 mov %ds,%ss:\(%ecx,%ecx,2\) + 106 01b0 368C1C4A mov %ds,%ss:\(%edx,%ecx,2\) + 107 01b4 368C1C4B mov %ds,%ss:\(%ebx,%ecx,2\) + 108 01b8 8C1C4C mov %ds,%ss:\(%esp,%ecx,2\) + 109 01bb 368C1C4D 00000000 mov %ds,%ss:\(,%ecx,2\) + 110 01c3 368C1C4E mov %ds,%ss:\(%esi,%ecx,2\) + 111 01c7 368C1C4F mov %ds,%ss:\(%edi,%ecx,2\) + 112 01cb 368C1C50 mov %ds,%ss:\(%eax,%edx,2\) + 113 01cf 368C1C51 mov %ds,%ss:\(%ecx,%edx,2\) + 114 01d3 368C1C52 mov %ds,%ss:\(%edx,%edx,2\) + 115 01d7 368C1C53 mov %ds,%ss:\(%ebx,%edx,2\) + 116 01db 8C1C54 mov %ds,%ss:\(%esp,%edx,2\) + 117 01de 368C1C55 00000000 mov %ds,%ss:\(,%edx,2\) + 118 01e6 368C1C56 mov %ds,%ss:\(%esi,%edx,2\) + 119 01ea 368C1C57 mov %ds,%ss:\(%edi,%edx,2\) + 120 01ee 368C1C58 mov %ds,%ss:\(%eax,%ebx,2\) + 121 01f2 368C1C59 mov %ds,%ss:\(%ecx,%ebx,2\) + 122 01f6 368C1C5A mov %ds,%ss:\(%edx,%ebx,2\) + 123 01fa 368C1C5B mov %ds,%ss:\(%ebx,%ebx,2\) + 124 01fe 8C1C5C mov %ds,%ss:\(%esp,%ebx,2\) + 125 0201 368C1C5D 00000000 mov %ds,%ss:\(,%ebx,2\) + 126 0209 368C1C5E mov %ds,%ss:\(%esi,%ebx,2\) + 127 020d 368C1C5F mov %ds,%ss:\(%edi,%ebx,2\) + 128 0211 368C18 mov %ds,%ss:\(%eax,2\) +.*Warning:.* + 129 0214 368C19 mov %ds,%ss:\(%ecx,2\) +.*Warning:.* + 130 0217 368C1A mov %ds,%ss:\(%edx,2\) +.*Warning:.* + 131 021a 368C1B mov %ds,%ss:\(%ebx,2\) +.*Warning:.* + 132 021d 8C1C24 mov %ds,%ss:\(%esp,2\) +.*Warning:.* + 133 0220 368C1D00 000000 mov %ds,%ss:\(,2\) +.*Warning:.* + 134 0227 368C1E mov %ds,%ss:\(%esi,2\) +.*Warning:.* + 135 022a 368C1F mov %ds,%ss:\(%edi,2\) +.*Warning:.* + 136 022d 368C1C68 mov %ds,%ss:\(%eax,%ebp,2\) + 137 0231 368C1C69 mov %ds,%ss:\(%ecx,%ebp,2\) + 138 0235 368C1C6A mov %ds,%ss:\(%edx,%ebp,2\) + 139 0239 368C1C6B mov %ds,%ss:\(%ebx,%ebp,2\) + 140 023d 8C1C6C mov %ds,%ss:\(%esp,%ebp,2\) + 141 0240 368C1C6D 00000000 mov %ds,%ss:\(,%ebp,2\) + 142 0248 368C1C6E mov %ds,%ss:\(%esi,%ebp,2\) + 143 024c 368C1C6F mov %ds,%ss:\(%edi,%ebp,2\) + 144 0250 368C1C70 mov %ds,%ss:\(%eax,%esi,2\) + 145 0254 368C1C71 mov %ds,%ss:\(%ecx,%esi,2\) + 146 0258 368C1C72 mov %ds,%ss:\(%edx,%esi,2\) + 147 025c 368C1C73 mov %ds,%ss:\(%ebx,%esi,2\) + 148 0260 8C1C74 mov %ds,%ss:\(%esp,%esi,2\) + 149 0263 368C1C75 00000000 mov %ds,%ss:\(,%esi,2\) + 150 026b 368C1C76 mov %ds,%ss:\(%esi,%esi,2\) + 151 026f 368C1C77 mov %ds,%ss:\(%edi,%esi,2\) + 152 0273 368C1C78 mov %ds,%ss:\(%eax,%edi,2\) + 153 0277 368C1C79 mov %ds,%ss:\(%ecx,%edi,2\) + 154 027b 368C1C7A mov %ds,%ss:\(%edx,%edi,2\) + 155 027f 368C1C7B mov %ds,%ss:\(%ebx,%edi,2\) + 156 0283 8C1C7C mov %ds,%ss:\(%esp,%edi,2\) + 157 0286 368C1C7D 00000000 mov %ds,%ss:\(,%edi,2\) + 158 028e 368C1C7E mov %ds,%ss:\(%esi,%edi,2\) + 159 0292 368C1C7F mov %ds,%ss:\(%edi,%edi,2\) + 160 0296 368C1C80 mov %ds,%ss:\(%eax,%eax,4\) + 161 029a 368C1C81 mov %ds,%ss:\(%ecx,%eax,4\) + 162 029e 368C1C82 mov %ds,%ss:\(%edx,%eax,4\) + 163 02a2 368C1C83 mov %ds,%ss:\(%ebx,%eax,4\) + 164 02a6 8C1C84 mov %ds,%ss:\(%esp,%eax,4\) + 165 02a9 368C1C85 00000000 mov %ds,%ss:\(,%eax,4\) + 166 02b1 368C1C86 mov %ds,%ss:\(%esi,%eax,4\) + 167 02b5 368C1C87 mov %ds,%ss:\(%edi,%eax,4\) + 168 02b9 368C1C88 mov %ds,%ss:\(%eax,%ecx,4\) + 169 02bd 368C1C89 mov %ds,%ss:\(%ecx,%ecx,4\) + 170 02c1 368C1C8A mov %ds,%ss:\(%edx,%ecx,4\) + 171 02c5 368C1C8B mov %ds,%ss:\(%ebx,%ecx,4\) + 172 02c9 8C1C8C mov %ds,%ss:\(%esp,%ecx,4\) + 173 02cc 368C1C8D 00000000 mov %ds,%ss:\(,%ecx,4\) + 174 02d4 368C1C8E mov %ds,%ss:\(%esi,%ecx,4\) + 175 02d8 368C1C8F mov %ds,%ss:\(%edi,%ecx,4\) + 176 02dc 368C1C90 mov %ds,%ss:\(%eax,%edx,4\) + 177 02e0 368C1C91 mov %ds,%ss:\(%ecx,%edx,4\) + 178 02e4 368C1C92 mov %ds,%ss:\(%edx,%edx,4\) + 179 02e8 368C1C93 mov %ds,%ss:\(%ebx,%edx,4\) + 180 02ec 8C1C94 mov %ds,%ss:\(%esp,%edx,4\) + 181 02ef 368C1C95 00000000 mov %ds,%ss:\(,%edx,4\) + 182 02f7 368C1C96 mov %ds,%ss:\(%esi,%edx,4\) + 183 02fb 368C1C97 mov %ds,%ss:\(%edi,%edx,4\) + 184 02ff 368C1C98 mov %ds,%ss:\(%eax,%ebx,4\) + 185 0303 368C1C99 mov %ds,%ss:\(%ecx,%ebx,4\) + 186 0307 368C1C9A mov %ds,%ss:\(%edx,%ebx,4\) + 187 030b 368C1C9B mov %ds,%ss:\(%ebx,%ebx,4\) + 188 030f 8C1C9C mov %ds,%ss:\(%esp,%ebx,4\) + 189 0312 368C1C9D 00000000 mov %ds,%ss:\(,%ebx,4\) + 190 031a 368C1C9E mov %ds,%ss:\(%esi,%ebx,4\) + 191 031e 368C1C9F mov %ds,%ss:\(%edi,%ebx,4\) + 192 0322 368C18 mov %ds,%ss:\(%eax,4\) +.*Warning:.* + 193 0325 368C19 mov %ds,%ss:\(%ecx,4\) +.*Warning:.* + 194 0328 368C1A mov %ds,%ss:\(%edx,4\) +.*Warning:.* + 195 032b 368C1B mov %ds,%ss:\(%ebx,4\) +.*Warning:.* + 196 032e 8C1C24 mov %ds,%ss:\(%esp,4\) +.*Warning:.* + 197 0331 368C1D00 000000 mov %ds,%ss:\(,4\) +.*Warning:.* + 198 0338 368C1E mov %ds,%ss:\(%esi,4\) +.*Warning:.* + 199 033b 368C1F mov %ds,%ss:\(%edi,4\) +.*Warning:.* + 200 033e 368C1CA8 mov %ds,%ss:\(%eax,%ebp,4\) + 201 0342 368C1CA9 mov %ds,%ss:\(%ecx,%ebp,4\) + 202 0346 368C1CAA mov %ds,%ss:\(%edx,%ebp,4\) + 203 034a 368C1CAB mov %ds,%ss:\(%ebx,%ebp,4\) + 204 034e 8C1CAC mov %ds,%ss:\(%esp,%ebp,4\) + 205 0351 368C1CAD 00000000 mov %ds,%ss:\(,%ebp,4\) + 206 0359 368C1CAE mov %ds,%ss:\(%esi,%ebp,4\) + 207 035d 368C1CAF mov %ds,%ss:\(%edi,%ebp,4\) + 208 0361 368C1CB0 mov %ds,%ss:\(%eax,%esi,4\) + 209 0365 368C1CB1 mov %ds,%ss:\(%ecx,%esi,4\) + 210 0369 368C1CB2 mov %ds,%ss:\(%edx,%esi,4\) + 211 036d 368C1CB3 mov %ds,%ss:\(%ebx,%esi,4\) + 212 0371 8C1CB4 mov %ds,%ss:\(%esp,%esi,4\) + 213 0374 368C1CB5 00000000 mov %ds,%ss:\(,%esi,4\) + 214 037c 368C1CB6 mov %ds,%ss:\(%esi,%esi,4\) + 215 0380 368C1CB7 mov %ds,%ss:\(%edi,%esi,4\) + 216 0384 368C1CB8 mov %ds,%ss:\(%eax,%edi,4\) + 217 0388 368C1CB9 mov %ds,%ss:\(%ecx,%edi,4\) + 218 038c 368C1CBA mov %ds,%ss:\(%edx,%edi,4\) + 219 0390 368C1CBB mov %ds,%ss:\(%ebx,%edi,4\) + 220 0394 8C1CBC mov %ds,%ss:\(%esp,%edi,4\) + 221 0397 368C1CBD 00000000 mov %ds,%ss:\(,%edi,4\) + 222 039f 368C1CBE mov %ds,%ss:\(%esi,%edi,4\) + 223 03a3 368C1CBF mov %ds,%ss:\(%edi,%edi,4\) + 224 03a7 368C1CC0 mov %ds,%ss:\(%eax,%eax,8\) + 225 03ab 368C1CC1 mov %ds,%ss:\(%ecx,%eax,8\) + 226 03af 368C1CC2 mov %ds,%ss:\(%edx,%eax,8\) + 227 03b3 368C1CC3 mov %ds,%ss:\(%ebx,%eax,8\) + 228 03b7 8C1CC4 mov %ds,%ss:\(%esp,%eax,8\) + 229 03ba 368C1CC5 00000000 mov %ds,%ss:\(,%eax,8\) + 230 03c2 368C1CC6 mov %ds,%ss:\(%esi,%eax,8\) + 231 03c6 368C1CC7 mov %ds,%ss:\(%edi,%eax,8\) + 232 03ca 368C1CC8 mov %ds,%ss:\(%eax,%ecx,8\) + 233 03ce 368C1CC9 mov %ds,%ss:\(%ecx,%ecx,8\) + 234 03d2 368C1CCA mov %ds,%ss:\(%edx,%ecx,8\) + 235 03d6 368C1CCB mov %ds,%ss:\(%ebx,%ecx,8\) + 236 03da 8C1CCC mov %ds,%ss:\(%esp,%ecx,8\) + 237 03dd 368C1CCD 00000000 mov %ds,%ss:\(,%ecx,8\) + 238 03e5 368C1CCE mov %ds,%ss:\(%esi,%ecx,8\) + 239 03e9 368C1CCF mov %ds,%ss:\(%edi,%ecx,8\) + 240 03ed 368C1CD0 mov %ds,%ss:\(%eax,%edx,8\) + 241 03f1 368C1CD1 mov %ds,%ss:\(%ecx,%edx,8\) + 242 03f5 368C1CD2 mov %ds,%ss:\(%edx,%edx,8\) + 243 03f9 368C1CD3 mov %ds,%ss:\(%ebx,%edx,8\) + 244 03fd 8C1CD4 mov %ds,%ss:\(%esp,%edx,8\) + 245 0400 368C1CD5 00000000 mov %ds,%ss:\(,%edx,8\) + 246 0408 368C1CD6 mov %ds,%ss:\(%esi,%edx,8\) + 247 040c 368C1CD7 mov %ds,%ss:\(%edi,%edx,8\) + 248 0410 368C1CD8 mov %ds,%ss:\(%eax,%ebx,8\) + 249 0414 368C1CD9 mov %ds,%ss:\(%ecx,%ebx,8\) + 250 0418 368C1CDA mov %ds,%ss:\(%edx,%ebx,8\) + 251 041c 368C1CDB mov %ds,%ss:\(%ebx,%ebx,8\) + 252 0420 8C1CDC mov %ds,%ss:\(%esp,%ebx,8\) + 253 0423 368C1CDD 00000000 mov %ds,%ss:\(,%ebx,8\) + 254 042b 368C1CDE mov %ds,%ss:\(%esi,%ebx,8\) + 255 042f 368C1CDF mov %ds,%ss:\(%edi,%ebx,8\) + 256 0433 368C18 mov %ds,%ss:\(%eax,8\) +.*Warning:.* + 257 0436 368C19 mov %ds,%ss:\(%ecx,8\) +.*Warning:.* + 258 0439 368C1A mov %ds,%ss:\(%edx,8\) +.*Warning:.* + 259 043c 368C1B mov %ds,%ss:\(%ebx,8\) +.*Warning:.* + 260 043f 8C1C24 mov %ds,%ss:\(%esp,8\) +.*Warning:.* + 261 0442 368C1D00 000000 mov %ds,%ss:\(,8\) +.*Warning:.* + 262 0449 368C1E mov %ds,%ss:\(%esi,8\) +.*Warning:.* + 263 044c 368C1F mov %ds,%ss:\(%edi,8\) +.*Warning:.* + 264 044f 368C1CE8 mov %ds,%ss:\(%eax,%ebp,8\) + 265 0453 368C1CE9 mov %ds,%ss:\(%ecx,%ebp,8\) + 266 0457 368C1CEA mov %ds,%ss:\(%edx,%ebp,8\) + 267 045b 368C1CEB mov %ds,%ss:\(%ebx,%ebp,8\) + 268 045f 8C1CEC mov %ds,%ss:\(%esp,%ebp,8\) + 269 0462 368C1CED 00000000 mov %ds,%ss:\(,%ebp,8\) + 270 046a 368C1CEE mov %ds,%ss:\(%esi,%ebp,8\) + 271 046e 368C1CEF mov %ds,%ss:\(%edi,%ebp,8\) + 272 0472 368C1CF0 mov %ds,%ss:\(%eax,%esi,8\) + 273 0476 368C1CF1 mov %ds,%ss:\(%ecx,%esi,8\) + 274 047a 368C1CF2 mov %ds,%ss:\(%edx,%esi,8\) + 275 047e 368C1CF3 mov %ds,%ss:\(%ebx,%esi,8\) + 276 0482 8C1CF4 mov %ds,%ss:\(%esp,%esi,8\) + 277 0485 368C1CF5 00000000 mov %ds,%ss:\(,%esi,8\) + 278 048d 368C1CF6 mov %ds,%ss:\(%esi,%esi,8\) + 279 0491 368C1CF7 mov %ds,%ss:\(%edi,%esi,8\) + 280 0495 368C1CF8 mov %ds,%ss:\(%eax,%edi,8\) + 281 0499 368C1CFA mov %ds,%ss:\(%edx,%edi,8\) + 282 049d 368C1CF9 mov %ds,%ss:\(%ecx,%edi,8\) + 283 04a1 368C1CFB mov %ds,%ss:\(%ebx,%edi,8\) + 284 04a5 8C1CFC mov %ds,%ss:\(%esp,%edi,8\) + 285 04a8 368C1CFD 00000000 mov %ds,%ss:\(,%edi,8\) + 286 04b0 368C1CFE mov %ds,%ss:\(%esi,%edi,8\) + 287 04b4 368C1CFF mov %ds,%ss:\(%edi,%edi,8\) + 288 04b8 368C5C00 12 mov %ds,%ss:0x12\(%eax,%eax,1\) + 289 04bd 368C5C01 12 mov %ds,%ss:0x12\(%ecx,%eax,1\) + 290 04c2 368C5C02 12 mov %ds,%ss:0x12\(%edx,%eax,1\) + 291 04c7 368C5C03 12 mov %ds,%ss:0x12\(%ebx,%eax,1\) + 292 04cc 8C5C0412 mov %ds,%ss:0x12\(%esp,%eax,1\) + 293 04d0 8C5C0512 mov %ds,%ss:0x12\(%ebp,%eax,1\) + 294 04d4 368C5C06 12 mov %ds,%ss:0x12\(%esi,%eax,1\) + 295 04d9 368C5C07 12 mov %ds,%ss:0x12\(%edi,%eax,1\) + 296 04de 368C5C08 12 mov %ds,%ss:0x12\(%eax,%ecx,1\) + 297 04e3 368C5C09 12 mov %ds,%ss:0x12\(%ecx,%ecx,1\) + 298 04e8 368C5C0A 12 mov %ds,%ss:0x12\(%edx,%ecx,1\) + 299 04ed 368C5C0B 12 mov %ds,%ss:0x12\(%ebx,%ecx,1\) + 300 04f2 8C5C0C12 mov %ds,%ss:0x12\(%esp,%ecx,1\) + 301 04f6 8C5C0D12 mov %ds,%ss:0x12\(%ebp,%ecx,1\) + 302 04fa 368C5C0E 12 mov %ds,%ss:0x12\(%esi,%ecx,1\) + 303 04ff 368C5C0F 12 mov %ds,%ss:0x12\(%edi,%ecx,1\) + 304 0504 368C5C10 12 mov %ds,%ss:0x12\(%eax,%edx,1\) + 305 0509 368C5C11 12 mov %ds,%ss:0x12\(%ecx,%edx,1\) + 306 050e 368C5C12 12 mov %ds,%ss:0x12\(%edx,%edx,1\) + 307 0513 368C5C13 12 mov %ds,%ss:0x12\(%ebx,%edx,1\) + 308 0518 8C5C1412 mov %ds,%ss:0x12\(%esp,%edx,1\) + 309 051c 8C5C1512 mov %ds,%ss:0x12\(%ebp,%edx,1\) + 310 0520 368C5C16 12 mov %ds,%ss:0x12\(%esi,%edx,1\) + 311 0525 368C5C17 12 mov %ds,%ss:0x12\(%edi,%edx,1\) + 312 052a 368C5C18 12 mov %ds,%ss:0x12\(%eax,%ebx,1\) + 313 052f 368C5C19 12 mov %ds,%ss:0x12\(%ecx,%ebx,1\) + 314 0534 368C5C1A 12 mov %ds,%ss:0x12\(%edx,%ebx,1\) + 315 0539 368C5C1B 12 mov %ds,%ss:0x12\(%ebx,%ebx,1\) + 316 053e 8C5C1C12 mov %ds,%ss:0x12\(%esp,%ebx,1\) + 317 0542 8C5C1D12 mov %ds,%ss:0x12\(%ebp,%ebx,1\) + 318 0546 368C5C1E 12 mov %ds,%ss:0x12\(%esi,%ebx,1\) + 319 054b 368C5C1F 12 mov %ds,%ss:0x12\(%edi,%ebx,1\) + 320 0550 368C5812 mov %ds,%ss:0x12\(%eax,1\) + 321 0554 368C5912 mov %ds,%ss:0x12\(%ecx,1\) + 322 0558 368C5A12 mov %ds,%ss:0x12\(%edx,1\) + 323 055c 368C5B12 mov %ds,%ss:0x12\(%ebx,1\) + 324 0560 8C5C2412 mov %ds,%ss:0x12\(%esp,1\) + 325 0564 8C5D12 mov %ds,%ss:0x12\(%ebp,1\) + 326 0567 368C5E12 mov %ds,%ss:0x12\(%esi,1\) + 327 056b 368C5F12 mov %ds,%ss:0x12\(%edi,1\) + 328 056f 368C5C28 12 mov %ds,%ss:0x12\(%eax,%ebp,1\) + 329 0574 368C5C29 12 mov %ds,%ss:0x12\(%ecx,%ebp,1\) + 330 0579 368C5C2A 12 mov %ds,%ss:0x12\(%edx,%ebp,1\) + 331 057e 368C5C2B 12 mov %ds,%ss:0x12\(%ebx,%ebp,1\) + 332 0583 8C5C2C12 mov %ds,%ss:0x12\(%esp,%ebp,1\) + 333 0587 8C5C2D12 mov %ds,%ss:0x12\(%ebp,%ebp,1\) + 334 058b 368C5C2E 12 mov %ds,%ss:0x12\(%esi,%ebp,1\) + 335 0590 368C5C2F 12 mov %ds,%ss:0x12\(%edi,%ebp,1\) + 336 0595 368C5C30 12 mov %ds,%ss:0x12\(%eax,%esi,1\) + 337 059a 368C5C31 12 mov %ds,%ss:0x12\(%ecx,%esi,1\) + 338 059f 368C5C32 12 mov %ds,%ss:0x12\(%edx,%esi,1\) + 339 05a4 368C5C33 12 mov %ds,%ss:0x12\(%ebx,%esi,1\) + 340 05a9 8C5C3412 mov %ds,%ss:0x12\(%esp,%esi,1\) + 341 05ad 8C5C3512 mov %ds,%ss:0x12\(%ebp,%esi,1\) + 342 05b1 368C5C36 12 mov %ds,%ss:0x12\(%esi,%esi,1\) + 343 05b6 368C5C37 12 mov %ds,%ss:0x12\(%edi,%esi,1\) + 344 05bb 368C5C38 12 mov %ds,%ss:0x12\(%eax,%edi,1\) + 345 05c0 368C5C39 12 mov %ds,%ss:0x12\(%ecx,%edi,1\) + 346 05c5 368C5C3A 12 mov %ds,%ss:0x12\(%edx,%edi,1\) + 347 05ca 368C5C3B 12 mov %ds,%ss:0x12\(%ebx,%edi,1\) + 348 05cf 8C5C3C12 mov %ds,%ss:0x12\(%esp,%edi,1\) + 349 05d3 8C5C3D12 mov %ds,%ss:0x12\(%ebp,%edi,1\) + 350 05d7 368C5C3E 12 mov %ds,%ss:0x12\(%esi,%edi,1\) + 351 05dc 368C5C3F 12 mov %ds,%ss:0x12\(%edi,%edi,1\) + 352 05e1 368C5C40 12 mov %ds,%ss:0x12\(%eax,%eax,2\) + 353 05e6 368C5C41 12 mov %ds,%ss:0x12\(%ecx,%eax,2\) + 354 05eb 368C5C42 12 mov %ds,%ss:0x12\(%edx,%eax,2\) + 355 05f0 368C5C43 12 mov %ds,%ss:0x12\(%ebx,%eax,2\) + 356 05f5 8C5C4412 mov %ds,%ss:0x12\(%esp,%eax,2\) + 357 05f9 8C5C4512 mov %ds,%ss:0x12\(%ebp,%eax,2\) + 358 05fd 368C5C46 12 mov %ds,%ss:0x12\(%esi,%eax,2\) + 359 0602 368C5C47 12 mov %ds,%ss:0x12\(%edi,%eax,2\) + 360 0607 368C5C48 12 mov %ds,%ss:0x12\(%eax,%ecx,2\) + 361 060c 368C5C49 12 mov %ds,%ss:0x12\(%ecx,%ecx,2\) + 362 0611 368C5C4A 12 mov %ds,%ss:0x12\(%edx,%ecx,2\) + 363 0616 368C5C4B 12 mov %ds,%ss:0x12\(%ebx,%ecx,2\) + 364 061b 8C5C4C12 mov %ds,%ss:0x12\(%esp,%ecx,2\) + 365 061f 8C5C4D12 mov %ds,%ss:0x12\(%ebp,%ecx,2\) + 366 0623 368C5C4E 12 mov %ds,%ss:0x12\(%esi,%ecx,2\) + 367 0628 368C5C4F 12 mov %ds,%ss:0x12\(%edi,%ecx,2\) + 368 062d 368C5C50 12 mov %ds,%ss:0x12\(%eax,%edx,2\) + 369 0632 368C5C51 12 mov %ds,%ss:0x12\(%ecx,%edx,2\) + 370 0637 368C5C52 12 mov %ds,%ss:0x12\(%edx,%edx,2\) + 371 063c 368C5C53 12 mov %ds,%ss:0x12\(%ebx,%edx,2\) + 372 0641 8C5C5412 mov %ds,%ss:0x12\(%esp,%edx,2\) + 373 0645 8C5C5512 mov %ds,%ss:0x12\(%ebp,%edx,2\) + 374 0649 368C5C56 12 mov %ds,%ss:0x12\(%esi,%edx,2\) + 375 064e 368C5C57 12 mov %ds,%ss:0x12\(%edi,%edx,2\) + 376 0653 368C5C58 12 mov %ds,%ss:0x12\(%eax,%ebx,2\) + 377 0658 368C5C59 12 mov %ds,%ss:0x12\(%ecx,%ebx,2\) + 378 065d 368C5C5A 12 mov %ds,%ss:0x12\(%edx,%ebx,2\) + 379 0662 368C5C5B 12 mov %ds,%ss:0x12\(%ebx,%ebx,2\) + 380 0667 8C5C5C12 mov %ds,%ss:0x12\(%esp,%ebx,2\) + 381 066b 8C5C5D12 mov %ds,%ss:0x12\(%ebp,%ebx,2\) + 382 066f 368C5C5E 12 mov %ds,%ss:0x12\(%esi,%ebx,2\) + 383 0674 368C5C5F 12 mov %ds,%ss:0x12\(%edi,%ebx,2\) + 384 0679 368C5812 mov %ds,%ss:0x12\(%eax,2\) +.*Warning:.* + 385 067d 368C5912 mov %ds,%ss:0x12\(%ecx,2\) +.*Warning:.* + 386 0681 368C5A12 mov %ds,%ss:0x12\(%edx,2\) +.*Warning:.* + 387 0685 368C5B12 mov %ds,%ss:0x12\(%ebx,2\) +.*Warning:.* + 388 0689 8C5C2412 mov %ds,%ss:0x12\(%esp,2\) +.*Warning:.* + 389 068d 8C5D12 mov %ds,%ss:0x12\(%ebp,2\) +.*Warning:.* + 390 0690 368C5E12 mov %ds,%ss:0x12\(%esi,2\) +.*Warning:.* + 391 0694 368C5F12 mov %ds,%ss:0x12\(%edi,2\) +.*Warning:.* + 392 0698 368C5C68 12 mov %ds,%ss:0x12\(%eax,%ebp,2\) + 393 069d 368C5C69 12 mov %ds,%ss:0x12\(%ecx,%ebp,2\) + 394 06a2 368C5C6A 12 mov %ds,%ss:0x12\(%edx,%ebp,2\) + 395 06a7 368C5C6B 12 mov %ds,%ss:0x12\(%ebx,%ebp,2\) + 396 06ac 8C5C6C12 mov %ds,%ss:0x12\(%esp,%ebp,2\) + 397 06b0 8C5C6D12 mov %ds,%ss:0x12\(%ebp,%ebp,2\) + 398 06b4 368C5C6E 12 mov %ds,%ss:0x12\(%esi,%ebp,2\) + 399 06b9 368C5C6F 12 mov %ds,%ss:0x12\(%edi,%ebp,2\) + 400 06be 368C5C70 12 mov %ds,%ss:0x12\(%eax,%esi,2\) + 401 06c3 368C5C71 12 mov %ds,%ss:0x12\(%ecx,%esi,2\) + 402 06c8 368C5C72 12 mov %ds,%ss:0x12\(%edx,%esi,2\) + 403 06cd 368C5C73 12 mov %ds,%ss:0x12\(%ebx,%esi,2\) + 404 06d2 8C5C7412 mov %ds,%ss:0x12\(%esp,%esi,2\) + 405 06d6 8C5C7512 mov %ds,%ss:0x12\(%ebp,%esi,2\) + 406 06da 368C5C76 12 mov %ds,%ss:0x12\(%esi,%esi,2\) + 407 06df 368C5C77 12 mov %ds,%ss:0x12\(%edi,%esi,2\) + 408 06e4 368C5C78 12 mov %ds,%ss:0x12\(%eax,%edi,2\) + 409 06e9 368C5C79 12 mov %ds,%ss:0x12\(%ecx,%edi,2\) + 410 06ee 368C5C7A 12 mov %ds,%ss:0x12\(%edx,%edi,2\) + 411 06f3 368C5C7B 12 mov %ds,%ss:0x12\(%ebx,%edi,2\) + 412 06f8 8C5C7C12 mov %ds,%ss:0x12\(%esp,%edi,2\) + 413 06fc 8C5C7D12 mov %ds,%ss:0x12\(%ebp,%edi,2\) + 414 0700 368C5C7E 12 mov %ds,%ss:0x12\(%esi,%edi,2\) + 415 0705 368C5C7F 12 mov %ds,%ss:0x12\(%edi,%edi,2\) + 416 070a 368C5C80 12 mov %ds,%ss:0x12\(%eax,%eax,4\) + 417 070f 368C5C81 12 mov %ds,%ss:0x12\(%ecx,%eax,4\) + 418 0714 368C5C82 12 mov %ds,%ss:0x12\(%edx,%eax,4\) + 419 0719 368C5C83 12 mov %ds,%ss:0x12\(%ebx,%eax,4\) + 420 071e 8C5C8412 mov %ds,%ss:0x12\(%esp,%eax,4\) + 421 0722 8C5C8512 mov %ds,%ss:0x12\(%ebp,%eax,4\) + 422 0726 368C5C86 12 mov %ds,%ss:0x12\(%esi,%eax,4\) + 423 072b 368C5C87 12 mov %ds,%ss:0x12\(%edi,%eax,4\) + 424 0730 368C5C88 12 mov %ds,%ss:0x12\(%eax,%ecx,4\) + 425 0735 368C5C89 12 mov %ds,%ss:0x12\(%ecx,%ecx,4\) + 426 073a 368C5C8A 12 mov %ds,%ss:0x12\(%edx,%ecx,4\) + 427 073f 368C5C8B 12 mov %ds,%ss:0x12\(%ebx,%ecx,4\) + 428 0744 8C5C8C12 mov %ds,%ss:0x12\(%esp,%ecx,4\) + 429 0748 8C5C8D12 mov %ds,%ss:0x12\(%ebp,%ecx,4\) + 430 074c 368C5C8E 12 mov %ds,%ss:0x12\(%esi,%ecx,4\) + 431 0751 368C5C8F 12 mov %ds,%ss:0x12\(%edi,%ecx,4\) + 432 0756 368C5C90 12 mov %ds,%ss:0x12\(%eax,%edx,4\) + 433 075b 368C5C91 12 mov %ds,%ss:0x12\(%ecx,%edx,4\) + 434 0760 368C5C92 12 mov %ds,%ss:0x12\(%edx,%edx,4\) + 435 0765 368C5C93 12 mov %ds,%ss:0x12\(%ebx,%edx,4\) + 436 076a 8C5C9412 mov %ds,%ss:0x12\(%esp,%edx,4\) + 437 076e 8C5C9512 mov %ds,%ss:0x12\(%ebp,%edx,4\) + 438 0772 368C5C96 12 mov %ds,%ss:0x12\(%esi,%edx,4\) + 439 0777 368C5C97 12 mov %ds,%ss:0x12\(%edi,%edx,4\) + 440 077c 368C5C98 12 mov %ds,%ss:0x12\(%eax,%ebx,4\) + 441 0781 368C5C99 12 mov %ds,%ss:0x12\(%ecx,%ebx,4\) + 442 0786 368C5C9A 12 mov %ds,%ss:0x12\(%edx,%ebx,4\) + 443 078b 368C5C9B 12 mov %ds,%ss:0x12\(%ebx,%ebx,4\) + 444 0790 8C5C9C12 mov %ds,%ss:0x12\(%esp,%ebx,4\) + 445 0794 8C5C9D12 mov %ds,%ss:0x12\(%ebp,%ebx,4\) + 446 0798 368C5C9E 12 mov %ds,%ss:0x12\(%esi,%ebx,4\) + 447 079d 368C5C9F 12 mov %ds,%ss:0x12\(%edi,%ebx,4\) + 448 07a2 368C5812 mov %ds,%ss:0x12\(%eax,4\) +.*Warning:.* + 449 07a6 368C5912 mov %ds,%ss:0x12\(%ecx,4\) +.*Warning:.* + 450 07aa 368C5A12 mov %ds,%ss:0x12\(%edx,4\) +.*Warning:.* + 451 07ae 368C5B12 mov %ds,%ss:0x12\(%ebx,4\) +.*Warning:.* + 452 07b2 8C5C2412 mov %ds,%ss:0x12\(%esp,4\) +.*Warning:.* + 453 07b6 8C5D12 mov %ds,%ss:0x12\(%ebp,4\) +.*Warning:.* + 454 07b9 368C5E12 mov %ds,%ss:0x12\(%esi,4\) +.*Warning:.* + 455 07bd 368C5F12 mov %ds,%ss:0x12\(%edi,4\) +.*Warning:.* + 456 07c1 368C5CA8 12 mov %ds,%ss:0x12\(%eax,%ebp,4\) + 457 07c6 368C5CA9 12 mov %ds,%ss:0x12\(%ecx,%ebp,4\) + 458 07cb 368C5CAA 12 mov %ds,%ss:0x12\(%edx,%ebp,4\) + 459 07d0 368C5CAB 12 mov %ds,%ss:0x12\(%ebx,%ebp,4\) + 460 07d5 8C5CAC12 mov %ds,%ss:0x12\(%esp,%ebp,4\) + 461 07d9 8C5CAD12 mov %ds,%ss:0x12\(%ebp,%ebp,4\) + 462 07dd 368C5CAE 12 mov %ds,%ss:0x12\(%esi,%ebp,4\) + 463 07e2 368C5CAF 12 mov %ds,%ss:0x12\(%edi,%ebp,4\) + 464 07e7 368C5CB0 12 mov %ds,%ss:0x12\(%eax,%esi,4\) + 465 07ec 368C5CB1 12 mov %ds,%ss:0x12\(%ecx,%esi,4\) + 466 07f1 368C5CB2 12 mov %ds,%ss:0x12\(%edx,%esi,4\) + 467 07f6 368C5CB3 12 mov %ds,%ss:0x12\(%ebx,%esi,4\) + 468 07fb 8C5CB412 mov %ds,%ss:0x12\(%esp,%esi,4\) + 469 07ff 8C5CB512 mov %ds,%ss:0x12\(%ebp,%esi,4\) + 470 0803 368C5CB6 12 mov %ds,%ss:0x12\(%esi,%esi,4\) + 471 0808 368C5CB7 12 mov %ds,%ss:0x12\(%edi,%esi,4\) + 472 080d 368C5CB8 12 mov %ds,%ss:0x12\(%eax,%edi,4\) + 473 0812 368C5CB9 12 mov %ds,%ss:0x12\(%ecx,%edi,4\) + 474 0817 368C5CBA 12 mov %ds,%ss:0x12\(%edx,%edi,4\) + 475 081c 368C5CBB 12 mov %ds,%ss:0x12\(%ebx,%edi,4\) + 476 0821 8C5CBC12 mov %ds,%ss:0x12\(%esp,%edi,4\) + 477 0825 8C5CBD12 mov %ds,%ss:0x12\(%ebp,%edi,4\) + 478 0829 368C5CBE 12 mov %ds,%ss:0x12\(%esi,%edi,4\) + 479 082e 368C5CBF 12 mov %ds,%ss:0x12\(%edi,%edi,4\) + 480 0833 368C5CC0 12 mov %ds,%ss:0x12\(%eax,%eax,8\) + 481 0838 368C5CC1 12 mov %ds,%ss:0x12\(%ecx,%eax,8\) + 482 083d 368C5CC2 12 mov %ds,%ss:0x12\(%edx,%eax,8\) + 483 0842 368C5CC3 12 mov %ds,%ss:0x12\(%ebx,%eax,8\) + 484 0847 8C5CC412 mov %ds,%ss:0x12\(%esp,%eax,8\) + 485 084b 8C5CC512 mov %ds,%ss:0x12\(%ebp,%eax,8\) + 486 084f 368C5CC6 12 mov %ds,%ss:0x12\(%esi,%eax,8\) + 487 0854 368C5CC7 12 mov %ds,%ss:0x12\(%edi,%eax,8\) + 488 0859 368C5CC8 12 mov %ds,%ss:0x12\(%eax,%ecx,8\) + 489 085e 368C5CC9 12 mov %ds,%ss:0x12\(%ecx,%ecx,8\) + 490 0863 368C5CCA 12 mov %ds,%ss:0x12\(%edx,%ecx,8\) + 491 0868 368C5CCB 12 mov %ds,%ss:0x12\(%ebx,%ecx,8\) + 492 086d 8C5CCC12 mov %ds,%ss:0x12\(%esp,%ecx,8\) + 493 0871 8C5CCD12 mov %ds,%ss:0x12\(%ebp,%ecx,8\) + 494 0875 368C5CCE 12 mov %ds,%ss:0x12\(%esi,%ecx,8\) + 495 087a 368C5CCF 12 mov %ds,%ss:0x12\(%edi,%ecx,8\) + 496 087f 368C5CD0 12 mov %ds,%ss:0x12\(%eax,%edx,8\) + 497 0884 368C5CD1 12 mov %ds,%ss:0x12\(%ecx,%edx,8\) + 498 0889 368C5CD2 12 mov %ds,%ss:0x12\(%edx,%edx,8\) + 499 088e 368C5CD3 12 mov %ds,%ss:0x12\(%ebx,%edx,8\) + 500 0893 8C5CD412 mov %ds,%ss:0x12\(%esp,%edx,8\) + 501 0897 8C5CD512 mov %ds,%ss:0x12\(%ebp,%edx,8\) + 502 089b 368C5CD6 12 mov %ds,%ss:0x12\(%esi,%edx,8\) + 503 08a0 368C5CD7 12 mov %ds,%ss:0x12\(%edi,%edx,8\) + 504 08a5 368C5CD8 12 mov %ds,%ss:0x12\(%eax,%ebx,8\) + 505 08aa 368C5CD9 12 mov %ds,%ss:0x12\(%ecx,%ebx,8\) + 506 08af 368C5CDA 12 mov %ds,%ss:0x12\(%edx,%ebx,8\) + 507 08b4 368C5CDB 12 mov %ds,%ss:0x12\(%ebx,%ebx,8\) + 508 08b9 8C5CDC12 mov %ds,%ss:0x12\(%esp,%ebx,8\) + 509 08bd 8C5CDD12 mov %ds,%ss:0x12\(%ebp,%ebx,8\) + 510 08c1 368C5CDE 12 mov %ds,%ss:0x12\(%esi,%ebx,8\) + 511 08c6 368C5CDF 12 mov %ds,%ss:0x12\(%edi,%ebx,8\) + 512 08cb 368C5812 mov %ds,%ss:0x12\(%eax,8\) +.*Warning:.* + 513 08cf 368C5912 mov %ds,%ss:0x12\(%ecx,8\) +.*Warning:.* + 514 08d3 368C5A12 mov %ds,%ss:0x12\(%edx,8\) +.*Warning:.* + 515 08d7 368C5B12 mov %ds,%ss:0x12\(%ebx,8\) +.*Warning:.* + 516 08db 8C5C2412 mov %ds,%ss:0x12\(%esp,8\) +.*Warning:.* + 517 08df 8C5D12 mov %ds,%ss:0x12\(%ebp,8\) +.*Warning:.* + 518 08e2 368C5E12 mov %ds,%ss:0x12\(%esi,8\) +.*Warning:.* + 519 08e6 368C5F12 mov %ds,%ss:0x12\(%edi,8\) +.*Warning:.* + 520 08ea 368C5CE8 12 mov %ds,%ss:0x12\(%eax,%ebp,8\) + 521 08ef 368C5CE9 12 mov %ds,%ss:0x12\(%ecx,%ebp,8\) + 522 08f4 368C5CEA 12 mov %ds,%ss:0x12\(%edx,%ebp,8\) + 523 08f9 368C5CEB 12 mov %ds,%ss:0x12\(%ebx,%ebp,8\) + 524 08fe 8C5CEC12 mov %ds,%ss:0x12\(%esp,%ebp,8\) + 525 0902 8C5CED12 mov %ds,%ss:0x12\(%ebp,%ebp,8\) + 526 0906 368C5CEE 12 mov %ds,%ss:0x12\(%esi,%ebp,8\) + 527 090b 368C5CEF 12 mov %ds,%ss:0x12\(%edi,%ebp,8\) + 528 0910 368C5CF0 12 mov %ds,%ss:0x12\(%eax,%esi,8\) + 529 0915 368C5CF1 12 mov %ds,%ss:0x12\(%ecx,%esi,8\) + 530 091a 368C5CF2 12 mov %ds,%ss:0x12\(%edx,%esi,8\) + 531 091f 368C5CF3 12 mov %ds,%ss:0x12\(%ebx,%esi,8\) + 532 0924 8C5CF412 mov %ds,%ss:0x12\(%esp,%esi,8\) + 533 0928 8C5CF512 mov %ds,%ss:0x12\(%ebp,%esi,8\) + 534 092c 368C5CF6 12 mov %ds,%ss:0x12\(%esi,%esi,8\) + 535 0931 368C5CF7 12 mov %ds,%ss:0x12\(%edi,%esi,8\) + 536 0936 368C5CF8 12 mov %ds,%ss:0x12\(%eax,%edi,8\) + 537 093b 368C5CFA 12 mov %ds,%ss:0x12\(%edx,%edi,8\) + 538 0940 368C5CF9 12 mov %ds,%ss:0x12\(%ecx,%edi,8\) + 539 0945 368C5CFB 12 mov %ds,%ss:0x12\(%ebx,%edi,8\) + 540 094a 8C5CFC12 mov %ds,%ss:0x12\(%esp,%edi,8\) + 541 094e 8C5CFD12 mov %ds,%ss:0x12\(%ebp,%edi,8\) + 542 0952 368C5CFE 12 mov %ds,%ss:0x12\(%esi,%edi,8\) + 543 0957 368C5CFF 12 mov %ds,%ss:0x12\(%edi,%edi,8\) + 544 095c 368C9C00 78563412 mov %ds,%ss:0x12345678\(%eax,%eax,1\) + 545 0964 368C9C01 78563412 mov %ds,%ss:0x12345678\(%ecx,%eax,1\) + 546 096c 368C9C02 78563412 mov %ds,%ss:0x12345678\(%edx,%eax,1\) + 547 0974 368C9C03 78563412 mov %ds,%ss:0x12345678\(%ebx,%eax,1\) + 548 097c 8C9C0478 563412 mov %ds,%ss:0x12345678\(%esp,%eax,1\) + 549 0983 8C9C0578 563412 mov %ds,%ss:0x12345678\(%ebp,%eax,1\) + 550 098a 368C9C06 78563412 mov %ds,%ss:0x12345678\(%esi,%eax,1\) + 551 0992 368C9C07 78563412 mov %ds,%ss:0x12345678\(%edi,%eax,1\) + 552 099a 368C9C08 78563412 mov %ds,%ss:0x12345678\(%eax,%ecx,1\) + 553 09a2 368C9C09 78563412 mov %ds,%ss:0x12345678\(%ecx,%ecx,1\) + 554 09aa 368C9C0A 78563412 mov %ds,%ss:0x12345678\(%edx,%ecx,1\) + 555 09b2 368C9C0B 78563412 mov %ds,%ss:0x12345678\(%ebx,%ecx,1\) + 556 09ba 8C9C0C78 563412 mov %ds,%ss:0x12345678\(%esp,%ecx,1\) + 557 09c1 8C9C0D78 563412 mov %ds,%ss:0x12345678\(%ebp,%ecx,1\) + 558 09c8 368C9C0E 78563412 mov %ds,%ss:0x12345678\(%esi,%ecx,1\) + 559 09d0 368C9C0F 78563412 mov %ds,%ss:0x12345678\(%edi,%ecx,1\) + 560 09d8 368C9C10 78563412 mov %ds,%ss:0x12345678\(%eax,%edx,1\) + 561 09e0 368C9C11 78563412 mov %ds,%ss:0x12345678\(%ecx,%edx,1\) + 562 09e8 368C9C12 78563412 mov %ds,%ss:0x12345678\(%edx,%edx,1\) + 563 09f0 368C9C13 78563412 mov %ds,%ss:0x12345678\(%ebx,%edx,1\) + 564 09f8 8C9C1478 563412 mov %ds,%ss:0x12345678\(%esp,%edx,1\) + 565 09ff 8C9C1578 563412 mov %ds,%ss:0x12345678\(%ebp,%edx,1\) + 566 0a06 368C9C16 78563412 mov %ds,%ss:0x12345678\(%esi,%edx,1\) + 567 0a0e 368C9C17 78563412 mov %ds,%ss:0x12345678\(%edi,%edx,1\) + 568 0a16 368C9C18 78563412 mov %ds,%ss:0x12345678\(%eax,%ebx,1\) + 569 0a1e 368C9C19 78563412 mov %ds,%ss:0x12345678\(%ecx,%ebx,1\) + 570 0a26 368C9C1A 78563412 mov %ds,%ss:0x12345678\(%edx,%ebx,1\) + 571 0a2e 368C9C1B 78563412 mov %ds,%ss:0x12345678\(%ebx,%ebx,1\) + 572 0a36 8C9C1C78 563412 mov %ds,%ss:0x12345678\(%esp,%ebx,1\) + 573 0a3d 8C9C1D78 563412 mov %ds,%ss:0x12345678\(%ebp,%ebx,1\) + 574 0a44 368C9C1E 78563412 mov %ds,%ss:0x12345678\(%esi,%ebx,1\) + 575 0a4c 368C9C1F 78563412 mov %ds,%ss:0x12345678\(%edi,%ebx,1\) + 576 0a54 368C9878 563412 mov %ds,%ss:0x12345678\(%eax,1\) + 577 0a5b 368C9978 563412 mov %ds,%ss:0x12345678\(%ecx,1\) + 578 0a62 368C9A78 563412 mov %ds,%ss:0x12345678\(%edx,1\) + 579 0a69 368C9B78 563412 mov %ds,%ss:0x12345678\(%ebx,1\) + 580 0a70 8C9C2478 563412 mov %ds,%ss:0x12345678\(%esp,1\) + 581 0a77 8C9D7856 3412 mov %ds,%ss:0x12345678\(%ebp,1\) + 582 0a7d 368C9E78 563412 mov %ds,%ss:0x12345678\(%esi,1\) + 583 0a84 368C9F78 563412 mov %ds,%ss:0x12345678\(%edi,1\) + 584 0a8b 368C9C28 78563412 mov %ds,%ss:0x12345678\(%eax,%ebp,1\) + 585 0a93 368C9C29 78563412 mov %ds,%ss:0x12345678\(%ecx,%ebp,1\) + 586 0a9b 368C9C2A 78563412 mov %ds,%ss:0x12345678\(%edx,%ebp,1\) + 587 0aa3 368C9C2B 78563412 mov %ds,%ss:0x12345678\(%ebx,%ebp,1\) + 588 0aab 8C9C2C78 563412 mov %ds,%ss:0x12345678\(%esp,%ebp,1\) + 589 0ab2 8C9C2D78 563412 mov %ds,%ss:0x12345678\(%ebp,%ebp,1\) + 590 0ab9 368C9C2E 78563412 mov %ds,%ss:0x12345678\(%esi,%ebp,1\) + 591 0ac1 368C9C2F 78563412 mov %ds,%ss:0x12345678\(%edi,%ebp,1\) + 592 0ac9 368C9C30 78563412 mov %ds,%ss:0x12345678\(%eax,%esi,1\) + 593 0ad1 368C9C31 78563412 mov %ds,%ss:0x12345678\(%ecx,%esi,1\) + 594 0ad9 368C9C32 78563412 mov %ds,%ss:0x12345678\(%edx,%esi,1\) + 595 0ae1 368C9C33 78563412 mov %ds,%ss:0x12345678\(%ebx,%esi,1\) + 596 0ae9 8C9C3478 563412 mov %ds,%ss:0x12345678\(%esp,%esi,1\) + 597 0af0 8C9C3578 563412 mov %ds,%ss:0x12345678\(%ebp,%esi,1\) + 598 0af7 368C9C36 78563412 mov %ds,%ss:0x12345678\(%esi,%esi,1\) + 599 0aff 368C9C37 78563412 mov %ds,%ss:0x12345678\(%edi,%esi,1\) + 600 0b07 368C9C38 78563412 mov %ds,%ss:0x12345678\(%eax,%edi,1\) + 601 0b0f 368C9C39 78563412 mov %ds,%ss:0x12345678\(%ecx,%edi,1\) + 602 0b17 368C9C3A 78563412 mov %ds,%ss:0x12345678\(%edx,%edi,1\) + 603 0b1f 368C9C3B 78563412 mov %ds,%ss:0x12345678\(%ebx,%edi,1\) + 604 0b27 8C9C3C78 563412 mov %ds,%ss:0x12345678\(%esp,%edi,1\) + 605 0b2e 8C9C3D78 563412 mov %ds,%ss:0x12345678\(%ebp,%edi,1\) + 606 0b35 368C9C3E 78563412 mov %ds,%ss:0x12345678\(%esi,%edi,1\) + 607 0b3d 368C9C3F 78563412 mov %ds,%ss:0x12345678\(%edi,%edi,1\) + 608 0b45 368C9C40 78563412 mov %ds,%ss:0x12345678\(%eax,%eax,2\) + 609 0b4d 368C9C41 78563412 mov %ds,%ss:0x12345678\(%ecx,%eax,2\) + 610 0b55 368C9C42 78563412 mov %ds,%ss:0x12345678\(%edx,%eax,2\) + 611 0b5d 368C9C43 78563412 mov %ds,%ss:0x12345678\(%ebx,%eax,2\) + 612 0b65 8C9C4478 563412 mov %ds,%ss:0x12345678\(%esp,%eax,2\) + 613 0b6c 8C9C4578 563412 mov %ds,%ss:0x12345678\(%ebp,%eax,2\) + 614 0b73 368C9C46 78563412 mov %ds,%ss:0x12345678\(%esi,%eax,2\) + 615 0b7b 368C9C47 78563412 mov %ds,%ss:0x12345678\(%edi,%eax,2\) + 616 0b83 368C9C48 78563412 mov %ds,%ss:0x12345678\(%eax,%ecx,2\) + 617 0b8b 368C9C49 78563412 mov %ds,%ss:0x12345678\(%ecx,%ecx,2\) + 618 0b93 368C9C4A 78563412 mov %ds,%ss:0x12345678\(%edx,%ecx,2\) + 619 0b9b 368C9C4B 78563412 mov %ds,%ss:0x12345678\(%ebx,%ecx,2\) + 620 0ba3 8C9C4C78 563412 mov %ds,%ss:0x12345678\(%esp,%ecx,2\) + 621 0baa 8C9C4D78 563412 mov %ds,%ss:0x12345678\(%ebp,%ecx,2\) + 622 0bb1 368C9C4E 78563412 mov %ds,%ss:0x12345678\(%esi,%ecx,2\) + 623 0bb9 368C9C4F 78563412 mov %ds,%ss:0x12345678\(%edi,%ecx,2\) + 624 0bc1 368C9C50 78563412 mov %ds,%ss:0x12345678\(%eax,%edx,2\) + 625 0bc9 368C9C51 78563412 mov %ds,%ss:0x12345678\(%ecx,%edx,2\) + 626 0bd1 368C9C52 78563412 mov %ds,%ss:0x12345678\(%edx,%edx,2\) + 627 0bd9 368C9C53 78563412 mov %ds,%ss:0x12345678\(%ebx,%edx,2\) + 628 0be1 8C9C5478 563412 mov %ds,%ss:0x12345678\(%esp,%edx,2\) + 629 0be8 8C9C5578 563412 mov %ds,%ss:0x12345678\(%ebp,%edx,2\) + 630 0bef 368C9C56 78563412 mov %ds,%ss:0x12345678\(%esi,%edx,2\) + 631 0bf7 368C9C57 78563412 mov %ds,%ss:0x12345678\(%edi,%edx,2\) + 632 0bff 368C9C58 78563412 mov %ds,%ss:0x12345678\(%eax,%ebx,2\) + 633 0c07 368C9C59 78563412 mov %ds,%ss:0x12345678\(%ecx,%ebx,2\) + 634 0c0f 368C9C5A 78563412 mov %ds,%ss:0x12345678\(%edx,%ebx,2\) + 635 0c17 368C9C5B 78563412 mov %ds,%ss:0x12345678\(%ebx,%ebx,2\) + 636 0c1f 8C9C5C78 563412 mov %ds,%ss:0x12345678\(%esp,%ebx,2\) + 637 0c26 8C9C5D78 563412 mov %ds,%ss:0x12345678\(%ebp,%ebx,2\) + 638 0c2d 368C9C5E 78563412 mov %ds,%ss:0x12345678\(%esi,%ebx,2\) + 639 0c35 368C9C5F 78563412 mov %ds,%ss:0x12345678\(%edi,%ebx,2\) + 640 0c3d 368C9878 563412 mov %ds,%ss:0x12345678\(%eax,2\) +.*Warning:.* + 641 0c44 368C9978 563412 mov %ds,%ss:0x12345678\(%ecx,2\) +.*Warning:.* + 642 0c4b 368C9A78 563412 mov %ds,%ss:0x12345678\(%edx,2\) +.*Warning:.* + 643 0c52 368C9B78 563412 mov %ds,%ss:0x12345678\(%ebx,2\) +.*Warning:.* + 644 0c59 8C9C2478 563412 mov %ds,%ss:0x12345678\(%esp,2\) +.*Warning:.* + 645 0c60 8C9D7856 3412 mov %ds,%ss:0x12345678\(%ebp,2\) +.*Warning:.* + 646 0c66 368C9E78 563412 mov %ds,%ss:0x12345678\(%esi,2\) +.*Warning:.* + 647 0c6d 368C9F78 563412 mov %ds,%ss:0x12345678\(%edi,2\) +.*Warning:.* + 648 0c74 368C9C68 78563412 mov %ds,%ss:0x12345678\(%eax,%ebp,2\) + 649 0c7c 368C9C69 78563412 mov %ds,%ss:0x12345678\(%ecx,%ebp,2\) + 650 0c84 368C9C6A 78563412 mov %ds,%ss:0x12345678\(%edx,%ebp,2\) + 651 0c8c 368C9C6B 78563412 mov %ds,%ss:0x12345678\(%ebx,%ebp,2\) + 652 0c94 8C9C6C78 563412 mov %ds,%ss:0x12345678\(%esp,%ebp,2\) + 653 0c9b 8C9C6D78 563412 mov %ds,%ss:0x12345678\(%ebp,%ebp,2\) + 654 0ca2 368C9C6E 78563412 mov %ds,%ss:0x12345678\(%esi,%ebp,2\) + 655 0caa 368C9C6F 78563412 mov %ds,%ss:0x12345678\(%edi,%ebp,2\) + 656 0cb2 368C9C70 78563412 mov %ds,%ss:0x12345678\(%eax,%esi,2\) + 657 0cba 368C9C71 78563412 mov %ds,%ss:0x12345678\(%ecx,%esi,2\) + 658 0cc2 368C9C72 78563412 mov %ds,%ss:0x12345678\(%edx,%esi,2\) + 659 0cca 368C9C73 78563412 mov %ds,%ss:0x12345678\(%ebx,%esi,2\) + 660 0cd2 8C9C7478 563412 mov %ds,%ss:0x12345678\(%esp,%esi,2\) + 661 0cd9 8C9C7578 563412 mov %ds,%ss:0x12345678\(%ebp,%esi,2\) + 662 0ce0 368C9C76 78563412 mov %ds,%ss:0x12345678\(%esi,%esi,2\) + 663 0ce8 368C9C77 78563412 mov %ds,%ss:0x12345678\(%edi,%esi,2\) + 664 0cf0 368C9C78 78563412 mov %ds,%ss:0x12345678\(%eax,%edi,2\) + 665 0cf8 368C9C79 78563412 mov %ds,%ss:0x12345678\(%ecx,%edi,2\) + 666 0d00 368C9C7A 78563412 mov %ds,%ss:0x12345678\(%edx,%edi,2\) + 667 0d08 368C9C7B 78563412 mov %ds,%ss:0x12345678\(%ebx,%edi,2\) + 668 0d10 8C9C7C78 563412 mov %ds,%ss:0x12345678\(%esp,%edi,2\) + 669 0d17 8C9C7D78 563412 mov %ds,%ss:0x12345678\(%ebp,%edi,2\) + 670 0d1e 368C9C7E 78563412 mov %ds,%ss:0x12345678\(%esi,%edi,2\) + 671 0d26 368C9C7F 78563412 mov %ds,%ss:0x12345678\(%edi,%edi,2\) + 672 0d2e 368C9C80 78563412 mov %ds,%ss:0x12345678\(%eax,%eax,4\) + 673 0d36 368C9C81 78563412 mov %ds,%ss:0x12345678\(%ecx,%eax,4\) + 674 0d3e 368C9C82 78563412 mov %ds,%ss:0x12345678\(%edx,%eax,4\) + 675 0d46 368C9C83 78563412 mov %ds,%ss:0x12345678\(%ebx,%eax,4\) + 676 0d4e 8C9C8478 563412 mov %ds,%ss:0x12345678\(%esp,%eax,4\) + 677 0d55 8C9C8578 563412 mov %ds,%ss:0x12345678\(%ebp,%eax,4\) + 678 0d5c 368C9C86 78563412 mov %ds,%ss:0x12345678\(%esi,%eax,4\) + 679 0d64 368C9C87 78563412 mov %ds,%ss:0x12345678\(%edi,%eax,4\) + 680 0d6c 368C9C88 78563412 mov %ds,%ss:0x12345678\(%eax,%ecx,4\) + 681 0d74 368C9C89 78563412 mov %ds,%ss:0x12345678\(%ecx,%ecx,4\) + 682 0d7c 368C9C8A 78563412 mov %ds,%ss:0x12345678\(%edx,%ecx,4\) + 683 0d84 368C9C8B 78563412 mov %ds,%ss:0x12345678\(%ebx,%ecx,4\) + 684 0d8c 8C9C8C78 563412 mov %ds,%ss:0x12345678\(%esp,%ecx,4\) + 685 0d93 8C9C8D78 563412 mov %ds,%ss:0x12345678\(%ebp,%ecx,4\) + 686 0d9a 368C9C8E 78563412 mov %ds,%ss:0x12345678\(%esi,%ecx,4\) + 687 0da2 368C9C8F 78563412 mov %ds,%ss:0x12345678\(%edi,%ecx,4\) + 688 0daa 368C9C90 78563412 mov %ds,%ss:0x12345678\(%eax,%edx,4\) + 689 0db2 368C9C91 78563412 mov %ds,%ss:0x12345678\(%ecx,%edx,4\) + 690 0dba 368C9C92 78563412 mov %ds,%ss:0x12345678\(%edx,%edx,4\) + 691 0dc2 368C9C93 78563412 mov %ds,%ss:0x12345678\(%ebx,%edx,4\) + 692 0dca 8C9C9478 563412 mov %ds,%ss:0x12345678\(%esp,%edx,4\) + 693 0dd1 8C9C9578 563412 mov %ds,%ss:0x12345678\(%ebp,%edx,4\) + 694 0dd8 368C9C96 78563412 mov %ds,%ss:0x12345678\(%esi,%edx,4\) + 695 0de0 368C9C97 78563412 mov %ds,%ss:0x12345678\(%edi,%edx,4\) + 696 0de8 368C9C98 78563412 mov %ds,%ss:0x12345678\(%eax,%ebx,4\) + 697 0df0 368C9C99 78563412 mov %ds,%ss:0x12345678\(%ecx,%ebx,4\) + 698 0df8 368C9C9A 78563412 mov %ds,%ss:0x12345678\(%edx,%ebx,4\) + 699 0e00 368C9C9B 78563412 mov %ds,%ss:0x12345678\(%ebx,%ebx,4\) + 700 0e08 8C9C9C78 563412 mov %ds,%ss:0x12345678\(%esp,%ebx,4\) + 701 0e0f 8C9C9D78 563412 mov %ds,%ss:0x12345678\(%ebp,%ebx,4\) + 702 0e16 368C9C9E 78563412 mov %ds,%ss:0x12345678\(%esi,%ebx,4\) + 703 0e1e 368C9C9F 78563412 mov %ds,%ss:0x12345678\(%edi,%ebx,4\) + 704 0e26 368C9878 563412 mov %ds,%ss:0x12345678\(%eax,4\) +.*Warning:.* + 705 0e2d 368C9978 563412 mov %ds,%ss:0x12345678\(%ecx,4\) +.*Warning:.* + 706 0e34 368C9A78 563412 mov %ds,%ss:0x12345678\(%edx,4\) +.*Warning:.* + 707 0e3b 368C9B78 563412 mov %ds,%ss:0x12345678\(%ebx,4\) +.*Warning:.* + 708 0e42 8C9C2478 563412 mov %ds,%ss:0x12345678\(%esp,4\) +.*Warning:.* + 709 0e49 8C9D7856 3412 mov %ds,%ss:0x12345678\(%ebp,4\) +.*Warning:.* + 710 0e4f 368C9E78 563412 mov %ds,%ss:0x12345678\(%esi,4\) +.*Warning:.* + 711 0e56 368C9F78 563412 mov %ds,%ss:0x12345678\(%edi,4\) +.*Warning:.* + 712 0e5d 368C9CA8 78563412 mov %ds,%ss:0x12345678\(%eax,%ebp,4\) + 713 0e65 368C9CA9 78563412 mov %ds,%ss:0x12345678\(%ecx,%ebp,4\) + 714 0e6d 368C9CAA 78563412 mov %ds,%ss:0x12345678\(%edx,%ebp,4\) + 715 0e75 368C9CAB 78563412 mov %ds,%ss:0x12345678\(%ebx,%ebp,4\) + 716 0e7d 8C9CAC78 563412 mov %ds,%ss:0x12345678\(%esp,%ebp,4\) + 717 0e84 8C9CAD78 563412 mov %ds,%ss:0x12345678\(%ebp,%ebp,4\) + 718 0e8b 368C9CAE 78563412 mov %ds,%ss:0x12345678\(%esi,%ebp,4\) + 719 0e93 368C9CAF 78563412 mov %ds,%ss:0x12345678\(%edi,%ebp,4\) + 720 0e9b 368C9CB0 78563412 mov %ds,%ss:0x12345678\(%eax,%esi,4\) + 721 0ea3 368C9CB1 78563412 mov %ds,%ss:0x12345678\(%ecx,%esi,4\) + 722 0eab 368C9CB2 78563412 mov %ds,%ss:0x12345678\(%edx,%esi,4\) + 723 0eb3 368C9CB3 78563412 mov %ds,%ss:0x12345678\(%ebx,%esi,4\) + 724 0ebb 8C9CB478 563412 mov %ds,%ss:0x12345678\(%esp,%esi,4\) + 725 0ec2 8C9CB578 563412 mov %ds,%ss:0x12345678\(%ebp,%esi,4\) + 726 0ec9 368C9CB6 78563412 mov %ds,%ss:0x12345678\(%esi,%esi,4\) + 727 0ed1 368C9CB7 78563412 mov %ds,%ss:0x12345678\(%edi,%esi,4\) + 728 0ed9 368C9CB8 78563412 mov %ds,%ss:0x12345678\(%eax,%edi,4\) + 729 0ee1 368C9CB9 78563412 mov %ds,%ss:0x12345678\(%ecx,%edi,4\) + 730 0ee9 368C9CBA 78563412 mov %ds,%ss:0x12345678\(%edx,%edi,4\) + 731 0ef1 368C9CBB 78563412 mov %ds,%ss:0x12345678\(%ebx,%edi,4\) + 732 0ef9 8C9CBC78 563412 mov %ds,%ss:0x12345678\(%esp,%edi,4\) + 733 0f00 8C9CBD78 563412 mov %ds,%ss:0x12345678\(%ebp,%edi,4\) + 734 0f07 368C9CBE 78563412 mov %ds,%ss:0x12345678\(%esi,%edi,4\) + 735 0f0f 368C9CBF 78563412 mov %ds,%ss:0x12345678\(%edi,%edi,4\) + 736 0f17 368C9CC0 78563412 mov %ds,%ss:0x12345678\(%eax,%eax,8\) + 737 0f1f 368C9CC1 78563412 mov %ds,%ss:0x12345678\(%ecx,%eax,8\) + 738 0f27 368C9CC2 78563412 mov %ds,%ss:0x12345678\(%edx,%eax,8\) + 739 0f2f 368C9CC3 78563412 mov %ds,%ss:0x12345678\(%ebx,%eax,8\) + 740 0f37 8C9CC478 563412 mov %ds,%ss:0x12345678\(%esp,%eax,8\) + 741 0f3e 8C9CC578 563412 mov %ds,%ss:0x12345678\(%ebp,%eax,8\) + 742 0f45 368C9CC6 78563412 mov %ds,%ss:0x12345678\(%esi,%eax,8\) + 743 0f4d 368C9CC7 78563412 mov %ds,%ss:0x12345678\(%edi,%eax,8\) + 744 0f55 368C9CC8 78563412 mov %ds,%ss:0x12345678\(%eax,%ecx,8\) + 745 0f5d 368C9CC9 78563412 mov %ds,%ss:0x12345678\(%ecx,%ecx,8\) + 746 0f65 368C9CCA 78563412 mov %ds,%ss:0x12345678\(%edx,%ecx,8\) + 747 0f6d 368C9CCB 78563412 mov %ds,%ss:0x12345678\(%ebx,%ecx,8\) + 748 0f75 8C9CCC78 563412 mov %ds,%ss:0x12345678\(%esp,%ecx,8\) + 749 0f7c 8C9CCD78 563412 mov %ds,%ss:0x12345678\(%ebp,%ecx,8\) + 750 0f83 368C9CCE 78563412 mov %ds,%ss:0x12345678\(%esi,%ecx,8\) + 751 0f8b 368C9CCF 78563412 mov %ds,%ss:0x12345678\(%edi,%ecx,8\) + 752 0f93 368C9CD0 78563412 mov %ds,%ss:0x12345678\(%eax,%edx,8\) + 753 0f9b 368C9CD1 78563412 mov %ds,%ss:0x12345678\(%ecx,%edx,8\) + 754 0fa3 368C9CD2 78563412 mov %ds,%ss:0x12345678\(%edx,%edx,8\) + 755 0fab 368C9CD3 78563412 mov %ds,%ss:0x12345678\(%ebx,%edx,8\) + 756 0fb3 8C9CD478 563412 mov %ds,%ss:0x12345678\(%esp,%edx,8\) + 757 0fba 8C9CD578 563412 mov %ds,%ss:0x12345678\(%ebp,%edx,8\) + 758 0fc1 368C9CD6 78563412 mov %ds,%ss:0x12345678\(%esi,%edx,8\) + 759 0fc9 368C9CD7 78563412 mov %ds,%ss:0x12345678\(%edi,%edx,8\) + 760 0fd1 368C9CD8 78563412 mov %ds,%ss:0x12345678\(%eax,%ebx,8\) + 761 0fd9 368C9CD9 78563412 mov %ds,%ss:0x12345678\(%ecx,%ebx,8\) + 762 0fe1 368C9CDA 78563412 mov %ds,%ss:0x12345678\(%edx,%ebx,8\) + 763 0fe9 368C9CDB 78563412 mov %ds,%ss:0x12345678\(%ebx,%ebx,8\) + 764 0ff1 8C9CDC78 563412 mov %ds,%ss:0x12345678\(%esp,%ebx,8\) + 765 0ff8 8C9CDD78 563412 mov %ds,%ss:0x12345678\(%ebp,%ebx,8\) + 766 0fff 368C9CDE 78563412 mov %ds,%ss:0x12345678\(%esi,%ebx,8\) + 767 1007 368C9CDF 78563412 mov %ds,%ss:0x12345678\(%edi,%ebx,8\) + 768 100f 368C9878 563412 mov %ds,%ss:0x12345678\(%eax,8\) +.*Warning:.* + 769 1016 368C9978 563412 mov %ds,%ss:0x12345678\(%ecx,8\) +.*Warning:.* + 770 101d 368C9A78 563412 mov %ds,%ss:0x12345678\(%edx,8\) +.*Warning:.* + 771 1024 368C9B78 563412 mov %ds,%ss:0x12345678\(%ebx,8\) +.*Warning:.* + 772 102b 8C9C2478 563412 mov %ds,%ss:0x12345678\(%esp,8\) +.*Warning:.* + 773 1032 8C9D7856 3412 mov %ds,%ss:0x12345678\(%ebp,8\) +.*Warning:.* + 774 1038 368C9E78 563412 mov %ds,%ss:0x12345678\(%esi,8\) +.*Warning:.* + 775 103f 368C9F78 563412 mov %ds,%ss:0x12345678\(%edi,8\) +.*Warning:.* + 776 1046 368C9CE8 78563412 mov %ds,%ss:0x12345678\(%eax,%ebp,8\) + 777 104e 368C9CE9 78563412 mov %ds,%ss:0x12345678\(%ecx,%ebp,8\) + 778 1056 368C9CEA 78563412 mov %ds,%ss:0x12345678\(%edx,%ebp,8\) + 779 105e 368C9CEB 78563412 mov %ds,%ss:0x12345678\(%ebx,%ebp,8\) + 780 1066 8C9CEC78 563412 mov %ds,%ss:0x12345678\(%esp,%ebp,8\) + 781 106d 8C9CED78 563412 mov %ds,%ss:0x12345678\(%ebp,%ebp,8\) + 782 1074 368C9CEE 78563412 mov %ds,%ss:0x12345678\(%esi,%ebp,8\) + 783 107c 368C9CEF 78563412 mov %ds,%ss:0x12345678\(%edi,%ebp,8\) + 784 1084 368C9CF0 78563412 mov %ds,%ss:0x12345678\(%eax,%esi,8\) + 785 108c 368C9CF1 78563412 mov %ds,%ss:0x12345678\(%ecx,%esi,8\) + 786 1094 368C9CF2 78563412 mov %ds,%ss:0x12345678\(%edx,%esi,8\) + 787 109c 368C9CF3 78563412 mov %ds,%ss:0x12345678\(%ebx,%esi,8\) + 788 10a4 8C9CF478 563412 mov %ds,%ss:0x12345678\(%esp,%esi,8\) + 789 10ab 8C9CF578 563412 mov %ds,%ss:0x12345678\(%ebp,%esi,8\) + 790 10b2 368C9CF6 78563412 mov %ds,%ss:0x12345678\(%esi,%esi,8\) + 791 10ba 368C9CF7 78563412 mov %ds,%ss:0x12345678\(%edi,%esi,8\) + 792 10c2 368C9CF8 78563412 mov %ds,%ss:0x12345678\(%eax,%edi,8\) + 793 10ca 368C9CFA 78563412 mov %ds,%ss:0x12345678\(%edx,%edi,8\) + 794 10d2 368C9CF9 78563412 mov %ds,%ss:0x12345678\(%ecx,%edi,8\) + 795 10da 368C9CFB 78563412 mov %ds,%ss:0x12345678\(%ebx,%edi,8\) + 796 10e2 8C9CFC78 563412 mov %ds,%ss:0x12345678\(%esp,%edi,8\) + 797 10e9 8C9CFD78 563412 mov %ds,%ss:0x12345678\(%ebp,%edi,8\) + 798 10f0 368C9CFE 78563412 mov %ds,%ss:0x12345678\(%esi,%edi,8\) + 799 10f8 368C9CFF 78563412 mov %ds,%ss:0x12345678\(%edi,%edi,8\) + 800 1100 8C5C0500 mov %ds,%ss:\(%ebp,%eax,1\) + 801 1104 8C5C0D00 mov %ds,%ss:\(%ebp,%ecx,1\) + 802 1108 8C5C1500 mov %ds,%ss:\(%ebp,%edx,1\) + 803 110c 8C5C1D00 mov %ds,%ss:\(%ebp,%ebx,1\) + 804 1110 8C5D00 mov %ds,%ss:\(%ebp,1\) + 805 1113 8C5C2D00 mov %ds,%ss:\(%ebp,%ebp,1\) + 806 1117 8C5C3500 mov %ds,%ss:\(%ebp,%esi,1\) + 807 111b 8C5C3D00 mov %ds,%ss:\(%ebp,%edi,1\) + 808 111f 8C5C4500 mov %ds,%ss:\(%ebp,%eax,2\) + 809 1123 8C5C4D00 mov %ds,%ss:\(%ebp,%ecx,2\) + 810 1127 8C5C5500 mov %ds,%ss:\(%ebp,%edx,2\) + 811 112b 8C5C5D00 mov %ds,%ss:\(%ebp,%ebx,2\) + 812 112f 8C5D00 mov %ds,%ss:\(%ebp,2\) +.*Warning:.* + 813 1132 8C5C6D00 mov %ds,%ss:\(%ebp,%ebp,2\) + 814 1136 8C5C7500 mov %ds,%ss:\(%ebp,%esi,2\) + 815 113a 8C5C7D00 mov %ds,%ss:\(%ebp,%edi,2\) + 816 113e 8C5C8500 mov %ds,%ss:\(%ebp,%eax,4\) + 817 1142 8C5C8D00 mov %ds,%ss:\(%ebp,%ecx,4\) + 818 1146 8C5C9500 mov %ds,%ss:\(%ebp,%edx,4\) + 819 114a 8C5C9D00 mov %ds,%ss:\(%ebp,%ebx,4\) + 820 114e 8C5D00 mov %ds,%ss:\(%ebp,4\) +.*Warning:.* + 821 1151 8C5CAD00 mov %ds,%ss:\(%ebp,%ebp,4\) + 822 1155 8C5CB500 mov %ds,%ss:\(%ebp,%esi,4\) + 823 1159 8C5CBD00 mov %ds,%ss:\(%ebp,%edi,4\) + 824 115d 8C5CC500 mov %ds,%ss:\(%ebp,%eax,8\) + 825 1161 8C5CCD00 mov %ds,%ss:\(%ebp,%ecx,8\) + 826 1165 8C5CD500 mov %ds,%ss:\(%ebp,%edx,8\) + 827 1169 8C5CDD00 mov %ds,%ss:\(%ebp,%ebx,8\) + 828 116d 8C5D00 mov %ds,%ss:\(%ebp,8\) +.*Warning:.* + 829 1170 8C5CED00 mov %ds,%ss:\(%ebp,%ebp,8\) + 830 1174 8C5CF500 mov %ds,%ss:\(%ebp,%esi,8\) + 831 1178 8C5CFD00 mov %ds,%ss:\(%ebp,%edi,8\) + 832 117c 368C1D12 000000 mov %ds,%ss:0x12\(,1\) + 833 1183 368C1D12 000000 mov %ds,%ss:0x12\(,2\) +.*Warning:.* + 834 118a 368C1D12 000000 mov %ds,%ss:0x12\(,4\) +.*Warning:.* + 835 1191 368C1D12 000000 mov %ds,%ss:0x12\(,8\) +.*Warning:.* + 836 1198 8C18 mov %ds,%ds:\(%eax\) + 837 119a 8C19 mov %ds,%ds:\(%ecx\) + 838 119c 8C1A mov %ds,%ds:\(%edx\) + 839 119e 8C1B mov %ds,%ds:\(%ebx\) + 840 11a0 8C1D0000 0000 mov %ds,%ds:0 + 841 11a6 8C1E mov %ds,%ds:\(%esi\) + 842 11a8 8C1F mov %ds,%ds:\(%edi\) + 843 11aa 8C5812 mov %ds,%ds:0x12\(%eax\) + 844 11ad 8C5912 mov %ds,%ds:0x12\(%ecx\) + 845 11b0 8C5A12 mov %ds,%ds:0x12\(%edx\) + 846 11b3 8C5B12 mov %ds,%ds:0x12\(%ebx\) + 847 11b6 3E8C5D12 mov %ds,%ds:0x12\(%ebp\) + 848 11ba 8C5E12 mov %ds,%ds:0x12\(%esi\) + 849 11bd 8C5F12 mov %ds,%ds:0x12\(%edi\) + 850 11c0 8C987856 3412 mov %ds,%ds:0x12345678\(%eax\) + 851 11c6 8C997856 3412 mov %ds,%ds:0x12345678\(%ecx\) + 852 11cc 8C9A7856 3412 mov %ds,%ds:0x12345678\(%edx\) + 853 11d2 8C9B7856 3412 mov %ds,%ds:0x12345678\(%ebx\) + 854 11d8 3E8C9D78 563412 mov %ds,%ds:0x12345678\(%ebp\) + 855 11df 8C9E7856 3412 mov %ds,%ds:0x12345678\(%esi\) + 856 11e5 8C9F7856 3412 mov %ds,%ds:0x12345678\(%edi\) + 857 11eb 8CD8 mov %ds,%eax + 858 11ed 8CD9 mov %ds,%ecx + 859 11ef 8CDA mov %ds,%edx + 860 11f1 8CDB mov %ds,%ebx + 861 11f3 8CDC mov %ds,%esp + 862 11f5 8CDD mov %ds,%ebp + 863 11f7 8CDE mov %ds,%esi + 864 11f9 8CDF mov %ds,%edi + 865 11fb 8C1C00 mov %ds,%ds:\(%eax,%eax,1\) + 866 11fe 8C1C01 mov %ds,%ds:\(%ecx,%eax,1\) + 867 1201 8C1C02 mov %ds,%ds:\(%edx,%eax,1\) + 868 1204 8C1C03 mov %ds,%ds:\(%ebx,%eax,1\) + 869 1207 3E8C1C04 mov %ds,%ds:\(%esp,%eax,1\) + 870 120b 8C1C0500 000000 mov %ds,%ds:\(,%eax,1\) + 871 1212 8C1C06 mov %ds,%ds:\(%esi,%eax,1\) + 872 1215 8C1C07 mov %ds,%ds:\(%edi,%eax,1\) + 873 1218 8C1C08 mov %ds,%ds:\(%eax,%ecx,1\) + 874 121b 8C1C09 mov %ds,%ds:\(%ecx,%ecx,1\) + 875 121e 8C1C0A mov %ds,%ds:\(%edx,%ecx,1\) + 876 1221 8C1C0B mov %ds,%ds:\(%ebx,%ecx,1\) + 877 1224 3E8C1C0C mov %ds,%ds:\(%esp,%ecx,1\) + 878 1228 8C1C0D00 000000 mov %ds,%ds:\(,%ecx,1\) + 879 122f 8C1C0E mov %ds,%ds:\(%esi,%ecx,1\) + 880 1232 8C1C0F mov %ds,%ds:\(%edi,%ecx,1\) + 881 1235 8C1C10 mov %ds,%ds:\(%eax,%edx,1\) + 882 1238 8C1C11 mov %ds,%ds:\(%ecx,%edx,1\) + 883 123b 8C1C12 mov %ds,%ds:\(%edx,%edx,1\) + 884 123e 8C1C13 mov %ds,%ds:\(%ebx,%edx,1\) + 885 1241 3E8C1C14 mov %ds,%ds:\(%esp,%edx,1\) + 886 1245 8C1C1500 000000 mov %ds,%ds:\(,%edx,1\) + 887 124c 8C1C16 mov %ds,%ds:\(%esi,%edx,1\) + 888 124f 8C1C17 mov %ds,%ds:\(%edi,%edx,1\) + 889 1252 8C1C18 mov %ds,%ds:\(%eax,%ebx,1\) + 890 1255 8C1C19 mov %ds,%ds:\(%ecx,%ebx,1\) + 891 1258 8C1C1A mov %ds,%ds:\(%edx,%ebx,1\) + 892 125b 8C1C1B mov %ds,%ds:\(%ebx,%ebx,1\) + 893 125e 3E8C1C1C mov %ds,%ds:\(%esp,%ebx,1\) + 894 1262 8C1C1D00 000000 mov %ds,%ds:\(,%ebx,1\) + 895 1269 8C1C1E mov %ds,%ds:\(%esi,%ebx,1\) + 896 126c 8C1C1F mov %ds,%ds:\(%edi,%ebx,1\) + 897 126f 8C18 mov %ds,%ds:\(%eax,1\) + 898 1271 8C19 mov %ds,%ds:\(%ecx,1\) + 899 1273 8C1A mov %ds,%ds:\(%edx,1\) + 900 1275 8C1B mov %ds,%ds:\(%ebx,1\) + 901 1277 3E8C1C24 mov %ds,%ds:\(%esp,1\) + 902 127b 8C1D0000 0000 mov %ds,%ds:\(,1\) + 903 1281 8C1E mov %ds,%ds:\(%esi,1\) + 904 1283 8C1F mov %ds,%ds:\(%edi,1\) + 905 1285 8C1C28 mov %ds,%ds:\(%eax,%ebp,1\) + 906 1288 8C1C29 mov %ds,%ds:\(%ecx,%ebp,1\) + 907 128b 8C1C2A mov %ds,%ds:\(%edx,%ebp,1\) + 908 128e 8C1C2B mov %ds,%ds:\(%ebx,%ebp,1\) + 909 1291 3E8C1C2C mov %ds,%ds:\(%esp,%ebp,1\) + 910 1295 8C1C2D00 000000 mov %ds,%ds:\(,%ebp,1\) + 911 129c 8C1C2E mov %ds,%ds:\(%esi,%ebp,1\) + 912 129f 8C1C2F mov %ds,%ds:\(%edi,%ebp,1\) + 913 12a2 8C1C30 mov %ds,%ds:\(%eax,%esi,1\) + 914 12a5 8C1C31 mov %ds,%ds:\(%ecx,%esi,1\) + 915 12a8 8C1C32 mov %ds,%ds:\(%edx,%esi,1\) + 916 12ab 8C1C33 mov %ds,%ds:\(%ebx,%esi,1\) + 917 12ae 3E8C1C34 mov %ds,%ds:\(%esp,%esi,1\) + 918 12b2 8C1C3500 000000 mov %ds,%ds:\(,%esi,1\) + 919 12b9 8C1C36 mov %ds,%ds:\(%esi,%esi,1\) + 920 12bc 8C1C37 mov %ds,%ds:\(%edi,%esi,1\) + 921 12bf 8C1C38 mov %ds,%ds:\(%eax,%edi,1\) + 922 12c2 8C1C39 mov %ds,%ds:\(%ecx,%edi,1\) + 923 12c5 8C1C3A mov %ds,%ds:\(%edx,%edi,1\) + 924 12c8 8C1C3B mov %ds,%ds:\(%ebx,%edi,1\) + 925 12cb 3E8C1C3C mov %ds,%ds:\(%esp,%edi,1\) + 926 12cf 8C1C3D00 000000 mov %ds,%ds:\(,%edi,1\) + 927 12d6 8C1C3E mov %ds,%ds:\(%esi,%edi,1\) + 928 12d9 8C1C3F mov %ds,%ds:\(%edi,%edi,1\) + 929 12dc 8C1C40 mov %ds,%ds:\(%eax,%eax,2\) + 930 12df 8C1C41 mov %ds,%ds:\(%ecx,%eax,2\) + 931 12e2 8C1C42 mov %ds,%ds:\(%edx,%eax,2\) + 932 12e5 8C1C43 mov %ds,%ds:\(%ebx,%eax,2\) + 933 12e8 3E8C1C44 mov %ds,%ds:\(%esp,%eax,2\) + 934 12ec 8C1C4500 000000 mov %ds,%ds:\(,%eax,2\) + 935 12f3 8C1C46 mov %ds,%ds:\(%esi,%eax,2\) + 936 12f6 8C1C47 mov %ds,%ds:\(%edi,%eax,2\) + 937 12f9 8C1C48 mov %ds,%ds:\(%eax,%ecx,2\) + 938 12fc 8C1C49 mov %ds,%ds:\(%ecx,%ecx,2\) + 939 12ff 8C1C4A mov %ds,%ds:\(%edx,%ecx,2\) + 940 1302 8C1C4B mov %ds,%ds:\(%ebx,%ecx,2\) + 941 1305 3E8C1C4C mov %ds,%ds:\(%esp,%ecx,2\) + 942 1309 8C1C4D00 000000 mov %ds,%ds:\(,%ecx,2\) + 943 1310 8C1C4E mov %ds,%ds:\(%esi,%ecx,2\) + 944 1313 8C1C4F mov %ds,%ds:\(%edi,%ecx,2\) + 945 1316 8C1C50 mov %ds,%ds:\(%eax,%edx,2\) + 946 1319 8C1C51 mov %ds,%ds:\(%ecx,%edx,2\) + 947 131c 8C1C52 mov %ds,%ds:\(%edx,%edx,2\) + 948 131f 8C1C53 mov %ds,%ds:\(%ebx,%edx,2\) + 949 1322 3E8C1C54 mov %ds,%ds:\(%esp,%edx,2\) + 950 1326 8C1C5500 000000 mov %ds,%ds:\(,%edx,2\) + 951 132d 8C1C56 mov %ds,%ds:\(%esi,%edx,2\) + 952 1330 8C1C57 mov %ds,%ds:\(%edi,%edx,2\) + 953 1333 8C1C58 mov %ds,%ds:\(%eax,%ebx,2\) + 954 1336 8C1C59 mov %ds,%ds:\(%ecx,%ebx,2\) + 955 1339 8C1C5A mov %ds,%ds:\(%edx,%ebx,2\) + 956 133c 8C1C5B mov %ds,%ds:\(%ebx,%ebx,2\) + 957 133f 3E8C1C5C mov %ds,%ds:\(%esp,%ebx,2\) + 958 1343 8C1C5D00 000000 mov %ds,%ds:\(,%ebx,2\) + 959 134a 8C1C5E mov %ds,%ds:\(%esi,%ebx,2\) + 960 134d 8C1C5F mov %ds,%ds:\(%edi,%ebx,2\) + 961 1350 8C18 mov %ds,%ds:\(%eax,2\) +.*Warning:.* + 962 1352 8C19 mov %ds,%ds:\(%ecx,2\) +.*Warning:.* + 963 1354 8C1A mov %ds,%ds:\(%edx,2\) +.*Warning:.* + 964 1356 8C1B mov %ds,%ds:\(%ebx,2\) +.*Warning:.* + 965 1358 3E8C1C24 mov %ds,%ds:\(%esp,2\) +.*Warning:.* + 966 135c 8C1D0000 0000 mov %ds,%ds:\(,2\) +.*Warning:.* + 967 1362 8C1E mov %ds,%ds:\(%esi,2\) +.*Warning:.* + 968 1364 8C1F mov %ds,%ds:\(%edi,2\) +.*Warning:.* + 969 1366 8C1C68 mov %ds,%ds:\(%eax,%ebp,2\) + 970 1369 8C1C69 mov %ds,%ds:\(%ecx,%ebp,2\) + 971 136c 8C1C6A mov %ds,%ds:\(%edx,%ebp,2\) + 972 136f 8C1C6B mov %ds,%ds:\(%ebx,%ebp,2\) + 973 1372 3E8C1C6C mov %ds,%ds:\(%esp,%ebp,2\) + 974 1376 8C1C6D00 000000 mov %ds,%ds:\(,%ebp,2\) + 975 137d 8C1C6E mov %ds,%ds:\(%esi,%ebp,2\) + 976 1380 8C1C6F mov %ds,%ds:\(%edi,%ebp,2\) + 977 1383 8C1C70 mov %ds,%ds:\(%eax,%esi,2\) + 978 1386 8C1C71 mov %ds,%ds:\(%ecx,%esi,2\) + 979 1389 8C1C72 mov %ds,%ds:\(%edx,%esi,2\) + 980 138c 8C1C73 mov %ds,%ds:\(%ebx,%esi,2\) + 981 138f 3E8C1C74 mov %ds,%ds:\(%esp,%esi,2\) + 982 1393 8C1C7500 000000 mov %ds,%ds:\(,%esi,2\) + 983 139a 8C1C76 mov %ds,%ds:\(%esi,%esi,2\) + 984 139d 8C1C77 mov %ds,%ds:\(%edi,%esi,2\) + 985 13a0 8C1C78 mov %ds,%ds:\(%eax,%edi,2\) + 986 13a3 8C1C79 mov %ds,%ds:\(%ecx,%edi,2\) + 987 13a6 8C1C7A mov %ds,%ds:\(%edx,%edi,2\) + 988 13a9 8C1C7B mov %ds,%ds:\(%ebx,%edi,2\) + 989 13ac 3E8C1C7C mov %ds,%ds:\(%esp,%edi,2\) + 990 13b0 8C1C7D00 000000 mov %ds,%ds:\(,%edi,2\) + 991 13b7 8C1C7E mov %ds,%ds:\(%esi,%edi,2\) + 992 13ba 8C1C7F mov %ds,%ds:\(%edi,%edi,2\) + 993 13bd 8C1C80 mov %ds,%ds:\(%eax,%eax,4\) + 994 13c0 8C1C81 mov %ds,%ds:\(%ecx,%eax,4\) + 995 13c3 8C1C82 mov %ds,%ds:\(%edx,%eax,4\) + 996 13c6 8C1C83 mov %ds,%ds:\(%ebx,%eax,4\) + 997 13c9 3E8C1C84 mov %ds,%ds:\(%esp,%eax,4\) + 998 13cd 8C1C8500 000000 mov %ds,%ds:\(,%eax,4\) + 999 13d4 8C1C86 mov %ds,%ds:\(%esi,%eax,4\) + 1000 13d7 8C1C87 mov %ds,%ds:\(%edi,%eax,4\) + 1001 13da 8C1C88 mov %ds,%ds:\(%eax,%ecx,4\) + 1002 13dd 8C1C89 mov %ds,%ds:\(%ecx,%ecx,4\) + 1003 13e0 8C1C8A mov %ds,%ds:\(%edx,%ecx,4\) + 1004 13e3 8C1C8B mov %ds,%ds:\(%ebx,%ecx,4\) + 1005 13e6 3E8C1C8C mov %ds,%ds:\(%esp,%ecx,4\) + 1006 13ea 8C1C8D00 000000 mov %ds,%ds:\(,%ecx,4\) + 1007 13f1 8C1C8E mov %ds,%ds:\(%esi,%ecx,4\) + 1008 13f4 8C1C8F mov %ds,%ds:\(%edi,%ecx,4\) + 1009 13f7 8C1C90 mov %ds,%ds:\(%eax,%edx,4\) + 1010 13fa 8C1C91 mov %ds,%ds:\(%ecx,%edx,4\) + 1011 13fd 8C1C92 mov %ds,%ds:\(%edx,%edx,4\) + 1012 1400 8C1C93 mov %ds,%ds:\(%ebx,%edx,4\) + 1013 1403 3E8C1C94 mov %ds,%ds:\(%esp,%edx,4\) + 1014 1407 8C1C9500 000000 mov %ds,%ds:\(,%edx,4\) + 1015 140e 8C1C96 mov %ds,%ds:\(%esi,%edx,4\) + 1016 1411 8C1C97 mov %ds,%ds:\(%edi,%edx,4\) + 1017 1414 8C1C98 mov %ds,%ds:\(%eax,%ebx,4\) + 1018 1417 8C1C99 mov %ds,%ds:\(%ecx,%ebx,4\) + 1019 141a 8C1C9A mov %ds,%ds:\(%edx,%ebx,4\) + 1020 141d 8C1C9B mov %ds,%ds:\(%ebx,%ebx,4\) + 1021 1420 3E8C1C9C mov %ds,%ds:\(%esp,%ebx,4\) + 1022 1424 8C1C9D00 000000 mov %ds,%ds:\(,%ebx,4\) + 1023 142b 8C1C9E mov %ds,%ds:\(%esi,%ebx,4\) + 1024 142e 8C1C9F mov %ds,%ds:\(%edi,%ebx,4\) + 1025 1431 8C18 mov %ds,%ds:\(%eax,4\) +.*Warning:.* + 1026 1433 8C19 mov %ds,%ds:\(%ecx,4\) +.*Warning:.* + 1027 1435 8C1A mov %ds,%ds:\(%edx,4\) +.*Warning:.* + 1028 1437 8C1B mov %ds,%ds:\(%ebx,4\) +.*Warning:.* + 1029 1439 3E8C1C24 mov %ds,%ds:\(%esp,4\) +.*Warning:.* + 1030 143d 8C1D0000 0000 mov %ds,%ds:\(,4\) +.*Warning:.* + 1031 1443 8C1E mov %ds,%ds:\(%esi,4\) +.*Warning:.* + 1032 1445 8C1F mov %ds,%ds:\(%edi,4\) +.*Warning:.* + 1033 1447 8C1CA8 mov %ds,%ds:\(%eax,%ebp,4\) + 1034 144a 8C1CA9 mov %ds,%ds:\(%ecx,%ebp,4\) + 1035 144d 8C1CAA mov %ds,%ds:\(%edx,%ebp,4\) + 1036 1450 8C1CAB mov %ds,%ds:\(%ebx,%ebp,4\) + 1037 1453 3E8C1CAC mov %ds,%ds:\(%esp,%ebp,4\) + 1038 1457 8C1CAD00 000000 mov %ds,%ds:\(,%ebp,4\) + 1039 145e 8C1CAE mov %ds,%ds:\(%esi,%ebp,4\) + 1040 1461 8C1CAF mov %ds,%ds:\(%edi,%ebp,4\) + 1041 1464 8C1CB0 mov %ds,%ds:\(%eax,%esi,4\) + 1042 1467 8C1CB1 mov %ds,%ds:\(%ecx,%esi,4\) + 1043 146a 8C1CB2 mov %ds,%ds:\(%edx,%esi,4\) + 1044 146d 8C1CB3 mov %ds,%ds:\(%ebx,%esi,4\) + 1045 1470 3E8C1CB4 mov %ds,%ds:\(%esp,%esi,4\) + 1046 1474 8C1CB500 000000 mov %ds,%ds:\(,%esi,4\) + 1047 147b 8C1CB6 mov %ds,%ds:\(%esi,%esi,4\) + 1048 147e 8C1CB7 mov %ds,%ds:\(%edi,%esi,4\) + 1049 1481 8C1CB8 mov %ds,%ds:\(%eax,%edi,4\) + 1050 1484 8C1CB9 mov %ds,%ds:\(%ecx,%edi,4\) + 1051 1487 8C1CBA mov %ds,%ds:\(%edx,%edi,4\) + 1052 148a 8C1CBB mov %ds,%ds:\(%ebx,%edi,4\) + 1053 148d 3E8C1CBC mov %ds,%ds:\(%esp,%edi,4\) + 1054 1491 8C1CBD00 000000 mov %ds,%ds:\(,%edi,4\) + 1055 1498 8C1CBE mov %ds,%ds:\(%esi,%edi,4\) + 1056 149b 8C1CBF mov %ds,%ds:\(%edi,%edi,4\) + 1057 149e 8C1CC0 mov %ds,%ds:\(%eax,%eax,8\) + 1058 14a1 8C1CC1 mov %ds,%ds:\(%ecx,%eax,8\) + 1059 14a4 8C1CC2 mov %ds,%ds:\(%edx,%eax,8\) + 1060 14a7 8C1CC3 mov %ds,%ds:\(%ebx,%eax,8\) + 1061 14aa 3E8C1CC4 mov %ds,%ds:\(%esp,%eax,8\) + 1062 14ae 8C1CC500 000000 mov %ds,%ds:\(,%eax,8\) + 1063 14b5 8C1CC6 mov %ds,%ds:\(%esi,%eax,8\) + 1064 14b8 8C1CC7 mov %ds,%ds:\(%edi,%eax,8\) + 1065 14bb 8C1CC8 mov %ds,%ds:\(%eax,%ecx,8\) + 1066 14be 8C1CC9 mov %ds,%ds:\(%ecx,%ecx,8\) + 1067 14c1 8C1CCA mov %ds,%ds:\(%edx,%ecx,8\) + 1068 14c4 8C1CCB mov %ds,%ds:\(%ebx,%ecx,8\) + 1069 14c7 3E8C1CCC mov %ds,%ds:\(%esp,%ecx,8\) + 1070 14cb 8C1CCD00 000000 mov %ds,%ds:\(,%ecx,8\) + 1071 14d2 8C1CCE mov %ds,%ds:\(%esi,%ecx,8\) + 1072 14d5 8C1CCF mov %ds,%ds:\(%edi,%ecx,8\) + 1073 14d8 8C1CD0 mov %ds,%ds:\(%eax,%edx,8\) + 1074 14db 8C1CD1 mov %ds,%ds:\(%ecx,%edx,8\) + 1075 14de 8C1CD2 mov %ds,%ds:\(%edx,%edx,8\) + 1076 14e1 8C1CD3 mov %ds,%ds:\(%ebx,%edx,8\) + 1077 14e4 3E8C1CD4 mov %ds,%ds:\(%esp,%edx,8\) + 1078 14e8 8C1CD500 000000 mov %ds,%ds:\(,%edx,8\) + 1079 14ef 8C1CD6 mov %ds,%ds:\(%esi,%edx,8\) + 1080 14f2 8C1CD7 mov %ds,%ds:\(%edi,%edx,8\) + 1081 14f5 8C1CD8 mov %ds,%ds:\(%eax,%ebx,8\) + 1082 14f8 8C1CD9 mov %ds,%ds:\(%ecx,%ebx,8\) + 1083 14fb 8C1CDA mov %ds,%ds:\(%edx,%ebx,8\) + 1084 14fe 8C1CDB mov %ds,%ds:\(%ebx,%ebx,8\) + 1085 1501 3E8C1CDC mov %ds,%ds:\(%esp,%ebx,8\) + 1086 1505 8C1CDD00 000000 mov %ds,%ds:\(,%ebx,8\) + 1087 150c 8C1CDE mov %ds,%ds:\(%esi,%ebx,8\) + 1088 150f 8C1CDF mov %ds,%ds:\(%edi,%ebx,8\) + 1089 1512 8C18 mov %ds,%ds:\(%eax,8\) +.*Warning:.* + 1090 1514 8C19 mov %ds,%ds:\(%ecx,8\) +.*Warning:.* + 1091 1516 8C1A mov %ds,%ds:\(%edx,8\) +.*Warning:.* + 1092 1518 8C1B mov %ds,%ds:\(%ebx,8\) +.*Warning:.* + 1093 151a 3E8C1C24 mov %ds,%ds:\(%esp,8\) +.*Warning:.* + 1094 151e 8C1D0000 0000 mov %ds,%ds:\(,8\) +.*Warning:.* + 1095 1524 8C1E mov %ds,%ds:\(%esi,8\) +.*Warning:.* + 1096 1526 8C1F mov %ds,%ds:\(%edi,8\) +.*Warning:.* + 1097 1528 8C1CE8 mov %ds,%ds:\(%eax,%ebp,8\) + 1098 152b 8C1CE9 mov %ds,%ds:\(%ecx,%ebp,8\) + 1099 152e 8C1CEA mov %ds,%ds:\(%edx,%ebp,8\) + 1100 1531 8C1CEB mov %ds,%ds:\(%ebx,%ebp,8\) + 1101 1534 3E8C1CEC mov %ds,%ds:\(%esp,%ebp,8\) + 1102 1538 8C1CED00 000000 mov %ds,%ds:\(,%ebp,8\) + 1103 153f 8C1CEE mov %ds,%ds:\(%esi,%ebp,8\) + 1104 1542 8C1CEF mov %ds,%ds:\(%edi,%ebp,8\) + 1105 1545 8C1CF0 mov %ds,%ds:\(%eax,%esi,8\) + 1106 1548 8C1CF1 mov %ds,%ds:\(%ecx,%esi,8\) + 1107 154b 8C1CF2 mov %ds,%ds:\(%edx,%esi,8\) + 1108 154e 8C1CF3 mov %ds,%ds:\(%ebx,%esi,8\) + 1109 1551 3E8C1CF4 mov %ds,%ds:\(%esp,%esi,8\) + 1110 1555 8C1CF500 000000 mov %ds,%ds:\(,%esi,8\) + 1111 155c 8C1CF6 mov %ds,%ds:\(%esi,%esi,8\) + 1112 155f 8C1CF7 mov %ds,%ds:\(%edi,%esi,8\) + 1113 1562 8C1CF8 mov %ds,%ds:\(%eax,%edi,8\) + 1114 1565 8C1CFA mov %ds,%ds:\(%edx,%edi,8\) + 1115 1568 8C1CF9 mov %ds,%ds:\(%ecx,%edi,8\) + 1116 156b 8C1CFB mov %ds,%ds:\(%ebx,%edi,8\) + 1117 156e 3E8C1CFC mov %ds,%ds:\(%esp,%edi,8\) + 1118 1572 8C1CFD00 000000 mov %ds,%ds:\(,%edi,8\) + 1119 1579 8C1CFE mov %ds,%ds:\(%esi,%edi,8\) + 1120 157c 8C1CFF mov %ds,%ds:\(%edi,%edi,8\) + 1121 157f 8C5C0012 mov %ds,%ds:0x12\(%eax,%eax,1\) + 1122 1583 8C5C0112 mov %ds,%ds:0x12\(%ecx,%eax,1\) + 1123 1587 8C5C0212 mov %ds,%ds:0x12\(%edx,%eax,1\) + 1124 158b 8C5C0312 mov %ds,%ds:0x12\(%ebx,%eax,1\) + 1125 158f 3E8C5C04 12 mov %ds,%ds:0x12\(%esp,%eax,1\) + 1126 1594 3E8C5C05 12 mov %ds,%ds:0x12\(%ebp,%eax,1\) + 1127 1599 8C5C0612 mov %ds,%ds:0x12\(%esi,%eax,1\) + 1128 159d 8C5C0712 mov %ds,%ds:0x12\(%edi,%eax,1\) + 1129 15a1 8C5C0812 mov %ds,%ds:0x12\(%eax,%ecx,1\) + 1130 15a5 8C5C0912 mov %ds,%ds:0x12\(%ecx,%ecx,1\) + 1131 15a9 8C5C0A12 mov %ds,%ds:0x12\(%edx,%ecx,1\) + 1132 15ad 8C5C0B12 mov %ds,%ds:0x12\(%ebx,%ecx,1\) + 1133 15b1 3E8C5C0C 12 mov %ds,%ds:0x12\(%esp,%ecx,1\) + 1134 15b6 3E8C5C0D 12 mov %ds,%ds:0x12\(%ebp,%ecx,1\) + 1135 15bb 8C5C0E12 mov %ds,%ds:0x12\(%esi,%ecx,1\) + 1136 15bf 8C5C0F12 mov %ds,%ds:0x12\(%edi,%ecx,1\) + 1137 15c3 8C5C1012 mov %ds,%ds:0x12\(%eax,%edx,1\) + 1138 15c7 8C5C1112 mov %ds,%ds:0x12\(%ecx,%edx,1\) + 1139 15cb 8C5C1212 mov %ds,%ds:0x12\(%edx,%edx,1\) + 1140 15cf 8C5C1312 mov %ds,%ds:0x12\(%ebx,%edx,1\) + 1141 15d3 3E8C5C14 12 mov %ds,%ds:0x12\(%esp,%edx,1\) + 1142 15d8 3E8C5C15 12 mov %ds,%ds:0x12\(%ebp,%edx,1\) + 1143 15dd 8C5C1612 mov %ds,%ds:0x12\(%esi,%edx,1\) + 1144 15e1 8C5C1712 mov %ds,%ds:0x12\(%edi,%edx,1\) + 1145 15e5 8C5C1812 mov %ds,%ds:0x12\(%eax,%ebx,1\) + 1146 15e9 8C5C1912 mov %ds,%ds:0x12\(%ecx,%ebx,1\) + 1147 15ed 8C5C1A12 mov %ds,%ds:0x12\(%edx,%ebx,1\) + 1148 15f1 8C5C1B12 mov %ds,%ds:0x12\(%ebx,%ebx,1\) + 1149 15f5 3E8C5C1C 12 mov %ds,%ds:0x12\(%esp,%ebx,1\) + 1150 15fa 3E8C5C1D 12 mov %ds,%ds:0x12\(%ebp,%ebx,1\) + 1151 15ff 8C5C1E12 mov %ds,%ds:0x12\(%esi,%ebx,1\) + 1152 1603 8C5C1F12 mov %ds,%ds:0x12\(%edi,%ebx,1\) + 1153 1607 8C5812 mov %ds,%ds:0x12\(%eax,1\) + 1154 160a 8C5912 mov %ds,%ds:0x12\(%ecx,1\) + 1155 160d 8C5A12 mov %ds,%ds:0x12\(%edx,1\) + 1156 1610 8C5B12 mov %ds,%ds:0x12\(%ebx,1\) + 1157 1613 3E8C5C24 12 mov %ds,%ds:0x12\(%esp,1\) + 1158 1618 3E8C5D12 mov %ds,%ds:0x12\(%ebp,1\) + 1159 161c 8C5E12 mov %ds,%ds:0x12\(%esi,1\) + 1160 161f 8C5F12 mov %ds,%ds:0x12\(%edi,1\) + 1161 1622 8C5C2812 mov %ds,%ds:0x12\(%eax,%ebp,1\) + 1162 1626 8C5C2912 mov %ds,%ds:0x12\(%ecx,%ebp,1\) + 1163 162a 8C5C2A12 mov %ds,%ds:0x12\(%edx,%ebp,1\) + 1164 162e 8C5C2B12 mov %ds,%ds:0x12\(%ebx,%ebp,1\) + 1165 1632 3E8C5C2C 12 mov %ds,%ds:0x12\(%esp,%ebp,1\) + 1166 1637 3E8C5C2D 12 mov %ds,%ds:0x12\(%ebp,%ebp,1\) + 1167 163c 8C5C2E12 mov %ds,%ds:0x12\(%esi,%ebp,1\) + 1168 1640 8C5C2F12 mov %ds,%ds:0x12\(%edi,%ebp,1\) + 1169 1644 8C5C3012 mov %ds,%ds:0x12\(%eax,%esi,1\) + 1170 1648 8C5C3112 mov %ds,%ds:0x12\(%ecx,%esi,1\) + 1171 164c 8C5C3212 mov %ds,%ds:0x12\(%edx,%esi,1\) + 1172 1650 8C5C3312 mov %ds,%ds:0x12\(%ebx,%esi,1\) + 1173 1654 3E8C5C34 12 mov %ds,%ds:0x12\(%esp,%esi,1\) + 1174 1659 3E8C5C35 12 mov %ds,%ds:0x12\(%ebp,%esi,1\) + 1175 165e 8C5C3612 mov %ds,%ds:0x12\(%esi,%esi,1\) + 1176 1662 8C5C3712 mov %ds,%ds:0x12\(%edi,%esi,1\) + 1177 1666 8C5C3812 mov %ds,%ds:0x12\(%eax,%edi,1\) + 1178 166a 8C5C3912 mov %ds,%ds:0x12\(%ecx,%edi,1\) + 1179 166e 8C5C3A12 mov %ds,%ds:0x12\(%edx,%edi,1\) + 1180 1672 8C5C3B12 mov %ds,%ds:0x12\(%ebx,%edi,1\) + 1181 1676 3E8C5C3C 12 mov %ds,%ds:0x12\(%esp,%edi,1\) + 1182 167b 3E8C5C3D 12 mov %ds,%ds:0x12\(%ebp,%edi,1\) + 1183 1680 8C5C3E12 mov %ds,%ds:0x12\(%esi,%edi,1\) + 1184 1684 8C5C3F12 mov %ds,%ds:0x12\(%edi,%edi,1\) + 1185 1688 8C5C4012 mov %ds,%ds:0x12\(%eax,%eax,2\) + 1186 168c 8C5C4112 mov %ds,%ds:0x12\(%ecx,%eax,2\) + 1187 1690 8C5C4212 mov %ds,%ds:0x12\(%edx,%eax,2\) + 1188 1694 8C5C4312 mov %ds,%ds:0x12\(%ebx,%eax,2\) + 1189 1698 3E8C5C44 12 mov %ds,%ds:0x12\(%esp,%eax,2\) + 1190 169d 3E8C5C45 12 mov %ds,%ds:0x12\(%ebp,%eax,2\) + 1191 16a2 8C5C4612 mov %ds,%ds:0x12\(%esi,%eax,2\) + 1192 16a6 8C5C4712 mov %ds,%ds:0x12\(%edi,%eax,2\) + 1193 16aa 8C5C4812 mov %ds,%ds:0x12\(%eax,%ecx,2\) + 1194 16ae 8C5C4912 mov %ds,%ds:0x12\(%ecx,%ecx,2\) + 1195 16b2 8C5C4A12 mov %ds,%ds:0x12\(%edx,%ecx,2\) + 1196 16b6 8C5C4B12 mov %ds,%ds:0x12\(%ebx,%ecx,2\) + 1197 16ba 3E8C5C4C 12 mov %ds,%ds:0x12\(%esp,%ecx,2\) + 1198 16bf 3E8C5C4D 12 mov %ds,%ds:0x12\(%ebp,%ecx,2\) + 1199 16c4 8C5C4E12 mov %ds,%ds:0x12\(%esi,%ecx,2\) + 1200 16c8 8C5C4F12 mov %ds,%ds:0x12\(%edi,%ecx,2\) + 1201 16cc 8C5C5012 mov %ds,%ds:0x12\(%eax,%edx,2\) + 1202 16d0 8C5C5112 mov %ds,%ds:0x12\(%ecx,%edx,2\) + 1203 16d4 8C5C5212 mov %ds,%ds:0x12\(%edx,%edx,2\) + 1204 16d8 8C5C5312 mov %ds,%ds:0x12\(%ebx,%edx,2\) + 1205 16dc 3E8C5C54 12 mov %ds,%ds:0x12\(%esp,%edx,2\) + 1206 16e1 3E8C5C55 12 mov %ds,%ds:0x12\(%ebp,%edx,2\) + 1207 16e6 8C5C5612 mov %ds,%ds:0x12\(%esi,%edx,2\) + 1208 16ea 8C5C5712 mov %ds,%ds:0x12\(%edi,%edx,2\) + 1209 16ee 8C5C5812 mov %ds,%ds:0x12\(%eax,%ebx,2\) + 1210 16f2 8C5C5912 mov %ds,%ds:0x12\(%ecx,%ebx,2\) + 1211 16f6 8C5C5A12 mov %ds,%ds:0x12\(%edx,%ebx,2\) + 1212 16fa 8C5C5B12 mov %ds,%ds:0x12\(%ebx,%ebx,2\) + 1213 16fe 3E8C5C5C 12 mov %ds,%ds:0x12\(%esp,%ebx,2\) + 1214 1703 3E8C5C5D 12 mov %ds,%ds:0x12\(%ebp,%ebx,2\) + 1215 1708 8C5C5E12 mov %ds,%ds:0x12\(%esi,%ebx,2\) + 1216 170c 8C5C5F12 mov %ds,%ds:0x12\(%edi,%ebx,2\) + 1217 1710 8C5812 mov %ds,%ds:0x12\(%eax,2\) +.*Warning:.* + 1218 1713 8C5912 mov %ds,%ds:0x12\(%ecx,2\) +.*Warning:.* + 1219 1716 8C5A12 mov %ds,%ds:0x12\(%edx,2\) +.*Warning:.* + 1220 1719 8C5B12 mov %ds,%ds:0x12\(%ebx,2\) +.*Warning:.* + 1221 171c 3E8C5C24 12 mov %ds,%ds:0x12\(%esp,2\) +.*Warning:.* + 1222 1721 3E8C5D12 mov %ds,%ds:0x12\(%ebp,2\) +.*Warning:.* + 1223 1725 8C5E12 mov %ds,%ds:0x12\(%esi,2\) +.*Warning:.* + 1224 1728 8C5F12 mov %ds,%ds:0x12\(%edi,2\) +.*Warning:.* + 1225 172b 8C5C6812 mov %ds,%ds:0x12\(%eax,%ebp,2\) + 1226 172f 8C5C6912 mov %ds,%ds:0x12\(%ecx,%ebp,2\) + 1227 1733 8C5C6A12 mov %ds,%ds:0x12\(%edx,%ebp,2\) + 1228 1737 8C5C6B12 mov %ds,%ds:0x12\(%ebx,%ebp,2\) + 1229 173b 3E8C5C6C 12 mov %ds,%ds:0x12\(%esp,%ebp,2\) + 1230 1740 3E8C5C6D 12 mov %ds,%ds:0x12\(%ebp,%ebp,2\) + 1231 1745 8C5C6E12 mov %ds,%ds:0x12\(%esi,%ebp,2\) + 1232 1749 8C5C6F12 mov %ds,%ds:0x12\(%edi,%ebp,2\) + 1233 174d 8C5C7012 mov %ds,%ds:0x12\(%eax,%esi,2\) + 1234 1751 8C5C7112 mov %ds,%ds:0x12\(%ecx,%esi,2\) + 1235 1755 8C5C7212 mov %ds,%ds:0x12\(%edx,%esi,2\) + 1236 1759 8C5C7312 mov %ds,%ds:0x12\(%ebx,%esi,2\) + 1237 175d 3E8C5C74 12 mov %ds,%ds:0x12\(%esp,%esi,2\) + 1238 1762 3E8C5C75 12 mov %ds,%ds:0x12\(%ebp,%esi,2\) + 1239 1767 8C5C7612 mov %ds,%ds:0x12\(%esi,%esi,2\) + 1240 176b 8C5C7712 mov %ds,%ds:0x12\(%edi,%esi,2\) + 1241 176f 8C5C7812 mov %ds,%ds:0x12\(%eax,%edi,2\) + 1242 1773 8C5C7912 mov %ds,%ds:0x12\(%ecx,%edi,2\) + 1243 1777 8C5C7A12 mov %ds,%ds:0x12\(%edx,%edi,2\) + 1244 177b 8C5C7B12 mov %ds,%ds:0x12\(%ebx,%edi,2\) + 1245 177f 3E8C5C7C 12 mov %ds,%ds:0x12\(%esp,%edi,2\) + 1246 1784 3E8C5C7D 12 mov %ds,%ds:0x12\(%ebp,%edi,2\) + 1247 1789 8C5C7E12 mov %ds,%ds:0x12\(%esi,%edi,2\) + 1248 178d 8C5C7F12 mov %ds,%ds:0x12\(%edi,%edi,2\) + 1249 1791 8C5C8012 mov %ds,%ds:0x12\(%eax,%eax,4\) + 1250 1795 8C5C8112 mov %ds,%ds:0x12\(%ecx,%eax,4\) + 1251 1799 8C5C8212 mov %ds,%ds:0x12\(%edx,%eax,4\) + 1252 179d 8C5C8312 mov %ds,%ds:0x12\(%ebx,%eax,4\) + 1253 17a1 3E8C5C84 12 mov %ds,%ds:0x12\(%esp,%eax,4\) + 1254 17a6 3E8C5C85 12 mov %ds,%ds:0x12\(%ebp,%eax,4\) + 1255 17ab 8C5C8612 mov %ds,%ds:0x12\(%esi,%eax,4\) + 1256 17af 8C5C8712 mov %ds,%ds:0x12\(%edi,%eax,4\) + 1257 17b3 8C5C8812 mov %ds,%ds:0x12\(%eax,%ecx,4\) + 1258 17b7 8C5C8912 mov %ds,%ds:0x12\(%ecx,%ecx,4\) + 1259 17bb 8C5C8A12 mov %ds,%ds:0x12\(%edx,%ecx,4\) + 1260 17bf 8C5C8B12 mov %ds,%ds:0x12\(%ebx,%ecx,4\) + 1261 17c3 3E8C5C8C 12 mov %ds,%ds:0x12\(%esp,%ecx,4\) + 1262 17c8 3E8C5C8D 12 mov %ds,%ds:0x12\(%ebp,%ecx,4\) + 1263 17cd 8C5C8E12 mov %ds,%ds:0x12\(%esi,%ecx,4\) + 1264 17d1 8C5C8F12 mov %ds,%ds:0x12\(%edi,%ecx,4\) + 1265 17d5 8C5C9012 mov %ds,%ds:0x12\(%eax,%edx,4\) + 1266 17d9 8C5C9112 mov %ds,%ds:0x12\(%ecx,%edx,4\) + 1267 17dd 8C5C9212 mov %ds,%ds:0x12\(%edx,%edx,4\) + 1268 17e1 8C5C9312 mov %ds,%ds:0x12\(%ebx,%edx,4\) + 1269 17e5 3E8C5C94 12 mov %ds,%ds:0x12\(%esp,%edx,4\) + 1270 17ea 3E8C5C95 12 mov %ds,%ds:0x12\(%ebp,%edx,4\) + 1271 17ef 8C5C9612 mov %ds,%ds:0x12\(%esi,%edx,4\) + 1272 17f3 8C5C9712 mov %ds,%ds:0x12\(%edi,%edx,4\) + 1273 17f7 8C5C9812 mov %ds,%ds:0x12\(%eax,%ebx,4\) + 1274 17fb 8C5C9912 mov %ds,%ds:0x12\(%ecx,%ebx,4\) + 1275 17ff 8C5C9A12 mov %ds,%ds:0x12\(%edx,%ebx,4\) + 1276 1803 8C5C9B12 mov %ds,%ds:0x12\(%ebx,%ebx,4\) + 1277 1807 3E8C5C9C 12 mov %ds,%ds:0x12\(%esp,%ebx,4\) + 1278 180c 3E8C5C9D 12 mov %ds,%ds:0x12\(%ebp,%ebx,4\) + 1279 1811 8C5C9E12 mov %ds,%ds:0x12\(%esi,%ebx,4\) + 1280 1815 8C5C9F12 mov %ds,%ds:0x12\(%edi,%ebx,4\) + 1281 1819 8C5812 mov %ds,%ds:0x12\(%eax,4\) +.*Warning:.* + 1282 181c 8C5912 mov %ds,%ds:0x12\(%ecx,4\) +.*Warning:.* + 1283 181f 8C5A12 mov %ds,%ds:0x12\(%edx,4\) +.*Warning:.* + 1284 1822 8C5B12 mov %ds,%ds:0x12\(%ebx,4\) +.*Warning:.* + 1285 1825 3E8C5C24 12 mov %ds,%ds:0x12\(%esp,4\) +.*Warning:.* + 1286 182a 3E8C5D12 mov %ds,%ds:0x12\(%ebp,4\) +.*Warning:.* + 1287 182e 8C5E12 mov %ds,%ds:0x12\(%esi,4\) +.*Warning:.* + 1288 1831 8C5F12 mov %ds,%ds:0x12\(%edi,4\) +.*Warning:.* + 1289 1834 8C5CA812 mov %ds,%ds:0x12\(%eax,%ebp,4\) + 1290 1838 8C5CA912 mov %ds,%ds:0x12\(%ecx,%ebp,4\) + 1291 183c 8C5CAA12 mov %ds,%ds:0x12\(%edx,%ebp,4\) + 1292 1840 8C5CAB12 mov %ds,%ds:0x12\(%ebx,%ebp,4\) + 1293 1844 3E8C5CAC 12 mov %ds,%ds:0x12\(%esp,%ebp,4\) + 1294 1849 3E8C5CAD 12 mov %ds,%ds:0x12\(%ebp,%ebp,4\) + 1295 184e 8C5CAE12 mov %ds,%ds:0x12\(%esi,%ebp,4\) + 1296 1852 8C5CAF12 mov %ds,%ds:0x12\(%edi,%ebp,4\) + 1297 1856 8C5CB012 mov %ds,%ds:0x12\(%eax,%esi,4\) + 1298 185a 8C5CB112 mov %ds,%ds:0x12\(%ecx,%esi,4\) + 1299 185e 8C5CB212 mov %ds,%ds:0x12\(%edx,%esi,4\) + 1300 1862 8C5CB312 mov %ds,%ds:0x12\(%ebx,%esi,4\) + 1301 1866 3E8C5CB4 12 mov %ds,%ds:0x12\(%esp,%esi,4\) + 1302 186b 3E8C5CB5 12 mov %ds,%ds:0x12\(%ebp,%esi,4\) + 1303 1870 8C5CB612 mov %ds,%ds:0x12\(%esi,%esi,4\) + 1304 1874 8C5CB712 mov %ds,%ds:0x12\(%edi,%esi,4\) + 1305 1878 8C5CB812 mov %ds,%ds:0x12\(%eax,%edi,4\) + 1306 187c 8C5CB912 mov %ds,%ds:0x12\(%ecx,%edi,4\) + 1307 1880 8C5CBA12 mov %ds,%ds:0x12\(%edx,%edi,4\) + 1308 1884 8C5CBB12 mov %ds,%ds:0x12\(%ebx,%edi,4\) + 1309 1888 3E8C5CBC 12 mov %ds,%ds:0x12\(%esp,%edi,4\) + 1310 188d 3E8C5CBD 12 mov %ds,%ds:0x12\(%ebp,%edi,4\) + 1311 1892 8C5CBE12 mov %ds,%ds:0x12\(%esi,%edi,4\) + 1312 1896 8C5CBF12 mov %ds,%ds:0x12\(%edi,%edi,4\) + 1313 189a 8C5CC012 mov %ds,%ds:0x12\(%eax,%eax,8\) + 1314 189e 8C5CC112 mov %ds,%ds:0x12\(%ecx,%eax,8\) + 1315 18a2 8C5CC212 mov %ds,%ds:0x12\(%edx,%eax,8\) + 1316 18a6 8C5CC312 mov %ds,%ds:0x12\(%ebx,%eax,8\) + 1317 18aa 3E8C5CC4 12 mov %ds,%ds:0x12\(%esp,%eax,8\) + 1318 18af 3E8C5CC5 12 mov %ds,%ds:0x12\(%ebp,%eax,8\) + 1319 18b4 8C5CC612 mov %ds,%ds:0x12\(%esi,%eax,8\) + 1320 18b8 8C5CC712 mov %ds,%ds:0x12\(%edi,%eax,8\) + 1321 18bc 8C5CC812 mov %ds,%ds:0x12\(%eax,%ecx,8\) + 1322 18c0 8C5CC912 mov %ds,%ds:0x12\(%ecx,%ecx,8\) + 1323 18c4 8C5CCA12 mov %ds,%ds:0x12\(%edx,%ecx,8\) + 1324 18c8 8C5CCB12 mov %ds,%ds:0x12\(%ebx,%ecx,8\) + 1325 18cc 3E8C5CCC 12 mov %ds,%ds:0x12\(%esp,%ecx,8\) + 1326 18d1 3E8C5CCD 12 mov %ds,%ds:0x12\(%ebp,%ecx,8\) + 1327 18d6 8C5CCE12 mov %ds,%ds:0x12\(%esi,%ecx,8\) + 1328 18da 8C5CCF12 mov %ds,%ds:0x12\(%edi,%ecx,8\) + 1329 18de 8C5CD012 mov %ds,%ds:0x12\(%eax,%edx,8\) + 1330 18e2 8C5CD112 mov %ds,%ds:0x12\(%ecx,%edx,8\) + 1331 18e6 8C5CD212 mov %ds,%ds:0x12\(%edx,%edx,8\) + 1332 18ea 8C5CD312 mov %ds,%ds:0x12\(%ebx,%edx,8\) + 1333 18ee 3E8C5CD4 12 mov %ds,%ds:0x12\(%esp,%edx,8\) + 1334 18f3 3E8C5CD5 12 mov %ds,%ds:0x12\(%ebp,%edx,8\) + 1335 18f8 8C5CD612 mov %ds,%ds:0x12\(%esi,%edx,8\) + 1336 18fc 8C5CD712 mov %ds,%ds:0x12\(%edi,%edx,8\) + 1337 1900 8C5CD812 mov %ds,%ds:0x12\(%eax,%ebx,8\) + 1338 1904 8C5CD912 mov %ds,%ds:0x12\(%ecx,%ebx,8\) + 1339 1908 8C5CDA12 mov %ds,%ds:0x12\(%edx,%ebx,8\) + 1340 190c 8C5CDB12 mov %ds,%ds:0x12\(%ebx,%ebx,8\) + 1341 1910 3E8C5CDC 12 mov %ds,%ds:0x12\(%esp,%ebx,8\) + 1342 1915 3E8C5CDD 12 mov %ds,%ds:0x12\(%ebp,%ebx,8\) + 1343 191a 8C5CDE12 mov %ds,%ds:0x12\(%esi,%ebx,8\) + 1344 191e 8C5CDF12 mov %ds,%ds:0x12\(%edi,%ebx,8\) + 1345 1922 8C5812 mov %ds,%ds:0x12\(%eax,8\) +.*Warning:.* + 1346 1925 8C5912 mov %ds,%ds:0x12\(%ecx,8\) +.*Warning:.* + 1347 1928 8C5A12 mov %ds,%ds:0x12\(%edx,8\) +.*Warning:.* + 1348 192b 8C5B12 mov %ds,%ds:0x12\(%ebx,8\) +.*Warning:.* + 1349 192e 3E8C5C24 12 mov %ds,%ds:0x12\(%esp,8\) +.*Warning:.* + 1350 1933 3E8C5D12 mov %ds,%ds:0x12\(%ebp,8\) +.*Warning:.* + 1351 1937 8C5E12 mov %ds,%ds:0x12\(%esi,8\) +.*Warning:.* + 1352 193a 8C5F12 mov %ds,%ds:0x12\(%edi,8\) +.*Warning:.* + 1353 193d 8C5CE812 mov %ds,%ds:0x12\(%eax,%ebp,8\) + 1354 1941 8C5CE912 mov %ds,%ds:0x12\(%ecx,%ebp,8\) + 1355 1945 8C5CEA12 mov %ds,%ds:0x12\(%edx,%ebp,8\) + 1356 1949 8C5CEB12 mov %ds,%ds:0x12\(%ebx,%ebp,8\) + 1357 194d 3E8C5CEC 12 mov %ds,%ds:0x12\(%esp,%ebp,8\) + 1358 1952 3E8C5CED 12 mov %ds,%ds:0x12\(%ebp,%ebp,8\) + 1359 1957 8C5CEE12 mov %ds,%ds:0x12\(%esi,%ebp,8\) + 1360 195b 8C5CEF12 mov %ds,%ds:0x12\(%edi,%ebp,8\) + 1361 195f 8C5CF012 mov %ds,%ds:0x12\(%eax,%esi,8\) + 1362 1963 8C5CF112 mov %ds,%ds:0x12\(%ecx,%esi,8\) + 1363 1967 8C5CF212 mov %ds,%ds:0x12\(%edx,%esi,8\) + 1364 196b 8C5CF312 mov %ds,%ds:0x12\(%ebx,%esi,8\) + 1365 196f 3E8C5CF4 12 mov %ds,%ds:0x12\(%esp,%esi,8\) + 1366 1974 3E8C5CF5 12 mov %ds,%ds:0x12\(%ebp,%esi,8\) + 1367 1979 8C5CF612 mov %ds,%ds:0x12\(%esi,%esi,8\) + 1368 197d 8C5CF712 mov %ds,%ds:0x12\(%edi,%esi,8\) + 1369 1981 8C5CF812 mov %ds,%ds:0x12\(%eax,%edi,8\) + 1370 1985 8C5CFA12 mov %ds,%ds:0x12\(%edx,%edi,8\) + 1371 1989 8C5CF912 mov %ds,%ds:0x12\(%ecx,%edi,8\) + 1372 198d 8C5CFB12 mov %ds,%ds:0x12\(%ebx,%edi,8\) + 1373 1991 3E8C5CFC 12 mov %ds,%ds:0x12\(%esp,%edi,8\) + 1374 1996 3E8C5CFD 12 mov %ds,%ds:0x12\(%ebp,%edi,8\) + 1375 199b 8C5CFE12 mov %ds,%ds:0x12\(%esi,%edi,8\) + 1376 199f 8C5CFF12 mov %ds,%ds:0x12\(%edi,%edi,8\) + 1377 19a3 8C9C0078 563412 mov %ds,%ds:0x12345678\(%eax,%eax,1\) + 1378 19aa 8C9C0178 563412 mov %ds,%ds:0x12345678\(%ecx,%eax,1\) + 1379 19b1 8C9C0278 563412 mov %ds,%ds:0x12345678\(%edx,%eax,1\) + 1380 19b8 8C9C0378 563412 mov %ds,%ds:0x12345678\(%ebx,%eax,1\) + 1381 19bf 3E8C9C04 78563412 mov %ds,%ds:0x12345678\(%esp,%eax,1\) + 1382 19c7 3E8C9C05 78563412 mov %ds,%ds:0x12345678\(%ebp,%eax,1\) + 1383 19cf 8C9C0678 563412 mov %ds,%ds:0x12345678\(%esi,%eax,1\) + 1384 19d6 8C9C0778 563412 mov %ds,%ds:0x12345678\(%edi,%eax,1\) + 1385 19dd 8C9C0878 563412 mov %ds,%ds:0x12345678\(%eax,%ecx,1\) + 1386 19e4 8C9C0978 563412 mov %ds,%ds:0x12345678\(%ecx,%ecx,1\) + 1387 19eb 8C9C0A78 563412 mov %ds,%ds:0x12345678\(%edx,%ecx,1\) + 1388 19f2 8C9C0B78 563412 mov %ds,%ds:0x12345678\(%ebx,%ecx,1\) + 1389 19f9 3E8C9C0C 78563412 mov %ds,%ds:0x12345678\(%esp,%ecx,1\) + 1390 1a01 3E8C9C0D 78563412 mov %ds,%ds:0x12345678\(%ebp,%ecx,1\) + 1391 1a09 8C9C0E78 563412 mov %ds,%ds:0x12345678\(%esi,%ecx,1\) + 1392 1a10 8C9C0F78 563412 mov %ds,%ds:0x12345678\(%edi,%ecx,1\) + 1393 1a17 8C9C1078 563412 mov %ds,%ds:0x12345678\(%eax,%edx,1\) + 1394 1a1e 8C9C1178 563412 mov %ds,%ds:0x12345678\(%ecx,%edx,1\) + 1395 1a25 8C9C1278 563412 mov %ds,%ds:0x12345678\(%edx,%edx,1\) + 1396 1a2c 8C9C1378 563412 mov %ds,%ds:0x12345678\(%ebx,%edx,1\) + 1397 1a33 3E8C9C14 78563412 mov %ds,%ds:0x12345678\(%esp,%edx,1\) + 1398 1a3b 3E8C9C15 78563412 mov %ds,%ds:0x12345678\(%ebp,%edx,1\) + 1399 1a43 8C9C1678 563412 mov %ds,%ds:0x12345678\(%esi,%edx,1\) + 1400 1a4a 8C9C1778 563412 mov %ds,%ds:0x12345678\(%edi,%edx,1\) + 1401 1a51 8C9C1878 563412 mov %ds,%ds:0x12345678\(%eax,%ebx,1\) + 1402 1a58 8C9C1978 563412 mov %ds,%ds:0x12345678\(%ecx,%ebx,1\) + 1403 1a5f 8C9C1A78 563412 mov %ds,%ds:0x12345678\(%edx,%ebx,1\) + 1404 1a66 8C9C1B78 563412 mov %ds,%ds:0x12345678\(%ebx,%ebx,1\) + 1405 1a6d 3E8C9C1C 78563412 mov %ds,%ds:0x12345678\(%esp,%ebx,1\) + 1406 1a75 3E8C9C1D 78563412 mov %ds,%ds:0x12345678\(%ebp,%ebx,1\) + 1407 1a7d 8C9C1E78 563412 mov %ds,%ds:0x12345678\(%esi,%ebx,1\) + 1408 1a84 8C9C1F78 563412 mov %ds,%ds:0x12345678\(%edi,%ebx,1\) + 1409 1a8b 8C987856 3412 mov %ds,%ds:0x12345678\(%eax,1\) + 1410 1a91 8C997856 3412 mov %ds,%ds:0x12345678\(%ecx,1\) + 1411 1a97 8C9A7856 3412 mov %ds,%ds:0x12345678\(%edx,1\) + 1412 1a9d 8C9B7856 3412 mov %ds,%ds:0x12345678\(%ebx,1\) + 1413 1aa3 3E8C9C24 78563412 mov %ds,%ds:0x12345678\(%esp,1\) + 1414 1aab 3E8C9D78 563412 mov %ds,%ds:0x12345678\(%ebp,1\) + 1415 1ab2 8C9E7856 3412 mov %ds,%ds:0x12345678\(%esi,1\) + 1416 1ab8 8C9F7856 3412 mov %ds,%ds:0x12345678\(%edi,1\) + 1417 1abe 8C9C2878 563412 mov %ds,%ds:0x12345678\(%eax,%ebp,1\) + 1418 1ac5 8C9C2978 563412 mov %ds,%ds:0x12345678\(%ecx,%ebp,1\) + 1419 1acc 8C9C2A78 563412 mov %ds,%ds:0x12345678\(%edx,%ebp,1\) + 1420 1ad3 8C9C2B78 563412 mov %ds,%ds:0x12345678\(%ebx,%ebp,1\) + 1421 1ada 3E8C9C2C 78563412 mov %ds,%ds:0x12345678\(%esp,%ebp,1\) + 1422 1ae2 3E8C9C2D 78563412 mov %ds,%ds:0x12345678\(%ebp,%ebp,1\) + 1423 1aea 8C9C2E78 563412 mov %ds,%ds:0x12345678\(%esi,%ebp,1\) + 1424 1af1 8C9C2F78 563412 mov %ds,%ds:0x12345678\(%edi,%ebp,1\) + 1425 1af8 8C9C3078 563412 mov %ds,%ds:0x12345678\(%eax,%esi,1\) + 1426 1aff 8C9C3178 563412 mov %ds,%ds:0x12345678\(%ecx,%esi,1\) + 1427 1b06 8C9C3278 563412 mov %ds,%ds:0x12345678\(%edx,%esi,1\) + 1428 1b0d 8C9C3378 563412 mov %ds,%ds:0x12345678\(%ebx,%esi,1\) + 1429 1b14 3E8C9C34 78563412 mov %ds,%ds:0x12345678\(%esp,%esi,1\) + 1430 1b1c 3E8C9C35 78563412 mov %ds,%ds:0x12345678\(%ebp,%esi,1\) + 1431 1b24 8C9C3678 563412 mov %ds,%ds:0x12345678\(%esi,%esi,1\) + 1432 1b2b 8C9C3778 563412 mov %ds,%ds:0x12345678\(%edi,%esi,1\) + 1433 1b32 8C9C3878 563412 mov %ds,%ds:0x12345678\(%eax,%edi,1\) + 1434 1b39 8C9C3978 563412 mov %ds,%ds:0x12345678\(%ecx,%edi,1\) + 1435 1b40 8C9C3A78 563412 mov %ds,%ds:0x12345678\(%edx,%edi,1\) + 1436 1b47 8C9C3B78 563412 mov %ds,%ds:0x12345678\(%ebx,%edi,1\) + 1437 1b4e 3E8C9C3C 78563412 mov %ds,%ds:0x12345678\(%esp,%edi,1\) + 1438 1b56 3E8C9C3D 78563412 mov %ds,%ds:0x12345678\(%ebp,%edi,1\) + 1439 1b5e 8C9C3E78 563412 mov %ds,%ds:0x12345678\(%esi,%edi,1\) + 1440 1b65 8C9C3F78 563412 mov %ds,%ds:0x12345678\(%edi,%edi,1\) + 1441 1b6c 8C9C4078 563412 mov %ds,%ds:0x12345678\(%eax,%eax,2\) + 1442 1b73 8C9C4178 563412 mov %ds,%ds:0x12345678\(%ecx,%eax,2\) + 1443 1b7a 8C9C4278 563412 mov %ds,%ds:0x12345678\(%edx,%eax,2\) + 1444 1b81 8C9C4378 563412 mov %ds,%ds:0x12345678\(%ebx,%eax,2\) + 1445 1b88 3E8C9C44 78563412 mov %ds,%ds:0x12345678\(%esp,%eax,2\) + 1446 1b90 3E8C9C45 78563412 mov %ds,%ds:0x12345678\(%ebp,%eax,2\) + 1447 1b98 8C9C4678 563412 mov %ds,%ds:0x12345678\(%esi,%eax,2\) + 1448 1b9f 8C9C4778 563412 mov %ds,%ds:0x12345678\(%edi,%eax,2\) + 1449 1ba6 8C9C4878 563412 mov %ds,%ds:0x12345678\(%eax,%ecx,2\) + 1450 1bad 8C9C4978 563412 mov %ds,%ds:0x12345678\(%ecx,%ecx,2\) + 1451 1bb4 8C9C4A78 563412 mov %ds,%ds:0x12345678\(%edx,%ecx,2\) + 1452 1bbb 8C9C4B78 563412 mov %ds,%ds:0x12345678\(%ebx,%ecx,2\) + 1453 1bc2 3E8C9C4C 78563412 mov %ds,%ds:0x12345678\(%esp,%ecx,2\) + 1454 1bca 3E8C9C4D 78563412 mov %ds,%ds:0x12345678\(%ebp,%ecx,2\) + 1455 1bd2 8C9C4E78 563412 mov %ds,%ds:0x12345678\(%esi,%ecx,2\) + 1456 1bd9 8C9C4F78 563412 mov %ds,%ds:0x12345678\(%edi,%ecx,2\) + 1457 1be0 8C9C5078 563412 mov %ds,%ds:0x12345678\(%eax,%edx,2\) + 1458 1be7 8C9C5178 563412 mov %ds,%ds:0x12345678\(%ecx,%edx,2\) + 1459 1bee 8C9C5278 563412 mov %ds,%ds:0x12345678\(%edx,%edx,2\) + 1460 1bf5 8C9C5378 563412 mov %ds,%ds:0x12345678\(%ebx,%edx,2\) + 1461 1bfc 3E8C9C54 78563412 mov %ds,%ds:0x12345678\(%esp,%edx,2\) + 1462 1c04 3E8C9C55 78563412 mov %ds,%ds:0x12345678\(%ebp,%edx,2\) + 1463 1c0c 8C9C5678 563412 mov %ds,%ds:0x12345678\(%esi,%edx,2\) + 1464 1c13 8C9C5778 563412 mov %ds,%ds:0x12345678\(%edi,%edx,2\) + 1465 1c1a 8C9C5878 563412 mov %ds,%ds:0x12345678\(%eax,%ebx,2\) + 1466 1c21 8C9C5978 563412 mov %ds,%ds:0x12345678\(%ecx,%ebx,2\) + 1467 1c28 8C9C5A78 563412 mov %ds,%ds:0x12345678\(%edx,%ebx,2\) + 1468 1c2f 8C9C5B78 563412 mov %ds,%ds:0x12345678\(%ebx,%ebx,2\) + 1469 1c36 3E8C9C5C 78563412 mov %ds,%ds:0x12345678\(%esp,%ebx,2\) + 1470 1c3e 3E8C9C5D 78563412 mov %ds,%ds:0x12345678\(%ebp,%ebx,2\) + 1471 1c46 8C9C5E78 563412 mov %ds,%ds:0x12345678\(%esi,%ebx,2\) + 1472 1c4d 8C9C5F78 563412 mov %ds,%ds:0x12345678\(%edi,%ebx,2\) + 1473 1c54 8C987856 3412 mov %ds,%ds:0x12345678\(%eax,2\) +.*Warning:.* + 1474 1c5a 8C997856 3412 mov %ds,%ds:0x12345678\(%ecx,2\) +.*Warning:.* + 1475 1c60 8C9A7856 3412 mov %ds,%ds:0x12345678\(%edx,2\) +.*Warning:.* + 1476 1c66 8C9B7856 3412 mov %ds,%ds:0x12345678\(%ebx,2\) +.*Warning:.* + 1477 1c6c 3E8C9C24 78563412 mov %ds,%ds:0x12345678\(%esp,2\) +.*Warning:.* + 1478 1c74 3E8C9D78 563412 mov %ds,%ds:0x12345678\(%ebp,2\) +.*Warning:.* + 1479 1c7b 8C9E7856 3412 mov %ds,%ds:0x12345678\(%esi,2\) +.*Warning:.* + 1480 1c81 8C9F7856 3412 mov %ds,%ds:0x12345678\(%edi,2\) +.*Warning:.* + 1481 1c87 8C9C6878 563412 mov %ds,%ds:0x12345678\(%eax,%ebp,2\) + 1482 1c8e 8C9C6978 563412 mov %ds,%ds:0x12345678\(%ecx,%ebp,2\) + 1483 1c95 8C9C6A78 563412 mov %ds,%ds:0x12345678\(%edx,%ebp,2\) + 1484 1c9c 8C9C6B78 563412 mov %ds,%ds:0x12345678\(%ebx,%ebp,2\) + 1485 1ca3 3E8C9C6C 78563412 mov %ds,%ds:0x12345678\(%esp,%ebp,2\) + 1486 1cab 3E8C9C6D 78563412 mov %ds,%ds:0x12345678\(%ebp,%ebp,2\) + 1487 1cb3 8C9C6E78 563412 mov %ds,%ds:0x12345678\(%esi,%ebp,2\) + 1488 1cba 8C9C6F78 563412 mov %ds,%ds:0x12345678\(%edi,%ebp,2\) + 1489 1cc1 8C9C7078 563412 mov %ds,%ds:0x12345678\(%eax,%esi,2\) + 1490 1cc8 8C9C7178 563412 mov %ds,%ds:0x12345678\(%ecx,%esi,2\) + 1491 1ccf 8C9C7278 563412 mov %ds,%ds:0x12345678\(%edx,%esi,2\) + 1492 1cd6 8C9C7378 563412 mov %ds,%ds:0x12345678\(%ebx,%esi,2\) + 1493 1cdd 3E8C9C74 78563412 mov %ds,%ds:0x12345678\(%esp,%esi,2\) + 1494 1ce5 3E8C9C75 78563412 mov %ds,%ds:0x12345678\(%ebp,%esi,2\) + 1495 1ced 8C9C7678 563412 mov %ds,%ds:0x12345678\(%esi,%esi,2\) + 1496 1cf4 8C9C7778 563412 mov %ds,%ds:0x12345678\(%edi,%esi,2\) + 1497 1cfb 8C9C7878 563412 mov %ds,%ds:0x12345678\(%eax,%edi,2\) + 1498 1d02 8C9C7978 563412 mov %ds,%ds:0x12345678\(%ecx,%edi,2\) + 1499 1d09 8C9C7A78 563412 mov %ds,%ds:0x12345678\(%edx,%edi,2\) + 1500 1d10 8C9C7B78 563412 mov %ds,%ds:0x12345678\(%ebx,%edi,2\) + 1501 1d17 3E8C9C7C 78563412 mov %ds,%ds:0x12345678\(%esp,%edi,2\) + 1502 1d1f 3E8C9C7D 78563412 mov %ds,%ds:0x12345678\(%ebp,%edi,2\) + 1503 1d27 8C9C7E78 563412 mov %ds,%ds:0x12345678\(%esi,%edi,2\) + 1504 1d2e 8C9C7F78 563412 mov %ds,%ds:0x12345678\(%edi,%edi,2\) + 1505 1d35 8C9C8078 563412 mov %ds,%ds:0x12345678\(%eax,%eax,4\) + 1506 1d3c 8C9C8178 563412 mov %ds,%ds:0x12345678\(%ecx,%eax,4\) + 1507 1d43 8C9C8278 563412 mov %ds,%ds:0x12345678\(%edx,%eax,4\) + 1508 1d4a 8C9C8378 563412 mov %ds,%ds:0x12345678\(%ebx,%eax,4\) + 1509 1d51 3E8C9C84 78563412 mov %ds,%ds:0x12345678\(%esp,%eax,4\) + 1510 1d59 3E8C9C85 78563412 mov %ds,%ds:0x12345678\(%ebp,%eax,4\) + 1511 1d61 8C9C8678 563412 mov %ds,%ds:0x12345678\(%esi,%eax,4\) + 1512 1d68 8C9C8778 563412 mov %ds,%ds:0x12345678\(%edi,%eax,4\) + 1513 1d6f 8C9C8878 563412 mov %ds,%ds:0x12345678\(%eax,%ecx,4\) + 1514 1d76 8C9C8978 563412 mov %ds,%ds:0x12345678\(%ecx,%ecx,4\) + 1515 1d7d 8C9C8A78 563412 mov %ds,%ds:0x12345678\(%edx,%ecx,4\) + 1516 1d84 8C9C8B78 563412 mov %ds,%ds:0x12345678\(%ebx,%ecx,4\) + 1517 1d8b 3E8C9C8C 78563412 mov %ds,%ds:0x12345678\(%esp,%ecx,4\) + 1518 1d93 3E8C9C8D 78563412 mov %ds,%ds:0x12345678\(%ebp,%ecx,4\) + 1519 1d9b 8C9C8E78 563412 mov %ds,%ds:0x12345678\(%esi,%ecx,4\) + 1520 1da2 8C9C8F78 563412 mov %ds,%ds:0x12345678\(%edi,%ecx,4\) + 1521 1da9 8C9C9078 563412 mov %ds,%ds:0x12345678\(%eax,%edx,4\) + 1522 1db0 8C9C9178 563412 mov %ds,%ds:0x12345678\(%ecx,%edx,4\) + 1523 1db7 8C9C9278 563412 mov %ds,%ds:0x12345678\(%edx,%edx,4\) + 1524 1dbe 8C9C9378 563412 mov %ds,%ds:0x12345678\(%ebx,%edx,4\) + 1525 1dc5 3E8C9C94 78563412 mov %ds,%ds:0x12345678\(%esp,%edx,4\) + 1526 1dcd 3E8C9C95 78563412 mov %ds,%ds:0x12345678\(%ebp,%edx,4\) + 1527 1dd5 8C9C9678 563412 mov %ds,%ds:0x12345678\(%esi,%edx,4\) + 1528 1ddc 8C9C9778 563412 mov %ds,%ds:0x12345678\(%edi,%edx,4\) + 1529 1de3 8C9C9878 563412 mov %ds,%ds:0x12345678\(%eax,%ebx,4\) + 1530 1dea 8C9C9978 563412 mov %ds,%ds:0x12345678\(%ecx,%ebx,4\) + 1531 1df1 8C9C9A78 563412 mov %ds,%ds:0x12345678\(%edx,%ebx,4\) + 1532 1df8 8C9C9B78 563412 mov %ds,%ds:0x12345678\(%ebx,%ebx,4\) + 1533 1dff 3E8C9C9C 78563412 mov %ds,%ds:0x12345678\(%esp,%ebx,4\) + 1534 1e07 3E8C9C9D 78563412 mov %ds,%ds:0x12345678\(%ebp,%ebx,4\) + 1535 1e0f 8C9C9E78 563412 mov %ds,%ds:0x12345678\(%esi,%ebx,4\) + 1536 1e16 8C9C9F78 563412 mov %ds,%ds:0x12345678\(%edi,%ebx,4\) + 1537 1e1d 8C987856 3412 mov %ds,%ds:0x12345678\(%eax,4\) +.*Warning:.* + 1538 1e23 8C997856 3412 mov %ds,%ds:0x12345678\(%ecx,4\) +.*Warning:.* + 1539 1e29 8C9A7856 3412 mov %ds,%ds:0x12345678\(%edx,4\) +.*Warning:.* + 1540 1e2f 8C9B7856 3412 mov %ds,%ds:0x12345678\(%ebx,4\) +.*Warning:.* + 1541 1e35 3E8C9C24 78563412 mov %ds,%ds:0x12345678\(%esp,4\) +.*Warning:.* + 1542 1e3d 3E8C9D78 563412 mov %ds,%ds:0x12345678\(%ebp,4\) +.*Warning:.* + 1543 1e44 8C9E7856 3412 mov %ds,%ds:0x12345678\(%esi,4\) +.*Warning:.* + 1544 1e4a 8C9F7856 3412 mov %ds,%ds:0x12345678\(%edi,4\) +.*Warning:.* + 1545 1e50 8C9CA878 563412 mov %ds,%ds:0x12345678\(%eax,%ebp,4\) + 1546 1e57 8C9CA978 563412 mov %ds,%ds:0x12345678\(%ecx,%ebp,4\) + 1547 1e5e 8C9CAA78 563412 mov %ds,%ds:0x12345678\(%edx,%ebp,4\) + 1548 1e65 8C9CAB78 563412 mov %ds,%ds:0x12345678\(%ebx,%ebp,4\) + 1549 1e6c 3E8C9CAC 78563412 mov %ds,%ds:0x12345678\(%esp,%ebp,4\) + 1550 1e74 3E8C9CAD 78563412 mov %ds,%ds:0x12345678\(%ebp,%ebp,4\) + 1551 1e7c 8C9CAE78 563412 mov %ds,%ds:0x12345678\(%esi,%ebp,4\) + 1552 1e83 8C9CAF78 563412 mov %ds,%ds:0x12345678\(%edi,%ebp,4\) + 1553 1e8a 8C9CB078 563412 mov %ds,%ds:0x12345678\(%eax,%esi,4\) + 1554 1e91 8C9CB178 563412 mov %ds,%ds:0x12345678\(%ecx,%esi,4\) + 1555 1e98 8C9CB278 563412 mov %ds,%ds:0x12345678\(%edx,%esi,4\) + 1556 1e9f 8C9CB378 563412 mov %ds,%ds:0x12345678\(%ebx,%esi,4\) + 1557 1ea6 3E8C9CB4 78563412 mov %ds,%ds:0x12345678\(%esp,%esi,4\) + 1558 1eae 3E8C9CB5 78563412 mov %ds,%ds:0x12345678\(%ebp,%esi,4\) + 1559 1eb6 8C9CB678 563412 mov %ds,%ds:0x12345678\(%esi,%esi,4\) + 1560 1ebd 8C9CB778 563412 mov %ds,%ds:0x12345678\(%edi,%esi,4\) + 1561 1ec4 8C9CB878 563412 mov %ds,%ds:0x12345678\(%eax,%edi,4\) + 1562 1ecb 8C9CB978 563412 mov %ds,%ds:0x12345678\(%ecx,%edi,4\) + 1563 1ed2 8C9CBA78 563412 mov %ds,%ds:0x12345678\(%edx,%edi,4\) + 1564 1ed9 8C9CBB78 563412 mov %ds,%ds:0x12345678\(%ebx,%edi,4\) + 1565 1ee0 3E8C9CBC 78563412 mov %ds,%ds:0x12345678\(%esp,%edi,4\) + 1566 1ee8 3E8C9CBD 78563412 mov %ds,%ds:0x12345678\(%ebp,%edi,4\) + 1567 1ef0 8C9CBE78 563412 mov %ds,%ds:0x12345678\(%esi,%edi,4\) + 1568 1ef7 8C9CBF78 563412 mov %ds,%ds:0x12345678\(%edi,%edi,4\) + 1569 1efe 8C9CC078 563412 mov %ds,%ds:0x12345678\(%eax,%eax,8\) + 1570 1f05 8C9CC178 563412 mov %ds,%ds:0x12345678\(%ecx,%eax,8\) + 1571 1f0c 8C9CC278 563412 mov %ds,%ds:0x12345678\(%edx,%eax,8\) + 1572 1f13 8C9CC378 563412 mov %ds,%ds:0x12345678\(%ebx,%eax,8\) + 1573 1f1a 3E8C9CC4 78563412 mov %ds,%ds:0x12345678\(%esp,%eax,8\) + 1574 1f22 3E8C9CC5 78563412 mov %ds,%ds:0x12345678\(%ebp,%eax,8\) + 1575 1f2a 8C9CC678 563412 mov %ds,%ds:0x12345678\(%esi,%eax,8\) + 1576 1f31 8C9CC778 563412 mov %ds,%ds:0x12345678\(%edi,%eax,8\) + 1577 1f38 8C9CC878 563412 mov %ds,%ds:0x12345678\(%eax,%ecx,8\) + 1578 1f3f 8C9CC978 563412 mov %ds,%ds:0x12345678\(%ecx,%ecx,8\) + 1579 1f46 8C9CCA78 563412 mov %ds,%ds:0x12345678\(%edx,%ecx,8\) + 1580 1f4d 8C9CCB78 563412 mov %ds,%ds:0x12345678\(%ebx,%ecx,8\) + 1581 1f54 3E8C9CCC 78563412 mov %ds,%ds:0x12345678\(%esp,%ecx,8\) + 1582 1f5c 3E8C9CCD 78563412 mov %ds,%ds:0x12345678\(%ebp,%ecx,8\) + 1583 1f64 8C9CCE78 563412 mov %ds,%ds:0x12345678\(%esi,%ecx,8\) + 1584 1f6b 8C9CCF78 563412 mov %ds,%ds:0x12345678\(%edi,%ecx,8\) + 1585 1f72 8C9CD078 563412 mov %ds,%ds:0x12345678\(%eax,%edx,8\) + 1586 1f79 8C9CD178 563412 mov %ds,%ds:0x12345678\(%ecx,%edx,8\) + 1587 1f80 8C9CD278 563412 mov %ds,%ds:0x12345678\(%edx,%edx,8\) + 1588 1f87 8C9CD378 563412 mov %ds,%ds:0x12345678\(%ebx,%edx,8\) + 1589 1f8e 3E8C9CD4 78563412 mov %ds,%ds:0x12345678\(%esp,%edx,8\) + 1590 1f96 3E8C9CD5 78563412 mov %ds,%ds:0x12345678\(%ebp,%edx,8\) + 1591 1f9e 8C9CD678 563412 mov %ds,%ds:0x12345678\(%esi,%edx,8\) + 1592 1fa5 8C9CD778 563412 mov %ds,%ds:0x12345678\(%edi,%edx,8\) + 1593 1fac 8C9CD878 563412 mov %ds,%ds:0x12345678\(%eax,%ebx,8\) + 1594 1fb3 8C9CD978 563412 mov %ds,%ds:0x12345678\(%ecx,%ebx,8\) + 1595 1fba 8C9CDA78 563412 mov %ds,%ds:0x12345678\(%edx,%ebx,8\) + 1596 1fc1 8C9CDB78 563412 mov %ds,%ds:0x12345678\(%ebx,%ebx,8\) + 1597 1fc8 3E8C9CDC 78563412 mov %ds,%ds:0x12345678\(%esp,%ebx,8\) + 1598 1fd0 3E8C9CDD 78563412 mov %ds,%ds:0x12345678\(%ebp,%ebx,8\) + 1599 1fd8 8C9CDE78 563412 mov %ds,%ds:0x12345678\(%esi,%ebx,8\) + 1600 1fdf 8C9CDF78 563412 mov %ds,%ds:0x12345678\(%edi,%ebx,8\) + 1601 1fe6 8C987856 3412 mov %ds,%ds:0x12345678\(%eax,8\) +.*Warning:.* + 1602 1fec 8C997856 3412 mov %ds,%ds:0x12345678\(%ecx,8\) +.*Warning:.* + 1603 1ff2 8C9A7856 3412 mov %ds,%ds:0x12345678\(%edx,8\) +.*Warning:.* + 1604 1ff8 8C9B7856 3412 mov %ds,%ds:0x12345678\(%ebx,8\) +.*Warning:.* + 1605 1ffe 3E8C9C24 78563412 mov %ds,%ds:0x12345678\(%esp,8\) +.*Warning:.* + 1606 2006 3E8C9D78 563412 mov %ds,%ds:0x12345678\(%ebp,8\) +.*Warning:.* + 1607 200d 8C9E7856 3412 mov %ds,%ds:0x12345678\(%esi,8\) +.*Warning:.* + 1608 2013 8C9F7856 3412 mov %ds,%ds:0x12345678\(%edi,8\) +.*Warning:.* + 1609 2019 8C9CE878 563412 mov %ds,%ds:0x12345678\(%eax,%ebp,8\) + 1610 2020 8C9CE978 563412 mov %ds,%ds:0x12345678\(%ecx,%ebp,8\) + 1611 2027 8C9CEA78 563412 mov %ds,%ds:0x12345678\(%edx,%ebp,8\) + 1612 202e 8C9CEB78 563412 mov %ds,%ds:0x12345678\(%ebx,%ebp,8\) + 1613 2035 3E8C9CEC 78563412 mov %ds,%ds:0x12345678\(%esp,%ebp,8\) + 1614 203d 3E8C9CED 78563412 mov %ds,%ds:0x12345678\(%ebp,%ebp,8\) + 1615 2045 8C9CEE78 563412 mov %ds,%ds:0x12345678\(%esi,%ebp,8\) + 1616 204c 8C9CEF78 563412 mov %ds,%ds:0x12345678\(%edi,%ebp,8\) + 1617 2053 8C9CF078 563412 mov %ds,%ds:0x12345678\(%eax,%esi,8\) + 1618 205a 8C9CF178 563412 mov %ds,%ds:0x12345678\(%ecx,%esi,8\) + 1619 2061 8C9CF278 563412 mov %ds,%ds:0x12345678\(%edx,%esi,8\) + 1620 2068 8C9CF378 563412 mov %ds,%ds:0x12345678\(%ebx,%esi,8\) + 1621 206f 3E8C9CF4 78563412 mov %ds,%ds:0x12345678\(%esp,%esi,8\) + 1622 2077 3E8C9CF5 78563412 mov %ds,%ds:0x12345678\(%ebp,%esi,8\) + 1623 207f 8C9CF678 563412 mov %ds,%ds:0x12345678\(%esi,%esi,8\) + 1624 2086 8C9CF778 563412 mov %ds,%ds:0x12345678\(%edi,%esi,8\) + 1625 208d 8C9CF878 563412 mov %ds,%ds:0x12345678\(%eax,%edi,8\) + 1626 2094 8C9CFA78 563412 mov %ds,%ds:0x12345678\(%edx,%edi,8\) + 1627 209b 8C9CF978 563412 mov %ds,%ds:0x12345678\(%ecx,%edi,8\) + 1628 20a2 8C9CFB78 563412 mov %ds,%ds:0x12345678\(%ebx,%edi,8\) + 1629 20a9 3E8C9CFC 78563412 mov %ds,%ds:0x12345678\(%esp,%edi,8\) + 1630 20b1 3E8C9CFD 78563412 mov %ds,%ds:0x12345678\(%ebp,%edi,8\) + 1631 20b9 8C9CFE78 563412 mov %ds,%ds:0x12345678\(%esi,%edi,8\) + 1632 20c0 8C9CFF78 563412 mov %ds,%ds:0x12345678\(%edi,%edi,8\) + 1633 20c7 3E8C5C05 00 mov %ds,%ds:\(%ebp,%eax,1\) + 1634 20cc 3E8C5C0D 00 mov %ds,%ds:\(%ebp,%ecx,1\) + 1635 20d1 3E8C5C15 00 mov %ds,%ds:\(%ebp,%edx,1\) + 1636 20d6 3E8C5C1D 00 mov %ds,%ds:\(%ebp,%ebx,1\) + 1637 20db 3E8C5D00 mov %ds,%ds:\(%ebp,1\) + 1638 20df 3E8C5C2D 00 mov %ds,%ds:\(%ebp,%ebp,1\) + 1639 20e4 3E8C5C35 00 mov %ds,%ds:\(%ebp,%esi,1\) + 1640 20e9 3E8C5C3D 00 mov %ds,%ds:\(%ebp,%edi,1\) + 1641 20ee 3E8C5C45 00 mov %ds,%ds:\(%ebp,%eax,2\) + 1642 20f3 3E8C5C4D 00 mov %ds,%ds:\(%ebp,%ecx,2\) + 1643 20f8 3E8C5C55 00 mov %ds,%ds:\(%ebp,%edx,2\) + 1644 20fd 3E8C5C5D 00 mov %ds,%ds:\(%ebp,%ebx,2\) + 1645 2102 3E8C5D00 mov %ds,%ds:\(%ebp,2\) +.*Warning:.* + 1646 2106 3E8C5C6D 00 mov %ds,%ds:\(%ebp,%ebp,2\) + 1647 210b 3E8C5C75 00 mov %ds,%ds:\(%ebp,%esi,2\) + 1648 2110 3E8C5C7D 00 mov %ds,%ds:\(%ebp,%edi,2\) + 1649 2115 3E8C5C85 00 mov %ds,%ds:\(%ebp,%eax,4\) + 1650 211a 3E8C5C8D 00 mov %ds,%ds:\(%ebp,%ecx,4\) + 1651 211f 3E8C5C95 00 mov %ds,%ds:\(%ebp,%edx,4\) + 1652 2124 3E8C5C9D 00 mov %ds,%ds:\(%ebp,%ebx,4\) + 1653 2129 3E8C5D00 mov %ds,%ds:\(%ebp,4\) +.*Warning:.* + 1654 212d 3E8C5CAD 00 mov %ds,%ds:\(%ebp,%ebp,4\) + 1655 2132 3E8C5CB5 00 mov %ds,%ds:\(%ebp,%esi,4\) + 1656 2137 3E8C5CBD 00 mov %ds,%ds:\(%ebp,%edi,4\) + 1657 213c 3E8C5CC5 00 mov %ds,%ds:\(%ebp,%eax,8\) + 1658 2141 3E8C5CCD 00 mov %ds,%ds:\(%ebp,%ecx,8\) + 1659 2146 3E8C5CD5 00 mov %ds,%ds:\(%ebp,%edx,8\) + 1660 214b 3E8C5CDD 00 mov %ds,%ds:\(%ebp,%ebx,8\) + 1661 2150 3E8C5D00 mov %ds,%ds:\(%ebp,8\) +.*Warning:.* + 1662 2154 3E8C5CED 00 mov %ds,%ds:\(%ebp,%ebp,8\) + 1663 2159 3E8C5CF5 00 mov %ds,%ds:\(%ebp,%esi,8\) + 1664 215e 3E8C5CFD 00 mov %ds,%ds:\(%ebp,%edi,8\) + 1665 2163 8C1D1200 0000 mov %ds,%ds:0x12\(,1\) + 1666 2169 8C1D1200 0000 mov %ds,%ds:0x12\(,2\) +.*Warning:.* + 1667 216f 8C1D1200 0000 mov %ds,%ds:0x12\(,4\) +.*Warning:.* + 1668 2175 8C1D1200 0000 mov %ds,%ds:0x12\(,8\) +.*Warning:.* + 1669 [ ]* + 1670 [ ]* # Force a good alignment. + 1671 217b 00 [ ]* .byte 0 diff --git a/gas/testsuite/gas/i386/modrm.s b/gas/testsuite/gas/i386/modrm.s new file mode 100644 index 0000000..a6fc689 --- /dev/null +++ b/gas/testsuite/gas/i386/modrm.s @@ -0,0 +1,1671 @@ +.psize 0 +.text + mov %ds,%ss:(%eax) + mov %ds,%ss:(%ecx) + mov %ds,%ss:(%edx) + mov %ds,%ss:(%ebx) + mov %ds,%ss:0 + mov %ds,%ss:(%esi) + mov %ds,%ss:(%edi) + mov %ds,%ss:0x12(%eax) + mov %ds,%ss:0x12(%ecx) + mov %ds,%ss:0x12(%edx) + mov %ds,%ss:0x12(%ebx) + mov %ds,%ss:0x12(%ebp) + mov %ds,%ss:0x12(%esi) + mov %ds,%ss:0x12(%edi) + mov %ds,%ss:0x12345678(%eax) + mov %ds,%ss:0x12345678(%ecx) + mov %ds,%ss:0x12345678(%edx) + mov %ds,%ss:0x12345678(%ebx) + mov %ds,%ss:0x12345678(%ebp) + mov %ds,%ss:0x12345678(%esi) + mov %ds,%ss:0x12345678(%edi) + mov %ds,%eax + mov %ds,%ecx + mov %ds,%edx + mov %ds,%ebx + mov %ds,%esp + mov %ds,%ebp + mov %ds,%esi + mov %ds,%edi + mov %ds,%ss:(%eax,%eax,1) + mov %ds,%ss:(%ecx,%eax,1) + mov %ds,%ss:(%edx,%eax,1) + mov %ds,%ss:(%ebx,%eax,1) + mov %ds,%ss:(%esp,%eax,1) + mov %ds,%ss:(,%eax,1) + mov %ds,%ss:(%esi,%eax,1) + mov %ds,%ss:(%edi,%eax,1) + mov %ds,%ss:(%eax,%ecx,1) + mov %ds,%ss:(%ecx,%ecx,1) + mov %ds,%ss:(%edx,%ecx,1) + mov %ds,%ss:(%ebx,%ecx,1) + mov %ds,%ss:(%esp,%ecx,1) + mov %ds,%ss:(,%ecx,1) + mov %ds,%ss:(%esi,%ecx,1) + mov %ds,%ss:(%edi,%ecx,1) + mov %ds,%ss:(%eax,%edx,1) + mov %ds,%ss:(%ecx,%edx,1) + mov %ds,%ss:(%edx,%edx,1) + mov %ds,%ss:(%ebx,%edx,1) + mov %ds,%ss:(%esp,%edx,1) + mov %ds,%ss:(,%edx,1) + mov %ds,%ss:(%esi,%edx,1) + mov %ds,%ss:(%edi,%edx,1) + mov %ds,%ss:(%eax,%ebx,1) + mov %ds,%ss:(%ecx,%ebx,1) + mov %ds,%ss:(%edx,%ebx,1) + mov %ds,%ss:(%ebx,%ebx,1) + mov %ds,%ss:(%esp,%ebx,1) + mov %ds,%ss:(,%ebx,1) + mov %ds,%ss:(%esi,%ebx,1) + mov %ds,%ss:(%edi,%ebx,1) + mov %ds,%ss:(%eax,1) + mov %ds,%ss:(%ecx,1) + mov %ds,%ss:(%edx,1) + mov %ds,%ss:(%ebx,1) + mov %ds,%ss:(%esp,1) + mov %ds,%ss:(,1) + mov %ds,%ss:(%esi,1) + mov %ds,%ss:(%edi,1) + mov %ds,%ss:(%eax,%ebp,1) + mov %ds,%ss:(%ecx,%ebp,1) + mov %ds,%ss:(%edx,%ebp,1) + mov %ds,%ss:(%ebx,%ebp,1) + mov %ds,%ss:(%esp,%ebp,1) + mov %ds,%ss:(,%ebp,1) + mov %ds,%ss:(%esi,%ebp,1) + mov %ds,%ss:(%edi,%ebp,1) + mov %ds,%ss:(%eax,%esi,1) + mov %ds,%ss:(%ecx,%esi,1) + mov %ds,%ss:(%edx,%esi,1) + mov %ds,%ss:(%ebx,%esi,1) + mov %ds,%ss:(%esp,%esi,1) + mov %ds,%ss:(,%esi,1) + mov %ds,%ss:(%esi,%esi,1) + mov %ds,%ss:(%edi,%esi,1) + mov %ds,%ss:(%eax,%edi,1) + mov %ds,%ss:(%ecx,%edi,1) + mov %ds,%ss:(%edx,%edi,1) + mov %ds,%ss:(%ebx,%edi,1) + mov %ds,%ss:(%esp,%edi,1) + mov %ds,%ss:(,%edi,1) + mov %ds,%ss:(%esi,%edi,1) + mov %ds,%ss:(%edi,%edi,1) + mov %ds,%ss:(%eax,%eax,2) + mov %ds,%ss:(%ecx,%eax,2) + mov %ds,%ss:(%edx,%eax,2) + mov %ds,%ss:(%ebx,%eax,2) + mov %ds,%ss:(%esp,%eax,2) + mov %ds,%ss:(,%eax,2) + mov %ds,%ss:(%esi,%eax,2) + mov %ds,%ss:(%edi,%eax,2) + mov %ds,%ss:(%eax,%ecx,2) + mov %ds,%ss:(%ecx,%ecx,2) + mov %ds,%ss:(%edx,%ecx,2) + mov %ds,%ss:(%ebx,%ecx,2) + mov %ds,%ss:(%esp,%ecx,2) + mov %ds,%ss:(,%ecx,2) + mov %ds,%ss:(%esi,%ecx,2) + mov %ds,%ss:(%edi,%ecx,2) + mov %ds,%ss:(%eax,%edx,2) + mov %ds,%ss:(%ecx,%edx,2) + mov %ds,%ss:(%edx,%edx,2) + mov %ds,%ss:(%ebx,%edx,2) + mov %ds,%ss:(%esp,%edx,2) + mov %ds,%ss:(,%edx,2) + mov %ds,%ss:(%esi,%edx,2) + mov %ds,%ss:(%edi,%edx,2) + mov %ds,%ss:(%eax,%ebx,2) + mov %ds,%ss:(%ecx,%ebx,2) + mov %ds,%ss:(%edx,%ebx,2) + mov %ds,%ss:(%ebx,%ebx,2) + mov %ds,%ss:(%esp,%ebx,2) + mov %ds,%ss:(,%ebx,2) + mov %ds,%ss:(%esi,%ebx,2) + mov %ds,%ss:(%edi,%ebx,2) + mov %ds,%ss:(%eax,2) + mov %ds,%ss:(%ecx,2) + mov %ds,%ss:(%edx,2) + mov %ds,%ss:(%ebx,2) + mov %ds,%ss:(%esp,2) + mov %ds,%ss:(,2) + mov %ds,%ss:(%esi,2) + mov %ds,%ss:(%edi,2) + mov %ds,%ss:(%eax,%ebp,2) + mov %ds,%ss:(%ecx,%ebp,2) + mov %ds,%ss:(%edx,%ebp,2) + mov %ds,%ss:(%ebx,%ebp,2) + mov %ds,%ss:(%esp,%ebp,2) + mov %ds,%ss:(,%ebp,2) + mov %ds,%ss:(%esi,%ebp,2) + mov %ds,%ss:(%edi,%ebp,2) + mov %ds,%ss:(%eax,%esi,2) + mov %ds,%ss:(%ecx,%esi,2) + mov %ds,%ss:(%edx,%esi,2) + mov %ds,%ss:(%ebx,%esi,2) + mov %ds,%ss:(%esp,%esi,2) + mov %ds,%ss:(,%esi,2) + mov %ds,%ss:(%esi,%esi,2) + mov %ds,%ss:(%edi,%esi,2) + mov %ds,%ss:(%eax,%edi,2) + mov %ds,%ss:(%ecx,%edi,2) + mov %ds,%ss:(%edx,%edi,2) + mov %ds,%ss:(%ebx,%edi,2) + mov %ds,%ss:(%esp,%edi,2) + mov %ds,%ss:(,%edi,2) + mov %ds,%ss:(%esi,%edi,2) + mov %ds,%ss:(%edi,%edi,2) + mov %ds,%ss:(%eax,%eax,4) + mov %ds,%ss:(%ecx,%eax,4) + mov %ds,%ss:(%edx,%eax,4) + mov %ds,%ss:(%ebx,%eax,4) + mov %ds,%ss:(%esp,%eax,4) + mov %ds,%ss:(,%eax,4) + mov %ds,%ss:(%esi,%eax,4) + mov %ds,%ss:(%edi,%eax,4) + mov %ds,%ss:(%eax,%ecx,4) + mov %ds,%ss:(%ecx,%ecx,4) + mov %ds,%ss:(%edx,%ecx,4) + mov %ds,%ss:(%ebx,%ecx,4) + mov %ds,%ss:(%esp,%ecx,4) + mov %ds,%ss:(,%ecx,4) + mov %ds,%ss:(%esi,%ecx,4) + mov %ds,%ss:(%edi,%ecx,4) + mov %ds,%ss:(%eax,%edx,4) + mov %ds,%ss:(%ecx,%edx,4) + mov %ds,%ss:(%edx,%edx,4) + mov %ds,%ss:(%ebx,%edx,4) + mov %ds,%ss:(%esp,%edx,4) + mov %ds,%ss:(,%edx,4) + mov %ds,%ss:(%esi,%edx,4) + mov %ds,%ss:(%edi,%edx,4) + mov %ds,%ss:(%eax,%ebx,4) + mov %ds,%ss:(%ecx,%ebx,4) + mov %ds,%ss:(%edx,%ebx,4) + mov %ds,%ss:(%ebx,%ebx,4) + mov %ds,%ss:(%esp,%ebx,4) + mov %ds,%ss:(,%ebx,4) + mov %ds,%ss:(%esi,%ebx,4) + mov %ds,%ss:(%edi,%ebx,4) + mov %ds,%ss:(%eax,4) + mov %ds,%ss:(%ecx,4) + mov %ds,%ss:(%edx,4) + mov %ds,%ss:(%ebx,4) + mov %ds,%ss:(%esp,4) + mov %ds,%ss:(,4) + mov %ds,%ss:(%esi,4) + mov %ds,%ss:(%edi,4) + mov %ds,%ss:(%eax,%ebp,4) + mov %ds,%ss:(%ecx,%ebp,4) + mov %ds,%ss:(%edx,%ebp,4) + mov %ds,%ss:(%ebx,%ebp,4) + mov %ds,%ss:(%esp,%ebp,4) + mov %ds,%ss:(,%ebp,4) + mov %ds,%ss:(%esi,%ebp,4) + mov %ds,%ss:(%edi,%ebp,4) + mov %ds,%ss:(%eax,%esi,4) + mov %ds,%ss:(%ecx,%esi,4) + mov %ds,%ss:(%edx,%esi,4) + mov %ds,%ss:(%ebx,%esi,4) + mov %ds,%ss:(%esp,%esi,4) + mov %ds,%ss:(,%esi,4) + mov %ds,%ss:(%esi,%esi,4) + mov %ds,%ss:(%edi,%esi,4) + mov %ds,%ss:(%eax,%edi,4) + mov %ds,%ss:(%ecx,%edi,4) + mov %ds,%ss:(%edx,%edi,4) + mov %ds,%ss:(%ebx,%edi,4) + mov %ds,%ss:(%esp,%edi,4) + mov %ds,%ss:(,%edi,4) + mov %ds,%ss:(%esi,%edi,4) + mov %ds,%ss:(%edi,%edi,4) + mov %ds,%ss:(%eax,%eax,8) + mov %ds,%ss:(%ecx,%eax,8) + mov %ds,%ss:(%edx,%eax,8) + mov %ds,%ss:(%ebx,%eax,8) + mov %ds,%ss:(%esp,%eax,8) + mov %ds,%ss:(,%eax,8) + mov %ds,%ss:(%esi,%eax,8) + mov %ds,%ss:(%edi,%eax,8) + mov %ds,%ss:(%eax,%ecx,8) + mov %ds,%ss:(%ecx,%ecx,8) + mov %ds,%ss:(%edx,%ecx,8) + mov %ds,%ss:(%ebx,%ecx,8) + mov %ds,%ss:(%esp,%ecx,8) + mov %ds,%ss:(,%ecx,8) + mov %ds,%ss:(%esi,%ecx,8) + mov %ds,%ss:(%edi,%ecx,8) + mov %ds,%ss:(%eax,%edx,8) + mov %ds,%ss:(%ecx,%edx,8) + mov %ds,%ss:(%edx,%edx,8) + mov %ds,%ss:(%ebx,%edx,8) + mov %ds,%ss:(%esp,%edx,8) + mov %ds,%ss:(,%edx,8) + mov %ds,%ss:(%esi,%edx,8) + mov %ds,%ss:(%edi,%edx,8) + mov %ds,%ss:(%eax,%ebx,8) + mov %ds,%ss:(%ecx,%ebx,8) + mov %ds,%ss:(%edx,%ebx,8) + mov %ds,%ss:(%ebx,%ebx,8) + mov %ds,%ss:(%esp,%ebx,8) + mov %ds,%ss:(,%ebx,8) + mov %ds,%ss:(%esi,%ebx,8) + mov %ds,%ss:(%edi,%ebx,8) + mov %ds,%ss:(%eax,8) + mov %ds,%ss:(%ecx,8) + mov %ds,%ss:(%edx,8) + mov %ds,%ss:(%ebx,8) + mov %ds,%ss:(%esp,8) + mov %ds,%ss:(,8) + mov %ds,%ss:(%esi,8) + mov %ds,%ss:(%edi,8) + mov %ds,%ss:(%eax,%ebp,8) + mov %ds,%ss:(%ecx,%ebp,8) + mov %ds,%ss:(%edx,%ebp,8) + mov %ds,%ss:(%ebx,%ebp,8) + mov %ds,%ss:(%esp,%ebp,8) + mov %ds,%ss:(,%ebp,8) + mov %ds,%ss:(%esi,%ebp,8) + mov %ds,%ss:(%edi,%ebp,8) + mov %ds,%ss:(%eax,%esi,8) + mov %ds,%ss:(%ecx,%esi,8) + mov %ds,%ss:(%edx,%esi,8) + mov %ds,%ss:(%ebx,%esi,8) + mov %ds,%ss:(%esp,%esi,8) + mov %ds,%ss:(,%esi,8) + mov %ds,%ss:(%esi,%esi,8) + mov %ds,%ss:(%edi,%esi,8) + mov %ds,%ss:(%eax,%edi,8) + mov %ds,%ss:(%edx,%edi,8) + mov %ds,%ss:(%ecx,%edi,8) + mov %ds,%ss:(%ebx,%edi,8) + mov %ds,%ss:(%esp,%edi,8) + mov %ds,%ss:(,%edi,8) + mov %ds,%ss:(%esi,%edi,8) + mov %ds,%ss:(%edi,%edi,8) + mov %ds,%ss:0x12(%eax,%eax,1) + mov %ds,%ss:0x12(%ecx,%eax,1) + mov %ds,%ss:0x12(%edx,%eax,1) + mov %ds,%ss:0x12(%ebx,%eax,1) + mov %ds,%ss:0x12(%esp,%eax,1) + mov %ds,%ss:0x12(%ebp,%eax,1) + mov %ds,%ss:0x12(%esi,%eax,1) + mov %ds,%ss:0x12(%edi,%eax,1) + mov %ds,%ss:0x12(%eax,%ecx,1) + mov %ds,%ss:0x12(%ecx,%ecx,1) + mov %ds,%ss:0x12(%edx,%ecx,1) + mov %ds,%ss:0x12(%ebx,%ecx,1) + mov %ds,%ss:0x12(%esp,%ecx,1) + mov %ds,%ss:0x12(%ebp,%ecx,1) + mov %ds,%ss:0x12(%esi,%ecx,1) + mov %ds,%ss:0x12(%edi,%ecx,1) + mov %ds,%ss:0x12(%eax,%edx,1) + mov %ds,%ss:0x12(%ecx,%edx,1) + mov %ds,%ss:0x12(%edx,%edx,1) + mov %ds,%ss:0x12(%ebx,%edx,1) + mov %ds,%ss:0x12(%esp,%edx,1) + mov %ds,%ss:0x12(%ebp,%edx,1) + mov %ds,%ss:0x12(%esi,%edx,1) + mov %ds,%ss:0x12(%edi,%edx,1) + mov %ds,%ss:0x12(%eax,%ebx,1) + mov %ds,%ss:0x12(%ecx,%ebx,1) + mov %ds,%ss:0x12(%edx,%ebx,1) + mov %ds,%ss:0x12(%ebx,%ebx,1) + mov %ds,%ss:0x12(%esp,%ebx,1) + mov %ds,%ss:0x12(%ebp,%ebx,1) + mov %ds,%ss:0x12(%esi,%ebx,1) + mov %ds,%ss:0x12(%edi,%ebx,1) + mov %ds,%ss:0x12(%eax,1) + mov %ds,%ss:0x12(%ecx,1) + mov %ds,%ss:0x12(%edx,1) + mov %ds,%ss:0x12(%ebx,1) + mov %ds,%ss:0x12(%esp,1) + mov %ds,%ss:0x12(%ebp,1) + mov %ds,%ss:0x12(%esi,1) + mov %ds,%ss:0x12(%edi,1) + mov %ds,%ss:0x12(%eax,%ebp,1) + mov %ds,%ss:0x12(%ecx,%ebp,1) + mov %ds,%ss:0x12(%edx,%ebp,1) + mov %ds,%ss:0x12(%ebx,%ebp,1) + mov %ds,%ss:0x12(%esp,%ebp,1) + mov %ds,%ss:0x12(%ebp,%ebp,1) + mov %ds,%ss:0x12(%esi,%ebp,1) + mov %ds,%ss:0x12(%edi,%ebp,1) + mov %ds,%ss:0x12(%eax,%esi,1) + mov %ds,%ss:0x12(%ecx,%esi,1) + mov %ds,%ss:0x12(%edx,%esi,1) + mov %ds,%ss:0x12(%ebx,%esi,1) + mov %ds,%ss:0x12(%esp,%esi,1) + mov %ds,%ss:0x12(%ebp,%esi,1) + mov %ds,%ss:0x12(%esi,%esi,1) + mov %ds,%ss:0x12(%edi,%esi,1) + mov %ds,%ss:0x12(%eax,%edi,1) + mov %ds,%ss:0x12(%ecx,%edi,1) + mov %ds,%ss:0x12(%edx,%edi,1) + mov %ds,%ss:0x12(%ebx,%edi,1) + mov %ds,%ss:0x12(%esp,%edi,1) + mov %ds,%ss:0x12(%ebp,%edi,1) + mov %ds,%ss:0x12(%esi,%edi,1) + mov %ds,%ss:0x12(%edi,%edi,1) + mov %ds,%ss:0x12(%eax,%eax,2) + mov %ds,%ss:0x12(%ecx,%eax,2) + mov %ds,%ss:0x12(%edx,%eax,2) + mov %ds,%ss:0x12(%ebx,%eax,2) + mov %ds,%ss:0x12(%esp,%eax,2) + mov %ds,%ss:0x12(%ebp,%eax,2) + mov %ds,%ss:0x12(%esi,%eax,2) + mov %ds,%ss:0x12(%edi,%eax,2) + mov %ds,%ss:0x12(%eax,%ecx,2) + mov %ds,%ss:0x12(%ecx,%ecx,2) + mov %ds,%ss:0x12(%edx,%ecx,2) + mov %ds,%ss:0x12(%ebx,%ecx,2) + mov %ds,%ss:0x12(%esp,%ecx,2) + mov %ds,%ss:0x12(%ebp,%ecx,2) + mov %ds,%ss:0x12(%esi,%ecx,2) + mov %ds,%ss:0x12(%edi,%ecx,2) + mov %ds,%ss:0x12(%eax,%edx,2) + mov %ds,%ss:0x12(%ecx,%edx,2) + mov %ds,%ss:0x12(%edx,%edx,2) + mov %ds,%ss:0x12(%ebx,%edx,2) + mov %ds,%ss:0x12(%esp,%edx,2) + mov %ds,%ss:0x12(%ebp,%edx,2) + mov %ds,%ss:0x12(%esi,%edx,2) + mov %ds,%ss:0x12(%edi,%edx,2) + mov %ds,%ss:0x12(%eax,%ebx,2) + mov %ds,%ss:0x12(%ecx,%ebx,2) + mov %ds,%ss:0x12(%edx,%ebx,2) + mov %ds,%ss:0x12(%ebx,%ebx,2) + mov %ds,%ss:0x12(%esp,%ebx,2) + mov %ds,%ss:0x12(%ebp,%ebx,2) + mov %ds,%ss:0x12(%esi,%ebx,2) + mov %ds,%ss:0x12(%edi,%ebx,2) + mov %ds,%ss:0x12(%eax,2) + mov %ds,%ss:0x12(%ecx,2) + mov %ds,%ss:0x12(%edx,2) + mov %ds,%ss:0x12(%ebx,2) + mov %ds,%ss:0x12(%esp,2) + mov %ds,%ss:0x12(%ebp,2) + mov %ds,%ss:0x12(%esi,2) + mov %ds,%ss:0x12(%edi,2) + mov %ds,%ss:0x12(%eax,%ebp,2) + mov %ds,%ss:0x12(%ecx,%ebp,2) + mov %ds,%ss:0x12(%edx,%ebp,2) + mov %ds,%ss:0x12(%ebx,%ebp,2) + mov %ds,%ss:0x12(%esp,%ebp,2) + mov %ds,%ss:0x12(%ebp,%ebp,2) + mov %ds,%ss:0x12(%esi,%ebp,2) + mov %ds,%ss:0x12(%edi,%ebp,2) + mov %ds,%ss:0x12(%eax,%esi,2) + mov %ds,%ss:0x12(%ecx,%esi,2) + mov %ds,%ss:0x12(%edx,%esi,2) + mov %ds,%ss:0x12(%ebx,%esi,2) + mov %ds,%ss:0x12(%esp,%esi,2) + mov %ds,%ss:0x12(%ebp,%esi,2) + mov %ds,%ss:0x12(%esi,%esi,2) + mov %ds,%ss:0x12(%edi,%esi,2) + mov %ds,%ss:0x12(%eax,%edi,2) + mov %ds,%ss:0x12(%ecx,%edi,2) + mov %ds,%ss:0x12(%edx,%edi,2) + mov %ds,%ss:0x12(%ebx,%edi,2) + mov %ds,%ss:0x12(%esp,%edi,2) + mov %ds,%ss:0x12(%ebp,%edi,2) + mov %ds,%ss:0x12(%esi,%edi,2) + mov %ds,%ss:0x12(%edi,%edi,2) + mov %ds,%ss:0x12(%eax,%eax,4) + mov %ds,%ss:0x12(%ecx,%eax,4) + mov %ds,%ss:0x12(%edx,%eax,4) + mov %ds,%ss:0x12(%ebx,%eax,4) + mov %ds,%ss:0x12(%esp,%eax,4) + mov %ds,%ss:0x12(%ebp,%eax,4) + mov %ds,%ss:0x12(%esi,%eax,4) + mov %ds,%ss:0x12(%edi,%eax,4) + mov %ds,%ss:0x12(%eax,%ecx,4) + mov %ds,%ss:0x12(%ecx,%ecx,4) + mov %ds,%ss:0x12(%edx,%ecx,4) + mov %ds,%ss:0x12(%ebx,%ecx,4) + mov %ds,%ss:0x12(%esp,%ecx,4) + mov %ds,%ss:0x12(%ebp,%ecx,4) + mov %ds,%ss:0x12(%esi,%ecx,4) + mov %ds,%ss:0x12(%edi,%ecx,4) + mov %ds,%ss:0x12(%eax,%edx,4) + mov %ds,%ss:0x12(%ecx,%edx,4) + mov %ds,%ss:0x12(%edx,%edx,4) + mov %ds,%ss:0x12(%ebx,%edx,4) + mov %ds,%ss:0x12(%esp,%edx,4) + mov %ds,%ss:0x12(%ebp,%edx,4) + mov %ds,%ss:0x12(%esi,%edx,4) + mov %ds,%ss:0x12(%edi,%edx,4) + mov %ds,%ss:0x12(%eax,%ebx,4) + mov %ds,%ss:0x12(%ecx,%ebx,4) + mov %ds,%ss:0x12(%edx,%ebx,4) + mov %ds,%ss:0x12(%ebx,%ebx,4) + mov %ds,%ss:0x12(%esp,%ebx,4) + mov %ds,%ss:0x12(%ebp,%ebx,4) + mov %ds,%ss:0x12(%esi,%ebx,4) + mov %ds,%ss:0x12(%edi,%ebx,4) + mov %ds,%ss:0x12(%eax,4) + mov %ds,%ss:0x12(%ecx,4) + mov %ds,%ss:0x12(%edx,4) + mov %ds,%ss:0x12(%ebx,4) + mov %ds,%ss:0x12(%esp,4) + mov %ds,%ss:0x12(%ebp,4) + mov %ds,%ss:0x12(%esi,4) + mov %ds,%ss:0x12(%edi,4) + mov %ds,%ss:0x12(%eax,%ebp,4) + mov %ds,%ss:0x12(%ecx,%ebp,4) + mov %ds,%ss:0x12(%edx,%ebp,4) + mov %ds,%ss:0x12(%ebx,%ebp,4) + mov %ds,%ss:0x12(%esp,%ebp,4) + mov %ds,%ss:0x12(%ebp,%ebp,4) + mov %ds,%ss:0x12(%esi,%ebp,4) + mov %ds,%ss:0x12(%edi,%ebp,4) + mov %ds,%ss:0x12(%eax,%esi,4) + mov %ds,%ss:0x12(%ecx,%esi,4) + mov %ds,%ss:0x12(%edx,%esi,4) + mov %ds,%ss:0x12(%ebx,%esi,4) + mov %ds,%ss:0x12(%esp,%esi,4) + mov %ds,%ss:0x12(%ebp,%esi,4) + mov %ds,%ss:0x12(%esi,%esi,4) + mov %ds,%ss:0x12(%edi,%esi,4) + mov %ds,%ss:0x12(%eax,%edi,4) + mov %ds,%ss:0x12(%ecx,%edi,4) + mov %ds,%ss:0x12(%edx,%edi,4) + mov %ds,%ss:0x12(%ebx,%edi,4) + mov %ds,%ss:0x12(%esp,%edi,4) + mov %ds,%ss:0x12(%ebp,%edi,4) + mov %ds,%ss:0x12(%esi,%edi,4) + mov %ds,%ss:0x12(%edi,%edi,4) + mov %ds,%ss:0x12(%eax,%eax,8) + mov %ds,%ss:0x12(%ecx,%eax,8) + mov %ds,%ss:0x12(%edx,%eax,8) + mov %ds,%ss:0x12(%ebx,%eax,8) + mov %ds,%ss:0x12(%esp,%eax,8) + mov %ds,%ss:0x12(%ebp,%eax,8) + mov %ds,%ss:0x12(%esi,%eax,8) + mov %ds,%ss:0x12(%edi,%eax,8) + mov %ds,%ss:0x12(%eax,%ecx,8) + mov %ds,%ss:0x12(%ecx,%ecx,8) + mov %ds,%ss:0x12(%edx,%ecx,8) + mov %ds,%ss:0x12(%ebx,%ecx,8) + mov %ds,%ss:0x12(%esp,%ecx,8) + mov %ds,%ss:0x12(%ebp,%ecx,8) + mov %ds,%ss:0x12(%esi,%ecx,8) + mov %ds,%ss:0x12(%edi,%ecx,8) + mov %ds,%ss:0x12(%eax,%edx,8) + mov %ds,%ss:0x12(%ecx,%edx,8) + mov %ds,%ss:0x12(%edx,%edx,8) + mov %ds,%ss:0x12(%ebx,%edx,8) + mov %ds,%ss:0x12(%esp,%edx,8) + mov %ds,%ss:0x12(%ebp,%edx,8) + mov %ds,%ss:0x12(%esi,%edx,8) + mov %ds,%ss:0x12(%edi,%edx,8) + mov %ds,%ss:0x12(%eax,%ebx,8) + mov %ds,%ss:0x12(%ecx,%ebx,8) + mov %ds,%ss:0x12(%edx,%ebx,8) + mov %ds,%ss:0x12(%ebx,%ebx,8) + mov %ds,%ss:0x12(%esp,%ebx,8) + mov %ds,%ss:0x12(%ebp,%ebx,8) + mov %ds,%ss:0x12(%esi,%ebx,8) + mov %ds,%ss:0x12(%edi,%ebx,8) + mov %ds,%ss:0x12(%eax,8) + mov %ds,%ss:0x12(%ecx,8) + mov %ds,%ss:0x12(%edx,8) + mov %ds,%ss:0x12(%ebx,8) + mov %ds,%ss:0x12(%esp,8) + mov %ds,%ss:0x12(%ebp,8) + mov %ds,%ss:0x12(%esi,8) + mov %ds,%ss:0x12(%edi,8) + mov %ds,%ss:0x12(%eax,%ebp,8) + mov %ds,%ss:0x12(%ecx,%ebp,8) + mov %ds,%ss:0x12(%edx,%ebp,8) + mov %ds,%ss:0x12(%ebx,%ebp,8) + mov %ds,%ss:0x12(%esp,%ebp,8) + mov %ds,%ss:0x12(%ebp,%ebp,8) + mov %ds,%ss:0x12(%esi,%ebp,8) + mov %ds,%ss:0x12(%edi,%ebp,8) + mov %ds,%ss:0x12(%eax,%esi,8) + mov %ds,%ss:0x12(%ecx,%esi,8) + mov %ds,%ss:0x12(%edx,%esi,8) + mov %ds,%ss:0x12(%ebx,%esi,8) + mov %ds,%ss:0x12(%esp,%esi,8) + mov %ds,%ss:0x12(%ebp,%esi,8) + mov %ds,%ss:0x12(%esi,%esi,8) + mov %ds,%ss:0x12(%edi,%esi,8) + mov %ds,%ss:0x12(%eax,%edi,8) + mov %ds,%ss:0x12(%edx,%edi,8) + mov %ds,%ss:0x12(%ecx,%edi,8) + mov %ds,%ss:0x12(%ebx,%edi,8) + mov %ds,%ss:0x12(%esp,%edi,8) + mov %ds,%ss:0x12(%ebp,%edi,8) + mov %ds,%ss:0x12(%esi,%edi,8) + mov %ds,%ss:0x12(%edi,%edi,8) + mov %ds,%ss:0x12345678(%eax,%eax,1) + mov %ds,%ss:0x12345678(%ecx,%eax,1) + mov %ds,%ss:0x12345678(%edx,%eax,1) + mov %ds,%ss:0x12345678(%ebx,%eax,1) + mov %ds,%ss:0x12345678(%esp,%eax,1) + mov %ds,%ss:0x12345678(%ebp,%eax,1) + mov %ds,%ss:0x12345678(%esi,%eax,1) + mov %ds,%ss:0x12345678(%edi,%eax,1) + mov %ds,%ss:0x12345678(%eax,%ecx,1) + mov %ds,%ss:0x12345678(%ecx,%ecx,1) + mov %ds,%ss:0x12345678(%edx,%ecx,1) + mov %ds,%ss:0x12345678(%ebx,%ecx,1) + mov %ds,%ss:0x12345678(%esp,%ecx,1) + mov %ds,%ss:0x12345678(%ebp,%ecx,1) + mov %ds,%ss:0x12345678(%esi,%ecx,1) + mov %ds,%ss:0x12345678(%edi,%ecx,1) + mov %ds,%ss:0x12345678(%eax,%edx,1) + mov %ds,%ss:0x12345678(%ecx,%edx,1) + mov %ds,%ss:0x12345678(%edx,%edx,1) + mov %ds,%ss:0x12345678(%ebx,%edx,1) + mov %ds,%ss:0x12345678(%esp,%edx,1) + mov %ds,%ss:0x12345678(%ebp,%edx,1) + mov %ds,%ss:0x12345678(%esi,%edx,1) + mov %ds,%ss:0x12345678(%edi,%edx,1) + mov %ds,%ss:0x12345678(%eax,%ebx,1) + mov %ds,%ss:0x12345678(%ecx,%ebx,1) + mov %ds,%ss:0x12345678(%edx,%ebx,1) + mov %ds,%ss:0x12345678(%ebx,%ebx,1) + mov %ds,%ss:0x12345678(%esp,%ebx,1) + mov %ds,%ss:0x12345678(%ebp,%ebx,1) + mov %ds,%ss:0x12345678(%esi,%ebx,1) + mov %ds,%ss:0x12345678(%edi,%ebx,1) + mov %ds,%ss:0x12345678(%eax,1) + mov %ds,%ss:0x12345678(%ecx,1) + mov %ds,%ss:0x12345678(%edx,1) + mov %ds,%ss:0x12345678(%ebx,1) + mov %ds,%ss:0x12345678(%esp,1) + mov %ds,%ss:0x12345678(%ebp,1) + mov %ds,%ss:0x12345678(%esi,1) + mov %ds,%ss:0x12345678(%edi,1) + mov %ds,%ss:0x12345678(%eax,%ebp,1) + mov %ds,%ss:0x12345678(%ecx,%ebp,1) + mov %ds,%ss:0x12345678(%edx,%ebp,1) + mov %ds,%ss:0x12345678(%ebx,%ebp,1) + mov %ds,%ss:0x12345678(%esp,%ebp,1) + mov %ds,%ss:0x12345678(%ebp,%ebp,1) + mov %ds,%ss:0x12345678(%esi,%ebp,1) + mov %ds,%ss:0x12345678(%edi,%ebp,1) + mov %ds,%ss:0x12345678(%eax,%esi,1) + mov %ds,%ss:0x12345678(%ecx,%esi,1) + mov %ds,%ss:0x12345678(%edx,%esi,1) + mov %ds,%ss:0x12345678(%ebx,%esi,1) + mov %ds,%ss:0x12345678(%esp,%esi,1) + mov %ds,%ss:0x12345678(%ebp,%esi,1) + mov %ds,%ss:0x12345678(%esi,%esi,1) + mov %ds,%ss:0x12345678(%edi,%esi,1) + mov %ds,%ss:0x12345678(%eax,%edi,1) + mov %ds,%ss:0x12345678(%ecx,%edi,1) + mov %ds,%ss:0x12345678(%edx,%edi,1) + mov %ds,%ss:0x12345678(%ebx,%edi,1) + mov %ds,%ss:0x12345678(%esp,%edi,1) + mov %ds,%ss:0x12345678(%ebp,%edi,1) + mov %ds,%ss:0x12345678(%esi,%edi,1) + mov %ds,%ss:0x12345678(%edi,%edi,1) + mov %ds,%ss:0x12345678(%eax,%eax,2) + mov %ds,%ss:0x12345678(%ecx,%eax,2) + mov %ds,%ss:0x12345678(%edx,%eax,2) + mov %ds,%ss:0x12345678(%ebx,%eax,2) + mov %ds,%ss:0x12345678(%esp,%eax,2) + mov %ds,%ss:0x12345678(%ebp,%eax,2) + mov %ds,%ss:0x12345678(%esi,%eax,2) + mov %ds,%ss:0x12345678(%edi,%eax,2) + mov %ds,%ss:0x12345678(%eax,%ecx,2) + mov %ds,%ss:0x12345678(%ecx,%ecx,2) + mov %ds,%ss:0x12345678(%edx,%ecx,2) + mov %ds,%ss:0x12345678(%ebx,%ecx,2) + mov %ds,%ss:0x12345678(%esp,%ecx,2) + mov %ds,%ss:0x12345678(%ebp,%ecx,2) + mov %ds,%ss:0x12345678(%esi,%ecx,2) + mov %ds,%ss:0x12345678(%edi,%ecx,2) + mov %ds,%ss:0x12345678(%eax,%edx,2) + mov %ds,%ss:0x12345678(%ecx,%edx,2) + mov %ds,%ss:0x12345678(%edx,%edx,2) + mov %ds,%ss:0x12345678(%ebx,%edx,2) + mov %ds,%ss:0x12345678(%esp,%edx,2) + mov %ds,%ss:0x12345678(%ebp,%edx,2) + mov %ds,%ss:0x12345678(%esi,%edx,2) + mov %ds,%ss:0x12345678(%edi,%edx,2) + mov %ds,%ss:0x12345678(%eax,%ebx,2) + mov %ds,%ss:0x12345678(%ecx,%ebx,2) + mov %ds,%ss:0x12345678(%edx,%ebx,2) + mov %ds,%ss:0x12345678(%ebx,%ebx,2) + mov %ds,%ss:0x12345678(%esp,%ebx,2) + mov %ds,%ss:0x12345678(%ebp,%ebx,2) + mov %ds,%ss:0x12345678(%esi,%ebx,2) + mov %ds,%ss:0x12345678(%edi,%ebx,2) + mov %ds,%ss:0x12345678(%eax,2) + mov %ds,%ss:0x12345678(%ecx,2) + mov %ds,%ss:0x12345678(%edx,2) + mov %ds,%ss:0x12345678(%ebx,2) + mov %ds,%ss:0x12345678(%esp,2) + mov %ds,%ss:0x12345678(%ebp,2) + mov %ds,%ss:0x12345678(%esi,2) + mov %ds,%ss:0x12345678(%edi,2) + mov %ds,%ss:0x12345678(%eax,%ebp,2) + mov %ds,%ss:0x12345678(%ecx,%ebp,2) + mov %ds,%ss:0x12345678(%edx,%ebp,2) + mov %ds,%ss:0x12345678(%ebx,%ebp,2) + mov %ds,%ss:0x12345678(%esp,%ebp,2) + mov %ds,%ss:0x12345678(%ebp,%ebp,2) + mov %ds,%ss:0x12345678(%esi,%ebp,2) + mov %ds,%ss:0x12345678(%edi,%ebp,2) + mov %ds,%ss:0x12345678(%eax,%esi,2) + mov %ds,%ss:0x12345678(%ecx,%esi,2) + mov %ds,%ss:0x12345678(%edx,%esi,2) + mov %ds,%ss:0x12345678(%ebx,%esi,2) + mov %ds,%ss:0x12345678(%esp,%esi,2) + mov %ds,%ss:0x12345678(%ebp,%esi,2) + mov %ds,%ss:0x12345678(%esi,%esi,2) + mov %ds,%ss:0x12345678(%edi,%esi,2) + mov %ds,%ss:0x12345678(%eax,%edi,2) + mov %ds,%ss:0x12345678(%ecx,%edi,2) + mov %ds,%ss:0x12345678(%edx,%edi,2) + mov %ds,%ss:0x12345678(%ebx,%edi,2) + mov %ds,%ss:0x12345678(%esp,%edi,2) + mov %ds,%ss:0x12345678(%ebp,%edi,2) + mov %ds,%ss:0x12345678(%esi,%edi,2) + mov %ds,%ss:0x12345678(%edi,%edi,2) + mov %ds,%ss:0x12345678(%eax,%eax,4) + mov %ds,%ss:0x12345678(%ecx,%eax,4) + mov %ds,%ss:0x12345678(%edx,%eax,4) + mov %ds,%ss:0x12345678(%ebx,%eax,4) + mov %ds,%ss:0x12345678(%esp,%eax,4) + mov %ds,%ss:0x12345678(%ebp,%eax,4) + mov %ds,%ss:0x12345678(%esi,%eax,4) + mov %ds,%ss:0x12345678(%edi,%eax,4) + mov %ds,%ss:0x12345678(%eax,%ecx,4) + mov %ds,%ss:0x12345678(%ecx,%ecx,4) + mov %ds,%ss:0x12345678(%edx,%ecx,4) + mov %ds,%ss:0x12345678(%ebx,%ecx,4) + mov %ds,%ss:0x12345678(%esp,%ecx,4) + mov %ds,%ss:0x12345678(%ebp,%ecx,4) + mov %ds,%ss:0x12345678(%esi,%ecx,4) + mov %ds,%ss:0x12345678(%edi,%ecx,4) + mov %ds,%ss:0x12345678(%eax,%edx,4) + mov %ds,%ss:0x12345678(%ecx,%edx,4) + mov %ds,%ss:0x12345678(%edx,%edx,4) + mov %ds,%ss:0x12345678(%ebx,%edx,4) + mov %ds,%ss:0x12345678(%esp,%edx,4) + mov %ds,%ss:0x12345678(%ebp,%edx,4) + mov %ds,%ss:0x12345678(%esi,%edx,4) + mov %ds,%ss:0x12345678(%edi,%edx,4) + mov %ds,%ss:0x12345678(%eax,%ebx,4) + mov %ds,%ss:0x12345678(%ecx,%ebx,4) + mov %ds,%ss:0x12345678(%edx,%ebx,4) + mov %ds,%ss:0x12345678(%ebx,%ebx,4) + mov %ds,%ss:0x12345678(%esp,%ebx,4) + mov %ds,%ss:0x12345678(%ebp,%ebx,4) + mov %ds,%ss:0x12345678(%esi,%ebx,4) + mov %ds,%ss:0x12345678(%edi,%ebx,4) + mov %ds,%ss:0x12345678(%eax,4) + mov %ds,%ss:0x12345678(%ecx,4) + mov %ds,%ss:0x12345678(%edx,4) + mov %ds,%ss:0x12345678(%ebx,4) + mov %ds,%ss:0x12345678(%esp,4) + mov %ds,%ss:0x12345678(%ebp,4) + mov %ds,%ss:0x12345678(%esi,4) + mov %ds,%ss:0x12345678(%edi,4) + mov %ds,%ss:0x12345678(%eax,%ebp,4) + mov %ds,%ss:0x12345678(%ecx,%ebp,4) + mov %ds,%ss:0x12345678(%edx,%ebp,4) + mov %ds,%ss:0x12345678(%ebx,%ebp,4) + mov %ds,%ss:0x12345678(%esp,%ebp,4) + mov %ds,%ss:0x12345678(%ebp,%ebp,4) + mov %ds,%ss:0x12345678(%esi,%ebp,4) + mov %ds,%ss:0x12345678(%edi,%ebp,4) + mov %ds,%ss:0x12345678(%eax,%esi,4) + mov %ds,%ss:0x12345678(%ecx,%esi,4) + mov %ds,%ss:0x12345678(%edx,%esi,4) + mov %ds,%ss:0x12345678(%ebx,%esi,4) + mov %ds,%ss:0x12345678(%esp,%esi,4) + mov %ds,%ss:0x12345678(%ebp,%esi,4) + mov %ds,%ss:0x12345678(%esi,%esi,4) + mov %ds,%ss:0x12345678(%edi,%esi,4) + mov %ds,%ss:0x12345678(%eax,%edi,4) + mov %ds,%ss:0x12345678(%ecx,%edi,4) + mov %ds,%ss:0x12345678(%edx,%edi,4) + mov %ds,%ss:0x12345678(%ebx,%edi,4) + mov %ds,%ss:0x12345678(%esp,%edi,4) + mov %ds,%ss:0x12345678(%ebp,%edi,4) + mov %ds,%ss:0x12345678(%esi,%edi,4) + mov %ds,%ss:0x12345678(%edi,%edi,4) + mov %ds,%ss:0x12345678(%eax,%eax,8) + mov %ds,%ss:0x12345678(%ecx,%eax,8) + mov %ds,%ss:0x12345678(%edx,%eax,8) + mov %ds,%ss:0x12345678(%ebx,%eax,8) + mov %ds,%ss:0x12345678(%esp,%eax,8) + mov %ds,%ss:0x12345678(%ebp,%eax,8) + mov %ds,%ss:0x12345678(%esi,%eax,8) + mov %ds,%ss:0x12345678(%edi,%eax,8) + mov %ds,%ss:0x12345678(%eax,%ecx,8) + mov %ds,%ss:0x12345678(%ecx,%ecx,8) + mov %ds,%ss:0x12345678(%edx,%ecx,8) + mov %ds,%ss:0x12345678(%ebx,%ecx,8) + mov %ds,%ss:0x12345678(%esp,%ecx,8) + mov %ds,%ss:0x12345678(%ebp,%ecx,8) + mov %ds,%ss:0x12345678(%esi,%ecx,8) + mov %ds,%ss:0x12345678(%edi,%ecx,8) + mov %ds,%ss:0x12345678(%eax,%edx,8) + mov %ds,%ss:0x12345678(%ecx,%edx,8) + mov %ds,%ss:0x12345678(%edx,%edx,8) + mov %ds,%ss:0x12345678(%ebx,%edx,8) + mov %ds,%ss:0x12345678(%esp,%edx,8) + mov %ds,%ss:0x12345678(%ebp,%edx,8) + mov %ds,%ss:0x12345678(%esi,%edx,8) + mov %ds,%ss:0x12345678(%edi,%edx,8) + mov %ds,%ss:0x12345678(%eax,%ebx,8) + mov %ds,%ss:0x12345678(%ecx,%ebx,8) + mov %ds,%ss:0x12345678(%edx,%ebx,8) + mov %ds,%ss:0x12345678(%ebx,%ebx,8) + mov %ds,%ss:0x12345678(%esp,%ebx,8) + mov %ds,%ss:0x12345678(%ebp,%ebx,8) + mov %ds,%ss:0x12345678(%esi,%ebx,8) + mov %ds,%ss:0x12345678(%edi,%ebx,8) + mov %ds,%ss:0x12345678(%eax,8) + mov %ds,%ss:0x12345678(%ecx,8) + mov %ds,%ss:0x12345678(%edx,8) + mov %ds,%ss:0x12345678(%ebx,8) + mov %ds,%ss:0x12345678(%esp,8) + mov %ds,%ss:0x12345678(%ebp,8) + mov %ds,%ss:0x12345678(%esi,8) + mov %ds,%ss:0x12345678(%edi,8) + mov %ds,%ss:0x12345678(%eax,%ebp,8) + mov %ds,%ss:0x12345678(%ecx,%ebp,8) + mov %ds,%ss:0x12345678(%edx,%ebp,8) + mov %ds,%ss:0x12345678(%ebx,%ebp,8) + mov %ds,%ss:0x12345678(%esp,%ebp,8) + mov %ds,%ss:0x12345678(%ebp,%ebp,8) + mov %ds,%ss:0x12345678(%esi,%ebp,8) + mov %ds,%ss:0x12345678(%edi,%ebp,8) + mov %ds,%ss:0x12345678(%eax,%esi,8) + mov %ds,%ss:0x12345678(%ecx,%esi,8) + mov %ds,%ss:0x12345678(%edx,%esi,8) + mov %ds,%ss:0x12345678(%ebx,%esi,8) + mov %ds,%ss:0x12345678(%esp,%esi,8) + mov %ds,%ss:0x12345678(%ebp,%esi,8) + mov %ds,%ss:0x12345678(%esi,%esi,8) + mov %ds,%ss:0x12345678(%edi,%esi,8) + mov %ds,%ss:0x12345678(%eax,%edi,8) + mov %ds,%ss:0x12345678(%edx,%edi,8) + mov %ds,%ss:0x12345678(%ecx,%edi,8) + mov %ds,%ss:0x12345678(%ebx,%edi,8) + mov %ds,%ss:0x12345678(%esp,%edi,8) + mov %ds,%ss:0x12345678(%ebp,%edi,8) + mov %ds,%ss:0x12345678(%esi,%edi,8) + mov %ds,%ss:0x12345678(%edi,%edi,8) + mov %ds,%ss:(%ebp,%eax,1) + mov %ds,%ss:(%ebp,%ecx,1) + mov %ds,%ss:(%ebp,%edx,1) + mov %ds,%ss:(%ebp,%ebx,1) + mov %ds,%ss:(%ebp,1) + mov %ds,%ss:(%ebp,%ebp,1) + mov %ds,%ss:(%ebp,%esi,1) + mov %ds,%ss:(%ebp,%edi,1) + mov %ds,%ss:(%ebp,%eax,2) + mov %ds,%ss:(%ebp,%ecx,2) + mov %ds,%ss:(%ebp,%edx,2) + mov %ds,%ss:(%ebp,%ebx,2) + mov %ds,%ss:(%ebp,2) + mov %ds,%ss:(%ebp,%ebp,2) + mov %ds,%ss:(%ebp,%esi,2) + mov %ds,%ss:(%ebp,%edi,2) + mov %ds,%ss:(%ebp,%eax,4) + mov %ds,%ss:(%ebp,%ecx,4) + mov %ds,%ss:(%ebp,%edx,4) + mov %ds,%ss:(%ebp,%ebx,4) + mov %ds,%ss:(%ebp,4) + mov %ds,%ss:(%ebp,%ebp,4) + mov %ds,%ss:(%ebp,%esi,4) + mov %ds,%ss:(%ebp,%edi,4) + mov %ds,%ss:(%ebp,%eax,8) + mov %ds,%ss:(%ebp,%ecx,8) + mov %ds,%ss:(%ebp,%edx,8) + mov %ds,%ss:(%ebp,%ebx,8) + mov %ds,%ss:(%ebp,8) + mov %ds,%ss:(%ebp,%ebp,8) + mov %ds,%ss:(%ebp,%esi,8) + mov %ds,%ss:(%ebp,%edi,8) + mov %ds,%ss:0x12(,1) + mov %ds,%ss:0x12(,2) + mov %ds,%ss:0x12(,4) + mov %ds,%ss:0x12(,8) + mov %ds,%ds:(%eax) + mov %ds,%ds:(%ecx) + mov %ds,%ds:(%edx) + mov %ds,%ds:(%ebx) + mov %ds,%ds:0 + mov %ds,%ds:(%esi) + mov %ds,%ds:(%edi) + mov %ds,%ds:0x12(%eax) + mov %ds,%ds:0x12(%ecx) + mov %ds,%ds:0x12(%edx) + mov %ds,%ds:0x12(%ebx) + mov %ds,%ds:0x12(%ebp) + mov %ds,%ds:0x12(%esi) + mov %ds,%ds:0x12(%edi) + mov %ds,%ds:0x12345678(%eax) + mov %ds,%ds:0x12345678(%ecx) + mov %ds,%ds:0x12345678(%edx) + mov %ds,%ds:0x12345678(%ebx) + mov %ds,%ds:0x12345678(%ebp) + mov %ds,%ds:0x12345678(%esi) + mov %ds,%ds:0x12345678(%edi) + mov %ds,%eax + mov %ds,%ecx + mov %ds,%edx + mov %ds,%ebx + mov %ds,%esp + mov %ds,%ebp + mov %ds,%esi + mov %ds,%edi + mov %ds,%ds:(%eax,%eax,1) + mov %ds,%ds:(%ecx,%eax,1) + mov %ds,%ds:(%edx,%eax,1) + mov %ds,%ds:(%ebx,%eax,1) + mov %ds,%ds:(%esp,%eax,1) + mov %ds,%ds:(,%eax,1) + mov %ds,%ds:(%esi,%eax,1) + mov %ds,%ds:(%edi,%eax,1) + mov %ds,%ds:(%eax,%ecx,1) + mov %ds,%ds:(%ecx,%ecx,1) + mov %ds,%ds:(%edx,%ecx,1) + mov %ds,%ds:(%ebx,%ecx,1) + mov %ds,%ds:(%esp,%ecx,1) + mov %ds,%ds:(,%ecx,1) + mov %ds,%ds:(%esi,%ecx,1) + mov %ds,%ds:(%edi,%ecx,1) + mov %ds,%ds:(%eax,%edx,1) + mov %ds,%ds:(%ecx,%edx,1) + mov %ds,%ds:(%edx,%edx,1) + mov %ds,%ds:(%ebx,%edx,1) + mov %ds,%ds:(%esp,%edx,1) + mov %ds,%ds:(,%edx,1) + mov %ds,%ds:(%esi,%edx,1) + mov %ds,%ds:(%edi,%edx,1) + mov %ds,%ds:(%eax,%ebx,1) + mov %ds,%ds:(%ecx,%ebx,1) + mov %ds,%ds:(%edx,%ebx,1) + mov %ds,%ds:(%ebx,%ebx,1) + mov %ds,%ds:(%esp,%ebx,1) + mov %ds,%ds:(,%ebx,1) + mov %ds,%ds:(%esi,%ebx,1) + mov %ds,%ds:(%edi,%ebx,1) + mov %ds,%ds:(%eax,1) + mov %ds,%ds:(%ecx,1) + mov %ds,%ds:(%edx,1) + mov %ds,%ds:(%ebx,1) + mov %ds,%ds:(%esp,1) + mov %ds,%ds:(,1) + mov %ds,%ds:(%esi,1) + mov %ds,%ds:(%edi,1) + mov %ds,%ds:(%eax,%ebp,1) + mov %ds,%ds:(%ecx,%ebp,1) + mov %ds,%ds:(%edx,%ebp,1) + mov %ds,%ds:(%ebx,%ebp,1) + mov %ds,%ds:(%esp,%ebp,1) + mov %ds,%ds:(,%ebp,1) + mov %ds,%ds:(%esi,%ebp,1) + mov %ds,%ds:(%edi,%ebp,1) + mov %ds,%ds:(%eax,%esi,1) + mov %ds,%ds:(%ecx,%esi,1) + mov %ds,%ds:(%edx,%esi,1) + mov %ds,%ds:(%ebx,%esi,1) + mov %ds,%ds:(%esp,%esi,1) + mov %ds,%ds:(,%esi,1) + mov %ds,%ds:(%esi,%esi,1) + mov %ds,%ds:(%edi,%esi,1) + mov %ds,%ds:(%eax,%edi,1) + mov %ds,%ds:(%ecx,%edi,1) + mov %ds,%ds:(%edx,%edi,1) + mov %ds,%ds:(%ebx,%edi,1) + mov %ds,%ds:(%esp,%edi,1) + mov %ds,%ds:(,%edi,1) + mov %ds,%ds:(%esi,%edi,1) + mov %ds,%ds:(%edi,%edi,1) + mov %ds,%ds:(%eax,%eax,2) + mov %ds,%ds:(%ecx,%eax,2) + mov %ds,%ds:(%edx,%eax,2) + mov %ds,%ds:(%ebx,%eax,2) + mov %ds,%ds:(%esp,%eax,2) + mov %ds,%ds:(,%eax,2) + mov %ds,%ds:(%esi,%eax,2) + mov %ds,%ds:(%edi,%eax,2) + mov %ds,%ds:(%eax,%ecx,2) + mov %ds,%ds:(%ecx,%ecx,2) + mov %ds,%ds:(%edx,%ecx,2) + mov %ds,%ds:(%ebx,%ecx,2) + mov %ds,%ds:(%esp,%ecx,2) + mov %ds,%ds:(,%ecx,2) + mov %ds,%ds:(%esi,%ecx,2) + mov %ds,%ds:(%edi,%ecx,2) + mov %ds,%ds:(%eax,%edx,2) + mov %ds,%ds:(%ecx,%edx,2) + mov %ds,%ds:(%edx,%edx,2) + mov %ds,%ds:(%ebx,%edx,2) + mov %ds,%ds:(%esp,%edx,2) + mov %ds,%ds:(,%edx,2) + mov %ds,%ds:(%esi,%edx,2) + mov %ds,%ds:(%edi,%edx,2) + mov %ds,%ds:(%eax,%ebx,2) + mov %ds,%ds:(%ecx,%ebx,2) + mov %ds,%ds:(%edx,%ebx,2) + mov %ds,%ds:(%ebx,%ebx,2) + mov %ds,%ds:(%esp,%ebx,2) + mov %ds,%ds:(,%ebx,2) + mov %ds,%ds:(%esi,%ebx,2) + mov %ds,%ds:(%edi,%ebx,2) + mov %ds,%ds:(%eax,2) + mov %ds,%ds:(%ecx,2) + mov %ds,%ds:(%edx,2) + mov %ds,%ds:(%ebx,2) + mov %ds,%ds:(%esp,2) + mov %ds,%ds:(,2) + mov %ds,%ds:(%esi,2) + mov %ds,%ds:(%edi,2) + mov %ds,%ds:(%eax,%ebp,2) + mov %ds,%ds:(%ecx,%ebp,2) + mov %ds,%ds:(%edx,%ebp,2) + mov %ds,%ds:(%ebx,%ebp,2) + mov %ds,%ds:(%esp,%ebp,2) + mov %ds,%ds:(,%ebp,2) + mov %ds,%ds:(%esi,%ebp,2) + mov %ds,%ds:(%edi,%ebp,2) + mov %ds,%ds:(%eax,%esi,2) + mov %ds,%ds:(%ecx,%esi,2) + mov %ds,%ds:(%edx,%esi,2) + mov %ds,%ds:(%ebx,%esi,2) + mov %ds,%ds:(%esp,%esi,2) + mov %ds,%ds:(,%esi,2) + mov %ds,%ds:(%esi,%esi,2) + mov %ds,%ds:(%edi,%esi,2) + mov %ds,%ds:(%eax,%edi,2) + mov %ds,%ds:(%ecx,%edi,2) + mov %ds,%ds:(%edx,%edi,2) + mov %ds,%ds:(%ebx,%edi,2) + mov %ds,%ds:(%esp,%edi,2) + mov %ds,%ds:(,%edi,2) + mov %ds,%ds:(%esi,%edi,2) + mov %ds,%ds:(%edi,%edi,2) + mov %ds,%ds:(%eax,%eax,4) + mov %ds,%ds:(%ecx,%eax,4) + mov %ds,%ds:(%edx,%eax,4) + mov %ds,%ds:(%ebx,%eax,4) + mov %ds,%ds:(%esp,%eax,4) + mov %ds,%ds:(,%eax,4) + mov %ds,%ds:(%esi,%eax,4) + mov %ds,%ds:(%edi,%eax,4) + mov %ds,%ds:(%eax,%ecx,4) + mov %ds,%ds:(%ecx,%ecx,4) + mov %ds,%ds:(%edx,%ecx,4) + mov %ds,%ds:(%ebx,%ecx,4) + mov %ds,%ds:(%esp,%ecx,4) + mov %ds,%ds:(,%ecx,4) + mov %ds,%ds:(%esi,%ecx,4) + mov %ds,%ds:(%edi,%ecx,4) + mov %ds,%ds:(%eax,%edx,4) + mov %ds,%ds:(%ecx,%edx,4) + mov %ds,%ds:(%edx,%edx,4) + mov %ds,%ds:(%ebx,%edx,4) + mov %ds,%ds:(%esp,%edx,4) + mov %ds,%ds:(,%edx,4) + mov %ds,%ds:(%esi,%edx,4) + mov %ds,%ds:(%edi,%edx,4) + mov %ds,%ds:(%eax,%ebx,4) + mov %ds,%ds:(%ecx,%ebx,4) + mov %ds,%ds:(%edx,%ebx,4) + mov %ds,%ds:(%ebx,%ebx,4) + mov %ds,%ds:(%esp,%ebx,4) + mov %ds,%ds:(,%ebx,4) + mov %ds,%ds:(%esi,%ebx,4) + mov %ds,%ds:(%edi,%ebx,4) + mov %ds,%ds:(%eax,4) + mov %ds,%ds:(%ecx,4) + mov %ds,%ds:(%edx,4) + mov %ds,%ds:(%ebx,4) + mov %ds,%ds:(%esp,4) + mov %ds,%ds:(,4) + mov %ds,%ds:(%esi,4) + mov %ds,%ds:(%edi,4) + mov %ds,%ds:(%eax,%ebp,4) + mov %ds,%ds:(%ecx,%ebp,4) + mov %ds,%ds:(%edx,%ebp,4) + mov %ds,%ds:(%ebx,%ebp,4) + mov %ds,%ds:(%esp,%ebp,4) + mov %ds,%ds:(,%ebp,4) + mov %ds,%ds:(%esi,%ebp,4) + mov %ds,%ds:(%edi,%ebp,4) + mov %ds,%ds:(%eax,%esi,4) + mov %ds,%ds:(%ecx,%esi,4) + mov %ds,%ds:(%edx,%esi,4) + mov %ds,%ds:(%ebx,%esi,4) + mov %ds,%ds:(%esp,%esi,4) + mov %ds,%ds:(,%esi,4) + mov %ds,%ds:(%esi,%esi,4) + mov %ds,%ds:(%edi,%esi,4) + mov %ds,%ds:(%eax,%edi,4) + mov %ds,%ds:(%ecx,%edi,4) + mov %ds,%ds:(%edx,%edi,4) + mov %ds,%ds:(%ebx,%edi,4) + mov %ds,%ds:(%esp,%edi,4) + mov %ds,%ds:(,%edi,4) + mov %ds,%ds:(%esi,%edi,4) + mov %ds,%ds:(%edi,%edi,4) + mov %ds,%ds:(%eax,%eax,8) + mov %ds,%ds:(%ecx,%eax,8) + mov %ds,%ds:(%edx,%eax,8) + mov %ds,%ds:(%ebx,%eax,8) + mov %ds,%ds:(%esp,%eax,8) + mov %ds,%ds:(,%eax,8) + mov %ds,%ds:(%esi,%eax,8) + mov %ds,%ds:(%edi,%eax,8) + mov %ds,%ds:(%eax,%ecx,8) + mov %ds,%ds:(%ecx,%ecx,8) + mov %ds,%ds:(%edx,%ecx,8) + mov %ds,%ds:(%ebx,%ecx,8) + mov %ds,%ds:(%esp,%ecx,8) + mov %ds,%ds:(,%ecx,8) + mov %ds,%ds:(%esi,%ecx,8) + mov %ds,%ds:(%edi,%ecx,8) + mov %ds,%ds:(%eax,%edx,8) + mov %ds,%ds:(%ecx,%edx,8) + mov %ds,%ds:(%edx,%edx,8) + mov %ds,%ds:(%ebx,%edx,8) + mov %ds,%ds:(%esp,%edx,8) + mov %ds,%ds:(,%edx,8) + mov %ds,%ds:(%esi,%edx,8) + mov %ds,%ds:(%edi,%edx,8) + mov %ds,%ds:(%eax,%ebx,8) + mov %ds,%ds:(%ecx,%ebx,8) + mov %ds,%ds:(%edx,%ebx,8) + mov %ds,%ds:(%ebx,%ebx,8) + mov %ds,%ds:(%esp,%ebx,8) + mov %ds,%ds:(,%ebx,8) + mov %ds,%ds:(%esi,%ebx,8) + mov %ds,%ds:(%edi,%ebx,8) + mov %ds,%ds:(%eax,8) + mov %ds,%ds:(%ecx,8) + mov %ds,%ds:(%edx,8) + mov %ds,%ds:(%ebx,8) + mov %ds,%ds:(%esp,8) + mov %ds,%ds:(,8) + mov %ds,%ds:(%esi,8) + mov %ds,%ds:(%edi,8) + mov %ds,%ds:(%eax,%ebp,8) + mov %ds,%ds:(%ecx,%ebp,8) + mov %ds,%ds:(%edx,%ebp,8) + mov %ds,%ds:(%ebx,%ebp,8) + mov %ds,%ds:(%esp,%ebp,8) + mov %ds,%ds:(,%ebp,8) + mov %ds,%ds:(%esi,%ebp,8) + mov %ds,%ds:(%edi,%ebp,8) + mov %ds,%ds:(%eax,%esi,8) + mov %ds,%ds:(%ecx,%esi,8) + mov %ds,%ds:(%edx,%esi,8) + mov %ds,%ds:(%ebx,%esi,8) + mov %ds,%ds:(%esp,%esi,8) + mov %ds,%ds:(,%esi,8) + mov %ds,%ds:(%esi,%esi,8) + mov %ds,%ds:(%edi,%esi,8) + mov %ds,%ds:(%eax,%edi,8) + mov %ds,%ds:(%edx,%edi,8) + mov %ds,%ds:(%ecx,%edi,8) + mov %ds,%ds:(%ebx,%edi,8) + mov %ds,%ds:(%esp,%edi,8) + mov %ds,%ds:(,%edi,8) + mov %ds,%ds:(%esi,%edi,8) + mov %ds,%ds:(%edi,%edi,8) + mov %ds,%ds:0x12(%eax,%eax,1) + mov %ds,%ds:0x12(%ecx,%eax,1) + mov %ds,%ds:0x12(%edx,%eax,1) + mov %ds,%ds:0x12(%ebx,%eax,1) + mov %ds,%ds:0x12(%esp,%eax,1) + mov %ds,%ds:0x12(%ebp,%eax,1) + mov %ds,%ds:0x12(%esi,%eax,1) + mov %ds,%ds:0x12(%edi,%eax,1) + mov %ds,%ds:0x12(%eax,%ecx,1) + mov %ds,%ds:0x12(%ecx,%ecx,1) + mov %ds,%ds:0x12(%edx,%ecx,1) + mov %ds,%ds:0x12(%ebx,%ecx,1) + mov %ds,%ds:0x12(%esp,%ecx,1) + mov %ds,%ds:0x12(%ebp,%ecx,1) + mov %ds,%ds:0x12(%esi,%ecx,1) + mov %ds,%ds:0x12(%edi,%ecx,1) + mov %ds,%ds:0x12(%eax,%edx,1) + mov %ds,%ds:0x12(%ecx,%edx,1) + mov %ds,%ds:0x12(%edx,%edx,1) + mov %ds,%ds:0x12(%ebx,%edx,1) + mov %ds,%ds:0x12(%esp,%edx,1) + mov %ds,%ds:0x12(%ebp,%edx,1) + mov %ds,%ds:0x12(%esi,%edx,1) + mov %ds,%ds:0x12(%edi,%edx,1) + mov %ds,%ds:0x12(%eax,%ebx,1) + mov %ds,%ds:0x12(%ecx,%ebx,1) + mov %ds,%ds:0x12(%edx,%ebx,1) + mov %ds,%ds:0x12(%ebx,%ebx,1) + mov %ds,%ds:0x12(%esp,%ebx,1) + mov %ds,%ds:0x12(%ebp,%ebx,1) + mov %ds,%ds:0x12(%esi,%ebx,1) + mov %ds,%ds:0x12(%edi,%ebx,1) + mov %ds,%ds:0x12(%eax,1) + mov %ds,%ds:0x12(%ecx,1) + mov %ds,%ds:0x12(%edx,1) + mov %ds,%ds:0x12(%ebx,1) + mov %ds,%ds:0x12(%esp,1) + mov %ds,%ds:0x12(%ebp,1) + mov %ds,%ds:0x12(%esi,1) + mov %ds,%ds:0x12(%edi,1) + mov %ds,%ds:0x12(%eax,%ebp,1) + mov %ds,%ds:0x12(%ecx,%ebp,1) + mov %ds,%ds:0x12(%edx,%ebp,1) + mov %ds,%ds:0x12(%ebx,%ebp,1) + mov %ds,%ds:0x12(%esp,%ebp,1) + mov %ds,%ds:0x12(%ebp,%ebp,1) + mov %ds,%ds:0x12(%esi,%ebp,1) + mov %ds,%ds:0x12(%edi,%ebp,1) + mov %ds,%ds:0x12(%eax,%esi,1) + mov %ds,%ds:0x12(%ecx,%esi,1) + mov %ds,%ds:0x12(%edx,%esi,1) + mov %ds,%ds:0x12(%ebx,%esi,1) + mov %ds,%ds:0x12(%esp,%esi,1) + mov %ds,%ds:0x12(%ebp,%esi,1) + mov %ds,%ds:0x12(%esi,%esi,1) + mov %ds,%ds:0x12(%edi,%esi,1) + mov %ds,%ds:0x12(%eax,%edi,1) + mov %ds,%ds:0x12(%ecx,%edi,1) + mov %ds,%ds:0x12(%edx,%edi,1) + mov %ds,%ds:0x12(%ebx,%edi,1) + mov %ds,%ds:0x12(%esp,%edi,1) + mov %ds,%ds:0x12(%ebp,%edi,1) + mov %ds,%ds:0x12(%esi,%edi,1) + mov %ds,%ds:0x12(%edi,%edi,1) + mov %ds,%ds:0x12(%eax,%eax,2) + mov %ds,%ds:0x12(%ecx,%eax,2) + mov %ds,%ds:0x12(%edx,%eax,2) + mov %ds,%ds:0x12(%ebx,%eax,2) + mov %ds,%ds:0x12(%esp,%eax,2) + mov %ds,%ds:0x12(%ebp,%eax,2) + mov %ds,%ds:0x12(%esi,%eax,2) + mov %ds,%ds:0x12(%edi,%eax,2) + mov %ds,%ds:0x12(%eax,%ecx,2) + mov %ds,%ds:0x12(%ecx,%ecx,2) + mov %ds,%ds:0x12(%edx,%ecx,2) + mov %ds,%ds:0x12(%ebx,%ecx,2) + mov %ds,%ds:0x12(%esp,%ecx,2) + mov %ds,%ds:0x12(%ebp,%ecx,2) + mov %ds,%ds:0x12(%esi,%ecx,2) + mov %ds,%ds:0x12(%edi,%ecx,2) + mov %ds,%ds:0x12(%eax,%edx,2) + mov %ds,%ds:0x12(%ecx,%edx,2) + mov %ds,%ds:0x12(%edx,%edx,2) + mov %ds,%ds:0x12(%ebx,%edx,2) + mov %ds,%ds:0x12(%esp,%edx,2) + mov %ds,%ds:0x12(%ebp,%edx,2) + mov %ds,%ds:0x12(%esi,%edx,2) + mov %ds,%ds:0x12(%edi,%edx,2) + mov %ds,%ds:0x12(%eax,%ebx,2) + mov %ds,%ds:0x12(%ecx,%ebx,2) + mov %ds,%ds:0x12(%edx,%ebx,2) + mov %ds,%ds:0x12(%ebx,%ebx,2) + mov %ds,%ds:0x12(%esp,%ebx,2) + mov %ds,%ds:0x12(%ebp,%ebx,2) + mov %ds,%ds:0x12(%esi,%ebx,2) + mov %ds,%ds:0x12(%edi,%ebx,2) + mov %ds,%ds:0x12(%eax,2) + mov %ds,%ds:0x12(%ecx,2) + mov %ds,%ds:0x12(%edx,2) + mov %ds,%ds:0x12(%ebx,2) + mov %ds,%ds:0x12(%esp,2) + mov %ds,%ds:0x12(%ebp,2) + mov %ds,%ds:0x12(%esi,2) + mov %ds,%ds:0x12(%edi,2) + mov %ds,%ds:0x12(%eax,%ebp,2) + mov %ds,%ds:0x12(%ecx,%ebp,2) + mov %ds,%ds:0x12(%edx,%ebp,2) + mov %ds,%ds:0x12(%ebx,%ebp,2) + mov %ds,%ds:0x12(%esp,%ebp,2) + mov %ds,%ds:0x12(%ebp,%ebp,2) + mov %ds,%ds:0x12(%esi,%ebp,2) + mov %ds,%ds:0x12(%edi,%ebp,2) + mov %ds,%ds:0x12(%eax,%esi,2) + mov %ds,%ds:0x12(%ecx,%esi,2) + mov %ds,%ds:0x12(%edx,%esi,2) + mov %ds,%ds:0x12(%ebx,%esi,2) + mov %ds,%ds:0x12(%esp,%esi,2) + mov %ds,%ds:0x12(%ebp,%esi,2) + mov %ds,%ds:0x12(%esi,%esi,2) + mov %ds,%ds:0x12(%edi,%esi,2) + mov %ds,%ds:0x12(%eax,%edi,2) + mov %ds,%ds:0x12(%ecx,%edi,2) + mov %ds,%ds:0x12(%edx,%edi,2) + mov %ds,%ds:0x12(%ebx,%edi,2) + mov %ds,%ds:0x12(%esp,%edi,2) + mov %ds,%ds:0x12(%ebp,%edi,2) + mov %ds,%ds:0x12(%esi,%edi,2) + mov %ds,%ds:0x12(%edi,%edi,2) + mov %ds,%ds:0x12(%eax,%eax,4) + mov %ds,%ds:0x12(%ecx,%eax,4) + mov %ds,%ds:0x12(%edx,%eax,4) + mov %ds,%ds:0x12(%ebx,%eax,4) + mov %ds,%ds:0x12(%esp,%eax,4) + mov %ds,%ds:0x12(%ebp,%eax,4) + mov %ds,%ds:0x12(%esi,%eax,4) + mov %ds,%ds:0x12(%edi,%eax,4) + mov %ds,%ds:0x12(%eax,%ecx,4) + mov %ds,%ds:0x12(%ecx,%ecx,4) + mov %ds,%ds:0x12(%edx,%ecx,4) + mov %ds,%ds:0x12(%ebx,%ecx,4) + mov %ds,%ds:0x12(%esp,%ecx,4) + mov %ds,%ds:0x12(%ebp,%ecx,4) + mov %ds,%ds:0x12(%esi,%ecx,4) + mov %ds,%ds:0x12(%edi,%ecx,4) + mov %ds,%ds:0x12(%eax,%edx,4) + mov %ds,%ds:0x12(%ecx,%edx,4) + mov %ds,%ds:0x12(%edx,%edx,4) + mov %ds,%ds:0x12(%ebx,%edx,4) + mov %ds,%ds:0x12(%esp,%edx,4) + mov %ds,%ds:0x12(%ebp,%edx,4) + mov %ds,%ds:0x12(%esi,%edx,4) + mov %ds,%ds:0x12(%edi,%edx,4) + mov %ds,%ds:0x12(%eax,%ebx,4) + mov %ds,%ds:0x12(%ecx,%ebx,4) + mov %ds,%ds:0x12(%edx,%ebx,4) + mov %ds,%ds:0x12(%ebx,%ebx,4) + mov %ds,%ds:0x12(%esp,%ebx,4) + mov %ds,%ds:0x12(%ebp,%ebx,4) + mov %ds,%ds:0x12(%esi,%ebx,4) + mov %ds,%ds:0x12(%edi,%ebx,4) + mov %ds,%ds:0x12(%eax,4) + mov %ds,%ds:0x12(%ecx,4) + mov %ds,%ds:0x12(%edx,4) + mov %ds,%ds:0x12(%ebx,4) + mov %ds,%ds:0x12(%esp,4) + mov %ds,%ds:0x12(%ebp,4) + mov %ds,%ds:0x12(%esi,4) + mov %ds,%ds:0x12(%edi,4) + mov %ds,%ds:0x12(%eax,%ebp,4) + mov %ds,%ds:0x12(%ecx,%ebp,4) + mov %ds,%ds:0x12(%edx,%ebp,4) + mov %ds,%ds:0x12(%ebx,%ebp,4) + mov %ds,%ds:0x12(%esp,%ebp,4) + mov %ds,%ds:0x12(%ebp,%ebp,4) + mov %ds,%ds:0x12(%esi,%ebp,4) + mov %ds,%ds:0x12(%edi,%ebp,4) + mov %ds,%ds:0x12(%eax,%esi,4) + mov %ds,%ds:0x12(%ecx,%esi,4) + mov %ds,%ds:0x12(%edx,%esi,4) + mov %ds,%ds:0x12(%ebx,%esi,4) + mov %ds,%ds:0x12(%esp,%esi,4) + mov %ds,%ds:0x12(%ebp,%esi,4) + mov %ds,%ds:0x12(%esi,%esi,4) + mov %ds,%ds:0x12(%edi,%esi,4) + mov %ds,%ds:0x12(%eax,%edi,4) + mov %ds,%ds:0x12(%ecx,%edi,4) + mov %ds,%ds:0x12(%edx,%edi,4) + mov %ds,%ds:0x12(%ebx,%edi,4) + mov %ds,%ds:0x12(%esp,%edi,4) + mov %ds,%ds:0x12(%ebp,%edi,4) + mov %ds,%ds:0x12(%esi,%edi,4) + mov %ds,%ds:0x12(%edi,%edi,4) + mov %ds,%ds:0x12(%eax,%eax,8) + mov %ds,%ds:0x12(%ecx,%eax,8) + mov %ds,%ds:0x12(%edx,%eax,8) + mov %ds,%ds:0x12(%ebx,%eax,8) + mov %ds,%ds:0x12(%esp,%eax,8) + mov %ds,%ds:0x12(%ebp,%eax,8) + mov %ds,%ds:0x12(%esi,%eax,8) + mov %ds,%ds:0x12(%edi,%eax,8) + mov %ds,%ds:0x12(%eax,%ecx,8) + mov %ds,%ds:0x12(%ecx,%ecx,8) + mov %ds,%ds:0x12(%edx,%ecx,8) + mov %ds,%ds:0x12(%ebx,%ecx,8) + mov %ds,%ds:0x12(%esp,%ecx,8) + mov %ds,%ds:0x12(%ebp,%ecx,8) + mov %ds,%ds:0x12(%esi,%ecx,8) + mov %ds,%ds:0x12(%edi,%ecx,8) + mov %ds,%ds:0x12(%eax,%edx,8) + mov %ds,%ds:0x12(%ecx,%edx,8) + mov %ds,%ds:0x12(%edx,%edx,8) + mov %ds,%ds:0x12(%ebx,%edx,8) + mov %ds,%ds:0x12(%esp,%edx,8) + mov %ds,%ds:0x12(%ebp,%edx,8) + mov %ds,%ds:0x12(%esi,%edx,8) + mov %ds,%ds:0x12(%edi,%edx,8) + mov %ds,%ds:0x12(%eax,%ebx,8) + mov %ds,%ds:0x12(%ecx,%ebx,8) + mov %ds,%ds:0x12(%edx,%ebx,8) + mov %ds,%ds:0x12(%ebx,%ebx,8) + mov %ds,%ds:0x12(%esp,%ebx,8) + mov %ds,%ds:0x12(%ebp,%ebx,8) + mov %ds,%ds:0x12(%esi,%ebx,8) + mov %ds,%ds:0x12(%edi,%ebx,8) + mov %ds,%ds:0x12(%eax,8) + mov %ds,%ds:0x12(%ecx,8) + mov %ds,%ds:0x12(%edx,8) + mov %ds,%ds:0x12(%ebx,8) + mov %ds,%ds:0x12(%esp,8) + mov %ds,%ds:0x12(%ebp,8) + mov %ds,%ds:0x12(%esi,8) + mov %ds,%ds:0x12(%edi,8) + mov %ds,%ds:0x12(%eax,%ebp,8) + mov %ds,%ds:0x12(%ecx,%ebp,8) + mov %ds,%ds:0x12(%edx,%ebp,8) + mov %ds,%ds:0x12(%ebx,%ebp,8) + mov %ds,%ds:0x12(%esp,%ebp,8) + mov %ds,%ds:0x12(%ebp,%ebp,8) + mov %ds,%ds:0x12(%esi,%ebp,8) + mov %ds,%ds:0x12(%edi,%ebp,8) + mov %ds,%ds:0x12(%eax,%esi,8) + mov %ds,%ds:0x12(%ecx,%esi,8) + mov %ds,%ds:0x12(%edx,%esi,8) + mov %ds,%ds:0x12(%ebx,%esi,8) + mov %ds,%ds:0x12(%esp,%esi,8) + mov %ds,%ds:0x12(%ebp,%esi,8) + mov %ds,%ds:0x12(%esi,%esi,8) + mov %ds,%ds:0x12(%edi,%esi,8) + mov %ds,%ds:0x12(%eax,%edi,8) + mov %ds,%ds:0x12(%edx,%edi,8) + mov %ds,%ds:0x12(%ecx,%edi,8) + mov %ds,%ds:0x12(%ebx,%edi,8) + mov %ds,%ds:0x12(%esp,%edi,8) + mov %ds,%ds:0x12(%ebp,%edi,8) + mov %ds,%ds:0x12(%esi,%edi,8) + mov %ds,%ds:0x12(%edi,%edi,8) + mov %ds,%ds:0x12345678(%eax,%eax,1) + mov %ds,%ds:0x12345678(%ecx,%eax,1) + mov %ds,%ds:0x12345678(%edx,%eax,1) + mov %ds,%ds:0x12345678(%ebx,%eax,1) + mov %ds,%ds:0x12345678(%esp,%eax,1) + mov %ds,%ds:0x12345678(%ebp,%eax,1) + mov %ds,%ds:0x12345678(%esi,%eax,1) + mov %ds,%ds:0x12345678(%edi,%eax,1) + mov %ds,%ds:0x12345678(%eax,%ecx,1) + mov %ds,%ds:0x12345678(%ecx,%ecx,1) + mov %ds,%ds:0x12345678(%edx,%ecx,1) + mov %ds,%ds:0x12345678(%ebx,%ecx,1) + mov %ds,%ds:0x12345678(%esp,%ecx,1) + mov %ds,%ds:0x12345678(%ebp,%ecx,1) + mov %ds,%ds:0x12345678(%esi,%ecx,1) + mov %ds,%ds:0x12345678(%edi,%ecx,1) + mov %ds,%ds:0x12345678(%eax,%edx,1) + mov %ds,%ds:0x12345678(%ecx,%edx,1) + mov %ds,%ds:0x12345678(%edx,%edx,1) + mov %ds,%ds:0x12345678(%ebx,%edx,1) + mov %ds,%ds:0x12345678(%esp,%edx,1) + mov %ds,%ds:0x12345678(%ebp,%edx,1) + mov %ds,%ds:0x12345678(%esi,%edx,1) + mov %ds,%ds:0x12345678(%edi,%edx,1) + mov %ds,%ds:0x12345678(%eax,%ebx,1) + mov %ds,%ds:0x12345678(%ecx,%ebx,1) + mov %ds,%ds:0x12345678(%edx,%ebx,1) + mov %ds,%ds:0x12345678(%ebx,%ebx,1) + mov %ds,%ds:0x12345678(%esp,%ebx,1) + mov %ds,%ds:0x12345678(%ebp,%ebx,1) + mov %ds,%ds:0x12345678(%esi,%ebx,1) + mov %ds,%ds:0x12345678(%edi,%ebx,1) + mov %ds,%ds:0x12345678(%eax,1) + mov %ds,%ds:0x12345678(%ecx,1) + mov %ds,%ds:0x12345678(%edx,1) + mov %ds,%ds:0x12345678(%ebx,1) + mov %ds,%ds:0x12345678(%esp,1) + mov %ds,%ds:0x12345678(%ebp,1) + mov %ds,%ds:0x12345678(%esi,1) + mov %ds,%ds:0x12345678(%edi,1) + mov %ds,%ds:0x12345678(%eax,%ebp,1) + mov %ds,%ds:0x12345678(%ecx,%ebp,1) + mov %ds,%ds:0x12345678(%edx,%ebp,1) + mov %ds,%ds:0x12345678(%ebx,%ebp,1) + mov %ds,%ds:0x12345678(%esp,%ebp,1) + mov %ds,%ds:0x12345678(%ebp,%ebp,1) + mov %ds,%ds:0x12345678(%esi,%ebp,1) + mov %ds,%ds:0x12345678(%edi,%ebp,1) + mov %ds,%ds:0x12345678(%eax,%esi,1) + mov %ds,%ds:0x12345678(%ecx,%esi,1) + mov %ds,%ds:0x12345678(%edx,%esi,1) + mov %ds,%ds:0x12345678(%ebx,%esi,1) + mov %ds,%ds:0x12345678(%esp,%esi,1) + mov %ds,%ds:0x12345678(%ebp,%esi,1) + mov %ds,%ds:0x12345678(%esi,%esi,1) + mov %ds,%ds:0x12345678(%edi,%esi,1) + mov %ds,%ds:0x12345678(%eax,%edi,1) + mov %ds,%ds:0x12345678(%ecx,%edi,1) + mov %ds,%ds:0x12345678(%edx,%edi,1) + mov %ds,%ds:0x12345678(%ebx,%edi,1) + mov %ds,%ds:0x12345678(%esp,%edi,1) + mov %ds,%ds:0x12345678(%ebp,%edi,1) + mov %ds,%ds:0x12345678(%esi,%edi,1) + mov %ds,%ds:0x12345678(%edi,%edi,1) + mov %ds,%ds:0x12345678(%eax,%eax,2) + mov %ds,%ds:0x12345678(%ecx,%eax,2) + mov %ds,%ds:0x12345678(%edx,%eax,2) + mov %ds,%ds:0x12345678(%ebx,%eax,2) + mov %ds,%ds:0x12345678(%esp,%eax,2) + mov %ds,%ds:0x12345678(%ebp,%eax,2) + mov %ds,%ds:0x12345678(%esi,%eax,2) + mov %ds,%ds:0x12345678(%edi,%eax,2) + mov %ds,%ds:0x12345678(%eax,%ecx,2) + mov %ds,%ds:0x12345678(%ecx,%ecx,2) + mov %ds,%ds:0x12345678(%edx,%ecx,2) + mov %ds,%ds:0x12345678(%ebx,%ecx,2) + mov %ds,%ds:0x12345678(%esp,%ecx,2) + mov %ds,%ds:0x12345678(%ebp,%ecx,2) + mov %ds,%ds:0x12345678(%esi,%ecx,2) + mov %ds,%ds:0x12345678(%edi,%ecx,2) + mov %ds,%ds:0x12345678(%eax,%edx,2) + mov %ds,%ds:0x12345678(%ecx,%edx,2) + mov %ds,%ds:0x12345678(%edx,%edx,2) + mov %ds,%ds:0x12345678(%ebx,%edx,2) + mov %ds,%ds:0x12345678(%esp,%edx,2) + mov %ds,%ds:0x12345678(%ebp,%edx,2) + mov %ds,%ds:0x12345678(%esi,%edx,2) + mov %ds,%ds:0x12345678(%edi,%edx,2) + mov %ds,%ds:0x12345678(%eax,%ebx,2) + mov %ds,%ds:0x12345678(%ecx,%ebx,2) + mov %ds,%ds:0x12345678(%edx,%ebx,2) + mov %ds,%ds:0x12345678(%ebx,%ebx,2) + mov %ds,%ds:0x12345678(%esp,%ebx,2) + mov %ds,%ds:0x12345678(%ebp,%ebx,2) + mov %ds,%ds:0x12345678(%esi,%ebx,2) + mov %ds,%ds:0x12345678(%edi,%ebx,2) + mov %ds,%ds:0x12345678(%eax,2) + mov %ds,%ds:0x12345678(%ecx,2) + mov %ds,%ds:0x12345678(%edx,2) + mov %ds,%ds:0x12345678(%ebx,2) + mov %ds,%ds:0x12345678(%esp,2) + mov %ds,%ds:0x12345678(%ebp,2) + mov %ds,%ds:0x12345678(%esi,2) + mov %ds,%ds:0x12345678(%edi,2) + mov %ds,%ds:0x12345678(%eax,%ebp,2) + mov %ds,%ds:0x12345678(%ecx,%ebp,2) + mov %ds,%ds:0x12345678(%edx,%ebp,2) + mov %ds,%ds:0x12345678(%ebx,%ebp,2) + mov %ds,%ds:0x12345678(%esp,%ebp,2) + mov %ds,%ds:0x12345678(%ebp,%ebp,2) + mov %ds,%ds:0x12345678(%esi,%ebp,2) + mov %ds,%ds:0x12345678(%edi,%ebp,2) + mov %ds,%ds:0x12345678(%eax,%esi,2) + mov %ds,%ds:0x12345678(%ecx,%esi,2) + mov %ds,%ds:0x12345678(%edx,%esi,2) + mov %ds,%ds:0x12345678(%ebx,%esi,2) + mov %ds,%ds:0x12345678(%esp,%esi,2) + mov %ds,%ds:0x12345678(%ebp,%esi,2) + mov %ds,%ds:0x12345678(%esi,%esi,2) + mov %ds,%ds:0x12345678(%edi,%esi,2) + mov %ds,%ds:0x12345678(%eax,%edi,2) + mov %ds,%ds:0x12345678(%ecx,%edi,2) + mov %ds,%ds:0x12345678(%edx,%edi,2) + mov %ds,%ds:0x12345678(%ebx,%edi,2) + mov %ds,%ds:0x12345678(%esp,%edi,2) + mov %ds,%ds:0x12345678(%ebp,%edi,2) + mov %ds,%ds:0x12345678(%esi,%edi,2) + mov %ds,%ds:0x12345678(%edi,%edi,2) + mov %ds,%ds:0x12345678(%eax,%eax,4) + mov %ds,%ds:0x12345678(%ecx,%eax,4) + mov %ds,%ds:0x12345678(%edx,%eax,4) + mov %ds,%ds:0x12345678(%ebx,%eax,4) + mov %ds,%ds:0x12345678(%esp,%eax,4) + mov %ds,%ds:0x12345678(%ebp,%eax,4) + mov %ds,%ds:0x12345678(%esi,%eax,4) + mov %ds,%ds:0x12345678(%edi,%eax,4) + mov %ds,%ds:0x12345678(%eax,%ecx,4) + mov %ds,%ds:0x12345678(%ecx,%ecx,4) + mov %ds,%ds:0x12345678(%edx,%ecx,4) + mov %ds,%ds:0x12345678(%ebx,%ecx,4) + mov %ds,%ds:0x12345678(%esp,%ecx,4) + mov %ds,%ds:0x12345678(%ebp,%ecx,4) + mov %ds,%ds:0x12345678(%esi,%ecx,4) + mov %ds,%ds:0x12345678(%edi,%ecx,4) + mov %ds,%ds:0x12345678(%eax,%edx,4) + mov %ds,%ds:0x12345678(%ecx,%edx,4) + mov %ds,%ds:0x12345678(%edx,%edx,4) + mov %ds,%ds:0x12345678(%ebx,%edx,4) + mov %ds,%ds:0x12345678(%esp,%edx,4) + mov %ds,%ds:0x12345678(%ebp,%edx,4) + mov %ds,%ds:0x12345678(%esi,%edx,4) + mov %ds,%ds:0x12345678(%edi,%edx,4) + mov %ds,%ds:0x12345678(%eax,%ebx,4) + mov %ds,%ds:0x12345678(%ecx,%ebx,4) + mov %ds,%ds:0x12345678(%edx,%ebx,4) + mov %ds,%ds:0x12345678(%ebx,%ebx,4) + mov %ds,%ds:0x12345678(%esp,%ebx,4) + mov %ds,%ds:0x12345678(%ebp,%ebx,4) + mov %ds,%ds:0x12345678(%esi,%ebx,4) + mov %ds,%ds:0x12345678(%edi,%ebx,4) + mov %ds,%ds:0x12345678(%eax,4) + mov %ds,%ds:0x12345678(%ecx,4) + mov %ds,%ds:0x12345678(%edx,4) + mov %ds,%ds:0x12345678(%ebx,4) + mov %ds,%ds:0x12345678(%esp,4) + mov %ds,%ds:0x12345678(%ebp,4) + mov %ds,%ds:0x12345678(%esi,4) + mov %ds,%ds:0x12345678(%edi,4) + mov %ds,%ds:0x12345678(%eax,%ebp,4) + mov %ds,%ds:0x12345678(%ecx,%ebp,4) + mov %ds,%ds:0x12345678(%edx,%ebp,4) + mov %ds,%ds:0x12345678(%ebx,%ebp,4) + mov %ds,%ds:0x12345678(%esp,%ebp,4) + mov %ds,%ds:0x12345678(%ebp,%ebp,4) + mov %ds,%ds:0x12345678(%esi,%ebp,4) + mov %ds,%ds:0x12345678(%edi,%ebp,4) + mov %ds,%ds:0x12345678(%eax,%esi,4) + mov %ds,%ds:0x12345678(%ecx,%esi,4) + mov %ds,%ds:0x12345678(%edx,%esi,4) + mov %ds,%ds:0x12345678(%ebx,%esi,4) + mov %ds,%ds:0x12345678(%esp,%esi,4) + mov %ds,%ds:0x12345678(%ebp,%esi,4) + mov %ds,%ds:0x12345678(%esi,%esi,4) + mov %ds,%ds:0x12345678(%edi,%esi,4) + mov %ds,%ds:0x12345678(%eax,%edi,4) + mov %ds,%ds:0x12345678(%ecx,%edi,4) + mov %ds,%ds:0x12345678(%edx,%edi,4) + mov %ds,%ds:0x12345678(%ebx,%edi,4) + mov %ds,%ds:0x12345678(%esp,%edi,4) + mov %ds,%ds:0x12345678(%ebp,%edi,4) + mov %ds,%ds:0x12345678(%esi,%edi,4) + mov %ds,%ds:0x12345678(%edi,%edi,4) + mov %ds,%ds:0x12345678(%eax,%eax,8) + mov %ds,%ds:0x12345678(%ecx,%eax,8) + mov %ds,%ds:0x12345678(%edx,%eax,8) + mov %ds,%ds:0x12345678(%ebx,%eax,8) + mov %ds,%ds:0x12345678(%esp,%eax,8) + mov %ds,%ds:0x12345678(%ebp,%eax,8) + mov %ds,%ds:0x12345678(%esi,%eax,8) + mov %ds,%ds:0x12345678(%edi,%eax,8) + mov %ds,%ds:0x12345678(%eax,%ecx,8) + mov %ds,%ds:0x12345678(%ecx,%ecx,8) + mov %ds,%ds:0x12345678(%edx,%ecx,8) + mov %ds,%ds:0x12345678(%ebx,%ecx,8) + mov %ds,%ds:0x12345678(%esp,%ecx,8) + mov %ds,%ds:0x12345678(%ebp,%ecx,8) + mov %ds,%ds:0x12345678(%esi,%ecx,8) + mov %ds,%ds:0x12345678(%edi,%ecx,8) + mov %ds,%ds:0x12345678(%eax,%edx,8) + mov %ds,%ds:0x12345678(%ecx,%edx,8) + mov %ds,%ds:0x12345678(%edx,%edx,8) + mov %ds,%ds:0x12345678(%ebx,%edx,8) + mov %ds,%ds:0x12345678(%esp,%edx,8) + mov %ds,%ds:0x12345678(%ebp,%edx,8) + mov %ds,%ds:0x12345678(%esi,%edx,8) + mov %ds,%ds:0x12345678(%edi,%edx,8) + mov %ds,%ds:0x12345678(%eax,%ebx,8) + mov %ds,%ds:0x12345678(%ecx,%ebx,8) + mov %ds,%ds:0x12345678(%edx,%ebx,8) + mov %ds,%ds:0x12345678(%ebx,%ebx,8) + mov %ds,%ds:0x12345678(%esp,%ebx,8) + mov %ds,%ds:0x12345678(%ebp,%ebx,8) + mov %ds,%ds:0x12345678(%esi,%ebx,8) + mov %ds,%ds:0x12345678(%edi,%ebx,8) + mov %ds,%ds:0x12345678(%eax,8) + mov %ds,%ds:0x12345678(%ecx,8) + mov %ds,%ds:0x12345678(%edx,8) + mov %ds,%ds:0x12345678(%ebx,8) + mov %ds,%ds:0x12345678(%esp,8) + mov %ds,%ds:0x12345678(%ebp,8) + mov %ds,%ds:0x12345678(%esi,8) + mov %ds,%ds:0x12345678(%edi,8) + mov %ds,%ds:0x12345678(%eax,%ebp,8) + mov %ds,%ds:0x12345678(%ecx,%ebp,8) + mov %ds,%ds:0x12345678(%edx,%ebp,8) + mov %ds,%ds:0x12345678(%ebx,%ebp,8) + mov %ds,%ds:0x12345678(%esp,%ebp,8) + mov %ds,%ds:0x12345678(%ebp,%ebp,8) + mov %ds,%ds:0x12345678(%esi,%ebp,8) + mov %ds,%ds:0x12345678(%edi,%ebp,8) + mov %ds,%ds:0x12345678(%eax,%esi,8) + mov %ds,%ds:0x12345678(%ecx,%esi,8) + mov %ds,%ds:0x12345678(%edx,%esi,8) + mov %ds,%ds:0x12345678(%ebx,%esi,8) + mov %ds,%ds:0x12345678(%esp,%esi,8) + mov %ds,%ds:0x12345678(%ebp,%esi,8) + mov %ds,%ds:0x12345678(%esi,%esi,8) + mov %ds,%ds:0x12345678(%edi,%esi,8) + mov %ds,%ds:0x12345678(%eax,%edi,8) + mov %ds,%ds:0x12345678(%edx,%edi,8) + mov %ds,%ds:0x12345678(%ecx,%edi,8) + mov %ds,%ds:0x12345678(%ebx,%edi,8) + mov %ds,%ds:0x12345678(%esp,%edi,8) + mov %ds,%ds:0x12345678(%ebp,%edi,8) + mov %ds,%ds:0x12345678(%esi,%edi,8) + mov %ds,%ds:0x12345678(%edi,%edi,8) + mov %ds,%ds:(%ebp,%eax,1) + mov %ds,%ds:(%ebp,%ecx,1) + mov %ds,%ds:(%ebp,%edx,1) + mov %ds,%ds:(%ebp,%ebx,1) + mov %ds,%ds:(%ebp,1) + mov %ds,%ds:(%ebp,%ebp,1) + mov %ds,%ds:(%ebp,%esi,1) + mov %ds,%ds:(%ebp,%edi,1) + mov %ds,%ds:(%ebp,%eax,2) + mov %ds,%ds:(%ebp,%ecx,2) + mov %ds,%ds:(%ebp,%edx,2) + mov %ds,%ds:(%ebp,%ebx,2) + mov %ds,%ds:(%ebp,2) + mov %ds,%ds:(%ebp,%ebp,2) + mov %ds,%ds:(%ebp,%esi,2) + mov %ds,%ds:(%ebp,%edi,2) + mov %ds,%ds:(%ebp,%eax,4) + mov %ds,%ds:(%ebp,%ecx,4) + mov %ds,%ds:(%ebp,%edx,4) + mov %ds,%ds:(%ebp,%ebx,4) + mov %ds,%ds:(%ebp,4) + mov %ds,%ds:(%ebp,%ebp,4) + mov %ds,%ds:(%ebp,%esi,4) + mov %ds,%ds:(%ebp,%edi,4) + mov %ds,%ds:(%ebp,%eax,8) + mov %ds,%ds:(%ebp,%ecx,8) + mov %ds,%ds:(%ebp,%edx,8) + mov %ds,%ds:(%ebp,%ebx,8) + mov %ds,%ds:(%ebp,8) + mov %ds,%ds:(%ebp,%ebp,8) + mov %ds,%ds:(%ebp,%esi,8) + mov %ds,%ds:(%ebp,%edi,8) + mov %ds,%ds:0x12(,1) + mov %ds,%ds:0x12(,2) + mov %ds,%ds:0x12(,4) + mov %ds,%ds:0x12(,8) + + # Force a good alignment. + .byte 0 diff --git a/gas/testsuite/gas/i386/opcode.d b/gas/testsuite/gas/i386/opcode.d new file mode 100644 index 0000000..fc3c158 --- /dev/null +++ b/gas/testsuite/gas/i386/opcode.d @@ -0,0 +1,574 @@ +#as: -J +#objdump: -dw +#name: i386 opcode + +.*: +file format .* + +Disassembly of section .text: + +0+000 <foo>: + 0: 00 90 90 90 90 90 [ ]*add %dl,0x90909090\(%eax\) + 6: 01 90 90 90 90 90 [ ]*add %edx,0x90909090\(%eax\) + c: 02 90 90 90 90 90 [ ]*add 0x90909090\(%eax\),%dl + 12: 03 90 90 90 90 90 [ ]*add 0x90909090\(%eax\),%edx + 18: 04 90 [ ]*add \$0x90,%al + 1a: 05 90 90 90 90 [ ]*add \$0x90909090,%eax + 1f: 06 [ ]*push %es + 20: 07 [ ]*pop %es + 21: 08 90 90 90 90 90 [ ]*or %dl,0x90909090\(%eax\) + 27: 09 90 90 90 90 90 [ ]*or %edx,0x90909090\(%eax\) + 2d: 0a 90 90 90 90 90 [ ]*or 0x90909090\(%eax\),%dl + 33: 0b 90 90 90 90 90 [ ]*or 0x90909090\(%eax\),%edx + 39: 0c 90 [ ]*or \$0x90,%al + 3b: 0d 90 90 90 90 [ ]*or \$0x90909090,%eax + 40: 0e [ ]*push %cs + 41: 10 90 90 90 90 90 [ ]*adc %dl,0x90909090\(%eax\) + 47: 11 90 90 90 90 90 [ ]*adc %edx,0x90909090\(%eax\) + 4d: 12 90 90 90 90 90 [ ]*adc 0x90909090\(%eax\),%dl + 53: 13 90 90 90 90 90 [ ]*adc 0x90909090\(%eax\),%edx + 59: 14 90 [ ]*adc \$0x90,%al + 5b: 15 90 90 90 90 [ ]*adc \$0x90909090,%eax + 60: 16 [ ]*push %ss + 61: 17 [ ]*pop %ss + 62: 18 90 90 90 90 90 [ ]*sbb %dl,0x90909090\(%eax\) + 68: 19 90 90 90 90 90 [ ]*sbb %edx,0x90909090\(%eax\) + 6e: 1a 90 90 90 90 90 [ ]*sbb 0x90909090\(%eax\),%dl + 74: 1b 90 90 90 90 90 [ ]*sbb 0x90909090\(%eax\),%edx + 7a: 1c 90 [ ]*sbb \$0x90,%al + 7c: 1d 90 90 90 90 [ ]*sbb \$0x90909090,%eax + 81: 1e [ ]*push %ds + 82: 1f [ ]*pop %ds + 83: 20 90 90 90 90 90 [ ]*and %dl,0x90909090\(%eax\) + 89: 21 90 90 90 90 90 [ ]*and %edx,0x90909090\(%eax\) + 8f: 22 90 90 90 90 90 [ ]*and 0x90909090\(%eax\),%dl + 95: 23 90 90 90 90 90 [ ]*and 0x90909090\(%eax\),%edx + 9b: 24 90 [ ]*and \$0x90,%al + 9d: 25 90 90 90 90 [ ]*and \$0x90909090,%eax + a2: 27 [ ]*daa + a3: 28 90 90 90 90 90 [ ]*sub %dl,0x90909090\(%eax\) + a9: 29 90 90 90 90 90 [ ]*sub %edx,0x90909090\(%eax\) + af: 2a 90 90 90 90 90 [ ]*sub 0x90909090\(%eax\),%dl + b5: 2b 90 90 90 90 90 [ ]*sub 0x90909090\(%eax\),%edx + bb: 2c 90 [ ]*sub \$0x90,%al + bd: 2d 90 90 90 90 [ ]*sub \$0x90909090,%eax + c2: 2f [ ]*das + c3: 30 90 90 90 90 90 [ ]*xor %dl,0x90909090\(%eax\) + c9: 31 90 90 90 90 90 [ ]*xor %edx,0x90909090\(%eax\) + cf: 32 90 90 90 90 90 [ ]*xor 0x90909090\(%eax\),%dl + d5: 33 90 90 90 90 90 [ ]*xor 0x90909090\(%eax\),%edx + db: 34 90 [ ]*xor \$0x90,%al + dd: 35 90 90 90 90 [ ]*xor \$0x90909090,%eax + e2: 37 [ ]*aaa + e3: 38 90 90 90 90 90 [ ]*cmp %dl,0x90909090\(%eax\) + e9: 39 90 90 90 90 90 [ ]*cmp %edx,0x90909090\(%eax\) + ef: 3a 90 90 90 90 90 [ ]*cmp 0x90909090\(%eax\),%dl + f5: 3b 90 90 90 90 90 [ ]*cmp 0x90909090\(%eax\),%edx + fb: 3c 90 [ ]*cmp \$0x90,%al + fd: 3d 90 90 90 90 [ ]*cmp \$0x90909090,%eax + 102: 3f [ ]*aas + 103: 40 [ ]*inc %eax + 104: 41 [ ]*inc %ecx + 105: 42 [ ]*inc %edx + 106: 43 [ ]*inc %ebx + 107: 44 [ ]*inc %esp + 108: 45 [ ]*inc %ebp + 109: 46 [ ]*inc %esi + 10a: 47 [ ]*inc %edi + 10b: 48 [ ]*dec %eax + 10c: 49 [ ]*dec %ecx + 10d: 4a [ ]*dec %edx + 10e: 4b [ ]*dec %ebx + 10f: 4c [ ]*dec %esp + 110: 4d [ ]*dec %ebp + 111: 4e [ ]*dec %esi + 112: 4f [ ]*dec %edi + 113: 50 [ ]*push %eax + 114: 51 [ ]*push %ecx + 115: 52 [ ]*push %edx + 116: 53 [ ]*push %ebx + 117: 54 [ ]*push %esp + 118: 55 [ ]*push %ebp + 119: 56 [ ]*push %esi + 11a: 57 [ ]*push %edi + 11b: 58 [ ]*pop %eax + 11c: 59 [ ]*pop %ecx + 11d: 5a [ ]*pop %edx + 11e: 5b [ ]*pop %ebx + 11f: 5c [ ]*pop %esp + 120: 5d [ ]*pop %ebp + 121: 5e [ ]*pop %esi + 122: 5f [ ]*pop %edi + 123: 60 [ ]*pusha + 124: 61 [ ]*popa + 125: 62 90 90 90 90 90 [ ]*bound %edx,0x90909090\(%eax\) + 12b: 63 90 90 90 90 90 [ ]*arpl %dx,0x90909090\(%eax\) + 131: 68 90 90 90 90 [ ]*push \$0x90909090 + 136: 69 90 90 90 90 90 90 90 90 90 [ ]*imul \$0x90909090,0x90909090\(%eax\),%edx + 140: 6a 90 [ ]*push \$0xffffff90 + 142: 6b 90 90 90 90 90 90 [ ]*imul \$0xffffff90,0x90909090\(%eax\),%edx + 149: 6c [ ]*insb \(%dx\),%es:\(%edi\) + 14a: 6d [ ]*insl \(%dx\),%es:\(%edi\) + 14b: 6e [ ]*outsb %ds:\(%esi\),\(%dx\) + 14c: 6f [ ]*outsl %ds:\(%esi\),\(%dx\) + 14d: 70 90 [ ]*jo (0x)?df.* + 14f: 71 90 [ ]*jno (0x)?e1.* + 151: 72 90 [ ]*jb (0x)?e3.* + 153: 73 90 [ ]*jae (0x)?e5.* + 155: 74 90 [ ]*je (0x)?e7.* + 157: 75 90 [ ]*jne (0x)?e9.* + 159: 76 90 [ ]*jbe (0x)?eb.* + 15b: 77 90 [ ]*ja (0x)?ed.* + 15d: 78 90 [ ]*js (0x)?ef.* + 15f: 79 90 [ ]*jns (0x)?f1.* + 161: 7a 90 [ ]*jp (0x)?f3.* + 163: 7b 90 [ ]*jnp (0x)?f5.* + 165: 7c 90 [ ]*jl (0x)?f7.* + 167: 7d 90 [ ]*jge (0x)?f9.* + 169: 7e 90 [ ]*jle (0x)?fb.* + 16b: 7f 90 [ ]*jg (0x)?fd.* + 16d: 80 90 90 90 90 90 90 [ ]*adcb \$0x90,0x90909090\(%eax\) + 174: 81 90 90 90 90 90 90 90 90 90 [ ]*adcl \$0x90909090,0x90909090\(%eax\) + 17e: 83 90 90 90 90 90 90 [ ]*adcl \$0xffffff90,0x90909090\(%eax\) + 185: 84 90 90 90 90 90 [ ]*test %dl,0x90909090\(%eax\) + 18b: 85 90 90 90 90 90 [ ]*test %edx,0x90909090\(%eax\) + 191: 86 90 90 90 90 90 [ ]*xchg %dl,0x90909090\(%eax\) + 197: 87 90 90 90 90 90 [ ]*xchg %edx,0x90909090\(%eax\) + 19d: 88 90 90 90 90 90 [ ]*mov %dl,0x90909090\(%eax\) + 1a3: 89 90 90 90 90 90 [ ]*mov %edx,0x90909090\(%eax\) + 1a9: 8a 90 90 90 90 90 [ ]*mov 0x90909090\(%eax\),%dl + 1af: 8b 90 90 90 90 90 [ ]*mov 0x90909090\(%eax\),%edx + 1b5: 8c 90 90 90 90 90 [ ]*movl %ss,0x90909090\(%eax\) + 1bb: 8d 90 90 90 90 90 [ ]*lea 0x90909090\(%eax\),%edx + 1c1: 8e 90 90 90 90 90 [ ]*movl 0x90909090\(%eax\),%ss + 1c7: 8f 80 90 90 90 90 [ ]*popl 0x90909090\(%eax\) + 1cd: 90 [ ]*nop + 1ce: 91 [ ]*xchg %eax,%ecx + 1cf: 92 [ ]*xchg %eax,%edx + 1d0: 93 [ ]*xchg %eax,%ebx + 1d1: 94 [ ]*xchg %eax,%esp + 1d2: 95 [ ]*xchg %eax,%ebp + 1d3: 96 [ ]*xchg %eax,%esi + 1d4: 97 [ ]*xchg %eax,%edi + 1d5: 98 [ ]*cwtl + 1d6: 99 [ ]*cltd + 1d7: 9a 90 90 90 90 90 90 [ ]*lcall \$0x9090,\$0x90909090 + 1de: 9b [ ]*fwait + 1df: 9c [ ]*pushf + 1e0: 9d [ ]*popf + 1e1: 9e [ ]*sahf + 1e2: 9f [ ]*lahf + 1e3: a0 90 90 90 90 [ ]*mov 0x90909090,%al + 1e8: a1 90 90 90 90 [ ]*mov 0x90909090,%eax + 1ed: a2 90 90 90 90 [ ]*mov %al,0x90909090 + 1f2: a3 90 90 90 90 [ ]*mov %eax,0x90909090 + 1f7: a4 [ ]*movsb %ds:\(%esi\),%es:\(%edi\) + 1f8: a5 [ ]*movsl %ds:\(%esi\),%es:\(%edi\) + 1f9: a6 [ ]*cmpsb %es:\(%edi\),%ds:\(%esi\) + 1fa: a7 [ ]*cmpsl %es:\(%edi\),%ds:\(%esi\) + 1fb: a8 90 [ ]*test \$0x90,%al + 1fd: a9 90 90 90 90 [ ]*test \$0x90909090,%eax + 202: aa [ ]*stos %al,%es:\(%edi\) + 203: ab [ ]*stos %eax,%es:\(%edi\) + 204: ac [ ]*lods %ds:\(%esi\),%al + 205: ad [ ]*lods %ds:\(%esi\),%eax + 206: ae [ ]*scas %es:\(%edi\),%al + 207: af [ ]*scas %es:\(%edi\),%eax + 208: b0 90 [ ]*mov \$0x90,%al + 20a: b1 90 [ ]*mov \$0x90,%cl + 20c: b2 90 [ ]*mov \$0x90,%dl + 20e: b3 90 [ ]*mov \$0x90,%bl + 210: b4 90 [ ]*mov \$0x90,%ah + 212: b5 90 [ ]*mov \$0x90,%ch + 214: b6 90 [ ]*mov \$0x90,%dh + 216: b7 90 [ ]*mov \$0x90,%bh + 218: b8 90 90 90 90 [ ]*mov \$0x90909090,%eax + 21d: b9 90 90 90 90 [ ]*mov \$0x90909090,%ecx + 222: ba 90 90 90 90 [ ]*mov \$0x90909090,%edx + 227: bb 90 90 90 90 [ ]*mov \$0x90909090,%ebx + 22c: bc 90 90 90 90 [ ]*mov \$0x90909090,%esp + 231: bd 90 90 90 90 [ ]*mov \$0x90909090,%ebp + 236: be 90 90 90 90 [ ]*mov \$0x90909090,%esi + 23b: bf 90 90 90 90 [ ]*mov \$0x90909090,%edi + 240: c0 90 90 90 90 90 90 [ ]*rclb \$0x90,0x90909090\(%eax\) + 247: c1 90 90 90 90 90 90 [ ]*rcll \$0x90,0x90909090\(%eax\) + 24e: c2 90 90 [ ]*ret \$0x9090 + 251: c3 [ ]*ret + 252: c4 90 90 90 90 90 [ ]*les 0x90909090\(%eax\),%edx + 258: c5 90 90 90 90 90 [ ]*lds 0x90909090\(%eax\),%edx + 25e: c6 80 90 90 90 90 90 [ ]*movb \$0x90,0x90909090\(%eax\) + 265: c7 80 90 90 90 90 90 90 90 90 [ ]*movl \$0x90909090,0x90909090\(%eax\) + 26f: c8 90 90 90 [ ]*enter \$0x9090,\$0x90 + 273: c9 [ ]*leave + 274: ca 90 90 [ ]*lret \$0x9090 + 277: cb [ ]*lret + 278: cc [ ]*int3 + 279: cd 90 [ ]*int \$0x90 + 27b: ce [ ]*into + 27c: cf [ ]*iret + 27d: d0 90 90 90 90 90 [ ]*rclb 0x90909090\(%eax\) + 283: d1 90 90 90 90 90 [ ]*rcll 0x90909090\(%eax\) + 289: d2 90 90 90 90 90 [ ]*rclb %cl,0x90909090\(%eax\) + 28f: d3 90 90 90 90 90 [ ]*rcll %cl,0x90909090\(%eax\) + 295: d4 90 [ ]*aam \$0xffffff90 + 297: d5 90 [ ]*aad \$0xffffff90 + 299: d7 [ ]*xlat %ds:\(%ebx\) + 29a: d8 90 90 90 90 90 [ ]*fcoms 0x90909090\(%eax\) + 2a0: d9 90 90 90 90 90 [ ]*fsts 0x90909090\(%eax\) + 2a6: da 90 90 90 90 90 [ ]*ficoml 0x90909090\(%eax\) + 2ac: db 90 90 90 90 90 [ ]*fistl 0x90909090\(%eax\) + 2b2: dc 90 90 90 90 90 [ ]*fcoml 0x90909090\(%eax\) + 2b8: dd 90 90 90 90 90 [ ]*fstl 0x90909090\(%eax\) + 2be: de 90 90 90 90 90 [ ]*ficom 0x90909090\(%eax\) + 2c4: df 90 90 90 90 90 [ ]*fist 0x90909090\(%eax\) + 2ca: e0 90 [ ]*loopne (0x)?25c.* + 2cc: e1 90 [ ]*loope (0x)?25e.* + 2ce: e2 90 [ ]*loop (0x)?260.* + 2d0: e3 90 [ ]*jecxz (0x)?262.* + 2d2: e4 90 [ ]*in \$0x90,%al + 2d4: e5 90 [ ]*in \$0x90,%eax + 2d6: e6 90 [ ]*out %al,\$0x90 + 2d8: e7 90 [ ]*out %eax,\$0x90 + 2da: e8 90 90 90 90 [ ]*call (0x)?9090936f.* + 2df: e9 90 90 90 90 [ ]*jmp (0x)?90909374.* + 2e4: ea 90 90 90 90 90 90 [ ]*ljmp \$0x9090,\$0x90909090 + 2eb: eb 90 [ ]*jmp (0x)?27d.* + 2ed: ec [ ]*in \(%dx\),%al + 2ee: ed [ ]*in \(%dx\),%eax + 2ef: ee [ ]*out %al,\(%dx\) + 2f0: ef [ ]*out %eax,\(%dx\) + 2f1: f4 [ ]*hlt + 2f2: f5 [ ]*cmc + 2f3: f6 90 90 90 90 90 [ ]*notb 0x90909090\(%eax\) + 2f9: f7 90 90 90 90 90 [ ]*notl 0x90909090\(%eax\) + 2ff: f8 [ ]*clc + 300: f9 [ ]*stc + 301: fa [ ]*cli + 302: fb [ ]*sti + 303: fc [ ]*cld + 304: fd [ ]*std + 305: ff 90 90 90 90 90 [ ]*call \*0x90909090\(%eax\) + 30b: 0f 00 90 90 90 90 90 [ ]*lldt 0x90909090\(%eax\) + 312: 0f 01 90 90 90 90 90 [ ]*lgdt 0x90909090\(%eax\) + 319: 0f 02 90 90 90 90 90 [ ]*lar 0x90909090\(%eax\),%edx + 320: 0f 03 90 90 90 90 90 [ ]*lsl 0x90909090\(%eax\),%edx + 327: 0f 06 [ ]*clts + 329: 0f 08 [ ]*invd + 32b: 0f 09 [ ]*wbinvd + 32d: 0f 0b [ ]*ud2a + 32f: 0f 20 d0 [ ]*mov %cr2,%eax + 332: 0f 21 d0 [ ]*mov %db2,%eax + 335: 0f 22 d0 [ ]*mov %eax,%cr2 + 338: 0f 23 d0 [ ]*mov %eax,%db2 + 33b: 0f 24 d0 [ ]*mov %tr2,%eax + 33e: 0f 26 d0 [ ]*mov %eax,%tr2 + 341: 0f 30 [ ]*wrmsr + 343: 0f 31 [ ]*rdtsc + 345: 0f 32 [ ]*rdmsr + 347: 0f 33 [ ]*rdpmc + 349: 0f 40 90 90 90 90 90 [ ]*cmovo 0x90909090\(%eax\),%edx + 350: 0f 41 90 90 90 90 90 [ ]*cmovno 0x90909090\(%eax\),%edx + 357: 0f 42 90 90 90 90 90 [ ]*cmovb 0x90909090\(%eax\),%edx + 35e: 0f 43 90 90 90 90 90 [ ]*cmovae 0x90909090\(%eax\),%edx + 365: 0f 44 90 90 90 90 90 [ ]*cmove 0x90909090\(%eax\),%edx + 36c: 0f 45 90 90 90 90 90 [ ]*cmovne 0x90909090\(%eax\),%edx + 373: 0f 46 90 90 90 90 90 [ ]*cmovbe 0x90909090\(%eax\),%edx + 37a: 0f 47 90 90 90 90 90 [ ]*cmova 0x90909090\(%eax\),%edx + 381: 0f 48 90 90 90 90 90 [ ]*cmovs 0x90909090\(%eax\),%edx + 388: 0f 49 90 90 90 90 90 [ ]*cmovns 0x90909090\(%eax\),%edx + 38f: 0f 4a 90 90 90 90 90 [ ]*cmovp 0x90909090\(%eax\),%edx + 396: 0f 4b 90 90 90 90 90 [ ]*cmovnp 0x90909090\(%eax\),%edx + 39d: 0f 4c 90 90 90 90 90 [ ]*cmovl 0x90909090\(%eax\),%edx + 3a4: 0f 4d 90 90 90 90 90 [ ]*cmovge 0x90909090\(%eax\),%edx + 3ab: 0f 4e 90 90 90 90 90 [ ]*cmovle 0x90909090\(%eax\),%edx + 3b2: 0f 4f 90 90 90 90 90 [ ]*cmovg 0x90909090\(%eax\),%edx + 3b9: 0f 60 90 90 90 90 90 [ ]*punpcklbw 0x90909090\(%eax\),%mm2 + 3c0: 0f 61 90 90 90 90 90 [ ]*punpcklwd 0x90909090\(%eax\),%mm2 + 3c7: 0f 62 90 90 90 90 90 [ ]*punpckldq 0x90909090\(%eax\),%mm2 + 3ce: 0f 63 90 90 90 90 90 [ ]*packsswb 0x90909090\(%eax\),%mm2 + 3d5: 0f 64 90 90 90 90 90 [ ]*pcmpgtb 0x90909090\(%eax\),%mm2 + 3dc: 0f 65 90 90 90 90 90 [ ]*pcmpgtw 0x90909090\(%eax\),%mm2 + 3e3: 0f 66 90 90 90 90 90 [ ]*pcmpgtd 0x90909090\(%eax\),%mm2 + 3ea: 0f 67 90 90 90 90 90 [ ]*packuswb 0x90909090\(%eax\),%mm2 + 3f1: 0f 68 90 90 90 90 90 [ ]*punpckhbw 0x90909090\(%eax\),%mm2 + 3f8: 0f 69 90 90 90 90 90 [ ]*punpckhwd 0x90909090\(%eax\),%mm2 + 3ff: 0f 6a 90 90 90 90 90 [ ]*punpckhdq 0x90909090\(%eax\),%mm2 + 406: 0f 6b 90 90 90 90 90 [ ]*packssdw 0x90909090\(%eax\),%mm2 + 40d: 0f 6e 90 90 90 90 90 [ ]*movd 0x90909090\(%eax\),%mm2 + 414: 0f 6f 90 90 90 90 90 [ ]*movq 0x90909090\(%eax\),%mm2 + 41b: 0f 71 d0 90 [ ]*psrlw \$0x90,%mm0 + 41f: 0f 72 d0 90 [ ]*psrld \$0x90,%mm0 + 423: 0f 73 d0 90 [ ]*psrlq \$0x90,%mm0 + 427: 0f 74 90 90 90 90 90 [ ]*pcmpeqb 0x90909090\(%eax\),%mm2 + 42e: 0f 75 90 90 90 90 90 [ ]*pcmpeqw 0x90909090\(%eax\),%mm2 + 435: 0f 76 90 90 90 90 90 [ ]*pcmpeqd 0x90909090\(%eax\),%mm2 + 43c: 0f 77 [ ]*emms + 43e: 0f 7e 90 90 90 90 90 [ ]*movd %mm2,0x90909090\(%eax\) + 445: 0f 7f 90 90 90 90 90 [ ]*movq %mm2,0x90909090\(%eax\) + 44c: 0f 80 90 90 90 90 [ ]*jo (0x)?909094e2.* + 452: 0f 81 90 90 90 90 [ ]*jno (0x)?909094e8.* + 458: 0f 82 90 90 90 90 [ ]*jb (0x)?909094ee.* + 45e: 0f 83 90 90 90 90 [ ]*jae (0x)?909094f4.* + 464: 0f 84 90 90 90 90 [ ]*je (0x)?909094fa.* + 46a: 0f 85 90 90 90 90 [ ]*jne (0x)?90909500.* + 470: 0f 86 90 90 90 90 [ ]*jbe (0x)?90909506.* + 476: 0f 87 90 90 90 90 [ ]*ja (0x)?9090950c.* + 47c: 0f 88 90 90 90 90 [ ]*js (0x)?90909512.* + 482: 0f 89 90 90 90 90 [ ]*jns (0x)?90909518.* + 488: 0f 8a 90 90 90 90 [ ]*jp (0x)?9090951e.* + 48e: 0f 8b 90 90 90 90 [ ]*jnp (0x)?90909524.* + 494: 0f 8c 90 90 90 90 [ ]*jl (0x)?9090952a.* + 49a: 0f 8d 90 90 90 90 [ ]*jge (0x)?90909530.* + 4a0: 0f 8e 90 90 90 90 [ ]*jle (0x)?90909536.* + 4a6: 0f 8f 90 90 90 90 [ ]*jg (0x)?9090953c.* + 4ac: 0f 90 80 90 90 90 90 [ ]*seto 0x90909090\(%eax\) + 4b3: 0f 91 80 90 90 90 90 [ ]*setno 0x90909090\(%eax\) + 4ba: 0f 92 80 90 90 90 90 [ ]*setb 0x90909090\(%eax\) + 4c1: 0f 93 80 90 90 90 90 [ ]*setae 0x90909090\(%eax\) + 4c8: 0f 94 80 90 90 90 90 [ ]*sete 0x90909090\(%eax\) + 4cf: 0f 95 80 90 90 90 90 [ ]*setne 0x90909090\(%eax\) + 4d6: 0f 96 80 90 90 90 90 [ ]*setbe 0x90909090\(%eax\) + 4dd: 0f 97 80 90 90 90 90 [ ]*seta 0x90909090\(%eax\) + 4e4: 0f 98 80 90 90 90 90 [ ]*sets 0x90909090\(%eax\) + 4eb: 0f 99 80 90 90 90 90 [ ]*setns 0x90909090\(%eax\) + 4f2: 0f 9a 80 90 90 90 90 [ ]*setp 0x90909090\(%eax\) + 4f9: 0f 9b 80 90 90 90 90 [ ]*setnp 0x90909090\(%eax\) + 500: 0f 9c 80 90 90 90 90 [ ]*setl 0x90909090\(%eax\) + 507: 0f 9d 80 90 90 90 90 [ ]*setge 0x90909090\(%eax\) + 50e: 0f 9e 80 90 90 90 90 [ ]*setle 0x90909090\(%eax\) + 515: 0f 9f 80 90 90 90 90 [ ]*setg 0x90909090\(%eax\) + 51c: 0f a0 [ ]*push %fs + 51e: 0f a1 [ ]*pop %fs + 520: 0f a2 [ ]*cpuid + 522: 0f a3 90 90 90 90 90 [ ]*bt %edx,0x90909090\(%eax\) + 529: 0f a4 90 90 90 90 90 90 [ ]*shld \$0x90,%edx,0x90909090\(%eax\) + 531: 0f a5 90 90 90 90 90 [ ]*shld %cl,%edx,0x90909090\(%eax\) + 538: 0f a8 [ ]*push %gs + 53a: 0f a9 [ ]*pop %gs + 53c: 0f aa [ ]*rsm + 53e: 0f ab 90 90 90 90 90 [ ]*bts %edx,0x90909090\(%eax\) + 545: 0f ac 90 90 90 90 90 90 [ ]*shrd \$0x90,%edx,0x90909090\(%eax\) + 54d: 0f ad 90 90 90 90 90 [ ]*shrd %cl,%edx,0x90909090\(%eax\) + 554: 0f af 90 90 90 90 90 [ ]*imul 0x90909090\(%eax\),%edx + 55b: 0f b0 90 90 90 90 90 [ ]*cmpxchg %dl,0x90909090\(%eax\) + 562: 0f b1 90 90 90 90 90 [ ]*cmpxchg %edx,0x90909090\(%eax\) + 569: 0f b2 90 90 90 90 90 [ ]*lss 0x90909090\(%eax\),%edx + 570: 0f b3 90 90 90 90 90 [ ]*btr %edx,0x90909090\(%eax\) + 577: 0f b4 90 90 90 90 90 [ ]*lfs 0x90909090\(%eax\),%edx + 57e: 0f b5 90 90 90 90 90 [ ]*lgs 0x90909090\(%eax\),%edx + 585: 0f b6 90 90 90 90 90 [ ]*movzbl 0x90909090\(%eax\),%edx + 58c: 0f b7 90 90 90 90 90 [ ]*movzwl 0x90909090\(%eax\),%edx + 593: 0f b9 [ ]*ud2b + 595: 0f bb 90 90 90 90 90 [ ]*btc %edx,0x90909090\(%eax\) + 59c: 0f bc 90 90 90 90 90 [ ]*bsf 0x90909090\(%eax\),%edx + 5a3: 0f bd 90 90 90 90 90 [ ]*bsr 0x90909090\(%eax\),%edx + 5aa: 0f be 90 90 90 90 90 [ ]*movsbl 0x90909090\(%eax\),%edx + 5b1: 0f bf 90 90 90 90 90 [ ]*movswl 0x90909090\(%eax\),%edx + 5b8: 0f c0 90 90 90 90 90 [ ]*xadd %dl,0x90909090\(%eax\) + 5bf: 0f c1 90 90 90 90 90 [ ]*xadd %edx,0x90909090\(%eax\) + 5c6: 0f c8 [ ]*bswap %eax + 5c8: 0f c9 [ ]*bswap %ecx + 5ca: 0f ca [ ]*bswap %edx + 5cc: 0f cb [ ]*bswap %ebx + 5ce: 0f cc [ ]*bswap %esp + 5d0: 0f cd [ ]*bswap %ebp + 5d2: 0f ce [ ]*bswap %esi + 5d4: 0f cf [ ]*bswap %edi + 5d6: 0f d1 90 90 90 90 90 [ ]*psrlw 0x90909090\(%eax\),%mm2 + 5dd: 0f d2 90 90 90 90 90 [ ]*psrld 0x90909090\(%eax\),%mm2 + 5e4: 0f d3 90 90 90 90 90 [ ]*psrlq 0x90909090\(%eax\),%mm2 + 5eb: 0f d5 90 90 90 90 90 [ ]*pmullw 0x90909090\(%eax\),%mm2 + 5f2: 0f d8 90 90 90 90 90 [ ]*psubusb 0x90909090\(%eax\),%mm2 + 5f9: 0f d9 90 90 90 90 90 [ ]*psubusw 0x90909090\(%eax\),%mm2 + 600: 0f db 90 90 90 90 90 [ ]*pand 0x90909090\(%eax\),%mm2 + 607: 0f dc 90 90 90 90 90 [ ]*paddusb 0x90909090\(%eax\),%mm2 + 60e: 0f dd 90 90 90 90 90 [ ]*paddusw 0x90909090\(%eax\),%mm2 + 615: 0f df 90 90 90 90 90 [ ]*pandn 0x90909090\(%eax\),%mm2 + 61c: 0f e1 90 90 90 90 90 [ ]*psraw 0x90909090\(%eax\),%mm2 + 623: 0f e2 90 90 90 90 90 [ ]*psrad 0x90909090\(%eax\),%mm2 + 62a: 0f e5 90 90 90 90 90 [ ]*pmulhw 0x90909090\(%eax\),%mm2 + 631: 0f e8 90 90 90 90 90 [ ]*psubsb 0x90909090\(%eax\),%mm2 + 638: 0f e9 90 90 90 90 90 [ ]*psubsw 0x90909090\(%eax\),%mm2 + 63f: 0f eb 90 90 90 90 90 [ ]*por 0x90909090\(%eax\),%mm2 + 646: 0f ec 90 90 90 90 90 [ ]*paddsb 0x90909090\(%eax\),%mm2 + 64d: 0f ed 90 90 90 90 90 [ ]*paddsw 0x90909090\(%eax\),%mm2 + 654: 0f ef 90 90 90 90 90 [ ]*pxor 0x90909090\(%eax\),%mm2 + 65b: 0f f1 90 90 90 90 90 [ ]*psllw 0x90909090\(%eax\),%mm2 + 662: 0f f2 90 90 90 90 90 [ ]*pslld 0x90909090\(%eax\),%mm2 + 669: 0f f3 90 90 90 90 90 [ ]*psllq 0x90909090\(%eax\),%mm2 + 670: 0f f5 90 90 90 90 90 [ ]*pmaddwd 0x90909090\(%eax\),%mm2 + 677: 0f f8 90 90 90 90 90 [ ]*psubb 0x90909090\(%eax\),%mm2 + 67e: 0f f9 90 90 90 90 90 [ ]*psubw 0x90909090\(%eax\),%mm2 + 685: 0f fa 90 90 90 90 90 [ ]*psubd 0x90909090\(%eax\),%mm2 + 68c: 0f fc 90 90 90 90 90 [ ]*paddb 0x90909090\(%eax\),%mm2 + 693: 0f fd 90 90 90 90 90 [ ]*paddw 0x90909090\(%eax\),%mm2 + 69a: 0f fe 90 90 90 90 90 [ ]*paddd 0x90909090\(%eax\),%mm2 + 6a1: 66 01 90 90 90 90 90 [ ]*add %dx,0x90909090\(%eax\) + 6a8: 66 03 90 90 90 90 90 [ ]*add 0x90909090\(%eax\),%dx + 6af: 66 05 90 90 [ ]*add \$0x9090,%ax + 6b3: 66 06 [ ]*pushw %es + 6b5: 66 07 [ ]*popw %es + 6b7: 66 09 90 90 90 90 90 [ ]*or %dx,0x90909090\(%eax\) + 6be: 66 0b 90 90 90 90 90 [ ]*or 0x90909090\(%eax\),%dx + 6c5: 66 0d 90 90 [ ]*or \$0x9090,%ax + 6c9: 66 0e [ ]*pushw %cs + 6cb: 66 11 90 90 90 90 90 [ ]*adc %dx,0x90909090\(%eax\) + 6d2: 66 13 90 90 90 90 90 [ ]*adc 0x90909090\(%eax\),%dx + 6d9: 66 15 90 90 [ ]*adc \$0x9090,%ax + 6dd: 66 16 [ ]*pushw %ss + 6df: 66 17 [ ]*popw %ss + 6e1: 66 19 90 90 90 90 90 [ ]*sbb %dx,0x90909090\(%eax\) + 6e8: 66 1b 90 90 90 90 90 [ ]*sbb 0x90909090\(%eax\),%dx + 6ef: 66 1d 90 90 [ ]*sbb \$0x9090,%ax + 6f3: 66 1e [ ]*pushw %ds + 6f5: 66 1f [ ]*popw %ds + 6f7: 66 21 90 90 90 90 90 [ ]*and %dx,0x90909090\(%eax\) + 6fe: 66 23 90 90 90 90 90 [ ]*and 0x90909090\(%eax\),%dx + 705: 66 25 90 90 [ ]*and \$0x9090,%ax + 709: 66 29 90 90 90 90 90 [ ]*sub %dx,0x90909090\(%eax\) + 710: 66 2b 90 90 90 90 90 [ ]*sub 0x90909090\(%eax\),%dx + 717: 66 2d 90 90 [ ]*sub \$0x9090,%ax + 71b: 66 31 90 90 90 90 90 [ ]*xor %dx,0x90909090\(%eax\) + 722: 66 33 90 90 90 90 90 [ ]*xor 0x90909090\(%eax\),%dx + 729: 66 35 90 90 [ ]*xor \$0x9090,%ax + 72d: 66 39 90 90 90 90 90 [ ]*cmp %dx,0x90909090\(%eax\) + 734: 66 3b 90 90 90 90 90 [ ]*cmp 0x90909090\(%eax\),%dx + 73b: 66 3d 90 90 [ ]*cmp \$0x9090,%ax + 73f: 66 40 [ ]*inc %ax + 741: 66 41 [ ]*inc %cx + 743: 66 42 [ ]*inc %dx + 745: 66 43 [ ]*inc %bx + 747: 66 44 [ ]*inc %sp + 749: 66 45 [ ]*inc %bp + 74b: 66 46 [ ]*inc %si + 74d: 66 47 [ ]*inc %di + 74f: 66 48 [ ]*dec %ax + 751: 66 49 [ ]*dec %cx + 753: 66 4a [ ]*dec %dx + 755: 66 4b [ ]*dec %bx + 757: 66 4c [ ]*dec %sp + 759: 66 4d [ ]*dec %bp + 75b: 66 4e [ ]*dec %si + 75d: 66 4f [ ]*dec %di + 75f: 66 50 [ ]*push %ax + 761: 66 51 [ ]*push %cx + 763: 66 52 [ ]*push %dx + 765: 66 53 [ ]*push %bx + 767: 66 54 [ ]*push %sp + 769: 66 55 [ ]*push %bp + 76b: 66 56 [ ]*push %si + 76d: 66 57 [ ]*push %di + 76f: 66 58 [ ]*pop %ax + 771: 66 59 [ ]*pop %cx + 773: 66 5a [ ]*pop %dx + 775: 66 5b [ ]*pop %bx + 777: 66 5c [ ]*pop %sp + 779: 66 5d [ ]*pop %bp + 77b: 66 5e [ ]*pop %si + 77d: 66 5f [ ]*pop %di + 77f: 66 60 [ ]*pushaw + 781: 66 61 [ ]*popaw + 783: 66 62 90 90 90 90 90 [ ]*bound %dx,0x90909090\(%eax\) + 78a: 66 68 90 90 [ ]*pushw \$0x9090 + 78e: 66 69 90 90 90 90 90 90 90 [ ]*imul \$0x9090,0x90909090\(%eax\),%dx + 797: 66 6a 90 [ ]*pushw \$0xffffff90 + 79a: 66 6b 90 90 90 90 90 90 [ ]*imul \$0xffffff90,0x90909090\(%eax\),%dx + 7a2: 66 6d [ ]*insw \(%dx\),%es:\(%edi\) + 7a4: 66 6f [ ]*outsw %ds:\(%esi\),\(%dx\) + 7a6: 66 81 90 90 90 90 90 90 90 [ ]*adcw \$0x9090,0x90909090\(%eax\) + 7af: 66 83 90 90 90 90 90 90 [ ]*adcw \$0xffffff90,0x90909090\(%eax\) + 7b7: 66 85 90 90 90 90 90 [ ]*test %dx,0x90909090\(%eax\) + 7be: 66 87 90 90 90 90 90 [ ]*xchg %dx,0x90909090\(%eax\) + 7c5: 66 89 90 90 90 90 90 [ ]*mov %dx,0x90909090\(%eax\) + 7cc: 66 8b 90 90 90 90 90 [ ]*mov 0x90909090\(%eax\),%dx + 7d3: 66 8c 90 90 90 90 90 [ ]*movw %ss,0x90909090\(%eax\) + 7da: 66 8d 90 90 90 90 90 [ ]*lea 0x90909090\(%eax\),%dx + 7e1: 66 8f 80 90 90 90 90 [ ]*popw 0x90909090\(%eax\) + 7e8: 66 91 [ ]*xchg %ax,%cx + 7ea: 66 92 [ ]*xchg %ax,%dx + 7ec: 66 93 [ ]*xchg %ax,%bx + 7ee: 66 94 [ ]*xchg %ax,%sp + 7f0: 66 95 [ ]*xchg %ax,%bp + 7f2: 66 96 [ ]*xchg %ax,%si + 7f4: 66 97 [ ]*xchg %ax,%di + 7f6: 66 98 [ ]*cbtw + 7f8: 66 99 [ ]*cwtd + 7fa: 66 9a 90 90 90 90 [ ]*lcallw \$0x9090,\$0x9090 + 800: 66 9c [ ]*pushfw + 802: 66 9d [ ]*popfw + 804: 66 a1 90 90 90 90 [ ]*mov 0x90909090,%ax + 80a: 66 a3 90 90 90 90 [ ]*mov %ax,0x90909090 + 810: 66 a5 [ ]*movsw %ds:\(%esi\),%es:\(%edi\) + 812: 66 a7 [ ]*cmpsw %es:\(%edi\),%ds:\(%esi\) + 814: 66 a9 90 90 [ ]*test \$0x9090,%ax + 818: 66 ab [ ]*stos %ax,%es:\(%edi\) + 81a: 66 ad [ ]*lods %ds:\(%esi\),%ax + 81c: 66 af [ ]*scas %es:\(%edi\),%ax + 81e: 66 b8 90 90 [ ]*mov \$0x9090,%ax + 822: 66 b9 90 90 [ ]*mov \$0x9090,%cx + 826: 66 ba 90 90 [ ]*mov \$0x9090,%dx + 82a: 66 bb 90 90 [ ]*mov \$0x9090,%bx + 82e: 66 bc 90 90 [ ]*mov \$0x9090,%sp + 832: 66 bd 90 90 [ ]*mov \$0x9090,%bp + 836: 66 be 90 90 [ ]*mov \$0x9090,%si + 83a: 66 bf 90 90 [ ]*mov \$0x9090,%di + 83e: 66 c1 90 90 90 90 90 90 [ ]*rclw \$0x90,0x90909090\(%eax\) + 846: 66 c2 90 90 [ ]*retw \$0x9090 + 84a: 66 c3 [ ]*retw + 84c: 66 c4 90 90 90 90 90 [ ]*les 0x90909090\(%eax\),%dx + 853: 66 c5 90 90 90 90 90 [ ]*lds 0x90909090\(%eax\),%dx + 85a: 66 c7 80 90 90 90 90 90 90 [ ]*movw \$0x9090,0x90909090\(%eax\) + 863: 66 c8 90 90 90 [ ]*enterw \$0x9090,\$0x90 + 868: 66 c9 [ ]*leavew + 86a: 66 ca 90 90 [ ]*lretw \$0x9090 + 86e: 66 cb [ ]*lretw + 870: 66 cf [ ]*iretw + 872: 66 d1 90 90 90 90 90 [ ]*rclw 0x90909090\(%eax\) + 879: 66 d3 90 90 90 90 90 [ ]*rclw %cl,0x90909090\(%eax\) + 880: 66 e5 90 [ ]*in \$0x90,%ax + 883: 66 e7 90 [ ]*out %ax,\$0x90 + 886: 66 e8 8f 90 [ ]*callw (0x)?ffff9919.* + 88a: 66 ea 90 90 90 90 [ ]*ljmpw \$0x9090,\$0x9090 + 890: 66 ed [ ]*in \(%dx\),%ax + 892: 66 ef [ ]*out %ax,\(%dx\) + 894: 66 f7 90 90 90 90 90 [ ]*notw 0x90909090\(%eax\) + 89b: 66 ff 90 90 90 90 90 [ ]*callw \*0x90909090\(%eax\) + 8a2: 66 0f 02 90 90 90 90 90 [ ]*lar 0x90909090\(%eax\),%dx + 8aa: 66 0f 03 90 90 90 90 90 [ ]*lsl 0x90909090\(%eax\),%dx + 8b2: 66 0f 40 90 90 90 90 90 [ ]*cmovo 0x90909090\(%eax\),%dx + 8ba: 66 0f 41 90 90 90 90 90 [ ]*cmovno 0x90909090\(%eax\),%dx + 8c2: 66 0f 42 90 90 90 90 90 [ ]*cmovb 0x90909090\(%eax\),%dx + 8ca: 66 0f 43 90 90 90 90 90 [ ]*cmovae 0x90909090\(%eax\),%dx + 8d2: 66 0f 44 90 90 90 90 90 [ ]*cmove 0x90909090\(%eax\),%dx + 8da: 66 0f 45 90 90 90 90 90 [ ]*cmovne 0x90909090\(%eax\),%dx + 8e2: 66 0f 46 90 90 90 90 90 [ ]*cmovbe 0x90909090\(%eax\),%dx + 8ea: 66 0f 47 90 90 90 90 90 [ ]*cmova 0x90909090\(%eax\),%dx + 8f2: 66 0f 48 90 90 90 90 90 [ ]*cmovs 0x90909090\(%eax\),%dx + 8fa: 66 0f 49 90 90 90 90 90 [ ]*cmovns 0x90909090\(%eax\),%dx + 902: 66 0f 4a 90 90 90 90 90 [ ]*cmovp 0x90909090\(%eax\),%dx + 90a: 66 0f 4b 90 90 90 90 90 [ ]*cmovnp 0x90909090\(%eax\),%dx + 912: 66 0f 4c 90 90 90 90 90 [ ]*cmovl 0x90909090\(%eax\),%dx + 91a: 66 0f 4d 90 90 90 90 90 [ ]*cmovge 0x90909090\(%eax\),%dx + 922: 66 0f 4e 90 90 90 90 90 [ ]*cmovle 0x90909090\(%eax\),%dx + 92a: 66 0f 4f 90 90 90 90 90 [ ]*cmovg 0x90909090\(%eax\),%dx + 932: 66 0f a0 [ ]*pushw %fs + 935: 66 0f a1 [ ]*popw %fs + 938: 66 0f a3 90 90 90 90 90 [ ]*bt %dx,0x90909090\(%eax\) + 940: 66 0f a4 90 90 90 90 90 90 [ ]*shld \$0x90,%dx,0x90909090\(%eax\) + 949: 66 0f a5 90 90 90 90 90 [ ]*shld %cl,%dx,0x90909090\(%eax\) + 951: 66 0f a8 [ ]*pushw %gs + 954: 66 0f a9 [ ]*popw %gs + 957: 66 0f ab 90 90 90 90 90 [ ]*bts %dx,0x90909090\(%eax\) + 95f: 66 0f ac 90 90 90 90 90 90 [ ]*shrd \$0x90,%dx,0x90909090\(%eax\) + 968: 66 0f ad 90 90 90 90 90 [ ]*shrd %cl,%dx,0x90909090\(%eax\) + 970: 66 0f af 90 90 90 90 90 [ ]*imul 0x90909090\(%eax\),%dx + 978: 66 0f b1 90 90 90 90 90 [ ]*cmpxchg %dx,0x90909090\(%eax\) + 980: 66 0f b2 90 90 90 90 90 [ ]*lss 0x90909090\(%eax\),%dx + 988: 66 0f b3 90 90 90 90 90 [ ]*btr %dx,0x90909090\(%eax\) + 990: 66 0f b4 90 90 90 90 90 [ ]*lfs 0x90909090\(%eax\),%dx + 998: 66 0f b5 90 90 90 90 90 [ ]*lgs 0x90909090\(%eax\),%dx + 9a0: 66 0f b6 90 90 90 90 90 [ ]*movzbw 0x90909090\(%eax\),%dx + 9a8: 66 0f bb 90 90 90 90 90 [ ]*btc %dx,0x90909090\(%eax\) + 9b0: 66 0f bc 90 90 90 90 90 [ ]*bsf 0x90909090\(%eax\),%dx + 9b8: 66 0f bd 90 90 90 90 90 [ ]*bsr 0x90909090\(%eax\),%dx + 9c0: 66 0f be 90 90 90 90 90 [ ]*movsbw 0x90909090\(%eax\),%dx + 9c8: 66 0f c1 90 90 90 90 90 [ ]*xadd %dx,0x90909090\(%eax\) diff --git a/gas/testsuite/gas/i386/opcode.s b/gas/testsuite/gas/i386/opcode.s new file mode 100644 index 0000000..39c5967 --- /dev/null +++ b/gas/testsuite/gas/i386/opcode.s @@ -0,0 +1,567 @@ +.text +foo: + add %dl,0x90909090(%eax) + add %edx,0x90909090(%eax) + add 0x90909090(%eax),%dl + add 0x90909090(%eax),%edx + add $0x90,%al + add $0x90909090,%eax + push %es + pop %es + or %dl,0x90909090(%eax) + or %edx,0x90909090(%eax) + or 0x90909090(%eax),%dl + or 0x90909090(%eax),%edx + or $0x90,%al + or $0x90909090,%eax + push %cs + adc %dl,0x90909090(%eax) + adc %edx,0x90909090(%eax) + adc 0x90909090(%eax),%dl + adc 0x90909090(%eax),%edx + adc $0x90,%al + adc $0x90909090,%eax + push %ss + pop %ss + sbb %dl,0x90909090(%eax) + sbb %edx,0x90909090(%eax) + sbb 0x90909090(%eax),%dl + sbb 0x90909090(%eax),%edx + sbb $0x90,%al + sbb $0x90909090,%eax + push %ds + pop %ds + and %dl,0x90909090(%eax) + and %edx,0x90909090(%eax) + and 0x90909090(%eax),%dl + and 0x90909090(%eax),%edx + and $0x90,%al + and $0x90909090,%eax + daa + sub %dl,0x90909090(%eax) + sub %edx,0x90909090(%eax) + sub 0x90909090(%eax),%dl + sub 0x90909090(%eax),%edx + sub $0x90,%al + sub $0x90909090,%eax + das + xor %dl,0x90909090(%eax) + xor %edx,0x90909090(%eax) + xor 0x90909090(%eax),%dl + xor 0x90909090(%eax),%edx + xor $0x90,%al + xor $0x90909090,%eax + aaa + cmp %dl,0x90909090(%eax) + cmp %edx,0x90909090(%eax) + cmp 0x90909090(%eax),%dl + cmp 0x90909090(%eax),%edx + cmp $0x90,%al + cmp $0x90909090,%eax + aas + inc %eax + inc %ecx + inc %edx + inc %ebx + inc %esp + inc %ebp + inc %esi + inc %edi + dec %eax + dec %ecx + dec %edx + dec %ebx + dec %esp + dec %ebp + dec %esi + dec %edi + push %eax + push %ecx + push %edx + push %ebx + push %esp + push %ebp + push %esi + push %edi + pop %eax + pop %ecx + pop %edx + pop %ebx + pop %esp + pop %ebp + pop %esi + pop %edi + pusha + popa + bound %edx,0x90909090(%eax) + arpl %dx,0x90909090(%eax) + push $0x90909090 + imul $0x90909090,0x90909090(%eax),%edx + push $0xffffff90 + imul $0xffffff90,0x90909090(%eax),%edx + insb (%dx),%es:(%edi) + insl (%dx),%es:(%edi) + outsb %ds:(%esi),(%dx) + outsl %ds:(%esi),(%dx) + jo .+2-0x70 + jno .+2-0x70 + jb .+2-0x70 + jae .+2-0x70 + je .+2-0x70 + jne .+2-0x70 + jbe .+2-0x70 + ja .+2-0x70 + js .+2-0x70 + jns .+2-0x70 + jp .+2-0x70 + jnp .+2-0x70 + jl .+2-0x70 + jge .+2-0x70 + jle .+2-0x70 + jg .+2-0x70 + adcb $0x90,0x90909090(%eax) + adcl $0x90909090,0x90909090(%eax) + adcl $0xffffff90,0x90909090(%eax) + test %dl,0x90909090(%eax) + test %edx,0x90909090(%eax) + xchg %dl,0x90909090(%eax) + xchg %edx,0x90909090(%eax) + mov %dl,0x90909090(%eax) + mov %edx,0x90909090(%eax) + mov 0x90909090(%eax),%dl + mov 0x90909090(%eax),%edx + movl %ss,0x90909090(%eax) + lea 0x90909090(%eax),%edx + movl 0x90909090(%eax),%ss + popl 0x90909090(%eax) + xchg %eax,%eax + xchg %eax,%ecx + xchg %eax,%edx + xchg %eax,%ebx + xchg %eax,%esp + xchg %eax,%ebp + xchg %eax,%esi + xchg %eax,%edi + cwtl + cltd + lcall $0x9090,$0x90909090 + fwait + pushf + popf + sahf + lahf + mov 0x90909090,%al + mov 0x90909090,%eax + mov %al,0x90909090 + mov %eax,0x90909090 + movsb %ds:(%esi),%es:(%edi) + movsl %ds:(%esi),%es:(%edi) + cmpsb %es:(%edi),%ds:(%esi) + cmpsl %es:(%edi),%ds:(%esi) + test $0x90,%al + test $0x90909090,%eax + stos %al,%es:(%edi) + stos %eax,%es:(%edi) + lods %ds:(%esi),%al + lods %ds:(%esi),%eax + scas %es:(%edi),%al + scas %es:(%edi),%eax + mov $0x90,%al + mov $0x90,%cl + mov $0x90,%dl + mov $0x90,%bl + mov $0x90,%ah + mov $0x90,%ch + mov $0x90,%dh + mov $0x90,%bh + mov $0x90909090,%eax + mov $0x90909090,%ecx + mov $0x90909090,%edx + mov $0x90909090,%ebx + mov $0x90909090,%esp + mov $0x90909090,%ebp + mov $0x90909090,%esi + mov $0x90909090,%edi + rclb $0x90,0x90909090(%eax) + rcll $0x90,0x90909090(%eax) + ret $0x9090 + ret + les 0x90909090(%eax),%edx + lds 0x90909090(%eax),%edx + movb $0x90,0x90909090(%eax) + movl $0x90909090,0x90909090(%eax) + enter $0x9090,$0x90 + leave + lret $0x9090 + lret + int3 + int $0x90 + into + iret + rclb 0x90909090(%eax) + rcll 0x90909090(%eax) + rclb %cl,0x90909090(%eax) + rcll %cl,0x90909090(%eax) + aam $0xffffff90 + aad $0xffffff90 + xlat %ds:(%ebx) + fcoms 0x90909090(%eax) + fsts 0x90909090(%eax) + ficoml 0x90909090(%eax) + fistl 0x90909090(%eax) + fcoml 0x90909090(%eax) + fstl 0x90909090(%eax) + ficom 0x90909090(%eax) + fist 0x90909090(%eax) + loopne .+2-0x70 + loope .+2-0x70 + loop .+2-0x70 + jecxz .+2-0x70 + in $0x90,%al + in $0x90,%eax + out %al,$0x90 + out %eax,$0x90 + call .+5+0x90909090 + jmp .+5+0x90909090 + ljmp $0x9090,$0x90909090 + jmp .+2-0x70 + in (%dx),%al + in (%dx),%eax + out %al,(%dx) + out %eax,(%dx) + hlt + cmc + notb 0x90909090(%eax) + notl 0x90909090(%eax) + clc + stc + cli + sti + cld + std + call *0x90909090(%eax) + lldt 0x90909090(%eax) + lgdt 0x90909090(%eax) + lar 0x90909090(%eax),%edx + lsl 0x90909090(%eax),%edx + clts + invd + wbinvd + ud2a + mov %cr2,%eax + mov %db2,%eax + mov %eax,%cr2 + mov %eax,%db2 + mov %tr2,%eax + mov %eax,%tr2 + wrmsr + rdtsc + rdmsr + rdpmc + cmovo 0x90909090(%eax),%edx + cmovno 0x90909090(%eax),%edx + cmovb 0x90909090(%eax),%edx + cmovae 0x90909090(%eax),%edx + cmove 0x90909090(%eax),%edx + cmovne 0x90909090(%eax),%edx + cmovbe 0x90909090(%eax),%edx + cmova 0x90909090(%eax),%edx + cmovs 0x90909090(%eax),%edx + cmovns 0x90909090(%eax),%edx + cmovp 0x90909090(%eax),%edx + cmovnp 0x90909090(%eax),%edx + cmovl 0x90909090(%eax),%edx + cmovge 0x90909090(%eax),%edx + cmovle 0x90909090(%eax),%edx + cmovg 0x90909090(%eax),%edx + punpcklbw 0x90909090(%eax),%mm2 + punpcklwd 0x90909090(%eax),%mm2 + punpckldq 0x90909090(%eax),%mm2 + packsswb 0x90909090(%eax),%mm2 + pcmpgtb 0x90909090(%eax),%mm2 + pcmpgtw 0x90909090(%eax),%mm2 + pcmpgtd 0x90909090(%eax),%mm2 + packuswb 0x90909090(%eax),%mm2 + punpckhbw 0x90909090(%eax),%mm2 + punpckhwd 0x90909090(%eax),%mm2 + punpckhdq 0x90909090(%eax),%mm2 + packssdw 0x90909090(%eax),%mm2 + movd 0x90909090(%eax),%mm2 + movq 0x90909090(%eax),%mm2 + psrlw $0x90,%mm0 + psrld $0x90,%mm0 + psrlq $0x90,%mm0 + pcmpeqb 0x90909090(%eax),%mm2 + pcmpeqw 0x90909090(%eax),%mm2 + pcmpeqd 0x90909090(%eax),%mm2 + emms + movd %mm2,0x90909090(%eax) + movq %mm2,0x90909090(%eax) + jo .+6+0x90909090 + jno .+6+0x90909090 + jb .+6+0x90909090 + jae .+6+0x90909090 + je .+6+0x90909090 + jne .+6+0x90909090 + jbe .+6+0x90909090 + ja .+6+0x90909090 + js .+6+0x90909090 + jns .+6+0x90909090 + jp .+6+0x90909090 + jnp .+6+0x90909090 + jl .+6+0x90909090 + jge .+6+0x90909090 + jle .+6+0x90909090 + jg .+6+0x90909090 + seto 0x90909090(%eax) + setno 0x90909090(%eax) + setb 0x90909090(%eax) + setae 0x90909090(%eax) + sete 0x90909090(%eax) + setne 0x90909090(%eax) + setbe 0x90909090(%eax) + seta 0x90909090(%eax) + sets 0x90909090(%eax) + setns 0x90909090(%eax) + setp 0x90909090(%eax) + setnp 0x90909090(%eax) + setl 0x90909090(%eax) + setge 0x90909090(%eax) + setle 0x90909090(%eax) + setg 0x90909090(%eax) + push %fs + pop %fs + cpuid + bt %edx,0x90909090(%eax) + shld $0x90,%edx,0x90909090(%eax) + shld %cl,%edx,0x90909090(%eax) + push %gs + pop %gs + rsm + bts %edx,0x90909090(%eax) + shrd $0x90,%edx,0x90909090(%eax) + shrd %cl,%edx,0x90909090(%eax) + imul 0x90909090(%eax),%edx + cmpxchg %dl,0x90909090(%eax) + cmpxchg %edx,0x90909090(%eax) + lss 0x90909090(%eax),%edx + btr %edx,0x90909090(%eax) + lfs 0x90909090(%eax),%edx + lgs 0x90909090(%eax),%edx + movzbl 0x90909090(%eax),%edx + movzwl 0x90909090(%eax),%edx + ud2b + btc %edx,0x90909090(%eax) + bsf 0x90909090(%eax),%edx + bsr 0x90909090(%eax),%edx + movsbl 0x90909090(%eax),%edx + movswl 0x90909090(%eax),%edx + xadd %dl,0x90909090(%eax) + xadd %edx,0x90909090(%eax) + bswap %eax + bswap %ecx + bswap %edx + bswap %ebx + bswap %esp + bswap %ebp + bswap %esi + bswap %edi + psrlw 0x90909090(%eax),%mm2 + psrld 0x90909090(%eax),%mm2 + psrlq 0x90909090(%eax),%mm2 + pmullw 0x90909090(%eax),%mm2 + psubusb 0x90909090(%eax),%mm2 + psubusw 0x90909090(%eax),%mm2 + pand 0x90909090(%eax),%mm2 + paddusb 0x90909090(%eax),%mm2 + paddusw 0x90909090(%eax),%mm2 + pandn 0x90909090(%eax),%mm2 + psraw 0x90909090(%eax),%mm2 + psrad 0x90909090(%eax),%mm2 + pmulhw 0x90909090(%eax),%mm2 + psubsb 0x90909090(%eax),%mm2 + psubsw 0x90909090(%eax),%mm2 + por 0x90909090(%eax),%mm2 + paddsb 0x90909090(%eax),%mm2 + paddsw 0x90909090(%eax),%mm2 + pxor 0x90909090(%eax),%mm2 + psllw 0x90909090(%eax),%mm2 + pslld 0x90909090(%eax),%mm2 + psllq 0x90909090(%eax),%mm2 + pmaddwd 0x90909090(%eax),%mm2 + psubb 0x90909090(%eax),%mm2 + psubw 0x90909090(%eax),%mm2 + psubd 0x90909090(%eax),%mm2 + paddb 0x90909090(%eax),%mm2 + paddw 0x90909090(%eax),%mm2 + paddd 0x90909090(%eax),%mm2 + add %dx,0x90909090(%eax) + add 0x90909090(%eax),%dx + add $0x9090,%ax + pushw %es + popw %es + or %dx,0x90909090(%eax) + or 0x90909090(%eax),%dx + or $0x9090,%ax + pushw %cs + adc %dx,0x90909090(%eax) + adc 0x90909090(%eax),%dx + adc $0x9090,%ax + pushw %ss + popw %ss + sbb %dx,0x90909090(%eax) + sbb 0x90909090(%eax),%dx + sbb $0x9090,%ax + pushw %ds + popw %ds + and %dx,0x90909090(%eax) + and 0x90909090(%eax),%dx + and $0x9090,%ax + sub %dx,0x90909090(%eax) + sub 0x90909090(%eax),%dx + sub $0x9090,%ax + xor %dx,0x90909090(%eax) + xor 0x90909090(%eax),%dx + xor $0x9090,%ax + cmp %dx,0x90909090(%eax) + cmp 0x90909090(%eax),%dx + cmp $0x9090,%ax + inc %ax + inc %cx + inc %dx + inc %bx + inc %sp + inc %bp + inc %si + inc %di + dec %ax + dec %cx + dec %dx + dec %bx + dec %sp + dec %bp + dec %si + dec %di + push %ax + push %cx + push %dx + push %bx + push %sp + push %bp + push %si + push %di + pop %ax + pop %cx + pop %dx + pop %bx + pop %sp + pop %bp + pop %si + pop %di + pushaw + popaw + bound %dx,0x90909090(%eax) + pushw $0x9090 + imul $0x9090,0x90909090(%eax),%dx + pushw $0xffffff90 + imul $0xffffff90,0x90909090(%eax),%dx + insw (%dx),%es:(%edi) + outsw %ds:(%esi),(%dx) + adcw $0x9090,0x90909090(%eax) + adcw $0xffffff90,0x90909090(%eax) + test %dx,0x90909090(%eax) + xchg %dx,0x90909090(%eax) + mov %dx,0x90909090(%eax) + mov 0x90909090(%eax),%dx + movw %ss,0x90909090(%eax) + lea 0x90909090(%eax),%dx + popw 0x90909090(%eax) + xchg %ax,%cx + xchg %ax,%dx + xchg %ax,%bx + xchg %ax,%sp + xchg %ax,%bp + xchg %ax,%si + xchg %ax,%di + cbtw + cwtd + lcallw $0x9090,$0x9090 + pushfw + popfw + mov 0x90909090,%ax + mov %ax,0x90909090 + movsw %ds:(%esi),%es:(%edi) + cmpsw %es:(%edi),%ds:(%esi) + test $0x9090,%ax + stos %ax,%es:(%edi) + lods %ds:(%esi),%ax + scas %es:(%edi),%ax + mov $0x9090,%ax + mov $0x9090,%cx + mov $0x9090,%dx + mov $0x9090,%bx + mov $0x9090,%sp + mov $0x9090,%bp + mov $0x9090,%si + mov $0x9090,%di + rclw $0x90,0x90909090(%eax) + retw $0x9090 + retw + les 0x90909090(%eax),%dx + lds 0x90909090(%eax),%dx + movw $0x9090,0x90909090(%eax) + enterw $0x9090,$0x90 + leavew + lretw $0x9090 + lretw + iretw + rclw 0x90909090(%eax) + rclw %cl,0x90909090(%eax) + in $0x90,%ax + out %ax,$0x90 + callw .+3+0x9090 + ljmpw $0x9090,$0x9090 + in (%dx),%ax + out %ax,(%dx) + notw 0x90909090(%eax) + callw *0x90909090(%eax) + lar 0x90909090(%eax),%dx + lsl 0x90909090(%eax),%dx + cmovo 0x90909090(%eax),%dx + cmovno 0x90909090(%eax),%dx + cmovb 0x90909090(%eax),%dx + cmovae 0x90909090(%eax),%dx + cmove 0x90909090(%eax),%dx + cmovne 0x90909090(%eax),%dx + cmovbe 0x90909090(%eax),%dx + cmova 0x90909090(%eax),%dx + cmovs 0x90909090(%eax),%dx + cmovns 0x90909090(%eax),%dx + cmovp 0x90909090(%eax),%dx + cmovnp 0x90909090(%eax),%dx + cmovl 0x90909090(%eax),%dx + cmovge 0x90909090(%eax),%dx + cmovle 0x90909090(%eax),%dx + cmovg 0x90909090(%eax),%dx + pushw %fs + popw %fs + bt %dx,0x90909090(%eax) + shld $0x90,%dx,0x90909090(%eax) + shld %cl,%dx,0x90909090(%eax) + pushw %gs + popw %gs + bts %dx,0x90909090(%eax) + shrd $0x90,%dx,0x90909090(%eax) + shrd %cl,%dx,0x90909090(%eax) + imul 0x90909090(%eax),%dx + cmpxchg %dx,0x90909090(%eax) + lss 0x90909090(%eax),%dx + btr %dx,0x90909090(%eax) + lfs 0x90909090(%eax),%dx + lgs 0x90909090(%eax),%dx + movzbw 0x90909090(%eax),%dx + btc %dx,0x90909090(%eax) + bsf 0x90909090(%eax),%dx + bsr 0x90909090(%eax),%dx + movsbw 0x90909090(%eax),%dx + xadd %dx,0x90909090(%eax) diff --git a/gas/testsuite/gas/i386/prefix.d b/gas/testsuite/gas/i386/prefix.d new file mode 100644 index 0000000..054b658 --- /dev/null +++ b/gas/testsuite/gas/i386/prefix.d @@ -0,0 +1,15 @@ +#objdump: -dw +#name: i386 prefix + +.*: +file format .* + +Disassembly of section .text: + +0+000 <foo>: + 0: 9b 67 26 d9 3c [ ]*addr16 fstcw %es:\(%si\) + 5: 9b df e0 [ ]*fstsw %ax + 8: 9b df e0 [ ]*fstsw %ax + b: 9b df e0 [ ]*fstsw %ax + e: 9b 67 df e0 [ ]*addr16 fstsw %ax + 12: f3 67 66 36 a7 [ ]*repz addr16 cmpsw %es:\(%di\),%ss:\(%si\) + ... diff --git a/gas/testsuite/gas/i386/prefix.s b/gas/testsuite/gas/i386/prefix.s new file mode 100644 index 0000000..043d310 --- /dev/null +++ b/gas/testsuite/gas/i386/prefix.s @@ -0,0 +1,11 @@ +.text +foo: + addr16 fstcw %es:(%si) + fstsw + fstsw %ax + fstsw %eax + addr16 fstsw %ax + addr16 rep cmpsw %es:(%di),%ss:(%si) + + # Get a good alignment. + .byte 0 diff --git a/gas/testsuite/gas/i386/reloc.d b/gas/testsuite/gas/i386/reloc.d new file mode 100644 index 0000000..c7903dd --- /dev/null +++ b/gas/testsuite/gas/i386/reloc.d @@ -0,0 +1,15 @@ +#objdump: -drw +#name: i386 reloc + +.*: +file format .*i386.* + +Disassembly of section .text: + +00000000 <foo>: + 0: b3 00 [ ]*mov \$0x0,%bl 1: R_386_8 .text + 2: 68 00 00 00 00 [ ]*push \$0x0 3: R_386_32 .text + 7: 05 00 00 00 00 [ ]*add \$0x0,%eax 8: R_386_32 .text + c: 81 c3 00 00 00 00 [ ]*add \$0x0,%ebx e: R_386_32 .text + 12: 69 d2 00 00 00 00 [ ]*imul \$0x0,%edx,%edx 14: R_386_32 .text + 18: 9a 00 00 00 00 00 00 [ ]*lcall \$0x0,\$0x0 19: R_386_32 .text + 1f: 66 68 00 00 [ ]*pushw \$0x0 21: R_386_16 .text diff --git a/gas/testsuite/gas/i386/reloc.s b/gas/testsuite/gas/i386/reloc.s new file mode 100644 index 0000000..13ee930 --- /dev/null +++ b/gas/testsuite/gas/i386/reloc.s @@ -0,0 +1,8 @@ +.text +foo: mov $foo, %bl + push $foo + add $foo, %eax + add $foo, %ebx + imul $foo, %edx + lcall $0, $foo + pushw $foo diff --git a/gas/testsuite/gas/i386/white.l b/gas/testsuite/gas/i386/white.l new file mode 100644 index 0000000..1ce6161 --- /dev/null +++ b/gas/testsuite/gas/i386/white.l @@ -0,0 +1,21 @@ +GAS LISTING .* + + + 1 # test handling of whitespace, and upper-case + 2 .TeXt + 3 0000 36 ss + 4 0001 8803 mov % al , \( % ebx \) + 5 0003 C705D711 00007B00 0000 mOvl \$ 123 , 4567 + 6 000d 678A787B ADDr16 mov 123 \( % bx , % si , 1 \) , % bh + 7 0011 FFE0 jmp \* % eax + 8 0013 6626FF23 foo: jmpw % es : \* \( % ebx \) + 9 + 10 0017 A0500000 00 mov \( 0x8 \* 0Xa \) , % al + 11 001c B020 mov \$ \( 8 \* 4 \) , % al + 12 001e B713 mov \$ foo , % bH + 13 0020 B713 movb \$ foo , % BH + 14 + 15 .CODE16 + 16 0022 66B81300 0000 Mov \$ foo , %eAx + 17 .Code32 + 18 0028 66B81300 mov \$ foo , %ax diff --git a/gas/testsuite/gas/i386/white.s b/gas/testsuite/gas/i386/white.s new file mode 100644 index 0000000..3bf5070 --- /dev/null +++ b/gas/testsuite/gas/i386/white.s @@ -0,0 +1,18 @@ +# test handling of whitespace, and upper-case +.TeXt + ss + mov % al , ( % ebx ) + mOvl $ 123 , 4567 + ADDr16 mov 123 ( % bx , % si , 1 ) , % bh + jmp * % eax +foo: jmpw % es : * ( % ebx ) + + mov ( 0x8 * 0Xa ) , % al + mov $ ( 8 * 4 ) , % al + mov $ foo , % bH + movb $ foo , % BH + +.CODE16 + Mov $ foo , %eAx +.Code32 + mov $ foo , %ax diff --git a/gas/testsuite/gas/ieee-fp/x930509a.exp b/gas/testsuite/gas/ieee-fp/x930509a.exp new file mode 100644 index 0000000..d788d2c --- /dev/null +++ b/gas/testsuite/gas/ieee-fp/x930509a.exp @@ -0,0 +1,25 @@ +# Reported 93/05/09 by Jim Wilson: IEEE single-precision FLT_MIN value gets +# assembled incorrectly. (Off by one ulp.) + +proc dotest {} { + set testname "IEEE FLT_MIN, single-precision" + set x 0 + gas_start "x930509a.s" "-al" + while 1 { + expect { + -re " 00008000\[ \]+.single" { pass $testname; set x 1 } + -re " 00800000\[ \]+.single" { pass $testname; set x 1 } + -re " 0080 0000\[ \]+.single" { pass $testname; set x 1 } + -re " ........ +.single" { fail $testname; set x 1 } + -re "\[^\n\]*\n" { } + timeout { perror "timeout\n"; break } + eof { break } + } + } + gas_finish + if !$x then { fail "$testname (listing didn't match)" } +} + +if ![istarget vax*-*-*] then { + dotest +} diff --git a/gas/testsuite/gas/ieee-fp/x930509a.s b/gas/testsuite/gas/ieee-fp/x930509a.s new file mode 100644 index 0000000..261b338 --- /dev/null +++ b/gas/testsuite/gas/ieee-fp/x930509a.s @@ -0,0 +1,5 @@ + .global _flt_min + .data + .align 4 +_flt_min: + .single 0r1.17549435e-38 diff --git a/gas/testsuite/gas/m32r/allinsn.d b/gas/testsuite/gas/m32r/allinsn.d new file mode 100644 index 0000000..55965e6 --- /dev/null +++ b/gas/testsuite/gas/m32r/allinsn.d @@ -0,0 +1,374 @@ +#as: +#objdump: -dr +#name: allinsn + +.*: +file format .* + +Disassembly of section .text: + +0+0000 <add>: + 0: 0d ad f0 00 add fp,fp \|\| nop + +0+0004 <add3>: + 4: 8d ad 00 00 add3 fp,fp,[#]*0 + +0+0008 <and>: + 8: 0d cd f0 00 and fp,fp \|\| nop + +0+000c <and3>: + c: 8d cd 00 00 and3 fp,fp,[#]*0x0 + +0+0010 <or>: + 10: 0d ed f0 00 or fp,fp \|\| nop + +0+0014 <or3>: + 14: 8d ed 00 00 or3 fp,fp,[#]*0x0 + +0+0018 <xor>: + 18: 0d dd f0 00 xor fp,fp \|\| nop + +0+001c <xor3>: + 1c: 8d dd 00 00 xor3 fp,fp,[#]*0x0 + +0+0020 <addi>: + 20: 4d 00 f0 00 addi fp,[#]*0 \|\| nop + +0+0024 <addv>: + 24: 0d 8d f0 00 addv fp,fp \|\| nop + +0+0028 <addv3>: + 28: 8d 8d 00 00 addv3 fp,fp,[#]*0 + +0+002c <addx>: + 2c: 0d 9d f0 00 addx fp,fp \|\| nop + +0+0030 <bc8>: + 30: 7c f4 f0 00 bc 0 <add> \|\| nop + +0+0034 <bc8_s>: + 34: 7c f3 f0 00 bc 0 <add> \|\| nop + +0+0038 <bc24>: + 38: 7c f2 f0 00 bc 0 <add> \|\| nop + +0+003c <bc24_l>: + 3c: fc ff ff f1 bc 0 <add> + +0+0040 <beq>: + 40: bd 0d ff f0 beq fp,fp,0 <add> + +0+0044 <beqz>: + 44: b0 8d ff ef beqz fp,0 <add> + +0+0048 <bgez>: + 48: b0 bd ff ee bgez fp,0 <add> + +0+004c <bgtz>: + 4c: b0 dd ff ed bgtz fp,0 <add> + +0+0050 <blez>: + 50: b0 cd ff ec blez fp,0 <add> + +0+0054 <bltz>: + 54: b0 ad ff eb bltz fp,0 <add> + +0+0058 <bnez>: + 58: b0 9d ff ea bnez fp,0 <add> + +0+005c <bl8>: + 5c: 7e e9 f0 00 bl 0 <add> \|\| nop + +0+0060 <bl8_s>: + 60: 7e e8 f0 00 bl 0 <add> \|\| nop + +0+0064 <bl24>: + 64: 7e e7 f0 00 bl 0 <add> \|\| nop + +0+0068 <bl24_l>: + 68: fe ff ff e6 bl 0 <add> + +0+006c <bnc8>: + 6c: 7d e5 f0 00 bnc 0 <add> \|\| nop + +0+0070 <bnc8_s>: + 70: 7d e4 f0 00 bnc 0 <add> \|\| nop + +0+0074 <bnc24>: + 74: 7d e3 f0 00 bnc 0 <add> \|\| nop + +0+0078 <bnc24_l>: + 78: fd ff ff e2 bnc 0 <add> + +0+007c <bne>: + 7c: bd 1d ff e1 bne fp,fp,0 <add> + +0+0080 <bra8>: + 80: 7f e0 f0 00 bra 0 <add> \|\| nop + +0+0084 <bra8_s>: + 84: 7f df f0 00 bra 0 <add> \|\| nop + +0+0088 <bra24>: + 88: 7f de f0 00 bra 0 <add> \|\| nop + +0+008c <bra24_l>: + 8c: ff ff ff dd bra 0 <add> + +0+0090 <cmp>: + 90: 0d 4d f0 00 cmp fp,fp \|\| nop + +0+0094 <cmpi>: + 94: 80 4d 00 00 cmpi fp,[#]*0 + +0+0098 <cmpu>: + 98: 0d 5d f0 00 cmpu fp,fp \|\| nop + +0+009c <cmpui>: + 9c: 80 5d 00 00 cmpui fp,[#]*0 + +0+00a0 <div>: + a0: 9d 0d 00 00 div fp,fp + +0+00a4 <divu>: + a4: 9d 1d 00 00 divu fp,fp + +0+00a8 <rem>: + a8: 9d 2d 00 00 rem fp,fp + +0+00ac <remu>: + ac: 9d 3d 00 00 remu fp,fp + +0+00b0 <jl>: + b0: 1e cd f0 00 jl fp \|\| nop + +0+00b4 <jmp>: + b4: 1f cd f0 00 jmp fp \|\| nop + +0+00b8 <ld>: + b8: 2d cd f0 00 ld fp,@fp \|\| nop + +0+00bc <ld_2>: + bc: 2d cd f0 00 ld fp,@fp \|\| nop + +0+00c0 <ld_d>: + c0: ad cd 00 00 ld fp,@\(0,fp\) + +0+00c4 <ld_d2>: + c4: ad cd 00 00 ld fp,@\(0,fp\) + +0+00c8 <ldb>: + c8: 2d 8d f0 00 ldb fp,@fp \|\| nop + +0+00cc <ldb_2>: + cc: 2d 8d f0 00 ldb fp,@fp \|\| nop + +0+00d0 <ldb_d>: + d0: ad 8d 00 00 ldb fp,@\(0,fp\) + +0+00d4 <ldb_d2>: + d4: ad 8d 00 00 ldb fp,@\(0,fp\) + +0+00d8 <ldh>: + d8: 2d ad f0 00 ldh fp,@fp \|\| nop + +0+00dc <ldh_2>: + dc: 2d ad f0 00 ldh fp,@fp \|\| nop + +0+00e0 <ldh_d>: + e0: ad ad 00 00 ldh fp,@\(0,fp\) + +0+00e4 <ldh_d2>: + e4: ad ad 00 00 ldh fp,@\(0,fp\) + +0+00e8 <ldub>: + e8: 2d 9d f0 00 ldub fp,@fp \|\| nop + +0+00ec <ldub_2>: + ec: 2d 9d f0 00 ldub fp,@fp \|\| nop + +0+00f0 <ldub_d>: + f0: ad 9d 00 00 ldub fp,@\(0,fp\) + +0+00f4 <ldub_d2>: + f4: ad 9d 00 00 ldub fp,@\(0,fp\) + +0+00f8 <lduh>: + f8: 2d bd f0 00 lduh fp,@fp \|\| nop + +0+00fc <lduh_2>: + fc: 2d bd f0 00 lduh fp,@fp \|\| nop + +0+0100 <lduh_d>: + 100: ad bd 00 00 lduh fp,@\(0,fp\) + +0+0104 <lduh_d2>: + 104: ad bd 00 00 lduh fp,@\(0,fp\) + +0+0108 <ld_plus>: + 108: 2d ed f0 00 ld fp,@fp\+ \|\| nop + +0+010c <ld24>: + 10c: ed 00 00 00 ld24 fp,[#]*0 <add> + 10c: R_M32R_24 .data + +0+0110 <ldi8>: + 110: 6d 00 f0 00 ldi fp,[#]*0 \|\| nop + +0+0114 <ldi16>: + 114: 9d f0 01 00 ldi fp,[#]*256 + +0+0118 <lock>: + 118: 2d dd f0 00 lock fp,@fp \|\| nop + +0+011c <machi>: + 11c: 3d 4d f0 00 machi fp,fp \|\| nop + +0+0120 <maclo>: + 120: 3d 5d f0 00 maclo fp,fp \|\| nop + +0+0124 <macwhi>: + 124: 3d 6d f0 00 macwhi fp,fp \|\| nop + +0+0128 <macwlo>: + 128: 3d 7d f0 00 macwlo fp,fp \|\| nop + +0+012c <mul>: + 12c: 1d 6d f0 00 mul fp,fp \|\| nop + +0+0130 <mulhi>: + 130: 3d 0d f0 00 mulhi fp,fp \|\| nop + +0+0134 <mullo>: + 134: 3d 1d f0 00 mullo fp,fp \|\| nop + +0+0138 <mulwhi>: + 138: 3d 2d f0 00 mulwhi fp,fp \|\| nop + +0+013c <mulwlo>: + 13c: 3d 3d f0 00 mulwlo fp,fp \|\| nop + +0+0140 <mv>: + 140: 1d 8d f0 00 mv fp,fp \|\| nop + +0+0144 <mvfachi>: + 144: 5d f0 f0 00 mvfachi fp \|\| nop + +0+0148 <mvfaclo>: + 148: 5d f1 f0 00 mvfaclo fp \|\| nop + +0+014c <mvfacmi>: + 14c: 5d f2 f0 00 mvfacmi fp \|\| nop + +0+0150 <mvfc>: + 150: 1d 90 f0 00 mvfc fp,psw \|\| nop + +0+0154 <mvtachi>: + 154: 5d 70 f0 00 mvtachi fp \|\| nop + +0+0158 <mvtaclo>: + 158: 5d 71 f0 00 mvtaclo fp \|\| nop + +0+015c <mvtc>: + 15c: 10 ad f0 00 mvtc fp,psw \|\| nop + +0+0160 <neg>: + 160: 0d 3d f0 00 neg fp,fp \|\| nop + +0+0164 <nop>: + 164: 70 00 f0 00 nop \|\| nop + +0+0168 <not>: + 168: 0d bd f0 00 not fp,fp \|\| nop + +0+016c <rac>: + 16c: dd c0 00 00 seth fp,[#]*0x0 + +0+0170 <sll>: + 170: 1d 4d f0 00 sll fp,fp \|\| nop + +0+0174 <sll3>: + 174: 9d cd 00 00 sll3 fp,fp,[#]*0 + +0+0178 <slli>: + 178: 5d 40 f0 00 slli fp,[#]*0x0 \|\| nop + +0+017c <sra>: + 17c: 1d 2d f0 00 sra fp,fp \|\| nop + +0+0180 <sra3>: + 180: 9d ad 00 00 sra3 fp,fp,[#]*0 + +0+0184 <srai>: + 184: 5d 20 f0 00 srai fp,[#]*0x0 \|\| nop + +0+0188 <srl>: + 188: 1d 0d f0 00 srl fp,fp \|\| nop + +0+018c <srl3>: + 18c: 9d 8d 00 00 srl3 fp,fp,[#]*0 + +0+0190 <srli>: + 190: 5d 00 f0 00 srli fp,[#]*0x0 \|\| nop + +0+0194 <st>: + 194: 2d 4d f0 00 st fp,@fp \|\| nop + +0+0198 <st_2>: + 198: 2d 4d f0 00 st fp,@fp \|\| nop + +0+019c <st_d>: + 19c: ad 4d 00 00 st fp,@\(0,fp\) + +0+01a0 <st_d2>: + 1a0: ad 4d 00 00 st fp,@\(0,fp\) + +0+01a4 <stb>: + 1a4: 2d 0d f0 00 stb fp,@fp \|\| nop + +0+01a8 <stb_2>: + 1a8: 2d 0d f0 00 stb fp,@fp \|\| nop + +0+01ac <stb_d>: + 1ac: ad 0d 00 00 stb fp,@\(0,fp\) + +0+01b0 <stb_d2>: + 1b0: ad 0d 00 00 stb fp,@\(0,fp\) + +0+01b4 <sth>: + 1b4: 2d 2d f0 00 sth fp,@fp \|\| nop + +0+01b8 <sth_2>: + 1b8: 2d 2d f0 00 sth fp,@fp \|\| nop + +0+01bc <sth_d>: + 1bc: ad 2d 00 00 sth fp,@\(0,fp\) + +0+01c0 <sth_d2>: + 1c0: ad 2d 00 00 sth fp,@\(0,fp\) + +0+01c4 <st_plus>: + 1c4: 2d 6d f0 00 st fp,@\+fp \|\| nop + +0+01c8 <st_minus>: + 1c8: 2d 7d f0 00 st fp,@-fp \|\| nop + +0+01cc <sub>: + 1cc: 0d 2d f0 00 sub fp,fp \|\| nop + +0+01d0 <subv>: + 1d0: 0d 0d f0 00 subv fp,fp \|\| nop + +0+01d4 <subx>: + 1d4: 0d 1d f0 00 subx fp,fp \|\| nop + +0+01d8 <trap>: + 1d8: 10 f0 f0 00 trap [#]*0x0 \|\| nop + +0+01dc <unlock>: + 1dc: 2d 5d f0 00 unlock fp,@fp \|\| nop + +0+01e0 <push>: + 1e0: 2d 7f f0 00 push fp \|\| nop + +0+01e4 <pop>: + 1e4: 2d ef f0 00 pop fp \|\| nop diff --git a/gas/testsuite/gas/m32r/allinsn.exp b/gas/testsuite/gas/m32r/allinsn.exp new file mode 100644 index 0000000..c5ddd0e --- /dev/null +++ b/gas/testsuite/gas/m32r/allinsn.exp @@ -0,0 +1,5 @@ +# M32R assembler testsuite. + +if [istarget m32r*-*-*] { + run_dump_test "allinsn" +} diff --git a/gas/testsuite/gas/m32r/allinsn.s b/gas/testsuite/gas/m32r/allinsn.s new file mode 100644 index 0000000..86b4569 --- /dev/null +++ b/gas/testsuite/gas/m32r/allinsn.s @@ -0,0 +1,501 @@ + .data +foodata: .word 42 + .text +footext: + .text + .global add +add: + add fp,fp + .text + .global add3 +add3: + add3 fp,fp,#0 + .text + .global and +and: + and fp,fp + .text + .global and3 +and3: + and3 fp,fp,#0 + .text + .global or +or: + or fp,fp + .text + .global or3 +or3: + or3 fp,fp,#0 + .text + .global xor +xor: + xor fp,fp + .text + .global xor3 +xor3: + xor3 fp,fp,#0 + .text + .global addi +addi: + addi fp,#0 + .text + .global addv +addv: + addv fp,fp + .text + .global addv3 +addv3: + addv3 fp,fp,#0 + .text + .global addx +addx: + addx fp,fp + .text + .global bc8 +bc8: + bc footext + .text + .global bc8_s +bc8_s: + bc.s footext + .text + .global bc24 +bc24: + bc footext + .text + .global bc24_l +bc24_l: + bc.l footext + .text + .global beq +beq: + beq fp,fp,footext + .text + .global beqz +beqz: + beqz fp,footext + .text + .global bgez +bgez: + bgez fp,footext + .text + .global bgtz +bgtz: + bgtz fp,footext + .text + .global blez +blez: + blez fp,footext + .text + .global bltz +bltz: + bltz fp,footext + .text + .global bnez +bnez: + bnez fp,footext + .text + .global bl8 +bl8: + bl footext + .text + .global bl8_s +bl8_s: + bl.s footext + .text + .global bl24 +bl24: + bl footext + .text + .global bl24_l +bl24_l: + bl.l footext + .text + .global bnc8 +bnc8: + bnc footext + .text + .global bnc8_s +bnc8_s: + bnc.s footext + .text + .global bnc24 +bnc24: + bnc footext + .text + .global bnc24_l +bnc24_l: + bnc.l footext + .text + .global bne +bne: + bne fp,fp,footext + .text + .global bra8 +bra8: + bra footext + .text + .global bra8_s +bra8_s: + bra.s footext + .text + .global bra24 +bra24: + bra footext + .text + .global bra24_l +bra24_l: + bra.l footext + .text + .global cmp +cmp: + cmp fp,fp + .text + .global cmpi +cmpi: + cmpi fp,#0 + .text + .global cmpu +cmpu: + cmpu fp,fp + .text + .global cmpui +cmpui: + cmpui fp,#0 + .text + .global div +div: + div fp,fp + .text + .global divu +divu: + divu fp,fp + .text + .global rem +rem: + rem fp,fp + .text + .global remu +remu: + remu fp,fp + .text + .global jl +jl: + jl fp + .text + .global jmp +jmp: + jmp fp + .text + .global ld +ld: + ld fp,@fp + .text + .global ld_2 +ld_2: + ld fp,@(fp) + .text + .global ld_d +ld_d: + ld fp,@(0,fp) + .text + .global ld_d2 +ld_d2: + ld fp,@(fp,0) + .text + .global ldb +ldb: + ldb fp,@fp + .text + .global ldb_2 +ldb_2: + ldb fp,@(fp) + .text + .global ldb_d +ldb_d: + ldb fp,@(0,fp) + .text + .global ldb_d2 +ldb_d2: + ldb fp,@(fp,0) + .text + .global ldh +ldh: + ldh fp,@fp + .text + .global ldh_2 +ldh_2: + ldh fp,@(fp) + .text + .global ldh_d +ldh_d: + ldh fp,@(0,fp) + .text + .global ldh_d2 +ldh_d2: + ldh fp,@(fp,0) + .text + .global ldub +ldub: + ldub fp,@fp + .text + .global ldub_2 +ldub_2: + ldub fp,@(fp) + .text + .global ldub_d +ldub_d: + ldub fp,@(0,fp) + .text + .global ldub_d2 +ldub_d2: + ldub fp,@(fp,0) + .text + .global lduh +lduh: + lduh fp,@fp + .text + .global lduh_2 +lduh_2: + lduh fp,@(fp) + .text + .global lduh_d +lduh_d: + lduh fp,@(0,fp) + .text + .global lduh_d2 +lduh_d2: + lduh fp,@(fp,0) + .text + .global ld_plus +ld_plus: + ld fp,@fp+ + .text + .global ld24 +ld24: + ld24 fp,foodata + .text + .global ldi8 +ldi8: + ldi fp,0 + .text + .global ldi16 +ldi16: + ldi fp,256 + .text + .global lock +lock: + lock fp,@fp + .text + .global machi +machi: + machi fp,fp + .text + .global maclo +maclo: + maclo fp,fp + .text + .global macwhi +macwhi: + macwhi fp,fp + .text + .global macwlo +macwlo: + macwlo fp,fp + .text + .global mul +mul: + mul fp,fp + .text + .global mulhi +mulhi: + mulhi fp,fp + .text + .global mullo +mullo: + mullo fp,fp + .text + .global mulwhi +mulwhi: + mulwhi fp,fp + .text + .global mulwlo +mulwlo: + mulwlo fp,fp + .text + .global mv +mv: + mv fp,fp + .text + .global mvfachi +mvfachi: + mvfachi fp + .text + .global mvfaclo +mvfaclo: + mvfaclo fp + .text + .global mvfacmi +mvfacmi: + mvfacmi fp + .text + .global mvfc +mvfc: + mvfc fp,psw + .text + .global mvtachi +mvtachi: + mvtachi fp + .text + .global mvtaclo +mvtaclo: + mvtaclo fp + .text + .global mvtc +mvtc: + mvtc fp,psw + .text + .global neg +neg: + neg fp,fp + .text + .global nop +nop: + nop + .text + .global not +not: + not fp,fp + .text + .global rac +rac: + .text + .global rach +rach: + .text + .global rte +rte: + .text + .global seth +seth: + seth fp,0 + .text + .global sll +sll: + sll fp,fp + .text + .global sll3 +sll3: + sll3 fp,fp,0 + .text + .global slli +slli: + slli fp,0 + .text + .global sra +sra: + sra fp,fp + .text + .global sra3 +sra3: + sra3 fp,fp,0 + .text + .global srai +srai: + srai fp,0 + .text + .global srl +srl: + srl fp,fp + .text + .global srl3 +srl3: + srl3 fp,fp,0 + .text + .global srli +srli: + srli fp,0 + .text + .global st +st: + st fp,@fp + .text + .global st_2 +st_2: + st fp,@(fp) + .text + .global st_d +st_d: + st fp,@(0,fp) + .text + .global st_d2 +st_d2: + st fp,@(fp,0) + .text + .global stb +stb: + stb fp,@fp + .text + .global stb_2 +stb_2: + stb fp,@(fp) + .text + .global stb_d +stb_d: + stb fp,@(0,fp) + .text + .global stb_d2 +stb_d2: + stb fp,@(fp,0) + .text + .global sth +sth: + sth fp,@fp + .text + .global sth_2 +sth_2: + sth fp,@(fp) + .text + .global sth_d +sth_d: + sth fp,@(0,fp) + .text + .global sth_d2 +sth_d2: + sth fp,@(fp,0) + .text + .global st_plus +st_plus: + st fp,@+fp + .text + .global st_minus +st_minus: + st fp,@-fp + .text + .global sub +sub: + sub fp,fp + .text + .global subv +subv: + subv fp,fp + .text + .global subx +subx: + subx fp,fp + .text + .global trap +trap: + trap 0 + .text + .global unlock +unlock: + unlock fp,@fp + .text + .global push +push: + push fp + .text + .global pop +pop: + pop fp diff --git a/gas/testsuite/gas/m32r/fslot.d b/gas/testsuite/gas/m32r/fslot.d new file mode 100644 index 0000000..a9cf02b --- /dev/null +++ b/gas/testsuite/gas/m32r/fslot.d @@ -0,0 +1,31 @@ +#as: +#objdump: -dr +#name: fslot + +.*: +file format .* + +Disassembly of section .text: + +0+0 <bl>: + *0: 7e 00 f0 00 bl 0 <bl> \|\| nop + *4: 60 08 f0 00 ldi r0,[#]*8 \|\| nop + +0+8 <bl_s>: + *8: 7e 00 f0 00 bl 8 <bl_s> \|\| nop + *c: 60 08 f0 00 ldi r0,[#]*8 \|\| nop + +0+10 <bra>: + *10: 7f 00 f0 00 bra 10 <bra> \|\| nop + *14: 60 08 f0 00 ldi r0,[#]*8 \|\| nop + +0+18 <bra_s>: + *18: 7f 00 f0 00 bra 18 <bra_s> \|\| nop + *1c: 60 08 f0 00 ldi r0,[#]*8 \|\| nop + +0+20 <jl>: + *20: 1e c0 f0 00 jl r0 \|\| nop + *24: 60 08 f0 00 ldi r0,[#]*8 \|\| nop + +0+28 <trap>: + *28: 10 f4 f0 00 trap [#]*0x4 \|\| nop + *2c: 60 08 f0 00 ldi r0,[#]*8 \|\| nop diff --git a/gas/testsuite/gas/m32r/fslot.s b/gas/testsuite/gas/m32r/fslot.s new file mode 100644 index 0000000..586b664 --- /dev/null +++ b/gas/testsuite/gas/m32r/fslot.s @@ -0,0 +1,27 @@ +# Test the FILL-SLOT attribute. +# The FILL-SLOT attribute ensures the next insn begins on a 32 byte boundary. +# This is needed for example with bl because the subroutine will return +# to a 32 bit boundary. + + .text +bl: + bl bl + ldi r0,#8 +bl_s: + bl.s bl_s + ldi r0,#8 + +bra: + bra bra + ldi r0,#8 +bra_s: + bra.s bra_s + ldi r0,#8 + +jl: + jl r0 + ldi r0,#8 + +trap: + trap #4 + ldi r0,#8 diff --git a/gas/testsuite/gas/m32r/high-1.d b/gas/testsuite/gas/m32r/high-1.d new file mode 100644 index 0000000..b5ccb8c --- /dev/null +++ b/gas/testsuite/gas/m32r/high-1.d @@ -0,0 +1,19 @@ +#as: +#objdump: -dr +#name: high-1 + +.*: +file format .* + +Disassembly of section .text: + +0* <foo>: + *0: d4 c0 00 01 seth r4,[#]*0x1 +[ ]*0: R_M32R_HI16_ULO .text + *4: 84 e4 00 00 or3 r4,r4,[#]*0x0 +[ ]*4: R_M32R_LO16 .text + *8: d4 c0 12 34 seth r4,[#]*0x1234 + *c: 84 e4 87 65 or3 r4,r4,[#]*0x8765 + *10: d4 c0 12 35 seth r4,[#]*0x1235 + *14: 84 e4 87 65 or3 r4,r4,[#]*0x8765 + *18: d4 c0 87 65 seth r4,[#]*0x8765 + *1c: 84 e4 43 21 or3 r4,r4,[#]*0x4321 diff --git a/gas/testsuite/gas/m32r/high-1.s b/gas/testsuite/gas/m32r/high-1.s new file mode 100644 index 0000000..8a5d1d1 --- /dev/null +++ b/gas/testsuite/gas/m32r/high-1.s @@ -0,0 +1,14 @@ +; Test high/shigh handling. + +foo: + seth r4,#high(foo+0x10000) + or3 r4,r4,#low(foo+0x10000) + + seth r4,#high(0x12348765) + or3 r4,r4,#low(0x12348765) + + seth r4,#shigh(0x12348765) + or3 r4,r4,#low(0x12348765) + + seth r4,#shigh(0x87654321) + or3 r4,r4,#low(0x87654321) diff --git a/gas/testsuite/gas/m32r/m32r.exp b/gas/testsuite/gas/m32r/m32r.exp new file mode 100644 index 0000000..28c2364 --- /dev/null +++ b/gas/testsuite/gas/m32r/m32r.exp @@ -0,0 +1,8 @@ +# M32R testcases + +if [istarget m32r*-*-*] { + run_dump_test "high-1" + run_dump_test "relax-1" + run_dump_test "uppercase" + run_dump_test "fslot" +} diff --git a/gas/testsuite/gas/m32r/outofrange.s b/gas/testsuite/gas/m32r/outofrange.s new file mode 100644 index 0000000..570d311 --- /dev/null +++ b/gas/testsuite/gas/m32r/outofrange.s @@ -0,0 +1,145 @@ +; Test error messages where branches are out of range. + +; { dg-do assemble { target m32r-*-* } } + + .text + .global foo +foo: + bl.s label + ; { dg-error "out of range" "out of range bl.s" { target *-*-* } { 8 } } + bnc.s label + ; { dg-error "out of range" "out of range bnc.s" { target *-*-* } { 10 } } + bra.s label + ; { dg-error "out of range" "out of range bra.s" { target *-*-* } { 12 } } + ld24 r0,#0 + ld24 r0,#0 + ld24 r0,#0 + ld24 r0,#0 + ld24 r0,#0 + ld24 r0,#0 + ld24 r0,#0 + ld24 r0,#0 + ld24 r0,#0 + ld24 r0,#0 + ld24 r0,#0 + ld24 r0,#0 + ld24 r0,#0 + ld24 r0,#0 + ld24 r0,#0 + ld24 r0,#0 + ld24 r0,#0 + ld24 r0,#0 + ld24 r0,#0 + ld24 r0,#0 + ld24 r0,#0 + ld24 r0,#0 + ld24 r0,#0 + ld24 r0,#0 + ld24 r0,#0 + ld24 r0,#0 + ld24 r0,#0 + ld24 r0,#0 + ld24 r0,#0 + ld24 r0,#0 + ld24 r0,#0 + ld24 r0,#0 + ld24 r0,#0 + ld24 r0,#0 + ld24 r0,#0 + ld24 r0,#0 + ld24 r0,#0 + ld24 r0,#0 + ld24 r0,#0 + ld24 r0,#0 + ld24 r0,#0 + ld24 r0,#0 + ld24 r0,#0 + ld24 r0,#0 + ld24 r0,#0 + ld24 r0,#0 + ld24 r0,#0 + ld24 r0,#0 + ld24 r0,#0 + ld24 r0,#0 + ld24 r0,#0 + ld24 r0,#0 + ld24 r0,#0 + ld24 r0,#0 + ld24 r0,#0 + ld24 r0,#0 + ld24 r0,#0 + ld24 r0,#0 + ld24 r0,#0 + ld24 r0,#0 + ld24 r0,#0 + ld24 r0,#0 + ld24 r0,#0 + ld24 r0,#0 + ld24 r0,#0 + ld24 r0,#0 + ld24 r0,#0 + ld24 r0,#0 + ld24 r0,#0 + ld24 r0,#0 + ld24 r0,#0 + ld24 r0,#0 + ld24 r0,#0 + ld24 r0,#0 + ld24 r0,#0 + ld24 r0,#0 + ld24 r0,#0 + ld24 r0,#0 + ld24 r0,#0 + ld24 r0,#0 + ld24 r0,#0 + ld24 r0,#0 + ld24 r0,#0 + ld24 r0,#0 + ld24 r0,#0 + ld24 r0,#0 + ld24 r0,#0 + ld24 r0,#0 + ld24 r0,#0 + ld24 r0,#0 + ld24 r0,#0 + ld24 r0,#0 + ld24 r0,#0 + ld24 r0,#0 + ld24 r0,#0 + ld24 r0,#0 + ld24 r0,#0 + ld24 r0,#0 + ld24 r0,#0 + ld24 r0,#0 + ld24 r0,#0 + ld24 r0,#0 + ld24 r0,#0 + ld24 r0,#0 + ld24 r0,#0 + ld24 r0,#0 + ld24 r0,#0 + ld24 r0,#0 + ld24 r0,#0 + ld24 r0,#0 + ld24 r0,#0 + ld24 r0,#0 + ld24 r0,#0 + ld24 r0,#0 + ld24 r0,#0 + ld24 r0,#0 + ld24 r0,#0 + ld24 r0,#0 + ld24 r0,#0 + ld24 r0,#0 + ld24 r0,#0 + ld24 r0,#0 + ld24 r0,#0 + ld24 r0,#0 + ld24 r0,#0 + ld24 r0,#0 + ld24 r0,#0 + ld24 r0,#0 + ld24 r0,#0 + ld24 r0,#0 +label: + jmp r14 diff --git a/gas/testsuite/gas/m32r/relax-1.d b/gas/testsuite/gas/m32r/relax-1.d new file mode 100644 index 0000000..2a4fcb8 --- /dev/null +++ b/gas/testsuite/gas/m32r/relax-1.d @@ -0,0 +1,18 @@ +#as: +#objdump: -dr +#name: relax-1 + +.*: +file format .* + +Disassembly of section .text: + +0* <DoesNotWork>: + *0: 70 00 70 00 * nop -> nop + +0*4 <Work>: + *4: 70 00 70 00 * nop -> nop +Disassembly of section .branch: + +0* <branch>: + *0: ff 00 00 01 bra 4 <Work> +[ ]*0: R_M32R_26_PCREL .text diff --git a/gas/testsuite/gas/m32r/relax-1.s b/gas/testsuite/gas/m32r/relax-1.s new file mode 100644 index 0000000..d4e12c0 --- /dev/null +++ b/gas/testsuite/gas/m32r/relax-1.s @@ -0,0 +1,17 @@ +; Test relaxation into non-zero offset to different segment. + + .section .branch, "ax",@progbits + .balign 4 +branch: + bra Work + + + .section .text + .balign 4 +DoesNotWork: + nop + nop + +Work: + nop + nop diff --git a/gas/testsuite/gas/m32r/uppercase.d b/gas/testsuite/gas/m32r/uppercase.d new file mode 100644 index 0000000..12b1345 --- /dev/null +++ b/gas/testsuite/gas/m32r/uppercase.d @@ -0,0 +1,26 @@ +#as: +#objdump: -dr +#name: uppercase + +.*: +file format .* + +Disassembly of section .text: + +0+0000 <foo>: + 0: 10 81 10 91 * mv r0,r1 -> mvfc r0,cbr + +0+0004 <high>: + 4: d0 c0 00 00 seth r0,#0x0 +[ ]*4: R_M32R_HI16_ULO [.]text + +0+0008 <shigh>: + 8: d0 c0 00 00 seth r0,#0x0 +[ ]*8: R_M32R_HI16_SLO [.]text + +0+000c <low>: + c: 80 e0 00 0c or3 r0,r0,#0xc +[ ]*c: R_M32R_LO16 [.]text + +0+0010 <sda>: + 10: 80 a0 00 00 add3 r0,r0,#0 +[ ]*10: R_M32R_SDA16 sdavar diff --git a/gas/testsuite/gas/m32r/uppercase.s b/gas/testsuite/gas/m32r/uppercase.s new file mode 100644 index 0000000..bdaeafd --- /dev/null +++ b/gas/testsuite/gas/m32r/uppercase.s @@ -0,0 +1,14 @@ + .text + .global foo +foo: + mv R0,R1 + mvfc R0,CBR + +high: + seth r0,#HIGH(high) +shigh: + seth r0,#SHIGH(shigh) +low: + or3 r0,r0,#LOW(low) +sda: + add3 r0,r0,#SDA(sdavar) diff --git a/gas/testsuite/gas/m68k-coff/gas.exp b/gas/testsuite/gas/m68k-coff/gas.exp new file mode 100644 index 0000000..ab7eefa --- /dev/null +++ b/gas/testsuite/gas/m68k-coff/gas.exp @@ -0,0 +1,15 @@ +# +# Some m68k-coff tests +# +if [istarget m68*-*-coff] then { + gas_test "p2430.s" "" $stdoptlist "local branch not in text section" + + gas_test "p2430a.s" "" $stdoptlist "local branch not in text section" + + gas_test "t1.s" "" $stdoptlist "multiple .file directives" + + gas_test "p2389.s" "" $stdoptlist "bss fill" + + setup_xfail m68*-*-coff + gas_test_error "p2389a.s" "" "detect bss fill with non-zero data" +} diff --git a/gas/testsuite/gas/m68k-coff/p2389.s b/gas/testsuite/gas/m68k-coff/p2389.s new file mode 100644 index 0000000..3fa93e9 --- /dev/null +++ b/gas/testsuite/gas/m68k-coff/p2389.s @@ -0,0 +1,19 @@ +# I reached a point where the file looks +# clean and complies with gas syntax, but it core dumps gas. Here's a +# little gdb info: +# +# Program terminated with signal 11, Segmentation fault. +# #0 0x6323c in memcpy () +# (gdb) bt +# #0 0x6323c in memcpy () +# #1 0xf2b0 in fill_section (abfd=0xeaee8, filehdr=0x8a7f4, +# file_cursor=0xf7fff654) at obj-format.c:534 +# #2 0x112a8 in write_object_file () at obj-format.c:1786 +# #3 0x13ef8 in main (argc=5, argv=0xf7fff7bc) at ../../p3/gas/as.c:310 +# (gdb) +# +# gas did manage to create the .o file at this point. + + .bss + +_ASIC_INT_TBL: .space 32,0 | keep interrupt routines here diff --git a/gas/testsuite/gas/m68k-coff/p2389a.s b/gas/testsuite/gas/m68k-coff/p2389a.s new file mode 100644 index 0000000..76b2765 --- /dev/null +++ b/gas/testsuite/gas/m68k-coff/p2389a.s @@ -0,0 +1,3 @@ + .bss + +_ASIC_INT_TBL: .space 32,1 | keep interrupt routines here diff --git a/gas/testsuite/gas/m68k-coff/p2430.s b/gas/testsuite/gas/m68k-coff/p2430.s new file mode 100644 index 0000000..49723d9 --- /dev/null +++ b/gas/testsuite/gas/m68k-coff/p2430.s @@ -0,0 +1,6 @@ +# This differs from p2430a.s (the customer's actual source file) only +# in whitespace and comments. Strangely, this file gave no problems... + + .sect foo +tag: + bra tag diff --git a/gas/testsuite/gas/m68k-coff/p2430a.s b/gas/testsuite/gas/m68k-coff/p2430a.s new file mode 100644 index 0000000..601fb11 --- /dev/null +++ b/gas/testsuite/gas/m68k-coff/p2430a.s @@ -0,0 +1,4 @@ + .sect foo + +tag: + bra tag diff --git a/gas/testsuite/gas/m68k-coff/t1.s b/gas/testsuite/gas/m68k-coff/t1.s new file mode 100644 index 0000000..cc015f2 --- /dev/null +++ b/gas/testsuite/gas/m68k-coff/t1.s @@ -0,0 +1,36 @@ +# 1 "libgcc1.S" +# 42 "libxyz1.S" +# 259 "libgcc1.S" + .text + .proc +|#PROC# 04 + .globl __mulsi3 + __mulsi3 : +|#PROLOGUE# 0 + link %a6 ,#0 + addl #-LF14, %sp + moveml #LS14, %sp @ +|#PROLOGUE# 1 + movew %a6 @(0x8), %d0 + muluw %a6 @(0xe), %d0 + movew %a6 @(0xa), %d1 + muluw %a6 @(0xc), %d1 + addw %d1 , %d0 + lsll #8, %d0 + lsll #8, %d0 + movew %a6 @(0xa), %d1 + muluw %a6 @(0xe), %d1 + addl %d1 , %d0 + jra LE14 +LE14: +|#PROLOGUE# 2 + moveml %sp @, #LS14 + unlk %a6 +|#PROLOGUE# 3 + rts + LF14 = 4 + LS14 = 0x0002 + LFF14 = 0 +# 354 "libgcc1.S" + LSS14 = 0x0 + LV14 = 0 diff --git a/gas/testsuite/gas/m68k/all.exp b/gas/testsuite/gas/m68k/all.exp new file mode 100644 index 0000000..88ab2a0 --- /dev/null +++ b/gas/testsuite/gas/m68k/all.exp @@ -0,0 +1,39 @@ +# +# Some generic m68k tests +# +if [istarget m68*-*-*] then { + gas_test "t2.s" "" "" "cross-section branch" + if [istarget m68*-motorola-sysv] then { + run_dump_test t2 + } + + gas_test "pic1.s" "" "" "PIC generation" + + gas_test "disperr.s" "-m68020" "" "Incorrect Displacement too long error" + + gas_test_error "p2410.s" "" "out-of-range 'bras'" + + run_dump_test pcrel + run_dump_test operands + run_dump_test cas + run_dump_test bitfield + run_dump_test link + run_dump_test fmoveml + + set testname "68000 operands" + gas_run "operands.s" "-m68000" "2>err.out" + if ![string match "child process exited abnormally" $comp_output] then { + send_log "$comp_output\n" + verbose "$comp_output" 3 + fail $testname + } else { + if [regexp_diff "err.out" "$srcdir/$subdir/op68000.d"] then { + fail $testname + } else { + pass $testname + } + } +} +if [info exists errorInfo] then { + unset errorInfo + } diff --git a/gas/testsuite/gas/m68k/bitfield.d b/gas/testsuite/gas/m68k/bitfield.d new file mode 100644 index 0000000..5fb1bdd --- /dev/null +++ b/gas/testsuite/gas/m68k/bitfield.d @@ -0,0 +1,28 @@ +#objdump: -d --prefix-addresses +#name: bitfield + +# Test handling of bitfield instruction operands. + +.*: +file format .* + +Disassembly of section .text: +0+000 <foo> bfexts %a0@,1,2,%d0 +0+004 <foo\+(0x|)4> bfexts %a0@,1,6,%d0 +0+008 <foo\+(0x|)8> bfexts %a0@,3,2,%d0 +0+00c <foo\+(0x|)c> bfexts %a0@,3,6,%d0 +0+010 <foo\+(0x|)10> bfexts %a0@,1,2,%d0 +0+014 <foo\+(0x|)14> bfexts %a0@,1,6,%d0 +0+018 <foo\+(0x|)18> bfexts %a0@,3,2,%d0 +0+01c <foo\+(0x|)1c> bfexts %a0@,3,6,%d0 +0+020 <foo\+(0x|)20> bfset %a0@,1,2 +0+024 <foo\+(0x|)24> bfset %a0@,1,6 +0+028 <foo\+(0x|)28> bfset %a0@,3,2 +0+02c <foo\+(0x|)2c> bfset %a0@,3,6 +0+030 <foo\+(0x|)30> bfset %a0@,1,2 +0+034 <foo\+(0x|)34> bfset %a0@,1,6 +0+038 <foo\+(0x|)38> bfset %a0@,3,2 +0+03c <foo\+(0x|)3c> bfset %a0@,3,6 +0+040 <foo\+(0x|)40> bfexts %a0@,%d1,%d2,%d0 +0+044 <foo\+(0x|)44> bfexts %a0@,%d1,%d2,%d0 +0+048 <foo\+(0x|)48> bfset %a0@,%d1,%d2 +0+04c <foo\+(0x|)4c> bfset %a0@,%d1,%d2 diff --git a/gas/testsuite/gas/m68k/bitfield.s b/gas/testsuite/gas/m68k/bitfield.s new file mode 100644 index 0000000..4d2f758 --- /dev/null +++ b/gas/testsuite/gas/m68k/bitfield.s @@ -0,0 +1,24 @@ +# Test handling of bitfield instruction operands. + .text + .globl foo +foo: + bfexts (%a0){&1:&2},%d0 + bfexts (%a0){&1:&(2+4)},%d0 + bfexts (%a0){&(1+2):&2},%d0 + bfexts (%a0){&(1+2):&(2+4)},%d0 + bfexts %a0@,&1,&2,%d0 + bfexts %a0@,&1,&(2+4),%d0 + bfexts %a0@,&1+2,&2,%d0 + bfexts %a0@,&(1+2),&(2+4),%d0 + bfset (%a0){&1:&2} + bfset (%a0){&1:&(2+4)} + bfset (%a0){&(1+2):&2} + bfset (%a0){&(1+2):&(2+4)} + bfset %a0@,&1,&2 + bfset %a0@,&1,&(2+4) + bfset %a0@,&1+2,&2 + bfset %a0@,&(1+2),&(2+4) + bfexts (%a0){%d1:%d2},%d0 + bfexts %a0@,%d1,%d2,%d0 + bfset (%a0){%d1:%d2} + bfset %a0@,%d1,%d2 diff --git a/gas/testsuite/gas/m68k/cas.d b/gas/testsuite/gas/m68k/cas.d new file mode 100644 index 0000000..6309733 --- /dev/null +++ b/gas/testsuite/gas/m68k/cas.d @@ -0,0 +1,20 @@ +#objdump: -d --prefix-addresses +#name: cas + +# Test parsing of the operands of the cas instruction + +.*: +file format .* + +Disassembly of section .text: +0+000 <foo> casw %d0,%d1,%a0@ +0+004 <foo\+(0x|)4> casw %d0,%d1,%a0@ +0+008 <foo\+(0x|)8> cas2w %d0,%d2,%d3,%d4,%a0@,%a1@ +0+00e <foo\+(0x|)e> cas2w %d0,%d2,%d3,%d4,@\(%d0\),@\(%d1\) +0+014 <foo\+(0x|)14> cas2w %d0,%d2,%d3,%d4,%a0@,%a1@ +0+01a <foo\+(0x|)1a> cas2w %d0,%d2,%d3,%d4,%a0@,%a1@ +0+020 <foo\+(0x|)20> cas2w %d0,%d2,%d3,%d4,@\(%d0\),@\(%d1\) +0+026 <foo\+(0x|)26> cas2w %d0,%d2,%d3,%d4,%a0@,%a1@ +0+02c <foo\+(0x|)2c> cas2w %d0,%d2,%d3,%d4,@\(%d0\),@\(%d1\) +0+032 <foo\+(0x|)32> cas2w %d0,%d2,%d3,%d4,%a0@,%a1@ +0+038 <foo\+(0x|)38> cas2w %d0,%d2,%d3,%d4,%a0@,%a1@ +0+03e <foo\+(0x|)3e> cas2w %d0,%d2,%d3,%d4,@\(%d0\),@\(%d1\) diff --git a/gas/testsuite/gas/m68k/cas.s b/gas/testsuite/gas/m68k/cas.s new file mode 100644 index 0000000..f64e7f5 --- /dev/null +++ b/gas/testsuite/gas/m68k/cas.s @@ -0,0 +1,16 @@ +# Test parsing of the operands of the cas instruction + .text + .globl foo +foo: + cas %d0,%d1,(%a0) + cas %d0,%d1,%a0@ + cas2 %d0:%d2,%d3:%d4,(%a0):(%a1) + cas2 %d0:%d2,%d3:%d4,(%d0):(%d1) + cas2 %d0:%d2,%d3:%d4,%a0@:%a1@ + cas2 %d0:%d2,%d3:%d4,@(%a0):@(%a1) + cas2 %d0:%d2,%d3:%d4,@(%d0):@(%d1) + cas2 %d0,%d2,%d3,%d4,(%a0),(%a1) + cas2 %d0,%d2,%d3,%d4,(%d0),(%d1) + cas2 %d0,%d2,%d3,%d4,%a0@,%a1@ + cas2 %d0,%d2,%d3,%d4,@(%a0),@(%a1) + cas2 %d0,%d2,%d3,%d4,@(%d0),@(%d1) diff --git a/gas/testsuite/gas/m68k/disperr.s b/gas/testsuite/gas/m68k/disperr.s new file mode 100644 index 0000000..fcd3b7b --- /dev/null +++ b/gas/testsuite/gas/m68k/disperr.s @@ -0,0 +1,16 @@ +#NO_APP +gcc2_compiled.: +___gnu_compiled_c: +.text + .even +.globl _foo +_foo: + link %a6,#-12 + fmovex %a6@(-12),%fp0 + fmovex %fp0,%sp@- + jbsr _bar + addqw #8,%sp + addqw #4,%sp +L1: + unlk %a6 + rts diff --git a/gas/testsuite/gas/m68k/fmoveml.d b/gas/testsuite/gas/m68k/fmoveml.d new file mode 100644 index 0000000..e4e2793 --- /dev/null +++ b/gas/testsuite/gas/m68k/fmoveml.d @@ -0,0 +1,60 @@ +#objdump: -d --prefix-addresses +#name: fmoveml + +# Test handling of fmoveml and fmovemx instructions. + +.*: +file format .* + +Disassembly of section .text: +0+000 <foo> fmovel %fpcr,%a0@ +0+004 <foo\+(0x|)4> fmovel %fpsr,%a0@ +0+008 <foo\+(0x|)8> fmovel %fpiar,%a0@ +0+00c <foo\+(0x|)c> fmoveml %fpsr/%fpcr,%a0@ +0+010 <foo\+(0x|)10> fmoveml %fpiar/%fpcr,%a0@ +0+014 <foo\+(0x|)14> fmoveml %fpiar/%fpsr,%a0@ +0+018 <foo\+(0x|)18> fmoveml %fpiar/%fpsr/%fpcr,%a0@ +0+01c <foo\+(0x|)1c> fmovel %fpcr,%d0 +0+020 <foo\+(0x|)20> fmovel %fpsr,%d0 +0+024 <foo\+(0x|)24> fmovel %fpiar,%d0 +0+028 <foo\+(0x|)28> fmovel %fpiar,%a0 +0+02c <foo\+(0x|)2c> fmovel %a0@,%fpcr +0+030 <foo\+(0x|)30> fmovel %a0@,%fpsr +0+034 <foo\+(0x|)34> fmovel %a0@,%fpiar +0+038 <foo\+(0x|)38> fmoveml %a0@,%fpsr/%fpcr +0+03c <foo\+(0x|)3c> fmoveml %a0@,%fpiar/%fpcr +0+040 <foo\+(0x|)40> fmoveml %a0@,%fpiar/%fpsr +0+044 <foo\+(0x|)44> fmoveml %a0@,%fpiar/%fpsr/%fpcr +0+048 <foo\+(0x|)48> fmovel %d0,%fpcr +0+04c <foo\+(0x|)4c> fmovel %d0,%fpsr +0+050 <foo\+(0x|)50> fmovel %d0,%fpiar +0+054 <foo\+(0x|)54> fmovel %a0,%fpiar +0+058 <foo\+(0x|)58> fmovel #1,%fpcr +0+060 <foo\+(0x|)60> fmovel #1,%fpsr +0+068 <foo\+(0x|)68> fmovel #1,%fpiar +0+070 <foo\+(0x|)70> fmoveml #1,%fpsr/%fpcr +0+078 <foo\+(0x|)78> fmoveml #1,%fpiar/%fpcr +0+080 <foo\+(0x|)80> fmoveml #1,%fpiar/%fpsr +0+088 <foo\+(0x|)88> fmoveml #1,%fpiar/%fpsr/%fpcr +0+090 <foo\+(0x|)90> fmovemx %fp1,%a0@ +0+094 <foo\+(0x|)94> fmovemx %fp4,%a0@ +0+098 <foo\+(0x|)98> fmovemx %fp7,%a0@ +0+09c <foo\+(0x|)9c> fmovemx %fp1/%fp3,%a0@ +0+0a0 <foo\+(0x|)a0> fmovemx %fp1-%fp4,%a0@ +0+0a4 <foo\+(0x|)a4> fmovemx %fp0/%fp7,%a0@ +0+0a8 <foo\+(0x|)a8> fmovemx %fp0-%fp7,%a0@ +0+0ac <foo\+(0x|)ac> fmovemx %a0@,%fp0 +0+0b0 <foo\+(0x|)b0> fmovemx %a0@,%fp1 +0+0b4 <foo\+(0x|)b4> fmovemx %a0@,%fp7 +0+0b8 <foo\+(0x|)b8> fmovemx %a0@,%fp0/%fp3 +0+0bc <foo\+(0x|)bc> fmovemx %a0@,%fp0/%fp4 +0+0c0 <foo\+(0x|)c0> fmovemx %a0@,%fp2-%fp4 +0+0c4 <foo\+(0x|)c4> fmovemx %a0@,%fp1-%fp7 +0+0c8 <foo\+(0x|)c8> fmovemx %fp0,%a0@- +0+0cc <foo\+(0x|)cc> fmovemx %fp0-%fp7,%a0@- +0+0d0 <foo\+(0x|)d0> fmovemx %fp0/%fp4,%a0@- +0+0d4 <foo\+(0x|)d4> fmovemx %a0@\+,%fp7 +0+0d8 <foo\+(0x|)d8> fmovemx %a0@\+,%fp0-%fp7 +0+0dc <foo\+(0x|)dc> fmovemx %a0@\+,%fp3/%fp7 +0+0e0 <foo\+(0x|)e0> fmovemx %d0,%a0@- +0+0e4 <foo\+(0x|)e4> fmovemx %a0@\+,%d0 +0+0e8 <foo\+(0x|)e8> fmovemx %fp1/%fp5,%a0@- diff --git a/gas/testsuite/gas/m68k/fmoveml.s b/gas/testsuite/gas/m68k/fmoveml.s new file mode 100644 index 0000000..e74224b --- /dev/null +++ b/gas/testsuite/gas/m68k/fmoveml.s @@ -0,0 +1,58 @@ +# Test handling of the fmoveml and fmovemx instructions. + .text + .globl foo +foo: + fmoveml %fpcr,%a0@ + fmoveml %fpsr,%a0@ + fmoveml %fpiar,%a0@ + fmoveml %fpcr/%fpsr,%a0@ + fmoveml %fpcr/%fpiar,%a0@ + fmoveml %fpsr/%fpiar,%a0@ + fmoveml %fpcr/%fpsr/%fpiar,%a0@ + fmoveml %fpcr,%d0 + fmoveml %fpsr,%d0 + fmoveml %fpiar,%d0 + fmoveml %fpiar,%a0 + fmoveml %a0@,%fpcr + fmoveml %a0@,%fpsr + fmoveml %a0@,%fpiar + fmoveml %a0@,%fpsr/%fpcr + fmoveml %a0@,%fpiar/%fpcr + fmoveml %a0@,%fpiar/%fpsr + fmoveml %a0@,%fpsr/%fpiar/%fpcr + fmoveml %d0,%fpcr + fmoveml %d0,%fpsr + fmoveml %d0,%fpiar + fmoveml %a0,%fpiar + fmoveml &1,%fpcr + fmoveml &1,%fpsr + fmoveml &1,%fpiar + fmoveml &1,%fpcr/%fpsr + fmoveml &1,%fpcr/%fpiar + fmoveml &1,%fpsr/%fpiar + fmoveml &1,%fpiar/%fpsr/%fpcr + + fmovemx %fp1,%a0@ + fmovemx %fp4,%a0@ + fmovemx %fp7,%a0@ + fmovemx %fp1/%fp3,%a0@ + fmovemx %fp1-%fp4,%a0@ + fmovemx %fp0/%fp7,%a0@ + fmovemx %fp0-%fp7,%a0@ + fmovemx %a0@,%fp0 + fmovemx %a0@,%fp1 + fmovemx %a0@,%fp7 + fmovemx %a0@,%fp0/%fp3 + fmovemx %a0@,%fp0/%fp4 + fmovemx %a0@,%fp2-%fp4 + fmovemx %a0@,%fp1-%fp7 + fmovemx &1,%a0@- + fmovemx &0xff,%a0@- + fmovemx &0x11,%a0@- + fmovemx %a0@+,&1 + fmovemx %a0@+,&0xff + fmovemx %a0@+,&0x11 + fmovemx %d0,%a0@- + fmovemx %a0@+,%d0 + fmovemx &sym,%a0@- + sym = 0x22 diff --git a/gas/testsuite/gas/m68k/link.d b/gas/testsuite/gas/m68k/link.d new file mode 100644 index 0000000..005263f --- /dev/null +++ b/gas/testsuite/gas/m68k/link.d @@ -0,0 +1,17 @@ +#objdump: -d --prefix-addresses +#name: link + +# Test handling of link instruction. + +.*: +file format .* + +Disassembly of section .text: +0+000 <foo> linkw %fp,#0 +0+004 <foo\+(0x|)4> linkw %fp,#-4 +0+008 <foo\+(0x|)8> linkw %fp,#-32767 +0+00c <foo\+(0x|)c> linkw %fp,#-32768 +0+010 <foo\+(0x|)10> linkl %fp,#-32769 +0+016 <foo\+(0x|)16> linkw %fp,#32767 +0+01a <foo\+(0x|)1a> linkl %fp,#32768 +0+020 <foo\+(0x|)20> linkl %fp,#32769 +0+026 <foo\+(0x|)26> nop diff --git a/gas/testsuite/gas/m68k/link.s b/gas/testsuite/gas/m68k/link.s new file mode 100644 index 0000000..1a321dd --- /dev/null +++ b/gas/testsuite/gas/m68k/link.s @@ -0,0 +1,13 @@ +# Test handling of link instruction. + .text + .globl foo +foo: + link %a6,&0 + link %a6,&-4 + link %a6,&-0x7fff + link %a6,&-0x8000 + link %a6,&-0x8001 + link %a6,&0x7fff + link %a6,&0x8000 + link %a6,&0x8001 + nop diff --git a/gas/testsuite/gas/m68k/op68000.d b/gas/testsuite/gas/m68k/op68000.d new file mode 100644 index 0000000..568d5a3 --- /dev/null +++ b/gas/testsuite/gas/m68k/op68000.d @@ -0,0 +1,195 @@ +# This should match the stderr output of gas -m68000 on operands.s. +# We don't bother to match the exact error message, but instead just +# look for the statements which should fail. + +.*operands.s: Assembler messages: +.*statement `tstl %a0' ignored +.*statement `tstl %a0@\(8,%d0:w:2\)' ignored +.*statement `tstl %a0@\(8,%d0:w:4\)' ignored +.*statement `tstl %a0@\(8,%d0:w:8\)' ignored +.*statement `tstl %a0@\(8,%d0:l:2\)' ignored +.*statement `tstl %a0@\(8,%d0:l:4\)' ignored +.*statement `tstl %a0@\(8,%d0:l:8\)' ignored +.*statement `tstl %a0@\(%d0:w:2\)' ignored +.*statement `tstl \(8,%a0,%d0\*2\)' ignored +.*statement `tstl \(8,%a0,%d0\*4\)' ignored +.*statement `tstl \(8,%a0,%d0\*8\)' ignored +.*statement `tstl \(8,%a0,%d0.w\*2\)' ignored +.*statement `tstl \(8,%a0,%d0.w\*4\)' ignored +.*statement `tstl \(8,%a0,%d0.w\*8\)' ignored +.*statement `tstl \(8,%a0,%d0.l\*2\)' ignored +.*statement `tstl \(8,%a0,%d0.l\*4\)' ignored +.*statement `tstl \(8,%a0,%d0.l\*8\)' ignored +.*statement `tstl \(8,%a1.w\*2,%a0\)' ignored +.*statement `tstl 8\(%a0,%d0.w\*2\)' ignored +.*statement `tstl 8\(%d0.w\*2,%a0\)' ignored +.*statement `tstl 8\(%a1.w\*2,%a0\)' ignored +.*statement `tstl \(%a0,%d0.w\*2\)' ignored +.*statement `tstl \(%d0.w\*2,%a0\)' ignored +.*statement `tstl %a0@\(1000,%d0:w:2\)' ignored +.*statement `tstl @\(1000,%d0:w:2\)' ignored +.*statement `tstl @\(%d0:w:2\)' ignored +.*statement `tstl @\(1000\)' ignored +.*statement `tstl %a0@\(100000\)' ignored +.*statement `tstl \(1000,%a0,%d0.w\*2\)' ignored +.*statement `tstl \(1000,%d0,%a0\)' ignored +.*statement `tstl \(1000,%a1.w\*2,%a0\)' ignored +.*statement `tstl 1000\(%a0,%d0.w\*2\)' ignored +.*statement `tstl 1000\(%d0,%a0\)' ignored +.*statement `tstl \(1000,%d0.w\*2\)' ignored +.*statement `tstl 1000\(%d0.w\*2\)' ignored +.*statement `tstl \(%d0.w\*2\)' ignored +.*statement `tstl \(100000,%a0\)' ignored +.*statement `tstl 100000\(%a0\)' ignored +.*statement `tstl %za1@\(1000,%d0:w:2\)' ignored +.*statement `tstl %za1@\(100000\)' ignored +.*statement `tstl \(1000,%za1,%d0.w\*2\)' ignored +.*statement `tstl \(1000,%d0,%za1\)' ignored +.*statement `tstl \(1000,%a1.w\*2,%za1\)' ignored +.*statement `tstl 1000\(%za1,%d0.w\*2\)' ignored +.*statement `tstl 1000\(%d0,%za1\)' ignored +.*statement `tstl \(100000,%za1\)' ignored +.*statement `tstl 100000\(%za1\)' ignored +.*statement `tstl %a0@\(1000,%zd1:w:2\)' ignored +.*statement `tstl @\(1000,%zd1:w:2\)' ignored +.*statement `tstl @\(%zd1:w:2\)' ignored +.*statement `tstl \(1000,%a0,%zd1.w\*2\)' ignored +.*statement `tstl \(1000,%zd1,%a0\)' ignored +.*statement `tstl \(1000,%za1.w\*2,%a0\)' ignored +.*statement `tstl 1000\(%a0,%zd1.w\*2\)' ignored +.*statement `tstl 1000\(%zd1,%a0\)' ignored +.*statement `tstl \(1000,%zd1.w\*2\)' ignored +.*statement `tstl 1000\(%zd1.w\*2\)' ignored +.*statement `tstl \(%zd1.w\*2\)' ignored +.*statement `tstl %a0@\(1000\)@\(2000,%d0:w:2\)' ignored +.*statement `tstl %a0@\(1000\)@\(%d0:w:2\)' ignored +.*statement `tstl %a0@\(1000\)@\(2000\)' ignored +.*statement `tstl @\(1000\)@\(2000,%d0:w:2\)' ignored +.*statement `tstl @\(1000\)@\(%d0:w:2\)' ignored +.*statement `tstl @\(1000\)@\(2000\)' ignored +.*statement `tstl %a0@\(0\)@\(2000,%d0:w:2\)' ignored +.*statement `tstl %a0@\(0\)@\(%d0:w:2\)' ignored +.*statement `tstl %a0@\(0\)@\(2000\)' ignored +.*statement `tstl @\(0\)@\(2000,%d0:w:2\)' ignored +.*statement `tstl @\(0\)@\(%d0:w:2\)' ignored +.*statement `tstl @\(0\)@\(2000\)' ignored +.*statement `tstl \(\[1000,%a0\],%d0:w:2,2000\)' ignored +.*statement `tstl \(\[1000,%a0\],%d0:w:2\)' ignored +.*statement `tstl \(\[1000,%a0\],2000\)' ignored +.*statement `tstl \(\[1000\],%d0:w:2,2000\)' ignored +.*statement `tstl \(\[1000\],%d0:w:2\)' ignored +.*statement `tstl \(\[1000\],2000\)' ignored +.*statement `tstl \(\[%a0\],%d0:w:2,2000\)' ignored +.*statement `tstl \(\[%a0\],%d0:w:2\)' ignored +.*statement `tstl \(\[%a0\],2000\)' ignored +.*statement `tstl \(\[0\],%d0:w:2,2000\)' ignored +.*statement `tstl \(\[0\],%d0:w:2\)' ignored +.*statement `tstl \(\[0\],2000\)' ignored +.*statement `tstl %a0@\(1000,%d0:w:2\)@\(2000\)' ignored +.*statement `tstl %a0@\(1000,%d0:w:2\)@\(0\)' ignored +.*statement `tstl @\(1000,%d0:w:2\)@\(2000\)' ignored +.*statement `tstl @\(1000,%d0:w:2\)@\(0\)' ignored +.*statement `tstl %a0@\(%d0:w:2\)@\(2000\)' ignored +.*statement `tstl %a0@\(%d0:w:2\)@\(0\)' ignored +.*statement `tstl @\(%d0:w:2\)@\(2000\)' ignored +.*statement `tstl @\(%d0:w:2\)@\(0\)' ignored +.*statement `tstl \(\[1000,%a0,%d0:w:2\],2000\)' ignored +.*statement `tstl \(\[1000,%d0:w:2,%a0\],2000\)' ignored +.*statement `tstl \(\[1000,%d0,%a0\],2000\)' ignored +.*statement `tstl \(\[1000,%a1,%a0\],2000\)' ignored +.*statement `tstl \(\[1000,%a1:w:2,%a0\],2000\)' ignored +.*statement `tstl \(\[1000,%a0,%d0:w:2\]\)' ignored +.*statement `tstl \(\[1000,%d0,%a0\]\)' ignored +.*statement `tstl \(\[1000,%d0:w:2\],2000\)' ignored +.*statement `tstl \(\[1000,%d0:w:2\]\)' ignored +.*statement `tstl \(\[%a0,%d0:w:2\],2000\)' ignored +.*statement `tstl \(\[%d0,%a0\],2000\)' ignored +.*statement `tstl \(\[%a0,%d0:w:2\]\)' ignored +.*statement `tstl \(\[%d0,%a0\]\)' ignored +.*statement `tstl \(\[%d0:w:2\],2000\)' ignored +.*statement `tstl \(\[%d0:w:2\]\)' ignored +.*statement `pea %pc@\(8,%d0:w:2\)' ignored +.*statement `pea %pc@\(%d0:w:2\)' ignored +.*statement `pea \(8,%pc,%d0.w\*2\)' ignored +.*statement `pea 8\(%pc,%d0.w\*2\)' ignored +.*statement `pea \(%pc,%d0.w\*2\)' ignored +.*statement `pea %pc@\(1000,%d0:w:2\)' ignored +.*statement `pea %pc@\(100000\)' ignored +.*statement `pea \(1000,%pc,%d0.w\*2\)' ignored +.*statement `pea \(1000,%d0,%pc\)' ignored +.*statement `pea \(1000,%a1.w\*2,%pc\)' ignored +.*statement `pea \(1000,%a1,%pc\)' ignored +.*statement `pea 1000\(%pc,%d0.w\*2\)' ignored +.*statement `pea 1000\(%d0,%pc\)' ignored +.*statement `pea 1000\(%a1,%pc\)' ignored +.*statement `pea \(100000,%pc\)' ignored +.*statement `pea 100000\(%pc\)' ignored +.*statement `pea %zpc@\(1000,%d0:w:2\)' ignored +.*statement `pea %zpc@\(100000\)' ignored +.*statement `pea \(1000,%zpc,%d0.w\*2\)' ignored +.*statement `pea \(1000,%d0,%zpc\)' ignored +.*statement `pea \(1000,%a1.w\*2,%zpc\)' ignored +.*statement `pea \(1000,%a1,%zpc\)' ignored +.*statement `pea 1000\(%zpc,%d0.w\*2\)' ignored +.*statement `pea 1000\(%d0,%zpc\)' ignored +.*statement `pea 1000\(%a1,%zpc\)' ignored +.*statement `pea \(100000,%zpc\)' ignored +.*statement `pea 100000\(%zpc\)' ignored +.*statement `pea %pc@\(1000\)@\(2000,%d0:w:2\)' ignored +.*statement `pea %pc@\(1000\)@\(%d0:w:2\)' ignored +.*statement `pea %pc@\(1000\)@\(2000\)' ignored +.*statement `pea %pc@\(0\)@\(2000,%d0:w:2\)' ignored +.*statement `pea %pc@\(0\)@\(%d0:w:2\)' ignored +.*statement `pea %pc@\(0\)@\(2000\)' ignored +.*statement `pea \(\[1000,%pc\],%d0:w:2,2000\)' ignored +.*statement `pea \(\[1000,%pc\],%d0:w:2\)' ignored +.*statement `pea \(\[1000,%pc\],2000\)' ignored +.*statement `pea \(\[%pc\],%d0:w:2,2000\)' ignored +.*statement `pea \(\[%pc\],%d0:w:2\)' ignored +.*statement `pea \(\[%pc\],2000\)' ignored +.*statement `pea %zpc@\(1000\)@\(2000,%d0:w:2\)' ignored +.*statement `pea %zpc@\(1000\)@\(%d0:w:2\)' ignored +.*statement `pea %zpc@\(1000\)@\(2000\)' ignored +.*statement `pea %zpc@\(0\)@\(2000,%d0:w:2\)' ignored +.*statement `pea %zpc@\(0\)@\(%d0:w:2\)' ignored +.*statement `pea %zpc@\(0\)@\(2000\)' ignored +.*statement `pea \(\[1000,%zpc\],%d0:w:2,2000\)' ignored +.*statement `pea \(\[1000,%zpc\],%d0:w:2\)' ignored +.*statement `pea \(\[1000,%zpc\],2000\)' ignored +.*statement `pea \(\[%zpc\],%d0:w:2,2000\)' ignored +.*statement `pea \(\[%zpc\],%d0:w:2\)' ignored +.*statement `pea \(\[%zpc\],2000\)' ignored +.*statement `pea %pc@\(1000,%d0:w:2\)@\(2000\)' ignored +.*statement `pea %pc@\(1000,%d0:w:2\)@\(0\)' ignored +.*statement `pea %pc@\(%d0:w:2\)@\(2000\)' ignored +.*statement `pea %pc@\(%d0:w:2\)@\(0\)' ignored +.*statement `pea \(\[1000,%pc,%d0:w:2\],2000\)' ignored +.*statement `pea \(\[1000,%d0:w:2,%pc\],2000\)' ignored +.*statement `pea \(\[1000,%d0,%pc\],2000\)' ignored +.*statement `pea \(\[1000,%a1,%pc\],2000\)' ignored +.*statement `pea \(\[1000,%pc,%a1\],2000\)' ignored +.*statement `pea \(\[1000,%a1:w:2,%pc\],2000\)' ignored +.*statement `pea \(\[1000,%pc,%d0:w:2\]\)' ignored +.*statement `pea \(\[1000,%d0,%pc\]\)' ignored +.*statement `pea \(\[1000,%a1,%pc\]\)' ignored +.*statement `pea \(\[%pc,%d0:w:2\],2000\)' ignored +.*statement `pea \(\[%pc,%a0\],2000\)' ignored +.*statement `pea \(\[%pc,%d0:w:2\]\)' ignored +.*statement `pea \(\[%d0,%pc\]\)' ignored +.*statement `pea %zpc@\(1000,%d0:w:2\)@\(2000\)' ignored +.*statement `pea %zpc@\(1000,%d0:w:2\)@\(0\)' ignored +.*statement `pea %zpc@\(%d0:w:2\)@\(2000\)' ignored +.*statement `pea %zpc@\(%d0:w:2\)@\(0\)' ignored +.*statement `pea \(\[1000,%zpc,%d0:w:2\],2000\)' ignored +.*statement `pea \(\[1000,%d0:w:2,%zpc\],2000\)' ignored +.*statement `pea \(\[1000,%d0,%zpc\],2000\)' ignored +.*statement `pea \(\[1000,%a1,%zpc\],2000\)' ignored +.*statement `pea \(\[1000,%zpc,%a1\],2000\)' ignored +.*statement `pea \(\[1000,%a1:w:2,%zpc\],2000\)' ignored +.*statement `pea \(\[1000,%zpc,%d0:w:2\]\)' ignored +.*statement `pea \(\[1000,%d0,%zpc\]\)' ignored +.*statement `pea \(\[1000,%a1,%zpc\]\)' ignored +.*statement `pea \(\[%zpc,%d0:w:2\],2000\)' ignored +.*statement `pea \(\[%zpc,%a0\],2000\)' ignored +.*statement `pea \(\[%zpc,%d0:w:2\]\)' ignored +.*statement `pea \(\[%d0,%zpc\]\)' ignored diff --git a/gas/testsuite/gas/m68k/operands.d b/gas/testsuite/gas/m68k/operands.d new file mode 100644 index 0000000..5b383c3 --- /dev/null +++ b/gas/testsuite/gas/m68k/operands.d @@ -0,0 +1,242 @@ +#objdump: -d --prefix-addresses +#name: operands + +# Test handling of MIT and Motorola syntax operands +# If you change this file, see also op68000.d. + +.*: +file format .* + +Disassembly of section .text: +0+000 <foo> tstl %d0 +0+002 <foo\+(0x|)2> tstl %a0 +0+004 <foo\+(0x|)4> tstl %a0@ +0+006 <foo\+(0x|)6> tstl %a0@ +0+008 <foo\+(0x|)8> tstl %a0@\+ +0+00a <foo\+(0x|)a> tstl %a0@\+ +0+00c <foo\+(0x|)c> tstl %a0@- +0+00e <foo\+(0x|)e> tstl %a0@- +0+010 <foo\+(0x|)10> tstl %a0@\(8\) +0+014 <foo\+(0x|)14> tstl %a0@\(8\) +0+018 <foo\+(0x|)18> tstl %a0@\(8\) +0+01c <foo\+(0x|)1c> tstl %a0@\(0+008,%d0:l\) +0+020 <foo\+(0x|)20> tstl %a0@\(0+008,%d0:w\) +0+024 <foo\+(0x|)24> tstl %a0@\(0+008,%d0:w\) +0+028 <foo\+(0x|)28> tstl %a0@\(0+008,%d0:w:2\) +0+02c <foo\+(0x|)2c> tstl %a0@\(0+008,%d0:w:4\) +0+030 <foo\+(0x|)30> tstl %a0@\(0+008,%d0:w:8\) +0+034 <foo\+(0x|)34> tstl %a0@\(0+008,%d0:l\) +0+038 <foo\+(0x|)38> tstl %a0@\(0+008,%d0:l\) +0+03c <foo\+(0x|)3c> tstl %a0@\(0+008,%d0:l:2\) +0+040 <foo\+(0x|)40> tstl %a0@\(0+008,%d0:l:4\) +0+044 <foo\+(0x|)44> tstl %a0@\(0+008,%d0:l:8\) +0+048 <foo\+(0x|)48> tstl %a0@\(0+000,%d0:w:2\) +0+04c <foo\+(0x|)4c> tstl %a0@\(0+008,%d0:l\) +0+050 <foo\+(0x|)50> tstl %a0@\(0+008,%d0:l\) +0+054 <foo\+(0x|)54> tstl %a0@\(0+008,%d0:l:2\) +0+058 <foo\+(0x|)58> tstl %a0@\(0+008,%d0:l:4\) +0+05c <foo\+(0x|)5c> tstl %a0@\(0+008,%d0:l:8\) +0+060 <foo\+(0x|)60> tstl %a0@\(0+008,%d0:w\) +0+064 <foo\+(0x|)64> tstl %a0@\(0+008,%d0:w\) +0+068 <foo\+(0x|)68> tstl %a0@\(0+008,%d0:w:2\) +0+06c <foo\+(0x|)6c> tstl %a0@\(0+008,%d0:w:4\) +0+070 <foo\+(0x|)70> tstl %a0@\(0+008,%d0:w:8\) +0+074 <foo\+(0x|)74> tstl %a0@\(0+008,%d0:l\) +0+078 <foo\+(0x|)78> tstl %a0@\(0+008,%d0:l\) +0+07c <foo\+(0x|)7c> tstl %a0@\(0+008,%d0:l:2\) +0+080 <foo\+(0x|)80> tstl %a0@\(0+008,%d0:l:4\) +0+084 <foo\+(0x|)84> tstl %a0@\(0+008,%d0:l:8\) +0+088 <foo\+(0x|)88> tstl %a0@\(0+008,%d0:l\) +0+08c <foo\+(0x|)8c> tstl %a0@\(0+008,%a1:w:2\) +0+090 <foo\+(0x|)90> tstl %a1@\(0+008,%a0:l\) +0+094 <foo\+(0x|)94> tstl %a0@\(0+008,%d0:w:2\) +0+098 <foo\+(0x|)98> tstl %a0@\(0+008,%d0:w:2\) +0+09c <foo\+(0x|)9c> tstl %a0@\(0+008,%a1:w:2\) +0+0a0 <foo\+(0x|)a0> tstl %a0@\(0+000,%d0:w:2\) +0+0a4 <foo\+(0x|)a4> tstl %a0@\(0+000,%d0:w:2\) +0+0a8 <foo\+(0x|)a8> tstl %a0@\(0+3e8,%d0:w:2\) +0+0ae <foo\+(0x|)ae> tstl @\(0+3e8,%d0:w:2\) +0+0b4 <foo\+(0x|)b4> tstl @\(0+000,%d0:w:2\) +0+0b8 <foo\+(0x|)b8> tstl @\(0+3e8\) +0+0be <foo\+(0x|)be> tstl %a0@\(0+186a0\) +0+0c6 <foo\+(0x|)c6> tstl %a0@\(0+3e8,%d0:w:2\) +0+0cc <foo\+(0x|)cc> tstl %a0@\(0+3e8,%d0:l\) +0+0d2 <foo\+(0x|)d2> tstl %a0@\(0+3e8,%a1:w:2\) +0+0d8 <foo\+(0x|)d8> tstl %a0@\(0+3e8,%d0:w:2\) +0+0de <foo\+(0x|)de> tstl %a0@\(0+3e8,%d0:l\) +0+0e4 <foo\+(0x|)e4> tstl @\(0+3e8,%d0:w:2\) +0+0ea <foo\+(0x|)ea> tstl @\(0+3e8,%d0:w:2\) +0+0f0 <foo\+(0x|)f0> tstl @\(0+000,%d0:w:2\) +0+0f4 <foo\+(0x|)f4> tstl %a0@\(0+186a0\) +0+0fc <foo\+(0x|)fc> tstl %a0@\(0+186a0\) +0+104 <foo\+(0x|)104> tstl @\(0+3e8,%d0:w:2\) +0+10a <foo\+(0x|)10a> tstl @\(0+186a0\) +0+112 <foo\+(0x|)112> tstl @\(0+3e8,%d0:w:2\) +0+118 <foo\+(0x|)118> tstl @\(0+3e8,%d0:l\) +0+11e <foo\+(0x|)11e> tstl @\(0+3e8,%a1:w:2\) +0+124 <foo\+(0x|)124> tstl @\(0+3e8,%d0:w:2\) +0+12a <foo\+(0x|)12a> tstl @\(0+3e8,%d0:l\) +0+130 <foo\+(0x|)130> tstl @\(0+186a0\) +0+138 <foo\+(0x|)138> tstl @\(0+186a0\) +0+140 <foo\+(0x|)140> tstl %a0@\(0+3e8\) +0+146 <foo\+(0x|)146> tstl @\(0+3e8\) +0+14c <foo\+(0x|)14c> tstl @\(0+000\) +0+150 <foo\+(0x|)150> tstl %a0@\(0+3e8\) +0+156 <foo\+(0x|)156> tstl %a0@\(0+3e8\) +0+15c <foo\+(0x|)15c> tstl %a0@\(0+3e8\) +0+162 <foo\+(0x|)162> tstl %a0@\(0+3e8\) +0+168 <foo\+(0x|)168> tstl %a0@\(0+3e8\) +0+16e <foo\+(0x|)16e> tstl @\(0+3e8\) +0+174 <foo\+(0x|)174> tstl @\(0+3e8\) +0+17a <foo\+(0x|)17a> tstl @\(0+000\) +0+17e <foo\+(0x|)17e> tstl %a0@\(0+3e8\)@\(0+7d0,%d0:w:2\) +0+186 <foo\+(0x|)186> tstl %a0@\(0+3e8\)@\(0+000,%d0:w:2\) +0+18c <foo\+(0x|)18c> tstl %a0@\(0+3e8\)@\(0+7d0\) +0+194 <foo\+(0x|)194> tstl @\(0+3e8\)@\(0+7d0,%d0:w:2\) +0+19c <foo\+(0x|)19c> tstl @\(0+3e8\)@\(0+000,%d0:w:2\) +0+1a2 <foo\+(0x|)1a2> tstl @\(0+3e8\)@\(0+7d0\) +0+1aa <foo\+(0x|)1aa> tstl %a0@\(0+000\)@\(0+7d0,%d0:w:2\) +0+1b0 <foo\+(0x|)1b0> tstl %a0@\(0+000\)@\(0+000,%d0:w:2\) +0+1b4 <foo\+(0x|)1b4> tstl %a0@\(0+000\)@\(0+7d0\) +0+1ba <foo\+(0x|)1ba> tstl @\(0+000\)@\(0+7d0,%d0:w:2\) +0+1c0 <foo\+(0x|)1c0> tstl @\(0+000\)@\(0+000,%d0:w:2\) +0+1c4 <foo\+(0x|)1c4> tstl @\(0+000\)@\(0+7d0\) +0+1ca <foo\+(0x|)1ca> tstl %a0@\(0+3e8\)@\(0+7d0,%d0:w:2\) +0+1d2 <foo\+(0x|)1d2> tstl %a0@\(0+3e8\)@\(0+000,%d0:w:2\) +0+1d8 <foo\+(0x|)1d8> tstl %a0@\(0+3e8\)@\(0+7d0\) +0+1e0 <foo\+(0x|)1e0> tstl @\(0+3e8\)@\(0+7d0,%d0:w:2\) +0+1e8 <foo\+(0x|)1e8> tstl @\(0+3e8\)@\(0+000,%d0:w:2\) +0+1ee <foo\+(0x|)1ee> tstl @\(0+3e8\)@\(0+7d0\) +0+1f6 <foo\+(0x|)1f6> tstl %a0@\(0+000\)@\(0+7d0,%d0:w:2\) +0+1fc <foo\+(0x|)1fc> tstl %a0@\(0+000\)@\(0+000,%d0:w:2\) +0+200 <foo\+(0x|)200> tstl %a0@\(0+000\)@\(0+7d0\) +0+206 <foo\+(0x|)206> tstl @\(0+000\)@\(0+7d0,%d0:w:2\) +0+20c <foo\+(0x|)20c> tstl @\(0+000\)@\(0+000,%d0:w:2\) +0+210 <foo\+(0x|)210> tstl @\(0+000\)@\(0+7d0\) +0+216 <foo\+(0x|)216> tstl %a0@\(0+3e8,%d0:w:2\)@\(0+7d0\) +0+21e <foo\+(0x|)21e> tstl %a0@\(0+3e8,%d0:w:2\)@\(0+000\) +0+224 <foo\+(0x|)224> tstl @\(0+3e8,%d0:w:2\)@\(0+7d0\) +0+22c <foo\+(0x|)22c> tstl @\(0+3e8,%d0:w:2\)@\(0+000\) +0+232 <foo\+(0x|)232> tstl %a0@\(0+000,%d0:w:2\)@\(0+7d0\) +0+238 <foo\+(0x|)238> tstl %a0@\(0+000,%d0:w:2\)@\(0+000\) +0+23c <foo\+(0x|)23c> tstl @\(0+000,%d0:w:2\)@\(0+7d0\) +0+242 <foo\+(0x|)242> tstl @\(0+000,%d0:w:2\)@\(0+000\) +0+246 <foo\+(0x|)246> tstl %a0@\(0+3e8,%d0:w:2\)@\(0+7d0\) +0+24e <foo\+(0x|)24e> tstl %a0@\(0+3e8,%d0:w:2\)@\(0+7d0\) +0+256 <foo\+(0x|)256> tstl %a0@\(0+3e8,%d0:l\)@\(0+7d0\) +0+25e <foo\+(0x|)25e> tstl %a1@\(0+3e8,%a0:l\)@\(0+7d0\) +0+266 <foo\+(0x|)266> tstl %a0@\(0+3e8,%a1:w:2\)@\(0+7d0\) +0+26e <foo\+(0x|)26e> tstl %a0@\(0+3e8,%d0:w:2\)@\(0+000\) +0+274 <foo\+(0x|)274> tstl %a0@\(0+3e8,%d0:l\)@\(0+000\) +0+27a <foo\+(0x|)27a> tstl @\(0+3e8,%d0:w:2\)@\(0+7d0\) +0+282 <foo\+(0x|)282> tstl @\(0+3e8,%d0:w:2\)@\(0+000\) +0+288 <foo\+(0x|)288> tstl %a0@\(0+000,%d0:w:2\)@\(0+7d0\) +0+28e <foo\+(0x|)28e> tstl %a0@\(0+000,%d0:l\)@\(0+7d0\) +0+294 <foo\+(0x|)294> tstl %a0@\(0+000,%d0:w:2\)@\(0+000\) +0+298 <foo\+(0x|)298> tstl %a0@\(0+000,%d0:l\)@\(0+000\) +0+29c <foo\+(0x|)29c> tstl @\(0+000,%d0:w:2\)@\(0+7d0\) +0+2a2 <foo\+(0x|)2a2> tstl @\(0+000,%d0:w:2\)@\(0+000\) +0+2a6 <foo\+(0x|)2a6> pea %pc@\(0+2b0 <foo\+(0x|)2b0>\) +0+2aa <foo\+(0x|)2aa> pea %pc@\(0+2b4 <foo\+(0x|)2b4>\) +0+2ae <foo\+(0x|)2ae> pea %pc@\(0+2b8 <foo\+(0x|)2b8>\) +0+2b2 <foo\+(0x|)2b2> pea %pc@\(0+000 <foo>\) +0+2b6 <foo\+(0x|)2b6> pea %pc@\(0+2c0 <foo\+(0x|)2c0>,%d0:w:2\) +0+2ba <foo\+(0x|)2ba> pea %pc@\(0+2bc <foo\+(0x|)2bc>,%d0:w:2\) +0+2be <foo\+(0x|)2be> pea %pc@\(0+2c8 <foo\+(0x|)2c8>,%d0:w:2\) +0+2c2 <foo\+(0x|)2c2> pea %pc@\(0+2cc <foo\+(0x|)2cc>,%d0:l\) +0+2c6 <foo\+(0x|)2c6> pea %pc@\(0+2d0 <foo\+(0x|)2d0>,%a0:l\) +0+2ca <foo\+(0x|)2ca> pea %pc@\(0+2d4 <foo\+(0x|)2d4>,%d0:w:2\) +0+2ce <foo\+(0x|)2ce> pea %pc@\(0+2d8 <foo\+(0x|)2d8>,%d0:l\) +0+2d2 <foo\+(0x|)2d2> pea %pc@\(0+2dc <foo\+(0x|)2dc>,%a0:l\) +0+2d6 <foo\+(0x|)2d6> pea %pc@\(0+2d8 <foo\+(0x|)2d8>,%d0:w:2\) +0+2da <foo\+(0x|)2da> pea %pc@\(0+2dc <foo\+(0x|)2dc>,%d0:l\) +0+2de <foo\+(0x|)2de> pea %pc@\(0+2e0 <foo\+(0x|)2e0>,%a0:l\) +0+2e2 <foo\+(0x|)2e2> pea %pc@\(0+6cc <.*>,%d0:w:2\) +0+2e8 <foo\+(0x|)2e8> pea %pc@\(0+1898a <.*>\) +0+2f0 <foo\+(0x|)2f0> pea %pc@\(0+6da <.*>,%d0:w:2\) +0+2f6 <foo\+(0x|)2f6> pea %pc@\(0+6e0 <.*>,%d0:l\) +0+2fc <foo\+(0x|)2fc> pea %pc@\(0+6e6 <.*>,%a1:w:2\) +0+302 <foo\+(0x|)302> pea %pc@\(0+6ec <.*>,%a1:l\) +0+308 <foo\+(0x|)308> pea %pc@\(0+6f2 <.*>,%d0:w:2\) +0+30e <foo\+(0x|)30e> pea %pc@\(0+6f8 <.*>,%d0:l\) +0+314 <foo\+(0x|)314> pea %pc@\(0+6fe <.*>,%a1:l\) +0+31a <foo\+(0x|)31a> pea %pc@\(0+189bc <.*>\) +0+322 <foo\+(0x|)322> pea %pc@\(0+189c4 <.*>\) +0+32a <foo\+(0x|)32a> pea %zpc@\(0+3e8,%d0:w:2\) +0+330 <foo\+(0x|)330> pea %zpc@\(0+186a0\) +0+338 <foo\+(0x|)338> pea %zpc@\(0+3e8,%d0:w:2\) +0+33e <foo\+(0x|)33e> pea %zpc@\(0+3e8,%d0:l\) +0+344 <foo\+(0x|)344> pea %zpc@\(0+3e8,%a1:w:2\) +0+34a <foo\+(0x|)34a> pea %zpc@\(0+3e8,%a1:l\) +0+350 <foo\+(0x|)350> pea %zpc@\(0+3e8,%d0:w:2\) +0+356 <foo\+(0x|)356> pea %zpc@\(0+3e8,%d0:l\) +0+35c <foo\+(0x|)35c> pea %zpc@\(0+3e8,%a1:l\) +0+362 <foo\+(0x|)362> pea %zpc@\(0+186a0\) +0+36a <foo\+(0x|)36a> pea %zpc@\(0+186a0\) +0+372 <foo\+(0x|)372> pea %pc@\(0+75c <.*>\)@\(0+7d0,%d0:w:2\) +0+37a <foo\+(0x|)37a> pea %pc@\(0+764 <.*>\)@\(0+000,%d0:w:2\) +0+380 <foo\+(0x|)380> pea %pc@\(0+76a <.*>\)@\(0+7d0\) +0+388 <foo\+(0x|)388> pea %pc@\(0+38a <foo\+(0x|)38a>\)@\(0+7d0,%d0:w:2\) +0+38e <foo\+(0x|)38e> pea %pc@\(0+390 <foo\+(0x|)390>\)@\(0+000,%d0:w:2\) +0+392 <foo\+(0x|)392> pea %pc@\(0+394 <foo\+(0x|)394>\)@\(0+7d0\) +0+398 <foo\+(0x|)398> pea %pc@\(0+782 <.*>\)@\(0+7d0,%d0:w:2\) +0+3a0 <foo\+(0x|)3a0> pea %pc@\(0+78a <.*>\)@\(0+000,%d0:w:2\) +0+3a6 <foo\+(0x|)3a6> pea %pc@\(0+790 <.*>\)@\(0+7d0\) +0+3ae <foo\+(0x|)3ae> pea %pc@\(0+3b0 <foo\+(0x|)3b0>\)@\(0+7d0,%d0:w:2\) +0+3b4 <foo\+(0x|)3b4> pea %pc@\(0+3b6 <foo\+(0x|)3b6>\)@\(0+000,%d0:w:2\) +0+3b8 <foo\+(0x|)3b8> pea %pc@\(0+3ba <foo\+(0x|)3ba>\)@\(0+7d0\) +0+3be <foo\+(0x|)3be> pea %zpc@\(0+3e8\)@\(0+7d0,%d0:w:2\) +0+3c6 <foo\+(0x|)3c6> pea %zpc@\(0+3e8\)@\(0+000,%d0:w:2\) +0+3cc <foo\+(0x|)3cc> pea %zpc@\(0+3e8\)@\(0+7d0\) +0+3d4 <foo\+(0x|)3d4> pea %zpc@\(0+000\)@\(0+7d0,%d0:w:2\) +0+3da <foo\+(0x|)3da> pea %zpc@\(0+000\)@\(0+000,%d0:w:2\) +0+3de <foo\+(0x|)3de> pea %zpc@\(0+000\)@\(0+7d0\) +0+3e4 <foo\+(0x|)3e4> pea %zpc@\(0+3e8\)@\(0+7d0,%d0:w:2\) +0+3ec <foo\+(0x|)3ec> pea %zpc@\(0+3e8\)@\(0+000,%d0:w:2\) +0+3f2 <foo\+(0x|)3f2> pea %zpc@\(0+3e8\)@\(0+7d0\) +0+3fa <foo\+(0x|)3fa> pea %zpc@\(0+000\)@\(0+7d0,%d0:w:2\) +0+400 <foo\+(0x|)400> pea %zpc@\(0+000\)@\(0+000,%d0:w:2\) +0+404 <foo\+(0x|)404> pea %zpc@\(0+000\)@\(0+7d0\) +0+40a <foo\+(0x|)40a> pea %pc@\(0+7f4 <.*>,%d0:w:2\)@\(0+7d0\) +0+412 <foo\+(0x|)412> pea %pc@\(0+7fc <.*>,%d0:w:2\)@\(0+000\) +0+418 <foo\+(0x|)418> pea %pc@\(0+41a <foo\+(0x|)41a>,%d0:w:2\)@\(0+7d0\) +0+41e <foo\+(0x|)41e> pea %pc@\(0+420 <foo\+(0x|)420>,%d0:w:2\)@\(0+000\) +0+422 <foo\+(0x|)422> pea %pc@\(0+80c <.*>,%d0:w:2\)@\(0+7d0\) +0+42a <foo\+(0x|)42a> pea %pc@\(0+814 <.*>,%d0:w:2\)@\(0+7d0\) +0+432 <foo\+(0x|)432> pea %pc@\(0+81c <.*>,%d0:l\)@\(0+7d0\) +0+43a <foo\+(0x|)43a> pea %pc@\(0+824 <.*>,%a1:l\)@\(0+7d0\) +0+442 <foo\+(0x|)442> pea %pc@\(0+82c <.*>,%a1:l\)@\(0+7d0\) +0+44a <foo\+(0x|)44a> pea %pc@\(0+834 <.*>,%a1:w:2\)@\(0+7d0\) +0+452 <foo\+(0x|)452> pea %pc@\(0+83c <.*>,%d0:w:2\)@\(0+000\) +0+458 <foo\+(0x|)458> pea %pc@\(0+842 <.*>,%d0:l\)@\(0+000\) +0+45e <foo\+(0x|)45e> pea %pc@\(0+848 <.*>,%a1:l\)@\(0+000\) +0+464 <foo\+(0x|)464> pea %pc@\(0+466 <foo\+(0x|)466>,%d0:w:2\)@\(0+7d0\) +0+46a <foo\+(0x|)46a> pea %pc@\(0+46c <foo\+(0x|)46c>,%a0:l\)@\(0+7d0\) +0+470 <foo\+(0x|)470> pea %pc@\(0+472 <foo\+(0x|)472>,%d0:w:2\)@\(0+000\) +0+474 <foo\+(0x|)474> pea %pc@\(0+476 <foo\+(0x|)476>,%d0:l\)@\(0+000\) +0+478 <foo\+(0x|)478> pea %zpc@\(0+3e8,%d0:w:2\)@\(0+7d0\) +0+480 <foo\+(0x|)480> pea %zpc@\(0+3e8,%d0:w:2\)@\(0+000\) +0+486 <foo\+(0x|)486> pea %zpc@\(0+000,%d0:w:2\)@\(0+7d0\) +0+48c <foo\+(0x|)48c> pea %zpc@\(0+000,%d0:w:2\)@\(0+000\) +0+490 <foo\+(0x|)490> pea %zpc@\(0+3e8,%d0:w:2\)@\(0+7d0\) +0+498 <foo\+(0x|)498> pea %zpc@\(0+3e8,%d0:w:2\)@\(0+7d0\) +0+4a0 <foo\+(0x|)4a0> pea %zpc@\(0+3e8,%d0:l\)@\(0+7d0\) +0+4a8 <foo\+(0x|)4a8> pea %zpc@\(0+3e8,%a1:l\)@\(0+7d0\) +0+4b0 <foo\+(0x|)4b0> pea %zpc@\(0+3e8,%a1:l\)@\(0+7d0\) +0+4b8 <foo\+(0x|)4b8> pea %zpc@\(0+3e8,%a1:w:2\)@\(0+7d0\) +0+4c0 <foo\+(0x|)4c0> pea %zpc@\(0+3e8,%d0:w:2\)@\(0+000\) +0+4c6 <foo\+(0x|)4c6> pea %zpc@\(0+3e8,%d0:l\)@\(0+000\) +0+4cc <foo\+(0x|)4cc> pea %zpc@\(0+3e8,%a1:l\)@\(0+000\) +0+4d2 <foo\+(0x|)4d2> pea %zpc@\(0+000,%d0:w:2\)@\(0+7d0\) +0+4d8 <foo\+(0x|)4d8> pea %zpc@\(0+000,%a0:l\)@\(0+7d0\) +0+4de <foo\+(0x|)4de> pea %zpc@\(0+000,%d0:w:2\)@\(0+000\) +0+4e2 <foo\+(0x|)4e2> pea %zpc@\(0+000,%d0:l\)@\(0+000\) +0+4e6 <foo\+(0x|)4e6> tstl 0+004 <foo\+(0x|)4> +0+4ea <foo\+(0x|)4ea> tstl 0+004 <foo\+(0x|)4> +0+4ee <foo\+(0x|)4ee> tstl 0+004 <foo\+(0x|)4> +0+4f2 <foo\+(0x|)4f2> tstl 0+186a0 <.*> +0+4f8 <foo\+(0x|)4f8> tstl 0+008 <foo\+(0x|)8> +0+4fe <foo\+(0x|)4fe> tstl 0+008 <foo\+(0x|)8> +0+504 <foo\+(0x|)504> addib #1,%d0 +0+508 <foo\+(0x|)508> addiw #1,%d0 +0+50c <foo\+(0x|)50c> addil #1,%d0 +0+512 <foo\+(0x|)512> addqb #1,%d0 diff --git a/gas/testsuite/gas/m68k/operands.s b/gas/testsuite/gas/m68k/operands.s new file mode 100644 index 0000000..b09f56f --- /dev/null +++ b/gas/testsuite/gas/m68k/operands.s @@ -0,0 +1,272 @@ +# Test handling of MIT and Motorola syntax operands +# If you change this file, see also op68000.d. + .text +foo: + | Data register direct + tstl %d0 + + | Address register direct + tstl %a0 + + | Address register indirect + tstl %a0@ + tstl (%a0) + + | Address register indirect with postincrement + tstl %a0@+ + tstl (%a0)+ + + | Address register indirect with predecrement + tstl %a0@- + tstl -(%a0) + + | Address register indirect with displacement + tstl %a0@(8) + tstl (8,%a0) + tstl 8(%a0) + + | Address register indirect with index (8-bit displacement) + tstl %a0@(8,%d0) + tstl %a0@(8,%d0:w) + tstl %a0@(8,%d0:w:1) + tstl %a0@(8,%d0:w:2) + tstl %a0@(8,%d0:w:4) + tstl %a0@(8,%d0:w:8) + tstl %a0@(8,%d0:l) + tstl %a0@(8,%d0:l:1) + tstl %a0@(8,%d0:l:2) + tstl %a0@(8,%d0:l:4) + tstl %a0@(8,%d0:l:8) + tstl %a0@(%d0:w:2) + tstl (8,%a0,%d0) + tstl (8,%a0,%d0*1) + tstl (8,%a0,%d0*2) + tstl (8,%a0,%d0*4) + tstl (8,%a0,%d0*8) + tstl (8,%a0,%d0.w) + tstl (8,%a0,%d0.w*1) + tstl (8,%a0,%d0.w*2) + tstl (8,%a0,%d0.w*4) + tstl (8,%a0,%d0.w*8) + tstl (8,%a0,%d0.l) + tstl (8,%a0,%d0.l*1) + tstl (8,%a0,%d0.l*2) + tstl (8,%a0,%d0.l*4) + tstl (8,%a0,%d0.l*8) + tstl (8,%d0,%a0) + tstl (8,%a1.w*2,%a0) + tstl (8,%a1,%a0) + tstl 8(%a0,%d0.w*2) + tstl 8(%d0.w*2,%a0) + tstl 8(%a1.w*2,%a0) + tstl (%a0,%d0.w*2) + tstl (%d0.w*2,%a0) + + | Address register indirect with index (base displacement) + tstl %a0@(1000,%d0:w:2) + tstl @(1000,%d0:w:2) + tstl @(%d0:w:2) + tstl @(1000) + tstl %a0@(100000) + tstl (1000,%a0,%d0.w*2) + tstl (1000,%d0,%a0) + tstl (1000,%a1.w*2,%a0) + tstl 1000(%a0,%d0.w*2) + tstl 1000(%d0,%a0) + tstl (1000,%d0.w*2) + tstl 1000(%d0.w*2) + tstl (%d0.w*2) + tstl (100000,%a0) + tstl 100000(%a0) + tstl %za1@(1000,%d0:w:2) + tstl %za1@(100000) + tstl (1000,%za1,%d0.w*2) + tstl (1000,%d0,%za1) + tstl (1000,%a1.w*2,%za1) + tstl 1000(%za1,%d0.w*2) + tstl 1000(%d0,%za1) + tstl (100000,%za1) + tstl 100000(%za1) + tstl %a0@(1000,%zd1:w:2) + tstl @(1000,%zd1:w:2) + tstl @(%zd1:w:2) + tstl (1000,%a0,%zd1.w*2) + tstl (1000,%zd1,%a0) + tstl (1000,%za1.w*2,%a0) + tstl 1000(%a0,%zd1.w*2) + tstl 1000(%zd1,%a0) + tstl (1000,%zd1.w*2) + tstl 1000(%zd1.w*2) + tstl (%zd1.w*2) + + | Memory indirect postindexed + tstl %a0@(1000)@(2000,%d0:w:2) + tstl %a0@(1000)@(%d0:w:2) + tstl %a0@(1000)@(2000) + tstl @(1000)@(2000,%d0:w:2) + tstl @(1000)@(%d0:w:2) + tstl @(1000)@(2000) + tstl %a0@(0)@(2000,%d0:w:2) + tstl %a0@(0)@(%d0:w:2) + tstl %a0@(0)@(2000) + tstl @(0)@(2000,%d0:w:2) + tstl @(0)@(%d0:w:2) + tstl @(0)@(2000) + tstl ([1000,%a0],%d0:w:2,2000) + tstl ([1000,%a0],%d0:w:2) + tstl ([1000,%a0],2000) + tstl ([1000],%d0:w:2,2000) + tstl ([1000],%d0:w:2) + tstl ([1000],2000) + tstl ([%a0],%d0:w:2,2000) + tstl ([%a0],%d0:w:2) + tstl ([%a0],2000) + tstl ([0],%d0:w:2,2000) + tstl ([0],%d0:w:2) + tstl ([0],2000) + + | Memory indirect preindexed + tstl %a0@(1000,%d0:w:2)@(2000) + tstl %a0@(1000,%d0:w:2)@(0) + tstl @(1000,%d0:w:2)@(2000) + tstl @(1000,%d0:w:2)@(0) + tstl %a0@(%d0:w:2)@(2000) + tstl %a0@(%d0:w:2)@(0) + tstl @(%d0:w:2)@(2000) + tstl @(%d0:w:2)@(0) + tstl ([1000,%a0,%d0:w:2],2000) + tstl ([1000,%d0:w:2,%a0],2000) + tstl ([1000,%d0,%a0],2000) + tstl ([1000,%a1,%a0],2000) + tstl ([1000,%a1:w:2,%a0],2000) + tstl ([1000,%a0,%d0:w:2]) + tstl ([1000,%d0,%a0]) + tstl ([1000,%d0:w:2],2000) + tstl ([1000,%d0:w:2]) + tstl ([%a0,%d0:w:2],2000) + tstl ([%d0,%a0],2000) + tstl ([%a0,%d0:w:2]) + tstl ([%d0,%a0]) + tstl ([%d0:w:2],2000) + tstl ([%d0:w:2]) + + | Program counter indirect with displacement + pea %pc@(8) + pea (8,%pc) + pea 8(%pc) + pea foo + + | Program counter indirect with index (8-bit displacement) + pea %pc@(8,%d0:w:2) + pea %pc@(%d0:w:2) + pea (8,%pc,%d0.w*2) + pea (8,%d0,%pc) + pea (8,%a0,%pc) + pea 8(%pc,%d0.w*2) + pea 8(%d0,%pc) + pea 8(%a0,%pc) + pea (%pc,%d0.w*2) + pea (%d0,%pc) + pea (%a0,%pc) + + | Program counter indirect with index (base displacement) + pea %pc@(1000,%d0:w:2) + pea %pc@(100000) + pea (1000,%pc,%d0.w*2) + pea (1000,%d0,%pc) + pea (1000,%a1.w*2,%pc) + pea (1000,%a1,%pc) + pea 1000(%pc,%d0.w*2) + pea 1000(%d0,%pc) + pea 1000(%a1,%pc) + pea (100000,%pc) + pea 100000(%pc) + pea %zpc@(1000,%d0:w:2) + pea %zpc@(100000) + pea (1000,%zpc,%d0.w*2) + pea (1000,%d0,%zpc) + pea (1000,%a1.w*2,%zpc) + pea (1000,%a1,%zpc) + pea 1000(%zpc,%d0.w*2) + pea 1000(%d0,%zpc) + pea 1000(%a1,%zpc) + pea (100000,%zpc) + pea 100000(%zpc) + + | Program counter memory indirect postindexed + pea %pc@(1000)@(2000,%d0:w:2) + pea %pc@(1000)@(%d0:w:2) + pea %pc@(1000)@(2000) + pea %pc@(0)@(2000,%d0:w:2) + pea %pc@(0)@(%d0:w:2) + pea %pc@(0)@(2000) + pea ([1000,%pc],%d0:w:2,2000) + pea ([1000,%pc],%d0:w:2) + pea ([1000,%pc],2000) + pea ([%pc],%d0:w:2,2000) + pea ([%pc],%d0:w:2) + pea ([%pc],2000) + pea %zpc@(1000)@(2000,%d0:w:2) + pea %zpc@(1000)@(%d0:w:2) + pea %zpc@(1000)@(2000) + pea %zpc@(0)@(2000,%d0:w:2) + pea %zpc@(0)@(%d0:w:2) + pea %zpc@(0)@(2000) + pea ([1000,%zpc],%d0:w:2,2000) + pea ([1000,%zpc],%d0:w:2) + pea ([1000,%zpc],2000) + pea ([%zpc],%d0:w:2,2000) + pea ([%zpc],%d0:w:2) + pea ([%zpc],2000) + + | Program counter memory indirect preindexed + pea %pc@(1000,%d0:w:2)@(2000) + pea %pc@(1000,%d0:w:2)@(0) + pea %pc@(%d0:w:2)@(2000) + pea %pc@(%d0:w:2)@(0) + pea ([1000,%pc,%d0:w:2],2000) + pea ([1000,%d0:w:2,%pc],2000) + pea ([1000,%d0,%pc],2000) + pea ([1000,%a1,%pc],2000) + pea ([1000,%pc,%a1],2000) + pea ([1000,%a1:w:2,%pc],2000) + pea ([1000,%pc,%d0:w:2]) + pea ([1000,%d0,%pc]) + pea ([1000,%a1,%pc]) + pea ([%pc,%d0:w:2],2000) + pea ([%pc,%a0],2000) + pea ([%pc,%d0:w:2]) + pea ([%d0,%pc]) + pea %zpc@(1000,%d0:w:2)@(2000) + pea %zpc@(1000,%d0:w:2)@(0) + pea %zpc@(%d0:w:2)@(2000) + pea %zpc@(%d0:w:2)@(0) + pea ([1000,%zpc,%d0:w:2],2000) + pea ([1000,%d0:w:2,%zpc],2000) + pea ([1000,%d0,%zpc],2000) + pea ([1000,%a1,%zpc],2000) + pea ([1000,%zpc,%a1],2000) + pea ([1000,%a1:w:2,%zpc],2000) + pea ([1000,%zpc,%d0:w:2]) + pea ([1000,%d0,%zpc]) + pea ([1000,%a1,%zpc]) + pea ([%zpc,%d0:w:2],2000) + pea ([%zpc,%a0],2000) + pea ([%zpc,%d0:w:2]) + pea ([%d0,%zpc]) + + | Absolute short + tstl 4 + tstl 4.w + tstl (4).w + + | Absolute long + tstl 100000 + tstl 8.l + tstl (8).l + + | Immediate + addib &1,%d0 + addiw &1,%d0 + addil &1,%d0 + addqb &1,%d0 diff --git a/gas/testsuite/gas/m68k/p2410.s b/gas/testsuite/gas/m68k/p2410.s new file mode 100644 index 0000000..4f0337a --- /dev/null +++ b/gas/testsuite/gas/m68k/p2410.s @@ -0,0 +1,15 @@ +.text +start: nop + nop + nop + bras label1 + bras label2 +.globl label1 +label1: nop + .space 0xa0 + nop + nop +.globl label2 +label2: bras label1 + bras label2 + nop diff --git a/gas/testsuite/gas/m68k/p2663.s b/gas/testsuite/gas/m68k/p2663.s new file mode 100644 index 0000000..9f3650f --- /dev/null +++ b/gas/testsuite/gas/m68k/p2663.s @@ -0,0 +1,16 @@ +| +| This code generates an incorrect pc relative offset +| +bug: movel #4,%d7 + jsr table(%pc,%d7.w) | wrong + jsr %pc@(table-.-2:b,%d7:w) | correct but cryptic + nop + nop +table: + bra junk + bra junk + bra junk + +junk: + nop + rts diff --git a/gas/testsuite/gas/m68k/pcrel.d b/gas/testsuite/gas/m68k/pcrel.d new file mode 100644 index 0000000..b498358 --- /dev/null +++ b/gas/testsuite/gas/m68k/pcrel.d @@ -0,0 +1,88 @@ +#name: pcrel +#objdump: -drs -j .text --prefix-addresses + +.*: file format .* + +Contents of section .text: + 0000 4e714e71 4cfa0300 fffa4cfa 0300fff4 NqNqL.....L..... + 0010 4cfb0300 08ee41fa ffea41fa ffe641fa L.....A...A...A. + 0020 ff6241fb 08de41fb 08da41fb 08d641fb .bA...A...A...A. + 0030 0920ffd2 41fb0920 ffcc41fb 0930ffff . ..A.. ..A..0.. + 0040 ffc641fb 0930ffff ffbe4e71 61ff0000 ..A..0....Nqa... + 0050 00586100 0052614e 614c4e71 41f90000 .Xa..RaNaLNqA... + 0060 00(a6|00)41fa 004241fa 00be41fb 083a41fb ..A..BA...A..:A. + 0070 083641fb 083241fb 0920002e 41fb0920 .6A..2A.. ..A.. + 0080 002841fb 09300000 002241fb 09300000 .\(A..0..."A..0.. + 0090 001a41fb 09300000 001241fb 0920000a ..A..0....A.. .. + 00a0 41fb0804 4e714e71 4e7141fb 088041fb A...NqNqNqA...A. + 00b0 0920ff7f 41fb0920 800041fb 0930ffff . ..A.. ..A..0.. + 00c0 7fff4e71 41fb087f 41fb0920 008041fb ..NqA...A.. ..A. + 00d0 09207fff 41fb0930 00008000 4e7141fa . ..A..0....NqA. + 00e0 800041fb 0170ffff 7fff4e71 41fa7fff ..A..p....NqA... + 00f0 41fb0170 00008000 4e7141fb 0170(ffff|0000) A..p....NqA..p.. + 0100 (ff04|0000)41fb 0930(ffff|0000) (fefc|0000)4e71 41f90000 ..A..0....NqA... + 0110 0000............................... ................ +Disassembly of section \.text: +0+0000 <.*> nop +0+0002 <lbl_b> nop +0+0004 <lbl_b\+(0x|)2> moveml %pc@\(0+0002 <lbl_b>\),%a0-%a1 +0+000a <lbl_b\+(0x|)8> moveml %pc@\(0+0002 <lbl_b>\),%a0-%a1 +0+0010 <lbl_b\+(0x|)e> moveml %pc@\(0+02 <lbl_b>,%d0:l\),%a0-%a1 +0+0016 <lbl_b\+(0x|)14> lea %pc@\(0+0002 <lbl_b>\),%a0 +0+001a <lbl_b\+(0x|)18> lea %pc@\(0+0002 <lbl_b>\),%a0 +0+001e <lbl_b\+(0x|)1c> lea %pc@\(f+ff82 <.*>\),%a0 +0+0022 <lbl_b\+(0x|)20> lea %pc@\(0+02 <lbl_b>,%d0:l\),%a0 +0+0026 <lbl_b\+(0x|)24> lea %pc@\(0+02 <lbl_b>,%d0:l\),%a0 +0+002a <lbl_b\+(0x|)28> lea %pc@\(0+02 <lbl_b>,%d0:l\),%a0 +0+002e <lbl_b\+(0x|)2c> lea %pc@\(0+02 <lbl_b>,%d0:l\),%a0 +0+0034 <lbl_b\+(0x|)32> lea %pc@\(0+02 <lbl_b>,%d0:l\),%a0 +0+003a <lbl_b\+(0x|)38> lea %pc@\(0+02 <lbl_b>,%d0:l\),%a0 +0+0042 <lbl_b\+(0x|)40> lea %pc@\(0+02 <lbl_b>,%d0:l\),%a0 +0+004a <lbl_b\+(0x|)48> nop +0+004c <lbl_b\+(0x|)4a> bsrl 0+00a6 <lbl_a> +0+0052 <lbl_b\+(0x|)50> bsrw 0+00a6 <lbl_a> +0+0056 <lbl_b\+(0x|)54> bsrs 0+00a6 <lbl_a> +0+0058 <lbl_b\+(0x|)56> bsrs 0+00a6 <lbl_a> +0+005a <lbl_b\+(0x|)58> nop +0+005c <lbl_b\+(0x|)5a> lea (0+00a6 <lbl_a>|0+0 <.*>),%a0 + 5e: (32 \.text|R_68K_32 \.text\+0xa6) +0+0062 <lbl_b\+(0x|)60> lea %pc@\(0+00a6 <lbl_a>\),%a0 +0+0066 <lbl_b\+(0x|)64> lea %pc@\(0+0126 <.*>\),%a0 +0+006a <lbl_b\+(0x|)68> lea %pc@\(0+a6 <lbl_a>,%d0:l\),%a0 +0+006e <lbl_b\+(0x|)6c> lea %pc@\(0+a6 <lbl_a>,%d0:l\),%a0 +0+0072 <lbl_b\+(0x|)70> lea %pc@\(0+a6 <lbl_a>,%d0:l\),%a0 +0+0076 <lbl_b\+(0x|)74> lea %pc@\(0+a6 <lbl_a>,%d0:l\),%a0 +0+007c <lbl_b\+(0x|)7a> lea %pc@\(0+a6 <lbl_a>,%d0:l\),%a0 +0+0082 <lbl_b\+(0x|)80> lea %pc@\(0+a6 <lbl_a>,%d0:l\),%a0 +0+008a <lbl_b\+(0x|)88> lea %pc@\(0+a6 <lbl_a>,%d0:l\),%a0 +0+0092 <lbl_b\+(0x|)90> lea %pc@\(0+a6 <lbl_a>,%d0:l\),%a0 +0+009a <lbl_b\+(0x|)98> lea %pc@\(0+a6 <lbl_a>,%d0:l\),%a0 +0+00a0 <lbl_b\+(0x|)9e> lea %pc@\(0+a6 <lbl_a>,%d0:l\),%a0 +0+00a4 <lbl_b\+(0x|)a2> nop +0+00a6 <lbl_a> nop +0+00a8 <lbl_a\+(0x|)2> nop +0+00aa <lbl_a\+(0x|)4> lea %pc@\(0+2c <lbl_b\+(0x|)2a>,%d0:l\),%a0 +0+00ae <lbl_a\+(0x|)8> lea %pc@\(0+2f <lbl_b\+(0x|)2d>,%d0:l\),%a0 +0+00b4 <lbl_a\+(0x|)e> lea %pc@\(f+80b6 <.*>,%d0:l\),%a0 +0+00ba <lbl_a\+(0x|)14> lea %pc@\(f+80bb <.*>,%d0:l\),%a0 +0+00c2 <lbl_a\+(0x|)1c> nop +0+00c4 <lbl_a\+(0x|)1e> lea %pc@\(0+145 <.*>,%d0:l\),%a0 +0+00c8 <lbl_a\+(0x|)22> lea %pc@\(0+14a <.*>,%d0:l\),%a0 +0+00ce <lbl_a\+(0x|)28> lea %pc@\(0+80cf <.*>,%d0:l\),%a0 +0+00d4 <lbl_a\+(0x|)2e> lea %pc@\(0+80d6 <.*>,%d0:l\),%a0 +0+00dc <lbl_a\+(0x|)36> nop +0+00de <lbl_a\+(0x|)38> lea %pc@\(f+80e0 <.*>\),%a0 +0+00e2 <lbl_a\+(0x|)3c> lea %pc@\(f+80e3 <.*>\),%a0 +0+00ea <lbl_a\+(0x|)44> nop +0+00ec <lbl_a\+(0x|)46> lea %pc@\(0+80ed <.*>\),%a0 +0+00f0 <lbl_a\+(0x|)4a> lea %pc@\(0+80f2 <.*>\),%a0 +0+00f8 <lbl_a\+(0x|)52> nop +0+00fa <lbl_a\+(0x|)54> lea %pc@\((0+0 <.*>|0+0fc <lbl_a\+(0x|)56>)\),%a0 + fe: (DISP32 undef|R_68K_PC32 undef\+0x2) +0+0102 <lbl_a\+(0x|)5c> lea %pc@\((0+0 <.*>|0+0104 <lbl_a\+(0x|)5e>),%d0:l\),%a0 + 106: (DISP32 undef|R_68K_PC32 undef\+0x2) +0+010a <lbl_a\+(0x|)64> nop +0+010c <lbl_a\+(0x|)66> lea 0+0 <.*>,%a0 + 10e: (R_68K_)?32 undef +0+0112 <lbl_a\+(0x|)6c> nop +0+0114 <lbl_a\+(0x|)6e> orib #0,%d0 diff --git a/gas/testsuite/gas/m68k/pcrel.s b/gas/testsuite/gas/m68k/pcrel.s new file mode 100644 index 0000000..9c5c22b --- /dev/null +++ b/gas/testsuite/gas/m68k/pcrel.s @@ -0,0 +1,59 @@ + nop +lbl_b: nop + moveml lbl_b,%a0-%a1 + moveml %pc@(lbl_b),%a0-%a1 + moveml %pc@(lbl_b,%d0),%a0-%a1 + lea lbl_b,%a0 + lea %pc@(lbl_b),%a0 + lea %pc@(lbl_b-128),%a0 + lea %pc@(lbl_b,%d0),%a0 + lea %pc@(lbl_b:b,%d0),%a0 + lea %pc@(lbl_b-.-2:b,%d0),%a0 + lea %pc@(lbl_b:w,%d0),%a0 + lea %pc@(lbl_b-.-2:w,%d0),%a0 + lea %pc@(lbl_b:l,%d0),%a0 + lea %pc@(lbl_b-.-2:l,%d0),%a0 + nop + bsrl lbl_a + bsr lbl_a + bsrs lbl_a + jbsr lbl_a + nop + lea lbl_a,%a0 + lea %pc@(lbl_a),%a0 + lea %pc@(lbl_a+128),%a0 + lea %pc@(lbl_a,%d0),%a0 + lea %pc@(lbl_a:b,%d0),%a0 + lea %pc@(lbl_a-.-2:b,%d0),%a0 + lea %pc@(lbl_a:w,%d0),%a0 + lea %pc@(lbl_a-.-2:w,%d0),%a0 + lea %pc@(lbl_a:l,%d0),%a0 + lea %pc@(lbl_a-.-2:l,%d0),%a0 + lea %pc@(18:l,%d0),%a0 + lea %pc@(10:w,%d0),%a0 + lea %pc@(4:b,%d0),%a0 + nop +lbl_a: nop + nop + lea %pc@(.-126,%d0),%a0 + lea %pc@(.-127,%d0),%a0 + lea %pc@(.-32766,%d0),%a0 + lea %pc@(.-32767,%d0),%a0 + nop + lea %pc@(.+129,%d0),%a0 + lea %pc@(.+130,%d0),%a0 + lea %pc@(.+32769,%d0),%a0 + lea %pc@(.+32770,%d0),%a0 + nop + lea %pc@(.-32766),%a0 + lea %pc@(.-32767),%a0 + nop + lea %pc@(.+32769),%a0 + lea %pc@(.+32770),%a0 + nop + lea %pc@(undef),%a0 + lea %pc@(undef,%d0),%a0 + nop + lea undef,%a0 + nop + .long 0 diff --git a/gas/testsuite/gas/m68k/pic1.s b/gas/testsuite/gas/m68k/pic1.s new file mode 100644 index 0000000..8578774 --- /dev/null +++ b/gas/testsuite/gas/m68k/pic1.s @@ -0,0 +1,5 @@ + .text + .globl _foo +_foo: + leal %pc@(_i), %a0 + leal %pc@(_i-.), %a1 diff --git a/gas/testsuite/gas/m68k/t2.d b/gas/testsuite/gas/m68k/t2.d new file mode 100644 index 0000000..65109c8 --- /dev/null +++ b/gas/testsuite/gas/m68k/t2.d @@ -0,0 +1,8 @@ +#PROG: nm +#name: presence of section symbols + +00000012 b .bss +0000000e d .data +00000000 t .text +0000000e d loop1 +00000000 t loop2 diff --git a/gas/testsuite/gas/m68k/t2.s b/gas/testsuite/gas/m68k/t2.s new file mode 100644 index 0000000..7b71e86 --- /dev/null +++ b/gas/testsuite/gas/m68k/t2.s @@ -0,0 +1,6 @@ + .text +loop2: + move.l %d1,%a0@+ + dbf %d0,loop1 + .data +loop1: bra loop2 diff --git a/gas/testsuite/gas/m88k/init.d b/gas/testsuite/gas/m88k/init.d new file mode 100644 index 0000000..b2d9259 --- /dev/null +++ b/gas/testsuite/gas/m88k/init.d @@ -0,0 +1,11 @@ +#objdump: -d --prefix-addresses +#name: padding of .init section + +.*: +file format .* + +Disassembly of section .text: +Disassembly of section .init: +00000000 <.init> subu r31,r31,0x10 +00000004 <.init\+0x4> st r13,r31,0x20 +00000008 <.init\+0x8> or r0,r0,r0 +0000000c <.init\+0xc> or r0,r0,r0 diff --git a/gas/testsuite/gas/m88k/init.s b/gas/testsuite/gas/m88k/init.s new file mode 100644 index 0000000..29681cb --- /dev/null +++ b/gas/testsuite/gas/m88k/init.s @@ -0,0 +1,5 @@ +; Test proper padding of the .init section + section .init,"x" + align 4 + subu r31,r31,16 + st r13,r31,32 diff --git a/gas/testsuite/gas/m88k/m88k.exp b/gas/testsuite/gas/m88k/m88k.exp new file mode 100644 index 0000000..6907c11 --- /dev/null +++ b/gas/testsuite/gas/m88k/m88k.exp @@ -0,0 +1,10 @@ +# +# Tests for m88k svr3 targets +# +if { [istarget m88*-*-sysv3] || [istarget m88*-*-coff* ] } then { + set testname "Proper padding of .init section" + run_dump_test init +} +if [info exists errorInfo] then { + unset errorInfo +} diff --git a/gas/testsuite/gas/macros/err.s b/gas/testsuite/gas/macros/err.s new file mode 100644 index 0000000..cc97631 --- /dev/null +++ b/gas/testsuite/gas/macros/err.s @@ -0,0 +1,5 @@ + .macro m + m + .endm + + m diff --git a/gas/testsuite/gas/macros/irp.d b/gas/testsuite/gas/macros/irp.d new file mode 100644 index 0000000..6733622 --- /dev/null +++ b/gas/testsuite/gas/macros/irp.d @@ -0,0 +1,13 @@ +#objdump: -r +#name: macro irp + +.*: +file format .* + +RELOCATION RECORDS FOR .* +OFFSET[ ]+TYPE[ ]+VALUE.* +0+00[ ]+[a-zA-Z0-9_]+[ ]+r1 +0+04[ ]+[a-zA-Z0-9_]+[ ]+r2 +0+08[ ]+[a-zA-Z0-9_]+[ ]+r3 +0+0c[ ]+[a-zA-Z0-9_]+[ ]+s1 +0+10[ ]+[a-zA-Z0-9_]+[ ]+s2 +0+14[ ]+[a-zA-Z0-9_]+[ ]+s3 diff --git a/gas/testsuite/gas/macros/irp.s b/gas/testsuite/gas/macros/irp.s new file mode 100644 index 0000000..2f9a621 --- /dev/null +++ b/gas/testsuite/gas/macros/irp.s @@ -0,0 +1,8 @@ + .irp param,1,2,3 + .long r\param + .endr + + .irpc param,123 + .long s\param + .endr + diff --git a/gas/testsuite/gas/macros/macros.exp b/gas/testsuite/gas/macros/macros.exp new file mode 100644 index 0000000..a51e485 --- /dev/null +++ b/gas/testsuite/gas/macros/macros.exp @@ -0,0 +1,22 @@ +# Run some tests of gas macros. + +if ![istarget hppa*-*-*] { + run_dump_test test1 +} + +run_dump_test test2 + +run_dump_test test3 + +run_dump_test irp + +run_dump_test rept + +gas_test_error "err.s" "" "macro infinite recursion" + +case $target_triplet in { + { hppa*-*-* } { } + default { + run_dump_test semi + } +} diff --git a/gas/testsuite/gas/macros/rept.d b/gas/testsuite/gas/macros/rept.d new file mode 100644 index 0000000..efb5d99 --- /dev/null +++ b/gas/testsuite/gas/macros/rept.d @@ -0,0 +1,10 @@ +#objdump: -r +#name: macro rept + +.*: +file format .* + +RELOCATION RECORDS FOR .* +OFFSET[ ]+TYPE[ ]+VALUE.* +0+00[ ]+[a-zA-Z0-9_]+[ ]+r1 +0+04[ ]+[a-zA-Z0-9_]+[ ]+r1 +0+08[ ]+[a-zA-Z0-9_]+[ ]+r1 diff --git a/gas/testsuite/gas/macros/rept.s b/gas/testsuite/gas/macros/rept.s new file mode 100644 index 0000000..243cf67 --- /dev/null +++ b/gas/testsuite/gas/macros/rept.s @@ -0,0 +1,3 @@ + .rept 3 + .long r1 + .endr diff --git a/gas/testsuite/gas/macros/semi.d b/gas/testsuite/gas/macros/semi.d new file mode 100644 index 0000000..ae89e73 --- /dev/null +++ b/gas/testsuite/gas/macros/semi.d @@ -0,0 +1,8 @@ +#objdump: -s -j .text +#name: semi + +.*: .* + +Contents of section .text: + 0000 3b203b20 3a203a20 00000000 00000000 ; ; : : ........ + 0010 00000000 00000000 00000000 00000000 ................ diff --git a/gas/testsuite/gas/macros/semi.s b/gas/testsuite/gas/macros/semi.s new file mode 100644 index 0000000..d6e0963 --- /dev/null +++ b/gas/testsuite/gas/macros/semi.s @@ -0,0 +1,14 @@ + .macro semicolon + .ascii "; " + .endm + + .macro colon + .ascii ": " + .endm + + semicolon + .ascii "; " + colon + .ascii ": " + + .p2align 5,0 diff --git a/gas/testsuite/gas/macros/test1.d b/gas/testsuite/gas/macros/test1.d new file mode 100644 index 0000000..d84b3fb --- /dev/null +++ b/gas/testsuite/gas/macros/test1.d @@ -0,0 +1,5 @@ +#nm: --extern-only +#name: macro test 1 + +0+01 A s1 +0+02 A s2 diff --git a/gas/testsuite/gas/macros/test1.s b/gas/testsuite/gas/macros/test1.s new file mode 100644 index 0000000..988b7cd --- /dev/null +++ b/gas/testsuite/gas/macros/test1.s @@ -0,0 +1,7 @@ + .macro m arg1 arg2 + .globl \arg1 + \arg1 = \arg2 + .endm + + m s1,1 + m s2,2 diff --git a/gas/testsuite/gas/macros/test2.d b/gas/testsuite/gas/macros/test2.d new file mode 100644 index 0000000..741d734 --- /dev/null +++ b/gas/testsuite/gas/macros/test2.d @@ -0,0 +1,10 @@ +#objdump: -r +#name: macro test 2 + +.*: +file format .* + +RELOCATION RECORDS FOR .* +OFFSET[ ]+TYPE[ ]+VALUE.* +0+00[ ]+[a-zA-Z0-9_]+[ ]+r1 +0+04[ ]+[a-zA-Z0-9_]+[ ]+r2 +0+08[ ]+[a-zA-Z0-9_]+[ ]+r3 diff --git a/gas/testsuite/gas/macros/test2.s b/gas/testsuite/gas/macros/test2.s new file mode 100644 index 0000000..838ce94 --- /dev/null +++ b/gas/testsuite/gas/macros/test2.s @@ -0,0 +1,9 @@ + .macro m arg1 arg2 arg3 + .long \arg1 + .ifc ,\arg2\arg3 + .ELSE + m \arg2,\arg3 + .endif + .endm + + m r1,r2,r3 diff --git a/gas/testsuite/gas/macros/test3.d b/gas/testsuite/gas/macros/test3.d new file mode 100644 index 0000000..2580f76 --- /dev/null +++ b/gas/testsuite/gas/macros/test3.d @@ -0,0 +1,8 @@ +#objdump: -r +#name: macro test 3 + +.*: +file format .* + +RELOCATION RECORDS FOR .* +OFFSET[ ]+TYPE[ ]+VALUE.* +0+00[ ]+[a-zA-Z0-9_]+[ ]+r1 diff --git a/gas/testsuite/gas/macros/test3.s b/gas/testsuite/gas/macros/test3.s new file mode 100644 index 0000000..c6410ae --- /dev/null +++ b/gas/testsuite/gas/macros/test3.s @@ -0,0 +1,7 @@ + .macro m arg1 arg2 + \arg1 + .exitm + \arg2 + .endm + + m ".long r1",.garbage diff --git a/gas/testsuite/gas/mcore/allinsn.d b/gas/testsuite/gas/mcore/allinsn.d new file mode 100644 index 0000000..913d8f5 --- /dev/null +++ b/gas/testsuite/gas/mcore/allinsn.d @@ -0,0 +1,400 @@ +#as: +#objdump: -dr +#name: allinsn + +.*: +file format .* + +Disassembly of section .text: + +0+000 <abs>: + 0: 01 e0 abs r0 + +0+002 <addc>: + 2: 06 21 addc r1, r2 + +0+004 <addi>: + 4: 20 03 addi r3, 1 + +0+006 <addu>: + 6: 1c 54 addu r4, r5 + +0+008 <and>: + 8: 16 76 and r6, r7 + +0+00a <andi>: + a: 2e 28 andi r8, 2 + +0+00c <andn>: + c: 1f a9 andn r9, r10 + +0+00e <asr>: + e: 1a cb asr r11, r12 + +0+010 <asrc>: + 10: 3a 0d asrc r13 + +0+012 <asri>: + 12: 3b fe asri r14, 31 + +0+014 <bclri>: + 14: 30 0f bclri r15, 0 + +0+016 <bf>: + 16: ef f4 bf 0x0 + +0+018 <bgeni>: + 18: 32 70 bgeni r0, 7 + +0+01a <BGENI>: + 1a: 32 80 bgeni r0, 8 + +0+01c <BGENi>: + 1c: 33 f0 bgeni r0, 31 + +0+01e <bgenr>: + 1e: 13 21 bgenr r1, r2 + +0+020 <bkpt>: + ... + +0+022 <bmaski>: + 22: 2c 83 bmaski r3, 8 + +0+024 <BMASKI>: + 24: 2d f3 bmaski r3, 31 + +0+026 <br>: + 26: f7 ff br 0x26 + +0+028 <brev>: + 28: 00 f4 brev r4 + +0+02a <bseti>: + 2a: 35 e5 bseti r5, 30 + +0+02c <bsr>: + 2c: ff e9 bsr 0x0 + +0+02e <bt>: + 2e: e7 e8 bt 0x0 + +0+030 <btsti>: + 30: 37 b6 btsti r6, 27 + +0+032 <clrc>: + 32: 0f 00 cmpne r0, r0 + +0+034 <clrf>: + 34: 01 d7 clrf r7 + +0+036 <clrt>: + 36: 01 c8 clrt r8 + +0+038 <cmphs>: + 38: 0c a9 cmphs r9, r10 + +0+03a <cmplt>: + 3a: 0d cb cmplt r11, r12 + +0+03c <cmplei>: + 3c: 22 eb cmplti r11, 15 + +0+03e <cmplti>: + 3e: 23 fd cmplti r13, 32 + +0+040 <cmpne>: + 40: 0f fe cmpne r14, r15 + +0+042 <cmpnei>: + 42: 2a 00 cmpnei r0, 0 + +0+044 <decf>: + 44: 00 91 decf r1 + +0+046 <decgt>: + 46: 01 a2 decgt r2 + +0+048 <declt>: + 48: 01 83 declt r3 + +0+04a <decne>: + 4a: 01 b4 decne r4 + +0+04c <dect>: + 4c: 00 85 dect r5 + +0+04e <divs>: + 4e: 32 16 divs r6, r1 + +0+050 <divu>: + 50: 2c 18 divu r8, r1 + +0+052 <doze>: + 52: 00 06 doze + +0+054 <ff1>: + 54: 00 ea ff1 r10 + +0+056 <incf>: + 56: 00 bb incf r11 + +0+058 <inct>: + 58: 00 ac inct r12 + +0+05a <ixh>: + 5a: 1d ed ixh r13, r14 + +0+05c <ixw>: + 5c: 15 0f ixw r15, r0 + +0+05e <jbf>: + 5e: ef d0 bf 0x0 + +0+060 <jbr>: + 60: f0 0e br 0x7e + +0+062 <jbsr>: + 62: 7f 0a jsri 0x.* + +0+064 <jbt>: + 64: e0 0c bt 0x7e + +0+066 <jmp>: + 66: 00 c1 jmp r1 + +0+068 <jmpi>: + 68: 70 09 jmpi 0x.* + +0+06a <jsr>: + 6a: 00 d2 jsr r2 + +0+06c <jsri>: + 6c: 7f 08 jsri 0x.* + +0+06e <ld.b>: + 6e: a3 04 ldb r3, \(r4, 0\) + +0+070 <ld.h>: + 70: c5 16 ldh r5, \(r6, 2\) + +0+072 <ld.w>: + 72: 87 18 ld r7, \(r8, 4\) + +0+074 <ldb>: + 74: a9 fa ldb r9, \(r10, 15\) + +0+076 <ldh>: + 76: cb fc ldh r11, \(r12, 30\) + +0+078 <ld>: + 78: 8d 5e ld r13, \(r14, 20\) + +0+07a <ldw>: + 7a: 8d fe ld r13, \(r14, 60\) + +0+07c <ldm>: + 7c: 00 62 ldm r2-r15, \(r0\) + +0+07e <fooloop>: + 7e: 00 41 ldq r4-r7, \(r1\) + +0+080 <loopt>: + 80: 04 8e loopt r8, 0x64 + +0+082 <LRW>: + 82: 79 03 lrw r9, 0x.* + +0+084 <lrw>: + 84: 79 04 lrw r9, 0x4321 + +0+086 <foolit>: + 86: 12 34 mov r4, r3 + +0+088 <lsl>: + 88: 1b ba lsl r10, r11 + +0+08a <lslc>: + 8a: 3c 0c lslc r12 + +0+08c <.XP0001>: + ... + 8c: ADDR32 .text + 90: ADDR32 .text.* + 94: 00 00 bkpt + 96: 43 21 .word 0x4321 + +0+098 <lsli>: + 98: 3d fd lsli r13, 31 + +0+09a <lsr>: + 9a: 0b fe lsr r14, r15 + +0+09c <lsrc>: + 9c: 3e 00 lsrc r0 + +0+09e <lsri>: + 9e: 3e 11 lsri r1, 1 + +0+0a0 <mclri>: + a0: 30 64 bclri r4, 6 + +0+0a2 <mfcr>: + a2: 10 02 mfcr r2, psr + +0+0a4 <mov>: + a4: 12 43 mov r3, r4 + +0+0a6 <movf>: + a6: 0a 65 movf r5, r6 + +0+0a8 <movi>: + a8: 67 f7 movi r7, 127 + +0+0aa <movt>: + aa: 02 98 movt r8, r9 + +0+0ac <mtcr>: + ac: 18 0a mtcr r10, psr + +0+0ae <mult>: + ae: 03 cb mult r11, r12 + +0+0b0 <mvc>: + b0: 00 2d mvc r13 + +0+0b2 <mvcv>: + b2: 00 3e mvcv r14 + +0+0b4 <neg>: + b4: 28 02 rsubi r2, 0 + +0+0b6 <not>: + b6: 01 ff not r15 + +0+0b8 <or>: + b8: 1e 10 or r0, r1 + +0+0ba <rfi>: + ba: 00 03 rfi + +0+0bc <rolc>: + bc: 06 66 addc r6, r6 + +0+0be <rori>: + be: 39 a9 rotli r9, 26 + +0+0c0 <rotlc>: + c0: 06 66 addc r6, r6 + +0+0c2 <rotli>: + c2: 38 a2 rotli r2, 10 + +0+0c4 <rotri>: + c4: 39 a9 rotli r9, 26 + +0+0c6 <rsub>: + c6: 14 43 rsub r3, r4 + +0+0c8 <rsubi>: + c8: 28 05 rsubi r5, 0 + +0+0ca <rte>: + ca: 00 02 rte + +0+0cc <rts>: + cc: 00 cf jmp r15 + +0+0ce <setc>: + ce: 0c 00 cmphs r0, r0 + +0+0d0 <sextb>: + d0: 01 56 sextb r6 + +0+0d2 <sexth>: + d2: 01 77 sexth r7 + +0+0d4 <st.b>: + d4: b8 09 stb r8, \(r9, 0\) + +0+0d6 <st.h>: + d6: da 1b sth r10, \(r11, 2\) + +0+0d8 <st.w>: + d8: 9c 1d st r12, \(r13, 4\) + +0+0da <stb>: + da: be ff stb r14, \(r15, 15\) + +0+0dc <sth>: + dc: d0 f1 sth r0, \(r1, 30\) + +0+0de <stw>: + de: 92 f3 st r2, \(r3, 60\) + +0+0e0 <st>: + e0: 94 05 st r4, \(r5, 0\) + +0+0e2 <stm>: + e2: 00 7e stm r14-r15, \(r0\) + +0+0e4 <stop>: + e4: 00 04 stop + +0+0e6 <stq>: + e6: 00 51 stq r4-r7, \(r1\) + +0+0e8 <subc>: + e8: 07 d7 subc r7, r13 + +0+0ea <subi>: + ea: 25 fe subi r14, 32 + +0+0ec <subu>: + ec: 05 39 subu r9, r3 + +0+0ee <sync>: + ee: 00 01 sync + +0+0f0 <tstlt>: + f0: 37 f5 btsti r5, 31 + +0+0f2 <tstne>: + f2: 2a 07 cmpnei r7, 0 + +0+0f4 <trap>: + f4: 00 0a trap 2 + +0+0f6 <tst>: + f6: 0e ee tst r14, r14 + +0+0f8 <tstnbz>: + f8: 01 92 tstnbz r2 + +0+0fa <wait>: + fa: 00 05 wait + +0+0fc <xor>: + fc: 17 0f xor r15, r0 + +0+0fe <xsr>: + fe: 38 0b xsr r11 + +0+0100 <xtrb0>: + 100: 01 31 xtrb0 r1, r1 + +0+0102 <xtrb1>: + 102: 01 22 xtrb1 r1, r2 + +0+0104 <xtrb2>: + 104: 01 10 xtrb2 r1, r0 + +0+0106 <xtrb3>: + 106: 01 0d xtrb3 r1, r13 + +0+0108 <zextb>: + 108: 01 48 zextb r8 + +0+010a <zexth>: + 10a: 01 64 zexth r4 + 10c: 0f 00 cmpne r0, r0 + 10e: 0f 00 cmpne r0, r0 diff --git a/gas/testsuite/gas/mcore/allinsn.exp b/gas/testsuite/gas/mcore/allinsn.exp new file mode 100644 index 0000000..9f57863 --- /dev/null +++ b/gas/testsuite/gas/mcore/allinsn.exp @@ -0,0 +1,5 @@ +# M*Core assembler testsuite. + +if [istarget mcore-*-*] { + run_dump_test "allinsn" +} diff --git a/gas/testsuite/gas/mcore/allinsn.s b/gas/testsuite/gas/mcore/allinsn.s new file mode 100644 index 0000000..8406840 --- /dev/null +++ b/gas/testsuite/gas/mcore/allinsn.s @@ -0,0 +1,146 @@ + .data +foodata: .word 42 + .text +footext: + +.macro test insn text="" + .export \insn +\insn: + \insn \text +.endm + + test abs r0 + test addc "r1,r2" // A double forward slash starts a line comment + test addi "r3, 1" # So does a hash + test addu "r4, r5" // White space between operands should be ignored + test and "r6,r7" ; test andi "r8,#2" // A semicolon seperates statements + test andn "r9, r10" + test asr "r11, R12" // Uppercase R is allowed as a register prefix + test asrc "r13" + test asri "r14,#0x1f" + test bclri "r15,0" + test bf footext + test bgeni "sp, 7" // r0 can also be refered to as 'sp' + test BGENI "r0, 8" // Officially upper case or mixed case + test BGENi "r0, 31" // mnemonics should not be allowed, but we relax this... + test bgenr "r1, r2" + test bkpt + test bmaski "r3,#8" + test BMASKI "r3,0x1f" + test br . // Dot means the current address + test brev r4 + test bseti "r5,30" + test bsr footext + test bt footext + test btsti "r6, 27" + test clrc + test clrf r7 + test clrt r8 + test cmphs "r9,r10" + test cmplt "r11,r12" + test cmplei "r11, 14" + test cmplti "r13,32" + test cmpne "r14, r15" + test cmpnei "r0,0" + test decf r1 + test decgt r2 + test declt r3 + test decne r4 + test dect r5 + test divs "r6,r1" + test divu "r8, r1" + test doze + test ff1 r10 + test incf r11 + test inct r12 + test ixh "r13,r14" + test ixw "r15,r0" + test jbf footext + test jbr fooloop + test jbsr footext + test jbt fooloop + test jmp r1 + test jmpi footext + test jsr r2 + test jsri footext + test ld.b "r3,(r4,0)" + test ld.h "r5 , ( r6, #2)" + test ld.w "r7, (r8, 0x4)" + test ldb "r9,(r10,#0xf)" + test ldh "r11, (r12, 30)" + test ld "r13, (r14, 20)" + test ldw "r13, (r14, 60)" + test ldm "r2-r15,(r0)" + .export fooloop +fooloop: + test ldq "r4-r7,(r1)" + test loopt "r8, fooloop" + test LRW "r9, [foolit]" + test lrw "r9, 0x4321" // PC rel indirect + .global foolit +foolit: + .word 0x1234 + test lsl "r10,r11" + test lslc r12 + .literals // Dump literals table + test lsli "r13,31" + test lsr "r14,r15" + test lsrc r0 + test lsri "r1,1" + test mclri "r4, 64" + test mfcr "r2, cr0" + test mov "r3,r4" + test movf "r5, r6" + test movi "r7, 127" + test movt "r8, r9" + test mtcr "r10, psr" + test mult "r11, r12" + test mvc r13 + test mvcv r14 + test neg r2 + test not r15 + test or "r0,r1" + test rfi + test rolc "r6, 1" + test rori "r9, 6" + test rotlc "r6, 1" + test rotli "r2, #10" + test rotri "r9, 6" + test rsub "r3, r4" + test rsubi "r5, 0x0" + test rte + test rts + test setc + test sextb r6 + test sexth r7 + test st.b "r8, (r9, 0)" + test st.h "r10, (r11, 2)" + test st.w "r12, (r13, 4)" + test stb "r14, (r15, 15)" + test sth "r0, (r1, 30)" + test stw "r2, (r3, 0x3c)" + test st "r4, (r5, 0)" + test stm "r14 - r15 , (r0)" + test stop + test stq "r4 - r7 , (r1)" + test subc "r7, r13" + test subi "r14, 32" + test subu "r9, r3" + test sync + test tstlt r5 + test tstne r7 + test trap 2 + test tst "r14, r14" + test tstnbz r2 + test wait + test xor "r15,r0" + test xsr r11 + test xtrb0 "r1, r1" + test xtrb1 "r1, r2" + test xtrb2 "r1, r0" + test xtrb3 "r1, r13" + test zextb r8 + test zexth r4 + clrc // These two instructions pad the object file + clrc // out to a 16 byte boundary. +
\ No newline at end of file diff --git a/gas/testsuite/gas/mips/abs.d b/gas/testsuite/gas/mips/abs.d new file mode 100644 index 0000000..c86d5c2 --- /dev/null +++ b/gas/testsuite/gas/mips/abs.d @@ -0,0 +1,15 @@ +#objdump: -dr --prefix-addresses -mmips:4000 +#name: MIPS abs + +# Test the abs macro. + +.*: +file format .*mips.* + +Disassembly of section .text: +0+0000 <[^>]*> bgez \$a0,0+000c <foo\+(0x|)c> +0+0004 <[^>]*> nop +0+0008 <[^>]*> neg \$a0,\$a0 +0+000c <[^>]*> bgez \$a1,0+0018 <foo\+(0x|)18> +0+0010 <[^>]*> move \$a0,\$a1 +0+0014 <[^>]*> neg \$a0,\$a1 + ... diff --git a/gas/testsuite/gas/mips/abs.s b/gas/testsuite/gas/mips/abs.s new file mode 100644 index 0000000..1f2172b --- /dev/null +++ b/gas/testsuite/gas/mips/abs.s @@ -0,0 +1,5 @@ +# Source file used to test the abs macro. +foo: + abs $4 + abs $4,$5 + .space 8 diff --git a/gas/testsuite/gas/mips/add.d b/gas/testsuite/gas/mips/add.d new file mode 100644 index 0000000..8c21d1d --- /dev/null +++ b/gas/testsuite/gas/mips/add.d @@ -0,0 +1,20 @@ +#objdump: -dr --prefix-addresses -mmips:4000 +#name: MIPS add + +# Test the add macro. + +.*: +file format .*mips.* + +Disassembly of section .text: +0+0000 <[^>]*> addi \$a0,\$a0,0 +0+0004 <[^>]*> addi \$a0,\$a0,1 +0+0008 <[^>]*> li \$at,0x8000 +0+000c <[^>]*> add \$a0,\$a0,\$at +0+0010 <[^>]*> addi \$a0,\$a0,-32768 +0+0014 <[^>]*> lui \$at,0x1 +0+0018 <[^>]*> add \$a0,\$a0,\$at +0+001c <[^>]*> lui \$at,0x1 +0+0020 <[^>]*> ori \$at,\$at,0xa5a5 +0+0024 <[^>]*> add \$a0,\$a0,\$at +0+0028 <[^>]*> addiu \$a0,\$a0,1 +0+002c <[^>]*> nop diff --git a/gas/testsuite/gas/mips/add.s b/gas/testsuite/gas/mips/add.s new file mode 100644 index 0000000..44e964b --- /dev/null +++ b/gas/testsuite/gas/mips/add.s @@ -0,0 +1,16 @@ +# Source file used to test the add macro. + +foo: + add $4,$4,0 + add $4,$4,1 + add $4,$4,0x8000 + add $4,$4,-0x8000 + add $4,$4,0x10000 + add $4,$4,0x1a5a5 + +# addu is handled the same way add is; just confirm that it isn't +# totally broken. + addu $4,$4,1 + +# Round to a 16 byte boundary, for ease in testing multiple targets. + nop diff --git a/gas/testsuite/gas/mips/and.d b/gas/testsuite/gas/mips/and.d new file mode 100644 index 0000000..8d61714 --- /dev/null +++ b/gas/testsuite/gas/mips/and.d @@ -0,0 +1,34 @@ +#objdump: -dr --prefix-addresses -mmips:4000 +#name: MIPS and + +# Test the and macro. + +.*: +file format .*mips.* + +Disassembly of section .text: +0+0000 <[^>]*> andi \$a0,\$a0,0x0 +0+0004 <[^>]*> andi \$a0,\$a0,0x1 +0+0008 <[^>]*> andi \$a0,\$a0,0x8000 +0+000c <[^>]*> li \$at,-32768 +0+0010 <[^>]*> and \$a0,\$a0,\$at +0+0014 <[^>]*> lui \$at,0x1 +0+0018 <[^>]*> and \$a0,\$a0,\$at +0+001c <[^>]*> lui \$at,0x1 +0+0020 <[^>]*> ori \$at,\$at,0xa5a5 +0+0024 <[^>]*> and \$a0,\$a0,\$at +0+0028 <[^>]*> ori \$a0,\$a1,0x0 +0+002c <[^>]*> nor \$a0,\$a0,\$zero +0+0030 <[^>]*> ori \$a0,\$a1,0x1 +0+0034 <[^>]*> nor \$a0,\$a0,\$zero +0+0038 <[^>]*> ori \$a0,\$a1,0x8000 +0+003c <[^>]*> nor \$a0,\$a0,\$zero +0+0040 <[^>]*> li \$at,-32768 +0+0044 <[^>]*> nor \$a0,\$a1,\$at +0+0048 <[^>]*> lui \$at,0x1 +0+004c <[^>]*> nor \$a0,\$a1,\$at +0+0050 <[^>]*> lui \$at,0x1 +0+0054 <[^>]*> ori \$at,\$at,0xa5a5 +0+0058 <[^>]*> nor \$a0,\$a1,\$at +0+005c <[^>]*> ori \$a0,\$a1,0x0 +0+0060 <[^>]*> xori \$a0,\$a1,0x0 + ... diff --git a/gas/testsuite/gas/mips/and.s b/gas/testsuite/gas/mips/and.s new file mode 100644 index 0000000..4dfc57e --- /dev/null +++ b/gas/testsuite/gas/mips/and.s @@ -0,0 +1,28 @@ +# Source file used to test the and macro. + +foo: + and $4,$4,0 + and $4,$4,1 + and $4,$4,0x8000 + and $4,$4,-0x8000 + and $4,$4,0x10000 + and $4,$4,0x1a5a5 + +# nor, or, and xor are handled by the same code. There is a special +# case for nor, so we test all variants. + + nor $4,$5,0 + nor $4,$5,1 + nor $4,$5,0x8000 + nor $4,$5,-0x8000 + nor $4,$5,0x10000 + nor $4,$5,0x1a5a5 + + or $4,$5,0 + + xor $4,$5,0 + + # Round to a 16 byte boundary, for ease in testing multiple targets. + nop + nop + nop diff --git a/gas/testsuite/gas/mips/beq.d b/gas/testsuite/gas/mips/beq.d new file mode 100644 index 0000000..a132934 --- /dev/null +++ b/gas/testsuite/gas/mips/beq.d @@ -0,0 +1,40 @@ +#objdump: -dr --prefix-addresses -mmips:4000 +#name: MIPS beq + +# Test the beq macro. + +.*: +file format .*mips.* + +Disassembly of section .text: +0+0000 <[^>]*> beq \$a0,\$a1,0+0000 <text_label> +0+0004 <[^>]*> nop +0+0008 <[^>]*> beqz \$a0,0+0000 <text_label> +0+000c <[^>]*> nop +0+0010 <[^>]*> li \$at,1 +0+0014 <[^>]*> beq \$a0,\$at,0+0000 <text_label> +0+0018 <[^>]*> nop +0+001c <[^>]*> li \$at,0x8000 +0+0020 <[^>]*> beq \$a0,\$at,0+0000 <text_label> +0+0024 <[^>]*> nop +0+0028 <[^>]*> li \$at,-32768 +0+002c <[^>]*> beq \$a0,\$at,0+0000 <text_label> +0+0030 <[^>]*> nop +0+0034 <[^>]*> lui \$at,0x1 +0+0038 <[^>]*> beq \$a0,\$at,0+0000 <text_label> +0+003c <[^>]*> nop +0+0040 <[^>]*> lui \$at,0x1 +0+0044 <[^>]*> ori \$at,\$at,0xa5a5 +0+0048 <[^>]*> beq \$a0,\$at,0+0000 <text_label> +0+004c <[^>]*> nop +0+0050 <[^>]*> bnez \$a0,0+0000 <text_label> +0+0054 <[^>]*> nop +0+0058 <[^>]*> beqzl \$a0,0+0000 <text_label> +0+005c <[^>]*> nop +0+0060 <[^>]*> bnezl \$a0,0+0000 <text_label> + ... +0+20068 <[^>]*> j 0+0000 <text_label> +[ ]*20068: (MIPS_JMP|JMPADDR|R_MIPS_26) .text +0+2006c <[^>]*> nop +0+20070 <[^>]*> jal 0+0000 <text_label> +[ ]*20070: (MIPS_JMP|JMPADDR|R_MIPS_26) .text + ... diff --git a/gas/testsuite/gas/mips/beq.s b/gas/testsuite/gas/mips/beq.s new file mode 100644 index 0000000..9922eec --- /dev/null +++ b/gas/testsuite/gas/mips/beq.s @@ -0,0 +1,28 @@ +# Source file used to test the beq macro. + .globl text_label .text +text_label: + beq $4,$5,text_label + beq $4,0,text_label + beq $4,1,text_label + beq $4,0x8000,text_label + beq $4,-0x8000,text_label + beq $4,0x10000,text_label + beq $4,0x1a5a5,text_label + +# bne is handled by the same code as beq. Just sanity check. + bne $4,0,text_label + +# Sanity check beql and bnel + .set mips2 + beql $4,0,text_label + bnel $4,0,text_label + +# Test that branches which overflow are converted to jumps. + .space 0x20000 + b text_label + bal text_label + +# Round to a 16 byte boundary, for ease in testing multiple targets. + nop + nop + nop diff --git a/gas/testsuite/gas/mips/bge.d b/gas/testsuite/gas/mips/bge.d new file mode 100644 index 0000000..ee3e27c --- /dev/null +++ b/gas/testsuite/gas/mips/bge.d @@ -0,0 +1,53 @@ +#objdump: -dr --prefix-addresses -mmips:4000 +#name: MIPS bge + +# Test the bge macro. + +.*: +file format .*mips.* + +Disassembly of section .text: +0+0000 <[^>]*> slt \$at,\$a0,\$a1 +0+0004 <[^>]*> beqz \$at,0+0000 <text_label> +0+0008 <[^>]*> nop +0+000c <[^>]*> bgez \$a0,0+0000 <text_label> +0+0010 <[^>]*> nop +0+0014 <[^>]*> blez \$a1,0+0000 <text_label> +0+0018 <[^>]*> nop +0+001c <[^>]*> bgez \$a0,0+0000 <text_label> +0+0020 <[^>]*> nop +0+0024 <[^>]*> bgtz \$a0,0+0000 <text_label> +0+0028 <[^>]*> nop +0+002c <[^>]*> slti \$at,\$a0,2 +0+0030 <[^>]*> beqz \$at,0+0000 <text_label> +0+0034 <[^>]*> nop +0+0038 <[^>]*> li \$at,0x8000 +0+003c <[^>]*> slt \$at,\$a0,\$at +0+0040 <[^>]*> beqz \$at,0+0000 <text_label> +0+0044 <[^>]*> nop +0+0048 <[^>]*> slti \$at,\$a0,-32768 +0+004c <[^>]*> beqz \$at,0+0000 <text_label> +0+0050 <[^>]*> nop +0+0054 <[^>]*> lui \$at,0x1 +0+0058 <[^>]*> slt \$at,\$a0,\$at +0+005c <[^>]*> beqz \$at,0+0000 <text_label> +0+0060 <[^>]*> nop +0+0064 <[^>]*> lui \$at,0x1 +0+0068 <[^>]*> ori \$at,\$at,0xa5a5 +0+006c <[^>]*> slt \$at,\$a0,\$at +0+0070 <[^>]*> beqz \$at,0+0000 <text_label> +0+0074 <[^>]*> nop +0+0078 <[^>]*> slt \$at,\$a1,\$a0 +0+007c <[^>]*> bnez \$at,0+0000 <text_label> +0+0080 <[^>]*> nop +0+0084 <[^>]*> bgtz \$a0,0+0000 <text_label> +0+0088 <[^>]*> nop +0+008c <[^>]*> bltz \$a1,0+0000 <text_label> +0+0090 <[^>]*> nop +0+0094 <[^>]*> bgtz \$a0,0+0000 <text_label> +0+0098 <[^>]*> nop +0+009c <[^>]*> slt \$at,\$a0,\$a1 +0+00a0 <[^>]*> beqzl \$at,0+0000 <text_label> +0+00a4 <[^>]*> nop +0+00a8 <[^>]*> slt \$at,\$a1,\$a0 +0+00ac <[^>]*> bnezl \$at,0+0000 <text_label> + ... diff --git a/gas/testsuite/gas/mips/bge.s b/gas/testsuite/gas/mips/bge.s new file mode 100644 index 0000000..405fd82 --- /dev/null +++ b/gas/testsuite/gas/mips/bge.s @@ -0,0 +1,31 @@ +# Source file used to test the bge macro. + +text_label: + bge $4,$5,text_label + bge $4,$0,text_label + bge $0,$5,text_label + bge $4,0,text_label + bge $4,1,text_label + bge $4,2,text_label + bge $4,0x8000,text_label + bge $4,-0x8000,text_label + bge $4,0x10000,text_label + bge $4,0x1a5a5,text_label + +# bgt is handled like bge, except when both arguments are registers. +# Just sanity check it otherwise. + bgt $4,$5,text_label + bgt $4,$0,text_label + bgt $0,$5,text_label + bgt $4,0,text_label + +# Sanity test bgel and bgtl + .set mips2 + bgel $4,$5,text_label + bgtl $4,$5,text_label + +# Round to a 16 byte boundary, for ease in testing multiple targets. + nop + nop + nop + nop diff --git a/gas/testsuite/gas/mips/bgeu.d b/gas/testsuite/gas/mips/bgeu.d new file mode 100644 index 0000000..93a6040 --- /dev/null +++ b/gas/testsuite/gas/mips/bgeu.d @@ -0,0 +1,47 @@ +#objdump: -dr --prefix-addresses -mmips:4000 +#name: MIPS bgeu + +# Test the bgeu macro. + +.*: +file format .*mips.* + +Disassembly of section .text: +0+0000 <[^>]*> sltu \$at,\$a0,\$a1 +0+0004 <[^>]*> beqz \$at,0+0000 <text_label> +0+0008 <[^>]*> nop +0+000c <[^>]*> beq \$zero,\$a1,0+0000 <text_label> +0+0010 <[^>]*> nop +0+0014 <[^>]*> bnez \$a0,0+0000 <text_label> +0+0018 <[^>]*> nop +0+001c <[^>]*> sltiu \$at,\$a0,2 +0+0020 <[^>]*> beqz \$at,0+0000 <text_label> +0+0024 <[^>]*> nop +0+0028 <[^>]*> li \$at,0x8000 +0+002c <[^>]*> sltu \$at,\$a0,\$at +0+0030 <[^>]*> beqz \$at,0+0000 <text_label> +0+0034 <[^>]*> nop +0+0038 <[^>]*> sltiu \$at,\$a0,-32768 +0+003c <[^>]*> beqz \$at,0+0000 <text_label> +0+0040 <[^>]*> nop +0+0044 <[^>]*> lui \$at,0x1 +0+0048 <[^>]*> sltu \$at,\$a0,\$at +0+004c <[^>]*> beqz \$at,0+0000 <text_label> +0+0050 <[^>]*> nop +0+0054 <[^>]*> lui \$at,0x1 +0+0058 <[^>]*> ori \$at,\$at,0xa5a5 +0+005c <[^>]*> sltu \$at,\$a0,\$at +0+0060 <[^>]*> beqz \$at,0+0000 <text_label> +0+0064 <[^>]*> nop +0+0068 <[^>]*> sltu \$at,\$a1,\$a0 +0+006c <[^>]*> bnez \$at,0+0000 <text_label> +0+0070 <[^>]*> nop +0+0074 <[^>]*> bnez \$a0,0+0000 <text_label> +0+0078 <[^>]*> nop +0+007c <[^>]*> bnez \$a0,0+0000 <text_label> +0+0080 <[^>]*> nop +0+0084 <[^>]*> sltu \$at,\$a0,\$a1 +0+0088 <[^>]*> beqzl \$at,0+0000 <text_label> +0+008c <[^>]*> nop +0+0090 <[^>]*> sltu \$at,\$a1,\$a0 +0+0094 <[^>]*> bnezl \$at,0+0000 <text_label> + ... diff --git a/gas/testsuite/gas/mips/bgeu.s b/gas/testsuite/gas/mips/bgeu.s new file mode 100644 index 0000000..1c37f96 --- /dev/null +++ b/gas/testsuite/gas/mips/bgeu.s @@ -0,0 +1,27 @@ +# Source file used to test the bgeu macro. + +text_label: + bgeu $4,$5,text_label + bgeu $0,$5,text_label + # A second argument of 0 or $0 is always true + bgeu $4,1,text_label + bgeu $4,2,text_label + bgeu $4,0x8000,text_label + bgeu $4,-0x8000,text_label + bgeu $4,0x10000,text_label + bgeu $4,0x1a5a5,text_label + +# bgtu is handled like bgeu, except when both arguments are registers. +# Just sanity check it otherwise. + bgtu $4,$5,text_label + bgtu $4,$0,text_label + bgtu $4,0,text_label + +# Sanity test bgeul and bgtul + .set mips2 + bgeul $4,$5,text_label + bgtul $4,$5,text_label + +# Round to a 16 byte boundary, for ease in testing multiple targets. + nop + nop diff --git a/gas/testsuite/gas/mips/blt.d b/gas/testsuite/gas/mips/blt.d new file mode 100644 index 0000000..fc10e23 --- /dev/null +++ b/gas/testsuite/gas/mips/blt.d @@ -0,0 +1,53 @@ +#objdump: -dr --prefix-addresses -mmips:4000 +#name: MIPS blt + +# Test the blt macro. + +.*: +file format .*mips.* + +Disassembly of section .text: +0+0000 <[^>]*> slt \$at,\$a0,\$a1 +0+0004 <[^>]*> bnez \$at,0+0000 <text_label> +0+0008 <[^>]*> nop +0+000c <[^>]*> bltz \$a0,0+0000 <text_label> +0+0010 <[^>]*> nop +0+0014 <[^>]*> bgtz \$a1,0+0000 <text_label> +0+0018 <[^>]*> nop +0+001c <[^>]*> bltz \$a0,0+0000 <text_label> +0+0020 <[^>]*> nop +0+0024 <[^>]*> blez \$a0,0+0000 <text_label> +0+0028 <[^>]*> nop +0+002c <[^>]*> slti \$at,\$a0,2 +0+0030 <[^>]*> bnez \$at,0+0000 <text_label> +0+0034 <[^>]*> nop +0+0038 <[^>]*> li \$at,0x8000 +0+003c <[^>]*> slt \$at,\$a0,\$at +0+0040 <[^>]*> bnez \$at,0+0000 <text_label> +0+0044 <[^>]*> nop +0+0048 <[^>]*> slti \$at,\$a0,-32768 +0+004c <[^>]*> bnez \$at,0+0000 <text_label> +0+0050 <[^>]*> nop +0+0054 <[^>]*> lui \$at,0x1 +0+0058 <[^>]*> slt \$at,\$a0,\$at +0+005c <[^>]*> bnez \$at,0+0000 <text_label> +0+0060 <[^>]*> nop +0+0064 <[^>]*> lui \$at,0x1 +0+0068 <[^>]*> ori \$at,\$at,0xa5a5 +0+006c <[^>]*> slt \$at,\$a0,\$at +0+0070 <[^>]*> bnez \$at,0+0000 <text_label> +0+0074 <[^>]*> nop +0+0078 <[^>]*> slt \$at,\$a1,\$a0 +0+007c <[^>]*> beqz \$at,0+0000 <text_label> +0+0080 <[^>]*> nop +0+0084 <[^>]*> blez \$a0,0+0000 <text_label> +0+0088 <[^>]*> nop +0+008c <[^>]*> bgez \$a1,0+0000 <text_label> +0+0090 <[^>]*> nop +0+0094 <[^>]*> blez \$a0,0+0000 <text_label> +0+0098 <[^>]*> nop +0+009c <[^>]*> slt \$at,\$a0,\$a1 +0+00a0 <[^>]*> bnezl \$at,0+0000 <text_label> +0+00a4 <[^>]*> nop +0+00a8 <[^>]*> slt \$at,\$a1,\$a0 +0+00ac <[^>]*> beqzl \$at,0+0000 <text_label> + ... diff --git a/gas/testsuite/gas/mips/blt.s b/gas/testsuite/gas/mips/blt.s new file mode 100644 index 0000000..0003056 --- /dev/null +++ b/gas/testsuite/gas/mips/blt.s @@ -0,0 +1,31 @@ +# Source file used to test the blt macro. + +text_label: + blt $4,$5,text_label + blt $4,$0,text_label + blt $0,$5,text_label + blt $4,0,text_label + blt $4,1,text_label + blt $4,2,text_label + blt $4,0x8000,text_label + blt $4,-0x8000,text_label + blt $4,0x10000,text_label + blt $4,0x1a5a5,text_label + +# ble is handled like blt, except when both arguments are registers. +# Just sanity check it otherwise. + ble $4,$5,text_label + ble $4,$0,text_label + ble $0,$5,text_label + ble $4,0,text_label + +# Sanity test bltl and blel + .set mips2 + bltl $4,$5,text_label + blel $4,$5,text_label + +# Round to a 16 byte boundary, for ease in testing multiple targets. + nop + nop + nop + nop diff --git a/gas/testsuite/gas/mips/bltu.d b/gas/testsuite/gas/mips/bltu.d new file mode 100644 index 0000000..9c261c6 --- /dev/null +++ b/gas/testsuite/gas/mips/bltu.d @@ -0,0 +1,47 @@ +#objdump: -dr --prefix-addresses -mmips:4000 +#name: MIPS bltu + +# Test the bltu macro. + +.*: +file format .*mips.* + +Disassembly of section .text: +0+0000 <[^>]*> sltu \$at,\$a0,\$a1 +0+0004 <[^>]*> bnez \$at,0+0000 <text_label> +0+0008 <[^>]*> nop +0+000c <[^>]*> bne \$zero,\$a1,0+0000 <text_label> +0+0010 <[^>]*> nop +0+0014 <[^>]*> beqz \$a0,0+0000 <text_label> +0+0018 <[^>]*> nop +0+001c <[^>]*> sltiu \$at,\$a0,2 +0+0020 <[^>]*> bnez \$at,0+0000 <text_label> +0+0024 <[^>]*> nop +0+0028 <[^>]*> li \$at,0x8000 +0+002c <[^>]*> sltu \$at,\$a0,\$at +0+0030 <[^>]*> bnez \$at,0+0000 <text_label> +0+0034 <[^>]*> nop +0+0038 <[^>]*> sltiu \$at,\$a0,-32768 +0+003c <[^>]*> bnez \$at,0+0000 <text_label> +0+0040 <[^>]*> nop +0+0044 <[^>]*> lui \$at,0x1 +0+0048 <[^>]*> sltu \$at,\$a0,\$at +0+004c <[^>]*> bnez \$at,0+0000 <text_label> +0+0050 <[^>]*> nop +0+0054 <[^>]*> lui \$at,0x1 +0+0058 <[^>]*> ori \$at,\$at,0xa5a5 +0+005c <[^>]*> sltu \$at,\$a0,\$at +0+0060 <[^>]*> bnez \$at,0+0000 <text_label> +0+0064 <[^>]*> nop +0+0068 <[^>]*> sltu \$at,\$a1,\$a0 +0+006c <[^>]*> beqz \$at,0+0000 <text_label> +0+0070 <[^>]*> nop +0+0074 <[^>]*> beqz \$a0,0+0000 <text_label> +0+0078 <[^>]*> nop +0+007c <[^>]*> beqz \$a0,0+0000 <text_label> +0+0080 <[^>]*> nop +0+0084 <[^>]*> sltu \$at,\$a0,\$a1 +0+0088 <[^>]*> bnezl \$at,0+0000 <text_label> +0+008c <[^>]*> nop +0+0090 <[^>]*> sltu \$at,\$a1,\$a0 +0+0094 <[^>]*> beqzl \$at,0+0000 <text_label> + ... diff --git a/gas/testsuite/gas/mips/bltu.s b/gas/testsuite/gas/mips/bltu.s new file mode 100644 index 0000000..44b1ae6 --- /dev/null +++ b/gas/testsuite/gas/mips/bltu.s @@ -0,0 +1,27 @@ +# Source file used to test the bltu macro. + +text_label: + bltu $4,$5,text_label + bltu $0,$5,text_label + # A second argument of 0 or $0 is always false + bltu $4,1,text_label + bltu $4,2,text_label + bltu $4,0x8000,text_label + bltu $4,-0x8000,text_label + bltu $4,0x10000,text_label + bltu $4,0x1a5a5,text_label + +# bleu is handled like bltu, except when both arguments are registers. +# Just sanity check it otherwise. + bleu $4,$5,text_label + bleu $4,$0,text_label + bleu $4,0,text_label + +# Sanity test bltul and bleul + .set mips2 + bltul $4,$5,text_label + bleul $4,$5,text_label + +# Round to a 16 byte boundary, for ease in testing multiple targets. + nop + nop diff --git a/gas/testsuite/gas/mips/break20.d b/gas/testsuite/gas/mips/break20.d new file mode 100644 index 0000000..4498a4c --- /dev/null +++ b/gas/testsuite/gas/mips/break20.d @@ -0,0 +1,18 @@ +#as: -mcpu=r3900 +#objdump: -dr --prefix-addresses -mmips:3900 +#name: MIPS 20-bit break + +.*: +file format .*mips.* + +Disassembly of section .text: +0+0000 <[^>]*> break +0+0004 <[^>]*> break +0+0008 <[^>]*> break 0x14 +0+000c <[^>]*> break 0x14,0x28 +0+0010 <[^>]*> break 0x3ff,0x3ff +0+0014 <[^>]*> sdbbp +0+0018 <[^>]*> sdbbp +0+001c <[^>]*> sdbbp 0x14 +0+0020 <[^>]*> sdbbp 0x14,0x28 +0+0024 <[^>]*> sdbbp 0x3ff,0x3ff + ...
\ No newline at end of file diff --git a/gas/testsuite/gas/mips/break20.s b/gas/testsuite/gas/mips/break20.s new file mode 100644 index 0000000..ee35b0e --- /dev/null +++ b/gas/testsuite/gas/mips/break20.s @@ -0,0 +1,17 @@ +# Source file used to test the 20-bit break instructions +foo: + break + break 0 + break 20 + break 20,40 + break 1023,1023 + + sdbbp + sdbbp 0 + sdbbp 20 + sdbbp 20,40 + sdbbp 1023,1023 + +# force some padding, to make objdump consistently report that there's some +# here... + .space 8 diff --git a/gas/testsuite/gas/mips/delay.d b/gas/testsuite/gas/mips/delay.d new file mode 100644 index 0000000..93dc0ec --- /dev/null +++ b/gas/testsuite/gas/mips/delay.d @@ -0,0 +1,20 @@ +#objdump: -dr --prefix-addresses -mmips:4000 +#name: MIPS delay +#as: -mips3 -mcpu=r4000 + +# +# Gas should produce nop's after mtc1 and related +# insn's if the target fpr is used in the +# immediatly following insn. See also nodelay.d. +# + +.*: +file format .*mips.* + +Disassembly of section .text: +0+0000 <[^>]*> mtc1 \$zero,\$f0 +0+0004 <[^>]*> nop +0+0008 <[^>]*> cvt.d.w \$f0,\$f0 +0+000c <[^>]*> mtc1 \$zero,\$f1 +0+0010 <[^>]*> nop +0+0014 <[^>]*> cvt.d.w \$f1,\$f1 + ... diff --git a/gas/testsuite/gas/mips/delay.s b/gas/testsuite/gas/mips/delay.s new file mode 100644 index 0000000..5ee2f00 --- /dev/null +++ b/gas/testsuite/gas/mips/delay.s @@ -0,0 +1,8 @@ +# Source file used to test the abs macro. +foo: + mtc1 $0,$f0 + cvt.d.w $f0,$f0 + mtc1 $0,$f1 + cvt.d.w $f1,$f1 + .space 8 + diff --git a/gas/testsuite/gas/mips/div-ilocks.d b/gas/testsuite/gas/mips/div-ilocks.d new file mode 100644 index 0000000..75856d3 --- /dev/null +++ b/gas/testsuite/gas/mips/div-ilocks.d @@ -0,0 +1,110 @@ +#objdump: -dr --prefix-addresses -mmips:4000 +#name: MIPS div +#source: div.s + +# Test the div macro. + +.*: +file format .*mips.* + +Disassembly of section .text: +0+0000 <[^>]*> div \$zero,\$a0,\$a1 +0+0004 <[^>]*> bnez \$a1,0+0010 <foo\+0x10> +0+0008 <[^>]*> div \$zero,\$a0,\$a1 +0+000c <[^>]*> break (0x0,0x7|0x7) +0+0010 <[^>]*> li \$at,-1 +0+0014 <[^>]*> bne \$a1,\$at,0+0028 <foo\+0x28> +0+0018 <[^>]*> lui \$at,0x8000 +0+001c <[^>]*> bne \$a0,\$at,0+0028 <foo\+0x28> +0+0020 <[^>]*> nop +0+0024 <[^>]*> break (0x0,0x6|0x6) +0+0028 <[^>]*> mflo \$a0 +0+002c <[^>]*> bnez \$a2,0+0038 <foo\+0x38> +0+0030 <[^>]*> div \$zero,\$a1,\$a2 +0+0034 <[^>]*> break (0x0,0x7|0x7) +0+0038 <[^>]*> li \$at,-1 +0+003c <[^>]*> bne \$a2,\$at,0+0050 <foo\+0x50> +0+0040 <[^>]*> lui \$at,0x8000 +0+0044 <[^>]*> bne \$a1,\$at,0+0050 <foo\+0x50> +0+0048 <[^>]*> nop +0+004c <[^>]*> break (0x0,0x6|0x6) +0+0050 <[^>]*> mflo \$a0 +0+0054 <[^>]*> move \$a0,\$a0 +0+0058 <[^>]*> move \$a0,\$a1 +0+005c <[^>]*> neg \$a0,\$a0 +0+0060 <[^>]*> neg \$a0,\$a1 +0+0064 <[^>]*> li \$at,2 +0+0068 <[^>]*> div \$zero,\$a0,\$at +0+006c <[^>]*> mflo \$a0 +0+0070 <[^>]*> li \$at,2 +0+0074 <[^>]*> div \$zero,\$a1,\$at +0+0078 <[^>]*> mflo \$a0 +0+007c <[^>]*> li \$at,0x8000 +0+0080 <[^>]*> div \$zero,\$a0,\$at +0+0084 <[^>]*> mflo \$a0 +0+0088 <[^>]*> li \$at,0x8000 +0+008c <[^>]*> div \$zero,\$a1,\$at +0+0090 <[^>]*> mflo \$a0 +0+0094 <[^>]*> li \$at,-32768 +0+0098 <[^>]*> div \$zero,\$a0,\$at +0+009c <[^>]*> mflo \$a0 +0+00a0 <[^>]*> li \$at,-32768 +0+00a4 <[^>]*> div \$zero,\$a1,\$at +0+00a8 <[^>]*> mflo \$a0 +0+00ac <[^>]*> lui \$at,0x1 +0+00b0 <[^>]*> div \$zero,\$a0,\$at +0+00b4 <[^>]*> mflo \$a0 +0+00b8 <[^>]*> lui \$at,0x1 +0+00bc <[^>]*> div \$zero,\$a1,\$at +0+00c0 <[^>]*> mflo \$a0 +0+00c4 <[^>]*> lui \$at,0x1 +0+00c8 <[^>]*> ori \$at,\$at,0xa5a5 +0+00cc <[^>]*> div \$zero,\$a0,\$at +0+00d0 <[^>]*> mflo \$a0 +0+00d4 <[^>]*> lui \$at,0x1 +0+00d8 <[^>]*> ori \$at,\$at,0xa5a5 +0+00dc <[^>]*> div \$zero,\$a1,\$at +0+00e0 <[^>]*> mflo \$a0 +0+00e4 <[^>]*> divu \$zero,\$a0,\$a1 +0+00e8 <[^>]*> bnez \$a1,0+0f4 <foo\+0xf4> +0+00ec <[^>]*> divu \$zero,\$a0,\$a1 +0+00f0 <[^>]*> break (0x0,0x7|0x7) +0+00f4 <[^>]*> mflo \$a0 +0+00f8 <[^>]*> bnez \$a2,0+0104 <foo\+0x104> +0+00fc <[^>]*> divu \$zero,\$a1,\$a2 +0+0100 <[^>]*> break (0x0,0x7|0x7) +0+0104 <[^>]*> mflo \$a0 +0+0108 <[^>]*> move \$a0,\$a0 +0+010c <[^>]*> bnez \$a2,0+0118 <foo\+0x118> +0+0110 <[^>]*> div \$zero,\$a1,\$a2 +0+0114 <[^>]*> break (0x0,0x7|0x7) +0+0118 <[^>]*> li \$at,-1 +0+011c <[^>]*> bne \$a2,\$at,0+0130 <foo\+0x130> +0+0120 <[^>]*> lui \$at,0x8000 +0+0124 <[^>]*> bne \$a1,\$at,0+0130 <foo\+0x130> +0+0128 <[^>]*> nop +0+012c <[^>]*> break (0x0,0x6|0x6) +0+0130 <[^>]*> mfhi \$a0 +0+0134 <[^>]*> li \$at,2 +0+0138 <[^>]*> divu \$zero,\$a1,\$at +0+013c <[^>]*> mfhi \$a0 +0+0140 <[^>]*> bnez \$a2,0+014c <foo\+0x14c> +0+0144 <[^>]*> ddiv \$zero,\$a1,\$a2 +0+0148 <[^>]*> break (0x0,0x7|0x7) +0+014c <[^>]*> daddiu \$at,\$zero,-1 +0+0150 <[^>]*> bne \$a2,\$at,0+0168 <foo\+0x168> +0+0154 <[^>]*> daddiu \$at,\$zero,1 +0+0158 <[^>]*> dsll32 \$at,\$at,0x1f +0+015c <[^>]*> bne \$a1,\$at,0+0168 <foo\+0x168> +0+0160 <[^>]*> nop +0+0164 <[^>]*> break (0x0,0x6|0x6) +0+0168 <[^>]*> mflo \$a0 +0+016c <[^>]*> li \$at,2 +0+0170 <[^>]*> ddivu \$zero,\$a1,\$at +0+0174 <[^>]*> mflo \$a0 +0+0178 <[^>]*> li \$at,0x8000 +0+017c <[^>]*> ddiv \$zero,\$a1,\$at +0+0180 <[^>]*> mfhi \$a0 +0+0184 <[^>]*> li \$at,-32768 +0+0188 <[^>]*> ddivu \$zero,\$a1,\$at +0+018c <[^>]*> mfhi \$a0 + ... diff --git a/gas/testsuite/gas/mips/div.d b/gas/testsuite/gas/mips/div.d new file mode 100644 index 0000000..fec5bb2 --- /dev/null +++ b/gas/testsuite/gas/mips/div.d @@ -0,0 +1,125 @@ +#objdump: -dr --prefix-addresses -mmips:4000 +#as: -mcpu=r4000 +#name: MIPS div + +# Test the div macro. + +.*: +file format .*mips.* + +Disassembly of section .text: +0+0000 <[^>]*> div \$zero,\$a0,\$a1 +0+0004 <[^>]*> bnez \$a1,0+0010 <foo\+0x10> +0+0008 <[^>]*> div \$zero,\$a0,\$a1 +0+000c <[^>]*> break (0x0,0x7|0x7) +0+0010 <[^>]*> li \$at,-1 +0+0014 <[^>]*> bne \$a1,\$at,0+0028 <foo\+0x28> +0+0018 <[^>]*> lui \$at,0x8000 +0+001c <[^>]*> bne \$a0,\$at,0+0028 <foo\+0x28> +0+0020 <[^>]*> nop +0+0024 <[^>]*> break (0x0,0x6|0x6) +0+0028 <[^>]*> mflo \$a0 +0+002c <[^>]*> nop +0+0030 <[^>]*> bnez \$a2,0+003c <foo\+0x3c> +0+0034 <[^>]*> div \$zero,\$a1,\$a2 +0+0038 <[^>]*> break (0x0,0x7|0x7) +0+003c <[^>]*> li \$at,-1 +0+0040 <[^>]*> bne \$a2,\$at,0+0054 <foo\+0x54> +0+0044 <[^>]*> lui \$at,0x8000 +0+0048 <[^>]*> bne \$a1,\$at,0+0054 <foo\+0x54> +0+004c <[^>]*> nop +0+0050 <[^>]*> break (0x0,0x6|0x6) +0+0054 <[^>]*> mflo \$a0 +0+0058 <[^>]*> move \$a0,\$a0 +0+005c <[^>]*> move \$a0,\$a1 +0+0060 <[^>]*> neg \$a0,\$a0 +0+0064 <[^>]*> neg \$a0,\$a1 +0+0068 <[^>]*> li \$at,2 +0+006c <[^>]*> div \$zero,\$a0,\$at +0+0070 <[^>]*> mflo \$a0 +0+0074 <[^>]*> li \$at,2 +0+0078 <[^>]*> nop +0+007c <[^>]*> div \$zero,\$a1,\$at +0+0080 <[^>]*> mflo \$a0 +0+0084 <[^>]*> li \$at,0x8000 +0+0088 <[^>]*> nop +0+008c <[^>]*> div \$zero,\$a0,\$at +0+0090 <[^>]*> mflo \$a0 +0+0094 <[^>]*> li \$at,0x8000 +0+0098 <[^>]*> nop +0+009c <[^>]*> div \$zero,\$a1,\$at +0+00a0 <[^>]*> mflo \$a0 +0+00a4 <[^>]*> li \$at,-32768 +0+00a8 <[^>]*> nop +0+00ac <[^>]*> div \$zero,\$a0,\$at +0+00b0 <[^>]*> mflo \$a0 +0+00b4 <[^>]*> li \$at,-32768 +0+00b8 <[^>]*> nop +0+00bc <[^>]*> div \$zero,\$a1,\$at +0+00c0 <[^>]*> mflo \$a0 +0+00c4 <[^>]*> lui \$at,0x1 +0+00c8 <[^>]*> nop +0+00cc <[^>]*> div \$zero,\$a0,\$at +0+00d0 <[^>]*> mflo \$a0 +0+00d4 <[^>]*> lui \$at,0x1 +0+00d8 <[^>]*> nop +0+00dc <[^>]*> div \$zero,\$a1,\$at +0+00e0 <[^>]*> mflo \$a0 +0+00e4 <[^>]*> lui \$at,0x1 +0+00e8 <[^>]*> ori \$at,\$at,0xa5a5 +0+00ec <[^>]*> div \$zero,\$a0,\$at +0+00f0 <[^>]*> mflo \$a0 +0+00f4 <[^>]*> lui \$at,0x1 +0+00f8 <[^>]*> ori \$at,\$at,0xa5a5 +0+00fc <[^>]*> div \$zero,\$a1,\$at +0+0100 <[^>]*> mflo \$a0 + ... +0+010c <[^>]*> divu \$zero,\$a0,\$a1 +0+0110 <[^>]*> bnez \$a1,0+011c <foo\+0x11c> +0+0114 <[^>]*> divu \$zero,\$a0,\$a1 +0+0118 <[^>]*> break (0x0,0x7|0x7) +0+011c <[^>]*> mflo \$a0 +0+0120 <[^>]*> nop +0+0124 <[^>]*> bnez \$a2,0+0130 <foo\+0x130> +0+0128 <[^>]*> divu \$zero,\$a1,\$a2 +0+012c <[^>]*> break (0x0,0x7|0x7) +0+0130 <[^>]*> mflo \$a0 +0+0134 <[^>]*> move \$a0,\$a0 +0+0138 <[^>]*> bnez \$a2,0+0144 <foo\+0x144> +0+013c <[^>]*> div \$zero,\$a1,\$a2 +0+0140 <[^>]*> break (0x0,0x7|0x7) +0+0144 <[^>]*> li \$at,-1 +0+0148 <[^>]*> bne \$a2,\$at,0+015c <foo\+0x15c> +0+014c <[^>]*> lui \$at,0x8000 +0+0150 <[^>]*> bne \$a1,\$at,0+015c <foo\+0x15c> +0+0154 <[^>]*> nop +0+0158 <[^>]*> break (0x0,0x6|0x6) +0+015c <[^>]*> mfhi \$a0 +0+0160 <[^>]*> li \$at,2 +0+0164 <[^>]*> nop +0+0168 <[^>]*> divu \$zero,\$a1,\$at +0+016c <[^>]*> mfhi \$a0 +0+0170 <[^>]*> nop +0+0174 <[^>]*> bnez \$a2,0+0180 <foo\+0x180> +0+0178 <[^>]*> ddiv \$zero,\$a1,\$a2 +0+017c <[^>]*> break (0x0,0x7|0x7) +0+0180 <[^>]*> daddiu \$at,\$zero,-1 +0+0184 <[^>]*> bne \$a2,\$at,0+019c <foo\+0x19c> +0+0188 <[^>]*> daddiu \$at,\$zero,1 +0+018c <[^>]*> dsll32 \$at,\$at,0x1f +0+0190 <[^>]*> bne \$a1,\$at,0+019c <foo\+0x19c> +0+0194 <[^>]*> nop +0+0198 <[^>]*> break (0x0,0x6|0x6) +0+019c <[^>]*> mflo \$a0 +0+01a0 <[^>]*> li \$at,2 +0+01a4 <[^>]*> nop +0+01a8 <[^>]*> ddivu \$zero,\$a1,\$at +0+01ac <[^>]*> mflo \$a0 +0+01b0 <[^>]*> li \$at,0x8000 +0+01b4 <[^>]*> nop +0+01b8 <[^>]*> ddiv \$zero,\$a1,\$at +0+01bc <[^>]*> mfhi \$a0 +0+01c0 <[^>]*> li \$at,-32768 +0+01c4 <[^>]*> nop +0+01c8 <[^>]*> ddivu \$zero,\$a1,\$at +0+01cc <[^>]*> mfhi \$a0 + ... diff --git a/gas/testsuite/gas/mips/div.s b/gas/testsuite/gas/mips/div.s new file mode 100644 index 0000000..6d99906 --- /dev/null +++ b/gas/testsuite/gas/mips/div.s @@ -0,0 +1,41 @@ +# Source file used to test the div macro. +foo: + div $0,$4,$5 + div $4,$5 + div $4,$5,$6 + div $4,1 + div $4,$5,1 + div $4,-1 + div $4,$5,-1 + div $4,2 + div $4,$5,2 + div $4,0x8000 + div $4,$5,0x8000 + div $4,-0x8000 + div $4,$5,-0x8000 + div $4,0x10000 + div $4,$5,0x10000 + div $4,0x1a5a5 + div $4,$5,0x1a5a5 + +# divu is like div, except when both arguments are registers. +# Just sanity check it otherwise. + divu $0,$4,$5 + divu $4,$5 + divu $4,$5,$6 + divu $4,1 + +# rem is like div, remu is like divu + rem $4,$5,$6 + remu $4,$5,2 + +# Sanity check the 64 bit versions. + .set mips3 + ddiv $4,$5,$6 + ddivu $4,$5,2 + drem $4,$5,0x8000 + dremu $4,$5,-0x8000 + +# force some padding, to make objdump consistently report that there's some +# here... + .space 8 diff --git a/gas/testsuite/gas/mips/dli.d b/gas/testsuite/gas/mips/dli.d new file mode 100644 index 0000000..72b445e --- /dev/null +++ b/gas/testsuite/gas/mips/dli.d @@ -0,0 +1,115 @@ +#objdump: -dr --prefix-addresses -mmips:4000 +#name: MIPS dli +#as: -mips3 + +# Test the dli macro. + +.*: +file format .*mips.* + +Disassembly of section .text: +0+0000 <[^>]*> li \$a0,0 +0+0004 <[^>]*> li \$a0,1 +0+0008 <[^>]*> li \$a0,-1 +0+000c <[^>]*> li \$a0,0x8000 +0+0010 <[^>]*> li \$a0,-32768 +0+0014 <[^>]*> lui \$a0,0x1 +0+0018 <[^>]*> lui \$a0,0x1 +0+001c <[^>]*> ori \$a0,\$a0,0xa5a5 +0+0020 <[^>]*> li \$a0,0x8000 +0+0024 <[^>]*> dsll \$a0,\$a0,0x10 +0+0028 <[^>]*> ori \$a0,\$a0,0x1234 +0+002c <[^>]*> lui \$a0,0xffff +0+0030 <[^>]*> dsrl32 \$a0,\$a0,0x0 +0+0034 <[^>]*> lui \$a0,0xffff +0+0038 <[^>]*> dsrl32 \$a0,\$a0,0x0 +0+003c <[^>]*> li \$a0,-1 +0+0040 <[^>]*> li \$a0,-1 +0+0044 <[^>]*> dsrl \$a0,\$a0,0xc +0+0048 <[^>]*> lui \$a0,0x8000 +0+004c <[^>]*> ori \$a0,\$a0,0x1234 +0+0050 <[^>]*> li \$a0,-32768 +0+0054 <[^>]*> dsll \$a0,\$a0,0x10 +0+0058 <[^>]*> ori \$a0,\$a0,0x1234 +0+005c <[^>]*> dsll \$a0,\$a0,0x10 +0+0060 <[^>]*> ori \$a0,\$a0,0x5678 +0+0064 <[^>]*> lui \$a0,0x8000 +0+0068 <[^>]*> ori \$a0,\$a0,0x1234 +0+006c <[^>]*> dsll \$a0,\$a0,0x10 +0+0070 <[^>]*> ori \$a0,\$a0,0x5678 +0+0074 <[^>]*> dsll \$a0,\$a0,0x10 +0+0078 <[^>]*> li \$a0,-30875 +0+007c <[^>]*> lui \$a0,0xffff +0+0080 <[^>]*> ori \$a0,\$a0,0x4321 +0+0084 <[^>]*> li \$a0,-16 +0+0088 <[^>]*> li \$a0,-256 +0+008c <[^>]*> li \$a0,-4096 +0+0090 <[^>]*> lui \$a0,0xffff +0+0094 <[^>]*> lui \$a0,0xfff0 +0+0098 <[^>]*> lui \$a0,0xff00 +0+009c <[^>]*> lui \$a0,0xf000 +0+00a0 <[^>]*> li \$a0,-1 +0+00a4 <[^>]*> dsll32 \$a0,\$a0,0x0 +0+00a8 <[^>]*> li \$a0,-16 +0+00ac <[^>]*> dsll32 \$a0,\$a0,0x0 +0+00b0 <[^>]*> li \$a0,-256 +0+00b4 <[^>]*> dsll32 \$a0,\$a0,0x0 +0+00b8 <[^>]*> li \$a0,-4096 +0+00bc <[^>]*> dsll32 \$a0,\$a0,0x0 +0+00c0 <[^>]*> li \$a0,0xffff +0+00c4 <[^>]*> dsll32 \$a0,\$a0,0x10 +0+00c8 <[^>]*> li \$a0,0xfff0 +0+00cc <[^>]*> dsll32 \$a0,\$a0,0x10 +0+00d0 <[^>]*> li \$a0,0xff00 +0+00d4 <[^>]*> dsll32 \$a0,\$a0,0x10 +0+00d8 <[^>]*> li \$a0,0xf000 +0+00dc <[^>]*> dsll32 \$a0,\$a0,0x10 +0+00e0 <[^>]*> li \$a0,-1 +0+00e4 <[^>]*> dsrl \$a0,\$a0,0x4 +0+00e8 <[^>]*> li \$a0,-1 +0+00ec <[^>]*> dsrl \$a0,\$a0,0x8 +0+00f0 <[^>]*> li \$a0,-1 +0+00f4 <[^>]*> dsrl \$a0,\$a0,0xc +0+00f8 <[^>]*> li \$a0,-1 +0+00fc <[^>]*> dsrl \$a0,\$a0,0x10 +0+0100 <[^>]*> li \$a0,-1 +0+0104 <[^>]*> dsrl \$a0,\$a0,0x14 +0+0108 <[^>]*> li \$a0,-1 +0+010c <[^>]*> dsrl \$a0,\$a0,0x18 +0+0110 <[^>]*> li \$a0,-1 +0+0114 <[^>]*> dsrl \$a0,\$a0,0x1c +0+0118 <[^>]*> lui \$a0,0xffff +0+011c <[^>]*> dsrl32 \$a0,\$a0,0x0 +0+0120 <[^>]*> lui \$a0,0xfff +0+0124 <[^>]*> ori \$a0,\$a0,0xffff +0+0128 <[^>]*> lui \$a0,0xff +0+012c <[^>]*> ori \$a0,\$a0,0xffff +0+0130 <[^>]*> lui \$a0,0xf +0+0134 <[^>]*> ori \$a0,\$a0,0xffff +0+0138 <[^>]*> li \$a0,0xffff +0+013c <[^>]*> li \$a0,4095 +0+0140 <[^>]*> li \$a0,255 +0+0144 <[^>]*> li \$a0,15 +0+0148 <[^>]*> lui \$a0,0x3 +0+014c <[^>]*> ori \$a0,\$a0,0xfffc +0+0150 <[^>]*> li \$a0,0xffff +0+0154 <[^>]*> dsll \$a0,\$a0,0x1e +0+0158 <[^>]*> li \$a0,0xffff +0+015c <[^>]*> dsll32 \$a0,\$a0,0x2 +0+0160 <[^>]*> li \$a0,0xffff +0+0164 <[^>]*> dsll32 \$a0,\$a0,0x6 +0+0168 <[^>]*> li \$a0,-1 +0+016c <[^>]*> dsll32 \$a0,\$a0,0x0 +0+0170 <[^>]*> dsrl \$a0,\$a0,0xa +0+0174 <[^>]*> li \$a0,-1 +0+0178 <[^>]*> dsll \$a0,\$a0,0x1c +0+017c <[^>]*> dsrl \$a0,\$a0,0xa +0+0180 <[^>]*> li \$a0,-1 +0+0184 <[^>]*> dsll \$a0,\$a0,0x18 +0+0188 <[^>]*> dsrl \$a0,\$a0,0xa +0+018c <[^>]*> lui \$a0,0x3f +0+0190 <[^>]*> ori \$a0,\$a0,0xfc03 +0+0194 <[^>]*> dsll \$a0,\$a0,0x10 +0+0198 <[^>]*> ori \$a0,\$a0,0xffff +0+019c <[^>]*> dsll \$a0,\$a0,0x10 +0+01a0 <[^>]*> ori \$a0,\$a0,0xc000 + ... diff --git a/gas/testsuite/gas/mips/dli.s b/gas/testsuite/gas/mips/dli.s new file mode 100644 index 0000000..6579528 --- /dev/null +++ b/gas/testsuite/gas/mips/dli.s @@ -0,0 +1,67 @@ +# Source file used to test the dli macro. + +foo: + dli $4,0 + dli $4,1 + dli $4,-1 + dli $4,0x8000 + dli $4,-0x8000 + dli $4,0x10000 + dli $4,0x1a5a5 + dli $4,0x80001234 + dli $4,0xffffffff + dli $4,0x00000000ffffffff + dli $4,0xffffffffffffffff + dli $4,0x000fffffffffffff + dli $4,0xffffffff80001234 + dli $4,0xffff800012345678 + dli $4,0x8000123456780000 + dli $4,0xffffffffffff8765 + dli $4,0xffffffffffff4321 + + dli $4,0xfffffffffffffff0 + dli $4,0xffffffffffffff00 + dli $4,0xfffffffffffff000 + dli $4,0xffffffffffff0000 + dli $4,0xfffffffffff00000 + dli $4,0xffffffffff000000 + dli $4,0xfffffffff0000000 + dli $4,0xffffffff00000000 + dli $4,0xfffffff000000000 + dli $4,0xffffff0000000000 + dli $4,0xfffff00000000000 + dli $4,0xffff000000000000 + dli $4,0xfff0000000000000 + dli $4,0xff00000000000000 + dli $4,0xf000000000000000 + + dli $4,0x0fffffffffffffff + dli $4,0x00ffffffffffffff + dli $4,0x000fffffffffffff + dli $4,0x0000ffffffffffff + dli $4,0x00000fffffffffff + dli $4,0x000000ffffffffff + dli $4,0x0000000fffffffff + dli $4,0x00000000ffffffff + dli $4,0x000000000fffffff + dli $4,0x0000000000ffffff + dli $4,0x00000000000fffff + dli $4,0x000000000000ffff + dli $4,0x0000000000000fff + dli $4,0x00000000000000ff + dli $4,0x000000000000000f + + dli $4,0x000000000003fffc + dli $4,0x00003fffc0000000 + dli $4,0x0003fffc00000000 + dli $4,0x003fffc000000000 + dli $4,0x003fffffffc00000 + dli $4,0x003ffffffffc0000 + dli $4,0x003fffffffffc000 + + dli $4,0x003ffc03ffffc000 + +# Round to a 16 byte boundary, for ease in testing multiple targets. + nop + nop + nop diff --git a/gas/testsuite/gas/mips/elf_e_flags.c b/gas/testsuite/gas/mips/elf_e_flags.c new file mode 100644 index 0000000..17fb111 --- /dev/null +++ b/gas/testsuite/gas/mips/elf_e_flags.c @@ -0,0 +1,24 @@ +/* This file isn't directly used by the test suite; it uses + elf_e_flags.s. However, I figured it would be nice to provide the + source code from which the .s file was generated. + + It was compiled as follows: + + mips64-elf-gcc -m4650 -S -O elf_e_flags.c + + We use the -m4650 flag to get the 4650-specific 'mul' instruction + in there; the test suite wants to be sure that GAS's -m4650 flag + will indeed cause it to generate the 4650 mul instruction, and not + expand it as a macro. */ + +int +foo (int a, int b) +{ + return (a * b) + 1; +} + +int +main () +{ + return 0; +} diff --git a/gas/testsuite/gas/mips/elf_e_flags.s b/gas/testsuite/gas/mips/elf_e_flags.s new file mode 100644 index 0000000..5fc32ea --- /dev/null +++ b/gas/testsuite/gas/mips/elf_e_flags.s @@ -0,0 +1,43 @@ + .file 1 "elf_e_flags.c" +gcc2_compiled.: +__gnu_compiled_c: + .text + .align 2 + .globl foo + .text + .ent foo +foo: + .frame $sp,0,$31 # vars= 0, regs= 0/0, args= 0, extra= 0 + .mask 0x00000000,0 + .fmask 0x00000000,0 + mul $2,$4,$5 + .set noreorder + .set nomacro + j $31 + addu $2,$2,1 + .set macro + .set reorder + + .end foo + .align 2 + .globl main + .text + .ent main +main: + .frame $sp,40,$31 # vars= 0, regs= 1/0, args= 32, extra= 0 + .mask 0x80000000,-8 + .fmask 0x00000000,0 + subu $sp,$sp,40 + sd $31,32($sp) + jal __gccmain + move $2,$0 + ld $31,32($sp) + #nop + .set noreorder + .set nomacro + j $31 + addu $sp,$sp,40 + .set macro + .set reorder + + .end main diff --git a/gas/testsuite/gas/mips/elf_e_flags1.d b/gas/testsuite/gas/mips/elf_e_flags1.d new file mode 100644 index 0000000..6faa7c1 --- /dev/null +++ b/gas/testsuite/gas/mips/elf_e_flags1.d @@ -0,0 +1,26 @@ +# name: ELF e_flags: nothing special +# source: elf_e_flags.s +# objdump: -fd + +.*:.*file format.*mips.* +architecture: mips:4000, flags 0x00000011: +HAS_RELOC, HAS_SYMS +start address 0x0000000000000000 + +Disassembly of section .text: + +0000000000000000 <foo>: + 0: 00850019 multu \$a0,\$a1 + 4: 00001012 mflo \$v0 + 8: 03e00008 jr \$ra + c: 24420001 addiu \$v0,\$v0,1 + +0000000000000010 <main>: + 10: 27bdffd8 addiu \$sp,\$sp,-40 + 14: ffbf0020 sd \$ra,32\(\$sp\) + 18: 0c000000 jal 0 <foo> + 1c: 00000000 nop + 20: 0000102d move \$v0,\$zero + 24: dfbf0020 ld \$ra,32\(\$sp\) + 28: 03e00008 jr \$ra + 2c: 27bd0028 addiu \$sp,\$sp,40 diff --git a/gas/testsuite/gas/mips/elf_e_flags2.d b/gas/testsuite/gas/mips/elf_e_flags2.d new file mode 100644 index 0000000..50661c2 --- /dev/null +++ b/gas/testsuite/gas/mips/elf_e_flags2.d @@ -0,0 +1,26 @@ +# name: ELF e_flags: -m4650 +# source: elf_e_flags.s +# as: -m4650 +# objdump: -fd + +.*:.*file format.*mips.* +architecture: mips:4650, flags 0x00000011: +HAS_RELOC, HAS_SYMS +start address 0x0000000000000000 + +Disassembly of section .text: + +0000000000000000 <foo>: + 0: 70851002 mul \$v0,\$a0,\$a1 + 4: 03e00008 jr \$ra + 8: 24420001 addiu \$v0,\$v0,1 + +000000000000000c <main>: + c: 27bdffd8 addiu \$sp,\$sp,-40 + 10: ffbf0020 sd \$ra,32\(\$sp\) + 14: 0c000000 jal 0 <foo> + 18: 00000000 nop + 1c: 0000102d move \$v0,\$zero + 20: dfbf0020 ld \$ra,32\(\$sp\) + 24: 03e00008 jr \$ra + 28: 27bd0028 addiu \$sp,\$sp,40 diff --git a/gas/testsuite/gas/mips/elf_e_flags3.d b/gas/testsuite/gas/mips/elf_e_flags3.d new file mode 100644 index 0000000..aacc49e --- /dev/null +++ b/gas/testsuite/gas/mips/elf_e_flags3.d @@ -0,0 +1,26 @@ +# name: ELF e_flags: -mcpu=4650 +# source: elf_e_flags.s +# as: -mcpu=4650 +# objdump: -fd + +.*:.*file format.*mips.* +architecture: mips:4650, flags 0x00000011: +HAS_RELOC, HAS_SYMS +start address 0x0000000000000000 + +Disassembly of section .text: + +0000000000000000 <foo>: + 0: 70851002 mul \$v0,\$a0,\$a1 + 4: 03e00008 jr \$ra + 8: 24420001 addiu \$v0,\$v0,1 + +000000000000000c <main>: + c: 27bdffd8 addiu \$sp,\$sp,-40 + 10: ffbf0020 sd \$ra,32\(\$sp\) + 14: 0c000000 jal 0 <foo> + 18: 00000000 nop + 1c: 0000102d move \$v0,\$zero + 20: dfbf0020 ld \$ra,32\(\$sp\) + 24: 03e00008 jr \$ra + 28: 27bd0028 addiu \$sp,\$sp,40 diff --git a/gas/testsuite/gas/mips/elf_e_flags4.d b/gas/testsuite/gas/mips/elf_e_flags4.d new file mode 100644 index 0000000..5eb7050 --- /dev/null +++ b/gas/testsuite/gas/mips/elf_e_flags4.d @@ -0,0 +1,26 @@ +# name: ELF e_flags: -m4650 -mcpu=4650 +# source: elf_e_flags.s +# as: -m4650 -mcpu=4650 +# objdump: -fd + +.*:.*file format.*mips.* +architecture: mips:4650, flags 0x00000011: +HAS_RELOC, HAS_SYMS +start address 0x0000000000000000 + +Disassembly of section .text: + +0000000000000000 <foo>: + 0: 70851002 mul \$v0,\$a0,\$a1 + 4: 03e00008 jr \$ra + 8: 24420001 addiu \$v0,\$v0,1 + +000000000000000c <main>: + c: 27bdffd8 addiu \$sp,\$sp,-40 + 10: ffbf0020 sd \$ra,32\(\$sp\) + 14: 0c000000 jal 0 <foo> + 18: 00000000 nop + 1c: 0000102d move \$v0,\$zero + 20: dfbf0020 ld \$ra,32\(\$sp\) + 24: 03e00008 jr \$ra + 28: 27bd0028 addiu \$sp,\$sp,40 diff --git a/gas/testsuite/gas/mips/itbl b/gas/testsuite/gas/mips/itbl new file mode 100644 index 0000000..30f8a79 --- /dev/null +++ b/gas/testsuite/gas/mips/itbl @@ -0,0 +1,19 @@ + + ; Test case for assembler option "itbl". + ; Run as "as --itbl itbl itbl.s" + ; or with stand-alone test case "itbl-test itbl itbl.s". + ; Here, the processors represent mips coprocessors. + + p1 dreg d1 1 ; data register "d1" for COP1 has value 1 + p1 creg c3 3 ; ctrl register "c3" for COP1 has value 3 + p3 insn fie 0x1e:24-20 ; function "fill" for COP3 has value 31 + p3 dreg d3 3 ; data register "d3" for COP3 has value 3 + p3 creg c2 22 ; control register "c2" for COP3 has value 22 + p3 insn fee 0x1e:24-20,dreg:17-13,creg:12-8,immed:7-0 + + p3 dreg d3 3 ; data register "d3" for COP3 has value 3 + p3 creg c2 22 ; control register "c2" for COP3 has value 22 + p3 insn fum 0x01e00001 dreg:17-13 creg:12-8 + p3 insn foh 0xf:24-21 dreg:20-16 immed:15-0 + + p3 insn pig 0x1:24-21*[0x100|0x2], dreg:20-16, immed:15-0*0x10000 diff --git a/gas/testsuite/gas/mips/itbl.s b/gas/testsuite/gas/mips/itbl.s new file mode 100644 index 0000000..085545b --- /dev/null +++ b/gas/testsuite/gas/mips/itbl.s @@ -0,0 +1,18 @@ + + ; Test case for assembler option "itbl". + ; Run as "as --itbl itbl itbl.s" + ; or with stand-alone test case "itbl-test itbl itbl.s". + + ; Call mips coprocessor "cofun"s as defined in "itbl". + + fee $d3,$c2,0x1 ; 0x4ff07601 + fie ; 0x4ff00000 + foh $2,0x100 + fum $d3,$c2 ; 0x4ff07601 + pig $2,0x100 + + ; Call a mips coprocessor instruction with register "d1" + ; defined in "itbl". + + LWC1 $d1,0x100($2) + diff --git a/gas/testsuite/gas/mips/jal-empic.d b/gas/testsuite/gas/mips/jal-empic.d new file mode 100644 index 0000000..c46ccfa --- /dev/null +++ b/gas/testsuite/gas/mips/jal-empic.d @@ -0,0 +1,26 @@ +#objdump: -dr --prefix-addresses -mmips:3000 +#name: MIPS jal-empic +#as: -mips1 -membedded-pic +#source: jal.s + +# Test the jal macro with -membedded-pic. + +.*: +file format .*mips.* + +Disassembly of section .text: +0+0000 <[^>]*> jalr \$t9 +0+0004 <[^>]*> nop +0+0008 <[^>]*> jalr \$a0,\$t9 +0+000c <[^>]*> nop +0+0010 <[^>]*> bal 0+0000 <text_label> +[ ]*10: PCREL16 .text +0+0014 <[^>]*> nop +0+0018 <[^>]*> bal 0+0018 <text_label\+(0x|)18> +[ ]*18: PCREL16 external_text_label +0+001c <[^>]*> nop +0+0020 <[^>]*> b 0+0000 <text_label> +[ ]*20: PCREL16 .text +0+0024 <[^>]*> nop +0+0028 <[^>]*> b 0+0028 <text_label\+(0x|)28> +[ ]*28: PCREL16 external_text_label +0+002c <[^>]*> nop diff --git a/gas/testsuite/gas/mips/jal-svr4pic.d b/gas/testsuite/gas/mips/jal-svr4pic.d new file mode 100644 index 0000000..b15be76 --- /dev/null +++ b/gas/testsuite/gas/mips/jal-svr4pic.d @@ -0,0 +1,39 @@ +#objdump: -dr --prefix-addresses -mmips:3000 +#name: MIPS R3000 jal-svr4pic +#as: -mips1 -KPIC -mcpu=r3000 + +# Test the jal macro with -KPIC. + +.*: +file format .*mips.* + +Disassembly of section .text: +0+0000 <[^>]*> lui \$gp,0x0 +[ ]*0: R_MIPS_HI16 _gp_disp +0+0004 <[^>]*> addiu \$gp,\$gp,0 +[ ]*4: R_MIPS_LO16 _gp_disp +0+0008 <[^>]*> addu \$gp,\$gp,\$t9 +0+000c <[^>]*> sw \$gp,0\(\$sp\) +0+0010 <[^>]*> jalr \$t9 +0+0014 <[^>]*> nop +0+0018 <[^>]*> lw \$gp,0\(\$sp\) +0+001c <[^>]*> jalr \$a0,\$t9 +0+0020 <[^>]*> nop +0+0024 <[^>]*> lw \$gp,0\(\$sp\) +0+0028 <[^>]*> nop +0+002c <[^>]*> lw \$t9,0\(\$gp\) +[ ]*2c: R_MIPS_GOT16 .text +0+0030 <[^>]*> nop +0+0034 <[^>]*> addiu \$t9,\$t9,0 +[ ]*34: R_MIPS_LO16 .text +0+0038 <[^>]*> jalr \$t9 +0+003c <[^>]*> nop +0+0040 <[^>]*> lw \$gp,0\(\$sp\) +0+0044 <[^>]*> nop +0+0048 <[^>]*> lw \$t9,0\(\$gp\) +[ ]*48: R_MIPS_CALL16 external_text_label +0+004c <[^>]*> nop +0+0050 <[^>]*> jalr \$t9 +0+0054 <[^>]*> nop +0+0058 <[^>]*> lw \$gp,0\(\$sp\) +0+005c <[^>]*> b 0+0000 <text_label> + ... diff --git a/gas/testsuite/gas/mips/jal-svr4pic.s b/gas/testsuite/gas/mips/jal-svr4pic.s new file mode 100644 index 0000000..9d89dfa --- /dev/null +++ b/gas/testsuite/gas/mips/jal-svr4pic.s @@ -0,0 +1,20 @@ +# Source file used to test the jal macro with -KPIC code. + +text_label: + .set noreorder + .cpload $25 + .set reorder + .cprestore 0 + jal $25 + jal $4,$25 + jal text_label + jal external_text_label + +# Test j as well + j text_label + +# Round to a 16 byte boundary, for ease in testing multiple targets. + nop + nop + nop + nop diff --git a/gas/testsuite/gas/mips/jal-xgot.d b/gas/testsuite/gas/mips/jal-xgot.d new file mode 100644 index 0000000..a26dca3 --- /dev/null +++ b/gas/testsuite/gas/mips/jal-xgot.d @@ -0,0 +1,42 @@ +#objdump: -dr --prefix-addresses -mmips:3000 +#name: MIPS R3000 jal-xgot +#as: -mips1 -KPIC -xgot -mcpu=r3000 +#source: jal-svr4pic.s + +# Test the jal macro with -KPIC -xgot. + +.*: +file format .*mips.* + +Disassembly of section .text: +0+0000 <[^>]*> lui \$gp,0x0 +[ ]*0: R_MIPS_HI16 _gp_disp +0+0004 <[^>]*> addiu \$gp,\$gp,0 +[ ]*4: R_MIPS_LO16 _gp_disp +0+0008 <[^>]*> addu \$gp,\$gp,\$t9 +0+000c <[^>]*> sw \$gp,0\(\$sp\) +0+0010 <[^>]*> jalr \$t9 +0+0014 <[^>]*> nop +0+0018 <[^>]*> lw \$gp,0\(\$sp\) +0+001c <[^>]*> jalr \$a0,\$t9 +0+0020 <[^>]*> nop +0+0024 <[^>]*> lw \$gp,0\(\$sp\) +0+0028 <[^>]*> nop +0+002c <[^>]*> lw \$t9,0\(\$gp\) +[ ]*2c: R_MIPS_GOT16 .text +0+0030 <[^>]*> nop +0+0034 <[^>]*> addiu \$t9,\$t9,0 +[ ]*34: R_MIPS_LO16 .text +0+0038 <[^>]*> jalr \$t9 +0+003c <[^>]*> nop +0+0040 <[^>]*> lw \$gp,0\(\$sp\) +0+0044 <[^>]*> lui \$t9,0x0 +[ ]*44: R_MIPS_CALL_HI16 external_text_label +0+0048 <[^>]*> addu \$t9,\$t9,\$gp +0+004c <[^>]*> lw \$t9,0\(\$t9\) +[ ]*4c: R_MIPS_CALL_LO16 external_text_label +0+0050 <[^>]*> nop +0+0054 <[^>]*> jalr \$t9 +0+0058 <[^>]*> nop +0+005c <[^>]*> lw \$gp,0\(\$sp\) +0+0060 <[^>]*> b 0+0000 <text_label> + ... diff --git a/gas/testsuite/gas/mips/jal.d b/gas/testsuite/gas/mips/jal.d new file mode 100644 index 0000000..b7b586f --- /dev/null +++ b/gas/testsuite/gas/mips/jal.d @@ -0,0 +1,24 @@ +#objdump: -dr --prefix-addresses -mmips:4000 +#name: MIPS jal + +# Test the jal macro. + +.*: +file format .*mips.* + +Disassembly of section .text: +0+0000 <[^>]*> jalr \$t9 +0+0004 <[^>]*> nop +0+0008 <[^>]*> jalr \$a0,\$t9 +0+000c <[^>]*> nop +0+0010 <[^>]*> jal 0+ <text_label> +[ ]*10: (MIPS_JMP|MIPS_JMP|JMPADDR|R_MIPS_26) .text +0+0014 <[^>]*> nop +0+0018 <[^>]*> jal 0+ <text_label> +[ ]*18: (MIPS_JMP|JMPADDR|R_MIPS_26) external_text_label +0+001c <[^>]*> nop +0+0020 <[^>]*> j 0+ <text_label> +[ ]*20: (MIPS_JMP|JMPADDR|R_MIPS_26) .text +0+0024 <[^>]*> nop +0+0028 <[^>]*> j 0+ <text_label> +[ ]*28: (MIPS_JMP|JMPADDR|R_MIPS_26) external_text_label +0+002c <[^>]*> nop diff --git a/gas/testsuite/gas/mips/jal.s b/gas/testsuite/gas/mips/jal.s new file mode 100644 index 0000000..379be95 --- /dev/null +++ b/gas/testsuite/gas/mips/jal.s @@ -0,0 +1,11 @@ +# Source file used to test the jal macro. + .globl text_label .text +text_label: + jal $25 + jal $4,$25 + jal text_label + jal external_text_label + +# Test j as well + j text_label + j external_text_label diff --git a/gas/testsuite/gas/mips/la-empic.d b/gas/testsuite/gas/mips/la-empic.d new file mode 100644 index 0000000..af29570 --- /dev/null +++ b/gas/testsuite/gas/mips/la-empic.d @@ -0,0 +1,105 @@ +#objdump: -dr --prefix-addresses -mmips:3000 +#name: MIPS la-empic +#as: -mips1 -membedded-pic + +# Test the la macro with -membedded-pic. + +.*: +file format .*mips.* + +Disassembly of section .text: +0+0000 <[^>]*> li \$a0,0 +0+0004 <[^>]*> li \$a0,1 +0+0008 <[^>]*> li \$a0,0x8000 +0+000c <[^>]*> li \$a0,-32768 +0+0010 <[^>]*> lui \$a0,0x1 +0+0014 <[^>]*> lui \$a0,0x1 +0+0018 <[^>]*> ori \$a0,\$a0,0xa5a5 +0+001c <[^>]*> li \$a0,0 +0+0020 <[^>]*> addu \$a0,\$a0,\$a1 +0+0024 <[^>]*> li \$a0,1 +0+0028 <[^>]*> addu \$a0,\$a0,\$a1 +0+002c <[^>]*> li \$a0,0x8000 +0+0030 <[^>]*> addu \$a0,\$a0,\$a1 +0+0034 <[^>]*> li \$a0,-32768 +0+0038 <[^>]*> addu \$a0,\$a0,\$a1 +0+003c <[^>]*> lui \$a0,0x1 +0+0040 <[^>]*> addu \$a0,\$a0,\$a1 +0+0044 <[^>]*> lui \$a0,0x1 +0+0048 <[^>]*> ori \$a0,\$a0,0xa5a5 +0+004c <[^>]*> addu \$a0,\$a0,\$a1 +0+0050 <[^>]*> addiu \$a0,\$gp,-16384 +[ ]*50: [A-Z0-9_]*GPREL[A-Z0-9_]* .sdata.* +0+0054 <[^>]*> addiu \$a0,\$gp,0 +[ ]*54: [A-Z0-9_]*GPREL[A-Z0-9_]* big_external_data_label +0+0058 <[^>]*> addiu \$a0,\$gp,0 +[ ]*58: [A-Z0-9_]*GPREL[A-Z0-9_]* small_external_data_label +0+005c <[^>]*> addiu \$a0,\$gp,0 +[ ]*5c: [A-Z0-9_]*GPREL[A-Z0-9_]* big_external_common +0+0060 <[^>]*> addiu \$a0,\$gp,0 +[ ]*60: [A-Z0-9_]*GPREL[A-Z0-9_]* small_external_common +0+0064 <[^>]*> addiu \$a0,\$gp,-16384 +[ ]*64: [A-Z0-9_]*GPREL[A-Z0-9_]* .sbss.* +0+0068 <[^>]*> addiu \$a0,\$gp,-15384 +[ ]*68: [A-Z0-9_]*GPREL[A-Z0-9_]* .sbss.* +0+006c <[^>]*> addiu \$a0,\$gp,-16383 +[ ]*6c: [A-Z0-9_]*GPREL[A-Z0-9_]* .sdata.* +0+0070 <[^>]*> addiu \$a0,\$gp,1 +[ ]*70: [A-Z0-9_]*GPREL[A-Z0-9_]* big_external_data_label +0+0074 <[^>]*> addiu \$a0,\$gp,1 +[ ]*74: [A-Z0-9_]*GPREL[A-Z0-9_]* small_external_data_label +0+0078 <[^>]*> addiu \$a0,\$gp,1 +[ ]*78: [A-Z0-9_]*GPREL[A-Z0-9_]* big_external_common +0+007c <[^>]*> addiu \$a0,\$gp,1 +[ ]*7c: [A-Z0-9_]*GPREL[A-Z0-9_]* small_external_common +0+0080 <[^>]*> addiu \$a0,\$gp,-16383 +[ ]*80: [A-Z0-9_]*GPREL[A-Z0-9_]* .sbss.* +0+0084 <[^>]*> addiu \$a0,\$gp,-15383 +[ ]*84: [A-Z0-9_]*GPREL[A-Z0-9_]* .sbss.* +0+0088 <[^>]*> addiu \$a0,\$gp,-16384 +[ ]*88: [A-Z0-9_]*GPREL[A-Z0-9_]* .sdata.* +0+008c <[^>]*> addu \$a0,\$a0,\$a1 +0+0090 <[^>]*> addiu \$a0,\$gp,0 +[ ]*90: [A-Z0-9_]*GPREL[A-Z0-9_]* big_external_data_label +0+0094 <[^>]*> addu \$a0,\$a0,\$a1 +0+0098 <[^>]*> addiu \$a0,\$gp,0 +[ ]*98: [A-Z0-9_]*GPREL[A-Z0-9_]* small_external_data_label +0+009c <[^>]*> addu \$a0,\$a0,\$a1 +0+00a0 <[^>]*> addiu \$a0,\$gp,0 +[ ]*a0: [A-Z0-9_]*GPREL[A-Z0-9_]* big_external_common +0+00a4 <[^>]*> addu \$a0,\$a0,\$a1 +0+00a8 <[^>]*> addiu \$a0,\$gp,0 +[ ]*a8: [A-Z0-9_]*GPREL[A-Z0-9_]* small_external_common +0+00ac <[^>]*> addu \$a0,\$a0,\$a1 +0+00b0 <[^>]*> addiu \$a0,\$gp,-16384 +[ ]*b0: [A-Z0-9_]*GPREL[A-Z0-9_]* .sbss.* +0+00b4 <[^>]*> addu \$a0,\$a0,\$a1 +0+00b8 <[^>]*> addiu \$a0,\$gp,-15384 +[ ]*b8: [A-Z0-9_]*GPREL[A-Z0-9_]* .sbss.* +0+00bc <[^>]*> addu \$a0,\$a0,\$a1 +0+00c0 <[^>]*> addiu \$a0,\$gp,-16383 +[ ]*c0: [A-Z0-9_]*GPREL[A-Z0-9_]* .sdata.* +0+00c4 <[^>]*> addu \$a0,\$a0,\$a1 +0+00c8 <[^>]*> addiu \$a0,\$gp,1 +[ ]*c8: [A-Z0-9_]*GPREL[A-Z0-9_]* big_external_data_label +0+00cc <[^>]*> addu \$a0,\$a0,\$a1 +0+00d0 <[^>]*> addiu \$a0,\$gp,1 +[ ]*d0: [A-Z0-9_]*GPREL[A-Z0-9_]* small_external_data_label +0+00d4 <[^>]*> addu \$a0,\$a0,\$a1 +0+00d8 <[^>]*> addiu \$a0,\$gp,1 +[ ]*d8: [A-Z0-9_]*GPREL[A-Z0-9_]* big_external_common +0+00dc <[^>]*> addu \$a0,\$a0,\$a1 +0+00e0 <[^>]*> addiu \$a0,\$gp,1 +[ ]*e0: [A-Z0-9_]*GPREL[A-Z0-9_]* small_external_common +0+00e4 <[^>]*> addu \$a0,\$a0,\$a1 +0+00e8 <[^>]*> addiu \$a0,\$gp,-16383 +[ ]*e8: [A-Z0-9_]*GPREL[A-Z0-9_]* .sbss.* +0+00ec <[^>]*> addu \$a0,\$a0,\$a1 +0+00f0 <[^>]*> addiu \$a0,\$gp,-15383 +[ ]*f0: [A-Z0-9_]*GPREL[A-Z0-9_]* .sbss.* +0+00f4 <[^>]*> addu \$a0,\$a0,\$a1 +0+00f8 <[^>]*> lui \$a0,0x0 +[ ]*f8: RELHI external_text_label +0+00fc <[^>]*> addiu \$a0,\$a0,252 +[ ]*fc: RELLO external_text_label +0+0100 <[^>]*> li \$a0,248 + ... diff --git a/gas/testsuite/gas/mips/la-empic.s b/gas/testsuite/gas/mips/la-empic.s new file mode 100644 index 0000000..c6df5e3 --- /dev/null +++ b/gas/testsuite/gas/mips/la-empic.s @@ -0,0 +1,57 @@ +# Source file used to test the la macro with -membedded-pic + + .data +data_label: + .extern big_external_data_label,1000 + .extern small_external_data_label,1 + .comm big_external_common,1000 + .comm small_external_common,1 + .lcomm big_local_common,1000 + .lcomm small_local_common,1 + + .text +text_label: + la $4,0 + la $4,1 + la $4,0x8000 + la $4,-0x8000 + la $4,0x10000 + la $4,0x1a5a5 + la $4,0($5) + la $4,1($5) + la $4,0x8000($5) + la $4,-0x8000($5) + la $4,0x10000($5) + la $4,0x1a5a5($5) + la $4,data_label + la $4,big_external_data_label + la $4,small_external_data_label + la $4,big_external_common + la $4,small_external_common + la $4,big_local_common + la $4,small_local_common + la $4,data_label+1 + la $4,big_external_data_label+1 + la $4,small_external_data_label+1 + la $4,big_external_common+1 + la $4,small_external_common+1 + la $4,big_local_common+1 + la $4,small_local_common+1 + la $4,data_label($5) + la $4,big_external_data_label($5) + la $4,small_external_data_label($5) + la $4,big_external_common($5) + la $4,small_external_common($5) + la $4,big_local_common($5) + la $4,small_local_common($5) + la $4,data_label+1($5) + la $4,big_external_data_label+1($5) + la $4,small_external_data_label+1($5) + la $4,big_external_common+1($5) + la $4,small_external_common+1($5) + la $4,big_local_common+1($5) + la $4,small_local_common+1($5) + +second_text_label: + la $4,external_text_label - text_label + la $4,second_text_label - text_label diff --git a/gas/testsuite/gas/mips/la-svr4pic.d b/gas/testsuite/gas/mips/la-svr4pic.d new file mode 100644 index 0000000..4e8a3d5 --- /dev/null +++ b/gas/testsuite/gas/mips/la-svr4pic.d @@ -0,0 +1,474 @@ +#objdump: -dr --prefix-addresses -mmips:3000 +#name: MIPS la-svr4pic +#as: -mips1 -KPIC --defsym KPIC=1 +#source: la.s + +# Test the la macro with -KPIC. + +.*: +file format .*mips.* + +Disassembly of section .text: +0+0000 <[^>]*> li \$a0,0 +0+0004 <[^>]*> li \$a0,1 +0+0008 <[^>]*> li \$a0,0x8000 +0+000c <[^>]*> li \$a0,-32768 +0+0010 <[^>]*> lui \$a0,0x1 +0+0014 <[^>]*> lui \$a0,0x1 +0+0018 <[^>]*> ori \$a0,\$a0,0xa5a5 +0+001c <[^>]*> li \$a0,0 +0+0020 <[^>]*> addu \$a0,\$a0,\$a1 +0+0024 <[^>]*> li \$a0,1 +0+0028 <[^>]*> addu \$a0,\$a0,\$a1 +0+002c <[^>]*> li \$a0,0x8000 +0+0030 <[^>]*> addu \$a0,\$a0,\$a1 +0+0034 <[^>]*> li \$a0,-32768 +0+0038 <[^>]*> addu \$a0,\$a0,\$a1 +0+003c <[^>]*> lui \$a0,0x1 +0+0040 <[^>]*> addu \$a0,\$a0,\$a1 +0+0044 <[^>]*> lui \$a0,0x1 +0+0048 <[^>]*> ori \$a0,\$a0,0xa5a5 +0+004c <[^>]*> addu \$a0,\$a0,\$a1 +0+0050 <[^>]*> lw \$a0,0\(\$gp\) +[ ]*50: R_MIPS_GOT16 .data +0+0054 <[^>]*> nop +0+0058 <[^>]*> addiu \$a0,\$a0,0 +[ ]*58: R_MIPS_LO16 .data +0+005c <[^>]*> lw \$a0,0\(\$gp\) +[ ]*5c: R_MIPS_GOT16 big_external_data_label +0+0060 <[^>]*> lw \$a0,0\(\$gp\) +[ ]*60: R_MIPS_GOT16 small_external_data_label +0+0064 <[^>]*> lw \$a0,0\(\$gp\) +[ ]*64: R_MIPS_GOT16 big_external_common +0+0068 <[^>]*> lw \$a0,0\(\$gp\) +[ ]*68: R_MIPS_GOT16 small_external_common +0+006c <[^>]*> lw \$a0,0\(\$gp\) +[ ]*6c: R_MIPS_GOT16 .bss +0+0070 <[^>]*> nop +0+0074 <[^>]*> addiu \$a0,\$a0,0 +[ ]*74: R_MIPS_LO16 .bss +0+0078 <[^>]*> lw \$a0,0\(\$gp\) +[ ]*78: R_MIPS_GOT16 .bss +0+007c <[^>]*> nop +0+0080 <[^>]*> addiu \$a0,\$a0,1000 +[ ]*80: R_MIPS_LO16 .bss +0+0084 <[^>]*> lw \$a0,0\(\$gp\) +[ ]*84: R_MIPS_GOT16 .data +0+0088 <[^>]*> nop +0+008c <[^>]*> addiu \$a0,\$a0,1 +[ ]*8c: R_MIPS_LO16 .data +0+0090 <[^>]*> lw \$a0,0\(\$gp\) +[ ]*90: R_MIPS_GOT16 big_external_data_label +0+0094 <[^>]*> nop +0+0098 <[^>]*> addiu \$a0,\$a0,1 +0+009c <[^>]*> lw \$a0,0\(\$gp\) +[ ]*9c: R_MIPS_GOT16 small_external_data_label +0+00a0 <[^>]*> nop +0+00a4 <[^>]*> addiu \$a0,\$a0,1 +0+00a8 <[^>]*> lw \$a0,0\(\$gp\) +[ ]*a8: R_MIPS_GOT16 big_external_common +0+00ac <[^>]*> nop +0+00b0 <[^>]*> addiu \$a0,\$a0,1 +0+00b4 <[^>]*> lw \$a0,0\(\$gp\) +[ ]*b4: R_MIPS_GOT16 small_external_common +0+00b8 <[^>]*> nop +0+00bc <[^>]*> addiu \$a0,\$a0,1 +0+00c0 <[^>]*> lw \$a0,0\(\$gp\) +[ ]*c0: R_MIPS_GOT16 .bss +0+00c4 <[^>]*> nop +0+00c8 <[^>]*> addiu \$a0,\$a0,1 +[ ]*c8: R_MIPS_LO16 .bss +0+00cc <[^>]*> lw \$a0,0\(\$gp\) +[ ]*cc: R_MIPS_GOT16 .bss +0+00d0 <[^>]*> nop +0+00d4 <[^>]*> addiu \$a0,\$a0,1001 +[ ]*d4: R_MIPS_LO16 .bss +0+00d8 <[^>]*> lw \$a0,0\(\$gp\) +[ ]*d8: R_MIPS_GOT16 .data +0+00dc <[^>]*> lui \$at,0x1 +0+00e0 <[^>]*> addiu \$at,\$at,-32768 +[ ]*e0: R_MIPS_LO16 .data +0+00e4 <[^>]*> addu \$a0,\$a0,\$at +0+00e8 <[^>]*> lw \$a0,0\(\$gp\) +[ ]*e8: R_MIPS_GOT16 big_external_data_label +0+00ec <[^>]*> lui \$at,0x1 +0+00f0 <[^>]*> addiu \$at,\$at,-32768 +0+00f4 <[^>]*> addu \$a0,\$a0,\$at +0+00f8 <[^>]*> lw \$a0,0\(\$gp\) +[ ]*f8: R_MIPS_GOT16 small_external_data_label +0+00fc <[^>]*> lui \$at,0x1 +0+0100 <[^>]*> addiu \$at,\$at,-32768 +0+0104 <[^>]*> addu \$a0,\$a0,\$at +0+0108 <[^>]*> lw \$a0,0\(\$gp\) +[ ]*108: R_MIPS_GOT16 big_external_common +0+010c <[^>]*> lui \$at,0x1 +0+0110 <[^>]*> addiu \$at,\$at,-32768 +0+0114 <[^>]*> addu \$a0,\$a0,\$at +0+0118 <[^>]*> lw \$a0,0\(\$gp\) +[ ]*118: R_MIPS_GOT16 small_external_common +0+011c <[^>]*> lui \$at,0x1 +0+0120 <[^>]*> addiu \$at,\$at,-32768 +0+0124 <[^>]*> addu \$a0,\$a0,\$at +0+0128 <[^>]*> lw \$a0,0\(\$gp\) +[ ]*128: R_MIPS_GOT16 .bss +0+012c <[^>]*> lui \$at,0x1 +0+0130 <[^>]*> addiu \$at,\$at,-32768 +[ ]*130: R_MIPS_LO16 .bss +0+0134 <[^>]*> addu \$a0,\$a0,\$at +0+0138 <[^>]*> lw \$a0,0\(\$gp\) +[ ]*138: R_MIPS_GOT16 .bss +0+013c <[^>]*> lui \$at,0x1 +0+0140 <[^>]*> addiu \$at,\$at,-31768 +[ ]*140: R_MIPS_LO16 .bss +0+0144 <[^>]*> addu \$a0,\$a0,\$at +0+0148 <[^>]*> lw \$a0,0\(\$gp\) +[ ]*148: R_MIPS_GOT16 .data +0+014c <[^>]*> nop +0+0150 <[^>]*> addiu \$a0,\$a0,-32768 +[ ]*150: R_MIPS_LO16 .data +0+0154 <[^>]*> lw \$a0,0\(\$gp\) +[ ]*154: R_MIPS_GOT16 big_external_data_label +0+0158 <[^>]*> nop +0+015c <[^>]*> addiu \$a0,\$a0,-32768 +0+0160 <[^>]*> lw \$a0,0\(\$gp\) +[ ]*160: R_MIPS_GOT16 small_external_data_label +0+0164 <[^>]*> nop +0+0168 <[^>]*> addiu \$a0,\$a0,-32768 +0+016c <[^>]*> lw \$a0,0\(\$gp\) +[ ]*16c: R_MIPS_GOT16 big_external_common +0+0170 <[^>]*> nop +0+0174 <[^>]*> addiu \$a0,\$a0,-32768 +0+0178 <[^>]*> lw \$a0,0\(\$gp\) +[ ]*178: R_MIPS_GOT16 small_external_common +0+017c <[^>]*> nop +0+0180 <[^>]*> addiu \$a0,\$a0,-32768 +0+0184 <[^>]*> lw \$a0,0\(\$gp\) +[ ]*184: R_MIPS_GOT16 .bss +0+0188 <[^>]*> nop +0+018c <[^>]*> addiu \$a0,\$a0,-32768 +[ ]*18c: R_MIPS_LO16 .bss +0+0190 <[^>]*> lw \$a0,0\(\$gp\) +[ ]*190: R_MIPS_GOT16 .bss +0+0194 <[^>]*> nop +0+0198 <[^>]*> addiu \$a0,\$a0,-31768 +[ ]*198: R_MIPS_LO16 .bss +0+019c <[^>]*> lw \$a0,0\(\$gp\) +[ ]*19c: R_MIPS_GOT16 .data +0+01a0 <[^>]*> lui \$at,0x1 +0+01a4 <[^>]*> addiu \$at,\$at,0 +[ ]*1a4: R_MIPS_LO16 .data +0+01a8 <[^>]*> addu \$a0,\$a0,\$at +0+01ac <[^>]*> lw \$a0,0\(\$gp\) +[ ]*1ac: R_MIPS_GOT16 big_external_data_label +0+01b0 <[^>]*> lui \$at,0x1 +0+01b4 <[^>]*> addiu \$at,\$at,0 +0+01b8 <[^>]*> addu \$a0,\$a0,\$at +0+01bc <[^>]*> lw \$a0,0\(\$gp\) +[ ]*1bc: R_MIPS_GOT16 small_external_data_label +0+01c0 <[^>]*> lui \$at,0x1 +0+01c4 <[^>]*> addiu \$at,\$at,0 +0+01c8 <[^>]*> addu \$a0,\$a0,\$at +0+01cc <[^>]*> lw \$a0,0\(\$gp\) +[ ]*1cc: R_MIPS_GOT16 big_external_common +0+01d0 <[^>]*> lui \$at,0x1 +0+01d4 <[^>]*> addiu \$at,\$at,0 +0+01d8 <[^>]*> addu \$a0,\$a0,\$at +0+01dc <[^>]*> lw \$a0,0\(\$gp\) +[ ]*1dc: R_MIPS_GOT16 small_external_common +0+01e0 <[^>]*> lui \$at,0x1 +0+01e4 <[^>]*> addiu \$at,\$at,0 +0+01e8 <[^>]*> addu \$a0,\$a0,\$at +0+01ec <[^>]*> lw \$a0,0\(\$gp\) +[ ]*1ec: R_MIPS_GOT16 .bss +0+01f0 <[^>]*> lui \$at,0x1 +0+01f4 <[^>]*> addiu \$at,\$at,0 +[ ]*1f4: R_MIPS_LO16 .bss +0+01f8 <[^>]*> addu \$a0,\$a0,\$at +0+01fc <[^>]*> lw \$a0,0\(\$gp\) +[ ]*1fc: R_MIPS_GOT16 .bss +0+0200 <[^>]*> lui \$at,0x1 +0+0204 <[^>]*> addiu \$at,\$at,1000 +[ ]*204: R_MIPS_LO16 .bss +0+0208 <[^>]*> addu \$a0,\$a0,\$at +0+020c <[^>]*> lw \$a0,0\(\$gp\) +[ ]*20c: R_MIPS_GOT16 .data +0+0210 <[^>]*> lui \$at,0x2 +0+0214 <[^>]*> addiu \$at,\$at,-23131 +[ ]*214: R_MIPS_LO16 .data +0+0218 <[^>]*> addu \$a0,\$a0,\$at +0+021c <[^>]*> lw \$a0,0\(\$gp\) +[ ]*21c: R_MIPS_GOT16 big_external_data_label +0+0220 <[^>]*> lui \$at,0x2 +0+0224 <[^>]*> addiu \$at,\$at,-23131 +0+0228 <[^>]*> addu \$a0,\$a0,\$at +0+022c <[^>]*> lw \$a0,0\(\$gp\) +[ ]*22c: R_MIPS_GOT16 small_external_data_label +0+0230 <[^>]*> lui \$at,0x2 +0+0234 <[^>]*> addiu \$at,\$at,-23131 +0+0238 <[^>]*> addu \$a0,\$a0,\$at +0+023c <[^>]*> lw \$a0,0\(\$gp\) +[ ]*23c: R_MIPS_GOT16 big_external_common +0+0240 <[^>]*> lui \$at,0x2 +0+0244 <[^>]*> addiu \$at,\$at,-23131 +0+0248 <[^>]*> addu \$a0,\$a0,\$at +0+024c <[^>]*> lw \$a0,0\(\$gp\) +[ ]*24c: R_MIPS_GOT16 small_external_common +0+0250 <[^>]*> lui \$at,0x2 +0+0254 <[^>]*> addiu \$at,\$at,-23131 +0+0258 <[^>]*> addu \$a0,\$a0,\$at +0+025c <[^>]*> lw \$a0,0\(\$gp\) +[ ]*25c: R_MIPS_GOT16 .bss +0+0260 <[^>]*> lui \$at,0x2 +0+0264 <[^>]*> addiu \$at,\$at,-23131 +[ ]*264: R_MIPS_LO16 .bss +0+0268 <[^>]*> addu \$a0,\$a0,\$at +0+026c <[^>]*> lw \$a0,0\(\$gp\) +[ ]*26c: R_MIPS_GOT16 .bss +0+0270 <[^>]*> lui \$at,0x2 +0+0274 <[^>]*> addiu \$at,\$at,-22131 +[ ]*274: R_MIPS_LO16 .bss +0+0278 <[^>]*> addu \$a0,\$a0,\$at +0+027c <[^>]*> lw \$a0,0\(\$gp\) +[ ]*27c: R_MIPS_GOT16 .data +0+0280 <[^>]*> nop +0+0284 <[^>]*> addiu \$a0,\$a0,0 +[ ]*284: R_MIPS_LO16 .data +0+0288 <[^>]*> addu \$a0,\$a0,\$a1 +0+028c <[^>]*> lw \$a0,0\(\$gp\) +[ ]*28c: R_MIPS_GOT16 big_external_data_label +0+0290 <[^>]*> nop +0+0294 <[^>]*> addu \$a0,\$a0,\$a1 +0+0298 <[^>]*> lw \$a0,0\(\$gp\) +[ ]*298: R_MIPS_GOT16 small_external_data_label +0+029c <[^>]*> nop +0+02a0 <[^>]*> addu \$a0,\$a0,\$a1 +0+02a4 <[^>]*> lw \$a0,0\(\$gp\) +[ ]*2a4: R_MIPS_GOT16 big_external_common +0+02a8 <[^>]*> nop +0+02ac <[^>]*> addu \$a0,\$a0,\$a1 +0+02b0 <[^>]*> lw \$a0,0\(\$gp\) +[ ]*2b0: R_MIPS_GOT16 small_external_common +0+02b4 <[^>]*> nop +0+02b8 <[^>]*> addu \$a0,\$a0,\$a1 +0+02bc <[^>]*> lw \$a0,0\(\$gp\) +[ ]*2bc: R_MIPS_GOT16 .bss +0+02c0 <[^>]*> nop +0+02c4 <[^>]*> addiu \$a0,\$a0,0 +[ ]*2c4: R_MIPS_LO16 .bss +0+02c8 <[^>]*> addu \$a0,\$a0,\$a1 +0+02cc <[^>]*> lw \$a0,0\(\$gp\) +[ ]*2cc: R_MIPS_GOT16 .bss +0+02d0 <[^>]*> nop +0+02d4 <[^>]*> addiu \$a0,\$a0,1000 +[ ]*2d4: R_MIPS_LO16 .bss +0+02d8 <[^>]*> addu \$a0,\$a0,\$a1 +0+02dc <[^>]*> lw \$a0,0\(\$gp\) +[ ]*2dc: R_MIPS_GOT16 .data +0+02e0 <[^>]*> nop +0+02e4 <[^>]*> addiu \$a0,\$a0,1 +[ ]*2e4: R_MIPS_LO16 .data +0+02e8 <[^>]*> addu \$a0,\$a0,\$a1 +0+02ec <[^>]*> lw \$a0,0\(\$gp\) +[ ]*2ec: R_MIPS_GOT16 big_external_data_label +0+02f0 <[^>]*> nop +0+02f4 <[^>]*> addiu \$a0,\$a0,1 +0+02f8 <[^>]*> addu \$a0,\$a0,\$a1 +0+02fc <[^>]*> lw \$a0,0\(\$gp\) +[ ]*2fc: R_MIPS_GOT16 small_external_data_label +0+0300 <[^>]*> nop +0+0304 <[^>]*> addiu \$a0,\$a0,1 +0+0308 <[^>]*> addu \$a0,\$a0,\$a1 +0+030c <[^>]*> lw \$a0,0\(\$gp\) +[ ]*30c: R_MIPS_GOT16 big_external_common +0+0310 <[^>]*> nop +0+0314 <[^>]*> addiu \$a0,\$a0,1 +0+0318 <[^>]*> addu \$a0,\$a0,\$a1 +0+031c <[^>]*> lw \$a0,0\(\$gp\) +[ ]*31c: R_MIPS_GOT16 small_external_common +0+0320 <[^>]*> nop +0+0324 <[^>]*> addiu \$a0,\$a0,1 +0+0328 <[^>]*> addu \$a0,\$a0,\$a1 +0+032c <[^>]*> lw \$a0,0\(\$gp\) +[ ]*32c: R_MIPS_GOT16 .bss +0+0330 <[^>]*> nop +0+0334 <[^>]*> addiu \$a0,\$a0,1 +[ ]*334: R_MIPS_LO16 .bss +0+0338 <[^>]*> addu \$a0,\$a0,\$a1 +0+033c <[^>]*> lw \$a0,0\(\$gp\) +[ ]*33c: R_MIPS_GOT16 .bss +0+0340 <[^>]*> nop +0+0344 <[^>]*> addiu \$a0,\$a0,1001 +[ ]*344: R_MIPS_LO16 .bss +0+0348 <[^>]*> addu \$a0,\$a0,\$a1 +0+034c <[^>]*> lw \$a0,0\(\$gp\) +[ ]*34c: R_MIPS_GOT16 .data +0+0350 <[^>]*> lui \$at,0x1 +0+0354 <[^>]*> addiu \$at,\$at,-32768 +[ ]*354: R_MIPS_LO16 .data +0+0358 <[^>]*> addu \$a0,\$a0,\$at +0+035c <[^>]*> addu \$a0,\$a0,\$a1 +0+0360 <[^>]*> lw \$a0,0\(\$gp\) +[ ]*360: R_MIPS_GOT16 big_external_data_label +0+0364 <[^>]*> lui \$at,0x1 +0+0368 <[^>]*> addiu \$at,\$at,-32768 +0+036c <[^>]*> addu \$a0,\$a0,\$at +0+0370 <[^>]*> addu \$a0,\$a0,\$a1 +0+0374 <[^>]*> lw \$a0,0\(\$gp\) +[ ]*374: R_MIPS_GOT16 small_external_data_label +0+0378 <[^>]*> lui \$at,0x1 +0+037c <[^>]*> addiu \$at,\$at,-32768 +0+0380 <[^>]*> addu \$a0,\$a0,\$at +0+0384 <[^>]*> addu \$a0,\$a0,\$a1 +0+0388 <[^>]*> lw \$a0,0\(\$gp\) +[ ]*388: R_MIPS_GOT16 big_external_common +0+038c <[^>]*> lui \$at,0x1 +0+0390 <[^>]*> addiu \$at,\$at,-32768 +0+0394 <[^>]*> addu \$a0,\$a0,\$at +0+0398 <[^>]*> addu \$a0,\$a0,\$a1 +0+039c <[^>]*> lw \$a0,0\(\$gp\) +[ ]*39c: R_MIPS_GOT16 small_external_common +0+03a0 <[^>]*> lui \$at,0x1 +0+03a4 <[^>]*> addiu \$at,\$at,-32768 +0+03a8 <[^>]*> addu \$a0,\$a0,\$at +0+03ac <[^>]*> addu \$a0,\$a0,\$a1 +0+03b0 <[^>]*> lw \$a0,0\(\$gp\) +[ ]*3b0: R_MIPS_GOT16 .bss +0+03b4 <[^>]*> lui \$at,0x1 +0+03b8 <[^>]*> addiu \$at,\$at,-32768 +[ ]*3b8: R_MIPS_LO16 .bss +0+03bc <[^>]*> addu \$a0,\$a0,\$at +0+03c0 <[^>]*> addu \$a0,\$a0,\$a1 +0+03c4 <[^>]*> lw \$a0,0\(\$gp\) +[ ]*3c4: R_MIPS_GOT16 .bss +0+03c8 <[^>]*> lui \$at,0x1 +0+03cc <[^>]*> addiu \$at,\$at,-31768 +[ ]*3cc: R_MIPS_LO16 .bss +0+03d0 <[^>]*> addu \$a0,\$a0,\$at +0+03d4 <[^>]*> addu \$a0,\$a0,\$a1 +0+03d8 <[^>]*> lw \$a0,0\(\$gp\) +[ ]*3d8: R_MIPS_GOT16 .data +0+03dc <[^>]*> nop +0+03e0 <[^>]*> addiu \$a0,\$a0,-32768 +[ ]*3e0: R_MIPS_LO16 .data +0+03e4 <[^>]*> addu \$a0,\$a0,\$a1 +0+03e8 <[^>]*> lw \$a0,0\(\$gp\) +[ ]*3e8: R_MIPS_GOT16 big_external_data_label +0+03ec <[^>]*> nop +0+03f0 <[^>]*> addiu \$a0,\$a0,-32768 +0+03f4 <[^>]*> addu \$a0,\$a0,\$a1 +0+03f8 <[^>]*> lw \$a0,0\(\$gp\) +[ ]*3f8: R_MIPS_GOT16 small_external_data_label +0+03fc <[^>]*> nop +0+0400 <[^>]*> addiu \$a0,\$a0,-32768 +0+0404 <[^>]*> addu \$a0,\$a0,\$a1 +0+0408 <[^>]*> lw \$a0,0\(\$gp\) +[ ]*408: R_MIPS_GOT16 big_external_common +0+040c <[^>]*> nop +0+0410 <[^>]*> addiu \$a0,\$a0,-32768 +0+0414 <[^>]*> addu \$a0,\$a0,\$a1 +0+0418 <[^>]*> lw \$a0,0\(\$gp\) +[ ]*418: R_MIPS_GOT16 small_external_common +0+041c <[^>]*> nop +0+0420 <[^>]*> addiu \$a0,\$a0,-32768 +0+0424 <[^>]*> addu \$a0,\$a0,\$a1 +0+0428 <[^>]*> lw \$a0,0\(\$gp\) +[ ]*428: R_MIPS_GOT16 .bss +0+042c <[^>]*> nop +0+0430 <[^>]*> addiu \$a0,\$a0,-32768 +[ ]*430: R_MIPS_LO16 .bss +0+0434 <[^>]*> addu \$a0,\$a0,\$a1 +0+0438 <[^>]*> lw \$a0,0\(\$gp\) +[ ]*438: R_MIPS_GOT16 .bss +0+043c <[^>]*> nop +0+0440 <[^>]*> addiu \$a0,\$a0,-31768 +[ ]*440: R_MIPS_LO16 .bss +0+0444 <[^>]*> addu \$a0,\$a0,\$a1 +0+0448 <[^>]*> lw \$a0,0\(\$gp\) +[ ]*448: R_MIPS_GOT16 .data +0+044c <[^>]*> lui \$at,0x1 +0+0450 <[^>]*> addiu \$at,\$at,0 +[ ]*450: R_MIPS_LO16 .data +0+0454 <[^>]*> addu \$a0,\$a0,\$at +0+0458 <[^>]*> addu \$a0,\$a0,\$a1 +0+045c <[^>]*> lw \$a0,0\(\$gp\) +[ ]*45c: R_MIPS_GOT16 big_external_data_label +0+0460 <[^>]*> lui \$at,0x1 +0+0464 <[^>]*> addiu \$at,\$at,0 +0+0468 <[^>]*> addu \$a0,\$a0,\$at +0+046c <[^>]*> addu \$a0,\$a0,\$a1 +0+0470 <[^>]*> lw \$a0,0\(\$gp\) +[ ]*470: R_MIPS_GOT16 small_external_data_label +0+0474 <[^>]*> lui \$at,0x1 +0+0478 <[^>]*> addiu \$at,\$at,0 +0+047c <[^>]*> addu \$a0,\$a0,\$at +0+0480 <[^>]*> addu \$a0,\$a0,\$a1 +0+0484 <[^>]*> lw \$a0,0\(\$gp\) +[ ]*484: R_MIPS_GOT16 big_external_common +0+0488 <[^>]*> lui \$at,0x1 +0+048c <[^>]*> addiu \$at,\$at,0 +0+0490 <[^>]*> addu \$a0,\$a0,\$at +0+0494 <[^>]*> addu \$a0,\$a0,\$a1 +0+0498 <[^>]*> lw \$a0,0\(\$gp\) +[ ]*498: R_MIPS_GOT16 small_external_common +0+049c <[^>]*> lui \$at,0x1 +0+04a0 <[^>]*> addiu \$at,\$at,0 +0+04a4 <[^>]*> addu \$a0,\$a0,\$at +0+04a8 <[^>]*> addu \$a0,\$a0,\$a1 +0+04ac <[^>]*> lw \$a0,0\(\$gp\) +[ ]*4ac: R_MIPS_GOT16 .bss +0+04b0 <[^>]*> lui \$at,0x1 +0+04b4 <[^>]*> addiu \$at,\$at,0 +[ ]*4b4: R_MIPS_LO16 .bss +0+04b8 <[^>]*> addu \$a0,\$a0,\$at +0+04bc <[^>]*> addu \$a0,\$a0,\$a1 +0+04c0 <[^>]*> lw \$a0,0\(\$gp\) +[ ]*4c0: R_MIPS_GOT16 .bss +0+04c4 <[^>]*> lui \$at,0x1 +0+04c8 <[^>]*> addiu \$at,\$at,1000 +[ ]*4c8: R_MIPS_LO16 .bss +0+04cc <[^>]*> addu \$a0,\$a0,\$at +0+04d0 <[^>]*> addu \$a0,\$a0,\$a1 +0+04d4 <[^>]*> lw \$a0,0\(\$gp\) +[ ]*4d4: R_MIPS_GOT16 .data +0+04d8 <[^>]*> lui \$at,0x2 +0+04dc <[^>]*> addiu \$at,\$at,-23131 +[ ]*4dc: R_MIPS_LO16 .data +0+04e0 <[^>]*> addu \$a0,\$a0,\$at +0+04e4 <[^>]*> addu \$a0,\$a0,\$a1 +0+04e8 <[^>]*> lw \$a0,0\(\$gp\) +[ ]*4e8: R_MIPS_GOT16 big_external_data_label +0+04ec <[^>]*> lui \$at,0x2 +0+04f0 <[^>]*> addiu \$at,\$at,-23131 +0+04f4 <[^>]*> addu \$a0,\$a0,\$at +0+04f8 <[^>]*> addu \$a0,\$a0,\$a1 +0+04fc <[^>]*> lw \$a0,0\(\$gp\) +[ ]*4fc: R_MIPS_GOT16 small_external_data_label +0+0500 <[^>]*> lui \$at,0x2 +0+0504 <[^>]*> addiu \$at,\$at,-23131 +0+0508 <[^>]*> addu \$a0,\$a0,\$at +0+050c <[^>]*> addu \$a0,\$a0,\$a1 +0+0510 <[^>]*> lw \$a0,0\(\$gp\) +[ ]*510: R_MIPS_GOT16 big_external_common +0+0514 <[^>]*> lui \$at,0x2 +0+0518 <[^>]*> addiu \$at,\$at,-23131 +0+051c <[^>]*> addu \$a0,\$a0,\$at +0+0520 <[^>]*> addu \$a0,\$a0,\$a1 +0+0524 <[^>]*> lw \$a0,0\(\$gp\) +[ ]*524: R_MIPS_GOT16 small_external_common +0+0528 <[^>]*> lui \$at,0x2 +0+052c <[^>]*> addiu \$at,\$at,-23131 +0+0530 <[^>]*> addu \$a0,\$a0,\$at +0+0534 <[^>]*> addu \$a0,\$a0,\$a1 +0+0538 <[^>]*> lw \$a0,0\(\$gp\) +[ ]*538: R_MIPS_GOT16 .bss +0+053c <[^>]*> lui \$at,0x2 +0+0540 <[^>]*> addiu \$at,\$at,-23131 +[ ]*540: R_MIPS_LO16 .bss +0+0544 <[^>]*> addu \$a0,\$a0,\$at +0+0548 <[^>]*> addu \$a0,\$a0,\$a1 +0+054c <[^>]*> lw \$a0,0\(\$gp\) +[ ]*54c: R_MIPS_GOT16 .bss +0+0550 <[^>]*> lui \$at,0x2 +0+0554 <[^>]*> addiu \$at,\$at,-22131 +[ ]*554: R_MIPS_LO16 .bss +0+0558 <[^>]*> addu \$a0,\$a0,\$at +0+055c <[^>]*> addu \$a0,\$a0,\$a1 diff --git a/gas/testsuite/gas/mips/la-xgot.d b/gas/testsuite/gas/mips/la-xgot.d new file mode 100644 index 0000000..6e5cd26 --- /dev/null +++ b/gas/testsuite/gas/mips/la-xgot.d @@ -0,0 +1,618 @@ +#objdump: -dr --prefix-addresses -mmips:3000 +#name: MIPS la-xgot +#as: -mips1 -KPIC -xgot --defsym KPIC=1 +#source: la.s + +# Test the la macro with -KPIC -xgot. + +.*: +file format .*mips.* + +Disassembly of section .text: +0+0000 <[^>]*> li \$a0,0 +0+0004 <[^>]*> li \$a0,1 +0+0008 <[^>]*> li \$a0,0x8000 +0+000c <[^>]*> li \$a0,-32768 +0+0010 <[^>]*> lui \$a0,0x1 +0+0014 <[^>]*> lui \$a0,0x1 +0+0018 <[^>]*> ori \$a0,\$a0,0xa5a5 +0+001c <[^>]*> li \$a0,0 +0+0020 <[^>]*> addu \$a0,\$a0,\$a1 +0+0024 <[^>]*> li \$a0,1 +0+0028 <[^>]*> addu \$a0,\$a0,\$a1 +0+002c <[^>]*> li \$a0,0x8000 +0+0030 <[^>]*> addu \$a0,\$a0,\$a1 +0+0034 <[^>]*> li \$a0,-32768 +0+0038 <[^>]*> addu \$a0,\$a0,\$a1 +0+003c <[^>]*> lui \$a0,0x1 +0+0040 <[^>]*> addu \$a0,\$a0,\$a1 +0+0044 <[^>]*> lui \$a0,0x1 +0+0048 <[^>]*> ori \$a0,\$a0,0xa5a5 +0+004c <[^>]*> addu \$a0,\$a0,\$a1 +0+0050 <[^>]*> lw \$a0,0\(\$gp\) +[ ]*50: R_MIPS_GOT16 .data +0+0054 <[^>]*> nop +0+0058 <[^>]*> addiu \$a0,\$a0,0 +[ ]*58: R_MIPS_LO16 .data +0+005c <[^>]*> lui \$a0,0x0 +[ ]*5c: R_MIPS_GOT_HI16 big_external_data_label +0+0060 <[^>]*> addu \$a0,\$a0,\$gp +0+0064 <[^>]*> lw \$a0,0\(\$a0\) +[ ]*64: R_MIPS_GOT_LO16 big_external_data_label +0+0068 <[^>]*> lui \$a0,0x0 +[ ]*68: R_MIPS_GOT_HI16 small_external_data_label +0+006c <[^>]*> addu \$a0,\$a0,\$gp +0+0070 <[^>]*> lw \$a0,0\(\$a0\) +[ ]*70: R_MIPS_GOT_LO16 small_external_data_label +0+0074 <[^>]*> lui \$a0,0x0 +[ ]*74: R_MIPS_GOT_HI16 big_external_common +0+0078 <[^>]*> addu \$a0,\$a0,\$gp +0+007c <[^>]*> lw \$a0,0\(\$a0\) +[ ]*7c: R_MIPS_GOT_LO16 big_external_common +0+0080 <[^>]*> lui \$a0,0x0 +[ ]*80: R_MIPS_GOT_HI16 small_external_common +0+0084 <[^>]*> addu \$a0,\$a0,\$gp +0+0088 <[^>]*> lw \$a0,0\(\$a0\) +[ ]*88: R_MIPS_GOT_LO16 small_external_common +0+008c <[^>]*> lw \$a0,0\(\$gp\) +[ ]*8c: R_MIPS_GOT16 .bss +0+0090 <[^>]*> nop +0+0094 <[^>]*> addiu \$a0,\$a0,0 +[ ]*94: R_MIPS_LO16 .bss +0+0098 <[^>]*> lw \$a0,0\(\$gp\) +[ ]*98: R_MIPS_GOT16 .bss +0+009c <[^>]*> nop +0+00a0 <[^>]*> addiu \$a0,\$a0,1000 +[ ]*a0: R_MIPS_LO16 .bss +0+00a4 <[^>]*> lw \$a0,0\(\$gp\) +[ ]*a4: R_MIPS_GOT16 .data +0+00a8 <[^>]*> nop +0+00ac <[^>]*> addiu \$a0,\$a0,1 +[ ]*ac: R_MIPS_LO16 .data +0+00b0 <[^>]*> lui \$a0,0x0 +[ ]*b0: R_MIPS_GOT_HI16 big_external_data_label +0+00b4 <[^>]*> addu \$a0,\$a0,\$gp +0+00b8 <[^>]*> lw \$a0,0\(\$a0\) +[ ]*b8: R_MIPS_GOT_LO16 big_external_data_label +0+00bc <[^>]*> nop +0+00c0 <[^>]*> addiu \$a0,\$a0,1 +0+00c4 <[^>]*> lui \$a0,0x0 +[ ]*c4: R_MIPS_GOT_HI16 small_external_data_label +0+00c8 <[^>]*> addu \$a0,\$a0,\$gp +0+00cc <[^>]*> lw \$a0,0\(\$a0\) +[ ]*cc: R_MIPS_GOT_LO16 small_external_data_label +0+00d0 <[^>]*> nop +0+00d4 <[^>]*> addiu \$a0,\$a0,1 +0+00d8 <[^>]*> lui \$a0,0x0 +[ ]*d8: R_MIPS_GOT_HI16 big_external_common +0+00dc <[^>]*> addu \$a0,\$a0,\$gp +0+00e0 <[^>]*> lw \$a0,0\(\$a0\) +[ ]*e0: R_MIPS_GOT_LO16 big_external_common +0+00e4 <[^>]*> nop +0+00e8 <[^>]*> addiu \$a0,\$a0,1 +0+00ec <[^>]*> lui \$a0,0x0 +[ ]*ec: R_MIPS_GOT_HI16 small_external_common +0+00f0 <[^>]*> addu \$a0,\$a0,\$gp +0+00f4 <[^>]*> lw \$a0,0\(\$a0\) +[ ]*f4: R_MIPS_GOT_LO16 small_external_common +0+00f8 <[^>]*> nop +0+00fc <[^>]*> addiu \$a0,\$a0,1 +0+0100 <[^>]*> lw \$a0,0\(\$gp\) +[ ]*100: R_MIPS_GOT16 .bss +0+0104 <[^>]*> nop +0+0108 <[^>]*> addiu \$a0,\$a0,1 +[ ]*108: R_MIPS_LO16 .bss +0+010c <[^>]*> lw \$a0,0\(\$gp\) +[ ]*10c: R_MIPS_GOT16 .bss +0+0110 <[^>]*> nop +0+0114 <[^>]*> addiu \$a0,\$a0,1001 +[ ]*114: R_MIPS_LO16 .bss +0+0118 <[^>]*> lw \$a0,0\(\$gp\) +[ ]*118: R_MIPS_GOT16 .data +0+011c <[^>]*> lui \$at,0x1 +0+0120 <[^>]*> addiu \$at,\$at,-32768 +[ ]*120: R_MIPS_LO16 .data +0+0124 <[^>]*> addu \$a0,\$a0,\$at +0+0128 <[^>]*> lui \$a0,0x0 +[ ]*128: R_MIPS_GOT_HI16 big_external_data_label +0+012c <[^>]*> addu \$a0,\$a0,\$gp +0+0130 <[^>]*> lw \$a0,0\(\$a0\) +[ ]*130: R_MIPS_GOT_LO16 big_external_data_label +0+0134 <[^>]*> lui \$at,0x1 +0+0138 <[^>]*> addiu \$at,\$at,-32768 +0+013c <[^>]*> addu \$a0,\$a0,\$at +0+0140 <[^>]*> lui \$a0,0x0 +[ ]*140: R_MIPS_GOT_HI16 small_external_data_label +0+0144 <[^>]*> addu \$a0,\$a0,\$gp +0+0148 <[^>]*> lw \$a0,0\(\$a0\) +[ ]*148: R_MIPS_GOT_LO16 small_external_data_label +0+014c <[^>]*> lui \$at,0x1 +0+0150 <[^>]*> addiu \$at,\$at,-32768 +0+0154 <[^>]*> addu \$a0,\$a0,\$at +0+0158 <[^>]*> lui \$a0,0x0 +[ ]*158: R_MIPS_GOT_HI16 big_external_common +0+015c <[^>]*> addu \$a0,\$a0,\$gp +0+0160 <[^>]*> lw \$a0,0\(\$a0\) +[ ]*160: R_MIPS_GOT_LO16 big_external_common +0+0164 <[^>]*> lui \$at,0x1 +0+0168 <[^>]*> addiu \$at,\$at,-32768 +0+016c <[^>]*> addu \$a0,\$a0,\$at +0+0170 <[^>]*> lui \$a0,0x0 +[ ]*170: R_MIPS_GOT_HI16 small_external_common +0+0174 <[^>]*> addu \$a0,\$a0,\$gp +0+0178 <[^>]*> lw \$a0,0\(\$a0\) +[ ]*178: R_MIPS_GOT_LO16 small_external_common +0+017c <[^>]*> lui \$at,0x1 +0+0180 <[^>]*> addiu \$at,\$at,-32768 +0+0184 <[^>]*> addu \$a0,\$a0,\$at +0+0188 <[^>]*> lw \$a0,0\(\$gp\) +[ ]*188: R_MIPS_GOT16 .bss +0+018c <[^>]*> lui \$at,0x1 +0+0190 <[^>]*> addiu \$at,\$at,-32768 +[ ]*190: R_MIPS_LO16 .bss +0+0194 <[^>]*> addu \$a0,\$a0,\$at +0+0198 <[^>]*> lw \$a0,0\(\$gp\) +[ ]*198: R_MIPS_GOT16 .bss +0+019c <[^>]*> lui \$at,0x1 +0+01a0 <[^>]*> addiu \$at,\$at,-31768 +[ ]*1a0: R_MIPS_LO16 .bss +0+01a4 <[^>]*> addu \$a0,\$a0,\$at +0+01a8 <[^>]*> lw \$a0,0\(\$gp\) +[ ]*1a8: R_MIPS_GOT16 .data +0+01ac <[^>]*> nop +0+01b0 <[^>]*> addiu \$a0,\$a0,-32768 +[ ]*1b0: R_MIPS_LO16 .data +0+01b4 <[^>]*> lui \$a0,0x0 +[ ]*1b4: R_MIPS_GOT_HI16 big_external_data_label +0+01b8 <[^>]*> addu \$a0,\$a0,\$gp +0+01bc <[^>]*> lw \$a0,0\(\$a0\) +[ ]*1bc: R_MIPS_GOT_LO16 big_external_data_label +0+01c0 <[^>]*> nop +0+01c4 <[^>]*> addiu \$a0,\$a0,-32768 +0+01c8 <[^>]*> lui \$a0,0x0 +[ ]*1c8: R_MIPS_GOT_HI16 small_external_data_label +0+01cc <[^>]*> addu \$a0,\$a0,\$gp +0+01d0 <[^>]*> lw \$a0,0\(\$a0\) +[ ]*1d0: R_MIPS_GOT_LO16 small_external_data_label +0+01d4 <[^>]*> nop +0+01d8 <[^>]*> addiu \$a0,\$a0,-32768 +0+01dc <[^>]*> lui \$a0,0x0 +[ ]*1dc: R_MIPS_GOT_HI16 big_external_common +0+01e0 <[^>]*> addu \$a0,\$a0,\$gp +0+01e4 <[^>]*> lw \$a0,0\(\$a0\) +[ ]*1e4: R_MIPS_GOT_LO16 big_external_common +0+01e8 <[^>]*> nop +0+01ec <[^>]*> addiu \$a0,\$a0,-32768 +0+01f0 <[^>]*> lui \$a0,0x0 +[ ]*1f0: R_MIPS_GOT_HI16 small_external_common +0+01f4 <[^>]*> addu \$a0,\$a0,\$gp +0+01f8 <[^>]*> lw \$a0,0\(\$a0\) +[ ]*1f8: R_MIPS_GOT_LO16 small_external_common +0+01fc <[^>]*> nop +0+0200 <[^>]*> addiu \$a0,\$a0,-32768 +0+0204 <[^>]*> lw \$a0,0\(\$gp\) +[ ]*204: R_MIPS_GOT16 .bss +0+0208 <[^>]*> nop +0+020c <[^>]*> addiu \$a0,\$a0,-32768 +[ ]*20c: R_MIPS_LO16 .bss +0+0210 <[^>]*> lw \$a0,0\(\$gp\) +[ ]*210: R_MIPS_GOT16 .bss +0+0214 <[^>]*> nop +0+0218 <[^>]*> addiu \$a0,\$a0,-31768 +[ ]*218: R_MIPS_LO16 .bss +0+021c <[^>]*> lw \$a0,0\(\$gp\) +[ ]*21c: R_MIPS_GOT16 .data +0+0220 <[^>]*> lui \$at,0x1 +0+0224 <[^>]*> addiu \$at,\$at,0 +[ ]*224: R_MIPS_LO16 .data +0+0228 <[^>]*> addu \$a0,\$a0,\$at +0+022c <[^>]*> lui \$a0,0x0 +[ ]*22c: R_MIPS_GOT_HI16 big_external_data_label +0+0230 <[^>]*> addu \$a0,\$a0,\$gp +0+0234 <[^>]*> lw \$a0,0\(\$a0\) +[ ]*234: R_MIPS_GOT_LO16 big_external_data_label +0+0238 <[^>]*> lui \$at,0x1 +0+023c <[^>]*> addiu \$at,\$at,0 +0+0240 <[^>]*> addu \$a0,\$a0,\$at +0+0244 <[^>]*> lui \$a0,0x0 +[ ]*244: R_MIPS_GOT_HI16 small_external_data_label +0+0248 <[^>]*> addu \$a0,\$a0,\$gp +0+024c <[^>]*> lw \$a0,0\(\$a0\) +[ ]*24c: R_MIPS_GOT_LO16 small_external_data_label +0+0250 <[^>]*> lui \$at,0x1 +0+0254 <[^>]*> addiu \$at,\$at,0 +0+0258 <[^>]*> addu \$a0,\$a0,\$at +0+025c <[^>]*> lui \$a0,0x0 +[ ]*25c: R_MIPS_GOT_HI16 big_external_common +0+0260 <[^>]*> addu \$a0,\$a0,\$gp +0+0264 <[^>]*> lw \$a0,0\(\$a0\) +[ ]*264: R_MIPS_GOT_LO16 big_external_common +0+0268 <[^>]*> lui \$at,0x1 +0+026c <[^>]*> addiu \$at,\$at,0 +0+0270 <[^>]*> addu \$a0,\$a0,\$at +0+0274 <[^>]*> lui \$a0,0x0 +[ ]*274: R_MIPS_GOT_HI16 small_external_common +0+0278 <[^>]*> addu \$a0,\$a0,\$gp +0+027c <[^>]*> lw \$a0,0\(\$a0\) +[ ]*27c: R_MIPS_GOT_LO16 small_external_common +0+0280 <[^>]*> lui \$at,0x1 +0+0284 <[^>]*> addiu \$at,\$at,0 +0+0288 <[^>]*> addu \$a0,\$a0,\$at +0+028c <[^>]*> lw \$a0,0\(\$gp\) +[ ]*28c: R_MIPS_GOT16 .bss +0+0290 <[^>]*> lui \$at,0x1 +0+0294 <[^>]*> addiu \$at,\$at,0 +[ ]*294: R_MIPS_LO16 .bss +0+0298 <[^>]*> addu \$a0,\$a0,\$at +0+029c <[^>]*> lw \$a0,0\(\$gp\) +[ ]*29c: R_MIPS_GOT16 .bss +0+02a0 <[^>]*> lui \$at,0x1 +0+02a4 <[^>]*> addiu \$at,\$at,1000 +[ ]*2a4: R_MIPS_LO16 .bss +0+02a8 <[^>]*> addu \$a0,\$a0,\$at +0+02ac <[^>]*> lw \$a0,0\(\$gp\) +[ ]*2ac: R_MIPS_GOT16 .data +0+02b0 <[^>]*> lui \$at,0x2 +0+02b4 <[^>]*> addiu \$at,\$at,-23131 +[ ]*2b4: R_MIPS_LO16 .data +0+02b8 <[^>]*> addu \$a0,\$a0,\$at +0+02bc <[^>]*> lui \$a0,0x0 +[ ]*2bc: R_MIPS_GOT_HI16 big_external_data_label +0+02c0 <[^>]*> addu \$a0,\$a0,\$gp +0+02c4 <[^>]*> lw \$a0,0\(\$a0\) +[ ]*2c4: R_MIPS_GOT_LO16 big_external_data_label +0+02c8 <[^>]*> lui \$at,0x2 +0+02cc <[^>]*> addiu \$at,\$at,-23131 +0+02d0 <[^>]*> addu \$a0,\$a0,\$at +0+02d4 <[^>]*> lui \$a0,0x0 +[ ]*2d4: R_MIPS_GOT_HI16 small_external_data_label +0+02d8 <[^>]*> addu \$a0,\$a0,\$gp +0+02dc <[^>]*> lw \$a0,0\(\$a0\) +[ ]*2dc: R_MIPS_GOT_LO16 small_external_data_label +0+02e0 <[^>]*> lui \$at,0x2 +0+02e4 <[^>]*> addiu \$at,\$at,-23131 +0+02e8 <[^>]*> addu \$a0,\$a0,\$at +0+02ec <[^>]*> lui \$a0,0x0 +[ ]*2ec: R_MIPS_GOT_HI16 big_external_common +0+02f0 <[^>]*> addu \$a0,\$a0,\$gp +0+02f4 <[^>]*> lw \$a0,0\(\$a0\) +[ ]*2f4: R_MIPS_GOT_LO16 big_external_common +0+02f8 <[^>]*> lui \$at,0x2 +0+02fc <[^>]*> addiu \$at,\$at,-23131 +0+0300 <[^>]*> addu \$a0,\$a0,\$at +0+0304 <[^>]*> lui \$a0,0x0 +[ ]*304: R_MIPS_GOT_HI16 small_external_common +0+0308 <[^>]*> addu \$a0,\$a0,\$gp +0+030c <[^>]*> lw \$a0,0\(\$a0\) +[ ]*30c: R_MIPS_GOT_LO16 small_external_common +0+0310 <[^>]*> lui \$at,0x2 +0+0314 <[^>]*> addiu \$at,\$at,-23131 +0+0318 <[^>]*> addu \$a0,\$a0,\$at +0+031c <[^>]*> lw \$a0,0\(\$gp\) +[ ]*31c: R_MIPS_GOT16 .bss +0+0320 <[^>]*> lui \$at,0x2 +0+0324 <[^>]*> addiu \$at,\$at,-23131 +[ ]*324: R_MIPS_LO16 .bss +0+0328 <[^>]*> addu \$a0,\$a0,\$at +0+032c <[^>]*> lw \$a0,0\(\$gp\) +[ ]*32c: R_MIPS_GOT16 .bss +0+0330 <[^>]*> lui \$at,0x2 +0+0334 <[^>]*> addiu \$at,\$at,-22131 +[ ]*334: R_MIPS_LO16 .bss +0+0338 <[^>]*> addu \$a0,\$a0,\$at +0+033c <[^>]*> lw \$a0,0\(\$gp\) +[ ]*33c: R_MIPS_GOT16 .data +0+0340 <[^>]*> nop +0+0344 <[^>]*> addiu \$a0,\$a0,0 +[ ]*344: R_MIPS_LO16 .data +0+0348 <[^>]*> addu \$a0,\$a0,\$a1 +0+034c <[^>]*> lui \$a0,0x0 +[ ]*34c: R_MIPS_GOT_HI16 big_external_data_label +0+0350 <[^>]*> addu \$a0,\$a0,\$gp +0+0354 <[^>]*> lw \$a0,0\(\$a0\) +[ ]*354: R_MIPS_GOT_LO16 big_external_data_label +0+0358 <[^>]*> nop +0+035c <[^>]*> addu \$a0,\$a0,\$a1 +0+0360 <[^>]*> lui \$a0,0x0 +[ ]*360: R_MIPS_GOT_HI16 small_external_data_label +0+0364 <[^>]*> addu \$a0,\$a0,\$gp +0+0368 <[^>]*> lw \$a0,0\(\$a0\) +[ ]*368: R_MIPS_GOT_LO16 small_external_data_label +0+036c <[^>]*> nop +0+0370 <[^>]*> addu \$a0,\$a0,\$a1 +0+0374 <[^>]*> lui \$a0,0x0 +[ ]*374: R_MIPS_GOT_HI16 big_external_common +0+0378 <[^>]*> addu \$a0,\$a0,\$gp +0+037c <[^>]*> lw \$a0,0\(\$a0\) +[ ]*37c: R_MIPS_GOT_LO16 big_external_common +0+0380 <[^>]*> nop +0+0384 <[^>]*> addu \$a0,\$a0,\$a1 +0+0388 <[^>]*> lui \$a0,0x0 +[ ]*388: R_MIPS_GOT_HI16 small_external_common +0+038c <[^>]*> addu \$a0,\$a0,\$gp +0+0390 <[^>]*> lw \$a0,0\(\$a0\) +[ ]*390: R_MIPS_GOT_LO16 small_external_common +0+0394 <[^>]*> nop +0+0398 <[^>]*> addu \$a0,\$a0,\$a1 +0+039c <[^>]*> lw \$a0,0\(\$gp\) +[ ]*39c: R_MIPS_GOT16 .bss +0+03a0 <[^>]*> nop +0+03a4 <[^>]*> addiu \$a0,\$a0,0 +[ ]*3a4: R_MIPS_LO16 .bss +0+03a8 <[^>]*> addu \$a0,\$a0,\$a1 +0+03ac <[^>]*> lw \$a0,0\(\$gp\) +[ ]*3ac: R_MIPS_GOT16 .bss +0+03b0 <[^>]*> nop +0+03b4 <[^>]*> addiu \$a0,\$a0,1000 +[ ]*3b4: R_MIPS_LO16 .bss +0+03b8 <[^>]*> addu \$a0,\$a0,\$a1 +0+03bc <[^>]*> lw \$a0,0\(\$gp\) +[ ]*3bc: R_MIPS_GOT16 .data +0+03c0 <[^>]*> nop +0+03c4 <[^>]*> addiu \$a0,\$a0,1 +[ ]*3c4: R_MIPS_LO16 .data +0+03c8 <[^>]*> addu \$a0,\$a0,\$a1 +0+03cc <[^>]*> lui \$a0,0x0 +[ ]*3cc: R_MIPS_GOT_HI16 big_external_data_label +0+03d0 <[^>]*> addu \$a0,\$a0,\$gp +0+03d4 <[^>]*> lw \$a0,0\(\$a0\) +[ ]*3d4: R_MIPS_GOT_LO16 big_external_data_label +0+03d8 <[^>]*> nop +0+03dc <[^>]*> addiu \$a0,\$a0,1 +0+03e0 <[^>]*> addu \$a0,\$a0,\$a1 +0+03e4 <[^>]*> lui \$a0,0x0 +[ ]*3e4: R_MIPS_GOT_HI16 small_external_data_label +0+03e8 <[^>]*> addu \$a0,\$a0,\$gp +0+03ec <[^>]*> lw \$a0,0\(\$a0\) +[ ]*3ec: R_MIPS_GOT_LO16 small_external_data_label +0+03f0 <[^>]*> nop +0+03f4 <[^>]*> addiu \$a0,\$a0,1 +0+03f8 <[^>]*> addu \$a0,\$a0,\$a1 +0+03fc <[^>]*> lui \$a0,0x0 +[ ]*3fc: R_MIPS_GOT_HI16 big_external_common +0+0400 <[^>]*> addu \$a0,\$a0,\$gp +0+0404 <[^>]*> lw \$a0,0\(\$a0\) +[ ]*404: R_MIPS_GOT_LO16 big_external_common +0+0408 <[^>]*> nop +0+040c <[^>]*> addiu \$a0,\$a0,1 +0+0410 <[^>]*> addu \$a0,\$a0,\$a1 +0+0414 <[^>]*> lui \$a0,0x0 +[ ]*414: R_MIPS_GOT_HI16 small_external_common +0+0418 <[^>]*> addu \$a0,\$a0,\$gp +0+041c <[^>]*> lw \$a0,0\(\$a0\) +[ ]*41c: R_MIPS_GOT_LO16 small_external_common +0+0420 <[^>]*> nop +0+0424 <[^>]*> addiu \$a0,\$a0,1 +0+0428 <[^>]*> addu \$a0,\$a0,\$a1 +0+042c <[^>]*> lw \$a0,0\(\$gp\) +[ ]*42c: R_MIPS_GOT16 .bss +0+0430 <[^>]*> nop +0+0434 <[^>]*> addiu \$a0,\$a0,1 +[ ]*434: R_MIPS_LO16 .bss +0+0438 <[^>]*> addu \$a0,\$a0,\$a1 +0+043c <[^>]*> lw \$a0,0\(\$gp\) +[ ]*43c: R_MIPS_GOT16 .bss +0+0440 <[^>]*> nop +0+0444 <[^>]*> addiu \$a0,\$a0,1001 +[ ]*444: R_MIPS_LO16 .bss +0+0448 <[^>]*> addu \$a0,\$a0,\$a1 +0+044c <[^>]*> lw \$a0,0\(\$gp\) +[ ]*44c: R_MIPS_GOT16 .data +0+0450 <[^>]*> lui \$at,0x1 +0+0454 <[^>]*> addiu \$at,\$at,-32768 +[ ]*454: R_MIPS_LO16 .data +0+0458 <[^>]*> addu \$a0,\$a0,\$at +0+045c <[^>]*> addu \$a0,\$a0,\$a1 +0+0460 <[^>]*> lui \$a0,0x0 +[ ]*460: R_MIPS_GOT_HI16 big_external_data_label +0+0464 <[^>]*> addu \$a0,\$a0,\$gp +0+0468 <[^>]*> lw \$a0,0\(\$a0\) +[ ]*468: R_MIPS_GOT_LO16 big_external_data_label +0+046c <[^>]*> lui \$at,0x1 +0+0470 <[^>]*> addiu \$at,\$at,-32768 +0+0474 <[^>]*> addu \$a0,\$a0,\$at +0+0478 <[^>]*> addu \$a0,\$a0,\$a1 +0+047c <[^>]*> lui \$a0,0x0 +[ ]*47c: R_MIPS_GOT_HI16 small_external_data_label +0+0480 <[^>]*> addu \$a0,\$a0,\$gp +0+0484 <[^>]*> lw \$a0,0\(\$a0\) +[ ]*484: R_MIPS_GOT_LO16 small_external_data_label +0+0488 <[^>]*> lui \$at,0x1 +0+048c <[^>]*> addiu \$at,\$at,-32768 +0+0490 <[^>]*> addu \$a0,\$a0,\$at +0+0494 <[^>]*> addu \$a0,\$a0,\$a1 +0+0498 <[^>]*> lui \$a0,0x0 +[ ]*498: R_MIPS_GOT_HI16 big_external_common +0+049c <[^>]*> addu \$a0,\$a0,\$gp +0+04a0 <[^>]*> lw \$a0,0\(\$a0\) +[ ]*4a0: R_MIPS_GOT_LO16 big_external_common +0+04a4 <[^>]*> lui \$at,0x1 +0+04a8 <[^>]*> addiu \$at,\$at,-32768 +0+04ac <[^>]*> addu \$a0,\$a0,\$at +0+04b0 <[^>]*> addu \$a0,\$a0,\$a1 +0+04b4 <[^>]*> lui \$a0,0x0 +[ ]*4b4: R_MIPS_GOT_HI16 small_external_common +0+04b8 <[^>]*> addu \$a0,\$a0,\$gp +0+04bc <[^>]*> lw \$a0,0\(\$a0\) +[ ]*4bc: R_MIPS_GOT_LO16 small_external_common +0+04c0 <[^>]*> lui \$at,0x1 +0+04c4 <[^>]*> addiu \$at,\$at,-32768 +0+04c8 <[^>]*> addu \$a0,\$a0,\$at +0+04cc <[^>]*> addu \$a0,\$a0,\$a1 +0+04d0 <[^>]*> lw \$a0,0\(\$gp\) +[ ]*4d0: R_MIPS_GOT16 .bss +0+04d4 <[^>]*> lui \$at,0x1 +0+04d8 <[^>]*> addiu \$at,\$at,-32768 +[ ]*4d8: R_MIPS_LO16 .bss +0+04dc <[^>]*> addu \$a0,\$a0,\$at +0+04e0 <[^>]*> addu \$a0,\$a0,\$a1 +0+04e4 <[^>]*> lw \$a0,0\(\$gp\) +[ ]*4e4: R_MIPS_GOT16 .bss +0+04e8 <[^>]*> lui \$at,0x1 +0+04ec <[^>]*> addiu \$at,\$at,-31768 +[ ]*4ec: R_MIPS_LO16 .bss +0+04f0 <[^>]*> addu \$a0,\$a0,\$at +0+04f4 <[^>]*> addu \$a0,\$a0,\$a1 +0+04f8 <[^>]*> lw \$a0,0\(\$gp\) +[ ]*4f8: R_MIPS_GOT16 .data +0+04fc <[^>]*> nop +0+0500 <[^>]*> addiu \$a0,\$a0,-32768 +[ ]*500: R_MIPS_LO16 .data +0+0504 <[^>]*> addu \$a0,\$a0,\$a1 +0+0508 <[^>]*> lui \$a0,0x0 +[ ]*508: R_MIPS_GOT_HI16 big_external_data_label +0+050c <[^>]*> addu \$a0,\$a0,\$gp +0+0510 <[^>]*> lw \$a0,0\(\$a0\) +[ ]*510: R_MIPS_GOT_LO16 big_external_data_label +0+0514 <[^>]*> nop +0+0518 <[^>]*> addiu \$a0,\$a0,-32768 +0+051c <[^>]*> addu \$a0,\$a0,\$a1 +0+0520 <[^>]*> lui \$a0,0x0 +[ ]*520: R_MIPS_GOT_HI16 small_external_data_label +0+0524 <[^>]*> addu \$a0,\$a0,\$gp +0+0528 <[^>]*> lw \$a0,0\(\$a0\) +[ ]*528: R_MIPS_GOT_LO16 small_external_data_label +0+052c <[^>]*> nop +0+0530 <[^>]*> addiu \$a0,\$a0,-32768 +0+0534 <[^>]*> addu \$a0,\$a0,\$a1 +0+0538 <[^>]*> lui \$a0,0x0 +[ ]*538: R_MIPS_GOT_HI16 big_external_common +0+053c <[^>]*> addu \$a0,\$a0,\$gp +0+0540 <[^>]*> lw \$a0,0\(\$a0\) +[ ]*540: R_MIPS_GOT_LO16 big_external_common +0+0544 <[^>]*> nop +0+0548 <[^>]*> addiu \$a0,\$a0,-32768 +0+054c <[^>]*> addu \$a0,\$a0,\$a1 +0+0550 <[^>]*> lui \$a0,0x0 +[ ]*550: R_MIPS_GOT_HI16 small_external_common +0+0554 <[^>]*> addu \$a0,\$a0,\$gp +0+0558 <[^>]*> lw \$a0,0\(\$a0\) +[ ]*558: R_MIPS_GOT_LO16 small_external_common +0+055c <[^>]*> nop +0+0560 <[^>]*> addiu \$a0,\$a0,-32768 +0+0564 <[^>]*> addu \$a0,\$a0,\$a1 +0+0568 <[^>]*> lw \$a0,0\(\$gp\) +[ ]*568: R_MIPS_GOT16 .bss +0+056c <[^>]*> nop +0+0570 <[^>]*> addiu \$a0,\$a0,-32768 +[ ]*570: R_MIPS_LO16 .bss +0+0574 <[^>]*> addu \$a0,\$a0,\$a1 +0+0578 <[^>]*> lw \$a0,0\(\$gp\) +[ ]*578: R_MIPS_GOT16 .bss +0+057c <[^>]*> nop +0+0580 <[^>]*> addiu \$a0,\$a0,-31768 +[ ]*580: R_MIPS_LO16 .bss +0+0584 <[^>]*> addu \$a0,\$a0,\$a1 +0+0588 <[^>]*> lw \$a0,0\(\$gp\) +[ ]*588: R_MIPS_GOT16 .data +0+058c <[^>]*> lui \$at,0x1 +0+0590 <[^>]*> addiu \$at,\$at,0 +[ ]*590: R_MIPS_LO16 .data +0+0594 <[^>]*> addu \$a0,\$a0,\$at +0+0598 <[^>]*> addu \$a0,\$a0,\$a1 +0+059c <[^>]*> lui \$a0,0x0 +[ ]*59c: R_MIPS_GOT_HI16 big_external_data_label +0+05a0 <[^>]*> addu \$a0,\$a0,\$gp +0+05a4 <[^>]*> lw \$a0,0\(\$a0\) +[ ]*5a4: R_MIPS_GOT_LO16 big_external_data_label +0+05a8 <[^>]*> lui \$at,0x1 +0+05ac <[^>]*> addiu \$at,\$at,0 +0+05b0 <[^>]*> addu \$a0,\$a0,\$at +0+05b4 <[^>]*> addu \$a0,\$a0,\$a1 +0+05b8 <[^>]*> lui \$a0,0x0 +[ ]*5b8: R_MIPS_GOT_HI16 small_external_data_label +0+05bc <[^>]*> addu \$a0,\$a0,\$gp +0+05c0 <[^>]*> lw \$a0,0\(\$a0\) +[ ]*5c0: R_MIPS_GOT_LO16 small_external_data_label +0+05c4 <[^>]*> lui \$at,0x1 +0+05c8 <[^>]*> addiu \$at,\$at,0 +0+05cc <[^>]*> addu \$a0,\$a0,\$at +0+05d0 <[^>]*> addu \$a0,\$a0,\$a1 +0+05d4 <[^>]*> lui \$a0,0x0 +[ ]*5d4: R_MIPS_GOT_HI16 big_external_common +0+05d8 <[^>]*> addu \$a0,\$a0,\$gp +0+05dc <[^>]*> lw \$a0,0\(\$a0\) +[ ]*5dc: R_MIPS_GOT_LO16 big_external_common +0+05e0 <[^>]*> lui \$at,0x1 +0+05e4 <[^>]*> addiu \$at,\$at,0 +0+05e8 <[^>]*> addu \$a0,\$a0,\$at +0+05ec <[^>]*> addu \$a0,\$a0,\$a1 +0+05f0 <[^>]*> lui \$a0,0x0 +[ ]*5f0: R_MIPS_GOT_HI16 small_external_common +0+05f4 <[^>]*> addu \$a0,\$a0,\$gp +0+05f8 <[^>]*> lw \$a0,0\(\$a0\) +[ ]*5f8: R_MIPS_GOT_LO16 small_external_common +0+05fc <[^>]*> lui \$at,0x1 +0+0600 <[^>]*> addiu \$at,\$at,0 +0+0604 <[^>]*> addu \$a0,\$a0,\$at +0+0608 <[^>]*> addu \$a0,\$a0,\$a1 +0+060c <[^>]*> lw \$a0,0\(\$gp\) +[ ]*60c: R_MIPS_GOT16 .bss +0+0610 <[^>]*> lui \$at,0x1 +0+0614 <[^>]*> addiu \$at,\$at,0 +[ ]*614: R_MIPS_LO16 .bss +0+0618 <[^>]*> addu \$a0,\$a0,\$at +0+061c <[^>]*> addu \$a0,\$a0,\$a1 +0+0620 <[^>]*> lw \$a0,0\(\$gp\) +[ ]*620: R_MIPS_GOT16 .bss +0+0624 <[^>]*> lui \$at,0x1 +0+0628 <[^>]*> addiu \$at,\$at,1000 +[ ]*628: R_MIPS_LO16 .bss +0+062c <[^>]*> addu \$a0,\$a0,\$at +0+0630 <[^>]*> addu \$a0,\$a0,\$a1 +0+0634 <[^>]*> lw \$a0,0\(\$gp\) +[ ]*634: R_MIPS_GOT16 .data +0+0638 <[^>]*> lui \$at,0x2 +0+063c <[^>]*> addiu \$at,\$at,-23131 +[ ]*63c: R_MIPS_LO16 .data +0+0640 <[^>]*> addu \$a0,\$a0,\$at +0+0644 <[^>]*> addu \$a0,\$a0,\$a1 +0+0648 <[^>]*> lui \$a0,0x0 +[ ]*648: R_MIPS_GOT_HI16 big_external_data_label +0+064c <[^>]*> addu \$a0,\$a0,\$gp +0+0650 <[^>]*> lw \$a0,0\(\$a0\) +[ ]*650: R_MIPS_GOT_LO16 big_external_data_label +0+0654 <[^>]*> lui \$at,0x2 +0+0658 <[^>]*> addiu \$at,\$at,-23131 +0+065c <[^>]*> addu \$a0,\$a0,\$at +0+0660 <[^>]*> addu \$a0,\$a0,\$a1 +0+0664 <[^>]*> lui \$a0,0x0 +[ ]*664: R_MIPS_GOT_HI16 small_external_data_label +0+0668 <[^>]*> addu \$a0,\$a0,\$gp +0+066c <[^>]*> lw \$a0,0\(\$a0\) +[ ]*66c: R_MIPS_GOT_LO16 small_external_data_label +0+0670 <[^>]*> lui \$at,0x2 +0+0674 <[^>]*> addiu \$at,\$at,-23131 +0+0678 <[^>]*> addu \$a0,\$a0,\$at +0+067c <[^>]*> addu \$a0,\$a0,\$a1 +0+0680 <[^>]*> lui \$a0,0x0 +[ ]*680: R_MIPS_GOT_HI16 big_external_common +0+0684 <[^>]*> addu \$a0,\$a0,\$gp +0+0688 <[^>]*> lw \$a0,0\(\$a0\) +[ ]*688: R_MIPS_GOT_LO16 big_external_common +0+068c <[^>]*> lui \$at,0x2 +0+0690 <[^>]*> addiu \$at,\$at,-23131 +0+0694 <[^>]*> addu \$a0,\$a0,\$at +0+0698 <[^>]*> addu \$a0,\$a0,\$a1 +0+069c <[^>]*> lui \$a0,0x0 +[ ]*69c: R_MIPS_GOT_HI16 small_external_common +0+06a0 <[^>]*> addu \$a0,\$a0,\$gp +0+06a4 <[^>]*> lw \$a0,0\(\$a0\) +[ ]*6a4: R_MIPS_GOT_LO16 small_external_common +0+06a8 <[^>]*> lui \$at,0x2 +0+06ac <[^>]*> addiu \$at,\$at,-23131 +0+06b0 <[^>]*> addu \$a0,\$a0,\$at +0+06b4 <[^>]*> addu \$a0,\$a0,\$a1 +0+06b8 <[^>]*> lw \$a0,0\(\$gp\) +[ ]*6b8: R_MIPS_GOT16 .bss +0+06bc <[^>]*> lui \$at,0x2 +0+06c0 <[^>]*> addiu \$at,\$at,-23131 +[ ]*6c0: R_MIPS_LO16 .bss +0+06c4 <[^>]*> addu \$a0,\$a0,\$at +0+06c8 <[^>]*> addu \$a0,\$a0,\$a1 +0+06cc <[^>]*> lw \$a0,0\(\$gp\) +[ ]*6cc: R_MIPS_GOT16 .bss +0+06d0 <[^>]*> lui \$at,0x2 +0+06d4 <[^>]*> addiu \$at,\$at,-22131 +[ ]*6d4: R_MIPS_LO16 .bss +0+06d8 <[^>]*> addu \$a0,\$a0,\$at +0+06dc <[^>]*> addu \$a0,\$a0,\$a1 diff --git a/gas/testsuite/gas/mips/la.d b/gas/testsuite/gas/mips/la.d new file mode 100644 index 0000000..25eaa1e --- /dev/null +++ b/gas/testsuite/gas/mips/la.d @@ -0,0 +1,384 @@ +#objdump: -dr --prefix-addresses -mmips:3000 +#name: MIPS la +#as: -mips1 + +# Test the la macro. + +.*: +file format .*mips.* + +Disassembly of section .text: +0+0000 <[^>]*> li \$a0,0 +0+0004 <[^>]*> li \$a0,1 +0+0008 <[^>]*> li \$a0,0x8000 +0+000c <[^>]*> li \$a0,-32768 +0+0010 <[^>]*> lui \$a0,0x1 +0+0014 <[^>]*> lui \$a0,0x1 +0+0018 <[^>]*> ori \$a0,\$a0,0xa5a5 +0+001c <[^>]*> li \$a0,0 +0+0020 <[^>]*> addu \$a0,\$a0,\$a1 +0+0024 <[^>]*> li \$a0,1 +0+0028 <[^>]*> addu \$a0,\$a0,\$a1 +0+002c <[^>]*> li \$a0,0x8000 +0+0030 <[^>]*> addu \$a0,\$a0,\$a1 +0+0034 <[^>]*> li \$a0,-32768 +0+0038 <[^>]*> addu \$a0,\$a0,\$a1 +0+003c <[^>]*> lui \$a0,0x1 +0+0040 <[^>]*> addu \$a0,\$a0,\$a1 +0+0044 <[^>]*> lui \$a0,0x1 +0+0048 <[^>]*> ori \$a0,\$a0,0xa5a5 +0+004c <[^>]*> addu \$a0,\$a0,\$a1 +0+0050 <[^>]*> lui \$a0,0x0 +[ ]*50: [A-Z0-9_]*HI[A-Z0-9_]* .data.* +0+0054 <[^>]*> addiu \$a0,\$a0,[-0-9]+ +[ ]*54: [A-Z0-9_]*LO[A-Z0-9_]* .data.* +0+0058 <[^>]*> lui \$a0,0x0 +[ ]*58: [A-Z0-9_]*HI[A-Z0-9_]* big_external_data_label +0+005c <[^>]*> addiu \$a0,\$a0,0 +[ ]*5c: [A-Z0-9_]*LO[A-Z0-9_]* big_external_data_label +0+0060 <[^>]*> addiu \$a0,\$gp,0 +[ ]*60: [A-Z0-9_]*GPREL[A-Z0-9_]* small_external_data_label +0+0064 <[^>]*> lui \$a0,0x0 +[ ]*64: [A-Z0-9_]*HI[A-Z0-9_]* big_external_common +0+0068 <[^>]*> addiu \$a0,\$a0,0 +[ ]*68: [A-Z0-9_]*LO[A-Z0-9_]* big_external_common +0+006c <[^>]*> addiu \$a0,\$gp,0 +[ ]*6c: [A-Z0-9_]*GPREL[A-Z0-9_]* small_external_common +0+0070 <[^>]*> lui \$a0,0x0 +[ ]*70: [A-Z0-9_]*HI[A-Z0-9_]* .bss.* +0+0074 <[^>]*> addiu \$a0,\$a0,[-0-9]+ +[ ]*74: [A-Z0-9_]*LO[A-Z0-9_]* .bss.* +0+0078 <[^>]*> addiu \$a0,\$gp,[-0-9]+ +[ ]*78: [A-Z0-9_]*GPREL[A-Z0-9_]* .sbss.* +0+007c <[^>]*> lui \$a0,0x0 +[ ]*7c: [A-Z0-9_]*HI[A-Z0-9_]* .data.* +0+0080 <[^>]*> addiu \$a0,\$a0,[-0-9]+ +[ ]*80: [A-Z0-9_]*LO[A-Z0-9_]* .data.* +0+0084 <[^>]*> lui \$a0,0x0 +[ ]*84: [A-Z0-9_]*HI[A-Z0-9_]* big_external_data_label +0+0088 <[^>]*> addiu \$a0,\$a0,[-0-9]+ +[ ]*88: [A-Z0-9_]*LO[A-Z0-9_]* big_external_data_label +0+008c <[^>]*> addiu \$a0,\$gp,[-0-9]+ +[ ]*8c: [A-Z0-9_]*GPREL[A-Z0-9_]* small_external_data_label +0+0090 <[^>]*> lui \$a0,0x0 +[ ]*90: [A-Z0-9_]*HI[A-Z0-9_]* big_external_common +0+0094 <[^>]*> addiu \$a0,\$a0,[-0-9]+ +[ ]*94: [A-Z0-9_]*LO[A-Z0-9_]* big_external_common +0+0098 <[^>]*> addiu \$a0,\$gp,[-0-9]+ +[ ]*98: [A-Z0-9_]*GPREL[A-Z0-9_]* small_external_common +0+009c <[^>]*> lui \$a0,0x0 +[ ]*9c: [A-Z0-9_]*HI[A-Z0-9_]* .bss.* +0+00a0 <[^>]*> addiu \$a0,\$a0,[-0-9]+ +[ ]*a0: [A-Z0-9_]*LO[A-Z0-9_]* .bss.* +0+00a4 <[^>]*> addiu \$a0,\$gp,[-0-9]+ +[ ]*a4: [A-Z0-9_]*GPREL[A-Z0-9_]* .sbss.* +0+00a8 <[^>]*> lui \$a0,[-0-9x]+ +[ ]*a8: [A-Z0-9_]*HI[A-Z0-9_]* .data.* +0+00ac <[^>]*> addiu \$a0,\$a0,[-0-9]+ +[ ]*ac: [A-Z0-9_]*LO[A-Z0-9_]* .data.* +0+00b0 <[^>]*> lui \$a0,[-0-9x]+ +[ ]*b0: [A-Z0-9_]*HI[A-Z0-9_]* big_external_data_label +0+00b4 <[^>]*> addiu \$a0,\$a0,[-0-9]+ +[ ]*b4: [A-Z0-9_]*LO[A-Z0-9_]* big_external_data_label +0+00b8 <[^>]*> lui \$a0,[-0-9x]+ +[ ]*b8: [A-Z0-9_]*HI[A-Z0-9_]* small_external_data_label +0+00bc <[^>]*> addiu \$a0,\$a0,[-0-9]+ +[ ]*bc: [A-Z0-9_]*LO[A-Z0-9_]* small_external_data_label +0+00c0 <[^>]*> lui \$a0,[-0-9x]+ +[ ]*c0: [A-Z0-9_]*HI[A-Z0-9_]* big_external_common +0+00c4 <[^>]*> addiu \$a0,\$a0,[-0-9]+ +[ ]*c4: [A-Z0-9_]*LO[A-Z0-9_]* big_external_common +0+00c8 <[^>]*> lui \$a0,[-0-9x]+ +[ ]*c8: [A-Z0-9_]*HI[A-Z0-9_]* small_external_common +0+00cc <[^>]*> addiu \$a0,\$a0,[-0-9]+ +[ ]*cc: [A-Z0-9_]*LO[A-Z0-9_]* small_external_common +0+00d0 <[^>]*> lui \$a0,[-0-9x]+ +[ ]*d0: [A-Z0-9_]*HI[A-Z0-9_]* .bss.* +0+00d4 <[^>]*> addiu \$a0,\$a0,[-0-9]+ +[ ]*d4: [A-Z0-9_]*LO[A-Z0-9_]* .bss.* +0+00d8 <[^>]*> lui \$a0,[-0-9x]+ +[ ]*d8: [A-Z0-9_]*HI[A-Z0-9_]* .sbss.* +0+00dc <[^>]*> addiu \$a0,\$a0,[-0-9]+ +[ ]*dc: [A-Z0-9_]*LO[A-Z0-9_]* .sbss.* +0+00e0 <[^>]*> lui \$a0,0x0 +[ ]*e0: [A-Z0-9_]*HI[A-Z0-9_]* .data.* +0+00e4 <[^>]*> addiu \$a0,\$a0,[-0-9]+ +[ ]*e4: [A-Z0-9_]*LO[A-Z0-9_]* .data.* +0+00e8 <[^>]*> lui \$a0,0x0 +[ ]*e8: [A-Z0-9_]*HI[A-Z0-9_]* big_external_data_label +0+00ec <[^>]*> addiu \$a0,\$a0,[-0-9]+ +[ ]*ec: [A-Z0-9_]*LO[A-Z0-9_]* big_external_data_label +0+00f0 <[^>]*> lui \$a0,0x0 +[ ]*f0: [A-Z0-9_]*HI[A-Z0-9_]* small_external_data_label +0+00f4 <[^>]*> addiu \$a0,\$a0,[-0-9]+ +[ ]*f4: [A-Z0-9_]*LO[A-Z0-9_]* small_external_data_label +0+00f8 <[^>]*> lui \$a0,0x0 +[ ]*f8: [A-Z0-9_]*HI[A-Z0-9_]* big_external_common +0+00fc <[^>]*> addiu \$a0,\$a0,[-0-9]+ +[ ]*fc: [A-Z0-9_]*LO[A-Z0-9_]* big_external_common +0+0100 <[^>]*> lui \$a0,0x0 +[ ]*100: [A-Z0-9_]*HI[A-Z0-9_]* small_external_common +0+0104 <[^>]*> addiu \$a0,\$a0,[-0-9]+ +[ ]*104: [A-Z0-9_]*LO[A-Z0-9_]* small_external_common +0+0108 <[^>]*> lui \$a0,0x0 +[ ]*108: [A-Z0-9_]*HI[A-Z0-9_]* .bss.* +0+010c <[^>]*> addiu \$a0,\$a0,[-0-9]+ +[ ]*10c: [A-Z0-9_]*LO[A-Z0-9_]* .bss.* +0+0110 <[^>]*> lui \$a0,0x0 +[ ]*110: [A-Z0-9_]*HI[A-Z0-9_]* .sbss.* +0+0114 <[^>]*> addiu \$a0,\$a0,[-0-9]+ +[ ]*114: [A-Z0-9_]*LO[A-Z0-9_]* .sbss.* +0+0118 <[^>]*> lui \$a0,[-0-9x]+ +[ ]*118: [A-Z0-9_]*HI[A-Z0-9_]* .data.* +0+011c <[^>]*> addiu \$a0,\$a0,[-0-9]+ +[ ]*11c: [A-Z0-9_]*LO[A-Z0-9_]* .data.* +0+0120 <[^>]*> lui \$a0,[-0-9x]+ +[ ]*120: [A-Z0-9_]*HI[A-Z0-9_]* big_external_data_label +0+0124 <[^>]*> addiu \$a0,\$a0,0 +[ ]*124: [A-Z0-9_]*LO[A-Z0-9_]* big_external_data_label +0+0128 <[^>]*> lui \$a0,[-0-9x]+ +[ ]*128: [A-Z0-9_]*HI[A-Z0-9_]* small_external_data_label +0+012c <[^>]*> addiu \$a0,\$a0,0 +[ ]*12c: [A-Z0-9_]*LO[A-Z0-9_]* small_external_data_label +0+0130 <[^>]*> lui \$a0,[-0-9x]+ +[ ]*130: [A-Z0-9_]*HI[A-Z0-9_]* big_external_common +0+0134 <[^>]*> addiu \$a0,\$a0,0 +[ ]*134: [A-Z0-9_]*LO[A-Z0-9_]* big_external_common +0+0138 <[^>]*> lui \$a0,[-0-9x]+ +[ ]*138: [A-Z0-9_]*HI[A-Z0-9_]* small_external_common +0+013c <[^>]*> addiu \$a0,\$a0,0 +[ ]*13c: [A-Z0-9_]*LO[A-Z0-9_]* small_external_common +0+0140 <[^>]*> lui \$a0,[-0-9x]+ +[ ]*140: [A-Z0-9_]*HI[A-Z0-9_]* .bss.* +0+0144 <[^>]*> addiu \$a0,\$a0,[-0-9]+ +[ ]*144: [A-Z0-9_]*LO[A-Z0-9_]* .bss.* +0+0148 <[^>]*> lui \$a0,[-0-9x]+ +[ ]*148: [A-Z0-9_]*HI[A-Z0-9_]* .sbss.* +0+014c <[^>]*> addiu \$a0,\$a0,[-0-9]+ +[ ]*14c: [A-Z0-9_]*LO[A-Z0-9_]* .sbss.* +0+0150 <[^>]*> lui \$a0,[-0-9x]+ +[ ]*150: [A-Z0-9_]*HI[A-Z0-9_]* .data.* +0+0154 <[^>]*> addiu \$a0,\$a0,[-0-9]+ +[ ]*154: [A-Z0-9_]*LO[A-Z0-9_]* .data.* +0+0158 <[^>]*> lui \$a0,[-0-9x]+ +[ ]*158: [A-Z0-9_]*HI[A-Z0-9_]* big_external_data_label +0+015c <[^>]*> addiu \$a0,\$a0,[-0-9]+ +[ ]*15c: [A-Z0-9_]*LO[A-Z0-9_]* big_external_data_label +0+0160 <[^>]*> lui \$a0,[-0-9x]+ +[ ]*160: [A-Z0-9_]*HI[A-Z0-9_]* small_external_data_label +0+0164 <[^>]*> addiu \$a0,\$a0,[-0-9]+ +[ ]*164: [A-Z0-9_]*LO[A-Z0-9_]* small_external_data_label +0+0168 <[^>]*> lui \$a0,[-0-9x]+ +[ ]*168: [A-Z0-9_]*HI[A-Z0-9_]* big_external_common +0+016c <[^>]*> addiu \$a0,\$a0,[-0-9]+ +[ ]*16c: [A-Z0-9_]*LO[A-Z0-9_]* big_external_common +0+0170 <[^>]*> lui \$a0,[-0-9x]+ +[ ]*170: [A-Z0-9_]*HI[A-Z0-9_]* small_external_common +0+0174 <[^>]*> addiu \$a0,\$a0,[-0-9]+ +[ ]*174: [A-Z0-9_]*LO[A-Z0-9_]* small_external_common +0+0178 <[^>]*> lui \$a0,[-0-9x]+ +[ ]*178: [A-Z0-9_]*HI[A-Z0-9_]* .bss.* +0+017c <[^>]*> addiu \$a0,\$a0,[-0-9]+ +[ ]*17c: [A-Z0-9_]*LO[A-Z0-9_]* .bss.* +0+0180 <[^>]*> lui \$a0,[-0-9x]+ +[ ]*180: [A-Z0-9_]*HI[A-Z0-9_]* .sbss.* +0+0184 <[^>]*> addiu \$a0,\$a0,[-0-9]+ +[ ]*184: [A-Z0-9_]*LO[A-Z0-9_]* .sbss.* +0+0188 <[^>]*> lui \$a0,0x0 +[ ]*188: [A-Z0-9_]*HI[A-Z0-9_]* .data.* +0+018c <[^>]*> addiu \$a0,\$a0,[-0-9]+ +[ ]*18c: [A-Z0-9_]*LO[A-Z0-9_]* .data.* +0+0190 <[^>]*> addu \$a0,\$a0,\$a1 +0+0194 <[^>]*> lui \$a0,0x0 +[ ]*194: [A-Z0-9_]*HI[A-Z0-9_]* big_external_data_label +0+0198 <[^>]*> addiu \$a0,\$a0,0 +[ ]*198: [A-Z0-9_]*LO[A-Z0-9_]* big_external_data_label +0+019c <[^>]*> addu \$a0,\$a0,\$a1 +0+01a0 <[^>]*> addiu \$a0,\$gp,0 +[ ]*1a0: [A-Z0-9_]*GPREL[A-Z0-9_]* small_external_data_label +0+01a4 <[^>]*> addu \$a0,\$a0,\$a1 +0+01a8 <[^>]*> lui \$a0,0x0 +[ ]*1a8: [A-Z0-9_]*HI[A-Z0-9_]* big_external_common +0+01ac <[^>]*> addiu \$a0,\$a0,0 +[ ]*1ac: [A-Z0-9_]*LO[A-Z0-9_]* big_external_common +0+01b0 <[^>]*> addu \$a0,\$a0,\$a1 +0+01b4 <[^>]*> addiu \$a0,\$gp,0 +[ ]*1b4: [A-Z0-9_]*GPREL[A-Z0-9_]* small_external_common +0+01b8 <[^>]*> addu \$a0,\$a0,\$a1 +0+01bc <[^>]*> lui \$a0,0x0 +[ ]*1bc: [A-Z0-9_]*HI[A-Z0-9_]* .bss.* +0+01c0 <[^>]*> addiu \$a0,\$a0,[-0-9]+ +[ ]*1c0: [A-Z0-9_]*LO[A-Z0-9_]* .bss.* +0+01c4 <[^>]*> addu \$a0,\$a0,\$a1 +0+01c8 <[^>]*> addiu \$a0,\$gp,[-0-9]+ +[ ]*1c8: [A-Z0-9_]*GPREL[A-Z0-9_]* .sbss.* +0+01cc <[^>]*> addu \$a0,\$a0,\$a1 +0+01d0 <[^>]*> lui \$a0,0x0 +[ ]*1d0: [A-Z0-9_]*HI[A-Z0-9_]* .data.* +0+01d4 <[^>]*> addiu \$a0,\$a0,[-0-9]+ +[ ]*1d4: [A-Z0-9_]*LO[A-Z0-9_]* .data.* +0+01d8 <[^>]*> addu \$a0,\$a0,\$a1 +0+01dc <[^>]*> lui \$a0,0x0 +[ ]*1dc: [A-Z0-9_]*HI[A-Z0-9_]* big_external_data_label +0+01e0 <[^>]*> addiu \$a0,\$a0,[-0-9]+ +[ ]*1e0: [A-Z0-9_]*LO[A-Z0-9_]* big_external_data_label +0+01e4 <[^>]*> addu \$a0,\$a0,\$a1 +0+01e8 <[^>]*> addiu \$a0,\$gp,[-0-9]+ +[ ]*1e8: [A-Z0-9_]*GPREL[A-Z0-9_]* small_external_data_label +0+01ec <[^>]*> addu \$a0,\$a0,\$a1 +0+01f0 <[^>]*> lui \$a0,0x0 +[ ]*1f0: [A-Z0-9_]*HI[A-Z0-9_]* big_external_common +0+01f4 <[^>]*> addiu \$a0,\$a0,[-0-9]+ +[ ]*1f4: [A-Z0-9_]*LO[A-Z0-9_]* big_external_common +0+01f8 <[^>]*> addu \$a0,\$a0,\$a1 +0+01fc <[^>]*> addiu \$a0,\$gp,[-0-9]+ +[ ]*1fc: [A-Z0-9_]*GPREL[A-Z0-9_]* small_external_common +0+0200 <[^>]*> addu \$a0,\$a0,\$a1 +0+0204 <[^>]*> lui \$a0,0x0 +[ ]*204: [A-Z0-9_]*HI[A-Z0-9_]* .bss.* +0+0208 <[^>]*> addiu \$a0,\$a0,[-0-9]+ +[ ]*208: [A-Z0-9_]*LO[A-Z0-9_]* .bss.* +0+020c <[^>]*> addu \$a0,\$a0,\$a1 +0+0210 <[^>]*> addiu \$a0,\$gp,[-0-9]+ +[ ]*210: [A-Z0-9_]*GPREL[A-Z0-9_]* .sbss.* +0+0214 <[^>]*> addu \$a0,\$a0,\$a1 +0+0218 <[^>]*> lui \$a0,[-0-9x]+ +[ ]*218: [A-Z0-9_]*HI[A-Z0-9_]* .data.* +0+021c <[^>]*> addiu \$a0,\$a0,[-0-9]+ +[ ]*21c: [A-Z0-9_]*LO[A-Z0-9_]* .data.* +0+0220 <[^>]*> addu \$a0,\$a0,\$a1 +0+0224 <[^>]*> lui \$a0,[-0-9x]+ +[ ]*224: [A-Z0-9_]*HI[A-Z0-9_]* big_external_data_label +0+0228 <[^>]*> addiu \$a0,\$a0,[-0-9]+ +[ ]*228: [A-Z0-9_]*LO[A-Z0-9_]* big_external_data_label +0+022c <[^>]*> addu \$a0,\$a0,\$a1 +0+0230 <[^>]*> lui \$a0,[-0-9x]+ +[ ]*230: [A-Z0-9_]*HI[A-Z0-9_]* small_external_data_label +0+0234 <[^>]*> addiu \$a0,\$a0,[-0-9]+ +[ ]*234: [A-Z0-9_]*LO[A-Z0-9_]* small_external_data_label +0+0238 <[^>]*> addu \$a0,\$a0,\$a1 +0+023c <[^>]*> lui \$a0,[-0-9x]+ +[ ]*23c: [A-Z0-9_]*HI[A-Z0-9_]* big_external_common +0+0240 <[^>]*> addiu \$a0,\$a0,[-0-9]+ +[ ]*240: [A-Z0-9_]*LO[A-Z0-9_]* big_external_common +0+0244 <[^>]*> addu \$a0,\$a0,\$a1 +0+0248 <[^>]*> lui \$a0,[-0-9x]+ +[ ]*248: [A-Z0-9_]*HI[A-Z0-9_]* small_external_common +0+024c <[^>]*> addiu \$a0,\$a0,[-0-9]+ +[ ]*24c: [A-Z0-9_]*LO[A-Z0-9_]* small_external_common +0+0250 <[^>]*> addu \$a0,\$a0,\$a1 +0+0254 <[^>]*> lui \$a0,[-0-9x]+ +[ ]*254: [A-Z0-9_]*HI[A-Z0-9_]* .bss.* +0+0258 <[^>]*> addiu \$a0,\$a0,[-0-9]+ +[ ]*258: [A-Z0-9_]*LO[A-Z0-9_]* .bss.* +0+025c <[^>]*> addu \$a0,\$a0,\$a1 +0+0260 <[^>]*> lui \$a0,[-0-9x]+ +[ ]*260: [A-Z0-9_]*HI[A-Z0-9_]* .sbss.* +0+0264 <[^>]*> addiu \$a0,\$a0,[-0-9]+ +[ ]*264: [A-Z0-9_]*LO[A-Z0-9_]* .sbss.* +0+0268 <[^>]*> addu \$a0,\$a0,\$a1 +0+026c <[^>]*> lui \$a0,0x0 +[ ]*26c: [A-Z0-9_]*HI[A-Z0-9_]* .data.* +0+0270 <[^>]*> addiu \$a0,\$a0,[-0-9]+ +[ ]*270: [A-Z0-9_]*LO[A-Z0-9_]* .data.* +0+0274 <[^>]*> addu \$a0,\$a0,\$a1 +0+0278 <[^>]*> lui \$a0,0x0 +[ ]*278: [A-Z0-9_]*HI[A-Z0-9_]* big_external_data_label +0+027c <[^>]*> addiu \$a0,\$a0,[-0-9]+ +[ ]*27c: [A-Z0-9_]*LO[A-Z0-9_]* big_external_data_label +0+0280 <[^>]*> addu \$a0,\$a0,\$a1 +0+0284 <[^>]*> lui \$a0,0x0 +[ ]*284: [A-Z0-9_]*HI[A-Z0-9_]* small_external_data_label +0+0288 <[^>]*> addiu \$a0,\$a0,[-0-9]+ +[ ]*288: [A-Z0-9_]*LO[A-Z0-9_]* small_external_data_label +0+028c <[^>]*> addu \$a0,\$a0,\$a1 +0+0290 <[^>]*> lui \$a0,0x0 +[ ]*290: [A-Z0-9_]*HI[A-Z0-9_]* big_external_common +0+0294 <[^>]*> addiu \$a0,\$a0,[-0-9]+ +[ ]*294: [A-Z0-9_]*LO[A-Z0-9_]* big_external_common +0+0298 <[^>]*> addu \$a0,\$a0,\$a1 +0+029c <[^>]*> lui \$a0,0x0 +[ ]*29c: [A-Z0-9_]*HI[A-Z0-9_]* small_external_common +0+02a0 <[^>]*> addiu \$a0,\$a0,[-0-9]+ +[ ]*2a0: [A-Z0-9_]*LO[A-Z0-9_]* small_external_common +0+02a4 <[^>]*> addu \$a0,\$a0,\$a1 +0+02a8 <[^>]*> lui \$a0,0x0 +[ ]*2a8: [A-Z0-9_]*HI[A-Z0-9_]* .bss.* +0+02ac <[^>]*> addiu \$a0,\$a0,[-0-9]+ +[ ]*2ac: [A-Z0-9_]*LO[A-Z0-9_]* .bss.* +0+02b0 <[^>]*> addu \$a0,\$a0,\$a1 +0+02b4 <[^>]*> lui \$a0,0x0 +[ ]*2b4: [A-Z0-9_]*HI[A-Z0-9_]* .sbss.* +0+02b8 <[^>]*> addiu \$a0,\$a0,[-0-9]+ +[ ]*2b8: [A-Z0-9_]*LO[A-Z0-9_]* .sbss.* +0+02bc <[^>]*> addu \$a0,\$a0,\$a1 +0+02c0 <[^>]*> lui \$a0,[-0-9x]+ +[ ]*2c0: [A-Z0-9_]*HI[A-Z0-9_]* .data.* +0+02c4 <[^>]*> addiu \$a0,\$a0,[-0-9]+ +[ ]*2c4: [A-Z0-9_]*LO[A-Z0-9_]* .data.* +0+02c8 <[^>]*> addu \$a0,\$a0,\$a1 +0+02cc <[^>]*> lui \$a0,[-0-9x]+ +[ ]*2cc: [A-Z0-9_]*HI[A-Z0-9_]* big_external_data_label +0+02d0 <[^>]*> addiu \$a0,\$a0,0 +[ ]*2d0: [A-Z0-9_]*LO[A-Z0-9_]* big_external_data_label +0+02d4 <[^>]*> addu \$a0,\$a0,\$a1 +0+02d8 <[^>]*> lui \$a0,[-0-9x]+ +[ ]*2d8: [A-Z0-9_]*HI[A-Z0-9_]* small_external_data_label +0+02dc <[^>]*> addiu \$a0,\$a0,0 +[ ]*2dc: [A-Z0-9_]*LO[A-Z0-9_]* small_external_data_label +0+02e0 <[^>]*> addu \$a0,\$a0,\$a1 +0+02e4 <[^>]*> lui \$a0,[-0-9x]+ +[ ]*2e4: [A-Z0-9_]*HI[A-Z0-9_]* big_external_common +0+02e8 <[^>]*> addiu \$a0,\$a0,0 +[ ]*2e8: [A-Z0-9_]*LO[A-Z0-9_]* big_external_common +0+02ec <[^>]*> addu \$a0,\$a0,\$a1 +0+02f0 <[^>]*> lui \$a0,[-0-9x]+ +[ ]*2f0: [A-Z0-9_]*HI[A-Z0-9_]* small_external_common +0+02f4 <[^>]*> addiu \$a0,\$a0,0 +[ ]*2f4: [A-Z0-9_]*LO[A-Z0-9_]* small_external_common +0+02f8 <[^>]*> addu \$a0,\$a0,\$a1 +0+02fc <[^>]*> lui \$a0,[-0-9x]+ +[ ]*2fc: [A-Z0-9_]*HI[A-Z0-9_]* .bss.* +0+0300 <[^>]*> addiu \$a0,\$a0,[-0-9]+ +[ ]*300: [A-Z0-9_]*LO[A-Z0-9_]* .bss.* +0+0304 <[^>]*> addu \$a0,\$a0,\$a1 +0+0308 <[^>]*> lui \$a0,[-0-9x]+ +[ ]*308: [A-Z0-9_]*HI[A-Z0-9_]* .sbss.* +0+030c <[^>]*> addiu \$a0,\$a0,[-0-9]+ +[ ]*30c: [A-Z0-9_]*LO[A-Z0-9_]* .sbss.* +0+0310 <[^>]*> addu \$a0,\$a0,\$a1 +0+0314 <[^>]*> lui \$a0,[-0-9x]+ +[ ]*314: [A-Z0-9_]*HI[A-Z0-9_]* .data.* +0+0318 <[^>]*> addiu \$a0,\$a0,[-0-9]+ +[ ]*318: [A-Z0-9_]*LO[A-Z0-9_]* .data.* +0+031c <[^>]*> addu \$a0,\$a0,\$a1 +0+0320 <[^>]*> lui \$a0,[-0-9x]+ +[ ]*320: [A-Z0-9_]*HI[A-Z0-9_]* big_external_data_label +0+0324 <[^>]*> addiu \$a0,\$a0,[-0-9]+ +[ ]*324: [A-Z0-9_]*LO[A-Z0-9_]* big_external_data_label +0+0328 <[^>]*> addu \$a0,\$a0,\$a1 +0+032c <[^>]*> lui \$a0,[-0-9x]+ +[ ]*32c: [A-Z0-9_]*HI[A-Z0-9_]* small_external_data_label +0+0330 <[^>]*> addiu \$a0,\$a0,[-0-9]+ +[ ]*330: [A-Z0-9_]*LO[A-Z0-9_]* small_external_data_label +0+0334 <[^>]*> addu \$a0,\$a0,\$a1 +0+0338 <[^>]*> lui \$a0,[-0-9x]+ +[ ]*338: [A-Z0-9_]*HI[A-Z0-9_]* big_external_common +0+033c <[^>]*> addiu \$a0,\$a0,[-0-9]+ +[ ]*33c: [A-Z0-9_]*LO[A-Z0-9_]* big_external_common +0+0340 <[^>]*> addu \$a0,\$a0,\$a1 +0+0344 <[^>]*> lui \$a0,[-0-9x]+ +[ ]*344: [A-Z0-9_]*HI[A-Z0-9_]* small_external_common +0+0348 <[^>]*> addiu \$a0,\$a0,[-0-9]+ +[ ]*348: [A-Z0-9_]*LO[A-Z0-9_]* small_external_common +0+034c <[^>]*> addu \$a0,\$a0,\$a1 +0+0350 <[^>]*> lui \$a0,[-0-9x]+ +[ ]*350: [A-Z0-9_]*HI[A-Z0-9_]* .bss.* +0+0354 <[^>]*> addiu \$a0,\$a0,[-0-9]+ +[ ]*354: [A-Z0-9_]*LO[A-Z0-9_]* .bss.* +0+0358 <[^>]*> addu \$a0,\$a0,\$a1 +0+035c <[^>]*> lui \$a0,[-0-9x]+ +[ ]*35c: [A-Z0-9_]*HI[A-Z0-9_]* .sbss.* +0+0360 <[^>]*> addiu \$a0,\$a0,[-0-9]+ +[ ]*360: [A-Z0-9_]*LO[A-Z0-9_]* .sbss.* +0+0364 <[^>]*> addu \$a0,\$a0,\$a1 + ... diff --git a/gas/testsuite/gas/mips/la.s b/gas/testsuite/gas/mips/la.s new file mode 100644 index 0000000..078c811 --- /dev/null +++ b/gas/testsuite/gas/mips/la.s @@ -0,0 +1,114 @@ +# Source file used to test the la macro. + + .data +data_label: + .extern big_external_data_label,1000 + .extern small_external_data_label,1 + .comm big_external_common,1000 + .comm small_external_common,1 + .lcomm big_local_common,1000 + .lcomm small_local_common,1 + + .text + la $4,0 + la $4,1 + la $4,0x8000 + la $4,-0x8000 + la $4,0x10000 + la $4,0x1a5a5 + la $4,0($5) + la $4,1($5) + la $4,0x8000($5) + la $4,-0x8000($5) + la $4,0x10000($5) + la $4,0x1a5a5($5) + la $4,data_label + la $4,big_external_data_label + la $4,small_external_data_label + la $4,big_external_common + la $4,small_external_common + la $4,big_local_common + la $4,small_local_common + la $4,data_label+1 + la $4,big_external_data_label+1 + la $4,small_external_data_label+1 + la $4,big_external_common+1 + la $4,small_external_common+1 + la $4,big_local_common+1 + la $4,small_local_common+1 + la $4,data_label+0x8000 + la $4,big_external_data_label+0x8000 + la $4,small_external_data_label+0x8000 + la $4,big_external_common+0x8000 + la $4,small_external_common+0x8000 + la $4,big_local_common+0x8000 + la $4,small_local_common+0x8000 + la $4,data_label-0x8000 + la $4,big_external_data_label-0x8000 + la $4,small_external_data_label-0x8000 + la $4,big_external_common-0x8000 + la $4,small_external_common-0x8000 + la $4,big_local_common-0x8000 + la $4,small_local_common-0x8000 + la $4,data_label+0x10000 + la $4,big_external_data_label+0x10000 + la $4,small_external_data_label+0x10000 + la $4,big_external_common+0x10000 + la $4,small_external_common+0x10000 + la $4,big_local_common+0x10000 + la $4,small_local_common+0x10000 + la $4,data_label+0x1a5a5 + la $4,big_external_data_label+0x1a5a5 + la $4,small_external_data_label+0x1a5a5 + la $4,big_external_common+0x1a5a5 + la $4,small_external_common+0x1a5a5 + la $4,big_local_common+0x1a5a5 + la $4,small_local_common+0x1a5a5 + la $4,data_label($5) + la $4,big_external_data_label($5) + la $4,small_external_data_label($5) + la $4,big_external_common($5) + la $4,small_external_common($5) + la $4,big_local_common($5) + la $4,small_local_common($5) + la $4,data_label+1($5) + la $4,big_external_data_label+1($5) + la $4,small_external_data_label+1($5) + la $4,big_external_common+1($5) + la $4,small_external_common+1($5) + la $4,big_local_common+1($5) + la $4,small_local_common+1($5) + la $4,data_label+0x8000($5) + la $4,big_external_data_label+0x8000($5) + la $4,small_external_data_label+0x8000($5) + la $4,big_external_common+0x8000($5) + la $4,small_external_common+0x8000($5) + la $4,big_local_common+0x8000($5) + la $4,small_local_common+0x8000($5) + la $4,data_label-0x8000($5) + la $4,big_external_data_label-0x8000($5) + la $4,small_external_data_label-0x8000($5) + la $4,big_external_common-0x8000($5) + la $4,small_external_common-0x8000($5) + la $4,big_local_common-0x8000($5) + la $4,small_local_common-0x8000($5) + la $4,data_label+0x10000($5) + la $4,big_external_data_label+0x10000($5) + la $4,small_external_data_label+0x10000($5) + la $4,big_external_common+0x10000($5) + la $4,small_external_common+0x10000($5) + la $4,big_local_common+0x10000($5) + la $4,small_local_common+0x10000($5) + la $4,data_label+0x1a5a5($5) + la $4,big_external_data_label+0x1a5a5($5) + la $4,small_external_data_label+0x1a5a5($5) + la $4,big_external_common+0x1a5a5($5) + la $4,small_external_common+0x1a5a5($5) + la $4,big_local_common+0x1a5a5($5) + la $4,small_local_common+0x1a5a5($5) + + .ifndef KPIC +# Round to a 16 byte boundary, for ease in testing multiple targets. + nop + nop + .endif diff --git a/gas/testsuite/gas/mips/lb-empic.d b/gas/testsuite/gas/mips/lb-empic.d new file mode 100644 index 0000000..9724a32 --- /dev/null +++ b/gas/testsuite/gas/mips/lb-empic.d @@ -0,0 +1,102 @@ +#objdump: -dr --prefix-addresses -mmips:3000 +#name: MIPS lb-empic +#as: -mips1 -membedded-pic +#source: lb-pic.s + +# Test the lb macro with -membedded-pic. + +.*: +file format .*mips.* + +Disassembly of section .text: +0+0000 <[^>]*> lb \$a0,0\(\$zero\) +0+0004 <[^>]*> lb \$a0,1\(\$zero\) +0+0008 <[^>]*> lui \$a0,0x1 +0+000c <[^>]*> lb \$a0,-32768\(\$a0\) +0+0010 <[^>]*> lb \$a0,-32768\(\$zero\) +0+0014 <[^>]*> lui \$a0,0x1 +0+0018 <[^>]*> lb \$a0,0\(\$a0\) +0+001c <[^>]*> lui \$a0,0x2 +0+0020 <[^>]*> lb \$a0,-23131\(\$a0\) +0+0024 <[^>]*> lb \$a0,0\(\$a1\) +0+0028 <[^>]*> lb \$a0,1\(\$a1\) +0+002c <[^>]*> lui \$a0,0x1 +0+0030 <[^>]*> addu \$a0,\$a0,\$a1 +0+0034 <[^>]*> lb \$a0,-32768\(\$a0\) +0+0038 <[^>]*> lb \$a0,-32768\(\$a1\) +0+003c <[^>]*> lui \$a0,0x1 +0+0040 <[^>]*> addu \$a0,\$a0,\$a1 +0+0044 <[^>]*> lb \$a0,0\(\$a0\) +0+0048 <[^>]*> lui \$a0,0x2 +0+004c <[^>]*> addu \$a0,\$a0,\$a1 +0+0050 <[^>]*> lb \$a0,-23131\(\$a0\) +0+0054 <[^>]*> lb \$a0,-16384\(\$gp\) +[ ]*54: [A-Z0-9_]*GPREL[A-Z0-9_]* .sdata.* +0+0058 <[^>]*> lb \$a0,0\(\$gp\) +[ ]*58: [A-Z0-9_]*GPREL[A-Z0-9_]* big_external_data_label +0+005c <[^>]*> lb \$a0,0\(\$gp\) +[ ]*5c: [A-Z0-9_]*GPREL[A-Z0-9_]* small_external_data_label +0+0060 <[^>]*> lb \$a0,0\(\$gp\) +[ ]*60: [A-Z0-9_]*GPREL[A-Z0-9_]* big_external_common +0+0064 <[^>]*> lb \$a0,0\(\$gp\) +[ ]*64: [A-Z0-9_]*GPREL[A-Z0-9_]* small_external_common +0+0068 <[^>]*> lb \$a0,-16384\(\$gp\) +[ ]*68: [A-Z0-9_]*GPREL[A-Z0-9_]* .sbss.* +0+006c <[^>]*> lb \$a0,-15384\(\$gp\) +[ ]*6c: [A-Z0-9_]*GPREL[A-Z0-9_]* .sbss.* +0+0070 <[^>]*> lb \$a0,-16383\(\$gp\) +[ ]*70: [A-Z0-9_]*GPREL[A-Z0-9_]* .sdata.* +0+0074 <[^>]*> lb \$a0,1\(\$gp\) +[ ]*74: [A-Z0-9_]*GPREL[A-Z0-9_]* big_external_data_label +0+0078 <[^>]*> lb \$a0,1\(\$gp\) +[ ]*78: [A-Z0-9_]*GPREL[A-Z0-9_]* small_external_data_label +0+007c <[^>]*> lb \$a0,1\(\$gp\) +[ ]*7c: [A-Z0-9_]*GPREL[A-Z0-9_]* big_external_common +0+0080 <[^>]*> lb \$a0,1\(\$gp\) +[ ]*80: [A-Z0-9_]*GPREL[A-Z0-9_]* small_external_common +0+0084 <[^>]*> lb \$a0,-16383\(\$gp\) +[ ]*84: [A-Z0-9_]*GPREL[A-Z0-9_]* .sbss.* +0+0088 <[^>]*> lb \$a0,-15383\(\$gp\) +[ ]*88: [A-Z0-9_]*GPREL[A-Z0-9_]* .sbss.* +0+008c <[^>]*> addu \$a0,\$a1,\$gp +0+0090 <[^>]*> lb \$a0,-16384\(\$a0\) +[ ]*90: [A-Z0-9_]*GPREL[A-Z0-9_]* .sdata.* +0+0094 <[^>]*> addu \$a0,\$a1,\$gp +0+0098 <[^>]*> lb \$a0,0\(\$a0\) +[ ]*98: [A-Z0-9_]*GPREL[A-Z0-9_]* big_external_data_label +0+009c <[^>]*> addu \$a0,\$a1,\$gp +0+00a0 <[^>]*> lb \$a0,0\(\$a0\) +[ ]*a0: [A-Z0-9_]*GPREL[A-Z0-9_]* small_external_data_label +0+00a4 <[^>]*> addu \$a0,\$a1,\$gp +0+00a8 <[^>]*> lb \$a0,0\(\$a0\) +[ ]*a8: [A-Z0-9_]*GPREL[A-Z0-9_]* big_external_common +0+00ac <[^>]*> addu \$a0,\$a1,\$gp +0+00b0 <[^>]*> lb \$a0,0\(\$a0\) +[ ]*b0: [A-Z0-9_]*GPREL[A-Z0-9_]* small_external_common +0+00b4 <[^>]*> addu \$a0,\$a1,\$gp +0+00b8 <[^>]*> lb \$a0,-16384\(\$a0\) +[ ]*b8: [A-Z0-9_]*GPREL[A-Z0-9_]* .sbss.* +0+00bc <[^>]*> addu \$a0,\$a1,\$gp +0+00c0 <[^>]*> lb \$a0,-15384\(\$a0\) +[ ]*c0: [A-Z0-9_]*GPREL[A-Z0-9_]* .sbss.* +0+00c4 <[^>]*> addu \$a0,\$a1,\$gp +0+00c8 <[^>]*> lb \$a0,-16383\(\$a0\) +[ ]*c8: [A-Z0-9_]*GPREL[A-Z0-9_]* .sdata.* +0+00cc <[^>]*> addu \$a0,\$a1,\$gp +0+00d0 <[^>]*> lb \$a0,1\(\$a0\) +[ ]*d0: [A-Z0-9_]*GPREL[A-Z0-9_]* big_external_data_label +0+00d4 <[^>]*> addu \$a0,\$a1,\$gp +0+00d8 <[^>]*> lb \$a0,1\(\$a0\) +[ ]*d8: [A-Z0-9_]*GPREL[A-Z0-9_]* small_external_data_label +0+00dc <[^>]*> addu \$a0,\$a1,\$gp +0+00e0 <[^>]*> lb \$a0,1\(\$a0\) +[ ]*e0: [A-Z0-9_]*GPREL[A-Z0-9_]* big_external_common +0+00e4 <[^>]*> addu \$a0,\$a1,\$gp +0+00e8 <[^>]*> lb \$a0,1\(\$a0\) +[ ]*e8: [A-Z0-9_]*GPREL[A-Z0-9_]* small_external_common +0+00ec <[^>]*> addu \$a0,\$a1,\$gp +0+00f0 <[^>]*> lb \$a0,-16383\(\$a0\) +[ ]*f0: [A-Z0-9_]*GPREL[A-Z0-9_]* .sbss.* +0+00f4 <[^>]*> addu \$a0,\$a1,\$gp +0+00f8 <[^>]*> lb \$a0,-15383\(\$a0\) +[ ]*f8: [A-Z0-9_]*GPREL[A-Z0-9_]* .sbss.* +0+00fc <[^>]*> nop diff --git a/gas/testsuite/gas/mips/lb-pic.s b/gas/testsuite/gas/mips/lb-pic.s new file mode 100644 index 0000000..f2cfdf9 --- /dev/null +++ b/gas/testsuite/gas/mips/lb-pic.s @@ -0,0 +1,55 @@ +# Source file used to test the lb macro with PIC code. + + .data +data_label: + .extern big_external_data_label,1000 + .extern small_external_data_label,1 + .comm big_external_common,1000 + .comm small_external_common,1 + .lcomm big_local_common,1000 + .lcomm small_local_common,1 + + .text + lb $4,0 + lb $4,1 + lb $4,0x8000 + lb $4,-0x8000 + lb $4,0x10000 + lb $4,0x1a5a5 + lb $4,0($5) + lb $4,1($5) + lb $4,0x8000($5) + lb $4,-0x8000($5) + lb $4,0x10000($5) + lb $4,0x1a5a5($5) + lb $4,data_label + lb $4,big_external_data_label + lb $4,small_external_data_label + lb $4,big_external_common + lb $4,small_external_common + lb $4,big_local_common + lb $4,small_local_common + lb $4,data_label+1 + lb $4,big_external_data_label+1 + lb $4,small_external_data_label+1 + lb $4,big_external_common+1 + lb $4,small_external_common+1 + lb $4,big_local_common+1 + lb $4,small_local_common+1 + lb $4,data_label($5) + lb $4,big_external_data_label($5) + lb $4,small_external_data_label($5) + lb $4,big_external_common($5) + lb $4,small_external_common($5) + lb $4,big_local_common($5) + lb $4,small_local_common($5) + lb $4,data_label+1($5) + lb $4,big_external_data_label+1($5) + lb $4,small_external_data_label+1($5) + lb $4,big_external_common+1($5) + lb $4,small_external_common+1($5) + lb $4,big_local_common+1($5) + lb $4,small_local_common+1($5) + +# Round to a 16 byte boundary, for ease in testing multiple targets. + nop diff --git a/gas/testsuite/gas/mips/lb-svr4pic.d b/gas/testsuite/gas/mips/lb-svr4pic.d new file mode 100644 index 0000000..7d884d6 --- /dev/null +++ b/gas/testsuite/gas/mips/lb-svr4pic.d @@ -0,0 +1,182 @@ +#objdump: -dr --prefix-addresses -mmips:3000 +#name: MIPS lb-svr4pic +#as: -mips1 -KPIC +#source: lb-pic.s + +# Test the lb macro with -KPIC. + +.*: +file format .*mips.* + +Disassembly of section .text: +0+0000 <[^>]*> lb \$a0,0\(\$zero\) +0+0004 <[^>]*> lb \$a0,1\(\$zero\) +0+0008 <[^>]*> lui \$a0,0x1 +0+000c <[^>]*> lb \$a0,-32768\(\$a0\) +0+0010 <[^>]*> lb \$a0,-32768\(\$zero\) +0+0014 <[^>]*> lui \$a0,0x1 +0+0018 <[^>]*> lb \$a0,0\(\$a0\) +0+001c <[^>]*> lui \$a0,0x2 +0+0020 <[^>]*> lb \$a0,-23131\(\$a0\) +0+0024 <[^>]*> lb \$a0,0\(\$a1\) +0+0028 <[^>]*> lb \$a0,1\(\$a1\) +0+002c <[^>]*> lui \$a0,0x1 +0+0030 <[^>]*> addu \$a0,\$a0,\$a1 +0+0034 <[^>]*> lb \$a0,-32768\(\$a0\) +0+0038 <[^>]*> lb \$a0,-32768\(\$a1\) +0+003c <[^>]*> lui \$a0,0x1 +0+0040 <[^>]*> addu \$a0,\$a0,\$a1 +0+0044 <[^>]*> lb \$a0,0\(\$a0\) +0+0048 <[^>]*> lui \$a0,0x2 +0+004c <[^>]*> addu \$a0,\$a0,\$a1 +0+0050 <[^>]*> lb \$a0,-23131\(\$a0\) +0+0054 <[^>]*> lw \$a0,0\(\$gp\) +[ ]*54: R_MIPS_GOT16 .data +0+0058 <[^>]*> nop +0+005c <[^>]*> addiu \$a0,\$a0,0 +[ ]*5c: R_MIPS_LO16 .data +0+0060 <[^>]*> lb \$a0,0\(\$a0\) +0+0064 <[^>]*> lw \$a0,0\(\$gp\) +[ ]*64: R_MIPS_GOT16 big_external_data_label +0+0068 <[^>]*> nop +0+006c <[^>]*> lb \$a0,0\(\$a0\) +0+0070 <[^>]*> lw \$a0,0\(\$gp\) +[ ]*70: R_MIPS_GOT16 small_external_data_label +0+0074 <[^>]*> nop +0+0078 <[^>]*> lb \$a0,0\(\$a0\) +0+007c <[^>]*> lw \$a0,0\(\$gp\) +[ ]*7c: R_MIPS_GOT16 big_external_common +0+0080 <[^>]*> nop +0+0084 <[^>]*> lb \$a0,0\(\$a0\) +0+0088 <[^>]*> lw \$a0,0\(\$gp\) +[ ]*88: R_MIPS_GOT16 small_external_common +0+008c <[^>]*> nop +0+0090 <[^>]*> lb \$a0,0\(\$a0\) +0+0094 <[^>]*> lw \$a0,0\(\$gp\) +[ ]*94: R_MIPS_GOT16 .bss +0+0098 <[^>]*> nop +0+009c <[^>]*> addiu \$a0,\$a0,0 +[ ]*9c: R_MIPS_LO16 .bss +0+00a0 <[^>]*> lb \$a0,0\(\$a0\) +0+00a4 <[^>]*> lw \$a0,0\(\$gp\) +[ ]*a4: R_MIPS_GOT16 .bss +0+00a8 <[^>]*> nop +0+00ac <[^>]*> addiu \$a0,\$a0,1000 +[ ]*ac: R_MIPS_LO16 .bss +0+00b0 <[^>]*> lb \$a0,0\(\$a0\) +0+00b4 <[^>]*> lw \$a0,0\(\$gp\) +[ ]*b4: R_MIPS_GOT16 .data +0+00b8 <[^>]*> nop +0+00bc <[^>]*> addiu \$a0,\$a0,0 +[ ]*bc: R_MIPS_LO16 .data +0+00c0 <[^>]*> lb \$a0,1\(\$a0\) +0+00c4 <[^>]*> lw \$a0,0\(\$gp\) +[ ]*c4: R_MIPS_GOT16 big_external_data_label +0+00c8 <[^>]*> nop +0+00cc <[^>]*> lb \$a0,1\(\$a0\) +0+00d0 <[^>]*> lw \$a0,0\(\$gp\) +[ ]*d0: R_MIPS_GOT16 small_external_data_label +0+00d4 <[^>]*> nop +0+00d8 <[^>]*> lb \$a0,1\(\$a0\) +0+00dc <[^>]*> lw \$a0,0\(\$gp\) +[ ]*dc: R_MIPS_GOT16 big_external_common +0+00e0 <[^>]*> nop +0+00e4 <[^>]*> lb \$a0,1\(\$a0\) +0+00e8 <[^>]*> lw \$a0,0\(\$gp\) +[ ]*e8: R_MIPS_GOT16 small_external_common +0+00ec <[^>]*> nop +0+00f0 <[^>]*> lb \$a0,1\(\$a0\) +0+00f4 <[^>]*> lw \$a0,0\(\$gp\) +[ ]*f4: R_MIPS_GOT16 .bss +0+00f8 <[^>]*> nop +0+00fc <[^>]*> addiu \$a0,\$a0,0 +[ ]*fc: R_MIPS_LO16 .bss +0+0100 <[^>]*> lb \$a0,1\(\$a0\) +0+0104 <[^>]*> lw \$a0,0\(\$gp\) +[ ]*104: R_MIPS_GOT16 .bss +0+0108 <[^>]*> nop +0+010c <[^>]*> addiu \$a0,\$a0,1000 +[ ]*10c: R_MIPS_LO16 .bss +0+0110 <[^>]*> lb \$a0,1\(\$a0\) +0+0114 <[^>]*> lw \$a0,0\(\$gp\) +[ ]*114: R_MIPS_GOT16 .data +0+0118 <[^>]*> nop +0+011c <[^>]*> addiu \$a0,\$a0,0 +[ ]*11c: R_MIPS_LO16 .data +0+0120 <[^>]*> addu \$a0,\$a0,\$a1 +0+0124 <[^>]*> lb \$a0,0\(\$a0\) +0+0128 <[^>]*> lw \$a0,0\(\$gp\) +[ ]*128: R_MIPS_GOT16 big_external_data_label +0+012c <[^>]*> nop +0+0130 <[^>]*> addu \$a0,\$a0,\$a1 +0+0134 <[^>]*> lb \$a0,0\(\$a0\) +0+0138 <[^>]*> lw \$a0,0\(\$gp\) +[ ]*138: R_MIPS_GOT16 small_external_data_label +0+013c <[^>]*> nop +0+0140 <[^>]*> addu \$a0,\$a0,\$a1 +0+0144 <[^>]*> lb \$a0,0\(\$a0\) +0+0148 <[^>]*> lw \$a0,0\(\$gp\) +[ ]*148: R_MIPS_GOT16 big_external_common +0+014c <[^>]*> nop +0+0150 <[^>]*> addu \$a0,\$a0,\$a1 +0+0154 <[^>]*> lb \$a0,0\(\$a0\) +0+0158 <[^>]*> lw \$a0,0\(\$gp\) +[ ]*158: R_MIPS_GOT16 small_external_common +0+015c <[^>]*> nop +0+0160 <[^>]*> addu \$a0,\$a0,\$a1 +0+0164 <[^>]*> lb \$a0,0\(\$a0\) +0+0168 <[^>]*> lw \$a0,0\(\$gp\) +[ ]*168: R_MIPS_GOT16 .bss +0+016c <[^>]*> nop +0+0170 <[^>]*> addiu \$a0,\$a0,0 +[ ]*170: R_MIPS_LO16 .bss +0+0174 <[^>]*> addu \$a0,\$a0,\$a1 +0+0178 <[^>]*> lb \$a0,0\(\$a0\) +0+017c <[^>]*> lw \$a0,0\(\$gp\) +[ ]*17c: R_MIPS_GOT16 .bss +0+0180 <[^>]*> nop +0+0184 <[^>]*> addiu \$a0,\$a0,1000 +[ ]*184: R_MIPS_LO16 .bss +0+0188 <[^>]*> addu \$a0,\$a0,\$a1 +0+018c <[^>]*> lb \$a0,0\(\$a0\) +0+0190 <[^>]*> lw \$a0,0\(\$gp\) +[ ]*190: R_MIPS_GOT16 .data +0+0194 <[^>]*> nop +0+0198 <[^>]*> addiu \$a0,\$a0,0 +[ ]*198: R_MIPS_LO16 .data +0+019c <[^>]*> addu \$a0,\$a0,\$a1 +0+01a0 <[^>]*> lb \$a0,1\(\$a0\) +0+01a4 <[^>]*> lw \$a0,0\(\$gp\) +[ ]*1a4: R_MIPS_GOT16 big_external_data_label +0+01a8 <[^>]*> nop +0+01ac <[^>]*> addu \$a0,\$a0,\$a1 +0+01b0 <[^>]*> lb \$a0,1\(\$a0\) +0+01b4 <[^>]*> lw \$a0,0\(\$gp\) +[ ]*1b4: R_MIPS_GOT16 small_external_data_label +0+01b8 <[^>]*> nop +0+01bc <[^>]*> addu \$a0,\$a0,\$a1 +0+01c0 <[^>]*> lb \$a0,1\(\$a0\) +0+01c4 <[^>]*> lw \$a0,0\(\$gp\) +[ ]*1c4: R_MIPS_GOT16 big_external_common +0+01c8 <[^>]*> nop +0+01cc <[^>]*> addu \$a0,\$a0,\$a1 +0+01d0 <[^>]*> lb \$a0,1\(\$a0\) +0+01d4 <[^>]*> lw \$a0,0\(\$gp\) +[ ]*1d4: R_MIPS_GOT16 small_external_common +0+01d8 <[^>]*> nop +0+01dc <[^>]*> addu \$a0,\$a0,\$a1 +0+01e0 <[^>]*> lb \$a0,1\(\$a0\) +0+01e4 <[^>]*> lw \$a0,0\(\$gp\) +[ ]*1e4: R_MIPS_GOT16 .bss +0+01e8 <[^>]*> nop +0+01ec <[^>]*> addiu \$a0,\$a0,0 +[ ]*1ec: R_MIPS_LO16 .bss +0+01f0 <[^>]*> addu \$a0,\$a0,\$a1 +0+01f4 <[^>]*> lb \$a0,1\(\$a0\) +0+01f8 <[^>]*> lw \$a0,0\(\$gp\) +[ ]*1f8: R_MIPS_GOT16 .bss +0+01fc <[^>]*> nop +0+0200 <[^>]*> addiu \$a0,\$a0,1000 +[ ]*200: R_MIPS_LO16 .bss +0+0204 <[^>]*> addu \$a0,\$a0,\$a1 +0+0208 <[^>]*> lb \$a0,1\(\$a0\) +0+020c <[^>]*> nop diff --git a/gas/testsuite/gas/mips/lb-xgot-ilocks.d b/gas/testsuite/gas/mips/lb-xgot-ilocks.d new file mode 100644 index 0000000..c08bd24 --- /dev/null +++ b/gas/testsuite/gas/mips/lb-xgot-ilocks.d @@ -0,0 +1,214 @@ +#objdump: -dr --prefix-addresses -mmips:3000 +#name: MIPS lb-xgot-ilocks +#as: -mips1 -KPIC -xgot -mcpu=r3900 +#source: lb-pic.s + +# Test the lb macro with -KPIC -xgot. + +.*: +file format .* + +Disassembly of section \.text: +0+0000 <.*> lb \$a0,0\(\$zero\) +0+0004 <.*> lb \$a0,1\(\$zero\) +0+0008 <.*> lui \$a0,0x1 +0+000c <.*> lb \$a0,-32768\(\$a0\) +0+0010 <.*> lb \$a0,-32768\(\$zero\) +0+0014 <.*> lui \$a0,0x1 +0+0018 <.*> lb \$a0,0\(\$a0\) +0+001c <.*> lui \$a0,0x2 +0+0020 <.*> lb \$a0,-23131\(\$a0\) +0+0024 <.*> lb \$a0,0\(\$a1\) +0+0028 <.*> lb \$a0,1\(\$a1\) +0+002c <.*> lui \$a0,0x1 +0+0030 <.*> addu \$a0,\$a0,\$a1 +0+0034 <.*> lb \$a0,-32768\(\$a0\) +0+0038 <.*> lb \$a0,-32768\(\$a1\) +0+003c <.*> lui \$a0,0x1 +0+0040 <.*> addu \$a0,\$a0,\$a1 +0+0044 <.*> lb \$a0,0\(\$a0\) +0+0048 <.*> lui \$a0,0x2 +0+004c <.*> addu \$a0,\$a0,\$a1 +0+0050 <.*> lb \$a0,-23131\(\$a0\) +0+0054 <.*> lw \$a0,0\(\$gp\) + 54: R_MIPS_GOT16 \.data +0+0058 <.*> nop +0+005c <.*> addiu \$a0,\$a0,0 + 5c: R_MIPS_LO16 \.data +0+0060 <.*> lb \$a0,0\(\$a0\) +0+0064 <.*> lui \$a0,0x0 + 64: R_MIPS_GOT_HI16 big_external_data_label +0+0068 <.*> addu \$a0,\$a0,\$gp +0+006c <.*> lw \$a0,0\(\$a0\) + 6c: R_MIPS_GOT_LO16 big_external_data_label +0+0070 <.*> lb \$a0,0\(\$a0\) +0+0074 <.*> lui \$a0,0x0 + 74: R_MIPS_GOT_HI16 small_external_data_label +0+0078 <.*> addu \$a0,\$a0,\$gp +0+007c <.*> lw \$a0,0\(\$a0\) + 7c: R_MIPS_GOT_LO16 small_external_data_label +0+0080 <.*> lb \$a0,0\(\$a0\) +0+0084 <.*> lui \$a0,0x0 + 84: R_MIPS_GOT_HI16 big_external_common +0+0088 <.*> addu \$a0,\$a0,\$gp +0+008c <.*> lw \$a0,0\(\$a0\) + 8c: R_MIPS_GOT_LO16 big_external_common +0+0090 <.*> lb \$a0,0\(\$a0\) +0+0094 <.*> lui \$a0,0x0 + 94: R_MIPS_GOT_HI16 small_external_common +0+0098 <.*> addu \$a0,\$a0,\$gp +0+009c <.*> lw \$a0,0\(\$a0\) + 9c: R_MIPS_GOT_LO16 small_external_common +0+00a0 <.*> lb \$a0,0\(\$a0\) +0+00a4 <.*> lw \$a0,0\(\$gp\) + a4: R_MIPS_GOT16 \.bss +0+00a8 <.*> nop +0+00ac <.*> addiu \$a0,\$a0,0 + ac: R_MIPS_LO16 \.bss +0+00b0 <.*> lb \$a0,0\(\$a0\) +0+00b4 <.*> lw \$a0,0\(\$gp\) + b4: R_MIPS_GOT16 \.bss +0+00b8 <.*> nop +0+00bc <.*> addiu \$a0,\$a0,1000 + bc: R_MIPS_LO16 \.bss +0+00c0 <.*> lb \$a0,0\(\$a0\) +0+00c4 <.*> lw \$a0,0\(\$gp\) + c4: R_MIPS_GOT16 \.data +0+00c8 <.*> nop +0+00cc <.*> addiu \$a0,\$a0,0 + cc: R_MIPS_LO16 \.data +0+00d0 <.*> lb \$a0,1\(\$a0\) +0+00d4 <.*> lui \$a0,0x0 + d4: R_MIPS_GOT_HI16 big_external_data_label +0+00d8 <.*> addu \$a0,\$a0,\$gp +0+00dc <.*> lw \$a0,0\(\$a0\) + dc: R_MIPS_GOT_LO16 big_external_data_label +0+00e0 <.*> lb \$a0,1\(\$a0\) +0+00e4 <.*> lui \$a0,0x0 + e4: R_MIPS_GOT_HI16 small_external_data_label +0+00e8 <.*> addu \$a0,\$a0,\$gp +0+00ec <.*> lw \$a0,0\(\$a0\) + ec: R_MIPS_GOT_LO16 small_external_data_label +0+00f0 <.*> lb \$a0,1\(\$a0\) +0+00f4 <.*> lui \$a0,0x0 + f4: R_MIPS_GOT_HI16 big_external_common +0+00f8 <.*> addu \$a0,\$a0,\$gp +0+00fc <.*> lw \$a0,0\(\$a0\) + fc: R_MIPS_GOT_LO16 big_external_common +0+0100 <.*> lb \$a0,1\(\$a0\) +0+0104 <.*> lui \$a0,0x0 + 104: R_MIPS_GOT_HI16 small_external_common +0+0108 <.*> addu \$a0,\$a0,\$gp +0+010c <.*> lw \$a0,0\(\$a0\) + 10c: R_MIPS_GOT_LO16 small_external_common +0+0110 <.*> lb \$a0,1\(\$a0\) +0+0114 <.*> lw \$a0,0\(\$gp\) + 114: R_MIPS_GOT16 \.bss +0+0118 <.*> nop +0+011c <.*> addiu \$a0,\$a0,0 + 11c: R_MIPS_LO16 \.bss +0+0120 <.*> lb \$a0,1\(\$a0\) +0+0124 <.*> lw \$a0,0\(\$gp\) + 124: R_MIPS_GOT16 \.bss +0+0128 <.*> nop +0+012c <.*> addiu \$a0,\$a0,1000 + 12c: R_MIPS_LO16 \.bss +0+0130 <.*> lb \$a0,1\(\$a0\) +0+0134 <.*> lw \$a0,0\(\$gp\) + 134: R_MIPS_GOT16 \.data +0+0138 <.*> nop +0+013c <.*> addiu \$a0,\$a0,0 + 13c: R_MIPS_LO16 \.data +0+0140 <.*> addu \$a0,\$a0,\$a1 +0+0144 <.*> lb \$a0,0\(\$a0\) +0+0148 <.*> lui \$a0,0x0 + 148: R_MIPS_GOT_HI16 big_external_data_label +0+014c <.*> addu \$a0,\$a0,\$gp +0+0150 <.*> lw \$a0,0\(\$a0\) + 150: R_MIPS_GOT_LO16 big_external_data_label +0+0154 <.*> addu \$a0,\$a0,\$a1 +0+0158 <.*> lb \$a0,0\(\$a0\) +0+015c <.*> lui \$a0,0x0 + 15c: R_MIPS_GOT_HI16 small_external_data_label +0+0160 <.*> addu \$a0,\$a0,\$gp +0+0164 <.*> lw \$a0,0\(\$a0\) + 164: R_MIPS_GOT_LO16 small_external_data_label +0+0168 <.*> addu \$a0,\$a0,\$a1 +0+016c <.*> lb \$a0,0\(\$a0\) +0+0170 <.*> lui \$a0,0x0 + 170: R_MIPS_GOT_HI16 big_external_common +0+0174 <.*> addu \$a0,\$a0,\$gp +0+0178 <.*> lw \$a0,0\(\$a0\) + 178: R_MIPS_GOT_LO16 big_external_common +0+017c <.*> addu \$a0,\$a0,\$a1 +0+0180 <.*> lb \$a0,0\(\$a0\) +0+0184 <.*> lui \$a0,0x0 + 184: R_MIPS_GOT_HI16 small_external_common +0+0188 <.*> addu \$a0,\$a0,\$gp +0+018c <.*> lw \$a0,0\(\$a0\) + 18c: R_MIPS_GOT_LO16 small_external_common +0+0190 <.*> addu \$a0,\$a0,\$a1 +0+0194 <.*> lb \$a0,0\(\$a0\) +0+0198 <.*> lw \$a0,0\(\$gp\) + 198: R_MIPS_GOT16 \.bss +0+019c <.*> nop +0+01a0 <.*> addiu \$a0,\$a0,0 + 1a0: R_MIPS_LO16 \.bss +0+01a4 <.*> addu \$a0,\$a0,\$a1 +0+01a8 <.*> lb \$a0,0\(\$a0\) +0+01ac <.*> lw \$a0,0\(\$gp\) + 1ac: R_MIPS_GOT16 \.bss +0+01b0 <.*> nop +0+01b4 <.*> addiu \$a0,\$a0,1000 + 1b4: R_MIPS_LO16 \.bss +0+01b8 <.*> addu \$a0,\$a0,\$a1 +0+01bc <.*> lb \$a0,0\(\$a0\) +0+01c0 <.*> lw \$a0,0\(\$gp\) + 1c0: R_MIPS_GOT16 \.data +0+01c4 <.*> nop +0+01c8 <.*> addiu \$a0,\$a0,0 + 1c8: R_MIPS_LO16 \.data +0+01cc <.*> addu \$a0,\$a0,\$a1 +0+01d0 <.*> lb \$a0,1\(\$a0\) +0+01d4 <.*> lui \$a0,0x0 + 1d4: R_MIPS_GOT_HI16 big_external_data_label +0+01d8 <.*> addu \$a0,\$a0,\$gp +0+01dc <.*> lw \$a0,0\(\$a0\) + 1dc: R_MIPS_GOT_LO16 big_external_data_label +0+01e0 <.*> addu \$a0,\$a0,\$a1 +0+01e4 <.*> lb \$a0,1\(\$a0\) +0+01e8 <.*> lui \$a0,0x0 + 1e8: R_MIPS_GOT_HI16 small_external_data_label +0+01ec <.*> addu \$a0,\$a0,\$gp +0+01f0 <.*> lw \$a0,0\(\$a0\) + 1f0: R_MIPS_GOT_LO16 small_external_data_label +0+01f4 <.*> addu \$a0,\$a0,\$a1 +0+01f8 <.*> lb \$a0,1\(\$a0\) +0+01fc <.*> lui \$a0,0x0 + 1fc: R_MIPS_GOT_HI16 big_external_common +0+0200 <.*> addu \$a0,\$a0,\$gp +0+0204 <.*> lw \$a0,0\(\$a0\) + 204: R_MIPS_GOT_LO16 big_external_common +0+0208 <.*> addu \$a0,\$a0,\$a1 +0+020c <.*> lb \$a0,1\(\$a0\) +0+0210 <.*> lui \$a0,0x0 + 210: R_MIPS_GOT_HI16 small_external_common +0+0214 <.*> addu \$a0,\$a0,\$gp +0+0218 <.*> lw \$a0,0\(\$a0\) + 218: R_MIPS_GOT_LO16 small_external_common +0+021c <.*> addu \$a0,\$a0,\$a1 +0+0220 <.*> lb \$a0,1\(\$a0\) +0+0224 <.*> lw \$a0,0\(\$gp\) + 224: R_MIPS_GOT16 \.bss +0+0228 <.*> nop +0+022c <.*> addiu \$a0,\$a0,0 + 22c: R_MIPS_LO16 \.bss +0+0230 <.*> addu \$a0,\$a0,\$a1 +0+0234 <.*> lb \$a0,1\(\$a0\) +0+0238 <.*> lw \$a0,0\(\$gp\) + 238: R_MIPS_GOT16 \.bss +0+023c <.*> nop +0+0240 <.*> addiu \$a0,\$a0,1000 + 240: R_MIPS_LO16 \.bss +0+0244 <.*> addu \$a0,\$a0,\$a1 +0+0248 <.*> lb \$a0,1\(\$a0\) +0+024c <.*> nop diff --git a/gas/testsuite/gas/mips/lb-xgot.d b/gas/testsuite/gas/mips/lb-xgot.d new file mode 100644 index 0000000..b18c67e --- /dev/null +++ b/gas/testsuite/gas/mips/lb-xgot.d @@ -0,0 +1,242 @@ +#objdump: -dr --prefix-addresses -mmips:3000 +#name: MIPS lb-xgot +#as: -mips1 -KPIC -xgot -mcpu=r3000 +#source: lb-pic.s + +# Test the lb macro with -KPIC -xgot. + +.*: +file format .*mips.* + +Disassembly of section .text: +0+0000 <[^>]*> lb \$a0,0\(\$zero\) +0+0004 <[^>]*> lb \$a0,1\(\$zero\) +0+0008 <[^>]*> lui \$a0,0x1 +0+000c <[^>]*> lb \$a0,-32768\(\$a0\) +0+0010 <[^>]*> lb \$a0,-32768\(\$zero\) +0+0014 <[^>]*> lui \$a0,0x1 +0+0018 <[^>]*> lb \$a0,0\(\$a0\) +0+001c <[^>]*> lui \$a0,0x2 +0+0020 <[^>]*> lb \$a0,-23131\(\$a0\) +0+0024 <[^>]*> lb \$a0,0\(\$a1\) +0+0028 <[^>]*> lb \$a0,1\(\$a1\) +0+002c <[^>]*> lui \$a0,0x1 +0+0030 <[^>]*> addu \$a0,\$a0,\$a1 +0+0034 <[^>]*> lb \$a0,-32768\(\$a0\) +0+0038 <[^>]*> lb \$a0,-32768\(\$a1\) +0+003c <[^>]*> lui \$a0,0x1 +0+0040 <[^>]*> addu \$a0,\$a0,\$a1 +0+0044 <[^>]*> lb \$a0,0\(\$a0\) +0+0048 <[^>]*> lui \$a0,0x2 +0+004c <[^>]*> addu \$a0,\$a0,\$a1 +0+0050 <[^>]*> lb \$a0,-23131\(\$a0\) +0+0054 <[^>]*> lw \$a0,0\(\$gp\) +[ ]*54: R_MIPS_GOT16 .data +0+0058 <[^>]*> nop +0+005c <[^>]*> addiu \$a0,\$a0,0 +[ ]*5c: R_MIPS_LO16 .data +0+0060 <[^>]*> nop +0+0064 <[^>]*> lb \$a0,0\(\$a0\) +0+0068 <[^>]*> lui \$a0,0x0 +[ ]*68: R_MIPS_GOT_HI16 big_external_data_label +0+006c <[^>]*> addu \$a0,\$a0,\$gp +0+0070 <[^>]*> lw \$a0,0\(\$a0\) +[ ]*70: R_MIPS_GOT_LO16 big_external_data_label +0+0074 <[^>]*> nop +0+0078 <[^>]*> lb \$a0,0\(\$a0\) +0+007c <[^>]*> lui \$a0,0x0 +[ ]*7c: R_MIPS_GOT_HI16 small_external_data_label +0+0080 <[^>]*> addu \$a0,\$a0,\$gp +0+0084 <[^>]*> lw \$a0,0\(\$a0\) +[ ]*84: R_MIPS_GOT_LO16 small_external_data_label +0+0088 <[^>]*> nop +0+008c <[^>]*> lb \$a0,0\(\$a0\) +0+0090 <[^>]*> lui \$a0,0x0 +[ ]*90: R_MIPS_GOT_HI16 big_external_common +0+0094 <[^>]*> addu \$a0,\$a0,\$gp +0+0098 <[^>]*> lw \$a0,0\(\$a0\) +[ ]*98: R_MIPS_GOT_LO16 big_external_common +0+009c <[^>]*> nop +0+00a0 <[^>]*> lb \$a0,0\(\$a0\) +0+00a4 <[^>]*> lui \$a0,0x0 +[ ]*a4: R_MIPS_GOT_HI16 small_external_common +0+00a8 <[^>]*> addu \$a0,\$a0,\$gp +0+00ac <[^>]*> lw \$a0,0\(\$a0\) +[ ]*ac: R_MIPS_GOT_LO16 small_external_common +0+00b0 <[^>]*> nop +0+00b4 <[^>]*> lb \$a0,0\(\$a0\) +0+00b8 <[^>]*> lw \$a0,0\(\$gp\) +[ ]*b8: R_MIPS_GOT16 .bss +0+00bc <[^>]*> nop +0+00c0 <[^>]*> addiu \$a0,\$a0,0 +[ ]*c0: R_MIPS_LO16 .bss +0+00c4 <[^>]*> nop +0+00c8 <[^>]*> lb \$a0,0\(\$a0\) +0+00cc <[^>]*> lw \$a0,0\(\$gp\) +[ ]*cc: R_MIPS_GOT16 .bss +0+00d0 <[^>]*> nop +0+00d4 <[^>]*> addiu \$a0,\$a0,1000 +[ ]*d4: R_MIPS_LO16 .bss +0+00d8 <[^>]*> nop +0+00dc <[^>]*> lb \$a0,0\(\$a0\) +0+00e0 <[^>]*> lw \$a0,0\(\$gp\) +[ ]*e0: R_MIPS_GOT16 .data +0+00e4 <[^>]*> nop +0+00e8 <[^>]*> addiu \$a0,\$a0,0 +[ ]*e8: R_MIPS_LO16 .data +0+00ec <[^>]*> nop +0+00f0 <[^>]*> lb \$a0,1\(\$a0\) +0+00f4 <[^>]*> lui \$a0,0x0 +[ ]*f4: R_MIPS_GOT_HI16 big_external_data_label +0+00f8 <[^>]*> addu \$a0,\$a0,\$gp +0+00fc <[^>]*> lw \$a0,0\(\$a0\) +[ ]*fc: R_MIPS_GOT_LO16 big_external_data_label +0+0100 <[^>]*> nop +0+0104 <[^>]*> lb \$a0,1\(\$a0\) +0+0108 <[^>]*> lui \$a0,0x0 +[ ]*108: R_MIPS_GOT_HI16 small_external_data_label +0+010c <[^>]*> addu \$a0,\$a0,\$gp +0+0110 <[^>]*> lw \$a0,0\(\$a0\) +[ ]*110: R_MIPS_GOT_LO16 small_external_data_label +0+0114 <[^>]*> nop +0+0118 <[^>]*> lb \$a0,1\(\$a0\) +0+011c <[^>]*> lui \$a0,0x0 +[ ]*11c: R_MIPS_GOT_HI16 big_external_common +0+0120 <[^>]*> addu \$a0,\$a0,\$gp +0+0124 <[^>]*> lw \$a0,0\(\$a0\) +[ ]*124: R_MIPS_GOT_LO16 big_external_common +0+0128 <[^>]*> nop +0+012c <[^>]*> lb \$a0,1\(\$a0\) +0+0130 <[^>]*> lui \$a0,0x0 +[ ]*130: R_MIPS_GOT_HI16 small_external_common +0+0134 <[^>]*> addu \$a0,\$a0,\$gp +0+0138 <[^>]*> lw \$a0,0\(\$a0\) +[ ]*138: R_MIPS_GOT_LO16 small_external_common +0+013c <[^>]*> nop +0+0140 <[^>]*> lb \$a0,1\(\$a0\) +0+0144 <[^>]*> lw \$a0,0\(\$gp\) +[ ]*144: R_MIPS_GOT16 .bss +0+0148 <[^>]*> nop +0+014c <[^>]*> addiu \$a0,\$a0,0 +[ ]*14c: R_MIPS_LO16 .bss +0+0150 <[^>]*> nop +0+0154 <[^>]*> lb \$a0,1\(\$a0\) +0+0158 <[^>]*> lw \$a0,0\(\$gp\) +[ ]*158: R_MIPS_GOT16 .bss +0+015c <[^>]*> nop +0+0160 <[^>]*> addiu \$a0,\$a0,1000 +[ ]*160: R_MIPS_LO16 .bss +0+0164 <[^>]*> nop +0+0168 <[^>]*> lb \$a0,1\(\$a0\) +0+016c <[^>]*> lw \$a0,0\(\$gp\) +[ ]*16c: R_MIPS_GOT16 .data +0+0170 <[^>]*> nop +0+0174 <[^>]*> addiu \$a0,\$a0,0 +[ ]*174: R_MIPS_LO16 .data +0+0178 <[^>]*> nop +0+017c <[^>]*> addu \$a0,\$a0,\$a1 +0+0180 <[^>]*> lb \$a0,0\(\$a0\) +0+0184 <[^>]*> lui \$a0,0x0 +[ ]*184: R_MIPS_GOT_HI16 big_external_data_label +0+0188 <[^>]*> addu \$a0,\$a0,\$gp +0+018c <[^>]*> lw \$a0,0\(\$a0\) +[ ]*18c: R_MIPS_GOT_LO16 big_external_data_label +0+0190 <[^>]*> nop +0+0194 <[^>]*> addu \$a0,\$a0,\$a1 +0+0198 <[^>]*> lb \$a0,0\(\$a0\) +0+019c <[^>]*> lui \$a0,0x0 +[ ]*19c: R_MIPS_GOT_HI16 small_external_data_label +0+01a0 <[^>]*> addu \$a0,\$a0,\$gp +0+01a4 <[^>]*> lw \$a0,0\(\$a0\) +[ ]*1a4: R_MIPS_GOT_LO16 small_external_data_label +0+01a8 <[^>]*> nop +0+01ac <[^>]*> addu \$a0,\$a0,\$a1 +0+01b0 <[^>]*> lb \$a0,0\(\$a0\) +0+01b4 <[^>]*> lui \$a0,0x0 +[ ]*1b4: R_MIPS_GOT_HI16 big_external_common +0+01b8 <[^>]*> addu \$a0,\$a0,\$gp +0+01bc <[^>]*> lw \$a0,0\(\$a0\) +[ ]*1bc: R_MIPS_GOT_LO16 big_external_common +0+01c0 <[^>]*> nop +0+01c4 <[^>]*> addu \$a0,\$a0,\$a1 +0+01c8 <[^>]*> lb \$a0,0\(\$a0\) +0+01cc <[^>]*> lui \$a0,0x0 +[ ]*1cc: R_MIPS_GOT_HI16 small_external_common +0+01d0 <[^>]*> addu \$a0,\$a0,\$gp +0+01d4 <[^>]*> lw \$a0,0\(\$a0\) +[ ]*1d4: R_MIPS_GOT_LO16 small_external_common +0+01d8 <[^>]*> nop +0+01dc <[^>]*> addu \$a0,\$a0,\$a1 +0+01e0 <[^>]*> lb \$a0,0\(\$a0\) +0+01e4 <[^>]*> lw \$a0,0\(\$gp\) +[ ]*1e4: R_MIPS_GOT16 .bss +0+01e8 <[^>]*> nop +0+01ec <[^>]*> addiu \$a0,\$a0,0 +[ ]*1ec: R_MIPS_LO16 .bss +0+01f0 <[^>]*> nop +0+01f4 <[^>]*> addu \$a0,\$a0,\$a1 +0+01f8 <[^>]*> lb \$a0,0\(\$a0\) +0+01fc <[^>]*> lw \$a0,0\(\$gp\) +[ ]*1fc: R_MIPS_GOT16 .bss +0+0200 <[^>]*> nop +0+0204 <[^>]*> addiu \$a0,\$a0,1000 +[ ]*204: R_MIPS_LO16 .bss +0+0208 <[^>]*> nop +0+020c <[^>]*> addu \$a0,\$a0,\$a1 +0+0210 <[^>]*> lb \$a0,0\(\$a0\) +0+0214 <[^>]*> lw \$a0,0\(\$gp\) +[ ]*214: R_MIPS_GOT16 .data +0+0218 <[^>]*> nop +0+021c <[^>]*> addiu \$a0,\$a0,0 +[ ]*21c: R_MIPS_LO16 .data +0+0220 <[^>]*> nop +0+0224 <[^>]*> addu \$a0,\$a0,\$a1 +0+0228 <[^>]*> lb \$a0,1\(\$a0\) +0+022c <[^>]*> lui \$a0,0x0 +[ ]*22c: R_MIPS_GOT_HI16 big_external_data_label +0+0230 <[^>]*> addu \$a0,\$a0,\$gp +0+0234 <[^>]*> lw \$a0,0\(\$a0\) +[ ]*234: R_MIPS_GOT_LO16 big_external_data_label +0+0238 <[^>]*> nop +0+023c <[^>]*> addu \$a0,\$a0,\$a1 +0+0240 <[^>]*> lb \$a0,1\(\$a0\) +0+0244 <[^>]*> lui \$a0,0x0 +[ ]*244: R_MIPS_GOT_HI16 small_external_data_label +0+0248 <[^>]*> addu \$a0,\$a0,\$gp +0+024c <[^>]*> lw \$a0,0\(\$a0\) +[ ]*24c: R_MIPS_GOT_LO16 small_external_data_label +0+0250 <[^>]*> nop +0+0254 <[^>]*> addu \$a0,\$a0,\$a1 +0+0258 <[^>]*> lb \$a0,1\(\$a0\) +0+025c <[^>]*> lui \$a0,0x0 +[ ]*25c: R_MIPS_GOT_HI16 big_external_common +0+0260 <[^>]*> addu \$a0,\$a0,\$gp +0+0264 <[^>]*> lw \$a0,0\(\$a0\) +[ ]*264: R_MIPS_GOT_LO16 big_external_common +0+0268 <[^>]*> nop +0+026c <[^>]*> addu \$a0,\$a0,\$a1 +0+0270 <[^>]*> lb \$a0,1\(\$a0\) +0+0274 <[^>]*> lui \$a0,0x0 +[ ]*274: R_MIPS_GOT_HI16 small_external_common +0+0278 <[^>]*> addu \$a0,\$a0,\$gp +0+027c <[^>]*> lw \$a0,0\(\$a0\) +[ ]*27c: R_MIPS_GOT_LO16 small_external_common +0+0280 <[^>]*> nop +0+0284 <[^>]*> addu \$a0,\$a0,\$a1 +0+0288 <[^>]*> lb \$a0,1\(\$a0\) +0+028c <[^>]*> lw \$a0,0\(\$gp\) +[ ]*28c: R_MIPS_GOT16 .bss +0+0290 <[^>]*> nop +0+0294 <[^>]*> addiu \$a0,\$a0,0 +[ ]*294: R_MIPS_LO16 .bss +0+0298 <[^>]*> nop +0+029c <[^>]*> addu \$a0,\$a0,\$a1 +0+02a0 <[^>]*> lb \$a0,1\(\$a0\) +0+02a4 <[^>]*> lw \$a0,0\(\$gp\) +[ ]*2a4: R_MIPS_GOT16 .bss +0+02a8 <[^>]*> nop +0+02ac <[^>]*> addiu \$a0,\$a0,1000 +[ ]*2ac: R_MIPS_LO16 .bss +0+02b0 <[^>]*> nop +0+02b4 <[^>]*> addu \$a0,\$a0,\$a1 +0+02b8 <[^>]*> lb \$a0,1\(\$a0\) +0+02bc <[^>]*> nop diff --git a/gas/testsuite/gas/mips/lb.d b/gas/testsuite/gas/mips/lb.d new file mode 100644 index 0000000..e45c4c4 --- /dev/null +++ b/gas/testsuite/gas/mips/lb.d @@ -0,0 +1,395 @@ +#objdump: -dr --prefix-addresses -mmips:3000 +#name: MIPS lb +#as: -mips1 + +# Test the lb macro. + +.*: +file format .*mips.* + +Disassembly of section .text: +0+0000 <[^>]*> lb \$a0,0\(\$zero\) +0+0004 <[^>]*> lb \$a0,1\(\$zero\) +0+0008 <[^>]*> lui \$a0,0x1 +0+000c <[^>]*> lb \$a0,-32768\(\$a0\) +0+0010 <[^>]*> lb \$a0,-32768\(\$zero\) +0+0014 <[^>]*> lui \$a0,0x1 +0+0018 <[^>]*> lb \$a0,0\(\$a0\) +0+001c <[^>]*> lui \$a0,0x2 +0+0020 <[^>]*> lb \$a0,-23131\(\$a0\) +0+0024 <[^>]*> lb \$a0,0\(\$a1\) +0+0028 <[^>]*> lb \$a0,1\(\$a1\) +0+002c <[^>]*> lui \$a0,0x1 +0+0030 <[^>]*> addu \$a0,\$a0,\$a1 +0+0034 <[^>]*> lb \$a0,-32768\(\$a0\) +0+0038 <[^>]*> lb \$a0,-32768\(\$a1\) +0+003c <[^>]*> lui \$a0,0x1 +0+0040 <[^>]*> addu \$a0,\$a0,\$a1 +0+0044 <[^>]*> lb \$a0,0\(\$a0\) +0+0048 <[^>]*> lui \$a0,0x2 +0+004c <[^>]*> addu \$a0,\$a0,\$a1 +0+0050 <[^>]*> lb \$a0,-23131\(\$a0\) +0+0054 <[^>]*> lui \$a0,0x0 +[ ]*54: [A-Z0-9_]*HI[A-Z0-9_]* .data.* +0+0058 <[^>]*> lb \$a0,[0-9]+\(\$a0\) +[ ]*58: [A-Z0-9_]*LO[A-Z0-9_]* .data.* +0+005c <[^>]*> lui \$a0,0x0 +[ ]*5c: [A-Z0-9_]*HI[A-Z0-9_]* big_external_data_label +0+0060 <[^>]*> lb \$a0,0\(\$a0\) +[ ]*60: [A-Z0-9_]*LO[A-Z0-9_]* big_external_data_label +0+0064 <[^>]*> lb \$a0,0\(\$gp\) +[ ]*64: [A-Z0-9_]*GPREL[A-Z0-9_]* small_external_data_label +0+0068 <[^>]*> lui \$a0,0x0 +[ ]*68: [A-Z0-9_]*HI[A-Z0-9_]* big_external_common +0+006c <[^>]*> lb \$a0,0\(\$a0\) +[ ]*6c: [A-Z0-9_]*LO[A-Z0-9_]* big_external_common +0+0070 <[^>]*> lb \$a0,0\(\$gp\) +[ ]*70: [A-Z0-9_]*GPREL[A-Z0-9_]* small_external_common +0+0074 <[^>]*> lui \$a0,0x0 +[ ]*74: [A-Z0-9_]*HI[A-Z0-9_]* .bss.* +0+0078 <[^>]*> lb \$a0,[0-9]+\(\$a0\) +[ ]*78: [A-Z0-9_]*LO[A-Z0-9_]* .bss.* +0+007c <[^>]*> lb \$a0,-16384\(\$gp\) +[ ]*7c: [A-Z0-9_]*GPREL[A-Z0-9_]* .sbss.* +0+0080 <[^>]*> lui \$a0,0x0 +[ ]*80: [A-Z0-9_]*HI[A-Z0-9_]* .data.* +0+0084 <[^>]*> lb \$a0,[0-9]+\(\$a0\) +[ ]*84: [A-Z0-9_]*LO[A-Z0-9_]* .data.* +0+0088 <[^>]*> lui \$a0,0x0 +[ ]*88: [A-Z0-9_]*HI[A-Z0-9_]* big_external_data_label +0+008c <[^>]*> lb \$a0,1\(\$a0\) +[ ]*8c: [A-Z0-9_]*LO[A-Z0-9_]* big_external_data_label +0+0090 <[^>]*> lb \$a0,1\(\$gp\) +[ ]*90: [A-Z0-9_]*GPREL[A-Z0-9_]* small_external_data_label +0+0094 <[^>]*> lui \$a0,0x0 +[ ]*94: [A-Z0-9_]*HI[A-Z0-9_]* big_external_common +0+0098 <[^>]*> lb \$a0,1\(\$a0\) +[ ]*98: [A-Z0-9_]*LO[A-Z0-9_]* big_external_common +0+009c <[^>]*> lb \$a0,1\(\$gp\) +[ ]*9c: [A-Z0-9_]*GPREL[A-Z0-9_]* small_external_common +0+00a0 <[^>]*> lui \$a0,0x0 +[ ]*a0: [A-Z0-9_]*HI[A-Z0-9_]* .bss.* +0+00a4 <[^>]*> lb \$a0,[0-9]+\(\$a0\) +[ ]*a4: [A-Z0-9_]*LO[A-Z0-9_]* .bss.* +0+00a8 <[^>]*> lb \$a0,[-0-9]+\(\$gp\) +[ ]*a8: [A-Z0-9_]*GPREL[A-Z0-9_]* .sbss.* +0+00ac <[^>]*> lui \$a0,[-0-9x]+ +[ ]*ac: [A-Z0-9_]*HI[A-Z0-9_]* .data.* +0+00b0 <[^>]*> lb \$a0,[-0-9]+\(\$a0\) +[ ]*b0: [A-Z0-9_]*LO[A-Z0-9_]* .data.* +0+00b4 <[^>]*> lui \$a0,[-0-9x]+ +[ ]*b4: [A-Z0-9_]*HI[A-Z0-9_]* big_external_data_label +0+00b8 <[^>]*> lb \$a0,[-0-9]+\(\$a0\) +[ ]*b8: [A-Z0-9_]*LO[A-Z0-9_]* big_external_data_label +0+00bc <[^>]*> lui \$a0,[-0-9x]+ +[ ]*bc: [A-Z0-9_]*HI[A-Z0-9_]* small_external_data_label +0+00c0 <[^>]*> lb \$a0,[-0-9]+\(\$a0\) +[ ]*c0: [A-Z0-9_]*LO[A-Z0-9_]* small_external_data_label +0+00c4 <[^>]*> lui \$a0,[-0-9x]+ +[ ]*c4: [A-Z0-9_]*HI[A-Z0-9_]* big_external_common +0+00c8 <[^>]*> lb \$a0,[-0-9]+\(\$a0\) +[ ]*c8: [A-Z0-9_]*LO[A-Z0-9_]* big_external_common +0+00cc <[^>]*> lui \$a0,[-0-9x]+ +[ ]*cc: [A-Z0-9_]*HI[A-Z0-9_]* small_external_common +0+00d0 <[^>]*> lb \$a0,[-0-9]+\(\$a0\) +[ ]*d0: [A-Z0-9_]*LO[A-Z0-9_]* small_external_common +0+00d4 <[^>]*> lui \$a0,[-0-9x]+ +[ ]*d4: [A-Z0-9_]*HI[A-Z0-9_]* .bss.* +0+00d8 <[^>]*> lb \$a0,[-0-9]+\(\$a0\) +[ ]*d8: [A-Z0-9_]*LO[A-Z0-9_]* .bss.* +0+00dc <[^>]*> lui \$a0,[-0-9x]+ +[ ]*dc: [A-Z0-9_]*HI[A-Z0-9_]* .sbss.* +0+00e0 <[^>]*> lb \$a0,[-0-9]+\(\$a0\) +[ ]*e0: [A-Z0-9_]*LO[A-Z0-9_]* .sbss.* +0+00e4 <[^>]*> lui \$a0,0x0 +[ ]*e4: [A-Z0-9_]*HI[A-Z0-9_]* .data.* +0+00e8 <[^>]*> lb \$a0,[-0-9]+\(\$a0\) +[ ]*e8: [A-Z0-9_]*LO[A-Z0-9_]* .data.* +0+00ec <[^>]*> lui \$a0,0x0 +[ ]*ec: [A-Z0-9_]*HI[A-Z0-9_]* big_external_data_label +0+00f0 <[^>]*> lb \$a0,[-0-9]+\(\$a0\) +[ ]*f0: [A-Z0-9_]*LO[A-Z0-9_]* big_external_data_label +0+00f4 <[^>]*> lui \$a0,0x0 +[ ]*f4: [A-Z0-9_]*HI[A-Z0-9_]* small_external_data_label +0+00f8 <[^>]*> lb \$a0,[-0-9]+\(\$a0\) +[ ]*f8: [A-Z0-9_]*LO[A-Z0-9_]* small_external_data_label +0+00fc <[^>]*> lui \$a0,0x0 +[ ]*fc: [A-Z0-9_]*HI[A-Z0-9_]* big_external_common +0+0100 <[^>]*> lb \$a0,[-0-9]+\(\$a0\) +[ ]*100: [A-Z0-9_]*LO[A-Z0-9_]* big_external_common +0+0104 <[^>]*> lui \$a0,0x0 +[ ]*104: [A-Z0-9_]*HI[A-Z0-9_]* small_external_common +0+0108 <[^>]*> lb \$a0,[-0-9]+\(\$a0\) +[ ]*108: [A-Z0-9_]*LO[A-Z0-9_]* small_external_common +0+010c <[^>]*> lui \$a0,0x0 +[ ]*10c: [A-Z0-9_]*HI[A-Z0-9_]* .bss.* +0+0110 <[^>]*> lb \$a0,[-0-9]+\(\$a0\) +[ ]*110: [A-Z0-9_]*LO[A-Z0-9_]* .bss.* +0+0114 <[^>]*> lui \$a0,0x0 +[ ]*114: [A-Z0-9_]*HI[A-Z0-9_]* .sbss.* +0+0118 <[^>]*> lb \$a0,[-0-9]+\(\$a0\) +[ ]*118: [A-Z0-9_]*LO[A-Z0-9_]* .sbss.* +0+011c <[^>]*> lui \$a0,[-0-9x]+ +[ ]*11c: [A-Z0-9_]*HI[A-Z0-9_]* .data.* +0+0120 <[^>]*> lb \$a0,[0-9]+\(\$a0\) +[ ]*120: [A-Z0-9_]*LO[A-Z0-9_]* .data.* +0+0124 <[^>]*> lui \$a0,[-0-9x]+ +[ ]*124: [A-Z0-9_]*HI[A-Z0-9_]* big_external_data_label +0+0128 <[^>]*> lb \$a0,0\(\$a0\) +[ ]*128: [A-Z0-9_]*LO[A-Z0-9_]* big_external_data_label +0+012c <[^>]*> lui \$a0,[-0-9x]+ +[ ]*12c: [A-Z0-9_]*HI[A-Z0-9_]* small_external_data_label +0+0130 <[^>]*> lb \$a0,0\(\$a0\) +[ ]*130: [A-Z0-9_]*LO[A-Z0-9_]* small_external_data_label +0+0134 <[^>]*> lui \$a0,[-0-9x]+ +[ ]*134: [A-Z0-9_]*HI[A-Z0-9_]* big_external_common +0+0138 <[^>]*> lb \$a0,0\(\$a0\) +[ ]*138: [A-Z0-9_]*LO[A-Z0-9_]* big_external_common +0+013c <[^>]*> lui \$a0,[-0-9x]+ +[ ]*13c: [A-Z0-9_]*HI[A-Z0-9_]* small_external_common +0+0140 <[^>]*> lb \$a0,0\(\$a0\) +[ ]*140: [A-Z0-9_]*LO[A-Z0-9_]* small_external_common +0+0144 <[^>]*> lui \$a0,[-0-9x]+ +[ ]*144: [A-Z0-9_]*HI[A-Z0-9_]* .bss.* +0+0148 <[^>]*> lb \$a0,[0-9]+\(\$a0\) +[ ]*148: [A-Z0-9_]*LO[A-Z0-9_]* .bss.* +0+014c <[^>]*> lui \$a0,[-0-9x]+ +[ ]*14c: [A-Z0-9_]*HI[A-Z0-9_]* .sbss.* +0+0150 <[^>]*> lb \$a0,[-0-9]+\(\$a0\) +[ ]*150: [A-Z0-9_]*LO[A-Z0-9_]* .sbss.* +0+0154 <[^>]*> lui \$a0,[-0-9x]+ +[ ]*154: [A-Z0-9_]*HI[A-Z0-9_]* .data.* +0+0158 <[^>]*> lb \$a0,[-0-9]+\(\$a0\) +[ ]*158: [A-Z0-9_]*LO[A-Z0-9_]* .data.* +0+015c <[^>]*> lui \$a0,[-0-9x]+ +[ ]*15c: [A-Z0-9_]*HI[A-Z0-9_]* big_external_data_label +0+0160 <[^>]*> lb \$a0,[-0-9]+\(\$a0\) +[ ]*160: [A-Z0-9_]*LO[A-Z0-9_]* big_external_data_label +0+0164 <[^>]*> lui \$a0,[-0-9x]+ +[ ]*164: [A-Z0-9_]*HI[A-Z0-9_]* small_external_data_label +0+0168 <[^>]*> lb \$a0,[-0-9]+\(\$a0\) +[ ]*168: [A-Z0-9_]*LO[A-Z0-9_]* small_external_data_label +0+016c <[^>]*> lui \$a0,[-0-9x]+ +[ ]*16c: [A-Z0-9_]*HI[A-Z0-9_]* big_external_common +0+0170 <[^>]*> lb \$a0,[-0-9]+\(\$a0\) +[ ]*170: [A-Z0-9_]*LO[A-Z0-9_]* big_external_common +0+0174 <[^>]*> lui \$a0,[-0-9x]+ +[ ]*174: [A-Z0-9_]*HI[A-Z0-9_]* small_external_common +0+0178 <[^>]*> lb \$a0,[-0-9]+\(\$a0\) +[ ]*178: [A-Z0-9_]*LO[A-Z0-9_]* small_external_common +0+017c <[^>]*> lui \$a0,[-0-9x]+ +[ ]*17c: [A-Z0-9_]*HI[A-Z0-9_]* .bss.* +0+0180 <[^>]*> lb \$a0,[-0-9]+\(\$a0\) +[ ]*180: [A-Z0-9_]*LO[A-Z0-9_]* .bss.* +0+0184 <[^>]*> lui \$a0,[-0-9x]+ +[ ]*184: [A-Z0-9_]*HI[A-Z0-9_]* .sbss.* +0+0188 <[^>]*> lb \$a0,[-0-9]+\(\$a0\) +[ ]*188: [A-Z0-9_]*LO[A-Z0-9_]* .sbss.* +0+018c <[^>]*> lui \$a0,0x0 +[ ]*18c: [A-Z0-9_]*HI[A-Z0-9_]* .data.* +0+0190 <[^>]*> addu \$a0,\$a0,\$a1 +0+0194 <[^>]*> lb \$a0,[0-9]+\(\$a0\) +[ ]*194: [A-Z0-9_]*LO[A-Z0-9_]* .data.* +0+0198 <[^>]*> lui \$a0,0x0 +[ ]*198: [A-Z0-9_]*HI[A-Z0-9_]* big_external_data_label +0+019c <[^>]*> addu \$a0,\$a0,\$a1 +0+01a0 <[^>]*> lb \$a0,0\(\$a0\) +[ ]*1a0: [A-Z0-9_]*LO[A-Z0-9_]* big_external_data_label +0+01a4 <[^>]*> addu \$a0,\$a1,\$gp +0+01a8 <[^>]*> lb \$a0,0\(\$a0\) +[ ]*1a8: [A-Z0-9_]*GPREL[A-Z0-9_]* small_external_data_label +0+01ac <[^>]*> lui \$a0,0x0 +[ ]*1ac: [A-Z0-9_]*HI[A-Z0-9_]* big_external_common +0+01b0 <[^>]*> addu \$a0,\$a0,\$a1 +0+01b4 <[^>]*> lb \$a0,0\(\$a0\) +[ ]*1b4: [A-Z0-9_]*LO[A-Z0-9_]* big_external_common +0+01b8 <[^>]*> addu \$a0,\$a1,\$gp +0+01bc <[^>]*> lb \$a0,0\(\$a0\) +[ ]*1bc: [A-Z0-9_]*GPREL[A-Z0-9_]* small_external_common +0+01c0 <[^>]*> lui \$a0,0x0 +[ ]*1c0: [A-Z0-9_]*HI[A-Z0-9_]* .bss.* +0+01c4 <[^>]*> addu \$a0,\$a0,\$a1 +0+01c8 <[^>]*> lb \$a0,[0-9]+\(\$a0\) +[ ]*1c8: [A-Z0-9_]*LO[A-Z0-9_]* .bss.* +0+01cc <[^>]*> addu \$a0,\$a1,\$gp +0+01d0 <[^>]*> lb \$a0,[-0-9]+\(\$a0\) +[ ]*1d0: [A-Z0-9_]*GPREL[A-Z0-9_]* .sbss.* +0+01d4 <[^>]*> lui \$a0,0x0 +[ ]*1d4: [A-Z0-9_]*HI[A-Z0-9_]* .data.* +0+01d8 <[^>]*> addu \$a0,\$a0,\$a1 +0+01dc <[^>]*> lb \$a0,[0-9]+\(\$a0\) +[ ]*1dc: [A-Z0-9_]*LO[A-Z0-9_]* .data.* +0+01e0 <[^>]*> lui \$a0,0x0 +[ ]*1e0: [A-Z0-9_]*HI[A-Z0-9_]* big_external_data_label +0+01e4 <[^>]*> addu \$a0,\$a0,\$a1 +0+01e8 <[^>]*> lb \$a0,[-0-9]+\(\$a0\) +[ ]*1e8: [A-Z0-9_]*LO[A-Z0-9_]* big_external_data_label +0+01ec <[^>]*> addu \$a0,\$a1,\$gp +0+01f0 <[^>]*> lb \$a0,1\(\$a0\) +[ ]*1f0: [A-Z0-9_]*GPREL[A-Z0-9_]* small_external_data_label +0+01f4 <[^>]*> lui \$a0,0x0 +[ ]*1f4: [A-Z0-9_]*HI[A-Z0-9_]* big_external_common +0+01f8 <[^>]*> addu \$a0,\$a0,\$a1 +0+01fc <[^>]*> lb \$a0,[-0-9]+\(\$a0\) +[ ]*1fc: [A-Z0-9_]*LO[A-Z0-9_]* big_external_common +0+0200 <[^>]*> addu \$a0,\$a1,\$gp +0+0204 <[^>]*> lb \$a0,1\(\$a0\) +[ ]*204: [A-Z0-9_]*GPREL[A-Z0-9_]* small_external_common +0+0208 <[^>]*> lui \$a0,0x0 +[ ]*208: [A-Z0-9_]*HI[A-Z0-9_]* .bss.* +0+020c <[^>]*> addu \$a0,\$a0,\$a1 +0+0210 <[^>]*> lb \$a0,[0-9]+\(\$a0\) +[ ]*210: [A-Z0-9_]*LO[A-Z0-9_]* .bss.* +0+0214 <[^>]*> addu \$a0,\$a1,\$gp +0+0218 <[^>]*> lb \$a0,[-0-9]+\(\$a0\) +[ ]*218: [A-Z0-9_]*GPREL[A-Z0-9_]* .sbss.* +0+021c <[^>]*> lui \$a0,[-0-9x]+ +[ ]*21c: [A-Z0-9_]*HI[A-Z0-9_]* .data.* +0+0220 <[^>]*> addu \$a0,\$a0,\$a1 +0+0224 <[^>]*> lb \$a0,[-0-9]+\(\$a0\) +[ ]*224: [A-Z0-9_]*LO[A-Z0-9_]* .data.* +0+0228 <[^>]*> lui \$a0,[-0-9x]+ +[ ]*228: [A-Z0-9_]*HI[A-Z0-9_]* big_external_data_label +0+022c <[^>]*> addu \$a0,\$a0,\$a1 +0+0230 <[^>]*> lb \$a0,[-0-9]+\(\$a0\) +[ ]*230: [A-Z0-9_]*LO[A-Z0-9_]* big_external_data_label +0+0234 <[^>]*> lui \$a0,[-0-9x]+ +[ ]*234: [A-Z0-9_]*HI[A-Z0-9_]* small_external_data_label +0+0238 <[^>]*> addu \$a0,\$a0,\$a1 +0+023c <[^>]*> lb \$a0,[-0-9]+\(\$a0\) +[ ]*23c: [A-Z0-9_]*LO[A-Z0-9_]* small_external_data_label +0+0240 <[^>]*> lui \$a0,[-0-9x]+ +[ ]*240: [A-Z0-9_]*HI[A-Z0-9_]* big_external_common +0+0244 <[^>]*> addu \$a0,\$a0,\$a1 +0+0248 <[^>]*> lb \$a0,[-0-9]+\(\$a0\) +[ ]*248: [A-Z0-9_]*LO[A-Z0-9_]* big_external_common +0+024c <[^>]*> lui \$a0,[-0-9x]+ +[ ]*24c: [A-Z0-9_]*HI[A-Z0-9_]* small_external_common +0+0250 <[^>]*> addu \$a0,\$a0,\$a1 +0+0254 <[^>]*> lb \$a0,[-0-9]+\(\$a0\) +[ ]*254: [A-Z0-9_]*LO[A-Z0-9_]* small_external_common +0+0258 <[^>]*> lui \$a0,[-0-9x]+ +[ ]*258: [A-Z0-9_]*HI[A-Z0-9_]* .bss.* +0+025c <[^>]*> addu \$a0,\$a0,\$a1 +0+0260 <[^>]*> lb \$a0,[-0-9]+\(\$a0\) +[ ]*260: [A-Z0-9_]*LO[A-Z0-9_]* .bss.* +0+0264 <[^>]*> lui \$a0,[-0-9x]+ +[ ]*264: [A-Z0-9_]*HI[A-Z0-9_]* .sbss.* +0+0268 <[^>]*> addu \$a0,\$a0,\$a1 +0+026c <[^>]*> lb \$a0,[-0-9]+\(\$a0\) +[ ]*26c: [A-Z0-9_]*LO[A-Z0-9_]* .sbss.* +0+0270 <[^>]*> lui \$a0,0x0 +[ ]*270: [A-Z0-9_]*HI[A-Z0-9_]* .data.* +0+0274 <[^>]*> addu \$a0,\$a0,\$a1 +0+0278 <[^>]*> lb \$a0,[-0-9]+\(\$a0\) +[ ]*278: [A-Z0-9_]*LO[A-Z0-9_]* .data.* +0+027c <[^>]*> lui \$a0,0x0 +[ ]*27c: [A-Z0-9_]*HI[A-Z0-9_]* big_external_data_label +0+0280 <[^>]*> addu \$a0,\$a0,\$a1 +0+0284 <[^>]*> lb \$a0,[-0-9]+\(\$a0\) +[ ]*284: [A-Z0-9_]*LO[A-Z0-9_]* big_external_data_label +0+0288 <[^>]*> lui \$a0,0x0 +[ ]*288: [A-Z0-9_]*HI[A-Z0-9_]* small_external_data_label +0+028c <[^>]*> addu \$a0,\$a0,\$a1 +0+0290 <[^>]*> lb \$a0,[-0-9]+\(\$a0\) +[ ]*290: [A-Z0-9_]*LO[A-Z0-9_]* small_external_data_label +0+0294 <[^>]*> lui \$a0,0x0 +[ ]*294: [A-Z0-9_]*HI[A-Z0-9_]* big_external_common +0+0298 <[^>]*> addu \$a0,\$a0,\$a1 +0+029c <[^>]*> lb \$a0,[-0-9]+\(\$a0\) +[ ]*29c: [A-Z0-9_]*LO[A-Z0-9_]* big_external_common +0+02a0 <[^>]*> lui \$a0,0x0 +[ ]*2a0: [A-Z0-9_]*HI[A-Z0-9_]* small_external_common +0+02a4 <[^>]*> addu \$a0,\$a0,\$a1 +0+02a8 <[^>]*> lb \$a0,[-0-9]+\(\$a0\) +[ ]*2a8: [A-Z0-9_]*LO[A-Z0-9_]* small_external_common +0+02ac <[^>]*> lui \$a0,0x0 +[ ]*2ac: [A-Z0-9_]*HI[A-Z0-9_]* .bss.* +0+02b0 <[^>]*> addu \$a0,\$a0,\$a1 +0+02b4 <[^>]*> lb \$a0,[-0-9]+\(\$a0\) +[ ]*2b4: [A-Z0-9_]*LO[A-Z0-9_]* .bss.* +0+02b8 <[^>]*> lui \$a0,0x0 +[ ]*2b8: [A-Z0-9_]*HI[A-Z0-9_]* .sbss.* +0+02bc <[^>]*> addu \$a0,\$a0,\$a1 +0+02c0 <[^>]*> lb \$a0,[-0-9]+\(\$a0\) +[ ]*2c0: [A-Z0-9_]*LO[A-Z0-9_]* .sbss.* +0+02c4 <[^>]*> lui \$a0,[-0-9x]+ +[ ]*2c4: [A-Z0-9_]*HI[A-Z0-9_]* .data.* +0+02c8 <[^>]*> addu \$a0,\$a0,\$a1 +0+02cc <[^>]*> lb \$a0,[0-9]+\(\$a0\) +[ ]*2cc: [A-Z0-9_]*LO[A-Z0-9_]* .data.* +0+02d0 <[^>]*> lui \$a0,[-0-9x]+ +[ ]*2d0: [A-Z0-9_]*HI[A-Z0-9_]* big_external_data_label +0+02d4 <[^>]*> addu \$a0,\$a0,\$a1 +0+02d8 <[^>]*> lb \$a0,0\(\$a0\) +[ ]*2d8: [A-Z0-9_]*LO[A-Z0-9_]* big_external_data_label +0+02dc <[^>]*> lui \$a0,[-0-9x]+ +[ ]*2dc: [A-Z0-9_]*HI[A-Z0-9_]* small_external_data_label +0+02e0 <[^>]*> addu \$a0,\$a0,\$a1 +0+02e4 <[^>]*> lb \$a0,0\(\$a0\) +[ ]*2e4: [A-Z0-9_]*LO[A-Z0-9_]* small_external_data_label +0+02e8 <[^>]*> lui \$a0,[-0-9x]+ +[ ]*2e8: [A-Z0-9_]*HI[A-Z0-9_]* big_external_common +0+02ec <[^>]*> addu \$a0,\$a0,\$a1 +0+02f0 <[^>]*> lb \$a0,0\(\$a0\) +[ ]*2f0: [A-Z0-9_]*LO[A-Z0-9_]* big_external_common +0+02f4 <[^>]*> lui \$a0,[-0-9x]+ +[ ]*2f4: [A-Z0-9_]*HI[A-Z0-9_]* small_external_common +0+02f8 <[^>]*> addu \$a0,\$a0,\$a1 +0+02fc <[^>]*> lb \$a0,0\(\$a0\) +[ ]*2fc: [A-Z0-9_]*LO[A-Z0-9_]* small_external_common +0+0300 <[^>]*> lui \$a0,[-0-9x]+ +[ ]*300: [A-Z0-9_]*HI[A-Z0-9_]* .bss.* +0+0304 <[^>]*> addu \$a0,\$a0,\$a1 +0+0308 <[^>]*> lb \$a0,[0-9]+\(\$a0\) +[ ]*308: [A-Z0-9_]*LO[A-Z0-9_]* .bss.* +0+030c <[^>]*> lui \$a0,[-0-9x]+ +[ ]*30c: [A-Z0-9_]*HI[A-Z0-9_]* .sbss.* +0+0310 <[^>]*> addu \$a0,\$a0,\$a1 +0+0314 <[^>]*> lb \$a0,[-0-9]+\(\$a0\) +[ ]*314: [A-Z0-9_]*LO[A-Z0-9_]* .sbss.* +0+0318 <[^>]*> lui \$a0,[-0-9x]+ +[ ]*318: [A-Z0-9_]*HI[A-Z0-9_]* .data.* +0+031c <[^>]*> addu \$a0,\$a0,\$a1 +0+0320 <[^>]*> lb \$a0,[-0-9]+\(\$a0\) +[ ]*320: [A-Z0-9_]*LO[A-Z0-9_]* .data.* +0+0324 <[^>]*> lui \$a0,[-0-9x]+ +[ ]*324: [A-Z0-9_]*HI[A-Z0-9_]* big_external_data_label +0+0328 <[^>]*> addu \$a0,\$a0,\$a1 +0+032c <[^>]*> lb \$a0,[-0-9]+\(\$a0\) +[ ]*32c: [A-Z0-9_]*LO[A-Z0-9_]* big_external_data_label +0+0330 <[^>]*> lui \$a0,[-0-9x]+ +[ ]*330: [A-Z0-9_]*HI[A-Z0-9_]* small_external_data_label +0+0334 <[^>]*> addu \$a0,\$a0,\$a1 +0+0338 <[^>]*> lb \$a0,[-0-9]+\(\$a0\) +[ ]*338: [A-Z0-9_]*LO[A-Z0-9_]* small_external_data_label +0+033c <[^>]*> lui \$a0,[-0-9x]+ +[ ]*33c: [A-Z0-9_]*HI[A-Z0-9_]* big_external_common +0+0340 <[^>]*> addu \$a0,\$a0,\$a1 +0+0344 <[^>]*> lb \$a0,[-0-9]+\(\$a0\) +[ ]*344: [A-Z0-9_]*LO[A-Z0-9_]* big_external_common +0+0348 <[^>]*> lui \$a0,[-0-9x]+ +[ ]*348: [A-Z0-9_]*HI[A-Z0-9_]* small_external_common +0+034c <[^>]*> addu \$a0,\$a0,\$a1 +0+0350 <[^>]*> lb \$a0,[-0-9]+\(\$a0\) +[ ]*350: [A-Z0-9_]*LO[A-Z0-9_]* small_external_common +0+0354 <[^>]*> lui \$a0,[-0-9x]+ +[ ]*354: [A-Z0-9_]*HI[A-Z0-9_]* .bss.* +0+0358 <[^>]*> addu \$a0,\$a0,\$a1 +0+035c <[^>]*> lb \$a0,[-0-9]+\(\$a0\) +[ ]*35c: [A-Z0-9_]*LO[A-Z0-9_]* .bss.* +0+0360 <[^>]*> lui \$a0,[-0-9x]+ +[ ]*360: [A-Z0-9_]*HI[A-Z0-9_]* .sbss.* +0+0364 <[^>]*> addu \$a0,\$a0,\$a1 +0+0368 <[^>]*> lb \$a0,[-0-9]+\(\$a0\) +[ ]*368: [A-Z0-9_]*LO[A-Z0-9_]* .sbss.* +0+036c <[^>]*> lbu \$a0,0\(\$zero\) +0+0370 <[^>]*> lh \$a0,0\(\$zero\) +0+0374 <[^>]*> lhu \$a0,0\(\$zero\) +0+0378 <[^>]*> lw \$a0,0\(\$zero\) +0+037c <[^>]*> lwl \$a0,0\(\$zero\) +0+0380 <[^>]*> lwr \$a0,0\(\$zero\) +0+0384 <[^>]*> lwc0 \$4,0\(\$zero\) +0+0388 <[^>]*> lwc1 \$f4,0\(\$zero\) +0+038c <[^>]*> lwc2 \$4,0\(\$zero\) +0+0390 <[^>]*> lwc3 \$4,0\(\$zero\) + ... diff --git a/gas/testsuite/gas/mips/lb.s b/gas/testsuite/gas/mips/lb.s new file mode 100644 index 0000000..303ccaf --- /dev/null +++ b/gas/testsuite/gas/mips/lb.s @@ -0,0 +1,125 @@ +# Source file used to test the lb macro. + + .data +data_label: + .extern big_external_data_label,1000 + .extern small_external_data_label,1 + .comm big_external_common,1000 + .comm small_external_common,1 + .lcomm big_local_common,1000 + .lcomm small_local_common,1 + + .text + lb $4,0 + lb $4,1 + lb $4,0x8000 + lb $4,-0x8000 + lb $4,0x10000 + lb $4,0x1a5a5 + lb $4,0($5) + lb $4,1($5) + lb $4,0x8000($5) + lb $4,-0x8000($5) + lb $4,0x10000($5) + lb $4,0x1a5a5($5) + lb $4,data_label + lb $4,big_external_data_label + lb $4,small_external_data_label + lb $4,big_external_common + lb $4,small_external_common + lb $4,big_local_common + lb $4,small_local_common + lb $4,data_label+1 + lb $4,big_external_data_label+1 + lb $4,small_external_data_label+1 + lb $4,big_external_common+1 + lb $4,small_external_common+1 + lb $4,big_local_common+1 + lb $4,small_local_common+1 + lb $4,data_label+0x8000 + lb $4,big_external_data_label+0x8000 + lb $4,small_external_data_label+0x8000 + lb $4,big_external_common+0x8000 + lb $4,small_external_common+0x8000 + lb $4,big_local_common+0x8000 + lb $4,small_local_common+0x8000 + lb $4,data_label-0x8000 + lb $4,big_external_data_label-0x8000 + lb $4,small_external_data_label-0x8000 + lb $4,big_external_common-0x8000 + lb $4,small_external_common-0x8000 + lb $4,big_local_common-0x8000 + lb $4,small_local_common-0x8000 + lb $4,data_label+0x10000 + lb $4,big_external_data_label+0x10000 + lb $4,small_external_data_label+0x10000 + lb $4,big_external_common+0x10000 + lb $4,small_external_common+0x10000 + lb $4,big_local_common+0x10000 + lb $4,small_local_common+0x10000 + lb $4,data_label+0x1a5a5 + lb $4,big_external_data_label+0x1a5a5 + lb $4,small_external_data_label+0x1a5a5 + lb $4,big_external_common+0x1a5a5 + lb $4,small_external_common+0x1a5a5 + lb $4,big_local_common+0x1a5a5 + lb $4,small_local_common+0x1a5a5 + lb $4,data_label($5) + lb $4,big_external_data_label($5) + lb $4,small_external_data_label($5) + lb $4,big_external_common($5) + lb $4,small_external_common($5) + lb $4,big_local_common($5) + lb $4,small_local_common($5) + lb $4,data_label+1($5) + lb $4,big_external_data_label+1($5) + lb $4,small_external_data_label+1($5) + lb $4,big_external_common+1($5) + lb $4,small_external_common+1($5) + lb $4,big_local_common+1($5) + lb $4,small_local_common+1($5) + lb $4,data_label+0x8000($5) + lb $4,big_external_data_label+0x8000($5) + lb $4,small_external_data_label+0x8000($5) + lb $4,big_external_common+0x8000($5) + lb $4,small_external_common+0x8000($5) + lb $4,big_local_common+0x8000($5) + lb $4,small_local_common+0x8000($5) + lb $4,data_label-0x8000($5) + lb $4,big_external_data_label-0x8000($5) + lb $4,small_external_data_label-0x8000($5) + lb $4,big_external_common-0x8000($5) + lb $4,small_external_common-0x8000($5) + lb $4,big_local_common-0x8000($5) + lb $4,small_local_common-0x8000($5) + lb $4,data_label+0x10000($5) + lb $4,big_external_data_label+0x10000($5) + lb $4,small_external_data_label+0x10000($5) + lb $4,big_external_common+0x10000($5) + lb $4,small_external_common+0x10000($5) + lb $4,big_local_common+0x10000($5) + lb $4,small_local_common+0x10000($5) + lb $4,data_label+0x1a5a5($5) + lb $4,big_external_data_label+0x1a5a5($5) + lb $4,small_external_data_label+0x1a5a5($5) + lb $4,big_external_common+0x1a5a5($5) + lb $4,small_external_common+0x1a5a5($5) + lb $4,big_local_common+0x1a5a5($5) + lb $4,small_local_common+0x1a5a5($5) + +# Several macros are handled like lb. Sanity check them. + lbu $4,0 + lh $4,0 + lhu $4,0 + lw $4,0 + lwl $4,0 + lwr $4,0 + lwc0 $4,0 + lwc1 $4,0 + lwc2 $4,0 + lwc3 $4,0 + +# Round to a 16 byte boundary, for ease in testing multiple targets. + nop + nop + nop diff --git a/gas/testsuite/gas/mips/ld-empic.d b/gas/testsuite/gas/mips/ld-empic.d new file mode 100644 index 0000000..fa961f6 --- /dev/null +++ b/gas/testsuite/gas/mips/ld-empic.d @@ -0,0 +1,186 @@ +#objdump: -dr --prefix-addresses -mmips:3000 +#name: MIPS ld-empic +#as: -mips1 -membedded-pic --defsym EMPIC=1 +#source: ld-pic.s + +# Test the ld macro with -membedded-pic. + +.*: +file format .*mips.* + +Disassembly of section .text: +0+0000 <[^>]*> lw \$a0,0\(\$zero\) +0+0004 <[^>]*> lw \$a1,4\(\$zero\) +0+0008 <[^>]*> lw \$a0,1\(\$zero\) +0+000c <[^>]*> lw \$a1,5\(\$zero\) +0+0010 <[^>]*> lui \$at,0x1 +0+0014 <[^>]*> lw \$a0,-32768\(\$at\) +0+0018 <[^>]*> lw \$a1,-32764\(\$at\) +0+001c <[^>]*> lw \$a0,-32768\(\$zero\) +0+0020 <[^>]*> lw \$a1,-32764\(\$zero\) +0+0024 <[^>]*> lui \$at,0x1 +0+0028 <[^>]*> lw \$a0,0\(\$at\) +0+002c <[^>]*> lw \$a1,4\(\$at\) +0+0030 <[^>]*> lui \$at,0x2 +0+0034 <[^>]*> lw \$a0,-23131\(\$at\) +0+0038 <[^>]*> lw \$a1,-23127\(\$at\) +0+003c <[^>]*> nop +0+0040 <[^>]*> lw \$a0,0\(\$a1\) +0+0044 <[^>]*> lw \$a1,4\(\$a1\) +0+0048 <[^>]*> nop +0+004c <[^>]*> lw \$a0,1\(\$a1\) +0+0050 <[^>]*> lw \$a1,5\(\$a1\) +0+0054 <[^>]*> lui \$at,0x1 +0+0058 <[^>]*> addu \$at,\$a1,\$at +0+005c <[^>]*> lw \$a0,-32768\(\$at\) +0+0060 <[^>]*> lw \$a1,-32764\(\$at\) +0+0064 <[^>]*> nop +0+0068 <[^>]*> lw \$a0,-32768\(\$a1\) +0+006c <[^>]*> lw \$a1,-32764\(\$a1\) +0+0070 <[^>]*> lui \$at,0x1 +0+0074 <[^>]*> addu \$at,\$a1,\$at +0+0078 <[^>]*> lw \$a0,0\(\$at\) +0+007c <[^>]*> lw \$a1,4\(\$at\) +0+0080 <[^>]*> lui \$at,0x2 +0+0084 <[^>]*> addu \$at,\$a1,\$at +0+0088 <[^>]*> lw \$a0,-23131\(\$at\) +0+008c <[^>]*> lw \$a1,-23127\(\$at\) +0+0090 <[^>]*> lw \$a0,-16384\(\$gp\) +[ ]*90: [A-Z0-9_]*GPREL[A-Z0-9_]* .sdata.* +0+0094 <[^>]*> lw \$a1,-16380\(\$gp\) +[ ]*94: [A-Z0-9_]*GPREL[A-Z0-9_]* .sdata.* +0+0098 <[^>]*> lw \$a0,0\(\$gp\) +[ ]*98: [A-Z0-9_]*GPREL[A-Z0-9_]* big_external_data_label +0+009c <[^>]*> lw \$a1,4\(\$gp\) +[ ]*9c: [A-Z0-9_]*GPREL[A-Z0-9_]* big_external_data_label +0+00a0 <[^>]*> lw \$a0,0\(\$gp\) +[ ]*a0: [A-Z0-9_]*GPREL[A-Z0-9_]* small_external_data_label +0+00a4 <[^>]*> lw \$a1,4\(\$gp\) +[ ]*a4: [A-Z0-9_]*GPREL[A-Z0-9_]* small_external_data_label +0+00a8 <[^>]*> lw \$a0,0\(\$gp\) +[ ]*a8: [A-Z0-9_]*GPREL[A-Z0-9_]* big_external_common +0+00ac <[^>]*> lw \$a1,4\(\$gp\) +[ ]*ac: [A-Z0-9_]*GPREL[A-Z0-9_]* big_external_common +0+00b0 <[^>]*> lw \$a0,0\(\$gp\) +[ ]*b0: [A-Z0-9_]*GPREL[A-Z0-9_]* small_external_common +0+00b4 <[^>]*> lw \$a1,4\(\$gp\) +[ ]*b4: [A-Z0-9_]*GPREL[A-Z0-9_]* small_external_common +0+00b8 <[^>]*> lw \$a0,-16384\(\$gp\) +[ ]*b8: [A-Z0-9_]*GPREL[A-Z0-9_]* .sbss.* +0+00bc <[^>]*> lw \$a1,-16380\(\$gp\) +[ ]*bc: [A-Z0-9_]*GPREL[A-Z0-9_]* .sbss.* +0+00c0 <[^>]*> lw \$a0,-15384\(\$gp\) +[ ]*c0: [A-Z0-9_]*GPREL[A-Z0-9_]* .sbss.* +0+00c4 <[^>]*> lw \$a1,-15380\(\$gp\) +[ ]*c4: [A-Z0-9_]*GPREL[A-Z0-9_]* .sbss.* +0+00c8 <[^>]*> lw \$a0,-16383\(\$gp\) +[ ]*c8: [A-Z0-9_]*GPREL[A-Z0-9_]* .sdata.* +0+00cc <[^>]*> lw \$a1,-16379\(\$gp\) +[ ]*cc: [A-Z0-9_]*GPREL[A-Z0-9_]* .sdata.* +0+00d0 <[^>]*> lw \$a0,1\(\$gp\) +[ ]*d0: [A-Z0-9_]*GPREL[A-Z0-9_]* big_external_data_label +0+00d4 <[^>]*> lw \$a1,5\(\$gp\) +[ ]*d4: [A-Z0-9_]*GPREL[A-Z0-9_]* big_external_data_label +0+00d8 <[^>]*> lw \$a0,1\(\$gp\) +[ ]*d8: [A-Z0-9_]*GPREL[A-Z0-9_]* small_external_data_label +0+00dc <[^>]*> lw \$a1,5\(\$gp\) +[ ]*dc: [A-Z0-9_]*GPREL[A-Z0-9_]* small_external_data_label +0+00e0 <[^>]*> lw \$a0,1\(\$gp\) +[ ]*e0: [A-Z0-9_]*GPREL[A-Z0-9_]* big_external_common +0+00e4 <[^>]*> lw \$a1,5\(\$gp\) +[ ]*e4: [A-Z0-9_]*GPREL[A-Z0-9_]* big_external_common +0+00e8 <[^>]*> lw \$a0,1\(\$gp\) +[ ]*e8: [A-Z0-9_]*GPREL[A-Z0-9_]* small_external_common +0+00ec <[^>]*> lw \$a1,5\(\$gp\) +[ ]*ec: [A-Z0-9_]*GPREL[A-Z0-9_]* small_external_common +0+00f0 <[^>]*> lw \$a0,-16383\(\$gp\) +[ ]*f0: [A-Z0-9_]*GPREL[A-Z0-9_]* .sbss.* +0+00f4 <[^>]*> lw \$a1,-16379\(\$gp\) +[ ]*f4: [A-Z0-9_]*GPREL[A-Z0-9_]* .sbss.* +0+00f8 <[^>]*> lw \$a0,-15383\(\$gp\) +[ ]*f8: [A-Z0-9_]*GPREL[A-Z0-9_]* .sbss.* +0+00fc <[^>]*> lw \$a1,-15379\(\$gp\) +[ ]*fc: [A-Z0-9_]*GPREL[A-Z0-9_]* .sbss.* +0+0100 <[^>]*> nop +0+0104 <[^>]*> addu \$at,\$a1,\$gp +0+0108 <[^>]*> lw \$a0,-16384\(\$at\) +[ ]*108: [A-Z0-9_]*GPREL[A-Z0-9_]* .sdata.* +0+010c <[^>]*> lw \$a1,-16380\(\$at\) +[ ]*10c: [A-Z0-9_]*GPREL[A-Z0-9_]* .sdata.* +0+0110 <[^>]*> nop +0+0114 <[^>]*> addu \$at,\$a1,\$gp +0+0118 <[^>]*> lw \$a0,0\(\$at\) +[ ]*118: [A-Z0-9_]*GPREL[A-Z0-9_]* big_external_data_label +0+011c <[^>]*> lw \$a1,4\(\$at\) +[ ]*11c: [A-Z0-9_]*GPREL[A-Z0-9_]* big_external_data_label +0+0120 <[^>]*> nop +0+0124 <[^>]*> addu \$at,\$a1,\$gp +0+0128 <[^>]*> lw \$a0,0\(\$at\) +[ ]*128: [A-Z0-9_]*GPREL[A-Z0-9_]* small_external_data_label +0+012c <[^>]*> lw \$a1,4\(\$at\) +[ ]*12c: [A-Z0-9_]*GPREL[A-Z0-9_]* small_external_data_label +0+0130 <[^>]*> nop +0+0134 <[^>]*> addu \$at,\$a1,\$gp +0+0138 <[^>]*> lw \$a0,0\(\$at\) +[ ]*138: [A-Z0-9_]*GPREL[A-Z0-9_]* big_external_common +0+013c <[^>]*> lw \$a1,4\(\$at\) +[ ]*13c: [A-Z0-9_]*GPREL[A-Z0-9_]* big_external_common +0+0140 <[^>]*> nop +0+0144 <[^>]*> addu \$at,\$a1,\$gp +0+0148 <[^>]*> lw \$a0,0\(\$at\) +[ ]*148: [A-Z0-9_]*GPREL[A-Z0-9_]* small_external_common +0+014c <[^>]*> lw \$a1,4\(\$at\) +[ ]*14c: [A-Z0-9_]*GPREL[A-Z0-9_]* small_external_common +0+0150 <[^>]*> nop +0+0154 <[^>]*> addu \$at,\$a1,\$gp +0+0158 <[^>]*> lw \$a0,-16384\(\$at\) +[ ]*158: [A-Z0-9_]*GPREL[A-Z0-9_]* .sbss.* +0+015c <[^>]*> lw \$a1,-16380\(\$at\) +[ ]*15c: [A-Z0-9_]*GPREL[A-Z0-9_]* .sbss.* +0+0160 <[^>]*> nop +0+0164 <[^>]*> addu \$at,\$a1,\$gp +0+0168 <[^>]*> lw \$a0,-15384\(\$at\) +[ ]*168: [A-Z0-9_]*GPREL[A-Z0-9_]* .sbss.* +0+016c <[^>]*> lw \$a1,-15380\(\$at\) +[ ]*16c: [A-Z0-9_]*GPREL[A-Z0-9_]* .sbss.* +0+0170 <[^>]*> nop +0+0174 <[^>]*> addu \$at,\$a1,\$gp +0+0178 <[^>]*> lw \$a0,-16383\(\$at\) +[ ]*178: [A-Z0-9_]*GPREL[A-Z0-9_]* .sdata.* +0+017c <[^>]*> lw \$a1,-16379\(\$at\) +[ ]*17c: [A-Z0-9_]*GPREL[A-Z0-9_]* .sdata.* +0+0180 <[^>]*> nop +0+0184 <[^>]*> addu \$at,\$a1,\$gp +0+0188 <[^>]*> lw \$a0,1\(\$at\) +[ ]*188: [A-Z0-9_]*GPREL[A-Z0-9_]* big_external_data_label +0+018c <[^>]*> lw \$a1,5\(\$at\) +[ ]*18c: [A-Z0-9_]*GPREL[A-Z0-9_]* big_external_data_label +0+0190 <[^>]*> nop +0+0194 <[^>]*> addu \$at,\$a1,\$gp +0+0198 <[^>]*> lw \$a0,1\(\$at\) +[ ]*198: [A-Z0-9_]*GPREL[A-Z0-9_]* small_external_data_label +0+019c <[^>]*> lw \$a1,5\(\$at\) +[ ]*19c: [A-Z0-9_]*GPREL[A-Z0-9_]* small_external_data_label +0+01a0 <[^>]*> nop +0+01a4 <[^>]*> addu \$at,\$a1,\$gp +0+01a8 <[^>]*> lw \$a0,1\(\$at\) +[ ]*1a8: [A-Z0-9_]*GPREL[A-Z0-9_]* big_external_common +0+01ac <[^>]*> lw \$a1,5\(\$at\) +[ ]*1ac: [A-Z0-9_]*GPREL[A-Z0-9_]* big_external_common +0+01b0 <[^>]*> nop +0+01b4 <[^>]*> addu \$at,\$a1,\$gp +0+01b8 <[^>]*> lw \$a0,1\(\$at\) +[ ]*1b8: [A-Z0-9_]*GPREL[A-Z0-9_]* small_external_common +0+01bc <[^>]*> lw \$a1,5\(\$at\) +[ ]*1bc: [A-Z0-9_]*GPREL[A-Z0-9_]* small_external_common +0+01c0 <[^>]*> nop +0+01c4 <[^>]*> addu \$at,\$a1,\$gp +0+01c8 <[^>]*> lw \$a0,-16383\(\$at\) +[ ]*1c8: [A-Z0-9_]*GPREL[A-Z0-9_]* .sbss.* +0+01cc <[^>]*> lw \$a1,-16379\(\$at\) +[ ]*1cc: [A-Z0-9_]*GPREL[A-Z0-9_]* .sbss.* +0+01d0 <[^>]*> nop +0+01d4 <[^>]*> addu \$at,\$a1,\$gp +0+01d8 <[^>]*> lw \$a0,-15383\(\$at\) +[ ]*1d8: [A-Z0-9_]*GPREL[A-Z0-9_]* .sbss.* +0+01dc <[^>]*> lw \$a1,-15379\(\$at\) +[ ]*1dc: [A-Z0-9_]*GPREL[A-Z0-9_]* .sbss.* diff --git a/gas/testsuite/gas/mips/ld-ilocks-addr32.d b/gas/testsuite/gas/mips/ld-ilocks-addr32.d new file mode 100644 index 0000000..0846d61 --- /dev/null +++ b/gas/testsuite/gas/mips/ld-ilocks-addr32.d @@ -0,0 +1,632 @@ +#objdump: -dr --prefix-addresses -mmips:4000 +#as: -mips3 -mcpu=r4000 +#name: MIPS ld-ilocks +#source: ld.s + +# Test the ld macro. + +.*: +file format .*mips.* + +Disassembly of section .text: +0+0000 <.text> lw \$a0,0\(\$zero\) +0+0004 <[^>]*> lw \$a1,4\(\$zero\) +0+0008 <[^>]*> lw \$a0,1\(\$zero\) +0+000c <[^>]*> lw \$a1,5\(\$zero\) +0+0010 <[^>]*> lui \$at,0x1 +0+0014 <[^>]*> lw \$a0,-32768\(\$at\) +0+0018 <[^>]*> lw \$a1,-32764\(\$at\) +0+001c <[^>]*> lw \$a0,-32768\(\$zero\) +0+0020 <[^>]*> lw \$a1,-32764\(\$zero\) +0+0024 <[^>]*> lui \$at,0x1 +0+0028 <[^>]*> lw \$a0,0\(\$at\) +0+002c <[^>]*> lw \$a1,4\(\$at\) +0+0030 <[^>]*> lui \$at,0x2 +0+0034 <[^>]*> lw \$a0,-23131\(\$at\) +0+0038 <[^>]*> lw \$a1,-23127\(\$at\) +0+003c <[^>]*> lw \$a0,0\(\$a1\) +0+0040 <[^>]*> lw \$a1,4\(\$a1\) +0+0044 <[^>]*> lw \$a0,1\(\$a1\) +0+0048 <[^>]*> lw \$a1,5\(\$a1\) +0+004c <[^>]*> lui \$at,0x1 +0+0050 <[^>]*> addu \$at,\$a1,\$at +0+0054 <[^>]*> lw \$a0,-32768\(\$at\) +0+0058 <[^>]*> lw \$a1,-32764\(\$at\) +0+005c <[^>]*> lw \$a0,-32768\(\$a1\) +0+0060 <[^>]*> lw \$a1,-32764\(\$a1\) +0+0064 <[^>]*> lui \$at,0x1 +0+0068 <[^>]*> addu \$at,\$a1,\$at +0+006c <[^>]*> lw \$a0,0\(\$at\) +0+0070 <[^>]*> lw \$a1,4\(\$at\) +0+0074 <[^>]*> lui \$at,0x2 +0+0078 <[^>]*> addu \$at,\$a1,\$at +0+007c <[^>]*> lw \$a0,-23131\(\$at\) +0+0080 <[^>]*> lw \$a1,-23127\(\$at\) +0+0084 <[^>]*> lui \$at,0x0 +[ ]*84: [A-Z0-9_]*HI[A-Z0-9_]* .data.* +0+0088 <[^>]*> lw \$a0,0\(\$at\) +[ ]*88: [A-Z0-9_]*LO[A-Z0-9_]* .data.* +0+008c <[^>]*> lw \$a1,4\(\$at\) +[ ]*8c: [A-Z0-9_]*LO[A-Z0-9_]* .data.* +0+0090 <[^>]*> lui \$at,0x0 +[ ]*90: [A-Z0-9_]*HI[A-Z0-9_]* big_external_data_label +0+0094 <[^>]*> lw \$a0,0\(\$at\) +[ ]*94: [A-Z0-9_]*LO[A-Z0-9_]* big_external_data_label +0+0098 <[^>]*> lw \$a1,4\(\$at\) +[ ]*98: [A-Z0-9_]*LO[A-Z0-9_]* big_external_data_label +0+009c <[^>]*> lw \$a0,0\(\$gp\) +[ ]*9c: [A-Z0-9_]*GPREL[A-Z0-9_]* small_external_data_label +0+00a0 <[^>]*> lw \$a1,4\(\$gp\) +[ ]*a0: [A-Z0-9_]*GPREL[A-Z0-9_]* small_external_data_label +0+00a4 <[^>]*> lui \$at,0x0 +[ ]*a4: [A-Z0-9_]*HI[A-Z0-9_]* big_external_common +0+00a8 <[^>]*> lw \$a0,0\(\$at\) +[ ]*a8: [A-Z0-9_]*LO[A-Z0-9_]* big_external_common +0+00ac <[^>]*> lw \$a1,4\(\$at\) +[ ]*ac: [A-Z0-9_]*LO[A-Z0-9_]* big_external_common +0+00b0 <[^>]*> lw \$a0,0\(\$gp\) +[ ]*b0: [A-Z0-9_]*GPREL[A-Z0-9_]* small_external_common +0+00b4 <[^>]*> lw \$a1,4\(\$gp\) +[ ]*b4: [A-Z0-9_]*GPREL[A-Z0-9_]* small_external_common +0+00b8 <[^>]*> lui \$at,0x0 +[ ]*b8: [A-Z0-9_]*HI[A-Z0-9_]* .bss.* +0+00bc <[^>]*> lw \$a0,0\(\$at\) +[ ]*bc: [A-Z0-9_]*LO[A-Z0-9_]* .bss.* +0+00c0 <[^>]*> lw \$a1,4\(\$at\) +[ ]*c0: [A-Z0-9_]*LO[A-Z0-9_]* .bss.* +0+00c4 <[^>]*> lw \$a0,-16384\(\$gp\) +[ ]*c4: [A-Z0-9_]*GPREL[A-Z0-9_]* .sbss.* +0+00c8 <[^>]*> lw \$a1,-16380\(\$gp\) +[ ]*c8: [A-Z0-9_]*GPREL[A-Z0-9_]* .sbss.* +0+00cc <[^>]*> lui \$at,0x0 +[ ]*cc: [A-Z0-9_]*HI[A-Z0-9_]* .data.* +0+00d0 <[^>]*> lw \$a0,1\(\$at\) +[ ]*d0: [A-Z0-9_]*LO[A-Z0-9_]* .data.* +0+00d4 <[^>]*> lw \$a1,5\(\$at\) +[ ]*d4: [A-Z0-9_]*LO[A-Z0-9_]* .data.* +0+00d8 <[^>]*> lui \$at,0x0 +[ ]*d8: [A-Z0-9_]*HI[A-Z0-9_]* big_external_data_label +0+00dc <[^>]*> lw \$a0,1\(\$at\) +[ ]*dc: [A-Z0-9_]*LO[A-Z0-9_]* big_external_data_label +0+00e0 <[^>]*> lw \$a1,5\(\$at\) +[ ]*e0: [A-Z0-9_]*LO[A-Z0-9_]* big_external_data_label +0+00e4 <[^>]*> lw \$a0,1\(\$gp\) +[ ]*e4: [A-Z0-9_]*GPREL[A-Z0-9_]* small_external_data_label +0+00e8 <[^>]*> lw \$a1,5\(\$gp\) +[ ]*e8: [A-Z0-9_]*GPREL[A-Z0-9_]* small_external_data_label +0+00ec <[^>]*> lui \$at,0x0 +[ ]*ec: [A-Z0-9_]*HI[A-Z0-9_]* big_external_common +0+00f0 <[^>]*> lw \$a0,1\(\$at\) +[ ]*f0: [A-Z0-9_]*LO[A-Z0-9_]* big_external_common +0+00f4 <[^>]*> lw \$a1,5\(\$at\) +[ ]*f4: [A-Z0-9_]*LO[A-Z0-9_]* big_external_common +0+00f8 <[^>]*> lw \$a0,1\(\$gp\) +[ ]*f8: [A-Z0-9_]*GPREL[A-Z0-9_]* small_external_common +0+00fc <[^>]*> lw \$a1,5\(\$gp\) +[ ]*fc: [A-Z0-9_]*GPREL[A-Z0-9_]* small_external_common +0+0100 <[^>]*> lui \$at,0x0 +[ ]*100: [A-Z0-9_]*HI[A-Z0-9_]* .bss.* +0+0104 <[^>]*> lw \$a0,1\(\$at\) +[ ]*104: [A-Z0-9_]*LO[A-Z0-9_]* .bss.* +0+0108 <[^>]*> lw \$a1,5\(\$at\) +[ ]*108: [A-Z0-9_]*LO[A-Z0-9_]* .bss.* +0+010c <[^>]*> lw \$a0,-16383\(\$gp\) +[ ]*10c: [A-Z0-9_]*GPREL[A-Z0-9_]* .sbss.* +0+0110 <[^>]*> lw \$a1,-16379\(\$gp\) +[ ]*110: [A-Z0-9_]*GPREL[A-Z0-9_]* .sbss.* +0+0114 <[^>]*> lui \$at,0x1 +[ ]*114: [A-Z0-9_]*HI[A-Z0-9_]* .data.* +0+0118 <[^>]*> lw \$a0,-32768\(\$at\) +[ ]*118: [A-Z0-9_]*LO[A-Z0-9_]* .data.* +0+011c <[^>]*> lw \$a1,-32764\(\$at\) +[ ]*11c: [A-Z0-9_]*LO[A-Z0-9_]* .data.* +0+0120 <[^>]*> lui \$at,0x1 +[ ]*120: [A-Z0-9_]*HI[A-Z0-9_]* big_external_data_label +0+0124 <[^>]*> lw \$a0,-32768\(\$at\) +[ ]*124: [A-Z0-9_]*LO[A-Z0-9_]* big_external_data_label +0+0128 <[^>]*> lw \$a1,-32764\(\$at\) +[ ]*128: [A-Z0-9_]*LO[A-Z0-9_]* big_external_data_label +0+012c <[^>]*> lui \$at,0x1 +[ ]*12c: [A-Z0-9_]*HI[A-Z0-9_]* small_external_data_label +0+0130 <[^>]*> lw \$a0,-32768\(\$at\) +[ ]*130: [A-Z0-9_]*LO[A-Z0-9_]* small_external_data_label +0+0134 <[^>]*> lw \$a1,-32764\(\$at\) +[ ]*134: [A-Z0-9_]*LO[A-Z0-9_]* small_external_data_label +0+0138 <[^>]*> lui \$at,0x1 +[ ]*138: [A-Z0-9_]*HI[A-Z0-9_]* big_external_common +0+013c <[^>]*> lw \$a0,-32768\(\$at\) +[ ]*13c: [A-Z0-9_]*LO[A-Z0-9_]* big_external_common +0+0140 <[^>]*> lw \$a1,-32764\(\$at\) +[ ]*140: [A-Z0-9_]*LO[A-Z0-9_]* big_external_common +0+0144 <[^>]*> lui \$at,0x1 +[ ]*144: [A-Z0-9_]*HI[A-Z0-9_]* small_external_common +0+0148 <[^>]*> lw \$a0,-32768\(\$at\) +[ ]*148: [A-Z0-9_]*LO[A-Z0-9_]* small_external_common +0+014c <[^>]*> lw \$a1,-32764\(\$at\) +[ ]*14c: [A-Z0-9_]*LO[A-Z0-9_]* small_external_common +0+0150 <[^>]*> lui \$at,0x1 +[ ]*150: [A-Z0-9_]*HI[A-Z0-9_]* .bss.* +0+0154 <[^>]*> lw \$a0,-32768\(\$at\) +[ ]*154: [A-Z0-9_]*LO[A-Z0-9_]* .bss.* +0+0158 <[^>]*> lw \$a1,-32764\(\$at\) +[ ]*158: [A-Z0-9_]*LO[A-Z0-9_]* .bss.* +0+015c <[^>]*> lui \$at,0x1 +[ ]*15c: [A-Z0-9_]*HI[A-Z0-9_]* .sbss.* +0+0160 <[^>]*> lw \$a0,-32768\(\$at\) +[ ]*160: [A-Z0-9_]*LO[A-Z0-9_]* .sbss.* +0+0164 <[^>]*> lw \$a1,-32764\(\$at\) +[ ]*164: [A-Z0-9_]*LO[A-Z0-9_]* .sbss.* +0+0168 <[^>]*> lui \$at,0x0 +[ ]*168: [A-Z0-9_]*HI[A-Z0-9_]* .data.* +0+016c <[^>]*> lw \$a0,-32768\(\$at\) +[ ]*16c: [A-Z0-9_]*LO[A-Z0-9_]* .data.* +0+0170 <[^>]*> lw \$a1,-32764\(\$at\) +[ ]*170: [A-Z0-9_]*LO[A-Z0-9_]* .data.* +0+0174 <[^>]*> lui \$at,0x0 +[ ]*174: [A-Z0-9_]*HI[A-Z0-9_]* big_external_data_label +0+0178 <[^>]*> lw \$a0,-32768\(\$at\) +[ ]*178: [A-Z0-9_]*LO[A-Z0-9_]* big_external_data_label +0+017c <[^>]*> lw \$a1,-32764\(\$at\) +[ ]*17c: [A-Z0-9_]*LO[A-Z0-9_]* big_external_data_label +0+0180 <[^>]*> lui \$at,0x0 +[ ]*180: [A-Z0-9_]*HI[A-Z0-9_]* small_external_data_label +0+0184 <[^>]*> lw \$a0,-32768\(\$at\) +[ ]*184: [A-Z0-9_]*LO[A-Z0-9_]* small_external_data_label +0+0188 <[^>]*> lw \$a1,-32764\(\$at\) +[ ]*188: [A-Z0-9_]*LO[A-Z0-9_]* small_external_data_label +0+018c <[^>]*> lui \$at,0x0 +[ ]*18c: [A-Z0-9_]*HI[A-Z0-9_]* big_external_common +0+0190 <[^>]*> lw \$a0,-32768\(\$at\) +[ ]*190: [A-Z0-9_]*LO[A-Z0-9_]* big_external_common +0+0194 <[^>]*> lw \$a1,-32764\(\$at\) +[ ]*194: [A-Z0-9_]*LO[A-Z0-9_]* big_external_common +0+0198 <[^>]*> lui \$at,0x0 +[ ]*198: [A-Z0-9_]*HI[A-Z0-9_]* small_external_common +0+019c <[^>]*> lw \$a0,-32768\(\$at\) +[ ]*19c: [A-Z0-9_]*LO[A-Z0-9_]* small_external_common +0+01a0 <[^>]*> lw \$a1,-32764\(\$at\) +[ ]*1a0: [A-Z0-9_]*LO[A-Z0-9_]* small_external_common +0+01a4 <[^>]*> lui \$at,0x0 +[ ]*1a4: [A-Z0-9_]*HI[A-Z0-9_]* .bss.* +0+01a8 <[^>]*> lw \$a0,-32768\(\$at\) +[ ]*1a8: [A-Z0-9_]*LO[A-Z0-9_]* .bss.* +0+01ac <[^>]*> lw \$a1,-32764\(\$at\) +[ ]*1ac: [A-Z0-9_]*LO[A-Z0-9_]* .bss.* +0+01b0 <[^>]*> lui \$at,0x0 +[ ]*1b0: [A-Z0-9_]*HI[A-Z0-9_]* .sbss.* +0+01b4 <[^>]*> lw \$a0,-32768\(\$at\) +[ ]*1b4: [A-Z0-9_]*LO[A-Z0-9_]* .sbss.* +0+01b8 <[^>]*> lw \$a1,-32764\(\$at\) +[ ]*1b8: [A-Z0-9_]*LO[A-Z0-9_]* .sbss.* +0+01bc <[^>]*> lui \$at,0x1 +[ ]*1bc: [A-Z0-9_]*HI[A-Z0-9_]* .data.* +0+01c0 <[^>]*> lw \$a0,0\(\$at\) +[ ]*1c0: [A-Z0-9_]*LO[A-Z0-9_]* .data.* +0+01c4 <[^>]*> lw \$a1,4\(\$at\) +[ ]*1c4: [A-Z0-9_]*LO[A-Z0-9_]* .data.* +0+01c8 <[^>]*> lui \$at,0x1 +[ ]*1c8: [A-Z0-9_]*HI[A-Z0-9_]* big_external_data_label +0+01cc <[^>]*> lw \$a0,0\(\$at\) +[ ]*1cc: [A-Z0-9_]*LO[A-Z0-9_]* big_external_data_label +0+01d0 <[^>]*> lw \$a1,4\(\$at\) +[ ]*1d0: [A-Z0-9_]*LO[A-Z0-9_]* big_external_data_label +0+01d4 <[^>]*> lui \$at,0x1 +[ ]*1d4: [A-Z0-9_]*HI[A-Z0-9_]* small_external_data_label +0+01d8 <[^>]*> lw \$a0,0\(\$at\) +[ ]*1d8: [A-Z0-9_]*LO[A-Z0-9_]* small_external_data_label +0+01dc <[^>]*> lw \$a1,4\(\$at\) +[ ]*1dc: [A-Z0-9_]*LO[A-Z0-9_]* small_external_data_label +0+01e0 <[^>]*> lui \$at,0x1 +[ ]*1e0: [A-Z0-9_]*HI[A-Z0-9_]* big_external_common +0+01e4 <[^>]*> lw \$a0,0\(\$at\) +[ ]*1e4: [A-Z0-9_]*LO[A-Z0-9_]* big_external_common +0+01e8 <[^>]*> lw \$a1,4\(\$at\) +[ ]*1e8: [A-Z0-9_]*LO[A-Z0-9_]* big_external_common +0+01ec <[^>]*> lui \$at,0x1 +[ ]*1ec: [A-Z0-9_]*HI[A-Z0-9_]* small_external_common +0+01f0 <[^>]*> lw \$a0,0\(\$at\) +[ ]*1f0: [A-Z0-9_]*LO[A-Z0-9_]* small_external_common +0+01f4 <[^>]*> lw \$a1,4\(\$at\) +[ ]*1f4: [A-Z0-9_]*LO[A-Z0-9_]* small_external_common +0+01f8 <[^>]*> lui \$at,0x1 +[ ]*1f8: [A-Z0-9_]*HI[A-Z0-9_]* .bss.* +0+01fc <[^>]*> lw \$a0,0\(\$at\) +[ ]*1fc: [A-Z0-9_]*LO[A-Z0-9_]* .bss.* +0+0200 <[^>]*> lw \$a1,4\(\$at\) +[ ]*200: [A-Z0-9_]*LO[A-Z0-9_]* .bss.* +0+0204 <[^>]*> lui \$at,0x1 +[ ]*204: [A-Z0-9_]*HI[A-Z0-9_]* .sbss.* +0+0208 <[^>]*> lw \$a0,0\(\$at\) +[ ]*208: [A-Z0-9_]*LO[A-Z0-9_]* .sbss.* +0+020c <[^>]*> lw \$a1,4\(\$at\) +[ ]*20c: [A-Z0-9_]*LO[A-Z0-9_]* .sbss.* +0+0210 <[^>]*> lui \$at,0x2 +[ ]*210: [A-Z0-9_]*HI[A-Z0-9_]* .data.* +0+0214 <[^>]*> lw \$a0,-23131\(\$at\) +[ ]*214: [A-Z0-9_]*LO[A-Z0-9_]* .data.* +0+0218 <[^>]*> lw \$a1,-23127\(\$at\) +[ ]*218: [A-Z0-9_]*LO[A-Z0-9_]* .data.* +0+021c <[^>]*> lui \$at,0x2 +[ ]*21c: [A-Z0-9_]*HI[A-Z0-9_]* big_external_data_label +0+0220 <[^>]*> lw \$a0,-23131\(\$at\) +[ ]*220: [A-Z0-9_]*LO[A-Z0-9_]* big_external_data_label +0+0224 <[^>]*> lw \$a1,-23127\(\$at\) +[ ]*224: [A-Z0-9_]*LO[A-Z0-9_]* big_external_data_label +0+0228 <[^>]*> lui \$at,0x2 +[ ]*228: [A-Z0-9_]*HI[A-Z0-9_]* small_external_data_label +0+022c <[^>]*> lw \$a0,-23131\(\$at\) +[ ]*22c: [A-Z0-9_]*LO[A-Z0-9_]* small_external_data_label +0+0230 <[^>]*> lw \$a1,-23127\(\$at\) +[ ]*230: [A-Z0-9_]*LO[A-Z0-9_]* small_external_data_label +0+0234 <[^>]*> lui \$at,0x2 +[ ]*234: [A-Z0-9_]*HI[A-Z0-9_]* big_external_common +0+0238 <[^>]*> lw \$a0,-23131\(\$at\) +[ ]*238: [A-Z0-9_]*LO[A-Z0-9_]* big_external_common +0+023c <[^>]*> lw \$a1,-23127\(\$at\) +[ ]*23c: [A-Z0-9_]*LO[A-Z0-9_]* big_external_common +0+0240 <[^>]*> lui \$at,0x2 +[ ]*240: [A-Z0-9_]*HI[A-Z0-9_]* small_external_common +0+0244 <[^>]*> lw \$a0,-23131\(\$at\) +[ ]*244: [A-Z0-9_]*LO[A-Z0-9_]* small_external_common +0+0248 <[^>]*> lw \$a1,-23127\(\$at\) +[ ]*248: [A-Z0-9_]*LO[A-Z0-9_]* small_external_common +0+024c <[^>]*> lui \$at,0x2 +[ ]*24c: [A-Z0-9_]*HI[A-Z0-9_]* .bss.* +0+0250 <[^>]*> lw \$a0,-23131\(\$at\) +[ ]*250: [A-Z0-9_]*LO[A-Z0-9_]* .bss.* +0+0254 <[^>]*> lw \$a1,-23127\(\$at\) +[ ]*254: [A-Z0-9_]*LO[A-Z0-9_]* .bss.* +0+0258 <[^>]*> lui \$at,0x2 +[ ]*258: [A-Z0-9_]*HI[A-Z0-9_]* .sbss.* +0+025c <[^>]*> lw \$a0,-23131\(\$at\) +[ ]*25c: [A-Z0-9_]*LO[A-Z0-9_]* .sbss.* +0+0260 <[^>]*> lw \$a1,-23127\(\$at\) +[ ]*260: [A-Z0-9_]*LO[A-Z0-9_]* .sbss.* +0+0264 <[^>]*> lui \$at,0x0 +[ ]*264: [A-Z0-9_]*HI[A-Z0-9_]* .data.* +0+0268 <[^>]*> addu \$at,\$a1,\$at +0+026c <[^>]*> lw \$a0,0\(\$at\) +[ ]*26c: [A-Z0-9_]*LO[A-Z0-9_]* .data.* +0+0270 <[^>]*> lw \$a1,4\(\$at\) +[ ]*270: [A-Z0-9_]*LO[A-Z0-9_]* .data.* +0+0274 <[^>]*> lui \$at,0x0 +[ ]*274: [A-Z0-9_]*HI[A-Z0-9_]* big_external_data_label +0+0278 <[^>]*> addu \$at,\$a1,\$at +0+027c <[^>]*> lw \$a0,0\(\$at\) +[ ]*27c: [A-Z0-9_]*LO[A-Z0-9_]* big_external_data_label +0+0280 <[^>]*> lw \$a1,4\(\$at\) +[ ]*280: [A-Z0-9_]*LO[A-Z0-9_]* big_external_data_label +0+0284 <[^>]*> addu \$at,\$a1,\$gp +0+0288 <[^>]*> lw \$a0,0\(\$at\) +[ ]*288: [A-Z0-9_]*GPREL[A-Z0-9_]* small_external_data_label +0+028c <[^>]*> lw \$a1,4\(\$at\) +[ ]*28c: [A-Z0-9_]*GPREL[A-Z0-9_]* small_external_data_label +0+0290 <[^>]*> lui \$at,0x0 +[ ]*290: [A-Z0-9_]*HI[A-Z0-9_]* big_external_common +0+0294 <[^>]*> addu \$at,\$a1,\$at +0+0298 <[^>]*> lw \$a0,0\(\$at\) +[ ]*298: [A-Z0-9_]*LO[A-Z0-9_]* big_external_common +0+029c <[^>]*> lw \$a1,4\(\$at\) +[ ]*29c: [A-Z0-9_]*LO[A-Z0-9_]* big_external_common +0+02a0 <[^>]*> addu \$at,\$a1,\$gp +0+02a4 <[^>]*> lw \$a0,0\(\$at\) +[ ]*2a4: [A-Z0-9_]*GPREL[A-Z0-9_]* small_external_common +0+02a8 <[^>]*> lw \$a1,4\(\$at\) +[ ]*2a8: [A-Z0-9_]*GPREL[A-Z0-9_]* small_external_common +0+02ac <[^>]*> lui \$at,0x0 +[ ]*2ac: [A-Z0-9_]*HI[A-Z0-9_]* .bss.* +0+02b0 <[^>]*> addu \$at,\$a1,\$at +0+02b4 <[^>]*> lw \$a0,0\(\$at\) +[ ]*2b4: [A-Z0-9_]*LO[A-Z0-9_]* .bss.* +0+02b8 <[^>]*> lw \$a1,4\(\$at\) +[ ]*2b8: [A-Z0-9_]*LO[A-Z0-9_]* .bss.* +0+02bc <[^>]*> addu \$at,\$a1,\$gp +0+02c0 <[^>]*> lw \$a0,-16384\(\$at\) +[ ]*2c0: [A-Z0-9_]*GPREL[A-Z0-9_]* .sbss.* +0+02c4 <[^>]*> lw \$a1,-16380\(\$at\) +[ ]*2c4: [A-Z0-9_]*GPREL[A-Z0-9_]* .sbss.* +0+02c8 <[^>]*> lui \$at,0x0 +[ ]*2c8: [A-Z0-9_]*HI[A-Z0-9_]* .data.* +0+02cc <[^>]*> addu \$at,\$a1,\$at +0+02d0 <[^>]*> lw \$a0,1\(\$at\) +[ ]*2d0: [A-Z0-9_]*LO[A-Z0-9_]* .data.* +0+02d4 <[^>]*> lw \$a1,5\(\$at\) +[ ]*2d4: [A-Z0-9_]*LO[A-Z0-9_]* .data.* +0+02d8 <[^>]*> lui \$at,0x0 +[ ]*2d8: [A-Z0-9_]*HI[A-Z0-9_]* big_external_data_label +0+02dc <[^>]*> addu \$at,\$a1,\$at +0+02e0 <[^>]*> lw \$a0,1\(\$at\) +[ ]*2e0: [A-Z0-9_]*LO[A-Z0-9_]* big_external_data_label +0+02e4 <[^>]*> lw \$a1,5\(\$at\) +[ ]*2e4: [A-Z0-9_]*LO[A-Z0-9_]* big_external_data_label +0+02e8 <[^>]*> addu \$at,\$a1,\$gp +0+02ec <[^>]*> lw \$a0,1\(\$at\) +[ ]*2ec: [A-Z0-9_]*GPREL[A-Z0-9_]* small_external_data_label +0+02f0 <[^>]*> lw \$a1,5\(\$at\) +[ ]*2f0: [A-Z0-9_]*GPREL[A-Z0-9_]* small_external_data_label +0+02f4 <[^>]*> lui \$at,0x0 +[ ]*2f4: [A-Z0-9_]*HI[A-Z0-9_]* big_external_common +0+02f8 <[^>]*> addu \$at,\$a1,\$at +0+02fc <[^>]*> lw \$a0,1\(\$at\) +[ ]*2fc: [A-Z0-9_]*LO[A-Z0-9_]* big_external_common +0+0300 <[^>]*> lw \$a1,5\(\$at\) +[ ]*300: [A-Z0-9_]*LO[A-Z0-9_]* big_external_common +0+0304 <[^>]*> addu \$at,\$a1,\$gp +0+0308 <[^>]*> lw \$a0,1\(\$at\) +[ ]*308: [A-Z0-9_]*GPREL[A-Z0-9_]* small_external_common +0+030c <[^>]*> lw \$a1,5\(\$at\) +[ ]*30c: [A-Z0-9_]*GPREL[A-Z0-9_]* small_external_common +0+0310 <[^>]*> lui \$at,0x0 +[ ]*310: [A-Z0-9_]*HI[A-Z0-9_]* .bss.* +0+0314 <[^>]*> addu \$at,\$a1,\$at +0+0318 <[^>]*> lw \$a0,1\(\$at\) +[ ]*318: [A-Z0-9_]*LO[A-Z0-9_]* .bss.* +0+031c <[^>]*> lw \$a1,5\(\$at\) +[ ]*31c: [A-Z0-9_]*LO[A-Z0-9_]* .bss.* +0+0320 <[^>]*> addu \$at,\$a1,\$gp +0+0324 <[^>]*> lw \$a0,-16383\(\$at\) +[ ]*324: [A-Z0-9_]*GPREL[A-Z0-9_]* .sbss.* +0+0328 <[^>]*> lw \$a1,-16379\(\$at\) +[ ]*328: [A-Z0-9_]*GPREL[A-Z0-9_]* .sbss.* +0+032c <[^>]*> lui \$at,0x1 +[ ]*32c: [A-Z0-9_]*HI[A-Z0-9_]* .data.* +0+0330 <[^>]*> addu \$at,\$a1,\$at +0+0334 <[^>]*> lw \$a0,-32768\(\$at\) +[ ]*334: [A-Z0-9_]*LO[A-Z0-9_]* .data.* +0+0338 <[^>]*> lw \$a1,-32764\(\$at\) +[ ]*338: [A-Z0-9_]*LO[A-Z0-9_]* .data.* +0+033c <[^>]*> lui \$at,0x1 +[ ]*33c: [A-Z0-9_]*HI[A-Z0-9_]* big_external_data_label +0+0340 <[^>]*> addu \$at,\$a1,\$at +0+0344 <[^>]*> lw \$a0,-32768\(\$at\) +[ ]*344: [A-Z0-9_]*LO[A-Z0-9_]* big_external_data_label +0+0348 <[^>]*> lw \$a1,-32764\(\$at\) +[ ]*348: [A-Z0-9_]*LO[A-Z0-9_]* big_external_data_label +0+034c <[^>]*> lui \$at,0x1 +[ ]*34c: [A-Z0-9_]*HI[A-Z0-9_]* small_external_data_label +0+0350 <[^>]*> addu \$at,\$a1,\$at +0+0354 <[^>]*> lw \$a0,-32768\(\$at\) +[ ]*354: [A-Z0-9_]*LO[A-Z0-9_]* small_external_data_label +0+0358 <[^>]*> lw \$a1,-32764\(\$at\) +[ ]*358: [A-Z0-9_]*LO[A-Z0-9_]* small_external_data_label +0+035c <[^>]*> lui \$at,0x1 +[ ]*35c: [A-Z0-9_]*HI[A-Z0-9_]* big_external_common +0+0360 <[^>]*> addu \$at,\$a1,\$at +0+0364 <[^>]*> lw \$a0,-32768\(\$at\) +[ ]*364: [A-Z0-9_]*LO[A-Z0-9_]* big_external_common +0+0368 <[^>]*> lw \$a1,-32764\(\$at\) +[ ]*368: [A-Z0-9_]*LO[A-Z0-9_]* big_external_common +0+036c <[^>]*> lui \$at,0x1 +[ ]*36c: [A-Z0-9_]*HI[A-Z0-9_]* small_external_common +0+0370 <[^>]*> addu \$at,\$a1,\$at +0+0374 <[^>]*> lw \$a0,-32768\(\$at\) +[ ]*374: [A-Z0-9_]*LO[A-Z0-9_]* small_external_common +0+0378 <[^>]*> lw \$a1,-32764\(\$at\) +[ ]*378: [A-Z0-9_]*LO[A-Z0-9_]* small_external_common +0+037c <[^>]*> lui \$at,0x1 +[ ]*37c: [A-Z0-9_]*HI[A-Z0-9_]* .bss.* +0+0380 <[^>]*> addu \$at,\$a1,\$at +0+0384 <[^>]*> lw \$a0,-32768\(\$at\) +[ ]*384: [A-Z0-9_]*LO[A-Z0-9_]* .bss.* +0+0388 <[^>]*> lw \$a1,-32764\(\$at\) +[ ]*388: [A-Z0-9_]*LO[A-Z0-9_]* .bss.* +0+038c <[^>]*> lui \$at,0x1 +[ ]*38c: [A-Z0-9_]*HI[A-Z0-9_]* .sbss.* +0+0390 <[^>]*> addu \$at,\$a1,\$at +0+0394 <[^>]*> lw \$a0,-32768\(\$at\) +[ ]*394: [A-Z0-9_]*LO[A-Z0-9_]* .sbss.* +0+0398 <[^>]*> lw \$a1,-32764\(\$at\) +[ ]*398: [A-Z0-9_]*LO[A-Z0-9_]* .sbss.* +0+039c <[^>]*> lui \$at,0x0 +[ ]*39c: [A-Z0-9_]*HI[A-Z0-9_]* .data.* +0+03a0 <[^>]*> addu \$at,\$a1,\$at +0+03a4 <[^>]*> lw \$a0,-32768\(\$at\) +[ ]*3a4: [A-Z0-9_]*LO[A-Z0-9_]* .data.* +0+03a8 <[^>]*> lw \$a1,-32764\(\$at\) +[ ]*3a8: [A-Z0-9_]*LO[A-Z0-9_]* .data.* +0+03ac <[^>]*> lui \$at,0x0 +[ ]*3ac: [A-Z0-9_]*HI[A-Z0-9_]* big_external_data_label +0+03b0 <[^>]*> addu \$at,\$a1,\$at +0+03b4 <[^>]*> lw \$a0,-32768\(\$at\) +[ ]*3b4: [A-Z0-9_]*LO[A-Z0-9_]* big_external_data_label +0+03b8 <[^>]*> lw \$a1,-32764\(\$at\) +[ ]*3b8: [A-Z0-9_]*LO[A-Z0-9_]* big_external_data_label +0+03bc <[^>]*> lui \$at,0x0 +[ ]*3bc: [A-Z0-9_]*HI[A-Z0-9_]* small_external_data_label +0+03c0 <[^>]*> addu \$at,\$a1,\$at +0+03c4 <[^>]*> lw \$a0,-32768\(\$at\) +[ ]*3c4: [A-Z0-9_]*LO[A-Z0-9_]* small_external_data_label +0+03c8 <[^>]*> lw \$a1,-32764\(\$at\) +[ ]*3c8: [A-Z0-9_]*LO[A-Z0-9_]* small_external_data_label +0+03cc <[^>]*> lui \$at,0x0 +[ ]*3cc: [A-Z0-9_]*HI[A-Z0-9_]* big_external_common +0+03d0 <[^>]*> addu \$at,\$a1,\$at +0+03d4 <[^>]*> lw \$a0,-32768\(\$at\) +[ ]*3d4: [A-Z0-9_]*LO[A-Z0-9_]* big_external_common +0+03d8 <[^>]*> lw \$a1,-32764\(\$at\) +[ ]*3d8: [A-Z0-9_]*LO[A-Z0-9_]* big_external_common +0+03dc <[^>]*> lui \$at,0x0 +[ ]*3dc: [A-Z0-9_]*HI[A-Z0-9_]* small_external_common +0+03e0 <[^>]*> addu \$at,\$a1,\$at +0+03e4 <[^>]*> lw \$a0,-32768\(\$at\) +[ ]*3e4: [A-Z0-9_]*LO[A-Z0-9_]* small_external_common +0+03e8 <[^>]*> lw \$a1,-32764\(\$at\) +[ ]*3e8: [A-Z0-9_]*LO[A-Z0-9_]* small_external_common +0+03ec <[^>]*> lui \$at,0x0 +[ ]*3ec: [A-Z0-9_]*HI[A-Z0-9_]* .bss.* +0+03f0 <[^>]*> addu \$at,\$a1,\$at +0+03f4 <[^>]*> lw \$a0,-32768\(\$at\) +[ ]*3f4: [A-Z0-9_]*LO[A-Z0-9_]* .bss.* +0+03f8 <[^>]*> lw \$a1,-32764\(\$at\) +[ ]*3f8: [A-Z0-9_]*LO[A-Z0-9_]* .bss.* +0+03fc <[^>]*> lui \$at,0x0 +[ ]*3fc: [A-Z0-9_]*HI[A-Z0-9_]* .sbss.* +0+0400 <[^>]*> addu \$at,\$a1,\$at +0+0404 <[^>]*> lw \$a0,-32768\(\$at\) +[ ]*404: [A-Z0-9_]*LO[A-Z0-9_]* .sbss.* +0+0408 <[^>]*> lw \$a1,-32764\(\$at\) +[ ]*408: [A-Z0-9_]*LO[A-Z0-9_]* .sbss.* +0+040c <[^>]*> lui \$at,0x1 +[ ]*40c: [A-Z0-9_]*HI[A-Z0-9_]* .data.* +0+0410 <[^>]*> addu \$at,\$a1,\$at +0+0414 <[^>]*> lw \$a0,0\(\$at\) +[ ]*414: [A-Z0-9_]*LO[A-Z0-9_]* .data.* +0+0418 <[^>]*> lw \$a1,4\(\$at\) +[ ]*418: [A-Z0-9_]*LO[A-Z0-9_]* .data.* +0+041c <[^>]*> lui \$at,0x1 +[ ]*41c: [A-Z0-9_]*HI[A-Z0-9_]* big_external_data_label +0+0420 <[^>]*> addu \$at,\$a1,\$at +0+0424 <[^>]*> lw \$a0,0\(\$at\) +[ ]*424: [A-Z0-9_]*LO[A-Z0-9_]* big_external_data_label +0+0428 <[^>]*> lw \$a1,4\(\$at\) +[ ]*428: [A-Z0-9_]*LO[A-Z0-9_]* big_external_data_label +0+042c <[^>]*> lui \$at,0x1 +[ ]*42c: [A-Z0-9_]*HI[A-Z0-9_]* small_external_data_label +0+0430 <[^>]*> addu \$at,\$a1,\$at +0+0434 <[^>]*> lw \$a0,0\(\$at\) +[ ]*434: [A-Z0-9_]*LO[A-Z0-9_]* small_external_data_label +0+0438 <[^>]*> lw \$a1,4\(\$at\) +[ ]*438: [A-Z0-9_]*LO[A-Z0-9_]* small_external_data_label +0+043c <[^>]*> lui \$at,0x1 +[ ]*43c: [A-Z0-9_]*HI[A-Z0-9_]* big_external_common +0+0440 <[^>]*> addu \$at,\$a1,\$at +0+0444 <[^>]*> lw \$a0,0\(\$at\) +[ ]*444: [A-Z0-9_]*LO[A-Z0-9_]* big_external_common +0+0448 <[^>]*> lw \$a1,4\(\$at\) +[ ]*448: [A-Z0-9_]*LO[A-Z0-9_]* big_external_common +0+044c <[^>]*> lui \$at,0x1 +[ ]*44c: [A-Z0-9_]*HI[A-Z0-9_]* small_external_common +0+0450 <[^>]*> addu \$at,\$a1,\$at +0+0454 <[^>]*> lw \$a0,0\(\$at\) +[ ]*454: [A-Z0-9_]*LO[A-Z0-9_]* small_external_common +0+0458 <[^>]*> lw \$a1,4\(\$at\) +[ ]*458: [A-Z0-9_]*LO[A-Z0-9_]* small_external_common +0+045c <[^>]*> lui \$at,0x1 +[ ]*45c: [A-Z0-9_]*HI[A-Z0-9_]* .bss.* +0+0460 <[^>]*> addu \$at,\$a1,\$at +0+0464 <[^>]*> lw \$a0,0\(\$at\) +[ ]*464: [A-Z0-9_]*LO[A-Z0-9_]* .bss.* +0+0468 <[^>]*> lw \$a1,4\(\$at\) +[ ]*468: [A-Z0-9_]*LO[A-Z0-9_]* .bss.* +0+046c <[^>]*> lui \$at,0x1 +[ ]*46c: [A-Z0-9_]*HI[A-Z0-9_]* .sbss.* +0+0470 <[^>]*> addu \$at,\$a1,\$at +0+0474 <[^>]*> lw \$a0,0\(\$at\) +[ ]*474: [A-Z0-9_]*LO[A-Z0-9_]* .sbss.* +0+0478 <[^>]*> lw \$a1,4\(\$at\) +[ ]*478: [A-Z0-9_]*LO[A-Z0-9_]* .sbss.* +0+047c <[^>]*> lui \$at,0x2 +[ ]*47c: [A-Z0-9_]*HI[A-Z0-9_]* .data.* +0+0480 <[^>]*> addu \$at,\$a1,\$at +0+0484 <[^>]*> lw \$a0,-23131\(\$at\) +[ ]*484: [A-Z0-9_]*LO[A-Z0-9_]* .data.* +0+0488 <[^>]*> lw \$a1,-23127\(\$at\) +[ ]*488: [A-Z0-9_]*LO[A-Z0-9_]* .data.* +0+048c <[^>]*> lui \$at,0x2 +[ ]*48c: [A-Z0-9_]*HI[A-Z0-9_]* big_external_data_label +0+0490 <[^>]*> addu \$at,\$a1,\$at +0+0494 <[^>]*> lw \$a0,-23131\(\$at\) +[ ]*494: [A-Z0-9_]*LO[A-Z0-9_]* big_external_data_label +0+0498 <[^>]*> lw \$a1,-23127\(\$at\) +[ ]*498: [A-Z0-9_]*LO[A-Z0-9_]* big_external_data_label +0+049c <[^>]*> lui \$at,0x2 +[ ]*49c: [A-Z0-9_]*HI[A-Z0-9_]* small_external_data_label +0+04a0 <[^>]*> addu \$at,\$a1,\$at +0+04a4 <[^>]*> lw \$a0,-23131\(\$at\) +[ ]*4a4: [A-Z0-9_]*LO[A-Z0-9_]* small_external_data_label +0+04a8 <[^>]*> lw \$a1,-23127\(\$at\) +[ ]*4a8: [A-Z0-9_]*LO[A-Z0-9_]* small_external_data_label +0+04ac <[^>]*> lui \$at,0x2 +[ ]*4ac: [A-Z0-9_]*HI[A-Z0-9_]* big_external_common +0+04b0 <[^>]*> addu \$at,\$a1,\$at +0+04b4 <[^>]*> lw \$a0,-23131\(\$at\) +[ ]*4b4: [A-Z0-9_]*LO[A-Z0-9_]* big_external_common +0+04b8 <[^>]*> lw \$a1,-23127\(\$at\) +[ ]*4b8: [A-Z0-9_]*LO[A-Z0-9_]* big_external_common +0+04bc <[^>]*> lui \$at,0x2 +[ ]*4bc: [A-Z0-9_]*HI[A-Z0-9_]* small_external_common +0+04c0 <[^>]*> addu \$at,\$a1,\$at +0+04c4 <[^>]*> lw \$a0,-23131\(\$at\) +[ ]*4c4: [A-Z0-9_]*LO[A-Z0-9_]* small_external_common +0+04c8 <[^>]*> lw \$a1,-23127\(\$at\) +[ ]*4c8: [A-Z0-9_]*LO[A-Z0-9_]* small_external_common +0+04cc <[^>]*> lui \$at,0x2 +[ ]*4cc: [A-Z0-9_]*HI[A-Z0-9_]* .bss.* +0+04d0 <[^>]*> addu \$at,\$a1,\$at +0+04d4 <[^>]*> lw \$a0,-23131\(\$at\) +[ ]*4d4: [A-Z0-9_]*LO[A-Z0-9_]* .bss.* +0+04d8 <[^>]*> lw \$a1,-23127\(\$at\) +[ ]*4d8: [A-Z0-9_]*LO[A-Z0-9_]* .bss.* +0+04dc <[^>]*> lui \$at,0x2 +[ ]*4dc: [A-Z0-9_]*HI[A-Z0-9_]* .sbss.* +0+04e0 <[^>]*> addu \$at,\$a1,\$at +0+04e4 <[^>]*> lw \$a0,-23131\(\$at\) +[ ]*4e4: [A-Z0-9_]*LO[A-Z0-9_]* .sbss.* +0+04e8 <[^>]*> lw \$a1,-23127\(\$at\) +[ ]*4e8: [A-Z0-9_]*LO[A-Z0-9_]* .sbss.* +0+04ec <[^>]*> lwc1 \$f5,0\(\$zero\) +0+04f0 <[^>]*> lwc1 \$f4,4\(\$zero\) +0+04f4 <[^>]*> lwc1 \$f5,1\(\$zero\) +0+04f8 <[^>]*> lwc1 \$f4,5\(\$zero\) +0+04fc <[^>]*> lui \$at,0x1 +0+0500 <[^>]*> lwc1 \$f5,-32768\(\$at\) +0+0504 <[^>]*> lwc1 \$f4,-32764\(\$at\) +0+0508 <[^>]*> lwc1 \$f5,-32768\(\$zero\) +0+050c <[^>]*> lwc1 \$f4,-32764\(\$zero\) +0+0510 <[^>]*> lwc1 \$f5,0\(\$a1\) +0+0514 <[^>]*> lwc1 \$f4,4\(\$a1\) +0+0518 <[^>]*> lwc1 \$f5,1\(\$a1\) +0+051c <[^>]*> lwc1 \$f4,5\(\$a1\) +0+0520 <[^>]*> lui \$at,0x1 +0+0524 <[^>]*> addu \$at,\$a1,\$at +0+0528 <[^>]*> lwc1 \$f5,-32768\(\$at\) +0+052c <[^>]*> lwc1 \$f4,-32764\(\$at\) +0+0530 <[^>]*> lwc1 \$f5,-32768\(\$a1\) +0+0534 <[^>]*> lwc1 \$f4,-32764\(\$a1\) +0+0538 <[^>]*> lui \$at,0x2 +[ ]*538: [A-Z0-9_]*HI[A-Z0-9_]* small_external_common +0+053c <[^>]*> addu \$at,\$a1,\$at +0+0540 <[^>]*> lwc1 \$f5,-23131\(\$at\) +[ ]*540: [A-Z0-9_]*LO[A-Z0-9_]* small_external_common +0+0544 <[^>]*> lwc1 \$f4,-23127\(\$at\) +[ ]*544: [A-Z0-9_]*LO[A-Z0-9_]* small_external_common +0+0548 <[^>]*> nop +0+054c <[^>]*> swc1 \$f5,0\(\$zero\) +0+0550 <[^>]*> swc1 \$f4,4\(\$zero\) +0+0554 <[^>]*> swc1 \$f5,1\(\$zero\) +0+0558 <[^>]*> swc1 \$f4,5\(\$zero\) +0+055c <[^>]*> lui \$at,0x1 +0+0560 <[^>]*> swc1 \$f5,-32768\(\$at\) +0+0564 <[^>]*> swc1 \$f4,-32764\(\$at\) +0+0568 <[^>]*> swc1 \$f5,-32768\(\$zero\) +0+056c <[^>]*> swc1 \$f4,-32764\(\$zero\) +0+0570 <[^>]*> swc1 \$f5,0\(\$a1\) +0+0574 <[^>]*> swc1 \$f4,4\(\$a1\) +0+0578 <[^>]*> swc1 \$f5,1\(\$a1\) +0+057c <[^>]*> swc1 \$f4,5\(\$a1\) +0+0580 <[^>]*> lui \$at,0x1 +0+0584 <[^>]*> addu \$at,\$a1,\$at +0+0588 <[^>]*> swc1 \$f5,-32768\(\$at\) +0+058c <[^>]*> swc1 \$f4,-32764\(\$at\) +0+0590 <[^>]*> swc1 \$f5,-32768\(\$a1\) +0+0594 <[^>]*> swc1 \$f4,-32764\(\$a1\) +0+0598 <[^>]*> lui \$at,0x2 +[ ]*598: [A-Z0-9_]*HI[A-Z0-9_]* big_external_common +0+059c <[^>]*> addu \$at,\$a1,\$at +0+05a0 <[^>]*> swc1 \$f5,-23131\(\$at\) +[ ]*5a0: [A-Z0-9_]*LO[A-Z0-9_]* big_external_common +0+05a4 <[^>]*> swc1 \$f4,-23127\(\$at\) +[ ]*5a4: [A-Z0-9_]*LO[A-Z0-9_]* big_external_common +0+05a8 <[^>]*> sw \$a0,0\(\$zero\) +0+05ac <[^>]*> sw \$a1,4\(\$zero\) +0+05b0 <[^>]*> lui \$a0,0x2 +[ ]*5b0: [A-Z0-9_]*HI[A-Z0-9_]* .bss.* +0+05b4 <[^>]*> addu \$a0,\$a0,\$a1 +0+05b8 <[^>]*> ld \$a0,-23131\(\$a0\) +[ ]*5b8: [A-Z0-9_]*LO[A-Z0-9_]* .bss.* +0+05bc <[^>]*> lui \$at,0x2 +[ ]*5bc: [A-Z0-9_]*HI[A-Z0-9_]* .sbss.* +0+05c0 <[^>]*> addu \$at,\$at,\$a1 +0+05c4 <[^>]*> sd \$a0,-23131\(\$at\) +[ ]*5c4: [A-Z0-9_]*LO[A-Z0-9_]* .sbss.* +0+05c8 <[^>]*> nop + diff --git a/gas/testsuite/gas/mips/ld-ilocks.d b/gas/testsuite/gas/mips/ld-ilocks.d new file mode 100644 index 0000000..eab2bdc --- /dev/null +++ b/gas/testsuite/gas/mips/ld-ilocks.d @@ -0,0 +1,631 @@ +#objdump: -dr --prefix-addresses +#name: MIPS ld-ilocks +#source: ld.s +#as: +# Test the ld macro. + +.*: +file format .*mips.* + +Disassembly of section .text: +0+0000 <.text> lw \$a0,0\(\$zero\) +0+0004 <[^>]*> lw \$a1,4\(\$zero\) +0+0008 <[^>]*> lw \$a0,1\(\$zero\) +0+000c <[^>]*> lw \$a1,5\(\$zero\) +0+0010 <[^>]*> lui \$at,0x1 +0+0014 <[^>]*> lw \$a0,-32768\(\$at\) +0+0018 <[^>]*> lw \$a1,-32764\(\$at\) +0+001c <[^>]*> lw \$a0,-32768\(\$zero\) +0+0020 <[^>]*> lw \$a1,-32764\(\$zero\) +0+0024 <[^>]*> lui \$at,0x1 +0+0028 <[^>]*> lw \$a0,0\(\$at\) +0+002c <[^>]*> lw \$a1,4\(\$at\) +0+0030 <[^>]*> lui \$at,0x2 +0+0034 <[^>]*> lw \$a0,-23131\(\$at\) +0+0038 <[^>]*> lw \$a1,-23127\(\$at\) +0+003c <[^>]*> lw \$a0,0\(\$a1\) +0+0040 <[^>]*> lw \$a1,4\(\$a1\) +0+0044 <[^>]*> lw \$a0,1\(\$a1\) +0+0048 <[^>]*> lw \$a1,5\(\$a1\) +0+004c <[^>]*> lui \$at,0x1 +0+0050 <[^>]*> addu \$at,\$a1,\$at +0+0054 <[^>]*> lw \$a0,-32768\(\$at\) +0+0058 <[^>]*> lw \$a1,-32764\(\$at\) +0+005c <[^>]*> lw \$a0,-32768\(\$a1\) +0+0060 <[^>]*> lw \$a1,-32764\(\$a1\) +0+0064 <[^>]*> lui \$at,0x1 +0+0068 <[^>]*> addu \$at,\$a1,\$at +0+006c <[^>]*> lw \$a0,0\(\$at\) +0+0070 <[^>]*> lw \$a1,4\(\$at\) +0+0074 <[^>]*> lui \$at,0x2 +0+0078 <[^>]*> addu \$at,\$a1,\$at +0+007c <[^>]*> lw \$a0,-23131\(\$at\) +0+0080 <[^>]*> lw \$a1,-23127\(\$at\) +0+0084 <[^>]*> lui \$at,0x0 +[ ]*84: [A-Z0-9_]*HI[A-Z0-9_]* .data.* +0+0088 <[^>]*> lw \$a0,0\(\$at\) +[ ]*88: [A-Z0-9_]*LO[A-Z0-9_]* .data.* +0+008c <[^>]*> lw \$a1,4\(\$at\) +[ ]*8c: [A-Z0-9_]*LO[A-Z0-9_]* .data.* +0+0090 <[^>]*> lui \$at,0x0 +[ ]*90: [A-Z0-9_]*HI[A-Z0-9_]* big_external_data_label +0+0094 <[^>]*> lw \$a0,0\(\$at\) +[ ]*94: [A-Z0-9_]*LO[A-Z0-9_]* big_external_data_label +0+0098 <[^>]*> lw \$a1,4\(\$at\) +[ ]*98: [A-Z0-9_]*LO[A-Z0-9_]* big_external_data_label +0+009c <[^>]*> lw \$a0,0\(\$gp\) +[ ]*9c: [A-Z0-9_]*GPREL[A-Z0-9_]* small_external_data_label +0+00a0 <[^>]*> lw \$a1,4\(\$gp\) +[ ]*a0: [A-Z0-9_]*GPREL[A-Z0-9_]* small_external_data_label +0+00a4 <[^>]*> lui \$at,0x0 +[ ]*a4: [A-Z0-9_]*HI[A-Z0-9_]* big_external_common +0+00a8 <[^>]*> lw \$a0,0\(\$at\) +[ ]*a8: [A-Z0-9_]*LO[A-Z0-9_]* big_external_common +0+00ac <[^>]*> lw \$a1,4\(\$at\) +[ ]*ac: [A-Z0-9_]*LO[A-Z0-9_]* big_external_common +0+00b0 <[^>]*> lw \$a0,0\(\$gp\) +[ ]*b0: [A-Z0-9_]*GPREL[A-Z0-9_]* small_external_common +0+00b4 <[^>]*> lw \$a1,4\(\$gp\) +[ ]*b4: [A-Z0-9_]*GPREL[A-Z0-9_]* small_external_common +0+00b8 <[^>]*> lui \$at,0x0 +[ ]*b8: [A-Z0-9_]*HI[A-Z0-9_]* .bss.* +0+00bc <[^>]*> lw \$a0,0\(\$at\) +[ ]*bc: [A-Z0-9_]*LO[A-Z0-9_]* .bss.* +0+00c0 <[^>]*> lw \$a1,4\(\$at\) +[ ]*c0: [A-Z0-9_]*LO[A-Z0-9_]* .bss.* +0+00c4 <[^>]*> lw \$a0,-16384\(\$gp\) +[ ]*c4: [A-Z0-9_]*GPREL[A-Z0-9_]* .sbss.* +0+00c8 <[^>]*> lw \$a1,-16380\(\$gp\) +[ ]*c8: [A-Z0-9_]*GPREL[A-Z0-9_]* .sbss.* +0+00cc <[^>]*> lui \$at,0x0 +[ ]*cc: [A-Z0-9_]*HI[A-Z0-9_]* .data.* +0+00d0 <[^>]*> lw \$a0,1\(\$at\) +[ ]*d0: [A-Z0-9_]*LO[A-Z0-9_]* .data.* +0+00d4 <[^>]*> lw \$a1,5\(\$at\) +[ ]*d4: [A-Z0-9_]*LO[A-Z0-9_]* .data.* +0+00d8 <[^>]*> lui \$at,0x0 +[ ]*d8: [A-Z0-9_]*HI[A-Z0-9_]* big_external_data_label +0+00dc <[^>]*> lw \$a0,1\(\$at\) +[ ]*dc: [A-Z0-9_]*LO[A-Z0-9_]* big_external_data_label +0+00e0 <[^>]*> lw \$a1,5\(\$at\) +[ ]*e0: [A-Z0-9_]*LO[A-Z0-9_]* big_external_data_label +0+00e4 <[^>]*> lw \$a0,1\(\$gp\) +[ ]*e4: [A-Z0-9_]*GPREL[A-Z0-9_]* small_external_data_label +0+00e8 <[^>]*> lw \$a1,5\(\$gp\) +[ ]*e8: [A-Z0-9_]*GPREL[A-Z0-9_]* small_external_data_label +0+00ec <[^>]*> lui \$at,0x0 +[ ]*ec: [A-Z0-9_]*HI[A-Z0-9_]* big_external_common +0+00f0 <[^>]*> lw \$a0,1\(\$at\) +[ ]*f0: [A-Z0-9_]*LO[A-Z0-9_]* big_external_common +0+00f4 <[^>]*> lw \$a1,5\(\$at\) +[ ]*f4: [A-Z0-9_]*LO[A-Z0-9_]* big_external_common +0+00f8 <[^>]*> lw \$a0,1\(\$gp\) +[ ]*f8: [A-Z0-9_]*GPREL[A-Z0-9_]* small_external_common +0+00fc <[^>]*> lw \$a1,5\(\$gp\) +[ ]*fc: [A-Z0-9_]*GPREL[A-Z0-9_]* small_external_common +0+0100 <[^>]*> lui \$at,0x0 +[ ]*100: [A-Z0-9_]*HI[A-Z0-9_]* .bss.* +0+0104 <[^>]*> lw \$a0,1\(\$at\) +[ ]*104: [A-Z0-9_]*LO[A-Z0-9_]* .bss.* +0+0108 <[^>]*> lw \$a1,5\(\$at\) +[ ]*108: [A-Z0-9_]*LO[A-Z0-9_]* .bss.* +0+010c <[^>]*> lw \$a0,-16383\(\$gp\) +[ ]*10c: [A-Z0-9_]*GPREL[A-Z0-9_]* .sbss.* +0+0110 <[^>]*> lw \$a1,-16379\(\$gp\) +[ ]*110: [A-Z0-9_]*GPREL[A-Z0-9_]* .sbss.* +0+0114 <[^>]*> lui \$at,0x1 +[ ]*114: [A-Z0-9_]*HI[A-Z0-9_]* .data.* +0+0118 <[^>]*> lw \$a0,-32768\(\$at\) +[ ]*118: [A-Z0-9_]*LO[A-Z0-9_]* .data.* +0+011c <[^>]*> lw \$a1,-32764\(\$at\) +[ ]*11c: [A-Z0-9_]*LO[A-Z0-9_]* .data.* +0+0120 <[^>]*> lui \$at,0x1 +[ ]*120: [A-Z0-9_]*HI[A-Z0-9_]* big_external_data_label +0+0124 <[^>]*> lw \$a0,-32768\(\$at\) +[ ]*124: [A-Z0-9_]*LO[A-Z0-9_]* big_external_data_label +0+0128 <[^>]*> lw \$a1,-32764\(\$at\) +[ ]*128: [A-Z0-9_]*LO[A-Z0-9_]* big_external_data_label +0+012c <[^>]*> lui \$at,0x1 +[ ]*12c: [A-Z0-9_]*HI[A-Z0-9_]* small_external_data_label +0+0130 <[^>]*> lw \$a0,-32768\(\$at\) +[ ]*130: [A-Z0-9_]*LO[A-Z0-9_]* small_external_data_label +0+0134 <[^>]*> lw \$a1,-32764\(\$at\) +[ ]*134: [A-Z0-9_]*LO[A-Z0-9_]* small_external_data_label +0+0138 <[^>]*> lui \$at,0x1 +[ ]*138: [A-Z0-9_]*HI[A-Z0-9_]* big_external_common +0+013c <[^>]*> lw \$a0,-32768\(\$at\) +[ ]*13c: [A-Z0-9_]*LO[A-Z0-9_]* big_external_common +0+0140 <[^>]*> lw \$a1,-32764\(\$at\) +[ ]*140: [A-Z0-9_]*LO[A-Z0-9_]* big_external_common +0+0144 <[^>]*> lui \$at,0x1 +[ ]*144: [A-Z0-9_]*HI[A-Z0-9_]* small_external_common +0+0148 <[^>]*> lw \$a0,-32768\(\$at\) +[ ]*148: [A-Z0-9_]*LO[A-Z0-9_]* small_external_common +0+014c <[^>]*> lw \$a1,-32764\(\$at\) +[ ]*14c: [A-Z0-9_]*LO[A-Z0-9_]* small_external_common +0+0150 <[^>]*> lui \$at,0x1 +[ ]*150: [A-Z0-9_]*HI[A-Z0-9_]* .bss.* +0+0154 <[^>]*> lw \$a0,-32768\(\$at\) +[ ]*154: [A-Z0-9_]*LO[A-Z0-9_]* .bss.* +0+0158 <[^>]*> lw \$a1,-32764\(\$at\) +[ ]*158: [A-Z0-9_]*LO[A-Z0-9_]* .bss.* +0+015c <[^>]*> lui \$at,0x1 +[ ]*15c: [A-Z0-9_]*HI[A-Z0-9_]* .sbss.* +0+0160 <[^>]*> lw \$a0,-32768\(\$at\) +[ ]*160: [A-Z0-9_]*LO[A-Z0-9_]* .sbss.* +0+0164 <[^>]*> lw \$a1,-32764\(\$at\) +[ ]*164: [A-Z0-9_]*LO[A-Z0-9_]* .sbss.* +0+0168 <[^>]*> lui \$at,0x0 +[ ]*168: [A-Z0-9_]*HI[A-Z0-9_]* .data.* +0+016c <[^>]*> lw \$a0,-32768\(\$at\) +[ ]*16c: [A-Z0-9_]*LO[A-Z0-9_]* .data.* +0+0170 <[^>]*> lw \$a1,-32764\(\$at\) +[ ]*170: [A-Z0-9_]*LO[A-Z0-9_]* .data.* +0+0174 <[^>]*> lui \$at,0x0 +[ ]*174: [A-Z0-9_]*HI[A-Z0-9_]* big_external_data_label +0+0178 <[^>]*> lw \$a0,-32768\(\$at\) +[ ]*178: [A-Z0-9_]*LO[A-Z0-9_]* big_external_data_label +0+017c <[^>]*> lw \$a1,-32764\(\$at\) +[ ]*17c: [A-Z0-9_]*LO[A-Z0-9_]* big_external_data_label +0+0180 <[^>]*> lui \$at,0x0 +[ ]*180: [A-Z0-9_]*HI[A-Z0-9_]* small_external_data_label +0+0184 <[^>]*> lw \$a0,-32768\(\$at\) +[ ]*184: [A-Z0-9_]*LO[A-Z0-9_]* small_external_data_label +0+0188 <[^>]*> lw \$a1,-32764\(\$at\) +[ ]*188: [A-Z0-9_]*LO[A-Z0-9_]* small_external_data_label +0+018c <[^>]*> lui \$at,0x0 +[ ]*18c: [A-Z0-9_]*HI[A-Z0-9_]* big_external_common +0+0190 <[^>]*> lw \$a0,-32768\(\$at\) +[ ]*190: [A-Z0-9_]*LO[A-Z0-9_]* big_external_common +0+0194 <[^>]*> lw \$a1,-32764\(\$at\) +[ ]*194: [A-Z0-9_]*LO[A-Z0-9_]* big_external_common +0+0198 <[^>]*> lui \$at,0x0 +[ ]*198: [A-Z0-9_]*HI[A-Z0-9_]* small_external_common +0+019c <[^>]*> lw \$a0,-32768\(\$at\) +[ ]*19c: [A-Z0-9_]*LO[A-Z0-9_]* small_external_common +0+01a0 <[^>]*> lw \$a1,-32764\(\$at\) +[ ]*1a0: [A-Z0-9_]*LO[A-Z0-9_]* small_external_common +0+01a4 <[^>]*> lui \$at,0x0 +[ ]*1a4: [A-Z0-9_]*HI[A-Z0-9_]* .bss.* +0+01a8 <[^>]*> lw \$a0,-32768\(\$at\) +[ ]*1a8: [A-Z0-9_]*LO[A-Z0-9_]* .bss.* +0+01ac <[^>]*> lw \$a1,-32764\(\$at\) +[ ]*1ac: [A-Z0-9_]*LO[A-Z0-9_]* .bss.* +0+01b0 <[^>]*> lui \$at,0x0 +[ ]*1b0: [A-Z0-9_]*HI[A-Z0-9_]* .sbss.* +0+01b4 <[^>]*> lw \$a0,-32768\(\$at\) +[ ]*1b4: [A-Z0-9_]*LO[A-Z0-9_]* .sbss.* +0+01b8 <[^>]*> lw \$a1,-32764\(\$at\) +[ ]*1b8: [A-Z0-9_]*LO[A-Z0-9_]* .sbss.* +0+01bc <[^>]*> lui \$at,0x1 +[ ]*1bc: [A-Z0-9_]*HI[A-Z0-9_]* .data.* +0+01c0 <[^>]*> lw \$a0,0\(\$at\) +[ ]*1c0: [A-Z0-9_]*LO[A-Z0-9_]* .data.* +0+01c4 <[^>]*> lw \$a1,4\(\$at\) +[ ]*1c4: [A-Z0-9_]*LO[A-Z0-9_]* .data.* +0+01c8 <[^>]*> lui \$at,0x1 +[ ]*1c8: [A-Z0-9_]*HI[A-Z0-9_]* big_external_data_label +0+01cc <[^>]*> lw \$a0,0\(\$at\) +[ ]*1cc: [A-Z0-9_]*LO[A-Z0-9_]* big_external_data_label +0+01d0 <[^>]*> lw \$a1,4\(\$at\) +[ ]*1d0: [A-Z0-9_]*LO[A-Z0-9_]* big_external_data_label +0+01d4 <[^>]*> lui \$at,0x1 +[ ]*1d4: [A-Z0-9_]*HI[A-Z0-9_]* small_external_data_label +0+01d8 <[^>]*> lw \$a0,0\(\$at\) +[ ]*1d8: [A-Z0-9_]*LO[A-Z0-9_]* small_external_data_label +0+01dc <[^>]*> lw \$a1,4\(\$at\) +[ ]*1dc: [A-Z0-9_]*LO[A-Z0-9_]* small_external_data_label +0+01e0 <[^>]*> lui \$at,0x1 +[ ]*1e0: [A-Z0-9_]*HI[A-Z0-9_]* big_external_common +0+01e4 <[^>]*> lw \$a0,0\(\$at\) +[ ]*1e4: [A-Z0-9_]*LO[A-Z0-9_]* big_external_common +0+01e8 <[^>]*> lw \$a1,4\(\$at\) +[ ]*1e8: [A-Z0-9_]*LO[A-Z0-9_]* big_external_common +0+01ec <[^>]*> lui \$at,0x1 +[ ]*1ec: [A-Z0-9_]*HI[A-Z0-9_]* small_external_common +0+01f0 <[^>]*> lw \$a0,0\(\$at\) +[ ]*1f0: [A-Z0-9_]*LO[A-Z0-9_]* small_external_common +0+01f4 <[^>]*> lw \$a1,4\(\$at\) +[ ]*1f4: [A-Z0-9_]*LO[A-Z0-9_]* small_external_common +0+01f8 <[^>]*> lui \$at,0x1 +[ ]*1f8: [A-Z0-9_]*HI[A-Z0-9_]* .bss.* +0+01fc <[^>]*> lw \$a0,0\(\$at\) +[ ]*1fc: [A-Z0-9_]*LO[A-Z0-9_]* .bss.* +0+0200 <[^>]*> lw \$a1,4\(\$at\) +[ ]*200: [A-Z0-9_]*LO[A-Z0-9_]* .bss.* +0+0204 <[^>]*> lui \$at,0x1 +[ ]*204: [A-Z0-9_]*HI[A-Z0-9_]* .sbss.* +0+0208 <[^>]*> lw \$a0,0\(\$at\) +[ ]*208: [A-Z0-9_]*LO[A-Z0-9_]* .sbss.* +0+020c <[^>]*> lw \$a1,4\(\$at\) +[ ]*20c: [A-Z0-9_]*LO[A-Z0-9_]* .sbss.* +0+0210 <[^>]*> lui \$at,0x2 +[ ]*210: [A-Z0-9_]*HI[A-Z0-9_]* .data.* +0+0214 <[^>]*> lw \$a0,-23131\(\$at\) +[ ]*214: [A-Z0-9_]*LO[A-Z0-9_]* .data.* +0+0218 <[^>]*> lw \$a1,-23127\(\$at\) +[ ]*218: [A-Z0-9_]*LO[A-Z0-9_]* .data.* +0+021c <[^>]*> lui \$at,0x2 +[ ]*21c: [A-Z0-9_]*HI[A-Z0-9_]* big_external_data_label +0+0220 <[^>]*> lw \$a0,-23131\(\$at\) +[ ]*220: [A-Z0-9_]*LO[A-Z0-9_]* big_external_data_label +0+0224 <[^>]*> lw \$a1,-23127\(\$at\) +[ ]*224: [A-Z0-9_]*LO[A-Z0-9_]* big_external_data_label +0+0228 <[^>]*> lui \$at,0x2 +[ ]*228: [A-Z0-9_]*HI[A-Z0-9_]* small_external_data_label +0+022c <[^>]*> lw \$a0,-23131\(\$at\) +[ ]*22c: [A-Z0-9_]*LO[A-Z0-9_]* small_external_data_label +0+0230 <[^>]*> lw \$a1,-23127\(\$at\) +[ ]*230: [A-Z0-9_]*LO[A-Z0-9_]* small_external_data_label +0+0234 <[^>]*> lui \$at,0x2 +[ ]*234: [A-Z0-9_]*HI[A-Z0-9_]* big_external_common +0+0238 <[^>]*> lw \$a0,-23131\(\$at\) +[ ]*238: [A-Z0-9_]*LO[A-Z0-9_]* big_external_common +0+023c <[^>]*> lw \$a1,-23127\(\$at\) +[ ]*23c: [A-Z0-9_]*LO[A-Z0-9_]* big_external_common +0+0240 <[^>]*> lui \$at,0x2 +[ ]*240: [A-Z0-9_]*HI[A-Z0-9_]* small_external_common +0+0244 <[^>]*> lw \$a0,-23131\(\$at\) +[ ]*244: [A-Z0-9_]*LO[A-Z0-9_]* small_external_common +0+0248 <[^>]*> lw \$a1,-23127\(\$at\) +[ ]*248: [A-Z0-9_]*LO[A-Z0-9_]* small_external_common +0+024c <[^>]*> lui \$at,0x2 +[ ]*24c: [A-Z0-9_]*HI[A-Z0-9_]* .bss.* +0+0250 <[^>]*> lw \$a0,-23131\(\$at\) +[ ]*250: [A-Z0-9_]*LO[A-Z0-9_]* .bss.* +0+0254 <[^>]*> lw \$a1,-23127\(\$at\) +[ ]*254: [A-Z0-9_]*LO[A-Z0-9_]* .bss.* +0+0258 <[^>]*> lui \$at,0x2 +[ ]*258: [A-Z0-9_]*HI[A-Z0-9_]* .sbss.* +0+025c <[^>]*> lw \$a0,-23131\(\$at\) +[ ]*25c: [A-Z0-9_]*LO[A-Z0-9_]* .sbss.* +0+0260 <[^>]*> lw \$a1,-23127\(\$at\) +[ ]*260: [A-Z0-9_]*LO[A-Z0-9_]* .sbss.* +0+0264 <[^>]*> lui \$at,0x0 +[ ]*264: [A-Z0-9_]*HI[A-Z0-9_]* .data.* +0+0268 <[^>]*> addu \$at,\$a1,\$at +0+026c <[^>]*> lw \$a0,0\(\$at\) +[ ]*26c: [A-Z0-9_]*LO[A-Z0-9_]* .data.* +0+0270 <[^>]*> lw \$a1,4\(\$at\) +[ ]*270: [A-Z0-9_]*LO[A-Z0-9_]* .data.* +0+0274 <[^>]*> lui \$at,0x0 +[ ]*274: [A-Z0-9_]*HI[A-Z0-9_]* big_external_data_label +0+0278 <[^>]*> addu \$at,\$a1,\$at +0+027c <[^>]*> lw \$a0,0\(\$at\) +[ ]*27c: [A-Z0-9_]*LO[A-Z0-9_]* big_external_data_label +0+0280 <[^>]*> lw \$a1,4\(\$at\) +[ ]*280: [A-Z0-9_]*LO[A-Z0-9_]* big_external_data_label +0+0284 <[^>]*> addu \$at,\$a1,\$gp +0+0288 <[^>]*> lw \$a0,0\(\$at\) +[ ]*288: [A-Z0-9_]*GPREL[A-Z0-9_]* small_external_data_label +0+028c <[^>]*> lw \$a1,4\(\$at\) +[ ]*28c: [A-Z0-9_]*GPREL[A-Z0-9_]* small_external_data_label +0+0290 <[^>]*> lui \$at,0x0 +[ ]*290: [A-Z0-9_]*HI[A-Z0-9_]* big_external_common +0+0294 <[^>]*> addu \$at,\$a1,\$at +0+0298 <[^>]*> lw \$a0,0\(\$at\) +[ ]*298: [A-Z0-9_]*LO[A-Z0-9_]* big_external_common +0+029c <[^>]*> lw \$a1,4\(\$at\) +[ ]*29c: [A-Z0-9_]*LO[A-Z0-9_]* big_external_common +0+02a0 <[^>]*> addu \$at,\$a1,\$gp +0+02a4 <[^>]*> lw \$a0,0\(\$at\) +[ ]*2a4: [A-Z0-9_]*GPREL[A-Z0-9_]* small_external_common +0+02a8 <[^>]*> lw \$a1,4\(\$at\) +[ ]*2a8: [A-Z0-9_]*GPREL[A-Z0-9_]* small_external_common +0+02ac <[^>]*> lui \$at,0x0 +[ ]*2ac: [A-Z0-9_]*HI[A-Z0-9_]* .bss.* +0+02b0 <[^>]*> addu \$at,\$a1,\$at +0+02b4 <[^>]*> lw \$a0,0\(\$at\) +[ ]*2b4: [A-Z0-9_]*LO[A-Z0-9_]* .bss.* +0+02b8 <[^>]*> lw \$a1,4\(\$at\) +[ ]*2b8: [A-Z0-9_]*LO[A-Z0-9_]* .bss.* +0+02bc <[^>]*> addu \$at,\$a1,\$gp +0+02c0 <[^>]*> lw \$a0,-16384\(\$at\) +[ ]*2c0: [A-Z0-9_]*GPREL[A-Z0-9_]* .sbss.* +0+02c4 <[^>]*> lw \$a1,-16380\(\$at\) +[ ]*2c4: [A-Z0-9_]*GPREL[A-Z0-9_]* .sbss.* +0+02c8 <[^>]*> lui \$at,0x0 +[ ]*2c8: [A-Z0-9_]*HI[A-Z0-9_]* .data.* +0+02cc <[^>]*> addu \$at,\$a1,\$at +0+02d0 <[^>]*> lw \$a0,1\(\$at\) +[ ]*2d0: [A-Z0-9_]*LO[A-Z0-9_]* .data.* +0+02d4 <[^>]*> lw \$a1,5\(\$at\) +[ ]*2d4: [A-Z0-9_]*LO[A-Z0-9_]* .data.* +0+02d8 <[^>]*> lui \$at,0x0 +[ ]*2d8: [A-Z0-9_]*HI[A-Z0-9_]* big_external_data_label +0+02dc <[^>]*> addu \$at,\$a1,\$at +0+02e0 <[^>]*> lw \$a0,1\(\$at\) +[ ]*2e0: [A-Z0-9_]*LO[A-Z0-9_]* big_external_data_label +0+02e4 <[^>]*> lw \$a1,5\(\$at\) +[ ]*2e4: [A-Z0-9_]*LO[A-Z0-9_]* big_external_data_label +0+02e8 <[^>]*> addu \$at,\$a1,\$gp +0+02ec <[^>]*> lw \$a0,1\(\$at\) +[ ]*2ec: [A-Z0-9_]*GPREL[A-Z0-9_]* small_external_data_label +0+02f0 <[^>]*> lw \$a1,5\(\$at\) +[ ]*2f0: [A-Z0-9_]*GPREL[A-Z0-9_]* small_external_data_label +0+02f4 <[^>]*> lui \$at,0x0 +[ ]*2f4: [A-Z0-9_]*HI[A-Z0-9_]* big_external_common +0+02f8 <[^>]*> addu \$at,\$a1,\$at +0+02fc <[^>]*> lw \$a0,1\(\$at\) +[ ]*2fc: [A-Z0-9_]*LO[A-Z0-9_]* big_external_common +0+0300 <[^>]*> lw \$a1,5\(\$at\) +[ ]*300: [A-Z0-9_]*LO[A-Z0-9_]* big_external_common +0+0304 <[^>]*> addu \$at,\$a1,\$gp +0+0308 <[^>]*> lw \$a0,1\(\$at\) +[ ]*308: [A-Z0-9_]*GPREL[A-Z0-9_]* small_external_common +0+030c <[^>]*> lw \$a1,5\(\$at\) +[ ]*30c: [A-Z0-9_]*GPREL[A-Z0-9_]* small_external_common +0+0310 <[^>]*> lui \$at,0x0 +[ ]*310: [A-Z0-9_]*HI[A-Z0-9_]* .bss.* +0+0314 <[^>]*> addu \$at,\$a1,\$at +0+0318 <[^>]*> lw \$a0,1\(\$at\) +[ ]*318: [A-Z0-9_]*LO[A-Z0-9_]* .bss.* +0+031c <[^>]*> lw \$a1,5\(\$at\) +[ ]*31c: [A-Z0-9_]*LO[A-Z0-9_]* .bss.* +0+0320 <[^>]*> addu \$at,\$a1,\$gp +0+0324 <[^>]*> lw \$a0,-16383\(\$at\) +[ ]*324: [A-Z0-9_]*GPREL[A-Z0-9_]* .sbss.* +0+0328 <[^>]*> lw \$a1,-16379\(\$at\) +[ ]*328: [A-Z0-9_]*GPREL[A-Z0-9_]* .sbss.* +0+032c <[^>]*> lui \$at,0x1 +[ ]*32c: [A-Z0-9_]*HI[A-Z0-9_]* .data.* +0+0330 <[^>]*> addu \$at,\$a1,\$at +0+0334 <[^>]*> lw \$a0,-32768\(\$at\) +[ ]*334: [A-Z0-9_]*LO[A-Z0-9_]* .data.* +0+0338 <[^>]*> lw \$a1,-32764\(\$at\) +[ ]*338: [A-Z0-9_]*LO[A-Z0-9_]* .data.* +0+033c <[^>]*> lui \$at,0x1 +[ ]*33c: [A-Z0-9_]*HI[A-Z0-9_]* big_external_data_label +0+0340 <[^>]*> addu \$at,\$a1,\$at +0+0344 <[^>]*> lw \$a0,-32768\(\$at\) +[ ]*344: [A-Z0-9_]*LO[A-Z0-9_]* big_external_data_label +0+0348 <[^>]*> lw \$a1,-32764\(\$at\) +[ ]*348: [A-Z0-9_]*LO[A-Z0-9_]* big_external_data_label +0+034c <[^>]*> lui \$at,0x1 +[ ]*34c: [A-Z0-9_]*HI[A-Z0-9_]* small_external_data_label +0+0350 <[^>]*> addu \$at,\$a1,\$at +0+0354 <[^>]*> lw \$a0,-32768\(\$at\) +[ ]*354: [A-Z0-9_]*LO[A-Z0-9_]* small_external_data_label +0+0358 <[^>]*> lw \$a1,-32764\(\$at\) +[ ]*358: [A-Z0-9_]*LO[A-Z0-9_]* small_external_data_label +0+035c <[^>]*> lui \$at,0x1 +[ ]*35c: [A-Z0-9_]*HI[A-Z0-9_]* big_external_common +0+0360 <[^>]*> addu \$at,\$a1,\$at +0+0364 <[^>]*> lw \$a0,-32768\(\$at\) +[ ]*364: [A-Z0-9_]*LO[A-Z0-9_]* big_external_common +0+0368 <[^>]*> lw \$a1,-32764\(\$at\) +[ ]*368: [A-Z0-9_]*LO[A-Z0-9_]* big_external_common +0+036c <[^>]*> lui \$at,0x1 +[ ]*36c: [A-Z0-9_]*HI[A-Z0-9_]* small_external_common +0+0370 <[^>]*> addu \$at,\$a1,\$at +0+0374 <[^>]*> lw \$a0,-32768\(\$at\) +[ ]*374: [A-Z0-9_]*LO[A-Z0-9_]* small_external_common +0+0378 <[^>]*> lw \$a1,-32764\(\$at\) +[ ]*378: [A-Z0-9_]*LO[A-Z0-9_]* small_external_common +0+037c <[^>]*> lui \$at,0x1 +[ ]*37c: [A-Z0-9_]*HI[A-Z0-9_]* .bss.* +0+0380 <[^>]*> addu \$at,\$a1,\$at +0+0384 <[^>]*> lw \$a0,-32768\(\$at\) +[ ]*384: [A-Z0-9_]*LO[A-Z0-9_]* .bss.* +0+0388 <[^>]*> lw \$a1,-32764\(\$at\) +[ ]*388: [A-Z0-9_]*LO[A-Z0-9_]* .bss.* +0+038c <[^>]*> lui \$at,0x1 +[ ]*38c: [A-Z0-9_]*HI[A-Z0-9_]* .sbss.* +0+0390 <[^>]*> addu \$at,\$a1,\$at +0+0394 <[^>]*> lw \$a0,-32768\(\$at\) +[ ]*394: [A-Z0-9_]*LO[A-Z0-9_]* .sbss.* +0+0398 <[^>]*> lw \$a1,-32764\(\$at\) +[ ]*398: [A-Z0-9_]*LO[A-Z0-9_]* .sbss.* +0+039c <[^>]*> lui \$at,0x0 +[ ]*39c: [A-Z0-9_]*HI[A-Z0-9_]* .data.* +0+03a0 <[^>]*> addu \$at,\$a1,\$at +0+03a4 <[^>]*> lw \$a0,-32768\(\$at\) +[ ]*3a4: [A-Z0-9_]*LO[A-Z0-9_]* .data.* +0+03a8 <[^>]*> lw \$a1,-32764\(\$at\) +[ ]*3a8: [A-Z0-9_]*LO[A-Z0-9_]* .data.* +0+03ac <[^>]*> lui \$at,0x0 +[ ]*3ac: [A-Z0-9_]*HI[A-Z0-9_]* big_external_data_label +0+03b0 <[^>]*> addu \$at,\$a1,\$at +0+03b4 <[^>]*> lw \$a0,-32768\(\$at\) +[ ]*3b4: [A-Z0-9_]*LO[A-Z0-9_]* big_external_data_label +0+03b8 <[^>]*> lw \$a1,-32764\(\$at\) +[ ]*3b8: [A-Z0-9_]*LO[A-Z0-9_]* big_external_data_label +0+03bc <[^>]*> lui \$at,0x0 +[ ]*3bc: [A-Z0-9_]*HI[A-Z0-9_]* small_external_data_label +0+03c0 <[^>]*> addu \$at,\$a1,\$at +0+03c4 <[^>]*> lw \$a0,-32768\(\$at\) +[ ]*3c4: [A-Z0-9_]*LO[A-Z0-9_]* small_external_data_label +0+03c8 <[^>]*> lw \$a1,-32764\(\$at\) +[ ]*3c8: [A-Z0-9_]*LO[A-Z0-9_]* small_external_data_label +0+03cc <[^>]*> lui \$at,0x0 +[ ]*3cc: [A-Z0-9_]*HI[A-Z0-9_]* big_external_common +0+03d0 <[^>]*> addu \$at,\$a1,\$at +0+03d4 <[^>]*> lw \$a0,-32768\(\$at\) +[ ]*3d4: [A-Z0-9_]*LO[A-Z0-9_]* big_external_common +0+03d8 <[^>]*> lw \$a1,-32764\(\$at\) +[ ]*3d8: [A-Z0-9_]*LO[A-Z0-9_]* big_external_common +0+03dc <[^>]*> lui \$at,0x0 +[ ]*3dc: [A-Z0-9_]*HI[A-Z0-9_]* small_external_common +0+03e0 <[^>]*> addu \$at,\$a1,\$at +0+03e4 <[^>]*> lw \$a0,-32768\(\$at\) +[ ]*3e4: [A-Z0-9_]*LO[A-Z0-9_]* small_external_common +0+03e8 <[^>]*> lw \$a1,-32764\(\$at\) +[ ]*3e8: [A-Z0-9_]*LO[A-Z0-9_]* small_external_common +0+03ec <[^>]*> lui \$at,0x0 +[ ]*3ec: [A-Z0-9_]*HI[A-Z0-9_]* .bss.* +0+03f0 <[^>]*> addu \$at,\$a1,\$at +0+03f4 <[^>]*> lw \$a0,-32768\(\$at\) +[ ]*3f4: [A-Z0-9_]*LO[A-Z0-9_]* .bss.* +0+03f8 <[^>]*> lw \$a1,-32764\(\$at\) +[ ]*3f8: [A-Z0-9_]*LO[A-Z0-9_]* .bss.* +0+03fc <[^>]*> lui \$at,0x0 +[ ]*3fc: [A-Z0-9_]*HI[A-Z0-9_]* .sbss.* +0+0400 <[^>]*> addu \$at,\$a1,\$at +0+0404 <[^>]*> lw \$a0,-32768\(\$at\) +[ ]*404: [A-Z0-9_]*LO[A-Z0-9_]* .sbss.* +0+0408 <[^>]*> lw \$a1,-32764\(\$at\) +[ ]*408: [A-Z0-9_]*LO[A-Z0-9_]* .sbss.* +0+040c <[^>]*> lui \$at,0x1 +[ ]*40c: [A-Z0-9_]*HI[A-Z0-9_]* .data.* +0+0410 <[^>]*> addu \$at,\$a1,\$at +0+0414 <[^>]*> lw \$a0,0\(\$at\) +[ ]*414: [A-Z0-9_]*LO[A-Z0-9_]* .data.* +0+0418 <[^>]*> lw \$a1,4\(\$at\) +[ ]*418: [A-Z0-9_]*LO[A-Z0-9_]* .data.* +0+041c <[^>]*> lui \$at,0x1 +[ ]*41c: [A-Z0-9_]*HI[A-Z0-9_]* big_external_data_label +0+0420 <[^>]*> addu \$at,\$a1,\$at +0+0424 <[^>]*> lw \$a0,0\(\$at\) +[ ]*424: [A-Z0-9_]*LO[A-Z0-9_]* big_external_data_label +0+0428 <[^>]*> lw \$a1,4\(\$at\) +[ ]*428: [A-Z0-9_]*LO[A-Z0-9_]* big_external_data_label +0+042c <[^>]*> lui \$at,0x1 +[ ]*42c: [A-Z0-9_]*HI[A-Z0-9_]* small_external_data_label +0+0430 <[^>]*> addu \$at,\$a1,\$at +0+0434 <[^>]*> lw \$a0,0\(\$at\) +[ ]*434: [A-Z0-9_]*LO[A-Z0-9_]* small_external_data_label +0+0438 <[^>]*> lw \$a1,4\(\$at\) +[ ]*438: [A-Z0-9_]*LO[A-Z0-9_]* small_external_data_label +0+043c <[^>]*> lui \$at,0x1 +[ ]*43c: [A-Z0-9_]*HI[A-Z0-9_]* big_external_common +0+0440 <[^>]*> addu \$at,\$a1,\$at +0+0444 <[^>]*> lw \$a0,0\(\$at\) +[ ]*444: [A-Z0-9_]*LO[A-Z0-9_]* big_external_common +0+0448 <[^>]*> lw \$a1,4\(\$at\) +[ ]*448: [A-Z0-9_]*LO[A-Z0-9_]* big_external_common +0+044c <[^>]*> lui \$at,0x1 +[ ]*44c: [A-Z0-9_]*HI[A-Z0-9_]* small_external_common +0+0450 <[^>]*> addu \$at,\$a1,\$at +0+0454 <[^>]*> lw \$a0,0\(\$at\) +[ ]*454: [A-Z0-9_]*LO[A-Z0-9_]* small_external_common +0+0458 <[^>]*> lw \$a1,4\(\$at\) +[ ]*458: [A-Z0-9_]*LO[A-Z0-9_]* small_external_common +0+045c <[^>]*> lui \$at,0x1 +[ ]*45c: [A-Z0-9_]*HI[A-Z0-9_]* .bss.* +0+0460 <[^>]*> addu \$at,\$a1,\$at +0+0464 <[^>]*> lw \$a0,0\(\$at\) +[ ]*464: [A-Z0-9_]*LO[A-Z0-9_]* .bss.* +0+0468 <[^>]*> lw \$a1,4\(\$at\) +[ ]*468: [A-Z0-9_]*LO[A-Z0-9_]* .bss.* +0+046c <[^>]*> lui \$at,0x1 +[ ]*46c: [A-Z0-9_]*HI[A-Z0-9_]* .sbss.* +0+0470 <[^>]*> addu \$at,\$a1,\$at +0+0474 <[^>]*> lw \$a0,0\(\$at\) +[ ]*474: [A-Z0-9_]*LO[A-Z0-9_]* .sbss.* +0+0478 <[^>]*> lw \$a1,4\(\$at\) +[ ]*478: [A-Z0-9_]*LO[A-Z0-9_]* .sbss.* +0+047c <[^>]*> lui \$at,0x2 +[ ]*47c: [A-Z0-9_]*HI[A-Z0-9_]* .data.* +0+0480 <[^>]*> addu \$at,\$a1,\$at +0+0484 <[^>]*> lw \$a0,-23131\(\$at\) +[ ]*484: [A-Z0-9_]*LO[A-Z0-9_]* .data.* +0+0488 <[^>]*> lw \$a1,-23127\(\$at\) +[ ]*488: [A-Z0-9_]*LO[A-Z0-9_]* .data.* +0+048c <[^>]*> lui \$at,0x2 +[ ]*48c: [A-Z0-9_]*HI[A-Z0-9_]* big_external_data_label +0+0490 <[^>]*> addu \$at,\$a1,\$at +0+0494 <[^>]*> lw \$a0,-23131\(\$at\) +[ ]*494: [A-Z0-9_]*LO[A-Z0-9_]* big_external_data_label +0+0498 <[^>]*> lw \$a1,-23127\(\$at\) +[ ]*498: [A-Z0-9_]*LO[A-Z0-9_]* big_external_data_label +0+049c <[^>]*> lui \$at,0x2 +[ ]*49c: [A-Z0-9_]*HI[A-Z0-9_]* small_external_data_label +0+04a0 <[^>]*> addu \$at,\$a1,\$at +0+04a4 <[^>]*> lw \$a0,-23131\(\$at\) +[ ]*4a4: [A-Z0-9_]*LO[A-Z0-9_]* small_external_data_label +0+04a8 <[^>]*> lw \$a1,-23127\(\$at\) +[ ]*4a8: [A-Z0-9_]*LO[A-Z0-9_]* small_external_data_label +0+04ac <[^>]*> lui \$at,0x2 +[ ]*4ac: [A-Z0-9_]*HI[A-Z0-9_]* big_external_common +0+04b0 <[^>]*> addu \$at,\$a1,\$at +0+04b4 <[^>]*> lw \$a0,-23131\(\$at\) +[ ]*4b4: [A-Z0-9_]*LO[A-Z0-9_]* big_external_common +0+04b8 <[^>]*> lw \$a1,-23127\(\$at\) +[ ]*4b8: [A-Z0-9_]*LO[A-Z0-9_]* big_external_common +0+04bc <[^>]*> lui \$at,0x2 +[ ]*4bc: [A-Z0-9_]*HI[A-Z0-9_]* small_external_common +0+04c0 <[^>]*> addu \$at,\$a1,\$at +0+04c4 <[^>]*> lw \$a0,-23131\(\$at\) +[ ]*4c4: [A-Z0-9_]*LO[A-Z0-9_]* small_external_common +0+04c8 <[^>]*> lw \$a1,-23127\(\$at\) +[ ]*4c8: [A-Z0-9_]*LO[A-Z0-9_]* small_external_common +0+04cc <[^>]*> lui \$at,0x2 +[ ]*4cc: [A-Z0-9_]*HI[A-Z0-9_]* .bss.* +0+04d0 <[^>]*> addu \$at,\$a1,\$at +0+04d4 <[^>]*> lw \$a0,-23131\(\$at\) +[ ]*4d4: [A-Z0-9_]*LO[A-Z0-9_]* .bss.* +0+04d8 <[^>]*> lw \$a1,-23127\(\$at\) +[ ]*4d8: [A-Z0-9_]*LO[A-Z0-9_]* .bss.* +0+04dc <[^>]*> lui \$at,0x2 +[ ]*4dc: [A-Z0-9_]*HI[A-Z0-9_]* .sbss.* +0+04e0 <[^>]*> addu \$at,\$a1,\$at +0+04e4 <[^>]*> lw \$a0,-23131\(\$at\) +[ ]*4e4: [A-Z0-9_]*LO[A-Z0-9_]* .sbss.* +0+04e8 <[^>]*> lw \$a1,-23127\(\$at\) +[ ]*4e8: [A-Z0-9_]*LO[A-Z0-9_]* .sbss.* +0+04ec <[^>]*> lwc1 \$f[45],0\(\$zero\) +0+04f0 <[^>]*> lwc1 \$f[45],4\(\$zero\) +0+04f4 <[^>]*> lwc1 \$f[45],1\(\$zero\) +0+04f8 <[^>]*> lwc1 \$f[45],5\(\$zero\) +0+04fc <[^>]*> lui \$at,0x1 +0+0500 <[^>]*> lwc1 \$f[45],-32768\(\$at\) +0+0504 <[^>]*> lwc1 \$f[45],-32764\(\$at\) +0+0508 <[^>]*> lwc1 \$f[45],-32768\(\$zero\) +0+050c <[^>]*> lwc1 \$f[45],-32764\(\$zero\) +0+0510 <[^>]*> lwc1 \$f[45],0\(\$a1\) +0+0514 <[^>]*> lwc1 \$f[45],4\(\$a1\) +0+0518 <[^>]*> lwc1 \$f[45],1\(\$a1\) +0+051c <[^>]*> lwc1 \$f[45],5\(\$a1\) +0+0520 <[^>]*> lui \$at,0x1 +0+0524 <[^>]*> addu \$at,\$a1,\$at +0+0528 <[^>]*> lwc1 \$f[45],-32768\(\$at\) +0+052c <[^>]*> lwc1 \$f[45],-32764\(\$at\) +0+0530 <[^>]*> lwc1 \$f[45],-32768\(\$a1\) +0+0534 <[^>]*> lwc1 \$f[45],-32764\(\$a1\) +0+0538 <[^>]*> lui \$at,0x2 +[ ]*538: [A-Z0-9_]*HI[A-Z0-9_]* small_external_common +0+053c <[^>]*> addu \$at,\$a1,\$at +0+0540 <[^>]*> lwc1 \$f[45],-23131\(\$at\) +[ ]*540: [A-Z0-9_]*LO[A-Z0-9_]* small_external_common +0+0544 <[^>]*> lwc1 \$f[45],-23127\(\$at\) +[ ]*544: [A-Z0-9_]*LO[A-Z0-9_]* small_external_common +0+0548 <[^>]*> nop +0+054c <[^>]*> swc1 \$f[45],0\(\$zero\) +0+0550 <[^>]*> swc1 \$f[45],4\(\$zero\) +0+0554 <[^>]*> swc1 \$f[45],1\(\$zero\) +0+0558 <[^>]*> swc1 \$f[45],5\(\$zero\) +0+055c <[^>]*> lui \$at,0x1 +0+0560 <[^>]*> swc1 \$f[45],-32768\(\$at\) +0+0564 <[^>]*> swc1 \$f[45],-32764\(\$at\) +0+0568 <[^>]*> swc1 \$f[45],-32768\(\$zero\) +0+056c <[^>]*> swc1 \$f[45],-32764\(\$zero\) +0+0570 <[^>]*> swc1 \$f[45],0\(\$a1\) +0+0574 <[^>]*> swc1 \$f[45],4\(\$a1\) +0+0578 <[^>]*> swc1 \$f[45],1\(\$a1\) +0+057c <[^>]*> swc1 \$f[45],5\(\$a1\) +0+0580 <[^>]*> lui \$at,0x1 +0+0584 <[^>]*> addu \$at,\$a1,\$at +0+0588 <[^>]*> swc1 \$f[45],-32768\(\$at\) +0+058c <[^>]*> swc1 \$f[45],-32764\(\$at\) +0+0590 <[^>]*> swc1 \$f[45],-32768\(\$a1\) +0+0594 <[^>]*> swc1 \$f[45],-32764\(\$a1\) +0+0598 <[^>]*> lui \$at,0x2 +[ ]*598: [A-Z0-9_]*HI[A-Z0-9_]* big_external_common +0+059c <[^>]*> addu \$at,\$a1,\$at +0+05a0 <[^>]*> swc1 \$f[45],-23131\(\$at\) +[ ]*5a0: [A-Z0-9_]*LO[A-Z0-9_]* big_external_common +0+05a4 <[^>]*> swc1 \$f[45],-23127\(\$at\) +[ ]*5a4: [A-Z0-9_]*LO[A-Z0-9_]* big_external_common +0+05a8 <[^>]*> sw \$a0,0\(\$zero\) +0+05ac <[^>]*> sw \$a1,4\(\$zero\) +0+05b0 <[^>]*> lui \$a0,0x2 +[ ]*5b0: [A-Z0-9_]*HI[A-Z0-9_]* .bss.* +0+05b4 <[^>]*> (d|)addu \$a0,\$a0,\$a1 +0+05b8 <[^>]*> ld \$a0,-23131\(\$a0\) +[ ]*5b8: [A-Z0-9_]*LO[A-Z0-9_]* .bss.* +0+05bc <[^>]*> lui \$at,0x2 +[ ]*5bc: [A-Z0-9_]*HI[A-Z0-9_]* .sbss.* +0+05c0 <[^>]*> (d|)addu \$at,\$at,\$a1 +0+05c4 <[^>]*> sd \$a0,-23131\(\$at\) +[ ]*5c4: [A-Z0-9_]*LO[A-Z0-9_]* .sbss.* +0+05c8 <[^>]*> nop + diff --git a/gas/testsuite/gas/mips/ld-pic.s b/gas/testsuite/gas/mips/ld-pic.s new file mode 100644 index 0000000..ccf52df --- /dev/null +++ b/gas/testsuite/gas/mips/ld-pic.s @@ -0,0 +1,60 @@ +# Source file used to test the ld macro with PIC code. + + .set mips1 + + .data +data_label: + .extern big_external_data_label,1000 + .extern small_external_data_label,1 + .comm big_external_common,1000 + .comm small_external_common,1 + .lcomm big_local_common,1000 + .lcomm small_local_common,1 + + .text + ld $4,0 + ld $4,1 + ld $4,0x8000 + ld $4,-0x8000 + ld $4,0x10000 + ld $4,0x1a5a5 + ld $4,0($5) + ld $4,1($5) + ld $4,0x8000($5) + ld $4,-0x8000($5) + ld $4,0x10000($5) + ld $4,0x1a5a5($5) + ld $4,data_label + ld $4,big_external_data_label + ld $4,small_external_data_label + ld $4,big_external_common + ld $4,small_external_common + ld $4,big_local_common + ld $4,small_local_common + ld $4,data_label+1 + ld $4,big_external_data_label+1 + ld $4,small_external_data_label+1 + ld $4,big_external_common+1 + ld $4,small_external_common+1 + ld $4,big_local_common+1 + ld $4,small_local_common+1 + ld $4,data_label($5) + ld $4,big_external_data_label($5) + ld $4,small_external_data_label($5) + ld $4,big_external_common($5) + ld $4,small_external_common($5) + ld $4,big_local_common($5) + ld $4,small_local_common($5) + ld $4,data_label+1($5) + ld $4,big_external_data_label+1($5) + ld $4,small_external_data_label+1($5) + ld $4,big_external_common+1($5) + ld $4,small_external_common+1($5) + ld $4,big_local_common+1($5) + ld $4,small_local_common+1($5) + +# Round to a 16 byte boundary, for ease in testing multiple targets. + .ifndef EMPIC + nop + nop + .endif diff --git a/gas/testsuite/gas/mips/ld-svr4pic.d b/gas/testsuite/gas/mips/ld-svr4pic.d new file mode 100644 index 0000000..2043d79 --- /dev/null +++ b/gas/testsuite/gas/mips/ld-svr4pic.d @@ -0,0 +1,225 @@ +#objdump: -dr --prefix-addresses -mmips:3000 +#name: MIPS ld-svr4pic +#as: -mips1 -mcpu=r3000 -KPIC +#source: ld-pic.s + +# Test the ld macro with -KPIC. + +.*: +file format .*mips.* + +Disassembly of section .text: +0+0000 <[^>]*> lw \$a0,0\(\$zero\) +0+0004 <[^>]*> lw \$a1,4\(\$zero\) +0+0008 <[^>]*> lw \$a0,1\(\$zero\) +0+000c <[^>]*> lw \$a1,5\(\$zero\) +0+0010 <[^>]*> lui \$at,0x1 +0+0014 <[^>]*> lw \$a0,-32768\(\$at\) +0+0018 <[^>]*> lw \$a1,-32764\(\$at\) +0+001c <[^>]*> lw \$a0,-32768\(\$zero\) +0+0020 <[^>]*> lw \$a1,-32764\(\$zero\) +0+0024 <[^>]*> lui \$at,0x1 +0+0028 <[^>]*> lw \$a0,0\(\$at\) +0+002c <[^>]*> lw \$a1,4\(\$at\) +0+0030 <[^>]*> lui \$at,0x2 +0+0034 <[^>]*> lw \$a0,-23131\(\$at\) +0+0038 <[^>]*> lw \$a1,-23127\(\$at\) +0+003c <[^>]*> nop +0+0040 <[^>]*> lw \$a0,0\(\$a1\) +0+0044 <[^>]*> lw \$a1,4\(\$a1\) +0+0048 <[^>]*> nop +0+004c <[^>]*> lw \$a0,1\(\$a1\) +0+0050 <[^>]*> lw \$a1,5\(\$a1\) +0+0054 <[^>]*> lui \$at,0x1 +0+0058 <[^>]*> addu \$at,\$a1,\$at +0+005c <[^>]*> lw \$a0,-32768\(\$at\) +0+0060 <[^>]*> lw \$a1,-32764\(\$at\) +0+0064 <[^>]*> nop +0+0068 <[^>]*> lw \$a0,-32768\(\$a1\) +0+006c <[^>]*> lw \$a1,-32764\(\$a1\) +0+0070 <[^>]*> lui \$at,0x1 +0+0074 <[^>]*> addu \$at,\$a1,\$at +0+0078 <[^>]*> lw \$a0,0\(\$at\) +0+007c <[^>]*> lw \$a1,4\(\$at\) +0+0080 <[^>]*> lui \$at,0x2 +0+0084 <[^>]*> addu \$at,\$a1,\$at +0+0088 <[^>]*> lw \$a0,-23131\(\$at\) +0+008c <[^>]*> lw \$a1,-23127\(\$at\) +0+0090 <[^>]*> lw \$at,0\(\$gp\) +[ ]*90: R_MIPS_GOT16 .data +0+0094 <[^>]*> nop +0+0098 <[^>]*> lw \$a0,0\(\$at\) +[ ]*98: R_MIPS_LO16 .data +0+009c <[^>]*> lw \$a1,4\(\$at\) +[ ]*9c: R_MIPS_LO16 .data +0+00a0 <[^>]*> lw \$at,0\(\$gp\) +[ ]*a0: R_MIPS_GOT16 big_external_data_label +0+00a4 <[^>]*> nop +0+00a8 <[^>]*> lw \$a0,0\(\$at\) +0+00ac <[^>]*> lw \$a1,4\(\$at\) +0+00b0 <[^>]*> lw \$at,0\(\$gp\) +[ ]*b0: R_MIPS_GOT16 small_external_data_label +0+00b4 <[^>]*> nop +0+00b8 <[^>]*> lw \$a0,0\(\$at\) +0+00bc <[^>]*> lw \$a1,4\(\$at\) +0+00c0 <[^>]*> lw \$at,0\(\$gp\) +[ ]*c0: R_MIPS_GOT16 big_external_common +0+00c4 <[^>]*> nop +0+00c8 <[^>]*> lw \$a0,0\(\$at\) +0+00cc <[^>]*> lw \$a1,4\(\$at\) +0+00d0 <[^>]*> lw \$at,0\(\$gp\) +[ ]*d0: R_MIPS_GOT16 small_external_common +0+00d4 <[^>]*> nop +0+00d8 <[^>]*> lw \$a0,0\(\$at\) +0+00dc <[^>]*> lw \$a1,4\(\$at\) +0+00e0 <[^>]*> lw \$at,0\(\$gp\) +[ ]*e0: R_MIPS_GOT16 .bss +0+00e4 <[^>]*> nop +0+00e8 <[^>]*> lw \$a0,0\(\$at\) +[ ]*e8: R_MIPS_LO16 .bss +0+00ec <[^>]*> lw \$a1,4\(\$at\) +[ ]*ec: R_MIPS_LO16 .bss +0+00f0 <[^>]*> lw \$at,0\(\$gp\) +[ ]*f0: R_MIPS_GOT16 .bss +0+00f4 <[^>]*> nop +0+00f8 <[^>]*> lw \$a0,1000\(\$at\) +[ ]*f8: R_MIPS_LO16 .bss +0+00fc <[^>]*> lw \$a1,1004\(\$at\) +[ ]*fc: R_MIPS_LO16 .bss +0+0100 <[^>]*> lw \$at,0\(\$gp\) +[ ]*100: R_MIPS_GOT16 .data +0+0104 <[^>]*> nop +0+0108 <[^>]*> lw \$a0,1\(\$at\) +[ ]*108: R_MIPS_LO16 .data +0+010c <[^>]*> lw \$a1,5\(\$at\) +[ ]*10c: R_MIPS_LO16 .data +0+0110 <[^>]*> lw \$at,0\(\$gp\) +[ ]*110: R_MIPS_GOT16 big_external_data_label +0+0114 <[^>]*> nop +0+0118 <[^>]*> lw \$a0,1\(\$at\) +0+011c <[^>]*> lw \$a1,5\(\$at\) +0+0120 <[^>]*> lw \$at,0\(\$gp\) +[ ]*120: R_MIPS_GOT16 small_external_data_label +0+0124 <[^>]*> nop +0+0128 <[^>]*> lw \$a0,1\(\$at\) +0+012c <[^>]*> lw \$a1,5\(\$at\) +0+0130 <[^>]*> lw \$at,0\(\$gp\) +[ ]*130: R_MIPS_GOT16 big_external_common +0+0134 <[^>]*> nop +0+0138 <[^>]*> lw \$a0,1\(\$at\) +0+013c <[^>]*> lw \$a1,5\(\$at\) +0+0140 <[^>]*> lw \$at,0\(\$gp\) +[ ]*140: R_MIPS_GOT16 small_external_common +0+0144 <[^>]*> nop +0+0148 <[^>]*> lw \$a0,1\(\$at\) +0+014c <[^>]*> lw \$a1,5\(\$at\) +0+0150 <[^>]*> lw \$at,0\(\$gp\) +[ ]*150: R_MIPS_GOT16 .bss +0+0154 <[^>]*> nop +0+0158 <[^>]*> lw \$a0,1\(\$at\) +[ ]*158: R_MIPS_LO16 .bss +0+015c <[^>]*> lw \$a1,5\(\$at\) +[ ]*15c: R_MIPS_LO16 .bss +0+0160 <[^>]*> lw \$at,0\(\$gp\) +[ ]*160: R_MIPS_GOT16 .bss +0+0164 <[^>]*> nop +0+0168 <[^>]*> lw \$a0,1001\(\$at\) +[ ]*168: R_MIPS_LO16 .bss +0+016c <[^>]*> lw \$a1,1005\(\$at\) +[ ]*16c: R_MIPS_LO16 .bss +0+0170 <[^>]*> lw \$at,0\(\$gp\) +[ ]*170: R_MIPS_GOT16 .data +0+0174 <[^>]*> nop +0+0178 <[^>]*> addu \$at,\$a1,\$at +0+017c <[^>]*> lw \$a0,0\(\$at\) +[ ]*17c: R_MIPS_LO16 .data +0+0180 <[^>]*> lw \$a1,4\(\$at\) +[ ]*180: R_MIPS_LO16 .data +0+0184 <[^>]*> lw \$at,0\(\$gp\) +[ ]*184: R_MIPS_GOT16 big_external_data_label +0+0188 <[^>]*> nop +0+018c <[^>]*> addu \$at,\$a1,\$at +0+0190 <[^>]*> lw \$a0,0\(\$at\) +0+0194 <[^>]*> lw \$a1,4\(\$at\) +0+0198 <[^>]*> lw \$at,0\(\$gp\) +[ ]*198: R_MIPS_GOT16 small_external_data_label +0+019c <[^>]*> nop +0+01a0 <[^>]*> addu \$at,\$a1,\$at +0+01a4 <[^>]*> lw \$a0,0\(\$at\) +0+01a8 <[^>]*> lw \$a1,4\(\$at\) +0+01ac <[^>]*> lw \$at,0\(\$gp\) +[ ]*1ac: R_MIPS_GOT16 big_external_common +0+01b0 <[^>]*> nop +0+01b4 <[^>]*> addu \$at,\$a1,\$at +0+01b8 <[^>]*> lw \$a0,0\(\$at\) +0+01bc <[^>]*> lw \$a1,4\(\$at\) +0+01c0 <[^>]*> lw \$at,0\(\$gp\) +[ ]*1c0: R_MIPS_GOT16 small_external_common +0+01c4 <[^>]*> nop +0+01c8 <[^>]*> addu \$at,\$a1,\$at +0+01cc <[^>]*> lw \$a0,0\(\$at\) +0+01d0 <[^>]*> lw \$a1,4\(\$at\) +0+01d4 <[^>]*> lw \$at,0\(\$gp\) +[ ]*1d4: R_MIPS_GOT16 .bss +0+01d8 <[^>]*> nop +0+01dc <[^>]*> addu \$at,\$a1,\$at +0+01e0 <[^>]*> lw \$a0,0\(\$at\) +[ ]*1e0: R_MIPS_LO16 .bss +0+01e4 <[^>]*> lw \$a1,4\(\$at\) +[ ]*1e4: R_MIPS_LO16 .bss +0+01e8 <[^>]*> lw \$at,0\(\$gp\) +[ ]*1e8: R_MIPS_GOT16 .bss +0+01ec <[^>]*> nop +0+01f0 <[^>]*> addu \$at,\$a1,\$at +0+01f4 <[^>]*> lw \$a0,1000\(\$at\) +[ ]*1f4: R_MIPS_LO16 .bss +0+01f8 <[^>]*> lw \$a1,1004\(\$at\) +[ ]*1f8: R_MIPS_LO16 .bss +0+01fc <[^>]*> lw \$at,0\(\$gp\) +[ ]*1fc: R_MIPS_GOT16 .data +0+0200 <[^>]*> nop +0+0204 <[^>]*> addu \$at,\$a1,\$at +0+0208 <[^>]*> lw \$a0,1\(\$at\) +[ ]*208: R_MIPS_LO16 .data +0+020c <[^>]*> lw \$a1,5\(\$at\) +[ ]*20c: R_MIPS_LO16 .data +0+0210 <[^>]*> lw \$at,0\(\$gp\) +[ ]*210: R_MIPS_GOT16 big_external_data_label +0+0214 <[^>]*> nop +0+0218 <[^>]*> addu \$at,\$a1,\$at +0+021c <[^>]*> lw \$a0,1\(\$at\) +0+0220 <[^>]*> lw \$a1,5\(\$at\) +0+0224 <[^>]*> lw \$at,0\(\$gp\) +[ ]*224: R_MIPS_GOT16 small_external_data_label +0+0228 <[^>]*> nop +0+022c <[^>]*> addu \$at,\$a1,\$at +0+0230 <[^>]*> lw \$a0,1\(\$at\) +0+0234 <[^>]*> lw \$a1,5\(\$at\) +0+0238 <[^>]*> lw \$at,0\(\$gp\) +[ ]*238: R_MIPS_GOT16 big_external_common +0+023c <[^>]*> nop +0+0240 <[^>]*> addu \$at,\$a1,\$at +0+0244 <[^>]*> lw \$a0,1\(\$at\) +0+0248 <[^>]*> lw \$a1,5\(\$at\) +0+024c <[^>]*> lw \$at,0\(\$gp\) +[ ]*24c: R_MIPS_GOT16 small_external_common +0+0250 <[^>]*> nop +0+0254 <[^>]*> addu \$at,\$a1,\$at +0+0258 <[^>]*> lw \$a0,1\(\$at\) +0+025c <[^>]*> lw \$a1,5\(\$at\) +0+0260 <[^>]*> lw \$at,0\(\$gp\) +[ ]*260: R_MIPS_GOT16 .bss +0+0264 <[^>]*> nop +0+0268 <[^>]*> addu \$at,\$a1,\$at +0+026c <[^>]*> lw \$a0,1\(\$at\) +[ ]*26c: R_MIPS_LO16 .bss +0+0270 <[^>]*> lw \$a1,5\(\$at\) +[ ]*270: R_MIPS_LO16 .bss +0+0274 <[^>]*> lw \$at,0\(\$gp\) +[ ]*274: R_MIPS_GOT16 .bss +0+0278 <[^>]*> nop +0+027c <[^>]*> addu \$at,\$a1,\$at +0+0280 <[^>]*> lw \$a0,1001\(\$at\) +[ ]*280: R_MIPS_LO16 .bss +0+0284 <[^>]*> lw \$a1,1005\(\$at\) +[ ]*284: R_MIPS_LO16 .bss + ... diff --git a/gas/testsuite/gas/mips/ld-xgot.d b/gas/testsuite/gas/mips/ld-xgot.d new file mode 100644 index 0000000..40262cf --- /dev/null +++ b/gas/testsuite/gas/mips/ld-xgot.d @@ -0,0 +1,273 @@ +#objdump: -dr --prefix-addresses -mmips:3000 +#name: MIPS ld-xgot +#as: -mips1 -mcpu=r3000 -KPIC -xgot +#source: ld-pic.s + +# Test the ld macro with -KPIC -xgot. + +.*: +file format .*mips.* + +Disassembly of section .text: +0+0000 <[^>]*> lw \$a0,0\(\$zero\) +0+0004 <[^>]*> lw \$a1,4\(\$zero\) +0+0008 <[^>]*> lw \$a0,1\(\$zero\) +0+000c <[^>]*> lw \$a1,5\(\$zero\) +0+0010 <[^>]*> lui \$at,0x1 +0+0014 <[^>]*> lw \$a0,-32768\(\$at\) +0+0018 <[^>]*> lw \$a1,-32764\(\$at\) +0+001c <[^>]*> lw \$a0,-32768\(\$zero\) +0+0020 <[^>]*> lw \$a1,-32764\(\$zero\) +0+0024 <[^>]*> lui \$at,0x1 +0+0028 <[^>]*> lw \$a0,0\(\$at\) +0+002c <[^>]*> lw \$a1,4\(\$at\) +0+0030 <[^>]*> lui \$at,0x2 +0+0034 <[^>]*> lw \$a0,-23131\(\$at\) +0+0038 <[^>]*> lw \$a1,-23127\(\$at\) +0+003c <[^>]*> nop +0+0040 <[^>]*> lw \$a0,0\(\$a1\) +0+0044 <[^>]*> lw \$a1,4\(\$a1\) +0+0048 <[^>]*> nop +0+004c <[^>]*> lw \$a0,1\(\$a1\) +0+0050 <[^>]*> lw \$a1,5\(\$a1\) +0+0054 <[^>]*> lui \$at,0x1 +0+0058 <[^>]*> addu \$at,\$a1,\$at +0+005c <[^>]*> lw \$a0,-32768\(\$at\) +0+0060 <[^>]*> lw \$a1,-32764\(\$at\) +0+0064 <[^>]*> nop +0+0068 <[^>]*> lw \$a0,-32768\(\$a1\) +0+006c <[^>]*> lw \$a1,-32764\(\$a1\) +0+0070 <[^>]*> lui \$at,0x1 +0+0074 <[^>]*> addu \$at,\$a1,\$at +0+0078 <[^>]*> lw \$a0,0\(\$at\) +0+007c <[^>]*> lw \$a1,4\(\$at\) +0+0080 <[^>]*> lui \$at,0x2 +0+0084 <[^>]*> addu \$at,\$a1,\$at +0+0088 <[^>]*> lw \$a0,-23131\(\$at\) +0+008c <[^>]*> lw \$a1,-23127\(\$at\) +0+0090 <[^>]*> lw \$at,0\(\$gp\) +[ ]*90: R_MIPS_GOT16 .data +0+0094 <[^>]*> nop +0+0098 <[^>]*> lw \$a0,0\(\$at\) +[ ]*98: R_MIPS_LO16 .data +0+009c <[^>]*> lw \$a1,4\(\$at\) +[ ]*9c: R_MIPS_LO16 .data +0+00a0 <[^>]*> lui \$at,0x0 +[ ]*a0: R_MIPS_GOT_HI16 big_external_data_label +0+00a4 <[^>]*> addu \$at,\$at,\$gp +0+00a8 <[^>]*> lw \$at,0\(\$at\) +[ ]*a8: R_MIPS_GOT_LO16 big_external_data_label +0+00ac <[^>]*> nop +0+00b0 <[^>]*> lw \$a0,0\(\$at\) +0+00b4 <[^>]*> lw \$a1,4\(\$at\) +0+00b8 <[^>]*> lui \$at,0x0 +[ ]*b8: R_MIPS_GOT_HI16 small_external_data_label +0+00bc <[^>]*> addu \$at,\$at,\$gp +0+00c0 <[^>]*> lw \$at,0\(\$at\) +[ ]*c0: R_MIPS_GOT_LO16 small_external_data_label +0+00c4 <[^>]*> nop +0+00c8 <[^>]*> lw \$a0,0\(\$at\) +0+00cc <[^>]*> lw \$a1,4\(\$at\) +0+00d0 <[^>]*> lui \$at,0x0 +[ ]*d0: R_MIPS_GOT_HI16 big_external_common +0+00d4 <[^>]*> addu \$at,\$at,\$gp +0+00d8 <[^>]*> lw \$at,0\(\$at\) +[ ]*d8: R_MIPS_GOT_LO16 big_external_common +0+00dc <[^>]*> nop +0+00e0 <[^>]*> lw \$a0,0\(\$at\) +0+00e4 <[^>]*> lw \$a1,4\(\$at\) +0+00e8 <[^>]*> lui \$at,0x0 +[ ]*e8: R_MIPS_GOT_HI16 small_external_common +0+00ec <[^>]*> addu \$at,\$at,\$gp +0+00f0 <[^>]*> lw \$at,0\(\$at\) +[ ]*f0: R_MIPS_GOT_LO16 small_external_common +0+00f4 <[^>]*> nop +0+00f8 <[^>]*> lw \$a0,0\(\$at\) +0+00fc <[^>]*> lw \$a1,4\(\$at\) +0+0100 <[^>]*> lw \$at,0\(\$gp\) +[ ]*100: R_MIPS_GOT16 .bss +0+0104 <[^>]*> nop +0+0108 <[^>]*> lw \$a0,0\(\$at\) +[ ]*108: R_MIPS_LO16 .bss +0+010c <[^>]*> lw \$a1,4\(\$at\) +[ ]*10c: R_MIPS_LO16 .bss +0+0110 <[^>]*> lw \$at,0\(\$gp\) +[ ]*110: R_MIPS_GOT16 .bss +0+0114 <[^>]*> nop +0+0118 <[^>]*> lw \$a0,1000\(\$at\) +[ ]*118: R_MIPS_LO16 .bss +0+011c <[^>]*> lw \$a1,1004\(\$at\) +[ ]*11c: R_MIPS_LO16 .bss +0+0120 <[^>]*> lw \$at,0\(\$gp\) +[ ]*120: R_MIPS_GOT16 .data +0+0124 <[^>]*> nop +0+0128 <[^>]*> lw \$a0,1\(\$at\) +[ ]*128: R_MIPS_LO16 .data +0+012c <[^>]*> lw \$a1,5\(\$at\) +[ ]*12c: R_MIPS_LO16 .data +0+0130 <[^>]*> lui \$at,0x0 +[ ]*130: R_MIPS_GOT_HI16 big_external_data_label +0+0134 <[^>]*> addu \$at,\$at,\$gp +0+0138 <[^>]*> lw \$at,0\(\$at\) +[ ]*138: R_MIPS_GOT_LO16 big_external_data_label +0+013c <[^>]*> nop +0+0140 <[^>]*> lw \$a0,1\(\$at\) +0+0144 <[^>]*> lw \$a1,5\(\$at\) +0+0148 <[^>]*> lui \$at,0x0 +[ ]*148: R_MIPS_GOT_HI16 small_external_data_label +0+014c <[^>]*> addu \$at,\$at,\$gp +0+0150 <[^>]*> lw \$at,0\(\$at\) +[ ]*150: R_MIPS_GOT_LO16 small_external_data_label +0+0154 <[^>]*> nop +0+0158 <[^>]*> lw \$a0,1\(\$at\) +0+015c <[^>]*> lw \$a1,5\(\$at\) +0+0160 <[^>]*> lui \$at,0x0 +[ ]*160: R_MIPS_GOT_HI16 big_external_common +0+0164 <[^>]*> addu \$at,\$at,\$gp +0+0168 <[^>]*> lw \$at,0\(\$at\) +[ ]*168: R_MIPS_GOT_LO16 big_external_common +0+016c <[^>]*> nop +0+0170 <[^>]*> lw \$a0,1\(\$at\) +0+0174 <[^>]*> lw \$a1,5\(\$at\) +0+0178 <[^>]*> lui \$at,0x0 +[ ]*178: R_MIPS_GOT_HI16 small_external_common +0+017c <[^>]*> addu \$at,\$at,\$gp +0+0180 <[^>]*> lw \$at,0\(\$at\) +[ ]*180: R_MIPS_GOT_LO16 small_external_common +0+0184 <[^>]*> nop +0+0188 <[^>]*> lw \$a0,1\(\$at\) +0+018c <[^>]*> lw \$a1,5\(\$at\) +0+0190 <[^>]*> lw \$at,0\(\$gp\) +[ ]*190: R_MIPS_GOT16 .bss +0+0194 <[^>]*> nop +0+0198 <[^>]*> lw \$a0,1\(\$at\) +[ ]*198: R_MIPS_LO16 .bss +0+019c <[^>]*> lw \$a1,5\(\$at\) +[ ]*19c: R_MIPS_LO16 .bss +0+01a0 <[^>]*> lw \$at,0\(\$gp\) +[ ]*1a0: R_MIPS_GOT16 .bss +0+01a4 <[^>]*> nop +0+01a8 <[^>]*> lw \$a0,1001\(\$at\) +[ ]*1a8: R_MIPS_LO16 .bss +0+01ac <[^>]*> lw \$a1,1005\(\$at\) +[ ]*1ac: R_MIPS_LO16 .bss +0+01b0 <[^>]*> lw \$at,0\(\$gp\) +[ ]*1b0: R_MIPS_GOT16 .data +0+01b4 <[^>]*> nop +0+01b8 <[^>]*> addu \$at,\$a1,\$at +0+01bc <[^>]*> lw \$a0,0\(\$at\) +[ ]*1bc: R_MIPS_LO16 .data +0+01c0 <[^>]*> lw \$a1,4\(\$at\) +[ ]*1c0: R_MIPS_LO16 .data +0+01c4 <[^>]*> lui \$at,0x0 +[ ]*1c4: R_MIPS_GOT_HI16 big_external_data_label +0+01c8 <[^>]*> addu \$at,\$at,\$gp +0+01cc <[^>]*> lw \$at,0\(\$at\) +[ ]*1cc: R_MIPS_GOT_LO16 big_external_data_label +0+01d0 <[^>]*> nop +0+01d4 <[^>]*> addu \$at,\$a1,\$at +0+01d8 <[^>]*> lw \$a0,0\(\$at\) +0+01dc <[^>]*> lw \$a1,4\(\$at\) +0+01e0 <[^>]*> lui \$at,0x0 +[ ]*1e0: R_MIPS_GOT_HI16 small_external_data_label +0+01e4 <[^>]*> addu \$at,\$at,\$gp +0+01e8 <[^>]*> lw \$at,0\(\$at\) +[ ]*1e8: R_MIPS_GOT_LO16 small_external_data_label +0+01ec <[^>]*> nop +0+01f0 <[^>]*> addu \$at,\$a1,\$at +0+01f4 <[^>]*> lw \$a0,0\(\$at\) +0+01f8 <[^>]*> lw \$a1,4\(\$at\) +0+01fc <[^>]*> lui \$at,0x0 +[ ]*1fc: R_MIPS_GOT_HI16 big_external_common +0+0200 <[^>]*> addu \$at,\$at,\$gp +0+0204 <[^>]*> lw \$at,0\(\$at\) +[ ]*204: R_MIPS_GOT_LO16 big_external_common +0+0208 <[^>]*> nop +0+020c <[^>]*> addu \$at,\$a1,\$at +0+0210 <[^>]*> lw \$a0,0\(\$at\) +0+0214 <[^>]*> lw \$a1,4\(\$at\) +0+0218 <[^>]*> lui \$at,0x0 +[ ]*218: R_MIPS_GOT_HI16 small_external_common +0+021c <[^>]*> addu \$at,\$at,\$gp +0+0220 <[^>]*> lw \$at,0\(\$at\) +[ ]*220: R_MIPS_GOT_LO16 small_external_common +0+0224 <[^>]*> nop +0+0228 <[^>]*> addu \$at,\$a1,\$at +0+022c <[^>]*> lw \$a0,0\(\$at\) +0+0230 <[^>]*> lw \$a1,4\(\$at\) +0+0234 <[^>]*> lw \$at,0\(\$gp\) +[ ]*234: R_MIPS_GOT16 .bss +0+0238 <[^>]*> nop +0+023c <[^>]*> addu \$at,\$a1,\$at +0+0240 <[^>]*> lw \$a0,0\(\$at\) +[ ]*240: R_MIPS_LO16 .bss +0+0244 <[^>]*> lw \$a1,4\(\$at\) +[ ]*244: R_MIPS_LO16 .bss +0+0248 <[^>]*> lw \$at,0\(\$gp\) +[ ]*248: R_MIPS_GOT16 .bss +0+024c <[^>]*> nop +0+0250 <[^>]*> addu \$at,\$a1,\$at +0+0254 <[^>]*> lw \$a0,1000\(\$at\) +[ ]*254: R_MIPS_LO16 .bss +0+0258 <[^>]*> lw \$a1,1004\(\$at\) +[ ]*258: R_MIPS_LO16 .bss +0+025c <[^>]*> lw \$at,0\(\$gp\) +[ ]*25c: R_MIPS_GOT16 .data +0+0260 <[^>]*> nop +0+0264 <[^>]*> addu \$at,\$a1,\$at +0+0268 <[^>]*> lw \$a0,1\(\$at\) +[ ]*268: R_MIPS_LO16 .data +0+026c <[^>]*> lw \$a1,5\(\$at\) +[ ]*26c: R_MIPS_LO16 .data +0+0270 <[^>]*> lui \$at,0x0 +[ ]*270: R_MIPS_GOT_HI16 big_external_data_label +0+0274 <[^>]*> addu \$at,\$at,\$gp +0+0278 <[^>]*> lw \$at,0\(\$at\) +[ ]*278: R_MIPS_GOT_LO16 big_external_data_label +0+027c <[^>]*> nop +0+0280 <[^>]*> addu \$at,\$a1,\$at +0+0284 <[^>]*> lw \$a0,1\(\$at\) +0+0288 <[^>]*> lw \$a1,5\(\$at\) +0+028c <[^>]*> lui \$at,0x0 +[ ]*28c: R_MIPS_GOT_HI16 small_external_data_label +0+0290 <[^>]*> addu \$at,\$at,\$gp +0+0294 <[^>]*> lw \$at,0\(\$at\) +[ ]*294: R_MIPS_GOT_LO16 small_external_data_label +0+0298 <[^>]*> nop +0+029c <[^>]*> addu \$at,\$a1,\$at +0+02a0 <[^>]*> lw \$a0,1\(\$at\) +0+02a4 <[^>]*> lw \$a1,5\(\$at\) +0+02a8 <[^>]*> lui \$at,0x0 +[ ]*2a8: R_MIPS_GOT_HI16 big_external_common +0+02ac <[^>]*> addu \$at,\$at,\$gp +0+02b0 <[^>]*> lw \$at,0\(\$at\) +[ ]*2b0: R_MIPS_GOT_LO16 big_external_common +0+02b4 <[^>]*> nop +0+02b8 <[^>]*> addu \$at,\$a1,\$at +0+02bc <[^>]*> lw \$a0,1\(\$at\) +0+02c0 <[^>]*> lw \$a1,5\(\$at\) +0+02c4 <[^>]*> lui \$at,0x0 +[ ]*2c4: R_MIPS_GOT_HI16 small_external_common +0+02c8 <[^>]*> addu \$at,\$at,\$gp +0+02cc <[^>]*> lw \$at,0\(\$at\) +[ ]*2cc: R_MIPS_GOT_LO16 small_external_common +0+02d0 <[^>]*> nop +0+02d4 <[^>]*> addu \$at,\$a1,\$at +0+02d8 <[^>]*> lw \$a0,1\(\$at\) +0+02dc <[^>]*> lw \$a1,5\(\$at\) +0+02e0 <[^>]*> lw \$at,0\(\$gp\) +[ ]*2e0: R_MIPS_GOT16 .bss +0+02e4 <[^>]*> nop +0+02e8 <[^>]*> addu \$at,\$a1,\$at +0+02ec <[^>]*> lw \$a0,1\(\$at\) +[ ]*2ec: R_MIPS_LO16 .bss +0+02f0 <[^>]*> lw \$a1,5\(\$at\) +[ ]*2f0: R_MIPS_LO16 .bss +0+02f4 <[^>]*> lw \$at,0\(\$gp\) +[ ]*2f4: R_MIPS_GOT16 .bss +0+02f8 <[^>]*> nop +0+02fc <[^>]*> addu \$at,\$a1,\$at +0+0300 <[^>]*> lw \$a0,1001\(\$at\) +[ ]*300: R_MIPS_LO16 .bss +0+0304 <[^>]*> lw \$a1,1005\(\$at\) +[ ]*304: R_MIPS_LO16 .bss + ... diff --git a/gas/testsuite/gas/mips/ld.d b/gas/testsuite/gas/mips/ld.d new file mode 100644 index 0000000..5489cf1 --- /dev/null +++ b/gas/testsuite/gas/mips/ld.d @@ -0,0 +1,639 @@ +#objdump: -dr --prefix-addresses -mmips:4000 +#as: -mcpu=r4000 +#name: MIPS ld + +# Test the ld macro. + +.*: +file format .*mips.* + +Disassembly of section .text: +0+0000 <[^>]*> lw \$a0,0\(\$zero\) +0+0004 <[^>]*> lw \$a1,4\(\$zero\) +0+0008 <[^>]*> lw \$a0,1\(\$zero\) +0+000c <[^>]*> lw \$a1,5\(\$zero\) +0+0010 <[^>]*> lui \$at,0x1 +0+0014 <[^>]*> lw \$a0,-32768\(\$at\) +0+0018 <[^>]*> lw \$a1,-32764\(\$at\) +0+001c <[^>]*> lw \$a0,-32768\(\$zero\) +0+0020 <[^>]*> lw \$a1,-32764\(\$zero\) +0+0024 <[^>]*> lui \$at,0x1 +0+0028 <[^>]*> lw \$a0,0\(\$at\) +0+002c <[^>]*> lw \$a1,4\(\$at\) +0+0030 <[^>]*> lui \$at,0x2 +0+0034 <[^>]*> lw \$a0,-23131\(\$at\) +0+0038 <[^>]*> lw \$a1,-23127\(\$at\) +0+003c <[^>]*> nop +0+0040 <[^>]*> lw \$a0,0\(\$a1\) +0+0044 <[^>]*> lw \$a1,4\(\$a1\) +0+0048 <[^>]*> nop +0+004c <[^>]*> lw \$a0,1\(\$a1\) +0+0050 <[^>]*> lw \$a1,5\(\$a1\) +0+0054 <[^>]*> lui \$at,0x1 +0+0058 <[^>]*> addu \$at,\$a1,\$at +0+005c <[^>]*> lw \$a0,-32768\(\$at\) +0+0060 <[^>]*> lw \$a1,-32764\(\$at\) +0+0064 <[^>]*> nop +0+0068 <[^>]*> lw \$a0,-32768\(\$a1\) +0+006c <[^>]*> lw \$a1,-32764\(\$a1\) +0+0070 <[^>]*> lui \$at,0x1 +0+0074 <[^>]*> addu \$at,\$a1,\$at +0+0078 <[^>]*> lw \$a0,0\(\$at\) +0+007c <[^>]*> lw \$a1,4\(\$at\) +0+0080 <[^>]*> lui \$at,0x2 +0+0084 <[^>]*> addu \$at,\$a1,\$at +0+0088 <[^>]*> lw \$a0,-23131\(\$at\) +0+008c <[^>]*> lw \$a1,-23127\(\$at\) +0+0090 <[^>]*> lui \$at,0x0 +[ ]*90: [A-Z0-9_]*HI[A-Z0-9_]* .data.* +0+0094 <[^>]*> lw \$a0,[-0-9]+\(\$at\) +[ ]*94: [A-Z0-9_]*LO[A-Z0-9_]* .data.* +0+0098 <[^>]*> lw \$a1,[-0-9]+\(\$at\) +[ ]*98: [A-Z0-9_]*LO[A-Z0-9_]* .data.* +0+009c <[^>]*> lui \$at,0x0 +[ ]*9c: [A-Z0-9_]*HI[A-Z0-9_]* big_external_data_label +0+00a0 <[^>]*> lw \$a0,0\(\$at\) +[ ]*a0: [A-Z0-9_]*LO[A-Z0-9_]* big_external_data_label +0+00a4 <[^>]*> lw \$a1,[-0-9]+\(\$at\) +[ ]*a4: [A-Z0-9_]*LO[A-Z0-9_]* big_external_data_label +0+00a8 <[^>]*> lw \$a0,0\(\$gp\) +[ ]*a8: [A-Z0-9_]*GPREL[A-Z0-9_]* small_external_data_label +0+00ac <[^>]*> lw \$a1,[-0-9]+\(\$gp\) +[ ]*ac: [A-Z0-9_]*GPREL[A-Z0-9_]* small_external_data_label +0+00b0 <[^>]*> lui \$at,0x0 +[ ]*b0: [A-Z0-9_]*HI[A-Z0-9_]* big_external_common +0+00b4 <[^>]*> lw \$a0,0\(\$at\) +[ ]*b4: [A-Z0-9_]*LO[A-Z0-9_]* big_external_common +0+00b8 <[^>]*> lw \$a1,[-0-9]+\(\$at\) +[ ]*b8: [A-Z0-9_]*LO[A-Z0-9_]* big_external_common +0+00bc <[^>]*> lw \$a0,0\(\$gp\) +[ ]*bc: [A-Z0-9_]*GPREL[A-Z0-9_]* small_external_common +0+00c0 <[^>]*> lw \$a1,[-0-9]+\(\$gp\) +[ ]*c0: [A-Z0-9_]*GPREL[A-Z0-9_]* small_external_common +0+00c4 <[^>]*> lui \$at,0x0 +[ ]*c4: [A-Z0-9_]*HI[A-Z0-9_]* .bss.* +0+00c8 <[^>]*> lw \$a0,[-0-9]+\(\$at\) +[ ]*c8: [A-Z0-9_]*LO[A-Z0-9_]* .bss.* +0+00cc <[^>]*> lw \$a1,[-0-9]+\(\$at\) +[ ]*cc: [A-Z0-9_]*LO[A-Z0-9_]* .bss.* +0+00d0 <[^>]*> lw \$a0,[-0-9]+\(\$gp\) +[ ]*d0: [A-Z0-9_]*GPREL[A-Z0-9_]* .sbss.* +0+00d4 <[^>]*> lw \$a1,[-0-9]+\(\$gp\) +[ ]*d4: [A-Z0-9_]*GPREL[A-Z0-9_]* .sbss.* +0+00d8 <[^>]*> lui \$at,0x0 +[ ]*d8: [A-Z0-9_]*HI[A-Z0-9_]* .data.* +0+00dc <[^>]*> lw \$a0,[-0-9]+\(\$at\) +[ ]*dc: [A-Z0-9_]*LO[A-Z0-9_]* .data.* +0+00e0 <[^>]*> lw \$a1,[-0-9]+\(\$at\) +[ ]*e0: [A-Z0-9_]*LO[A-Z0-9_]* .data.* +0+00e4 <[^>]*> lui \$at,0x0 +[ ]*e4: [A-Z0-9_]*HI[A-Z0-9_]* big_external_data_label +0+00e8 <[^>]*> lw \$a0,[-0-9]+\(\$at\) +[ ]*e8: [A-Z0-9_]*LO[A-Z0-9_]* big_external_data_label +0+00ec <[^>]*> lw \$a1,[-0-9]+\(\$at\) +[ ]*ec: [A-Z0-9_]*LO[A-Z0-9_]* big_external_data_label +0+00f0 <[^>]*> lw \$a0,1\(\$gp\) +[ ]*f0: [A-Z0-9_]*GPREL[A-Z0-9_]* small_external_data_label +0+00f4 <[^>]*> lw \$a1,5\(\$gp\) +[ ]*f4: [A-Z0-9_]*GPREL[A-Z0-9_]* small_external_data_label +0+00f8 <[^>]*> lui \$at,0x0 +[ ]*f8: [A-Z0-9_]*HI[A-Z0-9_]* big_external_common +0+00fc <[^>]*> lw \$a0,[-0-9]+\(\$at\) +[ ]*fc: [A-Z0-9_]*LO[A-Z0-9_]* big_external_common +0+0100 <[^>]*> lw \$a1,[-0-9]+\(\$at\) +[ ]*100: [A-Z0-9_]*LO[A-Z0-9_]* big_external_common +0+0104 <[^>]*> lw \$a0,1\(\$gp\) +[ ]*104: [A-Z0-9_]*GPREL[A-Z0-9_]* small_external_common +0+0108 <[^>]*> lw \$a1,5\(\$gp\) +[ ]*108: [A-Z0-9_]*GPREL[A-Z0-9_]* small_external_common +0+010c <[^>]*> lui \$at,0x0 +[ ]*10c: [A-Z0-9_]*HI[A-Z0-9_]* .bss.* +0+0110 <[^>]*> lw \$a0,[-0-9]+\(\$at\) +[ ]*110: [A-Z0-9_]*LO[A-Z0-9_]* .bss.* +0+0114 <[^>]*> lw \$a1,[-0-9]+\(\$at\) +[ ]*114: [A-Z0-9_]*LO[A-Z0-9_]* .bss.* +0+0118 <[^>]*> lw \$a0,[-0-9]+\(\$gp\) +[ ]*118: [A-Z0-9_]*GPREL[A-Z0-9_]* .sbss.* +0+011c <[^>]*> lw \$a1,[-0-9]+\(\$gp\) +[ ]*11c: [A-Z0-9_]*GPREL[A-Z0-9_]* .sbss.* +0+0120 <[^>]*> lui \$at,[-0-9x]+ +[ ]*120: [A-Z0-9_]*HI[A-Z0-9_]* .data.* +0+0124 <[^>]*> lw \$a0,[-0-9]+\(\$at\) +[ ]*124: [A-Z0-9_]*LO[A-Z0-9_]* .data.* +0+0128 <[^>]*> lw \$a1,[-0-9]+\(\$at\) +[ ]*128: [A-Z0-9_]*LO[A-Z0-9_]* .data.* +0+012c <[^>]*> lui \$at,[-0-9x]+ +[ ]*12c: [A-Z0-9_]*HI[A-Z0-9_]* big_external_data_label +0+0130 <[^>]*> lw \$a0,[-0-9]+\(\$at\) +[ ]*130: [A-Z0-9_]*LO[A-Z0-9_]* big_external_data_label +0+0134 <[^>]*> lw \$a1,[-0-9]+\(\$at\) +[ ]*134: [A-Z0-9_]*LO[A-Z0-9_]* big_external_data_label +0+0138 <[^>]*> lui \$at,[-0-9x]+ +[ ]*138: [A-Z0-9_]*HI[A-Z0-9_]* small_external_data_label +0+013c <[^>]*> lw \$a0,[-0-9]+\(\$at\) +[ ]*13c: [A-Z0-9_]*LO[A-Z0-9_]* small_external_data_label +0+0140 <[^>]*> lw \$a1,[-0-9]+\(\$at\) +[ ]*140: [A-Z0-9_]*LO[A-Z0-9_]* small_external_data_label +0+0144 <[^>]*> lui \$at,[-0-9x]+ +[ ]*144: [A-Z0-9_]*HI[A-Z0-9_]* big_external_common +0+0148 <[^>]*> lw \$a0,[-0-9]+\(\$at\) +[ ]*148: [A-Z0-9_]*LO[A-Z0-9_]* big_external_common +0+014c <[^>]*> lw \$a1,[-0-9]+\(\$at\) +[ ]*14c: [A-Z0-9_]*LO[A-Z0-9_]* big_external_common +0+0150 <[^>]*> lui \$at,[-0-9x]+ +[ ]*150: [A-Z0-9_]*HI[A-Z0-9_]* small_external_common +0+0154 <[^>]*> lw \$a0,[-0-9]+\(\$at\) +[ ]*154: [A-Z0-9_]*LO[A-Z0-9_]* small_external_common +0+0158 <[^>]*> lw \$a1,[-0-9]+\(\$at\) +[ ]*158: [A-Z0-9_]*LO[A-Z0-9_]* small_external_common +0+015c <[^>]*> lui \$at,[-0-9x]+ +[ ]*15c: [A-Z0-9_]*HI[A-Z0-9_]* .bss.* +0+0160 <[^>]*> lw \$a0,[-0-9]+\(\$at\) +[ ]*160: [A-Z0-9_]*LO[A-Z0-9_]* .bss.* +0+0164 <[^>]*> lw \$a1,[-0-9]+\(\$at\) +[ ]*164: [A-Z0-9_]*LO[A-Z0-9_]* .bss.* +0+0168 <[^>]*> lui \$at,[-0-9x]+ +[ ]*168: [A-Z0-9_]*HI[A-Z0-9_]* .sbss.* +0+016c <[^>]*> lw \$a0,[-0-9]+\(\$at\) +[ ]*16c: [A-Z0-9_]*LO[A-Z0-9_]* .sbss.* +0+0170 <[^>]*> lw \$a1,[-0-9]+\(\$at\) +[ ]*170: [A-Z0-9_]*LO[A-Z0-9_]* .sbss.* +0+0174 <[^>]*> lui \$at,0x0 +[ ]*174: [A-Z0-9_]*HI[A-Z0-9_]* .data.* +0+0178 <[^>]*> lw \$a0,[-0-9]+\(\$at\) +[ ]*178: [A-Z0-9_]*LO[A-Z0-9_]* .data.* +0+017c <[^>]*> lw \$a1,[-0-9]+\(\$at\) +[ ]*17c: [A-Z0-9_]*LO[A-Z0-9_]* .data.* +0+0180 <[^>]*> lui \$at,0x0 +[ ]*180: [A-Z0-9_]*HI[A-Z0-9_]* big_external_data_label +0+0184 <[^>]*> lw \$a0,[-0-9]+\(\$at\) +[ ]*184: [A-Z0-9_]*LO[A-Z0-9_]* big_external_data_label +0+0188 <[^>]*> lw \$a1,[-0-9]+\(\$at\) +[ ]*188: [A-Z0-9_]*LO[A-Z0-9_]* big_external_data_label +0+018c <[^>]*> lui \$at,0x0 +[ ]*18c: [A-Z0-9_]*HI[A-Z0-9_]* small_external_data_label +0+0190 <[^>]*> lw \$a0,[-0-9]+\(\$at\) +[ ]*190: [A-Z0-9_]*LO[A-Z0-9_]* small_external_data_label +0+0194 <[^>]*> lw \$a1,[-0-9]+\(\$at\) +[ ]*194: [A-Z0-9_]*LO[A-Z0-9_]* small_external_data_label +0+0198 <[^>]*> lui \$at,0x0 +[ ]*198: [A-Z0-9_]*HI[A-Z0-9_]* big_external_common +0+019c <[^>]*> lw \$a0,[-0-9]+\(\$at\) +[ ]*19c: [A-Z0-9_]*LO[A-Z0-9_]* big_external_common +0+01a0 <[^>]*> lw \$a1,[-0-9]+\(\$at\) +[ ]*1a0: [A-Z0-9_]*LO[A-Z0-9_]* big_external_common +0+01a4 <[^>]*> lui \$at,0x0 +[ ]*1a4: [A-Z0-9_]*HI[A-Z0-9_]* small_external_common +0+01a8 <[^>]*> lw \$a0,[-0-9]+\(\$at\) +[ ]*1a8: [A-Z0-9_]*LO[A-Z0-9_]* small_external_common +0+01ac <[^>]*> lw \$a1,[-0-9]+\(\$at\) +[ ]*1ac: [A-Z0-9_]*LO[A-Z0-9_]* small_external_common +0+01b0 <[^>]*> lui \$at,0x0 +[ ]*1b0: [A-Z0-9_]*HI[A-Z0-9_]* .bss.* +0+01b4 <[^>]*> lw \$a0,[-0-9]+\(\$at\) +[ ]*1b4: [A-Z0-9_]*LO[A-Z0-9_]* .bss.* +0+01b8 <[^>]*> lw \$a1,[-0-9]+\(\$at\) +[ ]*1b8: [A-Z0-9_]*LO[A-Z0-9_]* .bss.* +0+01bc <[^>]*> lui \$at,0x0 +[ ]*1bc: [A-Z0-9_]*HI[A-Z0-9_]* .sbss.* +0+01c0 <[^>]*> lw \$a0,[-0-9]+\(\$at\) +[ ]*1c0: [A-Z0-9_]*LO[A-Z0-9_]* .sbss.* +0+01c4 <[^>]*> lw \$a1,[-0-9]+\(\$at\) +[ ]*1c4: [A-Z0-9_]*LO[A-Z0-9_]* .sbss.* +0+01c8 <[^>]*> lui \$at,[-0-9x]+ +[ ]*1c8: [A-Z0-9_]*HI[A-Z0-9_]* .data.* +0+01cc <[^>]*> lw \$a0,[-0-9]+\(\$at\) +[ ]*1cc: [A-Z0-9_]*LO[A-Z0-9_]* .data.* +0+01d0 <[^>]*> lw \$a1,[-0-9]+\(\$at\) +[ ]*1d0: [A-Z0-9_]*LO[A-Z0-9_]* .data.* +0+01d4 <[^>]*> lui \$at,[-0-9x]+ +[ ]*1d4: [A-Z0-9_]*HI[A-Z0-9_]* big_external_data_label +0+01d8 <[^>]*> lw \$a0,0\(\$at\) +[ ]*1d8: [A-Z0-9_]*LO[A-Z0-9_]* big_external_data_label +0+01dc <[^>]*> lw \$a1,[-0-9]+\(\$at\) +[ ]*1dc: [A-Z0-9_]*LO[A-Z0-9_]* big_external_data_label +0+01e0 <[^>]*> lui \$at,[-0-9x]+ +[ ]*1e0: [A-Z0-9_]*HI[A-Z0-9_]* small_external_data_label +0+01e4 <[^>]*> lw \$a0,0\(\$at\) +[ ]*1e4: [A-Z0-9_]*LO[A-Z0-9_]* small_external_data_label +0+01e8 <[^>]*> lw \$a1,[-0-9]+\(\$at\) +[ ]*1e8: [A-Z0-9_]*LO[A-Z0-9_]* small_external_data_label +0+01ec <[^>]*> lui \$at,[-0-9x]+ +[ ]*1ec: [A-Z0-9_]*HI[A-Z0-9_]* big_external_common +0+01f0 <[^>]*> lw \$a0,0\(\$at\) +[ ]*1f0: [A-Z0-9_]*LO[A-Z0-9_]* big_external_common +0+01f4 <[^>]*> lw \$a1,[-0-9]+\(\$at\) +[ ]*1f4: [A-Z0-9_]*LO[A-Z0-9_]* big_external_common +0+01f8 <[^>]*> lui \$at,[-0-9x]+ +[ ]*1f8: [A-Z0-9_]*HI[A-Z0-9_]* small_external_common +0+01fc <[^>]*> lw \$a0,0\(\$at\) +[ ]*1fc: [A-Z0-9_]*LO[A-Z0-9_]* small_external_common +0+0200 <[^>]*> lw \$a1,[-0-9]+\(\$at\) +[ ]*200: [A-Z0-9_]*LO[A-Z0-9_]* small_external_common +0+0204 <[^>]*> lui \$at,[-0-9x]+ +[ ]*204: [A-Z0-9_]*HI[A-Z0-9_]* .bss.* +0+0208 <[^>]*> lw \$a0,[-0-9]+\(\$at\) +[ ]*208: [A-Z0-9_]*LO[A-Z0-9_]* .bss.* +0+020c <[^>]*> lw \$a1,[-0-9]+\(\$at\) +[ ]*20c: [A-Z0-9_]*LO[A-Z0-9_]* .bss.* +0+0210 <[^>]*> lui \$at,[-0-9x]+ +[ ]*210: [A-Z0-9_]*HI[A-Z0-9_]* .sbss.* +0+0214 <[^>]*> lw \$a0,[-0-9]+\(\$at\) +[ ]*214: [A-Z0-9_]*LO[A-Z0-9_]* .sbss.* +0+0218 <[^>]*> lw \$a1,[-0-9]+\(\$at\) +[ ]*218: [A-Z0-9_]*LO[A-Z0-9_]* .sbss.* +0+021c <[^>]*> lui \$at,[-0-9x]+ +[ ]*21c: [A-Z0-9_]*HI[A-Z0-9_]* .data.* +0+0220 <[^>]*> lw \$a0,[-0-9]+\(\$at\) +[ ]*220: [A-Z0-9_]*LO[A-Z0-9_]* .data.* +0+0224 <[^>]*> lw \$a1,[-0-9]+\(\$at\) +[ ]*224: [A-Z0-9_]*LO[A-Z0-9_]* .data.* +0+0228 <[^>]*> lui \$at,[-0-9x]+ +[ ]*228: [A-Z0-9_]*HI[A-Z0-9_]* big_external_data_label +0+022c <[^>]*> lw \$a0,[-0-9]+\(\$at\) +[ ]*22c: [A-Z0-9_]*LO[A-Z0-9_]* big_external_data_label +0+0230 <[^>]*> lw \$a1,[-0-9]+\(\$at\) +[ ]*230: [A-Z0-9_]*LO[A-Z0-9_]* big_external_data_label +0+0234 <[^>]*> lui \$at,[-0-9x]+ +[ ]*234: [A-Z0-9_]*HI[A-Z0-9_]* small_external_data_label +0+0238 <[^>]*> lw \$a0,[-0-9]+\(\$at\) +[ ]*238: [A-Z0-9_]*LO[A-Z0-9_]* small_external_data_label +0+023c <[^>]*> lw \$a1,[-0-9]+\(\$at\) +[ ]*23c: [A-Z0-9_]*LO[A-Z0-9_]* small_external_data_label +0+0240 <[^>]*> lui \$at,[-0-9x]+ +[ ]*240: [A-Z0-9_]*HI[A-Z0-9_]* big_external_common +0+0244 <[^>]*> lw \$a0,[-0-9]+\(\$at\) +[ ]*244: [A-Z0-9_]*LO[A-Z0-9_]* big_external_common +0+0248 <[^>]*> lw \$a1,[-0-9]+\(\$at\) +[ ]*248: [A-Z0-9_]*LO[A-Z0-9_]* big_external_common +0+024c <[^>]*> lui \$at,[-0-9x]+ +[ ]*24c: [A-Z0-9_]*HI[A-Z0-9_]* small_external_common +0+0250 <[^>]*> lw \$a0,[-0-9]+\(\$at\) +[ ]*250: [A-Z0-9_]*LO[A-Z0-9_]* small_external_common +0+0254 <[^>]*> lw \$a1,[-0-9]+\(\$at\) +[ ]*254: [A-Z0-9_]*LO[A-Z0-9_]* small_external_common +0+0258 <[^>]*> lui \$at,[-0-9x]+ +[ ]*258: [A-Z0-9_]*HI[A-Z0-9_]* .bss.* +0+025c <[^>]*> lw \$a0,[-0-9]+\(\$at\) +[ ]*25c: [A-Z0-9_]*LO[A-Z0-9_]* .bss.* +0+0260 <[^>]*> lw \$a1,[-0-9]+\(\$at\) +[ ]*260: [A-Z0-9_]*LO[A-Z0-9_]* .bss.* +0+0264 <[^>]*> lui \$at,[-0-9x]+ +[ ]*264: [A-Z0-9_]*HI[A-Z0-9_]* .sbss.* +0+0268 <[^>]*> lw \$a0,[-0-9]+\(\$at\) +[ ]*268: [A-Z0-9_]*LO[A-Z0-9_]* .sbss.* +0+026c <[^>]*> lw \$a1,[-0-9]+\(\$at\) +[ ]*26c: [A-Z0-9_]*LO[A-Z0-9_]* .sbss.* +0+0270 <[^>]*> lui \$at,0x0 +[ ]*270: [A-Z0-9_]*HI[A-Z0-9_]* .data.* +0+0274 <[^>]*> addu \$at,\$a1,\$at +0+0278 <[^>]*> lw \$a0,[-0-9]+\(\$at\) +[ ]*278: [A-Z0-9_]*LO[A-Z0-9_]* .data.* +0+027c <[^>]*> lw \$a1,[-0-9]+\(\$at\) +[ ]*27c: [A-Z0-9_]*LO[A-Z0-9_]* .data.* +0+0280 <[^>]*> lui \$at,0x0 +[ ]*280: [A-Z0-9_]*HI[A-Z0-9_]* big_external_data_label +0+0284 <[^>]*> addu \$at,\$a1,\$at +0+0288 <[^>]*> lw \$a0,0\(\$at\) +[ ]*288: [A-Z0-9_]*LO[A-Z0-9_]* big_external_data_label +0+028c <[^>]*> lw \$a1,[-0-9]+\(\$at\) +[ ]*28c: [A-Z0-9_]*LO[A-Z0-9_]* big_external_data_label +0+0290 <[^>]*> nop +0+0294 <[^>]*> addu \$at,\$a1,\$gp +0+0298 <[^>]*> lw \$a0,0\(\$at\) +[ ]*298: [A-Z0-9_]*GPREL[A-Z0-9_]* small_external_data_label +0+029c <[^>]*> lw \$a1,[-0-9]+\(\$at\) +[ ]*29c: [A-Z0-9_]*GPREL[A-Z0-9_]* small_external_data_label +0+02a0 <[^>]*> lui \$at,0x0 +[ ]*2a0: [A-Z0-9_]*HI[A-Z0-9_]* big_external_common +0+02a4 <[^>]*> addu \$at,\$a1,\$at +0+02a8 <[^>]*> lw \$a0,0\(\$at\) +[ ]*2a8: [A-Z0-9_]*LO[A-Z0-9_]* big_external_common +0+02ac <[^>]*> lw \$a1,[-0-9]+\(\$at\) +[ ]*2ac: [A-Z0-9_]*LO[A-Z0-9_]* big_external_common +0+02b0 <[^>]*> nop +0+02b4 <[^>]*> addu \$at,\$a1,\$gp +0+02b8 <[^>]*> lw \$a0,0\(\$at\) +[ ]*2b8: [A-Z0-9_]*GPREL[A-Z0-9_]* small_external_common +0+02bc <[^>]*> lw \$a1,[-0-9]+\(\$at\) +[ ]*2bc: [A-Z0-9_]*GPREL[A-Z0-9_]* small_external_common +0+02c0 <[^>]*> lui \$at,0x0 +[ ]*2c0: [A-Z0-9_]*HI[A-Z0-9_]* .bss.* +0+02c4 <[^>]*> addu \$at,\$a1,\$at +0+02c8 <[^>]*> lw \$a0,[-0-9]+\(\$at\) +[ ]*2c8: [A-Z0-9_]*LO[A-Z0-9_]* .bss.* +0+02cc <[^>]*> lw \$a1,[-0-9]+\(\$at\) +[ ]*2cc: [A-Z0-9_]*LO[A-Z0-9_]* .bss.* +0+02d0 <[^>]*> nop +0+02d4 <[^>]*> addu \$at,\$a1,\$gp +0+02d8 <[^>]*> lw \$a0,[-0-9]+\(\$at\) +[ ]*2d8: [A-Z0-9_]*GPREL[A-Z0-9_]* .sbss.* +0+02dc <[^>]*> lw \$a1,[-0-9]+\(\$at\) +[ ]*2dc: [A-Z0-9_]*GPREL[A-Z0-9_]* .sbss.* +0+02e0 <[^>]*> lui \$at,0x0 +[ ]*2e0: [A-Z0-9_]*HI[A-Z0-9_]* .data.* +0+02e4 <[^>]*> addu \$at,\$a1,\$at +0+02e8 <[^>]*> lw \$a0,[-0-9]+\(\$at\) +[ ]*2e8: [A-Z0-9_]*LO[A-Z0-9_]* .data.* +0+02ec <[^>]*> lw \$a1,[-0-9]+\(\$at\) +[ ]*2ec: [A-Z0-9_]*LO[A-Z0-9_]* .data.* +0+02f0 <[^>]*> lui \$at,0x0 +[ ]*2f0: [A-Z0-9_]*HI[A-Z0-9_]* big_external_data_label +0+02f4 <[^>]*> addu \$at,\$a1,\$at +0+02f8 <[^>]*> lw \$a0,[-0-9]+\(\$at\) +[ ]*2f8: [A-Z0-9_]*LO[A-Z0-9_]* big_external_data_label +0+02fc <[^>]*> lw \$a1,[-0-9]+\(\$at\) +[ ]*2fc: [A-Z0-9_]*LO[A-Z0-9_]* big_external_data_label +0+0300 <[^>]*> nop +0+0304 <[^>]*> addu \$at,\$a1,\$gp +0+0308 <[^>]*> lw \$a0,1\(\$at\) +[ ]*308: [A-Z0-9_]*GPREL[A-Z0-9_]* small_external_data_label +0+030c <[^>]*> lw \$a1,5\(\$at\) +[ ]*30c: [A-Z0-9_]*GPREL[A-Z0-9_]* small_external_data_label +0+0310 <[^>]*> lui \$at,0x0 +[ ]*310: [A-Z0-9_]*HI[A-Z0-9_]* big_external_common +0+0314 <[^>]*> addu \$at,\$a1,\$at +0+0318 <[^>]*> lw \$a0,[-0-9]+\(\$at\) +[ ]*318: [A-Z0-9_]*LO[A-Z0-9_]* big_external_common +0+031c <[^>]*> lw \$a1,[-0-9]+\(\$at\) +[ ]*31c: [A-Z0-9_]*LO[A-Z0-9_]* big_external_common +0+0320 <[^>]*> nop +0+0324 <[^>]*> addu \$at,\$a1,\$gp +0+0328 <[^>]*> lw \$a0,1\(\$at\) +[ ]*328: [A-Z0-9_]*GPREL[A-Z0-9_]* small_external_common +0+032c <[^>]*> lw \$a1,5\(\$at\) +[ ]*32c: [A-Z0-9_]*GPREL[A-Z0-9_]* small_external_common +0+0330 <[^>]*> lui \$at,0x0 +[ ]*330: [A-Z0-9_]*HI[A-Z0-9_]* .bss.* +0+0334 <[^>]*> addu \$at,\$a1,\$at +0+0338 <[^>]*> lw \$a0,[-0-9]+\(\$at\) +[ ]*338: [A-Z0-9_]*LO[A-Z0-9_]* .bss.* +0+033c <[^>]*> lw \$a1,[-0-9]+\(\$at\) +[ ]*33c: [A-Z0-9_]*LO[A-Z0-9_]* .bss.* +0+0340 <[^>]*> nop +0+0344 <[^>]*> addu \$at,\$a1,\$gp +0+0348 <[^>]*> lw \$a0,[-0-9]+\(\$at\) +[ ]*348: [A-Z0-9_]*GPREL[A-Z0-9_]* .sbss.* +0+034c <[^>]*> lw \$a1,[-0-9]+\(\$at\) +[ ]*34c: [A-Z0-9_]*GPREL[A-Z0-9_]* .sbss.* +0+0350 <[^>]*> lui \$at,[-0-9x]+ +[ ]*350: [A-Z0-9_]*HI[A-Z0-9_]* .data.* +0+0354 <[^>]*> addu \$at,\$a1,\$at +0+0358 <[^>]*> lw \$a0,[-0-9]+\(\$at\) +[ ]*358: [A-Z0-9_]*LO[A-Z0-9_]* .data.* +0+035c <[^>]*> lw \$a1,[-0-9]+\(\$at\) +[ ]*35c: [A-Z0-9_]*LO[A-Z0-9_]* .data.* +0+0360 <[^>]*> lui \$at,[-0-9x]+ +[ ]*360: [A-Z0-9_]*HI[A-Z0-9_]* big_external_data_label +0+0364 <[^>]*> addu \$at,\$a1,\$at +0+0368 <[^>]*> lw \$a0,[-0-9]+\(\$at\) +[ ]*368: [A-Z0-9_]*LO[A-Z0-9_]* big_external_data_label +0+036c <[^>]*> lw \$a1,[-0-9]+\(\$at\) +[ ]*36c: [A-Z0-9_]*LO[A-Z0-9_]* big_external_data_label +0+0370 <[^>]*> lui \$at,[-0-9x]+ +[ ]*370: [A-Z0-9_]*HI[A-Z0-9_]* small_external_data_label +0+0374 <[^>]*> addu \$at,\$a1,\$at +0+0378 <[^>]*> lw \$a0,[-0-9]+\(\$at\) +[ ]*378: [A-Z0-9_]*LO[A-Z0-9_]* small_external_data_label +0+037c <[^>]*> lw \$a1,[-0-9]+\(\$at\) +[ ]*37c: [A-Z0-9_]*LO[A-Z0-9_]* small_external_data_label +0+0380 <[^>]*> lui \$at,[-0-9x]+ +[ ]*380: [A-Z0-9_]*HI[A-Z0-9_]* big_external_common +0+0384 <[^>]*> addu \$at,\$a1,\$at +0+0388 <[^>]*> lw \$a0,[-0-9]+\(\$at\) +[ ]*388: [A-Z0-9_]*LO[A-Z0-9_]* big_external_common +0+038c <[^>]*> lw \$a1,[-0-9]+\(\$at\) +[ ]*38c: [A-Z0-9_]*LO[A-Z0-9_]* big_external_common +0+0390 <[^>]*> lui \$at,[-0-9x]+ +[ ]*390: [A-Z0-9_]*HI[A-Z0-9_]* small_external_common +0+0394 <[^>]*> addu \$at,\$a1,\$at +0+0398 <[^>]*> lw \$a0,[-0-9]+\(\$at\) +[ ]*398: [A-Z0-9_]*LO[A-Z0-9_]* small_external_common +0+039c <[^>]*> lw \$a1,[-0-9]+\(\$at\) +[ ]*39c: [A-Z0-9_]*LO[A-Z0-9_]* small_external_common +0+03a0 <[^>]*> lui \$at,[-0-9x]+ +[ ]*3a0: [A-Z0-9_]*HI[A-Z0-9_]* .bss.* +0+03a4 <[^>]*> addu \$at,\$a1,\$at +0+03a8 <[^>]*> lw \$a0,[-0-9]+\(\$at\) +[ ]*3a8: [A-Z0-9_]*LO[A-Z0-9_]* .bss.* +0+03ac <[^>]*> lw \$a1,[-0-9]+\(\$at\) +[ ]*3ac: [A-Z0-9_]*LO[A-Z0-9_]* .bss.* +0+03b0 <[^>]*> lui \$at,[-0-9x]+ +[ ]*3b0: [A-Z0-9_]*HI[A-Z0-9_]* .sbss.* +0+03b4 <[^>]*> addu \$at,\$a1,\$at +0+03b8 <[^>]*> lw \$a0,[-0-9]+\(\$at\) +[ ]*3b8: [A-Z0-9_]*LO[A-Z0-9_]* .sbss.* +0+03bc <[^>]*> lw \$a1,[-0-9]+\(\$at\) +[ ]*3bc: [A-Z0-9_]*LO[A-Z0-9_]* .sbss.* +0+03c0 <[^>]*> lui \$at,0x0 +[ ]*3c0: [A-Z0-9_]*HI[A-Z0-9_]* .data.* +0+03c4 <[^>]*> addu \$at,\$a1,\$at +0+03c8 <[^>]*> lw \$a0,[-0-9]+\(\$at\) +[ ]*3c8: [A-Z0-9_]*LO[A-Z0-9_]* .data.* +0+03cc <[^>]*> lw \$a1,[-0-9]+\(\$at\) +[ ]*3cc: [A-Z0-9_]*LO[A-Z0-9_]* .data.* +0+03d0 <[^>]*> lui \$at,0x0 +[ ]*3d0: [A-Z0-9_]*HI[A-Z0-9_]* big_external_data_label +0+03d4 <[^>]*> addu \$at,\$a1,\$at +0+03d8 <[^>]*> lw \$a0,[-0-9]+\(\$at\) +[ ]*3d8: [A-Z0-9_]*LO[A-Z0-9_]* big_external_data_label +0+03dc <[^>]*> lw \$a1,[-0-9]+\(\$at\) +[ ]*3dc: [A-Z0-9_]*LO[A-Z0-9_]* big_external_data_label +0+03e0 <[^>]*> lui \$at,0x0 +[ ]*3e0: [A-Z0-9_]*HI[A-Z0-9_]* small_external_data_label +0+03e4 <[^>]*> addu \$at,\$a1,\$at +0+03e8 <[^>]*> lw \$a0,[-0-9]+\(\$at\) +[ ]*3e8: [A-Z0-9_]*LO[A-Z0-9_]* small_external_data_label +0+03ec <[^>]*> lw \$a1,[-0-9]+\(\$at\) +[ ]*3ec: [A-Z0-9_]*LO[A-Z0-9_]* small_external_data_label +0+03f0 <[^>]*> lui \$at,0x0 +[ ]*3f0: [A-Z0-9_]*HI[A-Z0-9_]* big_external_common +0+03f4 <[^>]*> addu \$at,\$a1,\$at +0+03f8 <[^>]*> lw \$a0,[-0-9]+\(\$at\) +[ ]*3f8: [A-Z0-9_]*LO[A-Z0-9_]* big_external_common +0+03fc <[^>]*> lw \$a1,[-0-9]+\(\$at\) +[ ]*3fc: [A-Z0-9_]*LO[A-Z0-9_]* big_external_common +0+0400 <[^>]*> lui \$at,0x0 +[ ]*400: [A-Z0-9_]*HI[A-Z0-9_]* small_external_common +0+0404 <[^>]*> addu \$at,\$a1,\$at +0+0408 <[^>]*> lw \$a0,[-0-9]+\(\$at\) +[ ]*408: [A-Z0-9_]*LO[A-Z0-9_]* small_external_common +0+040c <[^>]*> lw \$a1,[-0-9]+\(\$at\) +[ ]*40c: [A-Z0-9_]*LO[A-Z0-9_]* small_external_common +0+0410 <[^>]*> lui \$at,0x0 +[ ]*410: [A-Z0-9_]*HI[A-Z0-9_]* .bss.* +0+0414 <[^>]*> addu \$at,\$a1,\$at +0+0418 <[^>]*> lw \$a0,[-0-9]+\(\$at\) +[ ]*418: [A-Z0-9_]*LO[A-Z0-9_]* .bss.* +0+041c <[^>]*> lw \$a1,[-0-9]+\(\$at\) +[ ]*41c: [A-Z0-9_]*LO[A-Z0-9_]* .bss.* +0+0420 <[^>]*> lui \$at,0x0 +[ ]*420: [A-Z0-9_]*HI[A-Z0-9_]* .sbss.* +0+0424 <[^>]*> addu \$at,\$a1,\$at +0+0428 <[^>]*> lw \$a0,[-0-9]+\(\$at\) +[ ]*428: [A-Z0-9_]*LO[A-Z0-9_]* .sbss.* +0+042c <[^>]*> lw \$a1,[-0-9]+\(\$at\) +[ ]*42c: [A-Z0-9_]*LO[A-Z0-9_]* .sbss.* +0+0430 <[^>]*> lui \$at,[-0-9x]+ +[ ]*430: [A-Z0-9_]*HI[A-Z0-9_]* .data.* +0+0434 <[^>]*> addu \$at,\$a1,\$at +0+0438 <[^>]*> lw \$a0,[-0-9]+\(\$at\) +[ ]*438: [A-Z0-9_]*LO[A-Z0-9_]* .data.* +0+043c <[^>]*> lw \$a1,[-0-9]+\(\$at\) +[ ]*43c: [A-Z0-9_]*LO[A-Z0-9_]* .data.* +0+0440 <[^>]*> lui \$at,[-0-9x]+ +[ ]*440: [A-Z0-9_]*HI[A-Z0-9_]* big_external_data_label +0+0444 <[^>]*> addu \$at,\$a1,\$at +0+0448 <[^>]*> lw \$a0,0\(\$at\) +[ ]*448: [A-Z0-9_]*LO[A-Z0-9_]* big_external_data_label +0+044c <[^>]*> lw \$a1,[-0-9]+\(\$at\) +[ ]*44c: [A-Z0-9_]*LO[A-Z0-9_]* big_external_data_label +0+0450 <[^>]*> lui \$at,[-0-9x]+ +[ ]*450: [A-Z0-9_]*HI[A-Z0-9_]* small_external_data_label +0+0454 <[^>]*> addu \$at,\$a1,\$at +0+0458 <[^>]*> lw \$a0,0\(\$at\) +[ ]*458: [A-Z0-9_]*LO[A-Z0-9_]* small_external_data_label +0+045c <[^>]*> lw \$a1,[-0-9]+\(\$at\) +[ ]*45c: [A-Z0-9_]*LO[A-Z0-9_]* small_external_data_label +0+0460 <[^>]*> lui \$at,[-0-9x]+ +[ ]*460: [A-Z0-9_]*HI[A-Z0-9_]* big_external_common +0+0464 <[^>]*> addu \$at,\$a1,\$at +0+0468 <[^>]*> lw \$a0,0\(\$at\) +[ ]*468: [A-Z0-9_]*LO[A-Z0-9_]* big_external_common +0+046c <[^>]*> lw \$a1,[-0-9]+\(\$at\) +[ ]*46c: [A-Z0-9_]*LO[A-Z0-9_]* big_external_common +0+0470 <[^>]*> lui \$at,[-0-9x]+ +[ ]*470: [A-Z0-9_]*HI[A-Z0-9_]* small_external_common +0+0474 <[^>]*> addu \$at,\$a1,\$at +0+0478 <[^>]*> lw \$a0,0\(\$at\) +[ ]*478: [A-Z0-9_]*LO[A-Z0-9_]* small_external_common +0+047c <[^>]*> lw \$a1,[-0-9]+\(\$at\) +[ ]*47c: [A-Z0-9_]*LO[A-Z0-9_]* small_external_common +0+0480 <[^>]*> lui \$at,[-0-9x]+ +[ ]*480: [A-Z0-9_]*HI[A-Z0-9_]* .bss.* +0+0484 <[^>]*> addu \$at,\$a1,\$at +0+0488 <[^>]*> lw \$a0,[-0-9]+\(\$at\) +[ ]*488: [A-Z0-9_]*LO[A-Z0-9_]* .bss.* +0+048c <[^>]*> lw \$a1,[-0-9]+\(\$at\) +[ ]*48c: [A-Z0-9_]*LO[A-Z0-9_]* .bss.* +0+0490 <[^>]*> lui \$at,[-0-9x]+ +[ ]*490: [A-Z0-9_]*HI[A-Z0-9_]* .sbss.* +0+0494 <[^>]*> addu \$at,\$a1,\$at +0+0498 <[^>]*> lw \$a0,[-0-9]+\(\$at\) +[ ]*498: [A-Z0-9_]*LO[A-Z0-9_]* .sbss.* +0+049c <[^>]*> lw \$a1,[-0-9]+\(\$at\) +[ ]*49c: [A-Z0-9_]*LO[A-Z0-9_]* .sbss.* +0+04a0 <[^>]*> lui \$at,[-0-9x]+ +[ ]*4a0: [A-Z0-9_]*HI[A-Z0-9_]* .data.* +0+04a4 <[^>]*> addu \$at,\$a1,\$at +0+04a8 <[^>]*> lw \$a0,[-0-9]+\(\$at\) +[ ]*4a8: [A-Z0-9_]*LO[A-Z0-9_]* .data.* +0+04ac <[^>]*> lw \$a1,[-0-9]+\(\$at\) +[ ]*4ac: [A-Z0-9_]*LO[A-Z0-9_]* .data.* +0+04b0 <[^>]*> lui \$at,[-0-9x]+ +[ ]*4b0: [A-Z0-9_]*HI[A-Z0-9_]* big_external_data_label +0+04b4 <[^>]*> addu \$at,\$a1,\$at +0+04b8 <[^>]*> lw \$a0,[-0-9]+\(\$at\) +[ ]*4b8: [A-Z0-9_]*LO[A-Z0-9_]* big_external_data_label +0+04bc <[^>]*> lw \$a1,[-0-9]+\(\$at\) +[ ]*4bc: [A-Z0-9_]*LO[A-Z0-9_]* big_external_data_label +0+04c0 <[^>]*> lui \$at,[-0-9x]+ +[ ]*4c0: [A-Z0-9_]*HI[A-Z0-9_]* small_external_data_label +0+04c4 <[^>]*> addu \$at,\$a1,\$at +0+04c8 <[^>]*> lw \$a0,[-0-9]+\(\$at\) +[ ]*4c8: [A-Z0-9_]*LO[A-Z0-9_]* small_external_data_label +0+04cc <[^>]*> lw \$a1,[-0-9]+\(\$at\) +[ ]*4cc: [A-Z0-9_]*LO[A-Z0-9_]* small_external_data_label +0+04d0 <[^>]*> lui \$at,[-0-9x]+ +[ ]*4d0: [A-Z0-9_]*HI[A-Z0-9_]* big_external_common +0+04d4 <[^>]*> addu \$at,\$a1,\$at +0+04d8 <[^>]*> lw \$a0,[-0-9]+\(\$at\) +[ ]*4d8: [A-Z0-9_]*LO[A-Z0-9_]* big_external_common +0+04dc <[^>]*> lw \$a1,[-0-9]+\(\$at\) +[ ]*4dc: [A-Z0-9_]*LO[A-Z0-9_]* big_external_common +0+04e0 <[^>]*> lui \$at,[-0-9x]+ +[ ]*4e0: [A-Z0-9_]*HI[A-Z0-9_]* small_external_common +0+04e4 <[^>]*> addu \$at,\$a1,\$at +0+04e8 <[^>]*> lw \$a0,[-0-9]+\(\$at\) +[ ]*4e8: [A-Z0-9_]*LO[A-Z0-9_]* small_external_common +0+04ec <[^>]*> lw \$a1,[-0-9]+\(\$at\) +[ ]*4ec: [A-Z0-9_]*LO[A-Z0-9_]* small_external_common +0+04f0 <[^>]*> lui \$at,[-0-9x]+ +[ ]*4f0: [A-Z0-9_]*HI[A-Z0-9_]* .bss.* +0+04f4 <[^>]*> addu \$at,\$a1,\$at +0+04f8 <[^>]*> lw \$a0,[-0-9]+\(\$at\) +[ ]*4f8: [A-Z0-9_]*LO[A-Z0-9_]* .bss.* +0+04fc <[^>]*> lw \$a1,[-0-9]+\(\$at\) +[ ]*4fc: [A-Z0-9_]*LO[A-Z0-9_]* .bss.* +0+0500 <[^>]*> lui \$at,[-0-9x]+ +[ ]*500: [A-Z0-9_]*HI[A-Z0-9_]* .sbss.* +0+0504 <[^>]*> addu \$at,\$a1,\$at +0+0508 <[^>]*> lw \$a0,[-0-9]+\(\$at\) +[ ]*508: [A-Z0-9_]*LO[A-Z0-9_]* .sbss.* +0+050c <[^>]*> lw \$a1,[-0-9]+\(\$at\) +[ ]*50c: [A-Z0-9_]*LO[A-Z0-9_]* .sbss.* +0+0510 <[^>]*> lwc1 \$f[45],0\(\$zero\) +0+0514 <[^>]*> lwc1 \$f[45],4\(\$zero\) +0+0518 <[^>]*> lwc1 \$f[45],1\(\$zero\) +0+051c <[^>]*> lwc1 \$f[45],5\(\$zero\) +0+0520 <[^>]*> lui \$at,0x1 +0+0524 <[^>]*> lwc1 \$f[45],-32768\(\$at\) +0+0528 <[^>]*> lwc1 \$f[45],-32764\(\$at\) +0+052c <[^>]*> lwc1 \$f[45],-32768\(\$zero\) +0+0530 <[^>]*> lwc1 \$f[45],-32764\(\$zero\) +0+0534 <[^>]*> lwc1 \$f[45],0\(\$a1\) +0+0538 <[^>]*> lwc1 \$f[45],4\(\$a1\) +0+053c <[^>]*> lwc1 \$f[45],1\(\$a1\) +0+0540 <[^>]*> lwc1 \$f[45],5\(\$a1\) +0+0544 <[^>]*> lui \$at,0x1 +0+0548 <[^>]*> addu \$at,\$a1,\$at +0+054c <[^>]*> lwc1 \$f[45],-32768\(\$at\) +0+0550 <[^>]*> lwc1 \$f[45],-32764\(\$at\) +0+0554 <[^>]*> lwc1 \$f[45],-32768\(\$a1\) +0+0558 <[^>]*> lwc1 \$f[45],-32764\(\$a1\) +0+055c <[^>]*> lui \$at,[-0-9x]+ +[ ]*55c: [A-Z0-9_]*HI[A-Z0-9_]* small_external_common +0+0560 <[^>]*> addu \$at,\$a1,\$at +0+0564 <[^>]*> lwc1 \$f[45],[-0-9]+\(\$at\) +[ ]*564: [A-Z0-9_]*LO[A-Z0-9_]* small_external_common +0+0568 <[^>]*> lwc1 \$f[45],[-0-9]+\(\$at\) +[ ]*568: [A-Z0-9_]*LO[A-Z0-9_]* small_external_common +0+056c <[^>]*> nop +0+0570 <[^>]*> swc1 \$f[45],0\(\$zero\) +0+0574 <[^>]*> swc1 \$f[45],4\(\$zero\) +0+0578 <[^>]*> swc1 \$f[45],1\(\$zero\) +0+057c <[^>]*> swc1 \$f[45],5\(\$zero\) +0+0580 <[^>]*> lui \$at,0x1 +0+0584 <[^>]*> swc1 \$f[45],-32768\(\$at\) +0+0588 <[^>]*> swc1 \$f[45],-32764\(\$at\) +0+058c <[^>]*> swc1 \$f[45],-32768\(\$zero\) +0+0590 <[^>]*> swc1 \$f[45],-32764\(\$zero\) +0+0594 <[^>]*> swc1 \$f[45],0\(\$a1\) +0+0598 <[^>]*> swc1 \$f[45],4\(\$a1\) +0+059c <[^>]*> swc1 \$f[45],1\(\$a1\) +0+05a0 <[^>]*> swc1 \$f[45],5\(\$a1\) +0+05a4 <[^>]*> lui \$at,0x1 +0+05a8 <[^>]*> addu \$at,\$a1,\$at +0+05ac <[^>]*> swc1 \$f[45],-32768\(\$at\) +0+05b0 <[^>]*> swc1 \$f[45],-32764\(\$at\) +0+05b4 <[^>]*> swc1 \$f[45],-32768\(\$a1\) +0+05b8 <[^>]*> swc1 \$f[45],-32764\(\$a1\) +0+05bc <[^>]*> lui \$at,[-0-9x]+ +[ ]*5bc: [A-Z0-9_]*HI[A-Z0-9_]* big_external_common +0+05c0 <[^>]*> addu \$at,\$a1,\$at +0+05c4 <[^>]*> swc1 \$f[45],[-0-9]+\(\$at\) +[ ]*5c4: [A-Z0-9_]*LO[A-Z0-9_]* big_external_common +0+05c8 <[^>]*> swc1 \$f[45],[-0-9]+\(\$at\) +[ ]*5c8: [A-Z0-9_]*LO[A-Z0-9_]* big_external_common +0+05cc <[^>]*> sw \$a0,0\(\$zero\) +0+05d0 <[^>]*> sw \$a1,4\(\$zero\) +0+05d4 <[^>]*> lui \$a0,[-0-9x]+ +[ ]*5d4: [A-Z0-9_]*HI[A-Z0-9_]* .bss.* +0+05d8 <[^>]*> daddu \$a0,\$a0,\$a1 +0+05dc <[^>]*> ld \$a0,[-0-9]+\(\$a0\) +[ ]*5dc: [A-Z0-9_]*LO[A-Z0-9_]* .bss.* +0+05e0 <[^>]*> lui \$at,[-0-9x]+ +[ ]*5e0: [A-Z0-9_]*HI[A-Z0-9_]* .sbss.* +0+05e4 <[^>]*> daddu \$at,\$at,\$a1 +0+05e8 <[^>]*> sd \$a0,[-0-9]+\(\$at\) +[ ]*5e8: [A-Z0-9_]*LO[A-Z0-9_]* .sbss.* +0+05ec <[^>]*> nop diff --git a/gas/testsuite/gas/mips/ld.s b/gas/testsuite/gas/mips/ld.s new file mode 100644 index 0000000..05ee3c0 --- /dev/null +++ b/gas/testsuite/gas/mips/ld.s @@ -0,0 +1,144 @@ +# Source file used to test the ld macro. + + .set mips1 + + .data +data_label: + .extern big_external_data_label,1000 + .extern small_external_data_label,1 + .comm big_external_common,1000 + .comm small_external_common,1 + .lcomm big_local_common,1000 + .lcomm small_local_common,1 + + .text + ld $4,0 + ld $4,1 + ld $4,0x8000 + ld $4,-0x8000 + ld $4,0x10000 + ld $4,0x1a5a5 + ld $4,0($5) + ld $4,1($5) + ld $4,0x8000($5) + ld $4,-0x8000($5) + ld $4,0x10000($5) + ld $4,0x1a5a5($5) + ld $4,data_label + ld $4,big_external_data_label + ld $4,small_external_data_label + ld $4,big_external_common + ld $4,small_external_common + ld $4,big_local_common + ld $4,small_local_common + ld $4,data_label+1 + ld $4,big_external_data_label+1 + ld $4,small_external_data_label+1 + ld $4,big_external_common+1 + ld $4,small_external_common+1 + ld $4,big_local_common+1 + ld $4,small_local_common+1 + ld $4,data_label+0x8000 + ld $4,big_external_data_label+0x8000 + ld $4,small_external_data_label+0x8000 + ld $4,big_external_common+0x8000 + ld $4,small_external_common+0x8000 + ld $4,big_local_common+0x8000 + ld $4,small_local_common+0x8000 + ld $4,data_label-0x8000 + ld $4,big_external_data_label-0x8000 + ld $4,small_external_data_label-0x8000 + ld $4,big_external_common-0x8000 + ld $4,small_external_common-0x8000 + ld $4,big_local_common-0x8000 + ld $4,small_local_common-0x8000 + ld $4,data_label+0x10000 + ld $4,big_external_data_label+0x10000 + ld $4,small_external_data_label+0x10000 + ld $4,big_external_common+0x10000 + ld $4,small_external_common+0x10000 + ld $4,big_local_common+0x10000 + ld $4,small_local_common+0x10000 + ld $4,data_label+0x1a5a5 + ld $4,big_external_data_label+0x1a5a5 + ld $4,small_external_data_label+0x1a5a5 + ld $4,big_external_common+0x1a5a5 + ld $4,small_external_common+0x1a5a5 + ld $4,big_local_common+0x1a5a5 + ld $4,small_local_common+0x1a5a5 + ld $4,data_label($5) + ld $4,big_external_data_label($5) + ld $4,small_external_data_label($5) + ld $4,big_external_common($5) + ld $4,small_external_common($5) + ld $4,big_local_common($5) + ld $4,small_local_common($5) + ld $4,data_label+1($5) + ld $4,big_external_data_label+1($5) + ld $4,small_external_data_label+1($5) + ld $4,big_external_common+1($5) + ld $4,small_external_common+1($5) + ld $4,big_local_common+1($5) + ld $4,small_local_common+1($5) + ld $4,data_label+0x8000($5) + ld $4,big_external_data_label+0x8000($5) + ld $4,small_external_data_label+0x8000($5) + ld $4,big_external_common+0x8000($5) + ld $4,small_external_common+0x8000($5) + ld $4,big_local_common+0x8000($5) + ld $4,small_local_common+0x8000($5) + ld $4,data_label-0x8000($5) + ld $4,big_external_data_label-0x8000($5) + ld $4,small_external_data_label-0x8000($5) + ld $4,big_external_common-0x8000($5) + ld $4,small_external_common-0x8000($5) + ld $4,big_local_common-0x8000($5) + ld $4,small_local_common-0x8000($5) + ld $4,data_label+0x10000($5) + ld $4,big_external_data_label+0x10000($5) + ld $4,small_external_data_label+0x10000($5) + ld $4,big_external_common+0x10000($5) + ld $4,small_external_common+0x10000($5) + ld $4,big_local_common+0x10000($5) + ld $4,small_local_common+0x10000($5) + ld $4,data_label+0x1a5a5($5) + ld $4,big_external_data_label+0x1a5a5($5) + ld $4,small_external_data_label+0x1a5a5($5) + ld $4,big_external_common+0x1a5a5($5) + ld $4,small_external_common+0x1a5a5($5) + ld $4,big_local_common+0x1a5a5($5) + ld $4,small_local_common+0x1a5a5($5) + +# l.d and s.d are sort of like ld. + l.d $f4,0 + l.d $f4,1 + l.d $f4,0x8000 + l.d $f4,-0x8000 + l.d $f4,0($5) + l.d $f4,1($5) + l.d $f4,0x8000($5) + l.d $f4,-0x8000($5) + l.d $f4,small_external_common+0x1a5a5($5) + # Little endian will insert a nop here. + # We put it in explicitly so that big and little endian are similar. + nop + s.d $f4,0 + s.d $f4,1 + s.d $f4,0x8000 + s.d $f4,-0x8000 + s.d $f4,0($5) + s.d $f4,1($5) + s.d $f4,0x8000($5) + s.d $f4,-0x8000($5) + s.d $f4,big_external_common+0x1a5a5($5) + +# sd is handled like ld. Sanity check it. + sd $4,0 + +# Sanity check the -mips3 versions + .set mips3 + ld $4,big_local_common+0x1a5a5($5) + sd $4,small_local_common+0x1a5a5($5) + +# Round to a 16 byte boundary, for ease in testing multiple targets. + nop diff --git a/gas/testsuite/gas/mips/li.d b/gas/testsuite/gas/mips/li.d new file mode 100644 index 0000000..0fe2b21 --- /dev/null +++ b/gas/testsuite/gas/mips/li.d @@ -0,0 +1,16 @@ +#objdump: -dr --prefix-addresses -mmips:4000 +#name: MIPS li + +# Test the li macro. + +.*: +file format .*mips.* + +Disassembly of section .text: +0+0000 <[^>]*> li \$a0,0 +0+0004 <[^>]*> li \$a0,1 +0+0008 <[^>]*> li \$a0,0x8000 +0+000c <[^>]*> li \$a0,-32768 +0+0010 <[^>]*> lui \$a0,0x1 +0+0014 <[^>]*> lui \$a0,0x1 +0+0018 <[^>]*> ori \$a0,\$a0,0xa5a5 +0+001c <[^>]*> nop diff --git a/gas/testsuite/gas/mips/li.s b/gas/testsuite/gas/mips/li.s new file mode 100644 index 0000000..9c3a601 --- /dev/null +++ b/gas/testsuite/gas/mips/li.s @@ -0,0 +1,12 @@ +# Source file used to test the li macro. + +foo: + li $4,0 + li $4,1 + li $4,0x8000 + li $4,-0x8000 + li $4,0x10000 + li $4,0x1a5a5 + +# Round to a 16 byte boundary, for ease in testing multiple targets. + nop diff --git a/gas/testsuite/gas/mips/lif-empic.d b/gas/testsuite/gas/mips/lif-empic.d new file mode 100644 index 0000000..b80dca3 --- /dev/null +++ b/gas/testsuite/gas/mips/lif-empic.d @@ -0,0 +1,24 @@ +#objdump: -dr --prefix-addresses -mmips:3000 +#name: MIPS lifloat-empic +#as: -mips1 -membedded-pic --defsym EMPIC=1 +#source: lifloat.s + +# Test the li.d and li.s macros with -membedded-pic. + +.*: +file format .*mips.* + +Disassembly of section .text: +0+0000 <[^>]*> addiu \$at,\$gp,-16384 +[ ]*0: [A-Z0-9_]*GPREL[A-Z0-9_]* .rdata.* +0+0004 <[^>]*> lw \$a0,0\(\$at\) +0+0008 <[^>]*> lw \$a1,4\(\$at\) +0+000c <[^>]*> lwc1 \$f[45],-16368\(\$gp\) +[ ]*c: [A-Z0-9_]*LITERAL[A-Z0-9_]* .lit8.* +0+0010 <[^>]*> lwc1 \$f[45],-16364\(\$gp\) +[ ]*10: [A-Z0-9_]*LITERAL[A-Z0-9_]* .lit8.* +0+0014 <[^>]*> lui \$a0,0x3f8f +0+0018 <[^>]*> ori \$a0,\$a0,0xcd36 +0+001c <[^>]*> lui \$at,0x3f8f +0+0020 <[^>]*> ori \$at,\$at,0xcd36 +0+0024 <[^>]*> mtc1 \$at,\$f4 + ... diff --git a/gas/testsuite/gas/mips/lif-svr4pic.d b/gas/testsuite/gas/mips/lif-svr4pic.d new file mode 100644 index 0000000..db09a7f --- /dev/null +++ b/gas/testsuite/gas/mips/lif-svr4pic.d @@ -0,0 +1,30 @@ +#objdump: -dr --prefix-addresses -mmips:3000 +#name: MIPS lifloat-svr4pic +#as: -mips1 -mcpu=r3000 -KPIC -EB --defsym SVR4=1 +#source: lifloat.s + +# Test the li.d and li.s macros with -KPIC. + +.*: +file format .*mips.* + +Disassembly of section .text: +0+0000 <[^>]*> lw \$at,0\(\$gp\) +[ ]*0: R_MIPS_GOT16 .rodata +0+0004 <[^>]*> nop +0+0008 <[^>]*> lw \$a0,0\(\$at\) +[ ]*8: R_MIPS_LO16 .rodata +0+000c <[^>]*> lw \$a1,4\(\$at\) +[ ]*c: R_MIPS_LO16 .rodata +0+0010 <[^>]*> lw \$at,0\(\$gp\) +[ ]*10: R_MIPS_GOT16 .rodata +0+0014 <[^>]*> nop +0+0018 <[^>]*> lwc1 \$f5,8\(\$at\) +[ ]*18: R_MIPS_LO16 .rodata +0+001c <[^>]*> lwc1 \$f4,12\(\$at\) +[ ]*1c: R_MIPS_LO16 .rodata +0+0020 <[^>]*> lui \$a0,0x3f8f +0+0024 <[^>]*> ori \$a0,\$a0,0xcd36 +0+0028 <[^>]*> lui \$at,0x3f8f +0+002c <[^>]*> ori \$at,\$at,0xcd36 +0+0030 <[^>]*> mtc1 \$at,\$f4 + ... diff --git a/gas/testsuite/gas/mips/lif-xgot.d b/gas/testsuite/gas/mips/lif-xgot.d new file mode 100644 index 0000000..7b86e2b --- /dev/null +++ b/gas/testsuite/gas/mips/lif-xgot.d @@ -0,0 +1,30 @@ +#objdump: -dr --prefix-addresses -mmips:3000 +#name: MIPS lifloat-xgot +#as: -mips1 -mcpu=r3000 -KPIC -xgot -EB --defsym XGOT=1 +#source: lifloat.s + +# Test the li.d and li.s macros with -KPIC -xgot. + +.*: +file format .*mips.* + +Disassembly of section .text: +0+0000 <[^>]*> lw \$at,0\(\$gp\) +[ ]*0: R_MIPS_GOT16 .rodata +0+0004 <[^>]*> nop +0+0008 <[^>]*> lw \$a0,0\(\$at\) +[ ]*8: R_MIPS_LO16 .rodata +0+000c <[^>]*> lw \$a1,4\(\$at\) +[ ]*c: R_MIPS_LO16 .rodata +0+0010 <[^>]*> lw \$at,0\(\$gp\) +[ ]*10: R_MIPS_GOT16 .rodata +0+0014 <[^>]*> nop +0+0018 <[^>]*> lwc1 \$f5,8\(\$at\) +[ ]*18: R_MIPS_LO16 .rodata +0+001c <[^>]*> lwc1 \$f4,12\(\$at\) +[ ]*1c: R_MIPS_LO16 .rodata +0+0020 <[^>]*> lui \$a0,0x3f8f +0+0024 <[^>]*> ori \$a0,\$a0,0xcd36 +0+0028 <[^>]*> lui \$at,0x3f8f +0+002c <[^>]*> ori \$at,\$at,0xcd36 +0+0030 <[^>]*> mtc1 \$at,\$f4 + ... diff --git a/gas/testsuite/gas/mips/lifloat.d b/gas/testsuite/gas/mips/lifloat.d new file mode 100644 index 0000000..e71b554 --- /dev/null +++ b/gas/testsuite/gas/mips/lifloat.d @@ -0,0 +1,23 @@ +#objdump: -dr --prefix-addresses -mmips:3000 +#name: MIPS lifloat +#as: -mips1 + +# Test the li.d and li.s macros. + +.*: +file format .*mips.* + +Disassembly of section .text: +0+0000 <[^>]*> lui \$at,0x0 +[ ]*0: [A-Z0-9_]*HI[A-Z0-9_]* .ro?data.* +0+0004 <[^>]*> lw \$a0,[-0-9]+\(\$at\) +[ ]*4: [A-Z0-9_]*LO[A-Z0-9_]* .ro?data.* +0+0008 <[^>]*> lw \$a1,[-0-9]+\(\$at\) +[ ]*8: [A-Z0-9_]*LO[A-Z0-9_]* .ro?data.* +0+000c <[^>]*> lwc1 \$f[45],[-0-9]+\(\$gp\) +[ ]*c: [A-Z0-9_]*LITERAL[A-Z0-9_]* .lit8.* +0+0010 <[^>]*> lwc1 \$f[45],[-0-9]+\(\$gp\) +[ ]*10: [A-Z0-9_]*LITERAL[A-Z0-9_]* .lit8.* +0+0014 <[^>]*> lui \$a0,0x3f8f +0+0018 <[^>]*> ori \$a0,\$a0,0xcd36 +0+001c <[^>]*> lwc1 \$f4,[-0-9]+\(\$gp\) +[ ]*1c: [A-Z0-9_]*LITERAL[A-Z0-9_]* .lit4.* diff --git a/gas/testsuite/gas/mips/lifloat.s b/gas/testsuite/gas/mips/lifloat.s new file mode 100644 index 0000000..3977f0e --- /dev/null +++ b/gas/testsuite/gas/mips/lifloat.s @@ -0,0 +1,24 @@ +# Source file used to test the li.d and li.s macros. + +foo: + li.d $4,1.12345 + li.d $f4,1.12345 + + li.s $4,1.12345 + li.s $f4,1.12345 + +# Round to a 16 byte boundary, for ease in testing multiple targets. + .ifdef SVR4 + nop + nop + nop + .endif + .ifdef XGOT + nop + nop + nop + .endif + .ifdef EMPIC + nop + nop + .endif diff --git a/gas/testsuite/gas/mips/lineno.d b/gas/testsuite/gas/mips/lineno.d new file mode 100644 index 0000000..d2a40f7 --- /dev/null +++ b/gas/testsuite/gas/mips/lineno.d @@ -0,0 +1,97 @@ +#objdump: -d -l -mmips:4000 +#name: assembly line numbers +#as: -g -mcpu=r4000 + + +.*: +file format .*mips.* + +Disassembly of section \.text: +0+0000 <main-0x10>: +.*[0-9a-f]+:.*deadbeef.* +.*[0-9a-f]+:.*deadbeef.* +.*[0-9a-f]+:.*deadbeef.* +.*[0-9a-f]+:.*deadbeef.* + +0+0010 <main>: +main\(\): +.*lineno.s:16 +.*10:.*addiu.* +.*lineno.s:17 +.*14:.*sd.* +.*lineno.s:18 +.*18:.*sd.* +.*lineno.s:19 +.*1c:.*move.* +.*lineno.s:20 +.*20:.*jal.* +.*24:.*nop +.*lineno.s:21 +.*28:.*li.* +.*lineno.s:22 +.*2c:.*sw.* +.*lineno.s:23 +.*30:.*lw.* +.*lineno.s:24 +.*34:.*move.* +.*lineno.s:25 +.*38:.*sll.* +.*lineno.s:26 +.*3c:.*addu.* +.*lineno.s:27 +.*40:.*sw.* +.*lineno.s:28 +.*44:.*lw.* +.*lineno.s:29 +.*48:.*jal.* +.*4c:.*nop +.*lineno.s:30 +.*50:.*lw.* +.*lineno.s:31 +.*54:.*move.* +.*lineno.s:32 +.*58:.*b.* +.*5c:.*nop + +0000000000000060 <\$L1>: +.*lineno.s:34 +.*60:.*move.* +.*lineno.s:35 +.*64:.*ld.* +.*lineno.s:36 +.*68:.*ld.* +.*lineno.s:37 +.*6c:.*addiu.* +.*lineno.s:38 +.*70:.*jr.* +.*74:.*nop + +0000000000000078 <g>: +g\(\): +.*lineno.s:47 +.*78:.*addiu.* +.*lineno.s:48 +.*7c:.*sd.* +.*lineno.s:49 +.*80:.*move.* +.*lineno.s:50 +.*84:.*sw.* +.*lineno.s:51 +.*88:.*lw.* +.*lineno.s:52 +.*8c:.*addiu.* +.*lineno.s:53 +.*90:.*move.* +.*lineno.s:54 +.*94:.*b.* +.*98:.*nop + +000000000000009c <\$L2>: +.*lineno.s:56 +.*9c:.*move.* +.*lineno.s:57 +.*a0:.*ld.* +.*lineno.s:58 +.*a4:.*addiu.* +.*lineno.s:59 +.*a8:.*jr.* +.*ac:.*nop diff --git a/gas/testsuite/gas/mips/lineno.s b/gas/testsuite/gas/mips/lineno.s new file mode 100644 index 0000000..531f331 --- /dev/null +++ b/gas/testsuite/gas/mips/lineno.s @@ -0,0 +1,60 @@ + .text + +# some data + .word 0xdeadbeef + .word 0xdeadbeef + .word 0xdeadbeef + .word 0xdeadbeef + +# some real code, compiled from a toy C program + .globl main + .ent main +main: + .frame $fp,32,$31 # vars= 16, regs= 2/0, args= 0, extra= 0 + .mask 0xc0000000,-8 + .fmask 0x00000000,0 + subu $sp,$sp,32 + sd $31,24($sp) + sd $fp,16($sp) + move $fp,$sp + jal __main + li $2,2 # 0x2 + sw $2,0($fp) + lw $2,0($fp) + move $3,$2 + sll $4,$3,1 + addu $2,$4,$2 + sw $2,4($fp) + lw $4,4($fp) + jal g + lw $3,0($fp) + move $2,$3 + b $L1 +$L1: + move $sp,$fp + ld $31,24($sp) + ld $fp,16($sp) + addu $sp,$sp,32 + j $31 + .end main + .align 2 + .globl g + .ent g +g: + .frame $fp,32,$31 # vars= 16, regs= 1/0, args= 0, extra= 0 + .mask 0x40000000,-16 + .fmask 0x00000000,0 + subu $sp,$sp,32 + sd $fp,16($sp) + move $fp,$sp + sw $4,0($fp) + lw $2,0($fp) + addu $3,$2,1 + move $2,$3 + b $L2 +$L2: + move $sp,$fp + ld $fp,16($sp) + addu $sp,$sp,32 + j $31 + .end g diff --git a/gas/testsuite/gas/mips/mips.exp b/gas/testsuite/gas/mips/mips.exp new file mode 100644 index 0000000..1b5269d --- /dev/null +++ b/gas/testsuite/gas/mips/mips.exp @@ -0,0 +1,102 @@ +# +# Some generic MIPS tests +# +if [istarget mips*-*-*] then { + set no_mips16 0 + set svr4pic [expr [istarget *-*-elf*] || [istarget *-*-irix5*] || [istarget *-*-irix6* ] ] + set empic [expr [istarget *-*-ecoff*] || [istarget *-*-ultrix*] || [istarget *-*-irix\[1-4\]*] ] + set aout [expr [istarget *-*-bsd*] || [istarget *-*-netbsd*] || [istarget *-*-openbsd*]] + set ilocks [istarget mipstx39*-*-*] + set gpr_ilocks [expr [istarget mipstx39*-*-*]] + set addr32 [expr [istarget mipstx39*-*-*]] + + + + + + run_dump_test "abs" + run_dump_test "add" + run_dump_test "and" + run_dump_test "break20" + run_dump_test "trap20" + run_dump_test "beq" + run_dump_test "bge" + run_dump_test "bgeu" + run_dump_test "blt" + run_dump_test "bltu" + if !$ilocks { run_dump_test "div" } else { run_dump_test "div-ilocks" } + run_dump_test "dli" + run_dump_test "jal" + if $svr4pic { run_dump_test "jal-svr4pic" } + if $svr4pic { run_dump_test "jal-xgot" } + if $empic { run_dump_test "jal-empic" } + if !$aout { run_dump_test "la" } + if $svr4pic { run_dump_test "la-svr4pic" } + if $svr4pic { run_dump_test "la-xgot" } + if $empic { run_dump_test "la-empic" } + if !$aout { run_dump_test "lb" } + if $svr4pic { run_dump_test "lb-svr4pic" } + if $svr4pic { + # Both versions specify the cpu, so we can run both regardless of + # the interlocking in the configured default cpu. + run_dump_test "lb-xgot" + run_dump_test "lb-xgot-ilocks" + } + if $empic { run_dump_test "lb-empic" } + if !$aout { + if !$gpr_ilocks { + run_dump_test "ld" + } else { + if !$addr32 { + run_dump_test "ld-ilocks" + } else { + run_dump_test "ld-ilocks-addr32" + } + } + } + if $svr4pic { run_dump_test "ld-svr4pic" } + if $svr4pic { run_dump_test "ld-xgot" } + if $empic { run_dump_test "ld-empic" } + run_dump_test "li" + if !$aout { run_dump_test "lifloat" } + if $svr4pic { run_dump_test "lif-svr4pic" } + if $svr4pic { run_dump_test "lif-xgot" } + if $empic { run_dump_test "lif-empic" } + run_dump_test "mips4" + if !$ilocks { run_dump_test "mul" } else { run_dump_test "mul-ilocks" } + run_dump_test "rol" + if !$aout { run_dump_test "sb" } + run_dump_test "trunc" + if !$aout { run_dump_test "ulh" } + if $svr4pic { run_dump_test "ulh-svr4pic" } + if $svr4pic { run_dump_test "ulh-xgot" } + if $empic { run_dump_test "ulh-empic" } + if !$aout { + run_dump_test "ulw" + run_dump_test "uld" + run_dump_test "ush" + run_dump_test "usw" + run_dump_test "usd" + } + # The mips16 test can only be run on ELF, because only ELF + # supports the necessary mips16 reloc. + if { $svr4pic && !$no_mips16 } { run_dump_test "mips16" } + run_dump_test "delay" + run_dump_test "nodelay" + run_dump_test "mips4010" + run_dump_test "mips4650" + run_dump_test "mips4100" + run_dump_test "lineno" + run_dump_test "sync" + + # Make sure that -mcpu=FOO and -mFOO are equivalent. Assemble a file + # containing 4650-specific instructions with -m4650 and -mcpu=4650, + # and verify that they're the same. Specifically, we're checking + # that the EF_MIPS_MACH field is set, and that the 4650 'mul' + # instruction does get used. In previous versions of GAS, + # only -mcpu=4650 would set the EF_MIPS_MACH field; -m4650 wouldn't. + run_dump_test "elf_e_flags1" + run_dump_test "elf_e_flags2" + run_dump_test "elf_e_flags3" + run_dump_test "elf_e_flags4" +} diff --git a/gas/testsuite/gas/mips/mips16.d b/gas/testsuite/gas/mips/mips16.d new file mode 100644 index 0000000..e4c1a0c --- /dev/null +++ b/gas/testsuite/gas/mips/mips16.d @@ -0,0 +1,683 @@ +#objdump: -dr -mmips:4000 +#as: -mips3 -mcpu=r4000 +#name: mips16 + +# Test the mips16 instruction set. + +.*: +file format .*mips.* + +Disassembly of section .text: + +0+000000 <data1>: + 0: 00000000 nop + +0+000004 <insns1>: + 4: 3b40 ld \$v0,0\(\$v1\) + 6: f000 3b41 ld \$v0,1\(\$v1\) + a: f000 3b42 ld \$v0,2\(\$v1\) + e: f000 3b43 ld \$v0,3\(\$v1\) + 12: f000 3b44 ld \$v0,4\(\$v1\) + 16: 3b41 ld \$v0,8\(\$v1\) + 18: 3b42 ld \$v0,16\(\$v1\) + 1a: 3b44 ld \$v0,32\(\$v1\) + 1c: 3b48 ld \$v0,64\(\$v1\) + 1e: 3b50 ld \$v0,128\(\$v1\) + 20: f100 3b40 ld \$v0,256\(\$v1\) + 24: f200 3b40 ld \$v0,512\(\$v1\) + 28: f400 3b40 ld \$v0,1024\(\$v1\) + 2c: f001 3b40 ld \$v0,2048\(\$v1\) + 30: f7ff 3b5f ld \$v0,-1\(\$v1\) + 34: f7ff 3b5e ld \$v0,-2\(\$v1\) + 38: f7ff 3b5d ld \$v0,-3\(\$v1\) + 3c: f7ff 3b5c ld \$v0,-4\(\$v1\) + 40: f7ff 3b58 ld \$v0,-8\(\$v1\) + 44: f7ff 3b50 ld \$v0,-16\(\$v1\) + 48: f7ff 3b40 ld \$v0,-32\(\$v1\) + 4c: f7df 3b40 ld \$v0,-64\(\$v1\) + 50: f79f 3b40 ld \$v0,-128\(\$v1\) + 54: f71f 3b40 ld \$v0,-256\(\$v1\) + 58: f61f 3b40 ld \$v0,-512\(\$v1\) + 5c: f41f 3b40 ld \$v0,-1024\(\$v1\) + 60: f01f 3b40 ld \$v0,-2048\(\$v1\) + 64: f7bf fc40 ld \$v0,0 <data1> + 68: f6a0 fc54 ld \$v0,71c <data2> + 6c: f001 fc40 ld \$v0,868 <bar> + 70: f0c1 fc40 ld \$v0,930 <quux> + 74: f840 ld \$v0,0\(\$sp\) + 76: f000 f841 ld \$v0,1\(\$sp\) + 7a: f000 f842 ld \$v0,2\(\$sp\) + 7e: f000 f843 ld \$v0,3\(\$sp\) + 82: f000 f844 ld \$v0,4\(\$sp\) + 86: f841 ld \$v0,8\(\$sp\) + 88: f842 ld \$v0,16\(\$sp\) + 8a: f844 ld \$v0,32\(\$sp\) + 8c: f848 ld \$v0,64\(\$sp\) + 8e: f850 ld \$v0,128\(\$sp\) + 90: f100 f840 ld \$v0,256\(\$sp\) + 94: f200 f840 ld \$v0,512\(\$sp\) + 98: f400 f840 ld \$v0,1024\(\$sp\) + 9c: f001 f840 ld \$v0,2048\(\$sp\) + a0: f7ff f85f ld \$v0,-1\(\$sp\) + a4: f7ff f85e ld \$v0,-2\(\$sp\) + a8: f7ff f85d ld \$v0,-3\(\$sp\) + ac: f7ff f85c ld \$v0,-4\(\$sp\) + b0: f7ff f858 ld \$v0,-8\(\$sp\) + b4: f7ff f850 ld \$v0,-16\(\$sp\) + b8: f7ff f840 ld \$v0,-32\(\$sp\) + bc: f7df f840 ld \$v0,-64\(\$sp\) + c0: f79f f840 ld \$v0,-128\(\$sp\) + c4: f71f f840 ld \$v0,-256\(\$sp\) + c8: f61f f840 ld \$v0,-512\(\$sp\) + cc: f41f f840 ld \$v0,-1024\(\$sp\) + d0: f01f f840 ld \$v0,-2048\(\$sp\) + d4: bb40 lwu \$v0,0\(\$v1\) + d6: f000 bb41 lwu \$v0,1\(\$v1\) + da: f000 bb42 lwu \$v0,2\(\$v1\) + de: f000 bb43 lwu \$v0,3\(\$v1\) + e2: bb41 lwu \$v0,4\(\$v1\) + e4: bb42 lwu \$v0,8\(\$v1\) + e6: bb44 lwu \$v0,16\(\$v1\) + e8: bb48 lwu \$v0,32\(\$v1\) + ea: bb50 lwu \$v0,64\(\$v1\) + ec: f080 bb40 lwu \$v0,128\(\$v1\) + f0: f100 bb40 lwu \$v0,256\(\$v1\) + f4: f200 bb40 lwu \$v0,512\(\$v1\) + f8: f400 bb40 lwu \$v0,1024\(\$v1\) + fc: f001 bb40 lwu \$v0,2048\(\$v1\) + 100: f7ff bb5f lwu \$v0,-1\(\$v1\) + 104: f7ff bb5e lwu \$v0,-2\(\$v1\) + 108: f7ff bb5d lwu \$v0,-3\(\$v1\) + 10c: f7ff bb5c lwu \$v0,-4\(\$v1\) + 110: f7ff bb58 lwu \$v0,-8\(\$v1\) + 114: f7ff bb50 lwu \$v0,-16\(\$v1\) + 118: f7ff bb40 lwu \$v0,-32\(\$v1\) + 11c: f7df bb40 lwu \$v0,-64\(\$v1\) + 120: f79f bb40 lwu \$v0,-128\(\$v1\) + 124: f71f bb40 lwu \$v0,-256\(\$v1\) + 128: f61f bb40 lwu \$v0,-512\(\$v1\) + 12c: f41f bb40 lwu \$v0,-1024\(\$v1\) + 130: f01f bb40 lwu \$v0,-2048\(\$v1\) + 134: 9b40 lw \$v0,0\(\$v1\) + 136: f000 9b41 lw \$v0,1\(\$v1\) + 13a: f000 9b42 lw \$v0,2\(\$v1\) + 13e: f000 9b43 lw \$v0,3\(\$v1\) + 142: 9b41 lw \$v0,4\(\$v1\) + 144: 9b42 lw \$v0,8\(\$v1\) + 146: 9b44 lw \$v0,16\(\$v1\) + 148: 9b48 lw \$v0,32\(\$v1\) + 14a: 9b50 lw \$v0,64\(\$v1\) + 14c: f080 9b40 lw \$v0,128\(\$v1\) + 150: f100 9b40 lw \$v0,256\(\$v1\) + 154: f200 9b40 lw \$v0,512\(\$v1\) + 158: f400 9b40 lw \$v0,1024\(\$v1\) + 15c: f001 9b40 lw \$v0,2048\(\$v1\) + 160: f7ff 9b5f lw \$v0,-1\(\$v1\) + 164: f7ff 9b5e lw \$v0,-2\(\$v1\) + 168: f7ff 9b5d lw \$v0,-3\(\$v1\) + 16c: f7ff 9b5c lw \$v0,-4\(\$v1\) + 170: f7ff 9b58 lw \$v0,-8\(\$v1\) + 174: f7ff 9b50 lw \$v0,-16\(\$v1\) + 178: f7ff 9b40 lw \$v0,-32\(\$v1\) + 17c: f7df 9b40 lw \$v0,-64\(\$v1\) + 180: f79f 9b40 lw \$v0,-128\(\$v1\) + 184: f71f 9b40 lw \$v0,-256\(\$v1\) + 188: f61f 9b40 lw \$v0,-512\(\$v1\) + 18c: f41f 9b40 lw \$v0,-1024\(\$v1\) + 190: f01f 9b40 lw \$v0,-2048\(\$v1\) + 194: f67f b20c lw \$v0,0 <data1> + 198: f580 b204 lw \$v0,71c <data2> + 19c: f6c0 b20c lw \$v0,868 <bar> + 1a0: f780 b210 lw \$v0,930 <quux> + 1a4: 9200 lw \$v0,0\(\$sp\) + 1a6: f000 9201 lw \$v0,1\(\$sp\) + 1aa: f000 9202 lw \$v0,2\(\$sp\) + 1ae: f000 9203 lw \$v0,3\(\$sp\) + 1b2: 9201 lw \$v0,4\(\$sp\) + 1b4: 9202 lw \$v0,8\(\$sp\) + 1b6: 9204 lw \$v0,16\(\$sp\) + 1b8: 9208 lw \$v0,32\(\$sp\) + 1ba: 9210 lw \$v0,64\(\$sp\) + 1bc: 9220 lw \$v0,128\(\$sp\) + 1be: 9240 lw \$v0,256\(\$sp\) + 1c0: 9280 lw \$v0,512\(\$sp\) + 1c2: f400 9200 lw \$v0,1024\(\$sp\) + 1c6: f001 9200 lw \$v0,2048\(\$sp\) + 1ca: f7ff 921f lw \$v0,-1\(\$sp\) + 1ce: f7ff 921e lw \$v0,-2\(\$sp\) + 1d2: f7ff 921d lw \$v0,-3\(\$sp\) + 1d6: f7ff 921c lw \$v0,-4\(\$sp\) + 1da: f7ff 9218 lw \$v0,-8\(\$sp\) + 1de: f7ff 9210 lw \$v0,-16\(\$sp\) + 1e2: f7ff 9200 lw \$v0,-32\(\$sp\) + 1e6: f7df 9200 lw \$v0,-64\(\$sp\) + 1ea: f79f 9200 lw \$v0,-128\(\$sp\) + 1ee: f71f 9200 lw \$v0,-256\(\$sp\) + 1f2: f61f 9200 lw \$v0,-512\(\$sp\) + 1f6: f41f 9200 lw \$v0,-1024\(\$sp\) + 1fa: f01f 9200 lw \$v0,-2048\(\$sp\) + 1fe: 8b40 lh \$v0,0\(\$v1\) + 200: f000 8b41 lh \$v0,1\(\$v1\) + 204: 8b41 lh \$v0,2\(\$v1\) + 206: f000 8b43 lh \$v0,3\(\$v1\) + 20a: 8b42 lh \$v0,4\(\$v1\) + 20c: 8b44 lh \$v0,8\(\$v1\) + 20e: 8b48 lh \$v0,16\(\$v1\) + 210: 8b50 lh \$v0,32\(\$v1\) + 212: f040 8b40 lh \$v0,64\(\$v1\) + 216: f080 8b40 lh \$v0,128\(\$v1\) + 21a: f100 8b40 lh \$v0,256\(\$v1\) + 21e: f200 8b40 lh \$v0,512\(\$v1\) + 222: f400 8b40 lh \$v0,1024\(\$v1\) + 226: f001 8b40 lh \$v0,2048\(\$v1\) + 22a: f7ff 8b5f lh \$v0,-1\(\$v1\) + 22e: f7ff 8b5e lh \$v0,-2\(\$v1\) + 232: f7ff 8b5d lh \$v0,-3\(\$v1\) + 236: f7ff 8b5c lh \$v0,-4\(\$v1\) + 23a: f7ff 8b58 lh \$v0,-8\(\$v1\) + 23e: f7ff 8b50 lh \$v0,-16\(\$v1\) + 242: f7ff 8b40 lh \$v0,-32\(\$v1\) + 246: f7df 8b40 lh \$v0,-64\(\$v1\) + 24a: f79f 8b40 lh \$v0,-128\(\$v1\) + 24e: f71f 8b40 lh \$v0,-256\(\$v1\) + 252: f61f 8b40 lh \$v0,-512\(\$v1\) + 256: f41f 8b40 lh \$v0,-1024\(\$v1\) + 25a: f01f 8b40 lh \$v0,-2048\(\$v1\) + 25e: ab40 lhu \$v0,0\(\$v1\) + 260: f000 ab41 lhu \$v0,1\(\$v1\) + 264: ab41 lhu \$v0,2\(\$v1\) + 266: f000 ab43 lhu \$v0,3\(\$v1\) + 26a: ab42 lhu \$v0,4\(\$v1\) + 26c: ab44 lhu \$v0,8\(\$v1\) + 26e: ab48 lhu \$v0,16\(\$v1\) + 270: ab50 lhu \$v0,32\(\$v1\) + 272: f040 ab40 lhu \$v0,64\(\$v1\) + 276: f080 ab40 lhu \$v0,128\(\$v1\) + 27a: f100 ab40 lhu \$v0,256\(\$v1\) + 27e: f200 ab40 lhu \$v0,512\(\$v1\) + 282: f400 ab40 lhu \$v0,1024\(\$v1\) + 286: f001 ab40 lhu \$v0,2048\(\$v1\) + 28a: f7ff ab5f lhu \$v0,-1\(\$v1\) + 28e: f7ff ab5e lhu \$v0,-2\(\$v1\) + 292: f7ff ab5d lhu \$v0,-3\(\$v1\) + 296: f7ff ab5c lhu \$v0,-4\(\$v1\) + 29a: f7ff ab58 lhu \$v0,-8\(\$v1\) + 29e: f7ff ab50 lhu \$v0,-16\(\$v1\) + 2a2: f7ff ab40 lhu \$v0,-32\(\$v1\) + 2a6: f7df ab40 lhu \$v0,-64\(\$v1\) + 2aa: f79f ab40 lhu \$v0,-128\(\$v1\) + 2ae: f71f ab40 lhu \$v0,-256\(\$v1\) + 2b2: f61f ab40 lhu \$v0,-512\(\$v1\) + 2b6: f41f ab40 lhu \$v0,-1024\(\$v1\) + 2ba: f01f ab40 lhu \$v0,-2048\(\$v1\) + 2be: 8340 lb \$v0,0\(\$v1\) + 2c0: 8341 lb \$v0,1\(\$v1\) + 2c2: 8342 lb \$v0,2\(\$v1\) + 2c4: 8343 lb \$v0,3\(\$v1\) + 2c6: 8344 lb \$v0,4\(\$v1\) + 2c8: 8348 lb \$v0,8\(\$v1\) + 2ca: 8350 lb \$v0,16\(\$v1\) + 2cc: f020 8340 lb \$v0,32\(\$v1\) + 2d0: f040 8340 lb \$v0,64\(\$v1\) + 2d4: f080 8340 lb \$v0,128\(\$v1\) + 2d8: f100 8340 lb \$v0,256\(\$v1\) + 2dc: f200 8340 lb \$v0,512\(\$v1\) + 2e0: f400 8340 lb \$v0,1024\(\$v1\) + 2e4: f001 8340 lb \$v0,2048\(\$v1\) + 2e8: f7ff 835f lb \$v0,-1\(\$v1\) + 2ec: f7ff 835e lb \$v0,-2\(\$v1\) + 2f0: f7ff 835d lb \$v0,-3\(\$v1\) + 2f4: f7ff 835c lb \$v0,-4\(\$v1\) + 2f8: f7ff 8358 lb \$v0,-8\(\$v1\) + 2fc: f7ff 8350 lb \$v0,-16\(\$v1\) + 300: f7ff 8340 lb \$v0,-32\(\$v1\) + 304: f7df 8340 lb \$v0,-64\(\$v1\) + 308: f79f 8340 lb \$v0,-128\(\$v1\) + 30c: f71f 8340 lb \$v0,-256\(\$v1\) + 310: f61f 8340 lb \$v0,-512\(\$v1\) + 314: f41f 8340 lb \$v0,-1024\(\$v1\) + 318: f01f 8340 lb \$v0,-2048\(\$v1\) + 31c: a340 lbu \$v0,0\(\$v1\) + 31e: a341 lbu \$v0,1\(\$v1\) + 320: a342 lbu \$v0,2\(\$v1\) + 322: a343 lbu \$v0,3\(\$v1\) + 324: a344 lbu \$v0,4\(\$v1\) + 326: a348 lbu \$v0,8\(\$v1\) + 328: a350 lbu \$v0,16\(\$v1\) + 32a: f020 a340 lbu \$v0,32\(\$v1\) + 32e: f040 a340 lbu \$v0,64\(\$v1\) + 332: f080 a340 lbu \$v0,128\(\$v1\) + 336: f100 a340 lbu \$v0,256\(\$v1\) + 33a: f200 a340 lbu \$v0,512\(\$v1\) + 33e: f400 a340 lbu \$v0,1024\(\$v1\) + 342: f001 a340 lbu \$v0,2048\(\$v1\) + 346: f7ff a35f lbu \$v0,-1\(\$v1\) + 34a: f7ff a35e lbu \$v0,-2\(\$v1\) + 34e: f7ff a35d lbu \$v0,-3\(\$v1\) + 352: f7ff a35c lbu \$v0,-4\(\$v1\) + 356: f7ff a358 lbu \$v0,-8\(\$v1\) + 35a: f7ff a350 lbu \$v0,-16\(\$v1\) + 35e: f7ff a340 lbu \$v0,-32\(\$v1\) + 362: f7df a340 lbu \$v0,-64\(\$v1\) + 366: f79f a340 lbu \$v0,-128\(\$v1\) + 36a: f71f a340 lbu \$v0,-256\(\$v1\) + 36e: f61f a340 lbu \$v0,-512\(\$v1\) + 372: f41f a340 lbu \$v0,-1024\(\$v1\) + 376: f01f a340 lbu \$v0,-2048\(\$v1\) + 37a: 7b40 sd \$v0,0\(\$v1\) + 37c: f000 7b41 sd \$v0,1\(\$v1\) + 380: f000 7b42 sd \$v0,2\(\$v1\) + 384: f000 7b43 sd \$v0,3\(\$v1\) + 388: f000 7b44 sd \$v0,4\(\$v1\) + 38c: 7b41 sd \$v0,8\(\$v1\) + 38e: 7b42 sd \$v0,16\(\$v1\) + 390: 7b44 sd \$v0,32\(\$v1\) + 392: 7b48 sd \$v0,64\(\$v1\) + 394: 7b50 sd \$v0,128\(\$v1\) + 396: f100 7b40 sd \$v0,256\(\$v1\) + 39a: f200 7b40 sd \$v0,512\(\$v1\) + 39e: f400 7b40 sd \$v0,1024\(\$v1\) + 3a2: f001 7b40 sd \$v0,2048\(\$v1\) + 3a6: f7ff 7b5f sd \$v0,-1\(\$v1\) + 3aa: f7ff 7b5e sd \$v0,-2\(\$v1\) + 3ae: f7ff 7b5d sd \$v0,-3\(\$v1\) + 3b2: f7ff 7b5c sd \$v0,-4\(\$v1\) + 3b6: f7ff 7b58 sd \$v0,-8\(\$v1\) + 3ba: f7ff 7b50 sd \$v0,-16\(\$v1\) + 3be: f7ff 7b40 sd \$v0,-32\(\$v1\) + 3c2: f7df 7b40 sd \$v0,-64\(\$v1\) + 3c6: f79f 7b40 sd \$v0,-128\(\$v1\) + 3ca: f71f 7b40 sd \$v0,-256\(\$v1\) + 3ce: f61f 7b40 sd \$v0,-512\(\$v1\) + 3d2: f41f 7b40 sd \$v0,-1024\(\$v1\) + 3d6: f01f 7b40 sd \$v0,-2048\(\$v1\) + 3da: f940 sd \$v0,0\(\$sp\) + 3dc: f000 f941 sd \$v0,1\(\$sp\) + 3e0: f000 f942 sd \$v0,2\(\$sp\) + 3e4: f000 f943 sd \$v0,3\(\$sp\) + 3e8: f000 f944 sd \$v0,4\(\$sp\) + 3ec: f941 sd \$v0,8\(\$sp\) + 3ee: f942 sd \$v0,16\(\$sp\) + 3f0: f944 sd \$v0,32\(\$sp\) + 3f2: f948 sd \$v0,64\(\$sp\) + 3f4: f950 sd \$v0,128\(\$sp\) + 3f6: f100 f940 sd \$v0,256\(\$sp\) + 3fa: f200 f940 sd \$v0,512\(\$sp\) + 3fe: f400 f940 sd \$v0,1024\(\$sp\) + 402: f001 f940 sd \$v0,2048\(\$sp\) + 406: f7ff f95f sd \$v0,-1\(\$sp\) + 40a: f7ff f95e sd \$v0,-2\(\$sp\) + 40e: f7ff f95d sd \$v0,-3\(\$sp\) + 412: f7ff f95c sd \$v0,-4\(\$sp\) + 416: f7ff f958 sd \$v0,-8\(\$sp\) + 41a: f7ff f950 sd \$v0,-16\(\$sp\) + 41e: f7ff f940 sd \$v0,-32\(\$sp\) + 422: f7df f940 sd \$v0,-64\(\$sp\) + 426: f79f f940 sd \$v0,-128\(\$sp\) + 42a: f71f f940 sd \$v0,-256\(\$sp\) + 42e: f61f f940 sd \$v0,-512\(\$sp\) + 432: f41f f940 sd \$v0,-1024\(\$sp\) + 436: f01f f940 sd \$v0,-2048\(\$sp\) + 43a: fa00 sd \$ra,0\(\$sp\) + 43c: f000 fa01 sd \$ra,1\(\$sp\) + 440: f000 fa02 sd \$ra,2\(\$sp\) + 444: f000 fa03 sd \$ra,3\(\$sp\) + 448: f000 fa04 sd \$ra,4\(\$sp\) + 44c: fa01 sd \$ra,8\(\$sp\) + 44e: fa02 sd \$ra,16\(\$sp\) + 450: fa04 sd \$ra,32\(\$sp\) + 452: fa08 sd \$ra,64\(\$sp\) + 454: fa10 sd \$ra,128\(\$sp\) + 456: fa20 sd \$ra,256\(\$sp\) + 458: fa40 sd \$ra,512\(\$sp\) + 45a: fa80 sd \$ra,1024\(\$sp\) + 45c: f001 fa00 sd \$ra,2048\(\$sp\) + 460: f7ff fa1f sd \$ra,-1\(\$sp\) + 464: f7ff fa1e sd \$ra,-2\(\$sp\) + 468: f7ff fa1d sd \$ra,-3\(\$sp\) + 46c: f7ff fa1c sd \$ra,-4\(\$sp\) + 470: f7ff fa18 sd \$ra,-8\(\$sp\) + 474: f7ff fa10 sd \$ra,-16\(\$sp\) + 478: f7ff fa00 sd \$ra,-32\(\$sp\) + 47c: f7df fa00 sd \$ra,-64\(\$sp\) + 480: f79f fa00 sd \$ra,-128\(\$sp\) + 484: f71f fa00 sd \$ra,-256\(\$sp\) + 488: f61f fa00 sd \$ra,-512\(\$sp\) + 48c: f41f fa00 sd \$ra,-1024\(\$sp\) + 490: f01f fa00 sd \$ra,-2048\(\$sp\) + 494: db40 sw \$v0,0\(\$v1\) + 496: f000 db41 sw \$v0,1\(\$v1\) + 49a: f000 db42 sw \$v0,2\(\$v1\) + 49e: f000 db43 sw \$v0,3\(\$v1\) + 4a2: db41 sw \$v0,4\(\$v1\) + 4a4: db42 sw \$v0,8\(\$v1\) + 4a6: db44 sw \$v0,16\(\$v1\) + 4a8: db48 sw \$v0,32\(\$v1\) + 4aa: db50 sw \$v0,64\(\$v1\) + 4ac: f080 db40 sw \$v0,128\(\$v1\) + 4b0: f100 db40 sw \$v0,256\(\$v1\) + 4b4: f200 db40 sw \$v0,512\(\$v1\) + 4b8: f400 db40 sw \$v0,1024\(\$v1\) + 4bc: f001 db40 sw \$v0,2048\(\$v1\) + 4c0: f7ff db5f sw \$v0,-1\(\$v1\) + 4c4: f7ff db5e sw \$v0,-2\(\$v1\) + 4c8: f7ff db5d sw \$v0,-3\(\$v1\) + 4cc: f7ff db5c sw \$v0,-4\(\$v1\) + 4d0: f7ff db58 sw \$v0,-8\(\$v1\) + 4d4: f7ff db50 sw \$v0,-16\(\$v1\) + 4d8: f7ff db40 sw \$v0,-32\(\$v1\) + 4dc: f7df db40 sw \$v0,-64\(\$v1\) + 4e0: f79f db40 sw \$v0,-128\(\$v1\) + 4e4: f71f db40 sw \$v0,-256\(\$v1\) + 4e8: f61f db40 sw \$v0,-512\(\$v1\) + 4ec: f41f db40 sw \$v0,-1024\(\$v1\) + 4f0: f01f db40 sw \$v0,-2048\(\$v1\) + 4f4: d200 sw \$v0,0\(\$sp\) + 4f6: f000 d201 sw \$v0,1\(\$sp\) + 4fa: f000 d202 sw \$v0,2\(\$sp\) + 4fe: f000 d203 sw \$v0,3\(\$sp\) + 502: d201 sw \$v0,4\(\$sp\) + 504: d202 sw \$v0,8\(\$sp\) + 506: d204 sw \$v0,16\(\$sp\) + 508: d208 sw \$v0,32\(\$sp\) + 50a: d210 sw \$v0,64\(\$sp\) + 50c: d220 sw \$v0,128\(\$sp\) + 50e: d240 sw \$v0,256\(\$sp\) + 510: d280 sw \$v0,512\(\$sp\) + 512: f400 d200 sw \$v0,1024\(\$sp\) + 516: f001 d200 sw \$v0,2048\(\$sp\) + 51a: f7ff d21f sw \$v0,-1\(\$sp\) + 51e: f7ff d21e sw \$v0,-2\(\$sp\) + 522: f7ff d21d sw \$v0,-3\(\$sp\) + 526: f7ff d21c sw \$v0,-4\(\$sp\) + 52a: f7ff d218 sw \$v0,-8\(\$sp\) + 52e: f7ff d210 sw \$v0,-16\(\$sp\) + 532: f7ff d200 sw \$v0,-32\(\$sp\) + 536: f7df d200 sw \$v0,-64\(\$sp\) + 53a: f79f d200 sw \$v0,-128\(\$sp\) + 53e: f71f d200 sw \$v0,-256\(\$sp\) + 542: f61f d200 sw \$v0,-512\(\$sp\) + 546: f41f d200 sw \$v0,-1024\(\$sp\) + 54a: f01f d200 sw \$v0,-2048\(\$sp\) + 54e: 6200 sw \$ra,0\(\$sp\) + 550: f000 6201 sw \$ra,1\(\$sp\) + 554: f000 6202 sw \$ra,2\(\$sp\) + 558: f000 6203 sw \$ra,3\(\$sp\) + 55c: 6201 sw \$ra,4\(\$sp\) + 55e: 6202 sw \$ra,8\(\$sp\) + 560: 6204 sw \$ra,16\(\$sp\) + 562: 6208 sw \$ra,32\(\$sp\) + 564: 6210 sw \$ra,64\(\$sp\) + 566: 6220 sw \$ra,128\(\$sp\) + 568: 6240 sw \$ra,256\(\$sp\) + 56a: 6280 sw \$ra,512\(\$sp\) + 56c: f400 6200 sw \$ra,1024\(\$sp\) + 570: f001 6200 sw \$ra,2048\(\$sp\) + 574: f7ff 621f sw \$ra,-1\(\$sp\) + 578: f7ff 621e sw \$ra,-2\(\$sp\) + 57c: f7ff 621d sw \$ra,-3\(\$sp\) + 580: f7ff 621c sw \$ra,-4\(\$sp\) + 584: f7ff 6218 sw \$ra,-8\(\$sp\) + 588: f7ff 6210 sw \$ra,-16\(\$sp\) + 58c: f7ff 6200 sw \$ra,-32\(\$sp\) + 590: f7df 6200 sw \$ra,-64\(\$sp\) + 594: f79f 6200 sw \$ra,-128\(\$sp\) + 598: f71f 6200 sw \$ra,-256\(\$sp\) + 59c: f61f 6200 sw \$ra,-512\(\$sp\) + 5a0: f41f 6200 sw \$ra,-1024\(\$sp\) + 5a4: f01f 6200 sw \$ra,-2048\(\$sp\) + 5a8: cb40 sh \$v0,0\(\$v1\) + 5aa: f000 cb41 sh \$v0,1\(\$v1\) + 5ae: cb41 sh \$v0,2\(\$v1\) + 5b0: f000 cb43 sh \$v0,3\(\$v1\) + 5b4: cb42 sh \$v0,4\(\$v1\) + 5b6: cb44 sh \$v0,8\(\$v1\) + 5b8: cb48 sh \$v0,16\(\$v1\) + 5ba: cb50 sh \$v0,32\(\$v1\) + 5bc: f040 cb40 sh \$v0,64\(\$v1\) + 5c0: f080 cb40 sh \$v0,128\(\$v1\) + 5c4: f100 cb40 sh \$v0,256\(\$v1\) + 5c8: f200 cb40 sh \$v0,512\(\$v1\) + 5cc: f400 cb40 sh \$v0,1024\(\$v1\) + 5d0: f001 cb40 sh \$v0,2048\(\$v1\) + 5d4: f7ff cb5f sh \$v0,-1\(\$v1\) + 5d8: f7ff cb5e sh \$v0,-2\(\$v1\) + 5dc: f7ff cb5d sh \$v0,-3\(\$v1\) + 5e0: f7ff cb5c sh \$v0,-4\(\$v1\) + 5e4: f7ff cb58 sh \$v0,-8\(\$v1\) + 5e8: f7ff cb50 sh \$v0,-16\(\$v1\) + 5ec: f7ff cb40 sh \$v0,-32\(\$v1\) + 5f0: f7df cb40 sh \$v0,-64\(\$v1\) + 5f4: f79f cb40 sh \$v0,-128\(\$v1\) + 5f8: f71f cb40 sh \$v0,-256\(\$v1\) + 5fc: f61f cb40 sh \$v0,-512\(\$v1\) + 600: f41f cb40 sh \$v0,-1024\(\$v1\) + 604: f01f cb40 sh \$v0,-2048\(\$v1\) + 608: c340 sb \$v0,0\(\$v1\) + 60a: c341 sb \$v0,1\(\$v1\) + 60c: c342 sb \$v0,2\(\$v1\) + 60e: c343 sb \$v0,3\(\$v1\) + 610: c344 sb \$v0,4\(\$v1\) + 612: c348 sb \$v0,8\(\$v1\) + 614: c350 sb \$v0,16\(\$v1\) + 616: f020 c340 sb \$v0,32\(\$v1\) + 61a: f040 c340 sb \$v0,64\(\$v1\) + 61e: f080 c340 sb \$v0,128\(\$v1\) + 622: f100 c340 sb \$v0,256\(\$v1\) + 626: f200 c340 sb \$v0,512\(\$v1\) + 62a: f400 c340 sb \$v0,1024\(\$v1\) + 62e: f001 c340 sb \$v0,2048\(\$v1\) + 632: f7ff c35f sb \$v0,-1\(\$v1\) + 636: f7ff c35e sb \$v0,-2\(\$v1\) + 63a: f7ff c35d sb \$v0,-3\(\$v1\) + 63e: f7ff c35c sb \$v0,-4\(\$v1\) + 642: f7ff c358 sb \$v0,-8\(\$v1\) + 646: f7ff c350 sb \$v0,-16\(\$v1\) + 64a: f7ff c340 sb \$v0,-32\(\$v1\) + 64e: f7df c340 sb \$v0,-64\(\$v1\) + 652: f79f c340 sb \$v0,-128\(\$v1\) + 656: f71f c340 sb \$v0,-256\(\$v1\) + 65a: f61f c340 sb \$v0,-512\(\$v1\) + 65e: f41f c340 sb \$v0,-1024\(\$v1\) + 662: f01f c340 sb \$v0,-2048\(\$v1\) + 666: 6a00 li \$v0,0 + 668: 6a01 li \$v0,1 + 66a: f100 6a00 li \$v0,256 + 66e: 675e move \$v0,\$s8 + 670: 6592 move \$s4,\$v0 + 672: 4350 daddiu \$v0,\$v1,0 + 674: 4351 daddiu \$v0,\$v1,1 + 676: 435f daddiu \$v0,\$v1,-1 + 678: f010 4350 daddiu \$v0,\$v1,16 + 67c: f7ff 4350 daddiu \$v0,\$v1,-16 + 680: e388 daddu \$v0,\$v1,\$a0 + 682: fd40 daddiu \$v0,0 + 684: fd41 daddiu \$v0,1 + 686: fd5f daddiu \$v0,-1 + 688: f020 fd40 daddiu \$v0,32 + 68c: f7ff fd40 daddiu \$v0,-32 + 690: f080 fd40 daddiu \$v0,128 + 694: f79f fd40 daddiu \$v0,-128 + 698: f17f fe48 dla \$v0,0 <data1> + 69c: f080 fe40 dla \$v0,71c <data2> + 6a0: f1c0 fe48 dla \$v0,868 <bar> + 6a4: f280 fe4c dla \$v0,930 <quux> + 6a8: fb00 daddiu \$sp,0 + 6aa: f000 fb01 daddiu \$sp,1 + 6ae: f7ff fb1f daddiu \$sp,-1 + 6b2: fb20 daddiu \$sp,256 + 6b4: fbe0 daddiu \$sp,-256 + 6b6: ff40 daddiu \$v0,\$sp,0 + 6b8: f000 ff41 daddiu \$v0,\$sp,1 + 6bc: f7ff ff5f daddiu \$v0,\$sp,-1 + 6c0: ff48 daddiu \$v0,\$sp,32 + 6c2: f7ff ff40 daddiu \$v0,\$sp,-32 + 6c6: f080 ff40 daddiu \$v0,\$sp,128 + 6ca: f79f ff40 daddiu \$v0,\$sp,-128 + 6ce: 4340 addiu \$v0,\$v1,0 + 6d0: 4341 addiu \$v0,\$v1,1 + 6d2: 434f addiu \$v0,\$v1,-1 + 6d4: f010 4340 addiu \$v0,\$v1,16 + 6d8: f7ff 4340 addiu \$v0,\$v1,-16 + 6dc: e389 addu \$v0,\$v1,\$a0 + 6de: 4a00 addiu \$v0,0 + 6e0: 4a01 addiu \$v0,1 + 6e2: 4aff addiu \$v0,-1 + 6e4: 4a20 addiu \$v0,32 + 6e6: 4ae0 addiu \$v0,-32 + 6e8: f080 4a00 addiu \$v0,128 + 6ec: 4a80 addiu \$v0,-128 + 6ee: f11f 0a14 la \$v0,0 <data1> + 6f2: 0a0b la \$v0,71c <data2> + 6f4: 0a5d la \$v0,868 <bar> + 6f6: 0a8f la \$v0,930 <quux> + 6f8: 6300 addiu \$sp,0 + 6fa: f000 6301 addiu \$sp,1 + 6fe: f7ff 631f addiu \$sp,-1 + 702: 6320 addiu \$sp,256 + 704: 63e0 addiu \$sp,-256 + 706: 0200 addiu \$v0,\$sp,0 + 708: f000 0201 addiu \$v0,\$sp,1 + 70c: f7ff 021f addiu \$v0,\$sp,-1 + 710: 0208 addiu \$v0,\$sp,32 + 712: f7ff 0200 addiu \$v0,\$sp,-32 + 716: 0220 addiu \$v0,\$sp,128 + 718: f79f 0200 addiu \$v0,\$sp,-128 + +0+00071c <data2>: + 71c: 00000000 nop + +0+000720 <insns2>: + 720: e38a dsubu \$v0,\$v1,\$a0 + 722: e38b subu \$v0,\$v1,\$a0 + 724: ea6b neg \$v0,\$v1 + 726: ea6c and \$v0,\$v1 + 728: ea6d or \$v0,\$v1 + 72a: ea6e xor \$v0,\$v1 + 72c: ea6f not \$v0,\$v1 + 72e: 5200 slti \$v0,0 + 730: 5201 slti \$v0,1 + 732: f7ff 521f slti \$v0,-1 + 736: 52ff slti \$v0,255 + 738: f100 5200 slti \$v0,256 + 73c: ea62 slt \$v0,\$v1 + 73e: 5a00 sltiu \$v0,0 + 740: 5a01 sltiu \$v0,1 + 742: f7ff 5a1f sltiu \$v0,-1 + 746: 5aff sltiu \$v0,255 + 748: f100 5a00 sltiu \$v0,256 + 74c: ea63 sltu \$v0,\$v1 + 74e: 7200 cmpi \$v0,0 + 750: 7201 cmpi \$v0,1 + 752: 72ff cmpi \$v0,255 + 754: f100 7200 cmpi \$v0,256 + 758: ea6a cmp \$v0,\$v1 + 75a: f000 3261 dsll \$v0,\$v1,0 + 75e: 3265 dsll \$v0,\$v1,1 + 760: 3261 dsll \$v0,\$v1,8 + 762: f240 3261 dsll \$v0,\$v1,9 + 766: f7e0 3261 dsll \$v0,\$v1,63 + 76a: eb54 dsllv \$v0,\$v1 + 76c: f000 e848 dsrl \$v0,0 + 770: e948 dsrl \$v0,1 + 772: e848 dsrl \$v0,8 + 774: f240 e848 dsrl \$v0,9 + 778: f7e0 e848 dsrl \$v0,63 + 77c: eb56 dsrlv \$v0,\$v1 + 77e: f000 e853 dsra \$v0,0 + 782: e953 dsra \$v0,1 + 784: e853 dsra \$v0,8 + 786: f240 e853 dsra \$v0,9 + 78a: f7e0 e853 dsra \$v0,63 + 78e: eb57 dsrav \$v0,\$v1 + 790: ea12 mflo \$v0 + 792: eb10 mfhi \$v1 + 794: f000 3260 sll \$v0,\$v1,0 + 798: 3264 sll \$v0,\$v1,1 + 79a: 3260 sll \$v0,\$v1,8 + 79c: f240 3260 sll \$v0,\$v1,9 + 7a0: f7c0 3260 sll \$v0,\$v1,31 + 7a4: eb44 sllv \$v0,\$v1 + 7a6: f000 3262 srl \$v0,\$v1,0 + 7aa: 3266 srl \$v0,\$v1,1 + 7ac: 3262 srl \$v0,\$v1,8 + 7ae: f240 3262 srl \$v0,\$v1,9 + 7b2: f7c0 3262 srl \$v0,\$v1,31 + 7b6: eb46 srlv \$v0,\$v1 + 7b8: f000 3263 sra \$v0,\$v1,0 + 7bc: 3267 sra \$v0,\$v1,1 + 7be: 3263 sra \$v0,\$v1,8 + 7c0: f240 3263 sra \$v0,\$v1,9 + 7c4: f7c0 3263 sra \$v0,\$v1,31 + 7c8: eb47 srav \$v0,\$v1 + 7ca: ea7c dmult \$v0,\$v1 + 7cc: ea7d dmultu \$v0,\$v1 + 7ce: ea7e ddiv \$zero,\$v0,\$v1 + 7d0: 2b01 bnez \$v1,7d4 <insns2\+(0x|)b4> + 7d2: e8e5 break 7 + 7d4: ea12 mflo \$v0 + 7d6: 6500 nop + 7d8: 6500 nop + 7da: ea7f ddivu \$zero,\$v0,\$v1 + 7dc: 2b01 bnez \$v1,7e0 <insns2\+(0x|)c0> + 7de: e8e5 break 7 + 7e0: ea12 mflo \$v0 + 7e2: 6500 nop + 7e4: 6500 nop + 7e6: ea78 mult \$v0,\$v1 + 7e8: ea79 multu \$v0,\$v1 + 7ea: ea7a div \$zero,\$v0,\$v1 + 7ec: 2b01 bnez \$v1,7f0 <insns2\+(0x|)d0> + 7ee: e8e5 break 7 + 7f0: ea12 mflo \$v0 + 7f2: 6500 nop + 7f4: 6500 nop + 7f6: ea7b divu \$zero,\$v0,\$v1 + 7f8: 2b01 bnez \$v1,7fc <insns2\+(0x|)dc> + 7fa: e8e5 break 7 + 7fc: ea12 mflo \$v0 + 7fe: ea00 jr \$v0 + 800: 6500 nop + 802: e820 jr \$ra + 804: 6500 nop + 806: ea40 jalr \$v0 + 808: 6500 nop + 80a: f3ff 221b beqz \$v0,4 <insns1> + 80e: 2288 beqz \$v0,720 <insns2> + 810: 222b beqz \$v0,868 <bar> + 812: f080 220d beqz \$v0,930 <quux> + 816: f3ff 2a15 bnez \$v0,4 <insns1> + 81a: 2a82 bnez \$v0,720 <insns2> + 81c: 2a25 bnez \$v0,868 <bar> + 81e: f080 2a07 bnez \$v0,930 <quux> + 822: f3ff 600f bteqz 4 <insns1> + 826: f77f 601b bteqz 720 <insns2> + 82a: 601e bteqz 868 <bar> + 82c: f080 6000 bteqz 930 <quux> + 830: f3ff 6108 btnez 4 <insns1> + 834: f77f 6114 btnez 720 <insns2> + 838: 6117 btnez 868 <bar> + 83a: 617a btnez 930 <quux> + 83c: f3ff 1002 b 4 <insns1> + 840: 176f b 720 <insns2> + 842: 1012 b 868 <bar> + 844: 1075 b 930 <quux> + 846: e805 break 0 + 848: e825 break 1 + 84a: efe5 break 63 + 84c: 1800 0000 jal 0 <data1> + 84c: R_MIPS16_26 extern + 850: 6500 nop + 852: e809 entry + 854: e909 entry \$a0 + 856: eb49 entry \$a0-\$a2,\$s0 + 858: e8a9 entry \$s0-\$s1,\$ra + 85a: e829 entry \$ra + 85c: ef09 exit + 85e: ef49 exit \$s0 + 860: efa9 exit \$s0-\$s1,\$ra + 862: ef29 exit \$ra + 864: 0000 addiu \$s0,\$sp,0 + ... + +0+000868 <bar>: + ... diff --git a/gas/testsuite/gas/mips/mips16.s b/gas/testsuite/gas/mips/mips16.s new file mode 100644 index 0000000..6268fb1 --- /dev/null +++ b/gas/testsuite/gas/mips/mips16.s @@ -0,0 +1,258 @@ +# Test the mips16 instruction set. + + .set mips16 + + .macro ldst op, reg, base + \op \reg,0(\base) + \op \reg,1(\base) + \op \reg,2(\base) + \op \reg,3(\base) + \op \reg,4(\base) + \op \reg,8(\base) + \op \reg,16(\base) + \op \reg,32(\base) + \op \reg,64(\base) + \op \reg,128(\base) + \op \reg,256(\base) + \op \reg,512(\base) + \op \reg,1024(\base) + \op \reg,2048(\base) + \op \reg,-1(\base) + \op \reg,-2(\base) + \op \reg,-3(\base) + \op \reg,-4(\base) + \op \reg,-8(\base) + \op \reg,-16(\base) + \op \reg,-32(\base) + \op \reg,-64(\base) + \op \reg,-128(\base) + \op \reg,-256(\base) + \op \reg,-512(\base) + \op \reg,-1024(\base) + \op \reg,-2048(\base) + .endm + + .p2align 3 +data1: + .word 0 +insns1: + ldst ld, $2, $3 + ld $2,data1 + ld $2,data2 + ld $2,bar + ld $2,quux + ldst ld, $2, $sp + ldst lwu, $2, $3 + ldst lw, $2, $3 + lw $2,data1 + lw $2,data2 + lw $2,bar + lw $2,quux + ldst lw, $2, $sp + ldst lh, $2, $3 + ldst lhu, $2, $3 + ldst lb, $2, $3 + ldst lbu, $2, $3 + ldst sd, $2, $3 + ldst sd, $2, $sp + ldst sd, $31, $sp + ldst sw, $2, $3 + ldst sw, $2, $sp + ldst sw, $31, $sp + ldst sh, $2, $3 + ldst sb, $2, $3 + + li $2,0 + li $2,1 + li $2,256 + + move $2,$30 + move $20,$2 + + daddu $2,$3,0 + daddu $2,$3,1 + daddu $2,$3,-1 + daddu $2,$3,16 + daddu $2,$3,-16 + daddu $2,$3,$4 + daddu $2,0 + daddu $2,1 + daddu $2,-1 + daddu $2,32 + daddu $2,-32 + daddu $2,128 + daddu $2,-128 + dla $2,data1 + dla $2,data2 + dla $2,bar + dla $2,quux + daddu $sp,0 + daddu $sp,1 + daddu $sp,-1 + daddu $sp,256 + daddu $sp,-256 + daddu $2,$sp,0 + daddu $2,$sp,1 + daddu $2,$sp,-1 + daddu $2,$sp,32 + daddu $2,$sp,-32 + daddu $2,$sp,128 + daddu $2,$sp,-128 + + addu $2,$3,0 + addu $2,$3,1 + addu $2,$3,-1 + addu $2,$3,16 + addu $2,$3,-16 + addu $2,$3,$4 + addu $2,0 + addu $2,1 + addu $2,-1 + addu $2,32 + addu $2,-32 + addu $2,128 + addu $2,-128 + la $2,data1 + la $2,data2 + la $2,bar + la $2,quux + addu $sp,0 + addu $sp,1 + addu $sp,-1 + addu $sp,256 + addu $sp,-256 + addu $2,$sp,0 + addu $2,$sp,1 + addu $2,$sp,-1 + addu $2,$sp,32 + addu $2,$sp,-32 + addu $2,$sp,128 + addu $2,$sp,-128 + +data2: + .word 0 +insns2: + dsubu $2,$3,$4 + subu $2,$3,$4 + neg $2,$3 + + and $2,$3 + or $2,$3 + xor $2,$3 + not $2,$3 + + slt $2,0 + slt $2,1 + slt $2,-1 + slt $2,255 + slt $2,256 + slt $2,$3 + sltu $2,0 + sltu $2,1 + sltu $2,-1 + sltu $2,255 + sltu $2,256 + sltu $2,$3 + cmp $2,0 + cmp $2,1 + cmp $2,255 + cmp $2,256 + cmp $2,$3 + + dsll $2,$3,0 + dsll $2,$3,1 + dsll $2,$3,8 + dsll $2,$3,9 + dsll $2,$3,63 + dsll $2,$3 + dsrl $2,0 + dsrl $2,1 + dsrl $2,8 + dsrl $2,9 + dsrl $2,63 + dsrl $2,$3 + dsra $2,0 + dsra $2,1 + dsra $2,8 + dsra $2,9 + dsra $2,63 + dsra $2,$3 + + mflo $2 + mfhi $3 + + sll $2,$3,0 + sll $2,$3,1 + sll $2,$3,8 + sll $2,$3,9 + sll $2,$3,31 + sll $2,$3 + srl $2,$3,0 + srl $2,$3,1 + srl $2,$3,8 + srl $2,$3,9 + srl $2,$3,31 + srl $2,$3 + sra $2,$3,0 + sra $2,$3,1 + sra $2,$3,8 + sra $2,$3,9 + sra $2,$3,31 + sra $2,$3 + + dmult $2,$3 + dmultu $2,$3 + ddiv $2,$3 + ddivu $2,$3 + + mult $2,$3 + multu $2,$3 + div $2,$3 + divu $2,$3 + + jr $2 + jr $31 + jalr $31,$2 + + beqz $2,insns1 + beqz $2,insns2 + beqz $2,bar + beqz $2,quux + bnez $2,insns1 + bnez $2,insns2 + bnez $2,bar + bnez $2,quux + bteqz insns1 + bteqz insns2 + bteqz bar + bteqz quux + btnez insns1 + btnez insns2 + btnez bar + btnez quux + b insns1 + b insns2 + b bar + b quux + + break 0 + break 1 + break 63 + + jal extern + + entry + entry $4 + entry $4-$6,$16 + entry $16-$17,$31 + entry $31 + exit + exit $16 + exit $16-$17,$31 + exit $31 + + .p2align 3 +bar: + + .skip 200 +quux: diff --git a/gas/testsuite/gas/mips/mips4.d b/gas/testsuite/gas/mips/mips4.d new file mode 100644 index 0000000..956de93 --- /dev/null +++ b/gas/testsuite/gas/mips/mips4.d @@ -0,0 +1,51 @@ +#objdump: -dr --prefix-addresses -mmips:5000 +#name: MIPS mips4 +#as: -mips4 -mcpu=r5000 + +# Test the mips4 macros. + +.*: +file format .*mips.* + +Disassembly of section .text: +0+0000 <[^>]*> bc1f 00000000+ <text_label> +0+0004 <[^>]*> nop +0+0008 <[^>]*> bc1f \$fcc1,00000000+ <text_label> +0+000c <[^>]*> nop +0+0010 <[^>]*> bc1fl \$fcc1,00000000+ <text_label> +0+0014 <[^>]*> nop +0+0018 <[^>]*> bc1t \$fcc1,00000000+ <text_label> +0+001c <[^>]*> nop +0+0020 <[^>]*> bc1tl \$fcc2,00000000+ <text_label> +0+0024 <[^>]*> nop +0+0028 <[^>]*> c.f.d \$f4,\$f6 +0+002c <[^>]*> c.f.d \$fcc1,\$f4,\$f6 +0+0030 <[^>]*> ldxc1 \$f2,\$a0\(\$a1\) +0+0034 <[^>]*> lwxc1 \$f2,\$a0\(\$a1\) +0+0038 <[^>]*> madd.d \$f0,\$f2,\$f4,\$f6 +0+003c <[^>]*> madd.s \$f0,\$f2,\$f4,\$f6 +0+0040 <[^>]*> movf \$a0,\$a1,\$fcc4 +0+0044 <[^>]*> movf.d \$f4,\$f6,\$fcc0 +0+0048 <[^>]*> movf.s \$f4,\$f6,\$fcc0 +0+004c <[^>]*> movn \$a0,\$a2,\$a2 +0+0050 <[^>]*> movn.d \$f4,\$f5,\$a2 +0+0054 <[^>]*> movn.s \$f4,\$f5,\$a2 +0+0058 <[^>]*> movt \$a0,\$a1,\$fcc4 +0+005c <[^>]*> movt.d \$f4,\$f6,\$fcc0 +0+0060 <[^>]*> movt.s \$f4,\$f6,\$fcc0 +0+0064 <[^>]*> movz \$a0,\$a2,\$a2 +0+0068 <[^>]*> movz.d \$f4,\$f5,\$a2 +0+006c <[^>]*> movz.s \$f4,\$f5,\$a2 +0+0070 <[^>]*> msub.d \$f0,\$f2,\$f4,\$f6 +0+0074 <[^>]*> msub.s \$f0,\$f2,\$f4,\$f6 +0+0078 <[^>]*> nmadd.d \$f0,\$f2,\$f4,\$f6 +0+007c <[^>]*> nmadd.s \$f0,\$f2,\$f4,\$f6 +0+0080 <[^>]*> nmsub.d \$f0,\$f2,\$f4,\$f6 +0+0084 <[^>]*> nmsub.s \$f0,\$f2,\$f4,\$f6 +0+0088 <[^>]*> prefx 0x4,\$a0\(\$a1\) +0+008c <[^>]*> recip.d \$f4,\$f6 +0+0090 <[^>]*> recip.s \$f4,\$f6 +0+0094 <[^>]*> rsqrt.d \$f4,\$f6 +0+0098 <[^>]*> rsqrt.s \$f4,\$f6 +0+009c <[^>]*> sdxc1 \$f4,\$a0\(\$a1\) +0+00a0 <[^>]*> swxc1 \$f4,\$a0\(\$a1\) + ... diff --git a/gas/testsuite/gas/mips/mips4.s b/gas/testsuite/gas/mips/mips4.s new file mode 100644 index 0000000..bf8b943 --- /dev/null +++ b/gas/testsuite/gas/mips/mips4.s @@ -0,0 +1,52 @@ +# Source file used to test -mips4 instructions. + +text_label: + bc1f text_label + bc1f $fcc1,text_label + bc1fl $fcc1,text_label + bc1t $fcc1,text_label + bc1tl $fcc2,text_label + c.f.d $f4,$f6 + c.f.d $fcc1,$f4,$f6 + ldxc1 $f2,$4($5) + lwxc1 $f2,$4($5) + madd.d $f0,$f2,$f4,$f6 + madd.s $f0,$f2,$f4,$f6 + movf $4,$5,$fcc4 + movf.d $f4,$f6,$fcc0 + movf.s $f4,$f6,$fcc0 + movn $4,$6,$6 + movn.d $f4,$f5,$6 + movn.s $f4,$f5,$6 + movt $4,$5,$fcc4 + movt.d $f4,$f6,$fcc0 + movt.s $f4,$f6,$fcc0 + movz $4,$6,$6 + movz.d $f4,$f5,$6 + movz.s $f4,$f5,$6 + msub.d $f0,$f2,$f4,$f6 + msub.s $f0,$f2,$f4,$f6 + nmadd.d $f0,$f2,$f4,$f6 + nmadd.s $f0,$f2,$f4,$f6 + nmsub.d $f0,$f2,$f4,$f6 + nmsub.s $f0,$f2,$f4,$f6 + + # We don't test pref because currently the disassembler will + # disassemble it as lwc3. lwc3 is correct for mips1 to mips3, + # while pref is correct for mips4. Unfortunately, the + # disassembler does not know which architecture it is + # disassembling for. + # pref 4,0($4) + + prefx 4,$4($5) + recip.d $f4,$f6 + recip.s $f4,$f6 + rsqrt.d $f4,$f6 + rsqrt.s $f4,$f6 + sdxc1 $f4,$4($5) + swxc1 $f4,$4($5) + +# Round to a 16 byte boundary, for ease in testing multiple targets. + nop + nop + nop diff --git a/gas/testsuite/gas/mips/mips4010.d b/gas/testsuite/gas/mips/mips4010.d new file mode 100644 index 0000000..77de196 --- /dev/null +++ b/gas/testsuite/gas/mips/mips4010.d @@ -0,0 +1,23 @@ +#objdump: -dr --prefix-addresses -mmips:4010 +#name: MIPS 4010 +#as: -mcpu=4010 + + +.*: +file format .*mips.* + +Disassembly of section \.text: +0+0000 <stuff> flushi +0+0004 <stuff\+0x4> flushd +0+0008 <stuff\+0x8> flushid +0+000c <stuff\+0xc> madd \$a0,\$a1 +0+0010 <stuff\+0x10> maddu \$a1,\$a2 +0+0014 <stuff\+0x14> ffc \$a2,\$a3 +0+0018 <stuff\+0x18> ffs \$a3,\$t0 +0+001c <stuff\+0x1c> msub \$t0,\$t1 +0+0020 <stuff\+0x20> msubu \$t1,\$t2 +0+0024 <stuff\+0x24> selsl \$t2,\$t3,\$t4 +0+0028 <stuff\+0x28> selsr \$t3,\$t4,\$t5 +0+002c <stuff\+0x2c> waiti +0+0030 <stuff\+0x30> wb 16\(\$t6\) +0+0034 <stuff\+0x34> addciu \$t6,\$t7,16 + ... diff --git a/gas/testsuite/gas/mips/mips4010.s b/gas/testsuite/gas/mips/mips4010.s new file mode 100644 index 0000000..e8d6e25 --- /dev/null +++ b/gas/testsuite/gas/mips/mips4010.s @@ -0,0 +1,20 @@ + .text + +stuff: + .ent stuff + flushi + flushd + flushid + madd $4,$5 + maddu $5,$6 + ffc $6,$7 + ffs $7,$8 + msub $8,$9 + msubu $9,$10 + selsl $10,$11,$12 + selsr $11,$12,$13 + waiti + wb 16($14) + addciu $14,$15,16 + nop + nop diff --git a/gas/testsuite/gas/mips/mips4100.d b/gas/testsuite/gas/mips/mips4100.d new file mode 100644 index 0000000..ef84f12 --- /dev/null +++ b/gas/testsuite/gas/mips/mips4100.d @@ -0,0 +1,15 @@ +#objdump: -dr --prefix-addresses -mmips:4100 +#name: MIPS 4100 +#as: -mcpu=4100 + + +.*: +file format .*mips.* + +Disassembly of section \.text: +0+0000 <stuff> dmadd16 \$a0,\$a1 + ... +0+000c <stuff\+0xc> madd16 \$a1,\$a2 +0+0010 <stuff\+0x10> hibernate +0+0014 <stuff\+0x14> standby +0+0018 <stuff\+0x18> suspend +0+001c <stuff\+0x1c> nop diff --git a/gas/testsuite/gas/mips/mips4100.s b/gas/testsuite/gas/mips/mips4100.s new file mode 100644 index 0000000..ca20e0e --- /dev/null +++ b/gas/testsuite/gas/mips/mips4100.s @@ -0,0 +1,10 @@ + .text + +stuff: + .ent stuff + dmadd16 $4,$5 + madd16 $5,$6 + hibernate + standby + suspend + nop diff --git a/gas/testsuite/gas/mips/mips4650.d b/gas/testsuite/gas/mips/mips4650.d new file mode 100644 index 0000000..5e642a6 --- /dev/null +++ b/gas/testsuite/gas/mips/mips4650.d @@ -0,0 +1,14 @@ +#objdump: -dr --prefix-addresses -mmips:4650 +#name: MIPS 4650 +#as: -mcpu=4650 + + +.*: +file format .*mips.* + +Disassembly of section \.text: +0+0000 <stuff> mad \$a0,\$a1 + ... +0+000c <stuff\+0xc> madu \$a1,\$a2 + ... +0+0018 <stuff\+0x18> mul \$a2,\$a3,\$t0 +0+001c <stuff\+0x1c> nop diff --git a/gas/testsuite/gas/mips/mips4650.s b/gas/testsuite/gas/mips/mips4650.s new file mode 100644 index 0000000..52c22a1 --- /dev/null +++ b/gas/testsuite/gas/mips/mips4650.s @@ -0,0 +1,8 @@ + .text + +stuff: + .ent stuff + mad $4,$5 + madu $5,$6 + mul $6,$7,$8 + nop diff --git a/gas/testsuite/gas/mips/mul-ilocks.d b/gas/testsuite/gas/mips/mul-ilocks.d new file mode 100644 index 0000000..061ed2e --- /dev/null +++ b/gas/testsuite/gas/mips/mul-ilocks.d @@ -0,0 +1,81 @@ +#objdump: -dr --prefix-addresses +#name: MIPS mul-ilocks +#as: +#source: mul.s + +# Test the mul macro. + +.*: +file format .*mips.* + +Disassembly of section .text: +0+0000 <[^>]*> multu \$a0,\$a1 +0+0004 <[^>]*> mflo \$a0 +0+0008 <[^>]*> multu \$a1,\$a2 +0+000c <[^>]*> mflo \$a0 +0+0010 <[^>]*> li \$at,0 +0+0014 <[^>]*> mult \$a1,\$at +0+0018 <[^>]*> mflo \$a0 +0+001c <[^>]*> li \$at,1 +0+0020 <[^>]*> mult \$a1,\$at +0+0024 <[^>]*> mflo \$a0 +0+0028 <[^>]*> li \$at,0x8000 +0+002c <[^>]*> mult \$a1,\$at +0+0030 <[^>]*> mflo \$a0 +0+0034 <[^>]*> li \$at,-32768 +0+0038 <[^>]*> mult \$a1,\$at +0+003c <[^>]*> mflo \$a0 +0+0040 <[^>]*> lui \$at,0x1 +0+0044 <[^>]*> mult \$a1,\$at +0+0048 <[^>]*> mflo \$a0 +0+004c <[^>]*> lui \$at,0x1 +0+0050 <[^>]*> ori \$at,\$at,0xa5a5 +0+0054 <[^>]*> mult \$a1,\$at +0+0058 <[^>]*> mflo \$a0 +0+005c <[^>]*> mult \$a0,\$a1 +0+0060 <[^>]*> mflo \$a0 +0+0064 <[^>]*> sra \$a0,\$a0,0x1f +0+0068 <[^>]*> mfhi \$at +0+006c <[^>]*> beq \$a0,\$at,0+78 <foo\+(0x|)78> +0+0070 <[^>]*> nop +0+0074 <[^>]*> break (0x0,0x6|0x6) +0+0078 <[^>]*> mflo \$a0 +0+007c <[^>]*> mult \$a1,\$a2 +0+0080 <[^>]*> mflo \$a0 +0+0084 <[^>]*> sra \$a0,\$a0,0x1f +0+0088 <[^>]*> mfhi \$at +0+008c <[^>]*> beq \$a0,\$at,0+98 <foo\+(0x|)98> +0+0090 <[^>]*> nop +0+0094 <[^>]*> break (0x0,0x6|0x6) +0+0098 <[^>]*> mflo \$a0 +0+009c <[^>]*> multu \$a0,\$a1 +0+00a0 <[^>]*> mfhi \$at +0+00a4 <[^>]*> mflo \$a0 +0+00a8 <[^>]*> beqz \$at,0+b4 <foo\+(0x|)b4> +0+00ac <[^>]*> nop +0+00b0 <[^>]*> break (0x0,0x6|0x6) +0+00b4 <[^>]*> multu \$a1,\$a2 +0+00b8 <[^>]*> mfhi \$at +0+00bc <[^>]*> mflo \$a0 +0+00c0 <[^>]*> beqz \$at,0+cc <foo\+(0x|)cc> +0+00c4 <[^>]*> nop +0+00c8 <[^>]*> break (0x0,0x6|0x6) +0+00cc <[^>]*> dmultu \$a1,\$a2 +0+00d0 <[^>]*> mflo \$a0 +0+00d4 <[^>]*> li \$at,1 +0+00d8 <[^>]*> dmult \$a1,\$at +0+00dc <[^>]*> mflo \$a0 +0+00e0 <[^>]*> dmult \$a1,\$a2 +0+00e4 <[^>]*> mflo \$a0 +0+00e8 <[^>]*> dsra32 \$a0,\$a0,0x1f +0+00ec <[^>]*> mfhi \$at +0+00f0 <[^>]*> beq \$a0,\$at,0+fc <foo\+(0x|)fc> +0+00f4 <[^>]*> nop +0+00f8 <[^>]*> break (0x0,0x6|0x6) +0+00fc <[^>]*> mflo \$a0 +0+0100 <[^>]*> dmultu \$a1,\$a2 +0+0104 <[^>]*> mfhi \$at +0+0108 <[^>]*> mflo \$a0 +0+010c <[^>]*> beqz \$at,0+118 <foo\+(0x|)118> +0+0110 <[^>]*> nop +0+0114 <[^>]*> break (0x0,0x6|0x6) + ... diff --git a/gas/testsuite/gas/mips/mul.d b/gas/testsuite/gas/mips/mul.d new file mode 100644 index 0000000..92b6265 --- /dev/null +++ b/gas/testsuite/gas/mips/mul.d @@ -0,0 +1,92 @@ +#objdump: -dr --prefix-addresses -mmips:4000 +#as: -mcpu=r4000 +#name: MIPS mul + +# Test the mul macro. + +.*: +file format .*mips.* + +Disassembly of section .text: +0+0000 <[^>]*> multu \$a0,\$a1 +0+0004 <[^>]*> mflo \$a0 + ... +0+0010 <[^>]*> multu \$a1,\$a2 +0+0014 <[^>]*> mflo \$a0 +0+0018 <[^>]*> li \$at,0 +0+001c <[^>]*> nop +0+0020 <[^>]*> mult \$a1,\$at +0+0024 <[^>]*> mflo \$a0 +0+0028 <[^>]*> li \$at,1 +0+002c <[^>]*> nop +0+0030 <[^>]*> mult \$a1,\$at +0+0034 <[^>]*> mflo \$a0 +0+0038 <[^>]*> li \$at,0x8000 +0+003c <[^>]*> nop +0+0040 <[^>]*> mult \$a1,\$at +0+0044 <[^>]*> mflo \$a0 +0+0048 <[^>]*> li \$at,-32768 +0+004c <[^>]*> nop +0+0050 <[^>]*> mult \$a1,\$at +0+0054 <[^>]*> mflo \$a0 +0+0058 <[^>]*> lui \$at,0x1 +0+005c <[^>]*> nop +0+0060 <[^>]*> mult \$a1,\$at +0+0064 <[^>]*> mflo \$a0 +0+0068 <[^>]*> lui \$at,0x1 +0+006c <[^>]*> ori \$at,\$at,0xa5a5 +0+0070 <[^>]*> mult \$a1,\$at +0+0074 <[^>]*> mflo \$a0 + ... +0+0080 <[^>]*> mult \$a0,\$a1 +0+0084 <[^>]*> mflo \$a0 +0+0088 <[^>]*> sra \$a0,\$a0,0x1f +0+008c <[^>]*> mfhi \$at +0+0090 <[^>]*> beq \$a0,\$at,0+9c <foo\+(0x|)9c> +0+0094 <[^>]*> nop +0+0098 <[^>]*> break (0x0,0x6|0x6) +0+009c <[^>]*> mflo \$a0 + ... +0+00a8 <[^>]*> mult \$a1,\$a2 +0+00ac <[^>]*> mflo \$a0 +0+00b0 <[^>]*> sra \$a0,\$a0,0x1f +0+00b4 <[^>]*> mfhi \$at +0+00b8 <[^>]*> beq \$a0,\$at,0+c4 <foo\+(0x|)c4> +0+00bc <[^>]*> nop +0+00c0 <[^>]*> break (0x0,0x6|0x6) +0+00c4 <[^>]*> mflo \$a0 + ... +0+00d0 <[^>]*> multu \$a0,\$a1 +0+00d4 <[^>]*> mfhi \$at +0+00d8 <[^>]*> mflo \$a0 +0+00dc <[^>]*> beqz \$at,0+e8 <foo\+(0x|)e8> +0+00e0 <[^>]*> nop +0+00e4 <[^>]*> break (0x0,0x6|0x6) +0+00e8 <[^>]*> multu \$a1,\$a2 +0+00ec <[^>]*> mfhi \$at +0+00f0 <[^>]*> mflo \$a0 +0+00f4 <[^>]*> beqz \$at,0+100 <foo\+(0x|)100> +0+00f8 <[^>]*> nop +0+00fc <[^>]*> break (0x0,0x6|0x6) +0+0100 <[^>]*> dmultu \$a1,\$a2 +0+0104 <[^>]*> mflo \$a0 +0+0108 <[^>]*> li \$at,1 +0+010c <[^>]*> nop +0+0110 <[^>]*> dmult \$a1,\$at +0+0114 <[^>]*> mflo \$a0 + ... +0+0120 <[^>]*> dmult \$a1,\$a2 +0+0124 <[^>]*> mflo \$a0 +0+0128 <[^>]*> dsra32 \$a0,\$a0,0x1f +0+012c <[^>]*> mfhi \$at +0+0130 <[^>]*> beq \$a0,\$at,0+13c <foo\+(0x|)13c> +0+0134 <[^>]*> nop +0+0138 <[^>]*> break (0x0,0x6|0x6) +0+013c <[^>]*> mflo \$a0 + ... +0+0148 <[^>]*> dmultu \$a1,\$a2 +0+014c <[^>]*> mfhi \$at +0+0150 <[^>]*> mflo \$a0 +0+0154 <[^>]*> beqz \$at,0+160 <foo\+(0x|)160> +0+0158 <[^>]*> nop +0+015c <[^>]*> break (0x0,0x6|0x6) + ... diff --git a/gas/testsuite/gas/mips/mul.s b/gas/testsuite/gas/mips/mul.s new file mode 100644 index 0000000..b29e369 --- /dev/null +++ b/gas/testsuite/gas/mips/mul.s @@ -0,0 +1,27 @@ +# Source file used to test the mul macro. + +foo: + mul $4,$5 + mul $4,$5,$6 + mul $4,$5,0 + mul $4,$5,1 + mul $4,$5,0x8000 + mul $4,$5,-0x8000 + mul $4,$5,0x10000 + mul $4,$5,0x1a5a5 + +# mulo and mulou are only supported for register arguments + mulo $4,$5 + mulo $4,$5,$6 + + mulou $4,$5 + mulou $4,$5,$6 + +# Sanity check the 64 bit versions. + .set mips3 + dmul $4,$5,$6 + dmul $4,$5,1 + dmulo $4,$5,$6 + dmulou $4,$5,$6 + + .space 8 diff --git a/gas/testsuite/gas/mips/nodelay.d b/gas/testsuite/gas/mips/nodelay.d new file mode 100644 index 0000000..dc93079 --- /dev/null +++ b/gas/testsuite/gas/mips/nodelay.d @@ -0,0 +1,19 @@ +#objdump: -dr --prefix-addresses -mmips:5000 +#name: MIPS nodelay +#as: -mips4 -mcpu=r8000 +#source: delay.s + +# For -mips4 +# Gas should *not* produce nop's after mtc1 and related +# insn's if the target fpr is used in the immediatly +# following insn. See also delay.d. +# + +.*: +file format .*mips.* + +Disassembly of section .text: +0+0000 <[^>]*> mtc1 \$zero,\$f0 +0+0004 <[^>]*> cvt.d.w \$f0,\$f0 +0+0008 <[^>]*> mtc1 \$zero,\$f1 +0+000c <[^>]*> cvt.d.w \$f1,\$f1 + ... diff --git a/gas/testsuite/gas/mips/rol.d b/gas/testsuite/gas/mips/rol.d new file mode 100644 index 0000000..14ce142 --- /dev/null +++ b/gas/testsuite/gas/mips/rol.d @@ -0,0 +1,37 @@ +#objdump: -dr --prefix-addresses -mmips:3000 +#as: -mcpu=r3000 +#name: MIPS R3000 rol + +# Test the rol and ror macros. + +.*: +file format .*mips.* + +Disassembly of section .text: +0+0000 <[^>]*> negu \$at,\$a1 +0+0004 <[^>]*> srlv \$at,\$a0,\$at +0+0008 <[^>]*> sllv \$a0,\$a0,\$a1 +0+000c <[^>]*> or \$a0,\$a0,\$at +0+0010 <[^>]*> negu \$at,\$a2 +0+0014 <[^>]*> srlv \$at,\$a1,\$at +0+0018 <[^>]*> sllv \$a0,\$a1,\$a2 +0+001c <[^>]*> or \$a0,\$a0,\$at +0+0020 <[^>]*> sll \$at,\$a0,0x1 +0+0024 <[^>]*> srl \$a0,\$a0,0x1f +0+0028 <[^>]*> or \$a0,\$a0,\$at +0+002c <[^>]*> sll \$at,\$a1,0x1 +0+0030 <[^>]*> srl \$a0,\$a1,0x1f +0+0034 <[^>]*> or \$a0,\$a0,\$at +0+0038 <[^>]*> negu \$at,\$a1 +0+003c <[^>]*> sllv \$at,\$a0,\$at +0+0040 <[^>]*> srlv \$a0,\$a0,\$a1 +0+0044 <[^>]*> or \$a0,\$a0,\$at +0+0048 <[^>]*> negu \$at,\$a2 +0+004c <[^>]*> sllv \$at,\$a1,\$at +0+0050 <[^>]*> srlv \$a0,\$a1,\$a2 +0+0054 <[^>]*> or \$a0,\$a0,\$at +0+0058 <[^>]*> srl \$at,\$a0,0x1 +0+005c <[^>]*> sll \$a0,\$a0,0x1f +0+0060 <[^>]*> or \$a0,\$a0,\$at +0+0064 <[^>]*> srl \$at,\$a1,0x1 +0+0068 <[^>]*> sll \$a0,\$a1,0x1f +0+006c <[^>]*> or \$a0,\$a0,\$at diff --git a/gas/testsuite/gas/mips/rol.s b/gas/testsuite/gas/mips/rol.s new file mode 100644 index 0000000..259a957 --- /dev/null +++ b/gas/testsuite/gas/mips/rol.s @@ -0,0 +1,12 @@ +# Source file used to test the rol and ror macros. + +foo: + rol $4,$5 + rol $4,$5,$6 + rol $4,1 + rol $4,$5,1 + + ror $4,$5 + ror $4,$5,$6 + ror $4,1 + ror $4,$5,1 diff --git a/gas/testsuite/gas/mips/sb.d b/gas/testsuite/gas/mips/sb.d new file mode 100644 index 0000000..0ef4bc1 --- /dev/null +++ b/gas/testsuite/gas/mips/sb.d @@ -0,0 +1,396 @@ +#objdump: -dr --prefix-addresses -mmips:3000 +#name: MIPS sb +#as: -mips1 + +# Test the sb macro. + +.*: +file format .*mips.* + +Disassembly of section .text: +0+0000 <[^>]*> sb \$a0,0\(\$zero\) +0+0004 <[^>]*> sb \$a0,1\(\$zero\) +0+0008 <[^>]*> lui \$at,0x1 +0+000c <[^>]*> sb \$a0,-32768\(\$at\) +0+0010 <[^>]*> sb \$a0,-32768\(\$zero\) +0+0014 <[^>]*> lui \$at,0x1 +0+0018 <[^>]*> sb \$a0,0\(\$at\) +0+001c <[^>]*> lui \$at,0x2 +0+0020 <[^>]*> sb \$a0,-23131\(\$at\) +0+0024 <[^>]*> sb \$a0,0\(\$a1\) +0+0028 <[^>]*> sb \$a0,1\(\$a1\) +0+002c <[^>]*> lui \$at,0x1 +0+0030 <[^>]*> addu \$at,\$at,\$a1 +0+0034 <[^>]*> sb \$a0,-32768\(\$at\) +0+0038 <[^>]*> sb \$a0,-32768\(\$a1\) +0+003c <[^>]*> lui \$at,0x1 +0+0040 <[^>]*> addu \$at,\$at,\$a1 +0+0044 <[^>]*> sb \$a0,0\(\$at\) +0+0048 <[^>]*> lui \$at,0x2 +0+004c <[^>]*> addu \$at,\$at,\$a1 +0+0050 <[^>]*> sb \$a0,-23131\(\$at\) +0+0054 <[^>]*> lui \$at,0x0 +[ ]*54: [A-Z0-9_]*HI[A-Z0-9_]* .data.* +0+0058 <[^>]*> sb \$a0,[-0-9]+\(\$at\) +[ ]*58: [A-Z0-9_]*LO[A-Z0-9_]* .data.* +0+005c <[^>]*> lui \$at,0x0 +[ ]*5c: [A-Z0-9_]*HI[A-Z0-9_]* big_external_data_label +0+0060 <[^>]*> sb \$a0,0\(\$at\) +[ ]*60: [A-Z0-9_]*LO[A-Z0-9_]* big_external_data_label +0+0064 <[^>]*> sb \$a0,0\(\$gp\) +[ ]*64: [A-Z0-9_]*GPREL[A-Z0-9_]* small_external_data_label +0+0068 <[^>]*> lui \$at,0x0 +[ ]*68: [A-Z0-9_]*HI[A-Z0-9_]* big_external_common +0+006c <[^>]*> sb \$a0,0\(\$at\) +[ ]*6c: [A-Z0-9_]*LO[A-Z0-9_]* big_external_common +0+0070 <[^>]*> sb \$a0,0\(\$gp\) +[ ]*70: [A-Z0-9_]*GPREL[A-Z0-9_]* small_external_common +0+0074 <[^>]*> lui \$at,0x0 +[ ]*74: [A-Z0-9_]*HI[A-Z0-9_]* .bss.* +0+0078 <[^>]*> sb \$a0,[-0-9]+\(\$at\) +[ ]*78: [A-Z0-9_]*LO[A-Z0-9_]* .bss.* +0+007c <[^>]*> sb \$a0,[-0-9]+\(\$gp\) +[ ]*7c: [A-Z0-9_]*GPREL[A-Z0-9_]* .sbss.* +0+0080 <[^>]*> lui \$at,0x0 +[ ]*80: [A-Z0-9_]*HI[A-Z0-9_]* .data.* +0+0084 <[^>]*> sb \$a0,[-0-9]+\(\$at\) +[ ]*84: [A-Z0-9_]*LO[A-Z0-9_]* .data.* +0+0088 <[^>]*> lui \$at,0x0 +[ ]*88: [A-Z0-9_]*HI[A-Z0-9_]* big_external_data_label +0+008c <[^>]*> sb \$a0,[-0-9]+\(\$at\) +[ ]*8c: [A-Z0-9_]*LO[A-Z0-9_]* big_external_data_label +0+0090 <[^>]*> sb \$a0,1\(\$gp\) +[ ]*90: [A-Z0-9_]*GPREL[A-Z0-9_]* small_external_data_label +0+0094 <[^>]*> lui \$at,0x0 +[ ]*94: [A-Z0-9_]*HI[A-Z0-9_]* big_external_common +0+0098 <[^>]*> sb \$a0,[-0-9]+\(\$at\) +[ ]*98: [A-Z0-9_]*LO[A-Z0-9_]* big_external_common +0+009c <[^>]*> sb \$a0,1\(\$gp\) +[ ]*9c: [A-Z0-9_]*GPREL[A-Z0-9_]* small_external_common +0+00a0 <[^>]*> lui \$at,0x0 +[ ]*a0: [A-Z0-9_]*HI[A-Z0-9_]* .bss.* +0+00a4 <[^>]*> sb \$a0,[-0-9]+\(\$at\) +[ ]*a4: [A-Z0-9_]*LO[A-Z0-9_]* .bss.* +0+00a8 <[^>]*> sb \$a0,[-0-9]+\(\$gp\) +[ ]*a8: [A-Z0-9_]*GPREL[A-Z0-9_]* .sbss.* +0+00ac <[^>]*> lui \$at,[-0-9x]+ +[ ]*ac: [A-Z0-9_]*HI[A-Z0-9_]* .data.* +0+00b0 <[^>]*> sb \$a0,[-0-9]+\(\$at\) +[ ]*b0: [A-Z0-9_]*LO[A-Z0-9_]* .data.* +0+00b4 <[^>]*> lui \$at,[-0-9x]+ +[ ]*b4: [A-Z0-9_]*HI[A-Z0-9_]* big_external_data_label +0+00b8 <[^>]*> sb \$a0,[-0-9]+\(\$at\) +[ ]*b8: [A-Z0-9_]*LO[A-Z0-9_]* big_external_data_label +0+00bc <[^>]*> lui \$at,[-0-9x]+ +[ ]*bc: [A-Z0-9_]*HI[A-Z0-9_]* small_external_data_label +0+00c0 <[^>]*> sb \$a0,[-0-9]+\(\$at\) +[ ]*c0: [A-Z0-9_]*LO[A-Z0-9_]* small_external_data_label +0+00c4 <[^>]*> lui \$at,[-0-9x]+ +[ ]*c4: [A-Z0-9_]*HI[A-Z0-9_]* big_external_common +0+00c8 <[^>]*> sb \$a0,[-0-9]+\(\$at\) +[ ]*c8: [A-Z0-9_]*LO[A-Z0-9_]* big_external_common +0+00cc <[^>]*> lui \$at,[-0-9x]+ +[ ]*cc: [A-Z0-9_]*HI[A-Z0-9_]* small_external_common +0+00d0 <[^>]*> sb \$a0,[-0-9]+\(\$at\) +[ ]*d0: [A-Z0-9_]*LO[A-Z0-9_]* small_external_common +0+00d4 <[^>]*> lui \$at,[-0-9x]+ +[ ]*d4: [A-Z0-9_]*HI[A-Z0-9_]* .bss.* +0+00d8 <[^>]*> sb \$a0,[-0-9]+\(\$at\) +[ ]*d8: [A-Z0-9_]*LO[A-Z0-9_]* .bss.* +0+00dc <[^>]*> lui \$at,[-0-9x]+ +[ ]*dc: [A-Z0-9_]*HI[A-Z0-9_]* .sbss.* +0+00e0 <[^>]*> sb \$a0,[-0-9]+\(\$at\) +[ ]*e0: [A-Z0-9_]*LO[A-Z0-9_]* .sbss.* +0+00e4 <[^>]*> lui \$at,0x0 +[ ]*e4: [A-Z0-9_]*HI[A-Z0-9_]* .data.* +0+00e8 <[^>]*> sb \$a0,[-0-9]+\(\$at\) +[ ]*e8: [A-Z0-9_]*LO[A-Z0-9_]* .data.* +0+00ec <[^>]*> lui \$at,0x0 +[ ]*ec: [A-Z0-9_]*HI[A-Z0-9_]* big_external_data_label +0+00f0 <[^>]*> sb \$a0,[-0-9]+\(\$at\) +[ ]*f0: [A-Z0-9_]*LO[A-Z0-9_]* big_external_data_label +0+00f4 <[^>]*> lui \$at,0x0 +[ ]*f4: [A-Z0-9_]*HI[A-Z0-9_]* small_external_data_label +0+00f8 <[^>]*> sb \$a0,[-0-9]+\(\$at\) +[ ]*f8: [A-Z0-9_]*LO[A-Z0-9_]* small_external_data_label +0+00fc <[^>]*> lui \$at,0x0 +[ ]*fc: [A-Z0-9_]*HI[A-Z0-9_]* big_external_common +0+0100 <[^>]*> sb \$a0,[-0-9]+\(\$at\) +[ ]*100: [A-Z0-9_]*LO[A-Z0-9_]* big_external_common +0+0104 <[^>]*> lui \$at,0x0 +[ ]*104: [A-Z0-9_]*HI[A-Z0-9_]* small_external_common +0+0108 <[^>]*> sb \$a0,[-0-9]+\(\$at\) +[ ]*108: [A-Z0-9_]*LO[A-Z0-9_]* small_external_common +0+010c <[^>]*> lui \$at,0x0 +[ ]*10c: [A-Z0-9_]*HI[A-Z0-9_]* .bss.* +0+0110 <[^>]*> sb \$a0,[-0-9]+\(\$at\) +[ ]*110: [A-Z0-9_]*LO[A-Z0-9_]* .bss.* +0+0114 <[^>]*> lui \$at,0x0 +[ ]*114: [A-Z0-9_]*HI[A-Z0-9_]* .sbss.* +0+0118 <[^>]*> sb \$a0,[-0-9]+\(\$at\) +[ ]*118: [A-Z0-9_]*LO[A-Z0-9_]* .sbss.* +0+011c <[^>]*> lui \$at,[-0-9x]+ +[ ]*11c: [A-Z0-9_]*HI[A-Z0-9_]* .data.* +0+0120 <[^>]*> sb \$a0,[-0-9]+\(\$at\) +[ ]*120: [A-Z0-9_]*LO[A-Z0-9_]* .data.* +0+0124 <[^>]*> lui \$at,[-0-9x]+ +[ ]*124: [A-Z0-9_]*HI[A-Z0-9_]* big_external_data_label +0+0128 <[^>]*> sb \$a0,0\(\$at\) +[ ]*128: [A-Z0-9_]*LO[A-Z0-9_]* big_external_data_label +0+012c <[^>]*> lui \$at,[-0-9x]+ +[ ]*12c: [A-Z0-9_]*HI[A-Z0-9_]* small_external_data_label +0+0130 <[^>]*> sb \$a0,0\(\$at\) +[ ]*130: [A-Z0-9_]*LO[A-Z0-9_]* small_external_data_label +0+0134 <[^>]*> lui \$at,[-0-9x]+ +[ ]*134: [A-Z0-9_]*HI[A-Z0-9_]* big_external_common +0+0138 <[^>]*> sb \$a0,0\(\$at\) +[ ]*138: [A-Z0-9_]*LO[A-Z0-9_]* big_external_common +0+013c <[^>]*> lui \$at,[-0-9x]+ +[ ]*13c: [A-Z0-9_]*HI[A-Z0-9_]* small_external_common +0+0140 <[^>]*> sb \$a0,0\(\$at\) +[ ]*140: [A-Z0-9_]*LO[A-Z0-9_]* small_external_common +0+0144 <[^>]*> lui \$at,[-0-9x]+ +[ ]*144: [A-Z0-9_]*HI[A-Z0-9_]* .bss.* +0+0148 <[^>]*> sb \$a0,[-0-9]+\(\$at\) +[ ]*148: [A-Z0-9_]*LO[A-Z0-9_]* .bss.* +0+014c <[^>]*> lui \$at,[-0-9x]+ +[ ]*14c: [A-Z0-9_]*HI[A-Z0-9_]* .sbss.* +0+0150 <[^>]*> sb \$a0,[-0-9]+\(\$at\) +[ ]*150: [A-Z0-9_]*LO[A-Z0-9_]* .sbss.* +0+0154 <[^>]*> lui \$at,[-0-9x]+ +[ ]*154: [A-Z0-9_]*HI[A-Z0-9_]* .data.* +0+0158 <[^>]*> sb \$a0,[-0-9]+\(\$at\) +[ ]*158: [A-Z0-9_]*LO[A-Z0-9_]* .data.* +0+015c <[^>]*> lui \$at,[-0-9x]+ +[ ]*15c: [A-Z0-9_]*HI[A-Z0-9_]* big_external_data_label +0+0160 <[^>]*> sb \$a0,[-0-9]+\(\$at\) +[ ]*160: [A-Z0-9_]*LO[A-Z0-9_]* big_external_data_label +0+0164 <[^>]*> lui \$at,[-0-9x]+ +[ ]*164: [A-Z0-9_]*HI[A-Z0-9_]* small_external_data_label +0+0168 <[^>]*> sb \$a0,[-0-9]+\(\$at\) +[ ]*168: [A-Z0-9_]*LO[A-Z0-9_]* small_external_data_label +0+016c <[^>]*> lui \$at,[-0-9x]+ +[ ]*16c: [A-Z0-9_]*HI[A-Z0-9_]* big_external_common +0+0170 <[^>]*> sb \$a0,[-0-9]+\(\$at\) +[ ]*170: [A-Z0-9_]*LO[A-Z0-9_]* big_external_common +0+0174 <[^>]*> lui \$at,[-0-9x]+ +[ ]*174: [A-Z0-9_]*HI[A-Z0-9_]* small_external_common +0+0178 <[^>]*> sb \$a0,[-0-9]+\(\$at\) +[ ]*178: [A-Z0-9_]*LO[A-Z0-9_]* small_external_common +0+017c <[^>]*> lui \$at,[-0-9x]+ +[ ]*17c: [A-Z0-9_]*HI[A-Z0-9_]* .bss.* +0+0180 <[^>]*> sb \$a0,[-0-9]+\(\$at\) +[ ]*180: [A-Z0-9_]*LO[A-Z0-9_]* .bss.* +0+0184 <[^>]*> lui \$at,[-0-9x]+ +[ ]*184: [A-Z0-9_]*HI[A-Z0-9_]* .sbss.* +0+0188 <[^>]*> sb \$a0,[-0-9]+\(\$at\) +[ ]*188: [A-Z0-9_]*LO[A-Z0-9_]* .sbss.* +0+018c <[^>]*> lui \$at,0x0 +[ ]*18c: [A-Z0-9_]*HI[A-Z0-9_]* .data.* +0+0190 <[^>]*> addu \$at,\$at,\$a1 +0+0194 <[^>]*> sb \$a0,[-0-9]+\(\$at\) +[ ]*194: [A-Z0-9_]*LO[A-Z0-9_]* .data.* +0+0198 <[^>]*> lui \$at,0x0 +[ ]*198: [A-Z0-9_]*HI[A-Z0-9_]* big_external_data_label +0+019c <[^>]*> addu \$at,\$at,\$a1 +0+01a0 <[^>]*> sb \$a0,0\(\$at\) +[ ]*1a0: [A-Z0-9_]*LO[A-Z0-9_]* big_external_data_label +0+01a4 <[^>]*> addu \$at,\$a1,\$gp +0+01a8 <[^>]*> sb \$a0,0\(\$at\) +[ ]*1a8: [A-Z0-9_]*GPREL[A-Z0-9_]* small_external_data_label +0+01ac <[^>]*> lui \$at,0x0 +[ ]*1ac: [A-Z0-9_]*HI[A-Z0-9_]* big_external_common +0+01b0 <[^>]*> addu \$at,\$at,\$a1 +0+01b4 <[^>]*> sb \$a0,0\(\$at\) +[ ]*1b4: [A-Z0-9_]*LO[A-Z0-9_]* big_external_common +0+01b8 <[^>]*> addu \$at,\$a1,\$gp +0+01bc <[^>]*> sb \$a0,0\(\$at\) +[ ]*1bc: [A-Z0-9_]*GPREL[A-Z0-9_]* small_external_common +0+01c0 <[^>]*> lui \$at,0x0 +[ ]*1c0: [A-Z0-9_]*HI[A-Z0-9_]* .bss.* +0+01c4 <[^>]*> addu \$at,\$at,\$a1 +0+01c8 <[^>]*> sb \$a0,[-0-9]+\(\$at\) +[ ]*1c8: [A-Z0-9_]*LO[A-Z0-9_]* .bss.* +0+01cc <[^>]*> addu \$at,\$a1,\$gp +0+01d0 <[^>]*> sb \$a0,[-0-9]+\(\$at\) +[ ]*1d0: [A-Z0-9_]*GPREL[A-Z0-9_]* .sbss.* +0+01d4 <[^>]*> lui \$at,0x0 +[ ]*1d4: [A-Z0-9_]*HI[A-Z0-9_]* .data.* +0+01d8 <[^>]*> addu \$at,\$at,\$a1 +0+01dc <[^>]*> sb \$a0,[-0-9]+\(\$at\) +[ ]*1dc: [A-Z0-9_]*LO[A-Z0-9_]* .data.* +0+01e0 <[^>]*> lui \$at,0x0 +[ ]*1e0: [A-Z0-9_]*HI[A-Z0-9_]* big_external_data_label +0+01e4 <[^>]*> addu \$at,\$at,\$a1 +0+01e8 <[^>]*> sb \$a0,[-0-9]+\(\$at\) +[ ]*1e8: [A-Z0-9_]*LO[A-Z0-9_]* big_external_data_label +0+01ec <[^>]*> addu \$at,\$a1,\$gp +0+01f0 <[^>]*> sb \$a0,1\(\$at\) +[ ]*1f0: [A-Z0-9_]*GPREL[A-Z0-9_]* small_external_data_label +0+01f4 <[^>]*> lui \$at,0x0 +[ ]*1f4: [A-Z0-9_]*HI[A-Z0-9_]* big_external_common +0+01f8 <[^>]*> addu \$at,\$at,\$a1 +0+01fc <[^>]*> sb \$a0,[-0-9]+\(\$at\) +[ ]*1fc: [A-Z0-9_]*LO[A-Z0-9_]* big_external_common +0+0200 <[^>]*> addu \$at,\$a1,\$gp +0+0204 <[^>]*> sb \$a0,1\(\$at\) +[ ]*204: [A-Z0-9_]*GPREL[A-Z0-9_]* small_external_common +0+0208 <[^>]*> lui \$at,0x0 +[ ]*208: [A-Z0-9_]*HI[A-Z0-9_]* .bss.* +0+020c <[^>]*> addu \$at,\$at,\$a1 +0+0210 <[^>]*> sb \$a0,[-0-9]+\(\$at\) +[ ]*210: [A-Z0-9_]*LO[A-Z0-9_]* .bss.* +0+0214 <[^>]*> addu \$at,\$a1,\$gp +0+0218 <[^>]*> sb \$a0,[-0-9]+\(\$at\) +[ ]*218: [A-Z0-9_]*GPREL[A-Z0-9_]* .sbss.* +0+021c <[^>]*> lui \$at,[-0-9x]+ +[ ]*21c: [A-Z0-9_]*HI[A-Z0-9_]* .data.* +0+0220 <[^>]*> addu \$at,\$at,\$a1 +0+0224 <[^>]*> sb \$a0,[-0-9]+\(\$at\) +[ ]*224: [A-Z0-9_]*LO[A-Z0-9_]* .data.* +0+0228 <[^>]*> lui \$at,[-0-9x]+ +[ ]*228: [A-Z0-9_]*HI[A-Z0-9_]* big_external_data_label +0+022c <[^>]*> addu \$at,\$at,\$a1 +0+0230 <[^>]*> sb \$a0,[-0-9]+\(\$at\) +[ ]*230: [A-Z0-9_]*LO[A-Z0-9_]* big_external_data_label +0+0234 <[^>]*> lui \$at,[-0-9x]+ +[ ]*234: [A-Z0-9_]*HI[A-Z0-9_]* small_external_data_label +0+0238 <[^>]*> addu \$at,\$at,\$a1 +0+023c <[^>]*> sb \$a0,[-0-9]+\(\$at\) +[ ]*23c: [A-Z0-9_]*LO[A-Z0-9_]* small_external_data_label +0+0240 <[^>]*> lui \$at,[-0-9x]+ +[ ]*240: [A-Z0-9_]*HI[A-Z0-9_]* big_external_common +0+0244 <[^>]*> addu \$at,\$at,\$a1 +0+0248 <[^>]*> sb \$a0,[-0-9]+\(\$at\) +[ ]*248: [A-Z0-9_]*LO[A-Z0-9_]* big_external_common +0+024c <[^>]*> lui \$at,[-0-9x]+ +[ ]*24c: [A-Z0-9_]*HI[A-Z0-9_]* small_external_common +0+0250 <[^>]*> addu \$at,\$at,\$a1 +0+0254 <[^>]*> sb \$a0,[-0-9]+\(\$at\) +[ ]*254: [A-Z0-9_]*LO[A-Z0-9_]* small_external_common +0+0258 <[^>]*> lui \$at,[-0-9x]+ +[ ]*258: [A-Z0-9_]*HI[A-Z0-9_]* .bss.* +0+025c <[^>]*> addu \$at,\$at,\$a1 +0+0260 <[^>]*> sb \$a0,[-0-9]+\(\$at\) +[ ]*260: [A-Z0-9_]*LO[A-Z0-9_]* .bss.* +0+0264 <[^>]*> lui \$at,[-0-9x]+ +[ ]*264: [A-Z0-9_]*HI[A-Z0-9_]* .sbss.* +0+0268 <[^>]*> addu \$at,\$at,\$a1 +0+026c <[^>]*> sb \$a0,[-0-9]+\(\$at\) +[ ]*26c: [A-Z0-9_]*LO[A-Z0-9_]* .sbss.* +0+0270 <[^>]*> lui \$at,0x0 +[ ]*270: [A-Z0-9_]*HI[A-Z0-9_]* .data.* +0+0274 <[^>]*> addu \$at,\$at,\$a1 +0+0278 <[^>]*> sb \$a0,[-0-9]+\(\$at\) +[ ]*278: [A-Z0-9_]*LO[A-Z0-9_]* .data.* +0+027c <[^>]*> lui \$at,0x0 +[ ]*27c: [A-Z0-9_]*HI[A-Z0-9_]* big_external_data_label +0+0280 <[^>]*> addu \$at,\$at,\$a1 +0+0284 <[^>]*> sb \$a0,[-0-9]+\(\$at\) +[ ]*284: [A-Z0-9_]*LO[A-Z0-9_]* big_external_data_label +0+0288 <[^>]*> lui \$at,0x0 +[ ]*288: [A-Z0-9_]*HI[A-Z0-9_]* small_external_data_label +0+028c <[^>]*> addu \$at,\$at,\$a1 +0+0290 <[^>]*> sb \$a0,[-0-9]+\(\$at\) +[ ]*290: [A-Z0-9_]*LO[A-Z0-9_]* small_external_data_label +0+0294 <[^>]*> lui \$at,0x0 +[ ]*294: [A-Z0-9_]*HI[A-Z0-9_]* big_external_common +0+0298 <[^>]*> addu \$at,\$at,\$a1 +0+029c <[^>]*> sb \$a0,[-0-9]+\(\$at\) +[ ]*29c: [A-Z0-9_]*LO[A-Z0-9_]* big_external_common +0+02a0 <[^>]*> lui \$at,0x0 +[ ]*2a0: [A-Z0-9_]*HI[A-Z0-9_]* small_external_common +0+02a4 <[^>]*> addu \$at,\$at,\$a1 +0+02a8 <[^>]*> sb \$a0,[-0-9]+\(\$at\) +[ ]*2a8: [A-Z0-9_]*LO[A-Z0-9_]* small_external_common +0+02ac <[^>]*> lui \$at,0x0 +[ ]*2ac: [A-Z0-9_]*HI[A-Z0-9_]* .bss.* +0+02b0 <[^>]*> addu \$at,\$at,\$a1 +0+02b4 <[^>]*> sb \$a0,[-0-9]+\(\$at\) +[ ]*2b4: [A-Z0-9_]*LO[A-Z0-9_]* .bss.* +0+02b8 <[^>]*> lui \$at,0x0 +[ ]*2b8: [A-Z0-9_]*HI[A-Z0-9_]* .sbss.* +0+02bc <[^>]*> addu \$at,\$at,\$a1 +0+02c0 <[^>]*> sb \$a0,[-0-9]+\(\$at\) +[ ]*2c0: [A-Z0-9_]*LO[A-Z0-9_]* .sbss.* +0+02c4 <[^>]*> lui \$at,[-0-9x]+ +[ ]*2c4: [A-Z0-9_]*HI[A-Z0-9_]* .data.* +0+02c8 <[^>]*> addu \$at,\$at,\$a1 +0+02cc <[^>]*> sb \$a0,[-0-9]+\(\$at\) +[ ]*2cc: [A-Z0-9_]*LO[A-Z0-9_]* .data.* +0+02d0 <[^>]*> lui \$at,[-0-9x]+ +[ ]*2d0: [A-Z0-9_]*HI[A-Z0-9_]* big_external_data_label +0+02d4 <[^>]*> addu \$at,\$at,\$a1 +0+02d8 <[^>]*> sb \$a0,0\(\$at\) +[ ]*2d8: [A-Z0-9_]*LO[A-Z0-9_]* big_external_data_label +0+02dc <[^>]*> lui \$at,[-0-9x]+ +[ ]*2dc: [A-Z0-9_]*HI[A-Z0-9_]* small_external_data_label +0+02e0 <[^>]*> addu \$at,\$at,\$a1 +0+02e4 <[^>]*> sb \$a0,0\(\$at\) +[ ]*2e4: [A-Z0-9_]*LO[A-Z0-9_]* small_external_data_label +0+02e8 <[^>]*> lui \$at,[-0-9x]+ +[ ]*2e8: [A-Z0-9_]*HI[A-Z0-9_]* big_external_common +0+02ec <[^>]*> addu \$at,\$at,\$a1 +0+02f0 <[^>]*> sb \$a0,0\(\$at\) +[ ]*2f0: [A-Z0-9_]*LO[A-Z0-9_]* big_external_common +0+02f4 <[^>]*> lui \$at,[-0-9x]+ +[ ]*2f4: [A-Z0-9_]*HI[A-Z0-9_]* small_external_common +0+02f8 <[^>]*> addu \$at,\$at,\$a1 +0+02fc <[^>]*> sb \$a0,0\(\$at\) +[ ]*2fc: [A-Z0-9_]*LO[A-Z0-9_]* small_external_common +0+0300 <[^>]*> lui \$at,[-0-9x]+ +[ ]*300: [A-Z0-9_]*HI[A-Z0-9_]* .bss.* +0+0304 <[^>]*> addu \$at,\$at,\$a1 +0+0308 <[^>]*> sb \$a0,[-0-9]+\(\$at\) +[ ]*308: [A-Z0-9_]*LO[A-Z0-9_]* .bss.* +0+030c <[^>]*> lui \$at,[-0-9x]+ +[ ]*30c: [A-Z0-9_]*HI[A-Z0-9_]* .sbss.* +0+0310 <[^>]*> addu \$at,\$at,\$a1 +0+0314 <[^>]*> sb \$a0,[-0-9]+\(\$at\) +[ ]*314: [A-Z0-9_]*LO[A-Z0-9_]* .sbss.* +0+0318 <[^>]*> lui \$at,[-0-9x]+ +[ ]*318: [A-Z0-9_]*HI[A-Z0-9_]* .data.* +0+031c <[^>]*> addu \$at,\$at,\$a1 +0+0320 <[^>]*> sb \$a0,[-0-9]+\(\$at\) +[ ]*320: [A-Z0-9_]*LO[A-Z0-9_]* .data.* +0+0324 <[^>]*> lui \$at,[-0-9x]+ +[ ]*324: [A-Z0-9_]*HI[A-Z0-9_]* big_external_data_label +0+0328 <[^>]*> addu \$at,\$at,\$a1 +0+032c <[^>]*> sb \$a0,[-0-9]+\(\$at\) +[ ]*32c: [A-Z0-9_]*LO[A-Z0-9_]* big_external_data_label +0+0330 <[^>]*> lui \$at,[-0-9x]+ +[ ]*330: [A-Z0-9_]*HI[A-Z0-9_]* small_external_data_label +0+0334 <[^>]*> addu \$at,\$at,\$a1 +0+0338 <[^>]*> sb \$a0,[-0-9]+\(\$at\) +[ ]*338: [A-Z0-9_]*LO[A-Z0-9_]* small_external_data_label +0+033c <[^>]*> lui \$at,[-0-9x]+ +[ ]*33c: [A-Z0-9_]*HI[A-Z0-9_]* big_external_common +0+0340 <[^>]*> addu \$at,\$at,\$a1 +0+0344 <[^>]*> sb \$a0,[-0-9]+\(\$at\) +[ ]*344: [A-Z0-9_]*LO[A-Z0-9_]* big_external_common +0+0348 <[^>]*> lui \$at,[-0-9x]+ +[ ]*348: [A-Z0-9_]*HI[A-Z0-9_]* small_external_common +0+034c <[^>]*> addu \$at,\$at,\$a1 +0+0350 <[^>]*> sb \$a0,[-0-9]+\(\$at\) +[ ]*350: [A-Z0-9_]*LO[A-Z0-9_]* small_external_common +0+0354 <[^>]*> lui \$at,[-0-9x]+ +[ ]*354: [A-Z0-9_]*HI[A-Z0-9_]* .bss.* +0+0358 <[^>]*> addu \$at,\$at,\$a1 +0+035c <[^>]*> sb \$a0,[-0-9]+\(\$at\) +[ ]*35c: [A-Z0-9_]*LO[A-Z0-9_]* .bss.* +0+0360 <[^>]*> lui \$at,[-0-9x]+ +[ ]*360: [A-Z0-9_]*HI[A-Z0-9_]* .sbss.* +0+0364 <[^>]*> addu \$at,\$at,\$a1 +0+0368 <[^>]*> sb \$a0,[-0-9]+\(\$at\) +[ ]*368: [A-Z0-9_]*LO[A-Z0-9_]* .sbss.* +0+036c <[^>]*> sw \$a0,0\(\$zero\) +0+0370 <[^>]*> sw \$a1,4\(\$zero\) +0+0374 <[^>]*> sh \$a0,0\(\$zero\) +0+0378 <[^>]*> sw \$a0,0\(\$zero\) +0+037c <[^>]*> swc0 \$4,0\(\$zero\) +0+0380 <[^>]*> swc1 \$f4,0\(\$zero\) +0+0384 <[^>]*> swc2 \$4,0\(\$zero\) +0+0388 <[^>]*> swc3 \$4,0\(\$zero\) +0+038c <[^>]*> swc1 \$f4,0\(\$zero\) +0+0390 <[^>]*> swl \$a0,0\(\$zero\) +0+0394 <[^>]*> swr \$a0,0\(\$zero\) + ... diff --git a/gas/testsuite/gas/mips/sb.s b/gas/testsuite/gas/mips/sb.s new file mode 100644 index 0000000..d0c7354 --- /dev/null +++ b/gas/testsuite/gas/mips/sb.s @@ -0,0 +1,124 @@ +# Source file used to test the sb macro. + + .data +data_label: + .extern big_external_data_label,1000 + .extern small_external_data_label,1 + .comm big_external_common,1000 + .comm small_external_common,1 + .lcomm big_local_common,1000 + .lcomm small_local_common,1 + + .text + sb $4,0 + sb $4,1 + sb $4,0x8000 + sb $4,-0x8000 + sb $4,0x10000 + sb $4,0x1a5a5 + sb $4,0($5) + sb $4,1($5) + sb $4,0x8000($5) + sb $4,-0x8000($5) + sb $4,0x10000($5) + sb $4,0x1a5a5($5) + sb $4,data_label + sb $4,big_external_data_label + sb $4,small_external_data_label + sb $4,big_external_common + sb $4,small_external_common + sb $4,big_local_common + sb $4,small_local_common + sb $4,data_label+1 + sb $4,big_external_data_label+1 + sb $4,small_external_data_label+1 + sb $4,big_external_common+1 + sb $4,small_external_common+1 + sb $4,big_local_common+1 + sb $4,small_local_common+1 + sb $4,data_label+0x8000 + sb $4,big_external_data_label+0x8000 + sb $4,small_external_data_label+0x8000 + sb $4,big_external_common+0x8000 + sb $4,small_external_common+0x8000 + sb $4,big_local_common+0x8000 + sb $4,small_local_common+0x8000 + sb $4,data_label-0x8000 + sb $4,big_external_data_label-0x8000 + sb $4,small_external_data_label-0x8000 + sb $4,big_external_common-0x8000 + sb $4,small_external_common-0x8000 + sb $4,big_local_common-0x8000 + sb $4,small_local_common-0x8000 + sb $4,data_label+0x10000 + sb $4,big_external_data_label+0x10000 + sb $4,small_external_data_label+0x10000 + sb $4,big_external_common+0x10000 + sb $4,small_external_common+0x10000 + sb $4,big_local_common+0x10000 + sb $4,small_local_common+0x10000 + sb $4,data_label+0x1a5a5 + sb $4,big_external_data_label+0x1a5a5 + sb $4,small_external_data_label+0x1a5a5 + sb $4,big_external_common+0x1a5a5 + sb $4,small_external_common+0x1a5a5 + sb $4,big_local_common+0x1a5a5 + sb $4,small_local_common+0x1a5a5 + sb $4,data_label($5) + sb $4,big_external_data_label($5) + sb $4,small_external_data_label($5) + sb $4,big_external_common($5) + sb $4,small_external_common($5) + sb $4,big_local_common($5) + sb $4,small_local_common($5) + sb $4,data_label+1($5) + sb $4,big_external_data_label+1($5) + sb $4,small_external_data_label+1($5) + sb $4,big_external_common+1($5) + sb $4,small_external_common+1($5) + sb $4,big_local_common+1($5) + sb $4,small_local_common+1($5) + sb $4,data_label+0x8000($5) + sb $4,big_external_data_label+0x8000($5) + sb $4,small_external_data_label+0x8000($5) + sb $4,big_external_common+0x8000($5) + sb $4,small_external_common+0x8000($5) + sb $4,big_local_common+0x8000($5) + sb $4,small_local_common+0x8000($5) + sb $4,data_label-0x8000($5) + sb $4,big_external_data_label-0x8000($5) + sb $4,small_external_data_label-0x8000($5) + sb $4,big_external_common-0x8000($5) + sb $4,small_external_common-0x8000($5) + sb $4,big_local_common-0x8000($5) + sb $4,small_local_common-0x8000($5) + sb $4,data_label+0x10000($5) + sb $4,big_external_data_label+0x10000($5) + sb $4,small_external_data_label+0x10000($5) + sb $4,big_external_common+0x10000($5) + sb $4,small_external_common+0x10000($5) + sb $4,big_local_common+0x10000($5) + sb $4,small_local_common+0x10000($5) + sb $4,data_label+0x1a5a5($5) + sb $4,big_external_data_label+0x1a5a5($5) + sb $4,small_external_data_label+0x1a5a5($5) + sb $4,big_external_common+0x1a5a5($5) + sb $4,small_external_common+0x1a5a5($5) + sb $4,big_local_common+0x1a5a5($5) + sb $4,small_local_common+0x1a5a5($5) + +# Several macros are handled like sb. Sanity check them. + sd $4,0 + sh $4,0 + sw $4,0 + swc0 $4,0 + swc1 $4,0 + swc2 $4,0 + swc3 $4,0 + s.s $f4,0 + swl $4,0 + swr $4,0 + +# Round to a 16 byte boundary, for ease in testing multiple targets. + nop + nop diff --git a/gas/testsuite/gas/mips/sync.d b/gas/testsuite/gas/mips/sync.d new file mode 100644 index 0000000..9b50ea2 --- /dev/null +++ b/gas/testsuite/gas/mips/sync.d @@ -0,0 +1,10 @@ +#objdump: -dr --prefix-addresses --show-raw-insn +#name: sync instructions +#as: + +.*: +file format .*mips.* + +Disassembly of section \.text: +0+0000 <foo> 0000000f[ ]*sync +0+0004 <foo\+0x4> 0000040f[ ]*sync.p +0+0008 <foo\+0x8> 0000000f[ ]*sync diff --git a/gas/testsuite/gas/mips/sync.s b/gas/testsuite/gas/mips/sync.s new file mode 100644 index 0000000..dec0ed3 --- /dev/null +++ b/gas/testsuite/gas/mips/sync.s @@ -0,0 +1,5 @@ + .text +foo: + sync + sync.p + sync.l diff --git a/gas/testsuite/gas/mips/trap20.d b/gas/testsuite/gas/mips/trap20.d new file mode 100644 index 0000000..997adb0 --- /dev/null +++ b/gas/testsuite/gas/mips/trap20.d @@ -0,0 +1,20 @@ +#as: -mcpu=r4000 +#objdump: -dr --prefix-addresses -mmips:4000 +#name: MIPS 20-bit trap + +.*: +file format .*mips.* + +Disassembly of section .text: +0+0000 <[^>]*> teq \$zero,\$v1 +0+0004 <[^>]*> teq \$zero,\$v1,0x1 +0+0008 <[^>]*> tge \$zero,\$v1 +0+000c <[^>]*> tge \$zero,\$v1,0x3 +0+0010 <[^>]*> tgeu \$zero,\$v1 +0+0014 <[^>]*> tgeu \$zero,\$v1,0x7 +0+0018 <[^>]*> tlt \$zero,\$v1 +0+001c <[^>]*> tlt \$zero,\$v1,0x1f +0+0020 <[^>]*> tltu \$zero,\$v1 +0+0024 <[^>]*> tltu \$zero,\$v1,0xff +0+0028 <[^>]*> tne \$zero,\$v1 +0+002c <[^>]*> tne \$zero,\$v1,0x3ff + ... diff --git a/gas/testsuite/gas/mips/trap20.s b/gas/testsuite/gas/mips/trap20.s new file mode 100644 index 0000000..a56d659 --- /dev/null +++ b/gas/testsuite/gas/mips/trap20.s @@ -0,0 +1,18 @@ +# Source file used to test the 20-bit trap instructions +foo: + teq $0,$3 + teq $0,$3,1 + tge $0,$3 + tge $0,$3,3 + tgeu $0,$3 + tgeu $0,$3,7 + tlt $0,$3 + tlt $0,$3,31 + tltu $0,$3 + tltu $0,$3,255 + tne $0,$3 + tne $0,$3,1023 + +# force some padding, to make objdump consistently report that there's some +# here... + .space 8 diff --git a/gas/testsuite/gas/mips/trunc.d b/gas/testsuite/gas/mips/trunc.d new file mode 100644 index 0000000..3738ae1 --- /dev/null +++ b/gas/testsuite/gas/mips/trunc.d @@ -0,0 +1,29 @@ +#objdump: -dr --prefix-addresses -mmips:3000 +#name: MIPS trunc +#as: -mips1 -mcpu=r3000 + +# Test the trunc macros. + +.*: +file format .*mips.* + +Disassembly of section .text: +0+0000 <[^>]*> cfc1 \$a0,\$31 +0+0004 <[^>]*> cfc1 \$a0,\$31 +0+0008 <[^>]*> nop +0+000c <[^>]*> ori \$at,\$a0,0x3 +0+0010 <[^>]*> xori \$at,\$at,0x2 +0+0014 <[^>]*> ctc1 \$at,\$31 +0+0018 <[^>]*> nop +0+001c <[^>]*> cvt.w.d \$f4,\$f6 +0+0020 <[^>]*> ctc1 \$a0,\$31 +0+0024 <[^>]*> nop +0+0028 <[^>]*> cfc1 \$a0,\$31 +0+002c <[^>]*> cfc1 \$a0,\$31 +0+0030 <[^>]*> nop +0+0034 <[^>]*> ori \$at,\$a0,0x3 +0+0038 <[^>]*> xori \$at,\$at,0x2 +0+003c <[^>]*> ctc1 \$at,\$31 +0+0040 <[^>]*> nop +0+0044 <[^>]*> cvt.w.s \$f4,\$f6 +0+0048 <[^>]*> ctc1 \$a0,\$31 +0+004c <[^>]*> nop diff --git a/gas/testsuite/gas/mips/trunc.s b/gas/testsuite/gas/mips/trunc.s new file mode 100644 index 0000000..e1e90f1 --- /dev/null +++ b/gas/testsuite/gas/mips/trunc.s @@ -0,0 +1,6 @@ +# Source file used to test the trunc macros. + +foo: + trunc.w.d $f4,$f6,$4 + + trunc.w.s $f4,$f6,$4 diff --git a/gas/testsuite/gas/mips/uld.d b/gas/testsuite/gas/mips/uld.d new file mode 100644 index 0000000..f92e29d --- /dev/null +++ b/gas/testsuite/gas/mips/uld.d @@ -0,0 +1,270 @@ +#objdump: -dr --prefix-addresses -mmips:4000 +#name: MIPS uld +#as: -mips3 -mcpu=r4000 + +# Test the uld macro. + +.*: +file format .*mips.* + +Disassembly of section .text: +0+0000 <[^>]*> ldl \$a0,[07]\(\$zero\) +0+0004 <[^>]*> ldr \$a0,[07]\(\$zero\) +0+0008 <[^>]*> ldl \$a0,[18]\(\$zero\) +0+000c <[^>]*> ldr \$a0,[18]\(\$zero\) +0+0010 <[^>]*> li \$at,0x8000 +0+0014 <[^>]*> ldl \$a0,[07]\(\$at\) +0+0018 <[^>]*> ldr \$a0,[07]\(\$at\) +0+001c <[^>]*> ldl \$a0,-3276[18]\(\$zero\) +0+0020 <[^>]*> ldr \$a0,-3276[18]\(\$zero\) +0+0024 <[^>]*> lui \$at,0x1 +0+0028 <[^>]*> ldl \$a0,[07]\(\$at\) +0+002c <[^>]*> ldr \$a0,[07]\(\$at\) +0+0030 <[^>]*> lui \$at,0x1 +0+0034 <[^>]*> ori \$at,\$at,0xa5a5 +0+0038 <[^>]*> ldl \$a0,[07]\(\$at\) +0+003c <[^>]*> ldr \$a0,[07]\(\$at\) +0+0040 <[^>]*> ldl \$a0,[07]\(\$a1\) +0+0044 <[^>]*> ldr \$a0,[07]\(\$a1\) +0+0048 <[^>]*> ldl \$a0,[18]\(\$a1\) +0+004c <[^>]*> ldr \$a0,[-0-9]+\(\$a1\) +0+0050 <[^>]*> lui \$at,[-0-9x]+ +[ ]*50: [A-Z0-9_]*HI[A-Z0-9_]* .data.* +0+0054 <[^>]*> daddiu \$at,\$at,[-0-9]+ +[ ]*54: [A-Z0-9_]*LO[A-Z0-9_]* .data.* +0+0058 <[^>]*> ldl \$a0,[07]\(\$at\) +0+005c <[^>]*> ldr \$a0,[07]\(\$at\) +0+0060 <[^>]*> lui \$at,0x0 +[ ]*60: [A-Z0-9_]*HI[A-Z0-9_]* big_external_data_label +0+0064 <[^>]*> daddiu \$at,\$at,[-0-9]+ +[ ]*64: [A-Z0-9_]*LO[A-Z0-9_]* big_external_data_label +0+0068 <[^>]*> ldl \$a0,[07]\(\$at\) +0+006c <[^>]*> ldr \$a0,[07]\(\$at\) +0+0070 <[^>]*> daddiu \$at,\$gp,0 +[ ]*70: [A-Z0-9_]*GPREL[A-Z0-9_]* small_external_data_label +0+0074 <[^>]*> ldl \$a0,[07]\(\$at\) +0+0078 <[^>]*> ldr \$a0,[07]\(\$at\) +0+007c <[^>]*> lui \$at,0x0 +[ ]*7c: [A-Z0-9_]*HI[A-Z0-9_]* big_external_common +0+0080 <[^>]*> daddiu \$at,\$at,[-0-9]+ +[ ]*80: [A-Z0-9_]*LO[A-Z0-9_]* big_external_common +0+0084 <[^>]*> ldl \$a0,[07]\(\$at\) +0+0088 <[^>]*> ldr \$a0,[07]\(\$at\) +0+008c <[^>]*> daddiu \$at,\$gp,0 +[ ]*8c: [A-Z0-9_]*GPREL[A-Z0-9_]* small_external_common +0+0090 <[^>]*> ldl \$a0,[07]\(\$at\) +0+0094 <[^>]*> ldr \$a0,[07]\(\$at\) +0+0098 <[^>]*> lui \$at,[-0-9x]+ +[ ]*98: [A-Z0-9_]*HI[A-Z0-9_]* .bss.* +0+009c <[^>]*> daddiu \$at,\$at,[-0-9]+ +[ ]*9c: [A-Z0-9_]*LO[A-Z0-9_]* .bss.* +0+00a0 <[^>]*> ldl \$a0,[07]\(\$at\) +0+00a4 <[^>]*> ldr \$a0,[07]\(\$at\) +0+00a8 <[^>]*> daddiu \$at,\$gp,[-0-9]+ +[ ]*a8: [A-Z0-9_]*GPREL[A-Z0-9_]* .sbss.* +0+00ac <[^>]*> ldl \$a0,[07]\(\$at\) +0+00b0 <[^>]*> ldr \$a0,[07]\(\$at\) +0+00b4 <[^>]*> lui \$at,0x0 +[ ]*b4: [A-Z0-9_]*HI[A-Z0-9_]* .data.* +0+00b8 <[^>]*> daddiu \$at,\$at,[-0-9]+ +[ ]*b8: [A-Z0-9_]*LO[A-Z0-9_]* .data.* +0+00bc <[^>]*> ldl \$a0,[07]\(\$at\) +0+00c0 <[^>]*> ldr \$a0,[07]\(\$at\) +0+00c4 <[^>]*> lui \$at,0x0 +[ ]*c4: [A-Z0-9_]*HI[A-Z0-9_]* big_external_data_label +0+00c8 <[^>]*> daddiu \$at,\$at,[-0-9]+ +[ ]*c8: [A-Z0-9_]*LO[A-Z0-9_]* big_external_data_label +0+00cc <[^>]*> ldl \$a0,[07]\(\$at\) +0+00d0 <[^>]*> ldr \$a0,[07]\(\$at\) +0+00d4 <[^>]*> daddiu \$at,\$gp,1 +[ ]*d4: [A-Z0-9_]*GPREL[A-Z0-9_]* small_external_data_label +0+00d8 <[^>]*> ldl \$a0,[07]\(\$at\) +0+00dc <[^>]*> ldr \$a0,[07]\(\$at\) +0+00e0 <[^>]*> lui \$at,0x0 +[ ]*e0: [A-Z0-9_]*HI[A-Z0-9_]* big_external_common +0+00e4 <[^>]*> daddiu \$at,\$at,[-0-9]+ +[ ]*e4: [A-Z0-9_]*LO[A-Z0-9_]* big_external_common +0+00e8 <[^>]*> ldl \$a0,[07]\(\$at\) +0+00ec <[^>]*> ldr \$a0,[07]\(\$at\) +0+00f0 <[^>]*> daddiu \$at,\$gp,1 +[ ]*f0: [A-Z0-9_]*GPREL[A-Z0-9_]* small_external_common +0+00f4 <[^>]*> ldl \$a0,[07]\(\$at\) +0+00f8 <[^>]*> ldr \$a0,[07]\(\$at\) +0+00fc <[^>]*> lui \$at,0x0 +[ ]*fc: [A-Z0-9_]*HI[A-Z0-9_]* .bss.* +0+0100 <[^>]*> daddiu \$at,\$at,[-0-9]+ +[ ]*100: [A-Z0-9_]*LO[A-Z0-9_]* .bss.* +0+0104 <[^>]*> ldl \$a0,[07]\(\$at\) +0+0108 <[^>]*> ldr \$a0,[07]\(\$at\) +0+010c <[^>]*> daddiu \$at,\$gp,[-0-9]+ +[ ]*10c: [A-Z0-9_]*GPREL[A-Z0-9_]* .sbss.* +0+0110 <[^>]*> ldl \$a0,[07]\(\$at\) +0+0114 <[^>]*> ldr \$a0,[07]\(\$at\) +0+0118 <[^>]*> lui \$at,[-0-9x]+ +[ ]*118: [A-Z0-9_]*HI[A-Z0-9_]* .data.* +0+011c <[^>]*> daddiu \$at,\$at,[-0-9]+ +[ ]*11c: [A-Z0-9_]*LO[A-Z0-9_]* .data.* +0+0120 <[^>]*> ldl \$a0,[07]\(\$at\) +0+0124 <[^>]*> ldr \$a0,[07]\(\$at\) +0+0128 <[^>]*> lui \$at,[-0-9x]+ +[ ]*128: [A-Z0-9_]*HI[A-Z0-9_]* big_external_data_label +0+012c <[^>]*> daddiu \$at,\$at,[-0-9]+ +[ ]*12c: [A-Z0-9_]*LO[A-Z0-9_]* big_external_data_label +0+0130 <[^>]*> ldl \$a0,[07]\(\$at\) +0+0134 <[^>]*> ldr \$a0,[07]\(\$at\) +0+0138 <[^>]*> lui \$at,[-0-9x]+ +[ ]*138: [A-Z0-9_]*HI[A-Z0-9_]* small_external_data_label +0+013c <[^>]*> daddiu \$at,\$at,[-0-9]+ +[ ]*13c: [A-Z0-9_]*LO[A-Z0-9_]* small_external_data_label +0+0140 <[^>]*> ldl \$a0,[07]\(\$at\) +0+0144 <[^>]*> ldr \$a0,[07]\(\$at\) +0+0148 <[^>]*> lui \$at,[-0-9x]+ +[ ]*148: [A-Z0-9_]*HI[A-Z0-9_]* big_external_common +0+014c <[^>]*> daddiu \$at,\$at,[-0-9]+ +[ ]*14c: [A-Z0-9_]*LO[A-Z0-9_]* big_external_common +0+0150 <[^>]*> ldl \$a0,[07]\(\$at\) +0+0154 <[^>]*> ldr \$a0,[07]\(\$at\) +0+0158 <[^>]*> lui \$at,[-0-9x]+ +[ ]*158: [A-Z0-9_]*HI[A-Z0-9_]* small_external_common +0+015c <[^>]*> daddiu \$at,\$at,[-0-9]+ +[ ]*15c: [A-Z0-9_]*LO[A-Z0-9_]* small_external_common +0+0160 <[^>]*> ldl \$a0,[07]\(\$at\) +0+0164 <[^>]*> ldr \$a0,[07]\(\$at\) +0+0168 <[^>]*> lui \$at,[-0-9x]+ +[ ]*168: [A-Z0-9_]*HI[A-Z0-9_]* .bss.* +0+016c <[^>]*> daddiu \$at,\$at,[-0-9]+ +[ ]*16c: [A-Z0-9_]*LO[A-Z0-9_]* .bss.* +0+0170 <[^>]*> ldl \$a0,[07]\(\$at\) +0+0174 <[^>]*> ldr \$a0,[07]\(\$at\) +0+0178 <[^>]*> lui \$at,[-0-9x]+ +[ ]*178: [A-Z0-9_]*HI[A-Z0-9_]* .sbss.* +0+017c <[^>]*> daddiu \$at,\$at,[-0-9]+ +[ ]*17c: [A-Z0-9_]*LO[A-Z0-9_]* .sbss.* +0+0180 <[^>]*> ldl \$a0,[07]\(\$at\) +0+0184 <[^>]*> ldr \$a0,[07]\(\$at\) +0+0188 <[^>]*> lui \$at,0x0 +[ ]*188: [A-Z0-9_]*HI[A-Z0-9_]* .data.* +0+018c <[^>]*> daddiu \$at,\$at,[-0-9]+ +[ ]*18c: [A-Z0-9_]*LO[A-Z0-9_]* .data.* +0+0190 <[^>]*> ldl \$a0,[07]\(\$at\) +0+0194 <[^>]*> ldr \$a0,[07]\(\$at\) +0+0198 <[^>]*> lui \$at,0x0 +[ ]*198: [A-Z0-9_]*HI[A-Z0-9_]* big_external_data_label +0+019c <[^>]*> daddiu \$at,\$at,[-0-9]+ +[ ]*19c: [A-Z0-9_]*LO[A-Z0-9_]* big_external_data_label +0+01a0 <[^>]*> ldl \$a0,[07]\(\$at\) +0+01a4 <[^>]*> ldr \$a0,[07]\(\$at\) +0+01a8 <[^>]*> lui \$at,0x0 +[ ]*1a8: [A-Z0-9_]*HI[A-Z0-9_]* small_external_data_label +0+01ac <[^>]*> daddiu \$at,\$at,[-0-9]+ +[ ]*1ac: [A-Z0-9_]*LO[A-Z0-9_]* small_external_data_label +0+01b0 <[^>]*> ldl \$a0,[07]\(\$at\) +0+01b4 <[^>]*> ldr \$a0,[07]\(\$at\) +0+01b8 <[^>]*> lui \$at,0x0 +[ ]*1b8: [A-Z0-9_]*HI[A-Z0-9_]* big_external_common +0+01bc <[^>]*> daddiu \$at,\$at,[-0-9]+ +[ ]*1bc: [A-Z0-9_]*LO[A-Z0-9_]* big_external_common +0+01c0 <[^>]*> ldl \$a0,[07]\(\$at\) +0+01c4 <[^>]*> ldr \$a0,[07]\(\$at\) +0+01c8 <[^>]*> lui \$at,0x0 +[ ]*1c8: [A-Z0-9_]*HI[A-Z0-9_]* small_external_common +0+01cc <[^>]*> daddiu \$at,\$at,[-0-9]+ +[ ]*1cc: [A-Z0-9_]*LO[A-Z0-9_]* small_external_common +0+01d0 <[^>]*> ldl \$a0,[07]\(\$at\) +0+01d4 <[^>]*> ldr \$a0,[07]\(\$at\) +0+01d8 <[^>]*> lui \$at,0x0 +[ ]*1d8: [A-Z0-9_]*HI[A-Z0-9_]* .bss.* +0+01dc <[^>]*> daddiu \$at,\$at,[-0-9]+ +[ ]*1dc: [A-Z0-9_]*LO[A-Z0-9_]* .bss.* +0+01e0 <[^>]*> ldl \$a0,[07]\(\$at\) +0+01e4 <[^>]*> ldr \$a0,[07]\(\$at\) +0+01e8 <[^>]*> lui \$at,0x0 +[ ]*1e8: [A-Z0-9_]*HI[A-Z0-9_]* .sbss.* +0+01ec <[^>]*> daddiu \$at,\$at,[-0-9]+ +[ ]*1ec: [A-Z0-9_]*LO[A-Z0-9_]* .sbss.* +0+01f0 <[^>]*> ldl \$a0,[07]\(\$at\) +0+01f4 <[^>]*> ldr \$a0,[07]\(\$at\) +0+01f8 <[^>]*> lui \$at,[-0-9x]+ +[ ]*1f8: [A-Z0-9_]*HI[A-Z0-9_]* .data.* +0+01fc <[^>]*> daddiu \$at,\$at,[-0-9]+ +[ ]*1fc: [A-Z0-9_]*LO[A-Z0-9_]* .data.* +0+0200 <[^>]*> ldl \$a0,[07]\(\$at\) +0+0204 <[^>]*> ldr \$a0,[07]\(\$at\) +0+0208 <[^>]*> lui \$at,[-0-9x]+ +[ ]*208: [A-Z0-9_]*HI[A-Z0-9_]* big_external_data_label +0+020c <[^>]*> daddiu \$at,\$at,0 +[ ]*20c: [A-Z0-9_]*LO[A-Z0-9_]* big_external_data_label +0+0210 <[^>]*> ldl \$a0,[07]\(\$at\) +0+0214 <[^>]*> ldr \$a0,[07]\(\$at\) +0+0218 <[^>]*> lui \$at,[-0-9x]+ +[ ]*218: [A-Z0-9_]*HI[A-Z0-9_]* small_external_data_label +0+021c <[^>]*> daddiu \$at,\$at,0 +[ ]*21c: [A-Z0-9_]*LO[A-Z0-9_]* small_external_data_label +0+0220 <[^>]*> ldl \$a0,[07]\(\$at\) +0+0224 <[^>]*> ldr \$a0,[07]\(\$at\) +0+0228 <[^>]*> lui \$at,[-0-9x]+ +[ ]*228: [A-Z0-9_]*HI[A-Z0-9_]* big_external_common +0+022c <[^>]*> daddiu \$at,\$at,0 +[ ]*22c: [A-Z0-9_]*LO[A-Z0-9_]* big_external_common +0+0230 <[^>]*> ldl \$a0,[07]\(\$at\) +0+0234 <[^>]*> ldr \$a0,[07]\(\$at\) +0+0238 <[^>]*> lui \$at,[-0-9x]+ +[ ]*238: [A-Z0-9_]*HI[A-Z0-9_]* small_external_common +0+023c <[^>]*> daddiu \$at,\$at,0 +[ ]*23c: [A-Z0-9_]*LO[A-Z0-9_]* small_external_common +0+0240 <[^>]*> ldl \$a0,[07]\(\$at\) +0+0244 <[^>]*> ldr \$a0,[07]\(\$at\) +0+0248 <[^>]*> lui \$at,[-0-9x]+ +[ ]*248: [A-Z0-9_]*HI[A-Z0-9_]* .bss.* +0+024c <[^>]*> daddiu \$at,\$at,[-0-9]+ +[ ]*24c: [A-Z0-9_]*LO[A-Z0-9_]* .bss.* +0+0250 <[^>]*> ldl \$a0,[07]\(\$at\) +0+0254 <[^>]*> ldr \$a0,[07]\(\$at\) +0+0258 <[^>]*> lui \$at,[-0-9x]+ +[ ]*258: [A-Z0-9_]*HI[A-Z0-9_]* .sbss.* +0+025c <[^>]*> daddiu \$at,\$at,[-0-9]+ +[ ]*25c: [A-Z0-9_]*LO[A-Z0-9_]* .sbss.* +0+0260 <[^>]*> ldl \$a0,[07]\(\$at\) +0+0264 <[^>]*> ldr \$a0,[07]\(\$at\) +0+0268 <[^>]*> lui \$at,[-0-9x]+ +[ ]*268: [A-Z0-9_]*HI[A-Z0-9_]* .data.* +0+026c <[^>]*> daddiu \$at,\$at,[-0-9]+ +[ ]*26c: [A-Z0-9_]*LO[A-Z0-9_]* .data.* +0+0270 <[^>]*> ldl \$a0,[07]\(\$at\) +0+0274 <[^>]*> ldr \$a0,[07]\(\$at\) +0+0278 <[^>]*> lui \$at,[-0-9x]+ +[ ]*278: [A-Z0-9_]*HI[A-Z0-9_]* big_external_data_label +0+027c <[^>]*> daddiu \$at,\$at,[-0-9]+ +[ ]*27c: [A-Z0-9_]*LO[A-Z0-9_]* big_external_data_label +0+0280 <[^>]*> ldl \$a0,[07]\(\$at\) +0+0284 <[^>]*> ldr \$a0,[07]\(\$at\) +0+0288 <[^>]*> lui \$at,[-0-9x]+ +[ ]*288: [A-Z0-9_]*HI[A-Z0-9_]* small_external_data_label +0+028c <[^>]*> daddiu \$at,\$at,[-0-9]+ +[ ]*28c: [A-Z0-9_]*LO[A-Z0-9_]* small_external_data_label +0+0290 <[^>]*> ldl \$a0,[07]\(\$at\) +0+0294 <[^>]*> ldr \$a0,[07]\(\$at\) +0+0298 <[^>]*> lui \$at,[-0-9x]+ +[ ]*298: [A-Z0-9_]*HI[A-Z0-9_]* big_external_common +0+029c <[^>]*> daddiu \$at,\$at,[-0-9]+ +[ ]*29c: [A-Z0-9_]*LO[A-Z0-9_]* big_external_common +0+02a0 <[^>]*> ldl \$a0,[07]\(\$at\) +0+02a4 <[^>]*> ldr \$a0,[07]\(\$at\) +0+02a8 <[^>]*> lui \$at,[-0-9x]+ +[ ]*2a8: [A-Z0-9_]*HI[A-Z0-9_]* small_external_common +0+02ac <[^>]*> daddiu \$at,\$at,[-0-9]+ +[ ]*2ac: [A-Z0-9_]*LO[A-Z0-9_]* small_external_common +0+02b0 <[^>]*> ldl \$a0,[07]\(\$at\) +0+02b4 <[^>]*> ldr \$a0,[07]\(\$at\) +0+02b8 <[^>]*> lui \$at,[-0-9x]+ +[ ]*2b8: [A-Z0-9_]*HI[A-Z0-9_]* .bss.* +0+02bc <[^>]*> daddiu \$at,\$at,[-0-9]+ +[ ]*2bc: [A-Z0-9_]*LO[A-Z0-9_]* .bss.* +0+02c0 <[^>]*> ldl \$a0,[07]\(\$at\) +0+02c4 <[^>]*> ldr \$a0,[07]\(\$at\) +0+02c8 <[^>]*> lui \$at,[-0-9x]+ +[ ]*2c8: [A-Z0-9_]*HI[A-Z0-9_]* .sbss.* +0+02cc <[^>]*> daddiu \$at,\$at,[-0-9]+ +[ ]*2cc: [A-Z0-9_]*LO[A-Z0-9_]* .sbss.* +0+02d0 <[^>]*> ldl \$a0,[07]\(\$at\) +0+02d4 <[^>]*> ldr \$a0,[07]\(\$at\) + ... diff --git a/gas/testsuite/gas/mips/uld.s b/gas/testsuite/gas/mips/uld.s new file mode 100644 index 0000000..9eaffbc --- /dev/null +++ b/gas/testsuite/gas/mips/uld.s @@ -0,0 +1,66 @@ +# Source file used to test the uld macro. + + .data +data_label: + .extern big_external_data_label,1000 + .extern small_external_data_label,1 + .comm big_external_common,1000 + .comm small_external_common,1 + .lcomm big_local_common,1000 + .lcomm small_local_common,1 + + .text + uld $4,0 + uld $4,1 + uld $4,0x8000 + uld $4,-0x8000 + uld $4,0x10000 + uld $4,0x1a5a5 + uld $4,0($5) + uld $4,1($5) + uld $4,data_label + uld $4,big_external_data_label + uld $4,small_external_data_label + uld $4,big_external_common + uld $4,small_external_common + uld $4,big_local_common + uld $4,small_local_common + uld $4,data_label+1 + uld $4,big_external_data_label+1 + uld $4,small_external_data_label+1 + uld $4,big_external_common+1 + uld $4,small_external_common+1 + uld $4,big_local_common+1 + uld $4,small_local_common+1 + uld $4,data_label+0x8000 + uld $4,big_external_data_label+0x8000 + uld $4,small_external_data_label+0x8000 + uld $4,big_external_common+0x8000 + uld $4,small_external_common+0x8000 + uld $4,big_local_common+0x8000 + uld $4,small_local_common+0x8000 + uld $4,data_label-0x8000 + uld $4,big_external_data_label-0x8000 + uld $4,small_external_data_label-0x8000 + uld $4,big_external_common-0x8000 + uld $4,small_external_common-0x8000 + uld $4,big_local_common-0x8000 + uld $4,small_local_common-0x8000 + uld $4,data_label+0x10000 + uld $4,big_external_data_label+0x10000 + uld $4,small_external_data_label+0x10000 + uld $4,big_external_common+0x10000 + uld $4,small_external_common+0x10000 + uld $4,big_local_common+0x10000 + uld $4,small_local_common+0x10000 + uld $4,data_label+0x1a5a5 + uld $4,big_external_data_label+0x1a5a5 + uld $4,small_external_data_label+0x1a5a5 + uld $4,big_external_common+0x1a5a5 + uld $4,small_external_common+0x1a5a5 + uld $4,big_local_common+0x1a5a5 + uld $4,small_local_common+0x1a5a5 + +# Round to a 16 byte boundary, for ease in testing multiple targets. + nop + nop diff --git a/gas/testsuite/gas/mips/ulh-empic.d b/gas/testsuite/gas/mips/ulh-empic.d new file mode 100644 index 0000000..945f06b --- /dev/null +++ b/gas/testsuite/gas/mips/ulh-empic.d @@ -0,0 +1,91 @@ +#objdump: -dr --prefix-addresses -mmips:3000 +#name: MIPS ulh-empic +#as: -mips1 -membedded-pic +#source: ulh-pic.s + +# Test the ulh macro with -membedded-pic. + +.*: +file format .*mips.* + +Disassembly of section .text: +0+0000 <[^>]*> addiu \$at,\$gp,-16384 +[ ]*0: [A-Z0-9_]*GPREL[A-Z0-9_]* .sdata.* +0+0004 <[^>]*> lb \$a0,[01]\(\$at\) +0+0008 <[^>]*> lbu \$at,[01]\(\$at\) +0+000c <[^>]*> sll \$a0,\$a0,0x8 +0+0010 <[^>]*> or \$a0,\$a0,\$at +0+0014 <[^>]*> addiu \$at,\$gp,0 +[ ]*14: [A-Z0-9_]*GPREL[A-Z0-9_]* big_external_data_label +0+0018 <[^>]*> lbu \$a0,[01]\(\$at\) +0+001c <[^>]*> lbu \$at,[01]\(\$at\) +0+0020 <[^>]*> sll \$a0,\$a0,0x8 +0+0024 <[^>]*> or \$a0,\$a0,\$at +0+0028 <[^>]*> addiu \$at,\$gp,0 +[ ]*28: [A-Z0-9_]*GPREL[A-Z0-9_]* small_external_data_label +0+002c <[^>]*> lwl \$a0,[03]\(\$at\) +0+0030 <[^>]*> lwr \$a0,[03]\(\$at\) +0+0034 <[^>]*> addiu \$at,\$gp,0 +[ ]*34: [A-Z0-9_]*GPREL[A-Z0-9_]* big_external_common +0+0038 <[^>]*> sb \$a0,[01]\(\$at\) +0+003c <[^>]*> srl \$a0,\$a0,0x8 +0+0040 <[^>]*> sb \$a0,[01]\(\$at\) +0+0044 <[^>]*> lbu \$at,[01]\(\$at\) +0+0048 <[^>]*> sll \$a0,\$a0,0x8 +0+004c <[^>]*> or \$a0,\$a0,\$at +0+0050 <[^>]*> addiu \$at,\$gp,0 +[ ]*50: [A-Z0-9_]*GPREL[A-Z0-9_]* small_external_common +0+0054 <[^>]*> swl \$a0,[03]\(\$at\) +0+0058 <[^>]*> swr \$a0,[03]\(\$at\) +0+005c <[^>]*> addiu \$at,\$gp,-16384 +[ ]*5c: [A-Z0-9_]*GPREL[A-Z0-9_]* .sbss.* +0+0060 <[^>]*> lb \$a0,[01]\(\$at\) +0+0064 <[^>]*> lbu \$at,[01]\(\$at\) +0+0068 <[^>]*> sll \$a0,\$a0,0x8 +0+006c <[^>]*> or \$a0,\$a0,\$at +0+0070 <[^>]*> addiu \$at,\$gp,-15384 +[ ]*70: [A-Z0-9_]*GPREL[A-Z0-9_]* .sbss.* +0+0074 <[^>]*> lbu \$a0,[01]\(\$at\) +0+0078 <[^>]*> lbu \$at,[01]\(\$at\) +0+007c <[^>]*> sll \$a0,\$a0,0x8 +0+0080 <[^>]*> or \$a0,\$a0,\$at +0+0084 <[^>]*> addiu \$at,\$gp,-16383 +[ ]*84: [A-Z0-9_]*GPREL[A-Z0-9_]* .sdata.* +0+0088 <[^>]*> lwl \$a0,[03]\(\$at\) +0+008c <[^>]*> lwr \$a0,[03]\(\$at\) +0+0090 <[^>]*> addiu \$at,\$gp,1 +[ ]*90: [A-Z0-9_]*GPREL[A-Z0-9_]* big_external_data_label +0+0094 <[^>]*> sb \$a0,[01]\(\$at\) +0+0098 <[^>]*> srl \$a0,\$a0,0x8 +0+009c <[^>]*> sb \$a0,[01]\(\$at\) +0+00a0 <[^>]*> lbu \$at,[01]\(\$at\) +0+00a4 <[^>]*> sll \$a0,\$a0,0x8 +0+00a8 <[^>]*> or \$a0,\$a0,\$at +0+00ac <[^>]*> addiu \$at,\$gp,1 +[ ]*ac: [A-Z0-9_]*GPREL[A-Z0-9_]* small_external_data_label +0+00b0 <[^>]*> swl \$a0,[03]\(\$at\) +0+00b4 <[^>]*> swr \$a0,[03]\(\$at\) +0+00b8 <[^>]*> addiu \$at,\$gp,1 +[ ]*b8: [A-Z0-9_]*GPREL[A-Z0-9_]* big_external_common +0+00bc <[^>]*> lb \$a0,[01]\(\$at\) +0+00c0 <[^>]*> lbu \$at,[01]\(\$at\) +0+00c4 <[^>]*> sll \$a0,\$a0,0x8 +0+00c8 <[^>]*> or \$a0,\$a0,\$at +0+00cc <[^>]*> addiu \$at,\$gp,1 +[ ]*cc: [A-Z0-9_]*GPREL[A-Z0-9_]* small_external_common +0+00d0 <[^>]*> lbu \$a0,[01]\(\$at\) +0+00d4 <[^>]*> lbu \$at,[01]\(\$at\) +0+00d8 <[^>]*> sll \$a0,\$a0,0x8 +0+00dc <[^>]*> or \$a0,\$a0,\$at +0+00e0 <[^>]*> addiu \$at,\$gp,-16383 +[ ]*e0: [A-Z0-9_]*GPREL[A-Z0-9_]* .sbss.* +0+00e4 <[^>]*> lwl \$a0,[03]\(\$at\) +0+00e8 <[^>]*> lwr \$a0,[03]\(\$at\) +0+00ec <[^>]*> addiu \$at,\$gp,-15383 +[ ]*ec: [A-Z0-9_]*GPREL[A-Z0-9_]* .sbss.* +0+00f0 <[^>]*> sb \$a0,[01]\(\$at\) +0+00f4 <[^>]*> srl \$a0,\$a0,0x8 +0+00f8 <[^>]*> sb \$a0,[01]\(\$at\) +0+00fc <[^>]*> lbu \$at,[01]\(\$at\) +0+0100 <[^>]*> sll \$a0,\$a0,0x8 +0+0104 <[^>]*> or \$a0,\$a0,\$at + ... diff --git a/gas/testsuite/gas/mips/ulh-pic.s b/gas/testsuite/gas/mips/ulh-pic.s new file mode 100644 index 0000000..633b29c --- /dev/null +++ b/gas/testsuite/gas/mips/ulh-pic.s @@ -0,0 +1,36 @@ +# Test unaligned load and store macros with PIC code. We don't bother +# to test most cases. The actual loads and stores are tested by the +# non-PIC test case. We just want to check that the initial address +# is loaded correctly. + + .data +data_label: + .extern big_external_data_label,1000 + .extern small_external_data_label,1 + .comm big_external_common,1000 + .comm small_external_common,1 + .lcomm big_local_common,1000 + .lcomm small_local_common,1 + + .text + ulh $4,data_label + ulhu $4,big_external_data_label + ulw $4,small_external_data_label + ush $4,big_external_common + usw $4,small_external_common + ulh $4,big_local_common + ulhu $4,small_local_common + ulw $4,data_label+1 + ush $4,big_external_data_label+1 + usw $4,small_external_data_label+1 + ulh $4,big_external_common+1 + ulhu $4,small_external_common+1 + ulw $4,big_local_common+1 + ush $4,small_local_common+1 + +# Round to a 16 byte boundary, for ease in testing multiple targets. + nop + .ifndef XGOT + nop + nop + .endif diff --git a/gas/testsuite/gas/mips/ulh-svr4pic.d b/gas/testsuite/gas/mips/ulh-svr4pic.d new file mode 100644 index 0000000..86e33bd --- /dev/null +++ b/gas/testsuite/gas/mips/ulh-svr4pic.d @@ -0,0 +1,124 @@ +#objdump: -dr --prefix-addresses -mmips:3000 +#name: MIPS ulh-svr4pic +#as: -mips1 -KPIC -EB +#source: ulh-pic.s + +# Test the unaligned load and store macros with -KPIC. + +.*: +file format .*mips.* + +Disassembly of section .text: +0+0000 <[^>]*> lw \$at,0\(\$gp\) +[ ]*0: R_MIPS_GOT16 .data +0+0004 <[^>]*> nop +0+0008 <[^>]*> addiu \$at,\$at,0 +[ ]*8: R_MIPS_LO16 .data +0+000c <[^>]*> lb \$a0,0\(\$at\) +0+0010 <[^>]*> lbu \$at,1\(\$at\) +0+0014 <[^>]*> sll \$a0,\$a0,0x8 +0+0018 <[^>]*> or \$a0,\$a0,\$at +0+001c <[^>]*> lw \$at,0\(\$gp\) +[ ]*1c: R_MIPS_GOT16 big_external_data_label +0+0020 <[^>]*> nop +0+0024 <[^>]*> lbu \$a0,0\(\$at\) +0+0028 <[^>]*> lbu \$at,1\(\$at\) +0+002c <[^>]*> sll \$a0,\$a0,0x8 +0+0030 <[^>]*> or \$a0,\$a0,\$at +0+0034 <[^>]*> lw \$at,0\(\$gp\) +[ ]*34: R_MIPS_GOT16 small_external_data_label +0+0038 <[^>]*> nop +0+003c <[^>]*> lwl \$a0,0\(\$at\) +0+0040 <[^>]*> lwr \$a0,3\(\$at\) +0+0044 <[^>]*> lw \$at,0\(\$gp\) +[ ]*44: R_MIPS_GOT16 big_external_common +0+0048 <[^>]*> nop +0+004c <[^>]*> sb \$a0,1\(\$at\) +0+0050 <[^>]*> srl \$a0,\$a0,0x8 +0+0054 <[^>]*> sb \$a0,0\(\$at\) +0+0058 <[^>]*> lbu \$at,1\(\$at\) +0+005c <[^>]*> sll \$a0,\$a0,0x8 +0+0060 <[^>]*> or \$a0,\$a0,\$at +0+0064 <[^>]*> lw \$at,0\(\$gp\) +[ ]*64: R_MIPS_GOT16 small_external_common +0+0068 <[^>]*> nop +0+006c <[^>]*> swl \$a0,0\(\$at\) +0+0070 <[^>]*> swr \$a0,3\(\$at\) +0+0074 <[^>]*> lw \$at,0\(\$gp\) +[ ]*74: R_MIPS_GOT16 .bss +0+0078 <[^>]*> nop +0+007c <[^>]*> addiu \$at,\$at,0 +[ ]*7c: R_MIPS_LO16 .bss +0+0080 <[^>]*> lb \$a0,0\(\$at\) +0+0084 <[^>]*> lbu \$at,1\(\$at\) +0+0088 <[^>]*> sll \$a0,\$a0,0x8 +0+008c <[^>]*> or \$a0,\$a0,\$at +0+0090 <[^>]*> lw \$at,0\(\$gp\) +[ ]*90: R_MIPS_GOT16 .bss +0+0094 <[^>]*> nop +0+0098 <[^>]*> addiu \$at,\$at,1000 +[ ]*98: R_MIPS_LO16 .bss +0+009c <[^>]*> lbu \$a0,0\(\$at\) +0+00a0 <[^>]*> lbu \$at,1\(\$at\) +0+00a4 <[^>]*> sll \$a0,\$a0,0x8 +0+00a8 <[^>]*> or \$a0,\$a0,\$at +0+00ac <[^>]*> lw \$at,0\(\$gp\) +[ ]*ac: R_MIPS_GOT16 .data +0+00b0 <[^>]*> nop +0+00b4 <[^>]*> addiu \$at,\$at,0 +[ ]*b4: R_MIPS_LO16 .data +0+00b8 <[^>]*> addiu \$at,\$at,1 +0+00bc <[^>]*> lwl \$a0,0\(\$at\) +0+00c0 <[^>]*> lwr \$a0,3\(\$at\) +0+00c4 <[^>]*> lw \$at,0\(\$gp\) +[ ]*c4: R_MIPS_GOT16 big_external_data_label +0+00c8 <[^>]*> nop +0+00cc <[^>]*> addiu \$at,\$at,1 +0+00d0 <[^>]*> sb \$a0,1\(\$at\) +0+00d4 <[^>]*> srl \$a0,\$a0,0x8 +0+00d8 <[^>]*> sb \$a0,0\(\$at\) +0+00dc <[^>]*> lbu \$at,1\(\$at\) +0+00e0 <[^>]*> sll \$a0,\$a0,0x8 +0+00e4 <[^>]*> or \$a0,\$a0,\$at +0+00e8 <[^>]*> lw \$at,0\(\$gp\) +[ ]*e8: R_MIPS_GOT16 small_external_data_label +0+00ec <[^>]*> nop +0+00f0 <[^>]*> addiu \$at,\$at,1 +0+00f4 <[^>]*> swl \$a0,0\(\$at\) +0+00f8 <[^>]*> swr \$a0,3\(\$at\) +0+00fc <[^>]*> lw \$at,0\(\$gp\) +[ ]*fc: R_MIPS_GOT16 big_external_common +0+0100 <[^>]*> nop +0+0104 <[^>]*> addiu \$at,\$at,1 +0+0108 <[^>]*> lb \$a0,0\(\$at\) +0+010c <[^>]*> lbu \$at,1\(\$at\) +0+0110 <[^>]*> sll \$a0,\$a0,0x8 +0+0114 <[^>]*> or \$a0,\$a0,\$at +0+0118 <[^>]*> lw \$at,0\(\$gp\) +[ ]*118: R_MIPS_GOT16 small_external_common +0+011c <[^>]*> nop +0+0120 <[^>]*> addiu \$at,\$at,1 +0+0124 <[^>]*> lbu \$a0,0\(\$at\) +0+0128 <[^>]*> lbu \$at,1\(\$at\) +0+012c <[^>]*> sll \$a0,\$a0,0x8 +0+0130 <[^>]*> or \$a0,\$a0,\$at +0+0134 <[^>]*> lw \$at,0\(\$gp\) +[ ]*134: R_MIPS_GOT16 .bss +0+0138 <[^>]*> nop +0+013c <[^>]*> addiu \$at,\$at,0 +[ ]*13c: R_MIPS_LO16 .bss +0+0140 <[^>]*> addiu \$at,\$at,1 +0+0144 <[^>]*> lwl \$a0,0\(\$at\) +0+0148 <[^>]*> lwr \$a0,3\(\$at\) +0+014c <[^>]*> lw \$at,0\(\$gp\) +[ ]*14c: R_MIPS_GOT16 .bss +0+0150 <[^>]*> nop +0+0154 <[^>]*> addiu \$at,\$at,1000 +[ ]*154: R_MIPS_LO16 .bss +0+0158 <[^>]*> addiu \$at,\$at,1 +0+015c <[^>]*> sb \$a0,1\(\$at\) +0+0160 <[^>]*> srl \$a0,\$a0,0x8 +0+0164 <[^>]*> sb \$a0,0\(\$at\) +0+0168 <[^>]*> lbu \$at,1\(\$at\) +0+016c <[^>]*> sll \$a0,\$a0,0x8 +0+0170 <[^>]*> or \$a0,\$a0,\$at + ... diff --git a/gas/testsuite/gas/mips/ulh-xgot.d b/gas/testsuite/gas/mips/ulh-xgot.d new file mode 100644 index 0000000..982f9ce --- /dev/null +++ b/gas/testsuite/gas/mips/ulh-xgot.d @@ -0,0 +1,154 @@ +#objdump: -dr --prefix-addresses -mmips:3000 +#name: MIPS ulh-xgot +#as: -mips1 -mcpu=r3000 -KPIC -xgot -EB --defsym XGOT=1 +#source: ulh-pic.s + +# Test the unaligned load and store macros with -KPIC -xgot. + +.*: +file format .*mips.* + +Disassembly of section .text: +0+0000 <[^>]*> lw \$at,0\(\$gp\) +[ ]*0: R_MIPS_GOT16 .data +0+0004 <[^>]*> nop +0+0008 <[^>]*> addiu \$at,\$at,0 +[ ]*8: R_MIPS_LO16 .data +0+000c <[^>]*> nop +0+0010 <[^>]*> lb \$a0,0\(\$at\) +0+0014 <[^>]*> lbu \$at,1\(\$at\) +0+0018 <[^>]*> sll \$a0,\$a0,0x8 +0+001c <[^>]*> or \$a0,\$a0,\$at +0+0020 <[^>]*> lui \$at,0x0 +[ ]*20: R_MIPS_GOT_HI16 big_external_data_label +0+0024 <[^>]*> addu \$at,\$at,\$gp +0+0028 <[^>]*> lw \$at,0\(\$at\) +[ ]*28: R_MIPS_GOT_LO16 big_external_data_label +0+002c <[^>]*> nop +0+0030 <[^>]*> lbu \$a0,0\(\$at\) +0+0034 <[^>]*> lbu \$at,1\(\$at\) +0+0038 <[^>]*> sll \$a0,\$a0,0x8 +0+003c <[^>]*> or \$a0,\$a0,\$at +0+0040 <[^>]*> lui \$at,0x0 +[ ]*40: R_MIPS_GOT_HI16 small_external_data_label +0+0044 <[^>]*> addu \$at,\$at,\$gp +0+0048 <[^>]*> lw \$at,0\(\$at\) +[ ]*48: R_MIPS_GOT_LO16 small_external_data_label +0+004c <[^>]*> nop +0+0050 <[^>]*> lwl \$a0,0\(\$at\) +0+0054 <[^>]*> lwr \$a0,3\(\$at\) +0+0058 <[^>]*> lui \$at,0x0 +[ ]*58: R_MIPS_GOT_HI16 big_external_common +0+005c <[^>]*> addu \$at,\$at,\$gp +0+0060 <[^>]*> lw \$at,0\(\$at\) +[ ]*60: R_MIPS_GOT_LO16 big_external_common +0+0064 <[^>]*> nop +0+0068 <[^>]*> sb \$a0,1\(\$at\) +0+006c <[^>]*> srl \$a0,\$a0,0x8 +0+0070 <[^>]*> sb \$a0,0\(\$at\) +0+0074 <[^>]*> lbu \$at,1\(\$at\) +0+0078 <[^>]*> sll \$a0,\$a0,0x8 +0+007c <[^>]*> or \$a0,\$a0,\$at +0+0080 <[^>]*> lui \$at,0x0 +[ ]*80: R_MIPS_GOT_HI16 small_external_common +0+0084 <[^>]*> addu \$at,\$at,\$gp +0+0088 <[^>]*> lw \$at,0\(\$at\) +[ ]*88: R_MIPS_GOT_LO16 small_external_common +0+008c <[^>]*> nop +0+0090 <[^>]*> swl \$a0,0\(\$at\) +0+0094 <[^>]*> swr \$a0,3\(\$at\) +0+0098 <[^>]*> lw \$at,0\(\$gp\) +[ ]*98: R_MIPS_GOT16 .bss +0+009c <[^>]*> nop +0+00a0 <[^>]*> addiu \$at,\$at,0 +[ ]*a0: R_MIPS_LO16 .bss +0+00a4 <[^>]*> nop +0+00a8 <[^>]*> lb \$a0,0\(\$at\) +0+00ac <[^>]*> lbu \$at,1\(\$at\) +0+00b0 <[^>]*> sll \$a0,\$a0,0x8 +0+00b4 <[^>]*> or \$a0,\$a0,\$at +0+00b8 <[^>]*> lw \$at,0\(\$gp\) +[ ]*b8: R_MIPS_GOT16 .bss +0+00bc <[^>]*> nop +0+00c0 <[^>]*> addiu \$at,\$at,1000 +[ ]*c0: R_MIPS_LO16 .bss +0+00c4 <[^>]*> nop +0+00c8 <[^>]*> lbu \$a0,0\(\$at\) +0+00cc <[^>]*> lbu \$at,1\(\$at\) +0+00d0 <[^>]*> sll \$a0,\$a0,0x8 +0+00d4 <[^>]*> or \$a0,\$a0,\$at +0+00d8 <[^>]*> lw \$at,0\(\$gp\) +[ ]*d8: R_MIPS_GOT16 .data +0+00dc <[^>]*> nop +0+00e0 <[^>]*> addiu \$at,\$at,0 +[ ]*e0: R_MIPS_LO16 .data +0+00e4 <[^>]*> nop +0+00e8 <[^>]*> addiu \$at,\$at,1 +0+00ec <[^>]*> lwl \$a0,0\(\$at\) +0+00f0 <[^>]*> lwr \$a0,3\(\$at\) +0+00f4 <[^>]*> lui \$at,0x0 +[ ]*f4: R_MIPS_GOT_HI16 big_external_data_label +0+00f8 <[^>]*> addu \$at,\$at,\$gp +0+00fc <[^>]*> lw \$at,0\(\$at\) +[ ]*fc: R_MIPS_GOT_LO16 big_external_data_label +0+0100 <[^>]*> nop +0+0104 <[^>]*> addiu \$at,\$at,1 +0+0108 <[^>]*> sb \$a0,1\(\$at\) +0+010c <[^>]*> srl \$a0,\$a0,0x8 +0+0110 <[^>]*> sb \$a0,0\(\$at\) +0+0114 <[^>]*> lbu \$at,1\(\$at\) +0+0118 <[^>]*> sll \$a0,\$a0,0x8 +0+011c <[^>]*> or \$a0,\$a0,\$at +0+0120 <[^>]*> lui \$at,0x0 +[ ]*120: R_MIPS_GOT_HI16 small_external_data_label +0+0124 <[^>]*> addu \$at,\$at,\$gp +0+0128 <[^>]*> lw \$at,0\(\$at\) +[ ]*128: R_MIPS_GOT_LO16 small_external_data_label +0+012c <[^>]*> nop +0+0130 <[^>]*> addiu \$at,\$at,1 +0+0134 <[^>]*> swl \$a0,0\(\$at\) +0+0138 <[^>]*> swr \$a0,3\(\$at\) +0+013c <[^>]*> lui \$at,0x0 +[ ]*13c: R_MIPS_GOT_HI16 big_external_common +0+0140 <[^>]*> addu \$at,\$at,\$gp +0+0144 <[^>]*> lw \$at,0\(\$at\) +[ ]*144: R_MIPS_GOT_LO16 big_external_common +0+0148 <[^>]*> nop +0+014c <[^>]*> addiu \$at,\$at,1 +0+0150 <[^>]*> lb \$a0,0\(\$at\) +0+0154 <[^>]*> lbu \$at,1\(\$at\) +0+0158 <[^>]*> sll \$a0,\$a0,0x8 +0+015c <[^>]*> or \$a0,\$a0,\$at +0+0160 <[^>]*> lui \$at,0x0 +[ ]*160: R_MIPS_GOT_HI16 small_external_common +0+0164 <[^>]*> addu \$at,\$at,\$gp +0+0168 <[^>]*> lw \$at,0\(\$at\) +[ ]*168: R_MIPS_GOT_LO16 small_external_common +0+016c <[^>]*> nop +0+0170 <[^>]*> addiu \$at,\$at,1 +0+0174 <[^>]*> lbu \$a0,0\(\$at\) +0+0178 <[^>]*> lbu \$at,1\(\$at\) +0+017c <[^>]*> sll \$a0,\$a0,0x8 +0+0180 <[^>]*> or \$a0,\$a0,\$at +0+0184 <[^>]*> lw \$at,0\(\$gp\) +[ ]*184: R_MIPS_GOT16 .bss +0+0188 <[^>]*> nop +0+018c <[^>]*> addiu \$at,\$at,0 +[ ]*18c: R_MIPS_LO16 .bss +0+0190 <[^>]*> nop +0+0194 <[^>]*> addiu \$at,\$at,1 +0+0198 <[^>]*> lwl \$a0,0\(\$at\) +0+019c <[^>]*> lwr \$a0,3\(\$at\) +0+01a0 <[^>]*> lw \$at,0\(\$gp\) +[ ]*1a0: R_MIPS_GOT16 .bss +0+01a4 <[^>]*> nop +0+01a8 <[^>]*> addiu \$at,\$at,1000 +[ ]*1a8: R_MIPS_LO16 .bss +0+01ac <[^>]*> nop +0+01b0 <[^>]*> addiu \$at,\$at,1 +0+01b4 <[^>]*> sb \$a0,1\(\$at\) +0+01b8 <[^>]*> srl \$a0,\$a0,0x8 +0+01bc <[^>]*> sb \$a0,0\(\$at\) +0+01c0 <[^>]*> lbu \$at,1\(\$at\) +0+01c4 <[^>]*> sll \$a0,\$a0,0x8 +0+01c8 <[^>]*> or \$a0,\$a0,\$at +0+01cc <[^>]*> nop diff --git a/gas/testsuite/gas/mips/ulh.d b/gas/testsuite/gas/mips/ulh.d new file mode 100644 index 0000000..8d6d4b4 --- /dev/null +++ b/gas/testsuite/gas/mips/ulh.d @@ -0,0 +1,374 @@ +#objdump: -dr --prefix-addresses -mmips:3000 +#name: MIPS ulh +#as: -mips1 + +# Test the ulh macro. + +.*: +file format .*mips.* + +Disassembly of section .text: +0+0000 <[^>]*> lb \$a0,[01]\(\$zero\) +0+0004 <[^>]*> lbu \$at,[01]\(\$zero\) +0+0008 <[^>]*> sll \$a0,\$a0,0x8 +0+000c <[^>]*> or \$a0,\$a0,\$at +0+0010 <[^>]*> lb \$a0,[12]\(\$zero\) +0+0014 <[^>]*> lbu \$at,[12]\(\$zero\) +0+0018 <[^>]*> sll \$a0,\$a0,0x8 +0+001c <[^>]*> or \$a0,\$a0,\$at +0+0020 <[^>]*> li \$at,0x8000 +0+0024 <[^>]*> lb \$a0,[01]\(\$at\) +0+0028 <[^>]*> lbu \$at,[01]\(\$at\) +0+002c <[^>]*> sll \$a0,\$a0,0x8 +0+0030 <[^>]*> or \$a0,\$a0,\$at +0+0034 <[^>]*> lb \$a0,-3276[78]\(\$zero\) +0+0038 <[^>]*> lbu \$at,-3276[78]\(\$zero\) +0+003c <[^>]*> sll \$a0,\$a0,0x8 +0+0040 <[^>]*> or \$a0,\$a0,\$at +0+0044 <[^>]*> lui \$at,0x1 +0+0048 <[^>]*> lb \$a0,[01]\(\$at\) +0+004c <[^>]*> lbu \$at,[01]\(\$at\) +0+0050 <[^>]*> sll \$a0,\$a0,0x8 +0+0054 <[^>]*> or \$a0,\$a0,\$at +0+0058 <[^>]*> lui \$at,0x1 +0+005c <[^>]*> ori \$at,\$at,0xa5a5 +0+0060 <[^>]*> lb \$a0,[01]\(\$at\) +0+0064 <[^>]*> lbu \$at,[01]\(\$at\) +0+0068 <[^>]*> sll \$a0,\$a0,0x8 +0+006c <[^>]*> or \$a0,\$a0,\$at +0+0070 <[^>]*> lb \$a0,[01]\(\$a1\) +0+0074 <[^>]*> lbu \$at,[01]\(\$a1\) +0+0078 <[^>]*> sll \$a0,\$a0,0x8 +0+007c <[^>]*> or \$a0,\$a0,\$at +0+0080 <[^>]*> lb \$a0,[12]\(\$a1\) +0+0084 <[^>]*> lbu \$at,[12]\(\$a1\) +0+0088 <[^>]*> sll \$a0,\$a0,0x8 +0+008c <[^>]*> or \$a0,\$a0,\$at +0+0090 <[^>]*> lui \$at,[-0-9x]+ +[ ]*90: [A-Z0-9_]*HI[A-Z0-9_]* .data.* +0+0094 <[^>]*> addiu \$at,\$at,[-0-9]+ +[ ]*94: [A-Z0-9_]*LO[A-Z0-9_]* .data.* +0+0098 <[^>]*> lb \$a0,[01]\(\$at\) +0+009c <[^>]*> lbu \$at,[01]\(\$at\) +0+00a0 <[^>]*> sll \$a0,\$a0,0x8 +0+00a4 <[^>]*> or \$a0,\$a0,\$at +0+00a8 <[^>]*> lui \$at,0x0 +[ ]*a8: [A-Z0-9_]*HI[A-Z0-9_]* big_external_data_label +0+00ac <[^>]*> addiu \$at,\$at,[-0-9]+ +[ ]*ac: [A-Z0-9_]*LO[A-Z0-9_]* big_external_data_label +0+00b0 <[^>]*> lb \$a0,[01]\(\$at\) +0+00b4 <[^>]*> lbu \$at,[01]\(\$at\) +0+00b8 <[^>]*> sll \$a0,\$a0,0x8 +0+00bc <[^>]*> or \$a0,\$a0,\$at +0+00c0 <[^>]*> addiu \$at,\$gp,0 +[ ]*c0: [A-Z0-9_]*GPREL[A-Z0-9_]* small_external_data_label +0+00c4 <[^>]*> lb \$a0,[01]\(\$at\) +0+00c8 <[^>]*> lbu \$at,[01]\(\$at\) +0+00cc <[^>]*> sll \$a0,\$a0,0x8 +0+00d0 <[^>]*> or \$a0,\$a0,\$at +0+00d4 <[^>]*> lui \$at,0x0 +[ ]*d4: [A-Z0-9_]*HI[A-Z0-9_]* big_external_common +0+00d8 <[^>]*> addiu \$at,\$at,[-0-9]+ +[ ]*d8: [A-Z0-9_]*LO[A-Z0-9_]* big_external_common +0+00dc <[^>]*> lb \$a0,[01]\(\$at\) +0+00e0 <[^>]*> lbu \$at,[01]\(\$at\) +0+00e4 <[^>]*> sll \$a0,\$a0,0x8 +0+00e8 <[^>]*> or \$a0,\$a0,\$at +0+00ec <[^>]*> addiu \$at,\$gp,0 +[ ]*ec: [A-Z0-9_]*GPREL[A-Z0-9_]* small_external_common +0+00f0 <[^>]*> lb \$a0,[01]\(\$at\) +0+00f4 <[^>]*> lbu \$at,[01]\(\$at\) +0+00f8 <[^>]*> sll \$a0,\$a0,0x8 +0+00fc <[^>]*> or \$a0,\$a0,\$at +0+0100 <[^>]*> lui \$at,[-0-9x]+ +[ ]*100: [A-Z0-9_]*HI[A-Z0-9_]* .bss.* +0+0104 <[^>]*> addiu \$at,\$at,[-0-9]+ +[ ]*104: [A-Z0-9_]*LO[A-Z0-9_]* .bss.* +0+0108 <[^>]*> lb \$a0,[01]\(\$at\) +0+010c <[^>]*> lbu \$at,[01]\(\$at\) +0+0110 <[^>]*> sll \$a0,\$a0,0x8 +0+0114 <[^>]*> or \$a0,\$a0,\$at +0+0118 <[^>]*> addiu \$at,\$gp,[-0-9]+ +[ ]*118: [A-Z0-9_]*GPREL[A-Z0-9_]* .sbss.* +0+011c <[^>]*> lb \$a0,[01]\(\$at\) +0+0120 <[^>]*> lbu \$at,[01]\(\$at\) +0+0124 <[^>]*> sll \$a0,\$a0,0x8 +0+0128 <[^>]*> or \$a0,\$a0,\$at +0+012c <[^>]*> lui \$at,0x0 +[ ]*12c: [A-Z0-9_]*HI[A-Z0-9_]* .data.* +0+0130 <[^>]*> addiu \$at,\$at,[-0-9]+ +[ ]*130: [A-Z0-9_]*LO[A-Z0-9_]* .data.* +0+0134 <[^>]*> lb \$a0,[01]\(\$at\) +0+0138 <[^>]*> lbu \$at,[01]\(\$at\) +0+013c <[^>]*> sll \$a0,\$a0,0x8 +0+0140 <[^>]*> or \$a0,\$a0,\$at +0+0144 <[^>]*> lui \$at,0x0 +[ ]*144: [A-Z0-9_]*HI[A-Z0-9_]* big_external_data_label +0+0148 <[^>]*> addiu \$at,\$at,[-0-9]+ +[ ]*148: [A-Z0-9_]*LO[A-Z0-9_]* big_external_data_label +0+014c <[^>]*> lb \$a0,[01]\(\$at\) +0+0150 <[^>]*> lbu \$at,[01]\(\$at\) +0+0154 <[^>]*> sll \$a0,\$a0,0x8 +0+0158 <[^>]*> or \$a0,\$a0,\$at +0+015c <[^>]*> addiu \$at,\$gp,1 +[ ]*15c: [A-Z0-9_]*GPREL[A-Z0-9_]* small_external_data_label +0+0160 <[^>]*> lb \$a0,[01]\(\$at\) +0+0164 <[^>]*> lbu \$at,[01]\(\$at\) +0+0168 <[^>]*> sll \$a0,\$a0,0x8 +0+016c <[^>]*> or \$a0,\$a0,\$at +0+0170 <[^>]*> lui \$at,0x0 +[ ]*170: [A-Z0-9_]*HI[A-Z0-9_]* big_external_common +0+0174 <[^>]*> addiu \$at,\$at,[-0-9]+ +[ ]*174: [A-Z0-9_]*LO[A-Z0-9_]* big_external_common +0+0178 <[^>]*> lb \$a0,[01]\(\$at\) +0+017c <[^>]*> lbu \$at,[01]\(\$at\) +0+0180 <[^>]*> sll \$a0,\$a0,0x8 +0+0184 <[^>]*> or \$a0,\$a0,\$at +0+0188 <[^>]*> addiu \$at,\$gp,1 +[ ]*188: [A-Z0-9_]*GPREL[A-Z0-9_]* small_external_common +0+018c <[^>]*> lb \$a0,[01]\(\$at\) +0+0190 <[^>]*> lbu \$at,[01]\(\$at\) +0+0194 <[^>]*> sll \$a0,\$a0,0x8 +0+0198 <[^>]*> or \$a0,\$a0,\$at +0+019c <[^>]*> lui \$at,0x0 +[ ]*19c: [A-Z0-9_]*HI[A-Z0-9_]* .bss.* +0+01a0 <[^>]*> addiu \$at,\$at,[-0-9]+ +[ ]*1a0: [A-Z0-9_]*LO[A-Z0-9_]* .bss.* +0+01a4 <[^>]*> lb \$a0,[01]\(\$at\) +0+01a8 <[^>]*> lbu \$at,[01]\(\$at\) +0+01ac <[^>]*> sll \$a0,\$a0,0x8 +0+01b0 <[^>]*> or \$a0,\$a0,\$at +0+01b4 <[^>]*> addiu \$at,\$gp,[-0-9]+ +[ ]*1b4: [A-Z0-9_]*GPREL[A-Z0-9_]* .sbss.* +0+01b8 <[^>]*> lb \$a0,[01]\(\$at\) +0+01bc <[^>]*> lbu \$at,[01]\(\$at\) +0+01c0 <[^>]*> sll \$a0,\$a0,0x8 +0+01c4 <[^>]*> or \$a0,\$a0,\$at +0+01c8 <[^>]*> lui \$at,[-0-9x]+ +[ ]*1c8: [A-Z0-9_]*HI[A-Z0-9_]* .data.* +0+01cc <[^>]*> addiu \$at,\$at,[-0-9]+ +[ ]*1cc: [A-Z0-9_]*LO[A-Z0-9_]* .data.* +0+01d0 <[^>]*> lb \$a0,[01]\(\$at\) +0+01d4 <[^>]*> lbu \$at,[01]\(\$at\) +0+01d8 <[^>]*> sll \$a0,\$a0,0x8 +0+01dc <[^>]*> or \$a0,\$a0,\$at +0+01e0 <[^>]*> lui \$at,[-0-9x]+ +[ ]*1e0: [A-Z0-9_]*HI[A-Z0-9_]* big_external_data_label +0+01e4 <[^>]*> addiu \$at,\$at,[-0-9]+ +[ ]*1e4: [A-Z0-9_]*LO[A-Z0-9_]* big_external_data_label +0+01e8 <[^>]*> lb \$a0,[01]\(\$at\) +0+01ec <[^>]*> lbu \$at,[01]\(\$at\) +0+01f0 <[^>]*> sll \$a0,\$a0,0x8 +0+01f4 <[^>]*> or \$a0,\$a0,\$at +0+01f8 <[^>]*> lui \$at,[-0-9x]+ +[ ]*1f8: [A-Z0-9_]*HI[A-Z0-9_]* small_external_data_label +0+01fc <[^>]*> addiu \$at,\$at,[-0-9]+ +[ ]*1fc: [A-Z0-9_]*LO[A-Z0-9_]* small_external_data_label +0+0200 <[^>]*> lb \$a0,[01]\(\$at\) +0+0204 <[^>]*> lbu \$at,[01]\(\$at\) +0+0208 <[^>]*> sll \$a0,\$a0,0x8 +0+020c <[^>]*> or \$a0,\$a0,\$at +0+0210 <[^>]*> lui \$at,[-0-9x]+ +[ ]*210: [A-Z0-9_]*HI[A-Z0-9_]* big_external_common +0+0214 <[^>]*> addiu \$at,\$at,[-0-9]+ +[ ]*214: [A-Z0-9_]*LO[A-Z0-9_]* big_external_common +0+0218 <[^>]*> lb \$a0,[01]\(\$at\) +0+021c <[^>]*> lbu \$at,[01]\(\$at\) +0+0220 <[^>]*> sll \$a0,\$a0,0x8 +0+0224 <[^>]*> or \$a0,\$a0,\$at +0+0228 <[^>]*> lui \$at,[-0-9x]+ +[ ]*228: [A-Z0-9_]*HI[A-Z0-9_]* small_external_common +0+022c <[^>]*> addiu \$at,\$at,[-0-9]+ +[ ]*22c: [A-Z0-9_]*LO[A-Z0-9_]* small_external_common +0+0230 <[^>]*> lb \$a0,[01]\(\$at\) +0+0234 <[^>]*> lbu \$at,[01]\(\$at\) +0+0238 <[^>]*> sll \$a0,\$a0,0x8 +0+023c <[^>]*> or \$a0,\$a0,\$at +0+0240 <[^>]*> lui \$at,[-0-9x]+ +[ ]*240: [A-Z0-9_]*HI[A-Z0-9_]* .bss.* +0+0244 <[^>]*> addiu \$at,\$at,[-0-9]+ +[ ]*244: [A-Z0-9_]*LO[A-Z0-9_]* .bss.* +0+0248 <[^>]*> lb \$a0,[01]\(\$at\) +0+024c <[^>]*> lbu \$at,[01]\(\$at\) +0+0250 <[^>]*> sll \$a0,\$a0,0x8 +0+0254 <[^>]*> or \$a0,\$a0,\$at +0+0258 <[^>]*> lui \$at,[-0-9x]+ +[ ]*258: [A-Z0-9_]*HI[A-Z0-9_]* .sbss.* +0+025c <[^>]*> addiu \$at,\$at,[-0-9]+ +[ ]*25c: [A-Z0-9_]*LO[A-Z0-9_]* .sbss.* +0+0260 <[^>]*> lb \$a0,[01]\(\$at\) +0+0264 <[^>]*> lbu \$at,[01]\(\$at\) +0+0268 <[^>]*> sll \$a0,\$a0,0x8 +0+026c <[^>]*> or \$a0,\$a0,\$at +0+0270 <[^>]*> lui \$at,0x0 +[ ]*270: [A-Z0-9_]*HI[A-Z0-9_]* .data.* +0+0274 <[^>]*> addiu \$at,\$at,[-0-9]+ +[ ]*274: [A-Z0-9_]*LO[A-Z0-9_]* .data.* +0+0278 <[^>]*> lb \$a0,[01]\(\$at\) +0+027c <[^>]*> lbu \$at,[01]\(\$at\) +0+0280 <[^>]*> sll \$a0,\$a0,0x8 +0+0284 <[^>]*> or \$a0,\$a0,\$at +0+0288 <[^>]*> lui \$at,0x0 +[ ]*288: [A-Z0-9_]*HI[A-Z0-9_]* big_external_data_label +0+028c <[^>]*> addiu \$at,\$at,[-0-9]+ +[ ]*28c: [A-Z0-9_]*LO[A-Z0-9_]* big_external_data_label +0+0290 <[^>]*> lb \$a0,[01]\(\$at\) +0+0294 <[^>]*> lbu \$at,[01]\(\$at\) +0+0298 <[^>]*> sll \$a0,\$a0,0x8 +0+029c <[^>]*> or \$a0,\$a0,\$at +0+02a0 <[^>]*> lui \$at,0x0 +[ ]*2a0: [A-Z0-9_]*HI[A-Z0-9_]* small_external_data_label +0+02a4 <[^>]*> addiu \$at,\$at,[-0-9]+ +[ ]*2a4: [A-Z0-9_]*LO[A-Z0-9_]* small_external_data_label +0+02a8 <[^>]*> lb \$a0,[01]\(\$at\) +0+02ac <[^>]*> lbu \$at,[01]\(\$at\) +0+02b0 <[^>]*> sll \$a0,\$a0,0x8 +0+02b4 <[^>]*> or \$a0,\$a0,\$at +0+02b8 <[^>]*> lui \$at,0x0 +[ ]*2b8: [A-Z0-9_]*HI[A-Z0-9_]* big_external_common +0+02bc <[^>]*> addiu \$at,\$at,[-0-9]+ +[ ]*2bc: [A-Z0-9_]*LO[A-Z0-9_]* big_external_common +0+02c0 <[^>]*> lb \$a0,[01]\(\$at\) +0+02c4 <[^>]*> lbu \$at,[01]\(\$at\) +0+02c8 <[^>]*> sll \$a0,\$a0,0x8 +0+02cc <[^>]*> or \$a0,\$a0,\$at +0+02d0 <[^>]*> lui \$at,0x0 +[ ]*2d0: [A-Z0-9_]*HI[A-Z0-9_]* small_external_common +0+02d4 <[^>]*> addiu \$at,\$at,[-0-9]+ +[ ]*2d4: [A-Z0-9_]*LO[A-Z0-9_]* small_external_common +0+02d8 <[^>]*> lb \$a0,[01]\(\$at\) +0+02dc <[^>]*> lbu \$at,[01]\(\$at\) +0+02e0 <[^>]*> sll \$a0,\$a0,0x8 +0+02e4 <[^>]*> or \$a0,\$a0,\$at +0+02e8 <[^>]*> lui \$at,0x0 +[ ]*2e8: [A-Z0-9_]*HI[A-Z0-9_]* .bss.* +0+02ec <[^>]*> addiu \$at,\$at,[-0-9]+ +[ ]*2ec: [A-Z0-9_]*LO[A-Z0-9_]* .bss.* +0+02f0 <[^>]*> lb \$a0,[01]\(\$at\) +0+02f4 <[^>]*> lbu \$at,[01]\(\$at\) +0+02f8 <[^>]*> sll \$a0,\$a0,0x8 +0+02fc <[^>]*> or \$a0,\$a0,\$at +0+0300 <[^>]*> lui \$at,0x0 +[ ]*300: [A-Z0-9_]*HI[A-Z0-9_]* .sbss.* +0+0304 <[^>]*> addiu \$at,\$at,[-0-9]+ +[ ]*304: [A-Z0-9_]*LO[A-Z0-9_]* .sbss.* +0+0308 <[^>]*> lb \$a0,[01]\(\$at\) +0+030c <[^>]*> lbu \$at,[01]\(\$at\) +0+0310 <[^>]*> sll \$a0,\$a0,0x8 +0+0314 <[^>]*> or \$a0,\$a0,\$at +0+0318 <[^>]*> lui \$at,[-0-9x]+ +[ ]*318: [A-Z0-9_]*HI[A-Z0-9_]* .data.* +0+031c <[^>]*> addiu \$at,\$at,[-0-9]+ +[ ]*31c: [A-Z0-9_]*LO[A-Z0-9_]* .data.* +0+0320 <[^>]*> lb \$a0,[01]\(\$at\) +0+0324 <[^>]*> lbu \$at,[01]\(\$at\) +0+0328 <[^>]*> sll \$a0,\$a0,0x8 +0+032c <[^>]*> or \$a0,\$a0,\$at +0+0330 <[^>]*> lui \$at,[-0-9x]+ +[ ]*330: [A-Z0-9_]*HI[A-Z0-9_]* big_external_data_label +0+0334 <[^>]*> addiu \$at,\$at,0 +[ ]*334: [A-Z0-9_]*LO[A-Z0-9_]* big_external_data_label +0+0338 <[^>]*> lb \$a0,[01]\(\$at\) +0+033c <[^>]*> lbu \$at,[01]\(\$at\) +0+0340 <[^>]*> sll \$a0,\$a0,0x8 +0+0344 <[^>]*> or \$a0,\$a0,\$at +0+0348 <[^>]*> lui \$at,[-0-9x]+ +[ ]*348: [A-Z0-9_]*HI[A-Z0-9_]* small_external_data_label +0+034c <[^>]*> addiu \$at,\$at,0 +[ ]*34c: [A-Z0-9_]*LO[A-Z0-9_]* small_external_data_label +0+0350 <[^>]*> lb \$a0,[01]\(\$at\) +0+0354 <[^>]*> lbu \$at,[01]\(\$at\) +0+0358 <[^>]*> sll \$a0,\$a0,0x8 +0+035c <[^>]*> or \$a0,\$a0,\$at +0+0360 <[^>]*> lui \$at,[-0-9x]+ +[ ]*360: [A-Z0-9_]*HI[A-Z0-9_]* big_external_common +0+0364 <[^>]*> addiu \$at,\$at,0 +[ ]*364: [A-Z0-9_]*LO[A-Z0-9_]* big_external_common +0+0368 <[^>]*> lb \$a0,[01]\(\$at\) +0+036c <[^>]*> lbu \$at,[01]\(\$at\) +0+0370 <[^>]*> sll \$a0,\$a0,0x8 +0+0374 <[^>]*> or \$a0,\$a0,\$at +0+0378 <[^>]*> lui \$at,[-0-9x]+ +[ ]*378: [A-Z0-9_]*HI[A-Z0-9_]* small_external_common +0+037c <[^>]*> addiu \$at,\$at,0 +[ ]*37c: [A-Z0-9_]*LO[A-Z0-9_]* small_external_common +0+0380 <[^>]*> lb \$a0,[01]\(\$at\) +0+0384 <[^>]*> lbu \$at,[01]\(\$at\) +0+0388 <[^>]*> sll \$a0,\$a0,0x8 +0+038c <[^>]*> or \$a0,\$a0,\$at +0+0390 <[^>]*> lui \$at,[-0-9x]+ +[ ]*390: [A-Z0-9_]*HI[A-Z0-9_]* .bss.* +0+0394 <[^>]*> addiu \$at,\$at,[-0-9]+ +[ ]*394: [A-Z0-9_]*LO[A-Z0-9_]* .bss.* +0+0398 <[^>]*> lb \$a0,[01]\(\$at\) +0+039c <[^>]*> lbu \$at,[01]\(\$at\) +0+03a0 <[^>]*> sll \$a0,\$a0,0x8 +0+03a4 <[^>]*> or \$a0,\$a0,\$at +0+03a8 <[^>]*> lui \$at,[-0-9x]+ +[ ]*3a8: [A-Z0-9_]*HI[A-Z0-9_]* .sbss.* +0+03ac <[^>]*> addiu \$at,\$at,[-0-9]+ +[ ]*3ac: [A-Z0-9_]*LO[A-Z0-9_]* .sbss.* +0+03b0 <[^>]*> lb \$a0,[01]\(\$at\) +0+03b4 <[^>]*> lbu \$at,[01]\(\$at\) +0+03b8 <[^>]*> sll \$a0,\$a0,0x8 +0+03bc <[^>]*> or \$a0,\$a0,\$at +0+03c0 <[^>]*> lui \$at,[-0-9x]+ +[ ]*3c0: [A-Z0-9_]*HI[A-Z0-9_]* .data.* +0+03c4 <[^>]*> addiu \$at,\$at,[-0-9]+ +[ ]*3c4: [A-Z0-9_]*LO[A-Z0-9_]* .data.* +0+03c8 <[^>]*> lb \$a0,[01]\(\$at\) +0+03cc <[^>]*> lbu \$at,[01]\(\$at\) +0+03d0 <[^>]*> sll \$a0,\$a0,0x8 +0+03d4 <[^>]*> or \$a0,\$a0,\$at +0+03d8 <[^>]*> lui \$at,[-0-9x]+ +[ ]*3d8: [A-Z0-9_]*HI[A-Z0-9_]* big_external_data_label +0+03dc <[^>]*> addiu \$at,\$at,[-0-9]+ +[ ]*3dc: [A-Z0-9_]*LO[A-Z0-9_]* big_external_data_label +0+03e0 <[^>]*> lb \$a0,[01]\(\$at\) +0+03e4 <[^>]*> lbu \$at,[01]\(\$at\) +0+03e8 <[^>]*> sll \$a0,\$a0,0x8 +0+03ec <[^>]*> or \$a0,\$a0,\$at +0+03f0 <[^>]*> lui \$at,[-0-9x]+ +[ ]*3f0: [A-Z0-9_]*HI[A-Z0-9_]* small_external_data_label +0+03f4 <[^>]*> addiu \$at,\$at,[-0-9]+ +[ ]*3f4: [A-Z0-9_]*LO[A-Z0-9_]* small_external_data_label +0+03f8 <[^>]*> lb \$a0,[01]\(\$at\) +0+03fc <[^>]*> lbu \$at,[01]\(\$at\) +0+0400 <[^>]*> sll \$a0,\$a0,0x8 +0+0404 <[^>]*> or \$a0,\$a0,\$at +0+0408 <[^>]*> lui \$at,[-0-9x]+ +[ ]*408: [A-Z0-9_]*HI[A-Z0-9_]* big_external_common +0+040c <[^>]*> addiu \$at,\$at,[-0-9]+ +[ ]*40c: [A-Z0-9_]*LO[A-Z0-9_]* big_external_common +0+0410 <[^>]*> lb \$a0,[01]\(\$at\) +0+0414 <[^>]*> lbu \$at,[01]\(\$at\) +0+0418 <[^>]*> sll \$a0,\$a0,0x8 +0+041c <[^>]*> or \$a0,\$a0,\$at +0+0420 <[^>]*> lui \$at,[-0-9x]+ +[ ]*420: [A-Z0-9_]*HI[A-Z0-9_]* small_external_common +0+0424 <[^>]*> addiu \$at,\$at,[-0-9]+ +[ ]*424: [A-Z0-9_]*LO[A-Z0-9_]* small_external_common +0+0428 <[^>]*> lb \$a0,[01]\(\$at\) +0+042c <[^>]*> lbu \$at,[01]\(\$at\) +0+0430 <[^>]*> sll \$a0,\$a0,0x8 +0+0434 <[^>]*> or \$a0,\$a0,\$at +0+0438 <[^>]*> lui \$at,[-0-9x]+ +[ ]*438: [A-Z0-9_]*HI[A-Z0-9_]* .bss.* +0+043c <[^>]*> addiu \$at,\$at,[-0-9]+ +[ ]*43c: [A-Z0-9_]*LO[A-Z0-9_]* .bss.* +0+0440 <[^>]*> lb \$a0,[01]\(\$at\) +0+0444 <[^>]*> lbu \$at,[01]\(\$at\) +0+0448 <[^>]*> sll \$a0,\$a0,0x8 +0+044c <[^>]*> or \$a0,\$a0,\$at +0+0450 <[^>]*> lui \$at,[-0-9x]+ +[ ]*450: [A-Z0-9_]*HI[A-Z0-9_]* .sbss.* +0+0454 <[^>]*> addiu \$at,\$at,[-0-9]+ +[ ]*454: [A-Z0-9_]*LO[A-Z0-9_]* .sbss.* +0+0458 <[^>]*> lb \$a0,[01]\(\$at\) +0+045c <[^>]*> lbu \$at,[01]\(\$at\) +0+0460 <[^>]*> sll \$a0,\$a0,0x8 +0+0464 <[^>]*> or \$a0,\$a0,\$at +0+0468 <[^>]*> lbu \$a0,[01]\(\$zero\) +0+046c <[^>]*> lbu \$at,[01]\(\$zero\) +0+0470 <[^>]*> sll \$a0,\$a0,0x8 +0+0474 <[^>]*> or \$a0,\$a0,\$at + ... diff --git a/gas/testsuite/gas/mips/ulh.s b/gas/testsuite/gas/mips/ulh.s new file mode 100644 index 0000000..26ecbb9 --- /dev/null +++ b/gas/testsuite/gas/mips/ulh.s @@ -0,0 +1,69 @@ +# Source file used to test the ulh macro. + + .data +data_label: + .extern big_external_data_label,1000 + .extern small_external_data_label,1 + .comm big_external_common,1000 + .comm small_external_common,1 + .lcomm big_local_common,1000 + .lcomm small_local_common,1 + + .text + ulh $4,0 + ulh $4,1 + ulh $4,0x8000 + ulh $4,-0x8000 + ulh $4,0x10000 + ulh $4,0x1a5a5 + ulh $4,0($5) + ulh $4,1($5) + ulh $4,data_label + ulh $4,big_external_data_label + ulh $4,small_external_data_label + ulh $4,big_external_common + ulh $4,small_external_common + ulh $4,big_local_common + ulh $4,small_local_common + ulh $4,data_label+1 + ulh $4,big_external_data_label+1 + ulh $4,small_external_data_label+1 + ulh $4,big_external_common+1 + ulh $4,small_external_common+1 + ulh $4,big_local_common+1 + ulh $4,small_local_common+1 + ulh $4,data_label+0x8000 + ulh $4,big_external_data_label+0x8000 + ulh $4,small_external_data_label+0x8000 + ulh $4,big_external_common+0x8000 + ulh $4,small_external_common+0x8000 + ulh $4,big_local_common+0x8000 + ulh $4,small_local_common+0x8000 + ulh $4,data_label-0x8000 + ulh $4,big_external_data_label-0x8000 + ulh $4,small_external_data_label-0x8000 + ulh $4,big_external_common-0x8000 + ulh $4,small_external_common-0x8000 + ulh $4,big_local_common-0x8000 + ulh $4,small_local_common-0x8000 + ulh $4,data_label+0x10000 + ulh $4,big_external_data_label+0x10000 + ulh $4,small_external_data_label+0x10000 + ulh $4,big_external_common+0x10000 + ulh $4,small_external_common+0x10000 + ulh $4,big_local_common+0x10000 + ulh $4,small_local_common+0x10000 + ulh $4,data_label+0x1a5a5 + ulh $4,big_external_data_label+0x1a5a5 + ulh $4,small_external_data_label+0x1a5a5 + ulh $4,big_external_common+0x1a5a5 + ulh $4,small_external_common+0x1a5a5 + ulh $4,big_local_common+0x1a5a5 + ulh $4,small_local_common+0x1a5a5 + +# ulhu is handled like ulh. Sanity check it. + ulhu $4,0 + +# Round to a 16 byte boundary, for ease in testing multiple targets. + nop + nop diff --git a/gas/testsuite/gas/mips/ulw.d b/gas/testsuite/gas/mips/ulw.d new file mode 100644 index 0000000..bfbdc94 --- /dev/null +++ b/gas/testsuite/gas/mips/ulw.d @@ -0,0 +1,270 @@ +#objdump: -dr --prefix-addresses -mmips:3000 +#name: MIPS ulw +#as: -mips1 + +# Test the ulw macro. + +.*: +file format .*mips.* + +Disassembly of section .text: +0+0000 <[^>]*> lwl \$a0,[03]\(\$zero\) +0+0004 <[^>]*> lwr \$a0,[03]\(\$zero\) +0+0008 <[^>]*> lwl \$a0,[14]\(\$zero\) +0+000c <[^>]*> lwr \$a0,[14]\(\$zero\) +0+0010 <[^>]*> li \$at,0x8000 +0+0014 <[^>]*> lwl \$a0,[03]\(\$at\) +0+0018 <[^>]*> lwr \$a0,[03]\(\$at\) +0+001c <[^>]*> lwl \$a0,-3276[58]\(\$zero\) +0+0020 <[^>]*> lwr \$a0,-3276[58]\(\$zero\) +0+0024 <[^>]*> lui \$at,0x1 +0+0028 <[^>]*> lwl \$a0,[03]\(\$at\) +0+002c <[^>]*> lwr \$a0,[03]\(\$at\) +0+0030 <[^>]*> lui \$at,0x1 +0+0034 <[^>]*> ori \$at,\$at,0xa5a5 +0+0038 <[^>]*> lwl \$a0,[03]\(\$at\) +0+003c <[^>]*> lwr \$a0,[03]\(\$at\) +0+0040 <[^>]*> lwl \$a0,[03]\(\$a1\) +0+0044 <[^>]*> lwr \$a0,[03]\(\$a1\) +0+0048 <[^>]*> lwl \$a0,[14]\(\$a1\) +0+004c <[^>]*> lwr \$a0,[-0-9]+\(\$a1\) +0+0050 <[^>]*> lui \$at,[-0-9x]+ +[ ]*50: [A-Z0-9_]*HI[A-Z0-9_]* .data.* +0+0054 <[^>]*> addiu \$at,\$at,[-0-9]+ +[ ]*54: [A-Z0-9_]*LO[A-Z0-9_]* .data.* +0+0058 <[^>]*> lwl \$a0,[03]\(\$at\) +0+005c <[^>]*> lwr \$a0,[03]\(\$at\) +0+0060 <[^>]*> lui \$at,0x0 +[ ]*60: [A-Z0-9_]*HI[A-Z0-9_]* big_external_data_label +0+0064 <[^>]*> addiu \$at,\$at,[-0-9]+ +[ ]*64: [A-Z0-9_]*LO[A-Z0-9_]* big_external_data_label +0+0068 <[^>]*> lwl \$a0,[03]\(\$at\) +0+006c <[^>]*> lwr \$a0,[03]\(\$at\) +0+0070 <[^>]*> addiu \$at,\$gp,0 +[ ]*70: [A-Z0-9_]*GPREL[A-Z0-9_]* small_external_data_label +0+0074 <[^>]*> lwl \$a0,[03]\(\$at\) +0+0078 <[^>]*> lwr \$a0,[03]\(\$at\) +0+007c <[^>]*> lui \$at,0x0 +[ ]*7c: [A-Z0-9_]*HI[A-Z0-9_]* big_external_common +0+0080 <[^>]*> addiu \$at,\$at,[-0-9]+ +[ ]*80: [A-Z0-9_]*LO[A-Z0-9_]* big_external_common +0+0084 <[^>]*> lwl \$a0,[03]\(\$at\) +0+0088 <[^>]*> lwr \$a0,[03]\(\$at\) +0+008c <[^>]*> addiu \$at,\$gp,0 +[ ]*8c: [A-Z0-9_]*GPREL[A-Z0-9_]* small_external_common +0+0090 <[^>]*> lwl \$a0,[03]\(\$at\) +0+0094 <[^>]*> lwr \$a0,[03]\(\$at\) +0+0098 <[^>]*> lui \$at,[-0-9x]+ +[ ]*98: [A-Z0-9_]*HI[A-Z0-9_]* .bss.* +0+009c <[^>]*> addiu \$at,\$at,[-0-9]+ +[ ]*9c: [A-Z0-9_]*LO[A-Z0-9_]* .bss.* +0+00a0 <[^>]*> lwl \$a0,[03]\(\$at\) +0+00a4 <[^>]*> lwr \$a0,[03]\(\$at\) +0+00a8 <[^>]*> addiu \$at,\$gp,[-0-9]+ +[ ]*a8: [A-Z0-9_]*GPREL[A-Z0-9_]* .sbss.* +0+00ac <[^>]*> lwl \$a0,[03]\(\$at\) +0+00b0 <[^>]*> lwr \$a0,[03]\(\$at\) +0+00b4 <[^>]*> lui \$at,0x0 +[ ]*b4: [A-Z0-9_]*HI[A-Z0-9_]* .data.* +0+00b8 <[^>]*> addiu \$at,\$at,[-0-9]+ +[ ]*b8: [A-Z0-9_]*LO[A-Z0-9_]* .data.* +0+00bc <[^>]*> lwl \$a0,[03]\(\$at\) +0+00c0 <[^>]*> lwr \$a0,[03]\(\$at\) +0+00c4 <[^>]*> lui \$at,0x0 +[ ]*c4: [A-Z0-9_]*HI[A-Z0-9_]* big_external_data_label +0+00c8 <[^>]*> addiu \$at,\$at,[-0-9]+ +[ ]*c8: [A-Z0-9_]*LO[A-Z0-9_]* big_external_data_label +0+00cc <[^>]*> lwl \$a0,[03]\(\$at\) +0+00d0 <[^>]*> lwr \$a0,[03]\(\$at\) +0+00d4 <[^>]*> addiu \$at,\$gp,1 +[ ]*d4: [A-Z0-9_]*GPREL[A-Z0-9_]* small_external_data_label +0+00d8 <[^>]*> lwl \$a0,[03]\(\$at\) +0+00dc <[^>]*> lwr \$a0,[03]\(\$at\) +0+00e0 <[^>]*> lui \$at,0x0 +[ ]*e0: [A-Z0-9_]*HI[A-Z0-9_]* big_external_common +0+00e4 <[^>]*> addiu \$at,\$at,[-0-9]+ +[ ]*e4: [A-Z0-9_]*LO[A-Z0-9_]* big_external_common +0+00e8 <[^>]*> lwl \$a0,[03]\(\$at\) +0+00ec <[^>]*> lwr \$a0,[03]\(\$at\) +0+00f0 <[^>]*> addiu \$at,\$gp,1 +[ ]*f0: [A-Z0-9_]*GPREL[A-Z0-9_]* small_external_common +0+00f4 <[^>]*> lwl \$a0,[03]\(\$at\) +0+00f8 <[^>]*> lwr \$a0,[03]\(\$at\) +0+00fc <[^>]*> lui \$at,0x0 +[ ]*fc: [A-Z0-9_]*HI[A-Z0-9_]* .bss.* +0+0100 <[^>]*> addiu \$at,\$at,[-0-9]+ +[ ]*100: [A-Z0-9_]*LO[A-Z0-9_]* .bss.* +0+0104 <[^>]*> lwl \$a0,[03]\(\$at\) +0+0108 <[^>]*> lwr \$a0,[03]\(\$at\) +0+010c <[^>]*> addiu \$at,\$gp,[-0-9]+ +[ ]*10c: [A-Z0-9_]*GPREL[A-Z0-9_]* .sbss.* +0+0110 <[^>]*> lwl \$a0,[03]\(\$at\) +0+0114 <[^>]*> lwr \$a0,[03]\(\$at\) +0+0118 <[^>]*> lui \$at,[-0-9x]+ +[ ]*118: [A-Z0-9_]*HI[A-Z0-9_]* .data.* +0+011c <[^>]*> addiu \$at,\$at,[-0-9]+ +[ ]*11c: [A-Z0-9_]*LO[A-Z0-9_]* .data.* +0+0120 <[^>]*> lwl \$a0,[03]\(\$at\) +0+0124 <[^>]*> lwr \$a0,[03]\(\$at\) +0+0128 <[^>]*> lui \$at,[-0-9x]+ +[ ]*128: [A-Z0-9_]*HI[A-Z0-9_]* big_external_data_label +0+012c <[^>]*> addiu \$at,\$at,[-0-9]+ +[ ]*12c: [A-Z0-9_]*LO[A-Z0-9_]* big_external_data_label +0+0130 <[^>]*> lwl \$a0,[03]\(\$at\) +0+0134 <[^>]*> lwr \$a0,[03]\(\$at\) +0+0138 <[^>]*> lui \$at,[-0-9x]+ +[ ]*138: [A-Z0-9_]*HI[A-Z0-9_]* small_external_data_label +0+013c <[^>]*> addiu \$at,\$at,[-0-9]+ +[ ]*13c: [A-Z0-9_]*LO[A-Z0-9_]* small_external_data_label +0+0140 <[^>]*> lwl \$a0,[03]\(\$at\) +0+0144 <[^>]*> lwr \$a0,[03]\(\$at\) +0+0148 <[^>]*> lui \$at,[-0-9x]+ +[ ]*148: [A-Z0-9_]*HI[A-Z0-9_]* big_external_common +0+014c <[^>]*> addiu \$at,\$at,[-0-9]+ +[ ]*14c: [A-Z0-9_]*LO[A-Z0-9_]* big_external_common +0+0150 <[^>]*> lwl \$a0,[03]\(\$at\) +0+0154 <[^>]*> lwr \$a0,[03]\(\$at\) +0+0158 <[^>]*> lui \$at,[-0-9x]+ +[ ]*158: [A-Z0-9_]*HI[A-Z0-9_]* small_external_common +0+015c <[^>]*> addiu \$at,\$at,[-0-9]+ +[ ]*15c: [A-Z0-9_]*LO[A-Z0-9_]* small_external_common +0+0160 <[^>]*> lwl \$a0,[03]\(\$at\) +0+0164 <[^>]*> lwr \$a0,[03]\(\$at\) +0+0168 <[^>]*> lui \$at,[-0-9x]+ +[ ]*168: [A-Z0-9_]*HI[A-Z0-9_]* .bss.* +0+016c <[^>]*> addiu \$at,\$at,[-0-9]+ +[ ]*16c: [A-Z0-9_]*LO[A-Z0-9_]* .bss.* +0+0170 <[^>]*> lwl \$a0,[03]\(\$at\) +0+0174 <[^>]*> lwr \$a0,[03]\(\$at\) +0+0178 <[^>]*> lui \$at,[-0-9x]+ +[ ]*178: [A-Z0-9_]*HI[A-Z0-9_]* .sbss.* +0+017c <[^>]*> addiu \$at,\$at,[-0-9]+ +[ ]*17c: [A-Z0-9_]*LO[A-Z0-9_]* .sbss.* +0+0180 <[^>]*> lwl \$a0,[03]\(\$at\) +0+0184 <[^>]*> lwr \$a0,[03]\(\$at\) +0+0188 <[^>]*> lui \$at,0x0 +[ ]*188: [A-Z0-9_]*HI[A-Z0-9_]* .data.* +0+018c <[^>]*> addiu \$at,\$at,[-0-9]+ +[ ]*18c: [A-Z0-9_]*LO[A-Z0-9_]* .data.* +0+0190 <[^>]*> lwl \$a0,[03]\(\$at\) +0+0194 <[^>]*> lwr \$a0,[03]\(\$at\) +0+0198 <[^>]*> lui \$at,0x0 +[ ]*198: [A-Z0-9_]*HI[A-Z0-9_]* big_external_data_label +0+019c <[^>]*> addiu \$at,\$at,[-0-9]+ +[ ]*19c: [A-Z0-9_]*LO[A-Z0-9_]* big_external_data_label +0+01a0 <[^>]*> lwl \$a0,[03]\(\$at\) +0+01a4 <[^>]*> lwr \$a0,[03]\(\$at\) +0+01a8 <[^>]*> lui \$at,0x0 +[ ]*1a8: [A-Z0-9_]*HI[A-Z0-9_]* small_external_data_label +0+01ac <[^>]*> addiu \$at,\$at,[-0-9]+ +[ ]*1ac: [A-Z0-9_]*LO[A-Z0-9_]* small_external_data_label +0+01b0 <[^>]*> lwl \$a0,[03]\(\$at\) +0+01b4 <[^>]*> lwr \$a0,[03]\(\$at\) +0+01b8 <[^>]*> lui \$at,0x0 +[ ]*1b8: [A-Z0-9_]*HI[A-Z0-9_]* big_external_common +0+01bc <[^>]*> addiu \$at,\$at,[-0-9]+ +[ ]*1bc: [A-Z0-9_]*LO[A-Z0-9_]* big_external_common +0+01c0 <[^>]*> lwl \$a0,[03]\(\$at\) +0+01c4 <[^>]*> lwr \$a0,[03]\(\$at\) +0+01c8 <[^>]*> lui \$at,0x0 +[ ]*1c8: [A-Z0-9_]*HI[A-Z0-9_]* small_external_common +0+01cc <[^>]*> addiu \$at,\$at,[-0-9]+ +[ ]*1cc: [A-Z0-9_]*LO[A-Z0-9_]* small_external_common +0+01d0 <[^>]*> lwl \$a0,[03]\(\$at\) +0+01d4 <[^>]*> lwr \$a0,[03]\(\$at\) +0+01d8 <[^>]*> lui \$at,0x0 +[ ]*1d8: [A-Z0-9_]*HI[A-Z0-9_]* .bss.* +0+01dc <[^>]*> addiu \$at,\$at,[-0-9]+ +[ ]*1dc: [A-Z0-9_]*LO[A-Z0-9_]* .bss.* +0+01e0 <[^>]*> lwl \$a0,[03]\(\$at\) +0+01e4 <[^>]*> lwr \$a0,[03]\(\$at\) +0+01e8 <[^>]*> lui \$at,0x0 +[ ]*1e8: [A-Z0-9_]*HI[A-Z0-9_]* .sbss.* +0+01ec <[^>]*> addiu \$at,\$at,[-0-9]+ +[ ]*1ec: [A-Z0-9_]*LO[A-Z0-9_]* .sbss.* +0+01f0 <[^>]*> lwl \$a0,[03]\(\$at\) +0+01f4 <[^>]*> lwr \$a0,[03]\(\$at\) +0+01f8 <[^>]*> lui \$at,[-0-9x]+ +[ ]*1f8: [A-Z0-9_]*HI[A-Z0-9_]* .data.* +0+01fc <[^>]*> addiu \$at,\$at,[-0-9]+ +[ ]*1fc: [A-Z0-9_]*LO[A-Z0-9_]* .data.* +0+0200 <[^>]*> lwl \$a0,[03]\(\$at\) +0+0204 <[^>]*> lwr \$a0,[03]\(\$at\) +0+0208 <[^>]*> lui \$at,[-0-9x]+ +[ ]*208: [A-Z0-9_]*HI[A-Z0-9_]* big_external_data_label +0+020c <[^>]*> addiu \$at,\$at,0 +[ ]*20c: [A-Z0-9_]*LO[A-Z0-9_]* big_external_data_label +0+0210 <[^>]*> lwl \$a0,[03]\(\$at\) +0+0214 <[^>]*> lwr \$a0,[03]\(\$at\) +0+0218 <[^>]*> lui \$at,[-0-9x]+ +[ ]*218: [A-Z0-9_]*HI[A-Z0-9_]* small_external_data_label +0+021c <[^>]*> addiu \$at,\$at,0 +[ ]*21c: [A-Z0-9_]*LO[A-Z0-9_]* small_external_data_label +0+0220 <[^>]*> lwl \$a0,[03]\(\$at\) +0+0224 <[^>]*> lwr \$a0,[03]\(\$at\) +0+0228 <[^>]*> lui \$at,[-0-9x]+ +[ ]*228: [A-Z0-9_]*HI[A-Z0-9_]* big_external_common +0+022c <[^>]*> addiu \$at,\$at,0 +[ ]*22c: [A-Z0-9_]*LO[A-Z0-9_]* big_external_common +0+0230 <[^>]*> lwl \$a0,[03]\(\$at\) +0+0234 <[^>]*> lwr \$a0,[03]\(\$at\) +0+0238 <[^>]*> lui \$at,[-0-9x]+ +[ ]*238: [A-Z0-9_]*HI[A-Z0-9_]* small_external_common +0+023c <[^>]*> addiu \$at,\$at,0 +[ ]*23c: [A-Z0-9_]*LO[A-Z0-9_]* small_external_common +0+0240 <[^>]*> lwl \$a0,[03]\(\$at\) +0+0244 <[^>]*> lwr \$a0,[03]\(\$at\) +0+0248 <[^>]*> lui \$at,[-0-9x]+ +[ ]*248: [A-Z0-9_]*HI[A-Z0-9_]* .bss.* +0+024c <[^>]*> addiu \$at,\$at,[-0-9]+ +[ ]*24c: [A-Z0-9_]*LO[A-Z0-9_]* .bss.* +0+0250 <[^>]*> lwl \$a0,[03]\(\$at\) +0+0254 <[^>]*> lwr \$a0,[03]\(\$at\) +0+0258 <[^>]*> lui \$at,[-0-9x]+ +[ ]*258: [A-Z0-9_]*HI[A-Z0-9_]* .sbss.* +0+025c <[^>]*> addiu \$at,\$at,[-0-9]+ +[ ]*25c: [A-Z0-9_]*LO[A-Z0-9_]* .sbss.* +0+0260 <[^>]*> lwl \$a0,[03]\(\$at\) +0+0264 <[^>]*> lwr \$a0,[03]\(\$at\) +0+0268 <[^>]*> lui \$at,[-0-9x]+ +[ ]*268: [A-Z0-9_]*HI[A-Z0-9_]* .data.* +0+026c <[^>]*> addiu \$at,\$at,[-0-9]+ +[ ]*26c: [A-Z0-9_]*LO[A-Z0-9_]* .data.* +0+0270 <[^>]*> lwl \$a0,[03]\(\$at\) +0+0274 <[^>]*> lwr \$a0,[03]\(\$at\) +0+0278 <[^>]*> lui \$at,[-0-9x]+ +[ ]*278: [A-Z0-9_]*HI[A-Z0-9_]* big_external_data_label +0+027c <[^>]*> addiu \$at,\$at,[-0-9]+ +[ ]*27c: [A-Z0-9_]*LO[A-Z0-9_]* big_external_data_label +0+0280 <[^>]*> lwl \$a0,[03]\(\$at\) +0+0284 <[^>]*> lwr \$a0,[03]\(\$at\) +0+0288 <[^>]*> lui \$at,[-0-9x]+ +[ ]*288: [A-Z0-9_]*HI[A-Z0-9_]* small_external_data_label +0+028c <[^>]*> addiu \$at,\$at,[-0-9]+ +[ ]*28c: [A-Z0-9_]*LO[A-Z0-9_]* small_external_data_label +0+0290 <[^>]*> lwl \$a0,[03]\(\$at\) +0+0294 <[^>]*> lwr \$a0,[03]\(\$at\) +0+0298 <[^>]*> lui \$at,[-0-9x]+ +[ ]*298: [A-Z0-9_]*HI[A-Z0-9_]* big_external_common +0+029c <[^>]*> addiu \$at,\$at,[-0-9]+ +[ ]*29c: [A-Z0-9_]*LO[A-Z0-9_]* big_external_common +0+02a0 <[^>]*> lwl \$a0,[03]\(\$at\) +0+02a4 <[^>]*> lwr \$a0,[03]\(\$at\) +0+02a8 <[^>]*> lui \$at,[-0-9x]+ +[ ]*2a8: [A-Z0-9_]*HI[A-Z0-9_]* small_external_common +0+02ac <[^>]*> addiu \$at,\$at,[-0-9]+ +[ ]*2ac: [A-Z0-9_]*LO[A-Z0-9_]* small_external_common +0+02b0 <[^>]*> lwl \$a0,[03]\(\$at\) +0+02b4 <[^>]*> lwr \$a0,[03]\(\$at\) +0+02b8 <[^>]*> lui \$at,[-0-9x]+ +[ ]*2b8: [A-Z0-9_]*HI[A-Z0-9_]* .bss.* +0+02bc <[^>]*> addiu \$at,\$at,[-0-9]+ +[ ]*2bc: [A-Z0-9_]*LO[A-Z0-9_]* .bss.* +0+02c0 <[^>]*> lwl \$a0,[03]\(\$at\) +0+02c4 <[^>]*> lwr \$a0,[03]\(\$at\) +0+02c8 <[^>]*> lui \$at,[-0-9x]+ +[ ]*2c8: [A-Z0-9_]*HI[A-Z0-9_]* .sbss.* +0+02cc <[^>]*> addiu \$at,\$at,[-0-9]+ +[ ]*2cc: [A-Z0-9_]*LO[A-Z0-9_]* .sbss.* +0+02d0 <[^>]*> lwl \$a0,[03]\(\$at\) +0+02d4 <[^>]*> lwr \$a0,[03]\(\$at\) + ... diff --git a/gas/testsuite/gas/mips/ulw.s b/gas/testsuite/gas/mips/ulw.s new file mode 100644 index 0000000..3a36f1c --- /dev/null +++ b/gas/testsuite/gas/mips/ulw.s @@ -0,0 +1,66 @@ +# Source file used to test the ulw macro. + + .data +data_label: + .extern big_external_data_label,1000 + .extern small_external_data_label,1 + .comm big_external_common,1000 + .comm small_external_common,1 + .lcomm big_local_common,1000 + .lcomm small_local_common,1 + + .text + ulw $4,0 + ulw $4,1 + ulw $4,0x8000 + ulw $4,-0x8000 + ulw $4,0x10000 + ulw $4,0x1a5a5 + ulw $4,0($5) + ulw $4,1($5) + ulw $4,data_label + ulw $4,big_external_data_label + ulw $4,small_external_data_label + ulw $4,big_external_common + ulw $4,small_external_common + ulw $4,big_local_common + ulw $4,small_local_common + ulw $4,data_label+1 + ulw $4,big_external_data_label+1 + ulw $4,small_external_data_label+1 + ulw $4,big_external_common+1 + ulw $4,small_external_common+1 + ulw $4,big_local_common+1 + ulw $4,small_local_common+1 + ulw $4,data_label+0x8000 + ulw $4,big_external_data_label+0x8000 + ulw $4,small_external_data_label+0x8000 + ulw $4,big_external_common+0x8000 + ulw $4,small_external_common+0x8000 + ulw $4,big_local_common+0x8000 + ulw $4,small_local_common+0x8000 + ulw $4,data_label-0x8000 + ulw $4,big_external_data_label-0x8000 + ulw $4,small_external_data_label-0x8000 + ulw $4,big_external_common-0x8000 + ulw $4,small_external_common-0x8000 + ulw $4,big_local_common-0x8000 + ulw $4,small_local_common-0x8000 + ulw $4,data_label+0x10000 + ulw $4,big_external_data_label+0x10000 + ulw $4,small_external_data_label+0x10000 + ulw $4,big_external_common+0x10000 + ulw $4,small_external_common+0x10000 + ulw $4,big_local_common+0x10000 + ulw $4,small_local_common+0x10000 + ulw $4,data_label+0x1a5a5 + ulw $4,big_external_data_label+0x1a5a5 + ulw $4,small_external_data_label+0x1a5a5 + ulw $4,big_external_common+0x1a5a5 + ulw $4,small_external_common+0x1a5a5 + ulw $4,big_local_common+0x1a5a5 + ulw $4,small_local_common+0x1a5a5 + +# Round to a 16 byte boundary, for ease in testing multiple targets. + nop + nop diff --git a/gas/testsuite/gas/mips/usd.d b/gas/testsuite/gas/mips/usd.d new file mode 100644 index 0000000..63c0b73 --- /dev/null +++ b/gas/testsuite/gas/mips/usd.d @@ -0,0 +1,270 @@ +#objdump: -dr --prefix-addresses -mmips:4000 +#name: MIPS usd +#as: -mips3 -mcpu=r4000 + +# Test the usd macro. + +.*: +file format .*mips.* + +Disassembly of section .text: +0+0000 <[^>]*> sdl \$a0,[07]\(\$zero\) +0+0004 <[^>]*> sdr \$a0,[07]\(\$zero\) +0+0008 <[^>]*> sdl \$a0,[18]\(\$zero\) +0+000c <[^>]*> sdr \$a0,[18]\(\$zero\) +0+0010 <[^>]*> li \$at,0x8000 +0+0014 <[^>]*> sdl \$a0,[07]\(\$at\) +0+0018 <[^>]*> sdr \$a0,[07]\(\$at\) +0+001c <[^>]*> sdl \$a0,-3276[18]\(\$zero\) +0+0020 <[^>]*> sdr \$a0,-3276[18]\(\$zero\) +0+0024 <[^>]*> lui \$at,0x1 +0+0028 <[^>]*> sdl \$a0,[07]\(\$at\) +0+002c <[^>]*> sdr \$a0,[07]\(\$at\) +0+0030 <[^>]*> lui \$at,0x1 +0+0034 <[^>]*> ori \$at,\$at,0xa5a5 +0+0038 <[^>]*> sdl \$a0,[07]\(\$at\) +0+003c <[^>]*> sdr \$a0,[07]\(\$at\) +0+0040 <[^>]*> sdl \$a0,[07]\(\$a1\) +0+0044 <[^>]*> sdr \$a0,[07]\(\$a1\) +0+0048 <[^>]*> sdl \$a0,[18]\(\$a1\) +0+004c <[^>]*> sdr \$a0,[-0-9]+\(\$a1\) +0+0050 <[^>]*> lui \$at,[-0-9x]+ +[ ]*50: [A-Z0-9_]*HI[A-Z0-9_]* .data.* +0+0054 <[^>]*> daddiu \$at,\$at,[-0-9]+ +[ ]*54: [A-Z0-9_]*LO[A-Z0-9_]* .data.* +0+0058 <[^>]*> sdl \$a0,[07]\(\$at\) +0+005c <[^>]*> sdr \$a0,[07]\(\$at\) +0+0060 <[^>]*> lui \$at,[-0-9x]+ +[ ]*60: [A-Z0-9_]*HI[A-Z0-9_]* big_external_data_label +0+0064 <[^>]*> daddiu \$at,\$at,[-0-9]+ +[ ]*64: [A-Z0-9_]*LO[A-Z0-9_]* big_external_data_label +0+0068 <[^>]*> sdl \$a0,[07]\(\$at\) +0+006c <[^>]*> sdr \$a0,[07]\(\$at\) +0+0070 <[^>]*> daddiu \$at,\$gp,0 +[ ]*70: [A-Z0-9_]*GPREL[A-Z0-9_]* small_external_data_label +0+0074 <[^>]*> sdl \$a0,[07]\(\$at\) +0+0078 <[^>]*> sdr \$a0,[07]\(\$at\) +0+007c <[^>]*> lui \$at,0x0 +[ ]*7c: [A-Z0-9_]*HI[A-Z0-9_]* big_external_common +0+0080 <[^>]*> daddiu \$at,\$at,[-0-9]+ +[ ]*80: [A-Z0-9_]*LO[A-Z0-9_]* big_external_common +0+0084 <[^>]*> sdl \$a0,[07]\(\$at\) +0+0088 <[^>]*> sdr \$a0,[07]\(\$at\) +0+008c <[^>]*> daddiu \$at,\$gp,0 +[ ]*8c: [A-Z0-9_]*GPREL[A-Z0-9_]* small_external_common +0+0090 <[^>]*> sdl \$a0,[07]\(\$at\) +0+0094 <[^>]*> sdr \$a0,[07]\(\$at\) +0+0098 <[^>]*> lui \$at,[-0-9x]+ +[ ]*98: [A-Z0-9_]*HI[A-Z0-9_]* .bss.* +0+009c <[^>]*> daddiu \$at,\$at,[-0-9]+ +[ ]*9c: [A-Z0-9_]*LO[A-Z0-9_]* .bss.* +0+00a0 <[^>]*> sdl \$a0,[07]\(\$at\) +0+00a4 <[^>]*> sdr \$a0,[07]\(\$at\) +0+00a8 <[^>]*> daddiu \$at,\$gp,[-0-9]+ +[ ]*a8: [A-Z0-9_]*GPREL[A-Z0-9_]* .sbss.* +0+00ac <[^>]*> sdl \$a0,[07]\(\$at\) +0+00b0 <[^>]*> sdr \$a0,[07]\(\$at\) +0+00b4 <[^>]*> lui \$at,0x0 +[ ]*b4: [A-Z0-9_]*HI[A-Z0-9_]* .data.* +0+00b8 <[^>]*> daddiu \$at,\$at,[-0-9]+ +[ ]*b8: [A-Z0-9_]*LO[A-Z0-9_]* .data.* +0+00bc <[^>]*> sdl \$a0,[07]\(\$at\) +0+00c0 <[^>]*> sdr \$a0,[07]\(\$at\) +0+00c4 <[^>]*> lui \$at,0x0 +[ ]*c4: [A-Z0-9_]*HI[A-Z0-9_]* big_external_data_label +0+00c8 <[^>]*> daddiu \$at,\$at,[-0-9]+ +[ ]*c8: [A-Z0-9_]*LO[A-Z0-9_]* big_external_data_label +0+00cc <[^>]*> sdl \$a0,[07]\(\$at\) +0+00d0 <[^>]*> sdr \$a0,[07]\(\$at\) +0+00d4 <[^>]*> daddiu \$at,\$gp,1 +[ ]*d4: [A-Z0-9_]*GPREL[A-Z0-9_]* small_external_data_label +0+00d8 <[^>]*> sdl \$a0,[07]\(\$at\) +0+00dc <[^>]*> sdr \$a0,[07]\(\$at\) +0+00e0 <[^>]*> lui \$at,0x0 +[ ]*e0: [A-Z0-9_]*HI[A-Z0-9_]* big_external_common +0+00e4 <[^>]*> daddiu \$at,\$at,[-0-9]+ +[ ]*e4: [A-Z0-9_]*LO[A-Z0-9_]* big_external_common +0+00e8 <[^>]*> sdl \$a0,[07]\(\$at\) +0+00ec <[^>]*> sdr \$a0,[07]\(\$at\) +0+00f0 <[^>]*> daddiu \$at,\$gp,1 +[ ]*f0: [A-Z0-9_]*GPREL[A-Z0-9_]* small_external_common +0+00f4 <[^>]*> sdl \$a0,[07]\(\$at\) +0+00f8 <[^>]*> sdr \$a0,[07]\(\$at\) +0+00fc <[^>]*> lui \$at,0x0 +[ ]*fc: [A-Z0-9_]*HI[A-Z0-9_]* .bss.* +0+0100 <[^>]*> daddiu \$at,\$at,[-0-9]+ +[ ]*100: [A-Z0-9_]*LO[A-Z0-9_]* .bss.* +0+0104 <[^>]*> sdl \$a0,[07]\(\$at\) +0+0108 <[^>]*> sdr \$a0,[07]\(\$at\) +0+010c <[^>]*> daddiu \$at,\$gp,[-0-9]+ +[ ]*10c: [A-Z0-9_]*GPREL[A-Z0-9_]* .sbss.* +0+0110 <[^>]*> sdl \$a0,[07]\(\$at\) +0+0114 <[^>]*> sdr \$a0,[07]\(\$at\) +0+0118 <[^>]*> lui \$at,[-0-9x]+ +[ ]*118: [A-Z0-9_]*HI[A-Z0-9_]* .data.* +0+011c <[^>]*> daddiu \$at,\$at,[-0-9]+ +[ ]*11c: [A-Z0-9_]*LO[A-Z0-9_]* .data.* +0+0120 <[^>]*> sdl \$a0,[07]\(\$at\) +0+0124 <[^>]*> sdr \$a0,[07]\(\$at\) +0+0128 <[^>]*> lui \$at,[-0-9x]+ +[ ]*128: [A-Z0-9_]*HI[A-Z0-9_]* big_external_data_label +0+012c <[^>]*> daddiu \$at,\$at,[-0-9]+ +[ ]*12c: [A-Z0-9_]*LO[A-Z0-9_]* big_external_data_label +0+0130 <[^>]*> sdl \$a0,[07]\(\$at\) +0+0134 <[^>]*> sdr \$a0,[07]\(\$at\) +0+0138 <[^>]*> lui \$at,[-0-9x]+ +[ ]*138: [A-Z0-9_]*HI[A-Z0-9_]* small_external_data_label +0+013c <[^>]*> daddiu \$at,\$at,[-0-9]+ +[ ]*13c: [A-Z0-9_]*LO[A-Z0-9_]* small_external_data_label +0+0140 <[^>]*> sdl \$a0,[07]\(\$at\) +0+0144 <[^>]*> sdr \$a0,[07]\(\$at\) +0+0148 <[^>]*> lui \$at,[-0-9x]+ +[ ]*148: [A-Z0-9_]*HI[A-Z0-9_]* big_external_common +0+014c <[^>]*> daddiu \$at,\$at,[-0-9]+ +[ ]*14c: [A-Z0-9_]*LO[A-Z0-9_]* big_external_common +0+0150 <[^>]*> sdl \$a0,[07]\(\$at\) +0+0154 <[^>]*> sdr \$a0,[07]\(\$at\) +0+0158 <[^>]*> lui \$at,[-0-9x]+ +[ ]*158: [A-Z0-9_]*HI[A-Z0-9_]* small_external_common +0+015c <[^>]*> daddiu \$at,\$at,[-0-9]+ +[ ]*15c: [A-Z0-9_]*LO[A-Z0-9_]* small_external_common +0+0160 <[^>]*> sdl \$a0,[07]\(\$at\) +0+0164 <[^>]*> sdr \$a0,[07]\(\$at\) +0+0168 <[^>]*> lui \$at,[-0-9x]+ +[ ]*168: [A-Z0-9_]*HI[A-Z0-9_]* .bss.* +0+016c <[^>]*> daddiu \$at,\$at,[-0-9]+ +[ ]*16c: [A-Z0-9_]*LO[A-Z0-9_]* .bss.* +0+0170 <[^>]*> sdl \$a0,[07]\(\$at\) +0+0174 <[^>]*> sdr \$a0,[07]\(\$at\) +0+0178 <[^>]*> lui \$at,[-0-9x]+ +[ ]*178: [A-Z0-9_]*HI[A-Z0-9_]* .sbss.* +0+017c <[^>]*> daddiu \$at,\$at,[-0-9]+ +[ ]*17c: [A-Z0-9_]*LO[A-Z0-9_]* .sbss.* +0+0180 <[^>]*> sdl \$a0,[07]\(\$at\) +0+0184 <[^>]*> sdr \$a0,[07]\(\$at\) +0+0188 <[^>]*> lui \$at,0x0 +[ ]*188: [A-Z0-9_]*HI[A-Z0-9_]* .data.* +0+018c <[^>]*> daddiu \$at,\$at,[-0-9]+ +[ ]*18c: [A-Z0-9_]*LO[A-Z0-9_]* .data.* +0+0190 <[^>]*> sdl \$a0,[07]\(\$at\) +0+0194 <[^>]*> sdr \$a0,[07]\(\$at\) +0+0198 <[^>]*> lui \$at,0x0 +[ ]*198: [A-Z0-9_]*HI[A-Z0-9_]* big_external_data_label +0+019c <[^>]*> daddiu \$at,\$at,[-0-9]+ +[ ]*19c: [A-Z0-9_]*LO[A-Z0-9_]* big_external_data_label +0+01a0 <[^>]*> sdl \$a0,[07]\(\$at\) +0+01a4 <[^>]*> sdr \$a0,[07]\(\$at\) +0+01a8 <[^>]*> lui \$at,0x0 +[ ]*1a8: [A-Z0-9_]*HI[A-Z0-9_]* small_external_data_label +0+01ac <[^>]*> daddiu \$at,\$at,[-0-9]+ +[ ]*1ac: [A-Z0-9_]*LO[A-Z0-9_]* small_external_data_label +0+01b0 <[^>]*> sdl \$a0,[07]\(\$at\) +0+01b4 <[^>]*> sdr \$a0,[07]\(\$at\) +0+01b8 <[^>]*> lui \$at,0x0 +[ ]*1b8: [A-Z0-9_]*HI[A-Z0-9_]* big_external_common +0+01bc <[^>]*> daddiu \$at,\$at,[-0-9]+ +[ ]*1bc: [A-Z0-9_]*LO[A-Z0-9_]* big_external_common +0+01c0 <[^>]*> sdl \$a0,[07]\(\$at\) +0+01c4 <[^>]*> sdr \$a0,[07]\(\$at\) +0+01c8 <[^>]*> lui \$at,0x0 +[ ]*1c8: [A-Z0-9_]*HI[A-Z0-9_]* small_external_common +0+01cc <[^>]*> daddiu \$at,\$at,[-0-9]+ +[ ]*1cc: [A-Z0-9_]*LO[A-Z0-9_]* small_external_common +0+01d0 <[^>]*> sdl \$a0,[07]\(\$at\) +0+01d4 <[^>]*> sdr \$a0,[07]\(\$at\) +0+01d8 <[^>]*> lui \$at,0x0 +[ ]*1d8: [A-Z0-9_]*HI[A-Z0-9_]* .bss.* +0+01dc <[^>]*> daddiu \$at,\$at,[-0-9]+ +[ ]*1dc: [A-Z0-9_]*LO[A-Z0-9_]* .bss.* +0+01e0 <[^>]*> sdl \$a0,[07]\(\$at\) +0+01e4 <[^>]*> sdr \$a0,[07]\(\$at\) +0+01e8 <[^>]*> lui \$at,0x0 +[ ]*1e8: [A-Z0-9_]*HI[A-Z0-9_]* .sbss.* +0+01ec <[^>]*> daddiu \$at,\$at,[-0-9]+ +[ ]*1ec: [A-Z0-9_]*LO[A-Z0-9_]* .sbss.* +0+01f0 <[^>]*> sdl \$a0,[07]\(\$at\) +0+01f4 <[^>]*> sdr \$a0,[07]\(\$at\) +0+01f8 <[^>]*> lui \$at,[-0-9x]+ +[ ]*1f8: [A-Z0-9_]*HI[A-Z0-9_]* .data.* +0+01fc <[^>]*> daddiu \$at,\$at,[-0-9]+ +[ ]*1fc: [A-Z0-9_]*LO[A-Z0-9_]* .data.* +0+0200 <[^>]*> sdl \$a0,[07]\(\$at\) +0+0204 <[^>]*> sdr \$a0,[07]\(\$at\) +0+0208 <[^>]*> lui \$at,[-0-9x]+ +[ ]*208: [A-Z0-9_]*HI[A-Z0-9_]* big_external_data_label +0+020c <[^>]*> daddiu \$at,\$at,0 +[ ]*20c: [A-Z0-9_]*LO[A-Z0-9_]* big_external_data_label +0+0210 <[^>]*> sdl \$a0,[07]\(\$at\) +0+0214 <[^>]*> sdr \$a0,[07]\(\$at\) +0+0218 <[^>]*> lui \$at,[-0-9x]+ +[ ]*218: [A-Z0-9_]*HI[A-Z0-9_]* small_external_data_label +0+021c <[^>]*> daddiu \$at,\$at,0 +[ ]*21c: [A-Z0-9_]*LO[A-Z0-9_]* small_external_data_label +0+0220 <[^>]*> sdl \$a0,[07]\(\$at\) +0+0224 <[^>]*> sdr \$a0,[07]\(\$at\) +0+0228 <[^>]*> lui \$at,[-0-9x]+ +[ ]*228: [A-Z0-9_]*HI[A-Z0-9_]* big_external_common +0+022c <[^>]*> daddiu \$at,\$at,0 +[ ]*22c: [A-Z0-9_]*LO[A-Z0-9_]* big_external_common +0+0230 <[^>]*> sdl \$a0,[07]\(\$at\) +0+0234 <[^>]*> sdr \$a0,[07]\(\$at\) +0+0238 <[^>]*> lui \$at,[-0-9x]+ +[ ]*238: [A-Z0-9_]*HI[A-Z0-9_]* small_external_common +0+023c <[^>]*> daddiu \$at,\$at,0 +[ ]*23c: [A-Z0-9_]*LO[A-Z0-9_]* small_external_common +0+0240 <[^>]*> sdl \$a0,[07]\(\$at\) +0+0244 <[^>]*> sdr \$a0,[07]\(\$at\) +0+0248 <[^>]*> lui \$at,[-0-9x]+ +[ ]*248: [A-Z0-9_]*HI[A-Z0-9_]* .bss.* +0+024c <[^>]*> daddiu \$at,\$at,[-0-9]+ +[ ]*24c: [A-Z0-9_]*LO[A-Z0-9_]* .bss.* +0+0250 <[^>]*> sdl \$a0,[07]\(\$at\) +0+0254 <[^>]*> sdr \$a0,[07]\(\$at\) +0+0258 <[^>]*> lui \$at,[-0-9x]+ +[ ]*258: [A-Z0-9_]*HI[A-Z0-9_]* .sbss.* +0+025c <[^>]*> daddiu \$at,\$at,[-0-9]+ +[ ]*25c: [A-Z0-9_]*LO[A-Z0-9_]* .sbss.* +0+0260 <[^>]*> sdl \$a0,[07]\(\$at\) +0+0264 <[^>]*> sdr \$a0,[07]\(\$at\) +0+0268 <[^>]*> lui \$at,[-0-9x]+ +[ ]*268: [A-Z0-9_]*HI[A-Z0-9_]* .data.* +0+026c <[^>]*> daddiu \$at,\$at,[-0-9]+ +[ ]*26c: [A-Z0-9_]*LO[A-Z0-9_]* .data.* +0+0270 <[^>]*> sdl \$a0,[07]\(\$at\) +0+0274 <[^>]*> sdr \$a0,[07]\(\$at\) +0+0278 <[^>]*> lui \$at,[-0-9x]+ +[ ]*278: [A-Z0-9_]*HI[A-Z0-9_]* big_external_data_label +0+027c <[^>]*> daddiu \$at,\$at,[-0-9]+ +[ ]*27c: [A-Z0-9_]*LO[A-Z0-9_]* big_external_data_label +0+0280 <[^>]*> sdl \$a0,[07]\(\$at\) +0+0284 <[^>]*> sdr \$a0,[07]\(\$at\) +0+0288 <[^>]*> lui \$at,[-0-9x]+ +[ ]*288: [A-Z0-9_]*HI[A-Z0-9_]* small_external_data_label +0+028c <[^>]*> daddiu \$at,\$at,[-0-9]+ +[ ]*28c: [A-Z0-9_]*LO[A-Z0-9_]* small_external_data_label +0+0290 <[^>]*> sdl \$a0,[07]\(\$at\) +0+0294 <[^>]*> sdr \$a0,[07]\(\$at\) +0+0298 <[^>]*> lui \$at,[-0-9x]+ +[ ]*298: [A-Z0-9_]*HI[A-Z0-9_]* big_external_common +0+029c <[^>]*> daddiu \$at,\$at,[-0-9]+ +[ ]*29c: [A-Z0-9_]*LO[A-Z0-9_]* big_external_common +0+02a0 <[^>]*> sdl \$a0,[07]\(\$at\) +0+02a4 <[^>]*> sdr \$a0,[07]\(\$at\) +0+02a8 <[^>]*> lui \$at,[-0-9x]+ +[ ]*2a8: [A-Z0-9_]*HI[A-Z0-9_]* small_external_common +0+02ac <[^>]*> daddiu \$at,\$at,[-0-9]+ +[ ]*2ac: [A-Z0-9_]*LO[A-Z0-9_]* small_external_common +0+02b0 <[^>]*> sdl \$a0,[07]\(\$at\) +0+02b4 <[^>]*> sdr \$a0,[07]\(\$at\) +0+02b8 <[^>]*> lui \$at,[-0-9x]+ +[ ]*2b8: [A-Z0-9_]*HI[A-Z0-9_]* .bss.* +0+02bc <[^>]*> daddiu \$at,\$at,[-0-9]+ +[ ]*2bc: [A-Z0-9_]*LO[A-Z0-9_]* .bss.* +0+02c0 <[^>]*> sdl \$a0,[07]\(\$at\) +0+02c4 <[^>]*> sdr \$a0,[07]\(\$at\) +0+02c8 <[^>]*> lui \$at,[-0-9x]+ +[ ]*2c8: [A-Z0-9_]*HI[A-Z0-9_]* .sbss.* +0+02cc <[^>]*> daddiu \$at,\$at,[-0-9]+ +[ ]*2cc: [A-Z0-9_]*LO[A-Z0-9_]* .sbss.* +0+02d0 <[^>]*> sdl \$a0,[07]\(\$at\) +0+02d4 <[^>]*> sdr \$a0,[07]\(\$at\) + ... diff --git a/gas/testsuite/gas/mips/usd.s b/gas/testsuite/gas/mips/usd.s new file mode 100644 index 0000000..fd36735 --- /dev/null +++ b/gas/testsuite/gas/mips/usd.s @@ -0,0 +1,66 @@ +# Source file used to test the usd macro. + + .data +data_label: + .extern big_external_data_label,1000 + .extern small_external_data_label,1 + .comm big_external_common,1000 + .comm small_external_common,1 + .lcomm big_local_common,1000 + .lcomm small_local_common,1 + + .text + usd $4,0 + usd $4,1 + usd $4,0x8000 + usd $4,-0x8000 + usd $4,0x10000 + usd $4,0x1a5a5 + usd $4,0($5) + usd $4,1($5) + usd $4,data_label + usd $4,big_external_data_label + usd $4,small_external_data_label + usd $4,big_external_common + usd $4,small_external_common + usd $4,big_local_common + usd $4,small_local_common + usd $4,data_label+1 + usd $4,big_external_data_label+1 + usd $4,small_external_data_label+1 + usd $4,big_external_common+1 + usd $4,small_external_common+1 + usd $4,big_local_common+1 + usd $4,small_local_common+1 + usd $4,data_label+0x8000 + usd $4,big_external_data_label+0x8000 + usd $4,small_external_data_label+0x8000 + usd $4,big_external_common+0x8000 + usd $4,small_external_common+0x8000 + usd $4,big_local_common+0x8000 + usd $4,small_local_common+0x8000 + usd $4,data_label-0x8000 + usd $4,big_external_data_label-0x8000 + usd $4,small_external_data_label-0x8000 + usd $4,big_external_common-0x8000 + usd $4,small_external_common-0x8000 + usd $4,big_local_common-0x8000 + usd $4,small_local_common-0x8000 + usd $4,data_label+0x10000 + usd $4,big_external_data_label+0x10000 + usd $4,small_external_data_label+0x10000 + usd $4,big_external_common+0x10000 + usd $4,small_external_common+0x10000 + usd $4,big_local_common+0x10000 + usd $4,small_local_common+0x10000 + usd $4,data_label+0x1a5a5 + usd $4,big_external_data_label+0x1a5a5 + usd $4,small_external_data_label+0x1a5a5 + usd $4,big_external_common+0x1a5a5 + usd $4,small_external_common+0x1a5a5 + usd $4,big_local_common+0x1a5a5 + usd $4,small_local_common+0x1a5a5 + +# Round to a 16 byte boundary, for ease in testing multiple targets. + nop + nop diff --git a/gas/testsuite/gas/mips/ush.d b/gas/testsuite/gas/mips/ush.d new file mode 100644 index 0000000..c2f0a12 --- /dev/null +++ b/gas/testsuite/gas/mips/ush.d @@ -0,0 +1,455 @@ +#objdump: -dr --prefix-addresses -mmips:3000 +#name: MIPS ush +#as: -mips1 + +# Test the ush macro. + +.*: +file format .*mips.* + +Disassembly of section .text: +0+0000 <[^>]*> sb \$a0,[01]\(\$zero\) +0+0004 <[^>]*> srl \$at,\$a0,0x8 +0+0008 <[^>]*> sb \$at,[01]\(\$zero\) +0+000c <[^>]*> sb \$a0,[12]\(\$zero\) +0+0010 <[^>]*> srl \$at,\$a0,0x8 +0+0014 <[^>]*> sb \$at,[12]\(\$zero\) +0+0018 <[^>]*> li \$at,0x8000 +0+001c <[^>]*> sb \$a0,[01]\(\$at\) +0+0020 <[^>]*> srl \$a0,\$a0,0x8 +0+0024 <[^>]*> sb \$a0,[01]\(\$at\) +0+0028 <[^>]*> lbu \$at,[01]\(\$at\) +0+002c <[^>]*> sll \$a0,\$a0,0x8 +0+0030 <[^>]*> or \$a0,\$a0,\$at +0+0034 <[^>]*> sb \$a0,-3276[78]\(\$zero\) +0+0038 <[^>]*> srl \$at,\$a0,0x8 +0+003c <[^>]*> sb \$at,-3276[78]\(\$zero\) +0+0040 <[^>]*> lui \$at,0x1 +0+0044 <[^>]*> sb \$a0,[01]\(\$at\) +0+0048 <[^>]*> srl \$a0,\$a0,0x8 +0+004c <[^>]*> sb \$a0,[01]\(\$at\) +0+0050 <[^>]*> lbu \$at,[01]\(\$at\) +0+0054 <[^>]*> sll \$a0,\$a0,0x8 +0+0058 <[^>]*> or \$a0,\$a0,\$at +0+005c <[^>]*> lui \$at,0x1 +0+0060 <[^>]*> ori \$at,\$at,0xa5a5 +0+0064 <[^>]*> sb \$a0,[01]\(\$at\) +0+0068 <[^>]*> srl \$a0,\$a0,0x8 +0+006c <[^>]*> sb \$a0,[01]\(\$at\) +0+0070 <[^>]*> lbu \$at,[01]\(\$at\) +0+0074 <[^>]*> sll \$a0,\$a0,0x8 +0+0078 <[^>]*> or \$a0,\$a0,\$at +0+007c <[^>]*> sb \$a0,[01]\(\$a1\) +0+0080 <[^>]*> srl \$at,\$a0,0x8 +0+0084 <[^>]*> sb \$at,[01]\(\$a1\) +0+0088 <[^>]*> sb \$a0,[12]\(\$a1\) +0+008c <[^>]*> srl \$at,\$a0,0x8 +0+0090 <[^>]*> sb \$at,[12]\(\$a1\) +0+0094 <[^>]*> lui \$at,[-0-9x]+ +[ ]*94: [A-Z0-9_]*HI[A-Z0-9_]* .data.* +0+0098 <[^>]*> addiu \$at,\$at,[-0-9]+ +[ ]*98: [A-Z0-9_]*LO[A-Z0-9_]* .data.* +0+009c <[^>]*> sb \$a0,[01]\(\$at\) +0+00a0 <[^>]*> srl \$a0,\$a0,0x8 +0+00a4 <[^>]*> sb \$a0,[01]\(\$at\) +0+00a8 <[^>]*> lbu \$at,[01]\(\$at\) +0+00ac <[^>]*> sll \$a0,\$a0,0x8 +0+00b0 <[^>]*> or \$a0,\$a0,\$at +0+00b4 <[^>]*> lui \$at,0x0 +[ ]*b4: [A-Z0-9_]*HI[A-Z0-9_]* big_external_data_label +0+00b8 <[^>]*> addiu \$at,\$at,[-0-9]+ +[ ]*b8: [A-Z0-9_]*LO[A-Z0-9_]* big_external_data_label +0+00bc <[^>]*> sb \$a0,[01]\(\$at\) +0+00c0 <[^>]*> srl \$a0,\$a0,0x8 +0+00c4 <[^>]*> sb \$a0,[01]\(\$at\) +0+00c8 <[^>]*> lbu \$at,[01]\(\$at\) +0+00cc <[^>]*> sll \$a0,\$a0,0x8 +0+00d0 <[^>]*> or \$a0,\$a0,\$at +0+00d4 <[^>]*> addiu \$at,\$gp,0 +[ ]*d4: [A-Z0-9_]*GPREL[A-Z0-9_]* small_external_data_label +0+00d8 <[^>]*> sb \$a0,[01]\(\$at\) +0+00dc <[^>]*> srl \$a0,\$a0,0x8 +0+00e0 <[^>]*> sb \$a0,[01]\(\$at\) +0+00e4 <[^>]*> lbu \$at,[01]\(\$at\) +0+00e8 <[^>]*> sll \$a0,\$a0,0x8 +0+00ec <[^>]*> or \$a0,\$a0,\$at +0+00f0 <[^>]*> lui \$at,[-0-9x]+ +[ ]*f0: [A-Z0-9_]*HI[A-Z0-9_]* big_external_common +0+00f4 <[^>]*> addiu \$at,\$at,[-0-9]+ +[ ]*f4: [A-Z0-9_]*LO[A-Z0-9_]* big_external_common +0+00f8 <[^>]*> sb \$a0,[01]\(\$at\) +0+00fc <[^>]*> srl \$a0,\$a0,0x8 +0+0100 <[^>]*> sb \$a0,[01]\(\$at\) +0+0104 <[^>]*> lbu \$at,[01]\(\$at\) +0+0108 <[^>]*> sll \$a0,\$a0,0x8 +0+010c <[^>]*> or \$a0,\$a0,\$at +0+0110 <[^>]*> addiu \$at,\$gp,0 +[ ]*110: [A-Z0-9_]*GPREL[A-Z0-9_]* small_external_common +0+0114 <[^>]*> sb \$a0,[01]\(\$at\) +0+0118 <[^>]*> srl \$a0,\$a0,0x8 +0+011c <[^>]*> sb \$a0,[01]\(\$at\) +0+0120 <[^>]*> lbu \$at,[01]\(\$at\) +0+0124 <[^>]*> sll \$a0,\$a0,0x8 +0+0128 <[^>]*> or \$a0,\$a0,\$at +0+012c <[^>]*> lui \$at,[-0-9x]+ +[ ]*12c: [A-Z0-9_]*HI[A-Z0-9_]* .bss.* +0+0130 <[^>]*> addiu \$at,\$at,[-0-9]+ +[ ]*130: [A-Z0-9_]*LO[A-Z0-9_]* .bss.* +0+0134 <[^>]*> sb \$a0,[01]\(\$at\) +0+0138 <[^>]*> srl \$a0,\$a0,0x8 +0+013c <[^>]*> sb \$a0,[01]\(\$at\) +0+0140 <[^>]*> lbu \$at,[01]\(\$at\) +0+0144 <[^>]*> sll \$a0,\$a0,0x8 +0+0148 <[^>]*> or \$a0,\$a0,\$at +0+014c <[^>]*> addiu \$at,\$gp,[-0-9]+ +[ ]*14c: [A-Z0-9_]*GPREL[A-Z0-9_]* .sbss.* +0+0150 <[^>]*> sb \$a0,[01]\(\$at\) +0+0154 <[^>]*> srl \$a0,\$a0,0x8 +0+0158 <[^>]*> sb \$a0,[01]\(\$at\) +0+015c <[^>]*> lbu \$at,[01]\(\$at\) +0+0160 <[^>]*> sll \$a0,\$a0,0x8 +0+0164 <[^>]*> or \$a0,\$a0,\$at +0+0168 <[^>]*> lui \$at,0x0 +[ ]*168: [A-Z0-9_]*HI[A-Z0-9_]* .data.* +0+016c <[^>]*> addiu \$at,\$at,[-0-9]+ +[ ]*16c: [A-Z0-9_]*LO[A-Z0-9_]* .data.* +0+0170 <[^>]*> sb \$a0,[01]\(\$at\) +0+0174 <[^>]*> srl \$a0,\$a0,0x8 +0+0178 <[^>]*> sb \$a0,[01]\(\$at\) +0+017c <[^>]*> lbu \$at,[01]\(\$at\) +0+0180 <[^>]*> sll \$a0,\$a0,0x8 +0+0184 <[^>]*> or \$a0,\$a0,\$at +0+0188 <[^>]*> lui \$at,0x0 +[ ]*188: [A-Z0-9_]*HI[A-Z0-9_]* big_external_data_label +0+018c <[^>]*> addiu \$at,\$at,[-0-9]+ +[ ]*18c: [A-Z0-9_]*LO[A-Z0-9_]* big_external_data_label +0+0190 <[^>]*> sb \$a0,[01]\(\$at\) +0+0194 <[^>]*> srl \$a0,\$a0,0x8 +0+0198 <[^>]*> sb \$a0,[01]\(\$at\) +0+019c <[^>]*> lbu \$at,[01]\(\$at\) +0+01a0 <[^>]*> sll \$a0,\$a0,0x8 +0+01a4 <[^>]*> or \$a0,\$a0,\$at +0+01a8 <[^>]*> addiu \$at,\$gp,1 +[ ]*1a8: [A-Z0-9_]*GPREL[A-Z0-9_]* small_external_data_label +0+01ac <[^>]*> sb \$a0,[01]\(\$at\) +0+01b0 <[^>]*> srl \$a0,\$a0,0x8 +0+01b4 <[^>]*> sb \$a0,[01]\(\$at\) +0+01b8 <[^>]*> lbu \$at,[01]\(\$at\) +0+01bc <[^>]*> sll \$a0,\$a0,0x8 +0+01c0 <[^>]*> or \$a0,\$a0,\$at +0+01c4 <[^>]*> lui \$at,0x0 +[ ]*1c4: [A-Z0-9_]*HI[A-Z0-9_]* big_external_common +0+01c8 <[^>]*> addiu \$at,\$at,[-0-9]+ +[ ]*1c8: [A-Z0-9_]*LO[A-Z0-9_]* big_external_common +0+01cc <[^>]*> sb \$a0,[01]\(\$at\) +0+01d0 <[^>]*> srl \$a0,\$a0,0x8 +0+01d4 <[^>]*> sb \$a0,[01]\(\$at\) +0+01d8 <[^>]*> lbu \$at,[01]\(\$at\) +0+01dc <[^>]*> sll \$a0,\$a0,0x8 +0+01e0 <[^>]*> or \$a0,\$a0,\$at +0+01e4 <[^>]*> addiu \$at,\$gp,1 +[ ]*1e4: [A-Z0-9_]*GPREL[A-Z0-9_]* small_external_common +0+01e8 <[^>]*> sb \$a0,[01]\(\$at\) +0+01ec <[^>]*> srl \$a0,\$a0,0x8 +0+01f0 <[^>]*> sb \$a0,[01]\(\$at\) +0+01f4 <[^>]*> lbu \$at,[01]\(\$at\) +0+01f8 <[^>]*> sll \$a0,\$a0,0x8 +0+01fc <[^>]*> or \$a0,\$a0,\$at +0+0200 <[^>]*> lui \$at,0x0 +[ ]*200: [A-Z0-9_]*HI[A-Z0-9_]* .bss.* +0+0204 <[^>]*> addiu \$at,\$at,[-0-9]+ +[ ]*204: [A-Z0-9_]*LO[A-Z0-9_]* .bss.* +0+0208 <[^>]*> sb \$a0,[01]\(\$at\) +0+020c <[^>]*> srl \$a0,\$a0,0x8 +0+0210 <[^>]*> sb \$a0,[01]\(\$at\) +0+0214 <[^>]*> lbu \$at,[01]\(\$at\) +0+0218 <[^>]*> sll \$a0,\$a0,0x8 +0+021c <[^>]*> or \$a0,\$a0,\$at +0+0220 <[^>]*> addiu \$at,\$gp,[-0-9]+ +[ ]*220: [A-Z0-9_]*GPREL[A-Z0-9_]* .sbss.* +0+0224 <[^>]*> sb \$a0,[01]\(\$at\) +0+0228 <[^>]*> srl \$a0,\$a0,0x8 +0+022c <[^>]*> sb \$a0,[01]\(\$at\) +0+0230 <[^>]*> lbu \$at,[01]\(\$at\) +0+0234 <[^>]*> sll \$a0,\$a0,0x8 +0+0238 <[^>]*> or \$a0,\$a0,\$at +0+023c <[^>]*> lui \$at,[-0-9x]+ +[ ]*23c: [A-Z0-9_]*HI[A-Z0-9_]* .data.* +0+0240 <[^>]*> addiu \$at,\$at,[-0-9]+ +[ ]*240: [A-Z0-9_]*LO[A-Z0-9_]* .data.* +0+0244 <[^>]*> sb \$a0,[01]\(\$at\) +0+0248 <[^>]*> srl \$a0,\$a0,0x8 +0+024c <[^>]*> sb \$a0,[01]\(\$at\) +0+0250 <[^>]*> lbu \$at,[01]\(\$at\) +0+0254 <[^>]*> sll \$a0,\$a0,0x8 +0+0258 <[^>]*> or \$a0,\$a0,\$at +0+025c <[^>]*> lui \$at,[-0-9x]+ +[ ]*25c: [A-Z0-9_]*HI[A-Z0-9_]* big_external_data_label +0+0260 <[^>]*> addiu \$at,\$at,[-0-9]+ +[ ]*260: [A-Z0-9_]*LO[A-Z0-9_]* big_external_data_label +0+0264 <[^>]*> sb \$a0,[01]\(\$at\) +0+0268 <[^>]*> srl \$a0,\$a0,0x8 +0+026c <[^>]*> sb \$a0,[01]\(\$at\) +0+0270 <[^>]*> lbu \$at,[01]\(\$at\) +0+0274 <[^>]*> sll \$a0,\$a0,0x8 +0+0278 <[^>]*> or \$a0,\$a0,\$at +0+027c <[^>]*> lui \$at,[-0-9x]+ +[ ]*27c: [A-Z0-9_]*HI[A-Z0-9_]* small_external_data_label +0+0280 <[^>]*> addiu \$at,\$at,[-0-9]+ +[ ]*280: [A-Z0-9_]*LO[A-Z0-9_]* small_external_data_label +0+0284 <[^>]*> sb \$a0,[01]\(\$at\) +0+0288 <[^>]*> srl \$a0,\$a0,0x8 +0+028c <[^>]*> sb \$a0,[01]\(\$at\) +0+0290 <[^>]*> lbu \$at,[01]\(\$at\) +0+0294 <[^>]*> sll \$a0,\$a0,0x8 +0+0298 <[^>]*> or \$a0,\$a0,\$at +0+029c <[^>]*> lui \$at,[-0-9x]+ +[ ]*29c: [A-Z0-9_]*HI[A-Z0-9_]* big_external_common +0+02a0 <[^>]*> addiu \$at,\$at,[-0-9]+ +[ ]*2a0: [A-Z0-9_]*LO[A-Z0-9_]* big_external_common +0+02a4 <[^>]*> sb \$a0,[01]\(\$at\) +0+02a8 <[^>]*> srl \$a0,\$a0,0x8 +0+02ac <[^>]*> sb \$a0,[01]\(\$at\) +0+02b0 <[^>]*> lbu \$at,[01]\(\$at\) +0+02b4 <[^>]*> sll \$a0,\$a0,0x8 +0+02b8 <[^>]*> or \$a0,\$a0,\$at +0+02bc <[^>]*> lui \$at,[-0-9x]+ +[ ]*2bc: [A-Z0-9_]*HI[A-Z0-9_]* small_external_common +0+02c0 <[^>]*> addiu \$at,\$at,[-0-9]+ +[ ]*2c0: [A-Z0-9_]*LO[A-Z0-9_]* small_external_common +0+02c4 <[^>]*> sb \$a0,[01]\(\$at\) +0+02c8 <[^>]*> srl \$a0,\$a0,0x8 +0+02cc <[^>]*> sb \$a0,[01]\(\$at\) +0+02d0 <[^>]*> lbu \$at,[01]\(\$at\) +0+02d4 <[^>]*> sll \$a0,\$a0,0x8 +0+02d8 <[^>]*> or \$a0,\$a0,\$at +0+02dc <[^>]*> lui \$at,[-0-9x]+ +[ ]*2dc: [A-Z0-9_]*HI[A-Z0-9_]* .bss.* +0+02e0 <[^>]*> addiu \$at,\$at,[-0-9]+ +[ ]*2e0: [A-Z0-9_]*LO[A-Z0-9_]* .bss.* +0+02e4 <[^>]*> sb \$a0,[01]\(\$at\) +0+02e8 <[^>]*> srl \$a0,\$a0,0x8 +0+02ec <[^>]*> sb \$a0,[01]\(\$at\) +0+02f0 <[^>]*> lbu \$at,[01]\(\$at\) +0+02f4 <[^>]*> sll \$a0,\$a0,0x8 +0+02f8 <[^>]*> or \$a0,\$a0,\$at +0+02fc <[^>]*> lui \$at,[-0-9x]+ +[ ]*2fc: [A-Z0-9_]*HI[A-Z0-9_]* .sbss.* +0+0300 <[^>]*> addiu \$at,\$at,[-0-9]+ +[ ]*300: [A-Z0-9_]*LO[A-Z0-9_]* .sbss.* +0+0304 <[^>]*> sb \$a0,[01]\(\$at\) +0+0308 <[^>]*> srl \$a0,\$a0,0x8 +0+030c <[^>]*> sb \$a0,[01]\(\$at\) +0+0310 <[^>]*> lbu \$at,[01]\(\$at\) +0+0314 <[^>]*> sll \$a0,\$a0,0x8 +0+0318 <[^>]*> or \$a0,\$a0,\$at +0+031c <[^>]*> lui \$at,0x0 +[ ]*31c: [A-Z0-9_]*HI[A-Z0-9_]* .data.* +0+0320 <[^>]*> addiu \$at,\$at,[-0-9]+ +[ ]*320: [A-Z0-9_]*LO[A-Z0-9_]* .data.* +0+0324 <[^>]*> sb \$a0,[01]\(\$at\) +0+0328 <[^>]*> srl \$a0,\$a0,0x8 +0+032c <[^>]*> sb \$a0,[01]\(\$at\) +0+0330 <[^>]*> lbu \$at,[01]\(\$at\) +0+0334 <[^>]*> sll \$a0,\$a0,0x8 +0+0338 <[^>]*> or \$a0,\$a0,\$at +0+033c <[^>]*> lui \$at,0x0 +[ ]*33c: [A-Z0-9_]*HI[A-Z0-9_]* big_external_data_label +0+0340 <[^>]*> addiu \$at,\$at,[-0-9]+ +[ ]*340: [A-Z0-9_]*LO[A-Z0-9_]* big_external_data_label +0+0344 <[^>]*> sb \$a0,[01]\(\$at\) +0+0348 <[^>]*> srl \$a0,\$a0,0x8 +0+034c <[^>]*> sb \$a0,[01]\(\$at\) +0+0350 <[^>]*> lbu \$at,[01]\(\$at\) +0+0354 <[^>]*> sll \$a0,\$a0,0x8 +0+0358 <[^>]*> or \$a0,\$a0,\$at +0+035c <[^>]*> lui \$at,0x0 +[ ]*35c: [A-Z0-9_]*HI[A-Z0-9_]* small_external_data_label +0+0360 <[^>]*> addiu \$at,\$at,[-0-9]+ +[ ]*360: [A-Z0-9_]*LO[A-Z0-9_]* small_external_data_label +0+0364 <[^>]*> sb \$a0,[01]\(\$at\) +0+0368 <[^>]*> srl \$a0,\$a0,0x8 +0+036c <[^>]*> sb \$a0,[01]\(\$at\) +0+0370 <[^>]*> lbu \$at,[01]\(\$at\) +0+0374 <[^>]*> sll \$a0,\$a0,0x8 +0+0378 <[^>]*> or \$a0,\$a0,\$at +0+037c <[^>]*> lui \$at,0x0 +[ ]*37c: [A-Z0-9_]*HI[A-Z0-9_]* big_external_common +0+0380 <[^>]*> addiu \$at,\$at,[-0-9]+ +[ ]*380: [A-Z0-9_]*LO[A-Z0-9_]* big_external_common +0+0384 <[^>]*> sb \$a0,[01]\(\$at\) +0+0388 <[^>]*> srl \$a0,\$a0,0x8 +0+038c <[^>]*> sb \$a0,[01]\(\$at\) +0+0390 <[^>]*> lbu \$at,[01]\(\$at\) +0+0394 <[^>]*> sll \$a0,\$a0,0x8 +0+0398 <[^>]*> or \$a0,\$a0,\$at +0+039c <[^>]*> lui \$at,0x0 +[ ]*39c: [A-Z0-9_]*HI[A-Z0-9_]* small_external_common +0+03a0 <[^>]*> addiu \$at,\$at,[-0-9]+ +[ ]*3a0: [A-Z0-9_]*LO[A-Z0-9_]* small_external_common +0+03a4 <[^>]*> sb \$a0,[01]\(\$at\) +0+03a8 <[^>]*> srl \$a0,\$a0,0x8 +0+03ac <[^>]*> sb \$a0,[01]\(\$at\) +0+03b0 <[^>]*> lbu \$at,[01]\(\$at\) +0+03b4 <[^>]*> sll \$a0,\$a0,0x8 +0+03b8 <[^>]*> or \$a0,\$a0,\$at +0+03bc <[^>]*> lui \$at,0x0 +[ ]*3bc: [A-Z0-9_]*HI[A-Z0-9_]* .bss.* +0+03c0 <[^>]*> addiu \$at,\$at,[-0-9]+ +[ ]*3c0: [A-Z0-9_]*LO[A-Z0-9_]* .bss.* +0+03c4 <[^>]*> sb \$a0,[01]\(\$at\) +0+03c8 <[^>]*> srl \$a0,\$a0,0x8 +0+03cc <[^>]*> sb \$a0,[01]\(\$at\) +0+03d0 <[^>]*> lbu \$at,[01]\(\$at\) +0+03d4 <[^>]*> sll \$a0,\$a0,0x8 +0+03d8 <[^>]*> or \$a0,\$a0,\$at +0+03dc <[^>]*> lui \$at,0x0 +[ ]*3dc: [A-Z0-9_]*HI[A-Z0-9_]* .sbss.* +0+03e0 <[^>]*> addiu \$at,\$at,[-0-9]+ +[ ]*3e0: [A-Z0-9_]*LO[A-Z0-9_]* .sbss.* +0+03e4 <[^>]*> sb \$a0,[01]\(\$at\) +0+03e8 <[^>]*> srl \$a0,\$a0,0x8 +0+03ec <[^>]*> sb \$a0,[01]\(\$at\) +0+03f0 <[^>]*> lbu \$at,[01]\(\$at\) +0+03f4 <[^>]*> sll \$a0,\$a0,0x8 +0+03f8 <[^>]*> or \$a0,\$a0,\$at +0+03fc <[^>]*> lui \$at,[-0-9x]+ +[ ]*3fc: [A-Z0-9_]*HI[A-Z0-9_]* .data.* +0+0400 <[^>]*> addiu \$at,\$at,[-0-9]+ +[ ]*400: [A-Z0-9_]*LO[A-Z0-9_]* .data.* +0+0404 <[^>]*> sb \$a0,[01]\(\$at\) +0+0408 <[^>]*> srl \$a0,\$a0,0x8 +0+040c <[^>]*> sb \$a0,[01]\(\$at\) +0+0410 <[^>]*> lbu \$at,[01]\(\$at\) +0+0414 <[^>]*> sll \$a0,\$a0,0x8 +0+0418 <[^>]*> or \$a0,\$a0,\$at +0+041c <[^>]*> lui \$at,[-0-9x]+ +[ ]*41c: [A-Z0-9_]*HI[A-Z0-9_]* big_external_data_label +0+0420 <[^>]*> addiu \$at,\$at,0 +[ ]*420: [A-Z0-9_]*LO[A-Z0-9_]* big_external_data_label +0+0424 <[^>]*> sb \$a0,[01]\(\$at\) +0+0428 <[^>]*> srl \$a0,\$a0,0x8 +0+042c <[^>]*> sb \$a0,[01]\(\$at\) +0+0430 <[^>]*> lbu \$at,[01]\(\$at\) +0+0434 <[^>]*> sll \$a0,\$a0,0x8 +0+0438 <[^>]*> or \$a0,\$a0,\$at +0+043c <[^>]*> lui \$at,[-0-9x]+ +[ ]*43c: [A-Z0-9_]*HI[A-Z0-9_]* small_external_data_label +0+0440 <[^>]*> addiu \$at,\$at,0 +[ ]*440: [A-Z0-9_]*LO[A-Z0-9_]* small_external_data_label +0+0444 <[^>]*> sb \$a0,[01]\(\$at\) +0+0448 <[^>]*> srl \$a0,\$a0,0x8 +0+044c <[^>]*> sb \$a0,[01]\(\$at\) +0+0450 <[^>]*> lbu \$at,[01]\(\$at\) +0+0454 <[^>]*> sll \$a0,\$a0,0x8 +0+0458 <[^>]*> or \$a0,\$a0,\$at +0+045c <[^>]*> lui \$at,[-0-9x]+ +[ ]*45c: [A-Z0-9_]*HI[A-Z0-9_]* big_external_common +0+0460 <[^>]*> addiu \$at,\$at,0 +[ ]*460: [A-Z0-9_]*LO[A-Z0-9_]* big_external_common +0+0464 <[^>]*> sb \$a0,[01]\(\$at\) +0+0468 <[^>]*> srl \$a0,\$a0,0x8 +0+046c <[^>]*> sb \$a0,[01]\(\$at\) +0+0470 <[^>]*> lbu \$at,[01]\(\$at\) +0+0474 <[^>]*> sll \$a0,\$a0,0x8 +0+0478 <[^>]*> or \$a0,\$a0,\$at +0+047c <[^>]*> lui \$at,[-0-9x]+ +[ ]*47c: [A-Z0-9_]*HI[A-Z0-9_]* small_external_common +0+0480 <[^>]*> addiu \$at,\$at,0 +[ ]*480: [A-Z0-9_]*LO[A-Z0-9_]* small_external_common +0+0484 <[^>]*> sb \$a0,[01]\(\$at\) +0+0488 <[^>]*> srl \$a0,\$a0,0x8 +0+048c <[^>]*> sb \$a0,[01]\(\$at\) +0+0490 <[^>]*> lbu \$at,[01]\(\$at\) +0+0494 <[^>]*> sll \$a0,\$a0,0x8 +0+0498 <[^>]*> or \$a0,\$a0,\$at +0+049c <[^>]*> lui \$at,[-0-9x]+ +[ ]*49c: [A-Z0-9_]*HI[A-Z0-9_]* .bss.* +0+04a0 <[^>]*> addiu \$at,\$at,[-0-9]+ +[ ]*4a0: [A-Z0-9_]*LO[A-Z0-9_]* .bss.* +0+04a4 <[^>]*> sb \$a0,[01]\(\$at\) +0+04a8 <[^>]*> srl \$a0,\$a0,0x8 +0+04ac <[^>]*> sb \$a0,[01]\(\$at\) +0+04b0 <[^>]*> lbu \$at,[01]\(\$at\) +0+04b4 <[^>]*> sll \$a0,\$a0,0x8 +0+04b8 <[^>]*> or \$a0,\$a0,\$at +0+04bc <[^>]*> lui \$at,[-0-9x]+ +[ ]*4bc: [A-Z0-9_]*HI[A-Z0-9_]* .sbss.* +0+04c0 <[^>]*> addiu \$at,\$at,[-0-9]+ +[ ]*4c0: [A-Z0-9_]*LO[A-Z0-9_]* .sbss.* +0+04c4 <[^>]*> sb \$a0,[01]\(\$at\) +0+04c8 <[^>]*> srl \$a0,\$a0,0x8 +0+04cc <[^>]*> sb \$a0,[01]\(\$at\) +0+04d0 <[^>]*> lbu \$at,[01]\(\$at\) +0+04d4 <[^>]*> sll \$a0,\$a0,0x8 +0+04d8 <[^>]*> or \$a0,\$a0,\$at +0+04dc <[^>]*> lui \$at,[-0-9x]+ +[ ]*4dc: [A-Z0-9_]*HI[A-Z0-9_]* .data.* +0+04e0 <[^>]*> addiu \$at,\$at,[-0-9]+ +[ ]*4e0: [A-Z0-9_]*LO[A-Z0-9_]* .data.* +0+04e4 <[^>]*> sb \$a0,[01]\(\$at\) +0+04e8 <[^>]*> srl \$a0,\$a0,0x8 +0+04ec <[^>]*> sb \$a0,[01]\(\$at\) +0+04f0 <[^>]*> lbu \$at,[01]\(\$at\) +0+04f4 <[^>]*> sll \$a0,\$a0,0x8 +0+04f8 <[^>]*> or \$a0,\$a0,\$at +0+04fc <[^>]*> lui \$at,[-0-9x]+ +[ ]*4fc: [A-Z0-9_]*HI[A-Z0-9_]* big_external_data_label +0+0500 <[^>]*> addiu \$at,\$at,[-0-9]+ +[ ]*500: [A-Z0-9_]*LO[A-Z0-9_]* big_external_data_label +0+0504 <[^>]*> sb \$a0,[01]\(\$at\) +0+0508 <[^>]*> srl \$a0,\$a0,0x8 +0+050c <[^>]*> sb \$a0,[01]\(\$at\) +0+0510 <[^>]*> lbu \$at,[01]\(\$at\) +0+0514 <[^>]*> sll \$a0,\$a0,0x8 +0+0518 <[^>]*> or \$a0,\$a0,\$at +0+051c <[^>]*> lui \$at,[-0-9x]+ +[ ]*51c: [A-Z0-9_]*HI[A-Z0-9_]* small_external_data_label +0+0520 <[^>]*> addiu \$at,\$at,[-0-9]+ +[ ]*520: [A-Z0-9_]*LO[A-Z0-9_]* small_external_data_label +0+0524 <[^>]*> sb \$a0,[01]\(\$at\) +0+0528 <[^>]*> srl \$a0,\$a0,0x8 +0+052c <[^>]*> sb \$a0,[01]\(\$at\) +0+0530 <[^>]*> lbu \$at,[01]\(\$at\) +0+0534 <[^>]*> sll \$a0,\$a0,0x8 +0+0538 <[^>]*> or \$a0,\$a0,\$at +0+053c <[^>]*> lui \$at,[-0-9x]+ +[ ]*53c: [A-Z0-9_]*HI[A-Z0-9_]* big_external_common +0+0540 <[^>]*> addiu \$at,\$at,[-0-9]+ +[ ]*540: [A-Z0-9_]*LO[A-Z0-9_]* big_external_common +0+0544 <[^>]*> sb \$a0,[01]\(\$at\) +0+0548 <[^>]*> srl \$a0,\$a0,0x8 +0+054c <[^>]*> sb \$a0,[01]\(\$at\) +0+0550 <[^>]*> lbu \$at,[01]\(\$at\) +0+0554 <[^>]*> sll \$a0,\$a0,0x8 +0+0558 <[^>]*> or \$a0,\$a0,\$at +0+055c <[^>]*> lui \$at,[-0-9x]+ +[ ]*55c: [A-Z0-9_]*HI[A-Z0-9_]* small_external_common +0+0560 <[^>]*> addiu \$at,\$at,[-0-9]+ +[ ]*560: [A-Z0-9_]*LO[A-Z0-9_]* small_external_common +0+0564 <[^>]*> sb \$a0,[01]\(\$at\) +0+0568 <[^>]*> srl \$a0,\$a0,0x8 +0+056c <[^>]*> sb \$a0,[01]\(\$at\) +0+0570 <[^>]*> lbu \$at,[01]\(\$at\) +0+0574 <[^>]*> sll \$a0,\$a0,0x8 +0+0578 <[^>]*> or \$a0,\$a0,\$at +0+057c <[^>]*> lui \$at,[-0-9x]+ +[ ]*57c: [A-Z0-9_]*HI[A-Z0-9_]* .bss.* +0+0580 <[^>]*> addiu \$at,\$at,[-0-9]+ +[ ]*580: [A-Z0-9_]*LO[A-Z0-9_]* .bss.* +0+0584 <[^>]*> sb \$a0,[01]\(\$at\) +0+0588 <[^>]*> srl \$a0,\$a0,0x8 +0+058c <[^>]*> sb \$a0,[01]\(\$at\) +0+0590 <[^>]*> lbu \$at,[01]\(\$at\) +0+0594 <[^>]*> sll \$a0,\$a0,0x8 +0+0598 <[^>]*> or \$a0,\$a0,\$at +0+059c <[^>]*> lui \$at,[-0-9x]+ +[ ]*59c: [A-Z0-9_]*HI[A-Z0-9_]* .sbss.* +0+05a0 <[^>]*> addiu \$at,\$at,[-0-9]+ +[ ]*5a0: [A-Z0-9_]*LO[A-Z0-9_]* .sbss.* +0+05a4 <[^>]*> sb \$a0,[01]\(\$at\) +0+05a8 <[^>]*> srl \$a0,\$a0,0x8 +0+05ac <[^>]*> sb \$a0,[01]\(\$at\) +0+05b0 <[^>]*> lbu \$at,[01]\(\$at\) +0+05b4 <[^>]*> sll \$a0,\$a0,0x8 +0+05b8 <[^>]*> or \$a0,\$a0,\$at +0+05bc <[^>]*> nop diff --git a/gas/testsuite/gas/mips/ush.s b/gas/testsuite/gas/mips/ush.s new file mode 100644 index 0000000..c155814 --- /dev/null +++ b/gas/testsuite/gas/mips/ush.s @@ -0,0 +1,65 @@ +# Source file used to test the ush macro. + + .data +data_label: + .extern big_external_data_label,1000 + .extern small_external_data_label,1 + .comm big_external_common,1000 + .comm small_external_common,1 + .lcomm big_local_common,1000 + .lcomm small_local_common,1 + + .text + ush $4,0 + ush $4,1 + ush $4,0x8000 + ush $4,-0x8000 + ush $4,0x10000 + ush $4,0x1a5a5 + ush $4,0($5) + ush $4,1($5) + ush $4,data_label + ush $4,big_external_data_label + ush $4,small_external_data_label + ush $4,big_external_common + ush $4,small_external_common + ush $4,big_local_common + ush $4,small_local_common + ush $4,data_label+1 + ush $4,big_external_data_label+1 + ush $4,small_external_data_label+1 + ush $4,big_external_common+1 + ush $4,small_external_common+1 + ush $4,big_local_common+1 + ush $4,small_local_common+1 + ush $4,data_label+0x8000 + ush $4,big_external_data_label+0x8000 + ush $4,small_external_data_label+0x8000 + ush $4,big_external_common+0x8000 + ush $4,small_external_common+0x8000 + ush $4,big_local_common+0x8000 + ush $4,small_local_common+0x8000 + ush $4,data_label-0x8000 + ush $4,big_external_data_label-0x8000 + ush $4,small_external_data_label-0x8000 + ush $4,big_external_common-0x8000 + ush $4,small_external_common-0x8000 + ush $4,big_local_common-0x8000 + ush $4,small_local_common-0x8000 + ush $4,data_label+0x10000 + ush $4,big_external_data_label+0x10000 + ush $4,small_external_data_label+0x10000 + ush $4,big_external_common+0x10000 + ush $4,small_external_common+0x10000 + ush $4,big_local_common+0x10000 + ush $4,small_local_common+0x10000 + ush $4,data_label+0x1a5a5 + ush $4,big_external_data_label+0x1a5a5 + ush $4,small_external_data_label+0x1a5a5 + ush $4,big_external_common+0x1a5a5 + ush $4,small_external_common+0x1a5a5 + ush $4,big_local_common+0x1a5a5 + ush $4,small_local_common+0x1a5a5 + +# Round to a 16 byte boundary, for ease in testing multiple targets. + nop diff --git a/gas/testsuite/gas/mips/usw.d b/gas/testsuite/gas/mips/usw.d new file mode 100644 index 0000000..59d28cc --- /dev/null +++ b/gas/testsuite/gas/mips/usw.d @@ -0,0 +1,270 @@ +#objdump: -dr --prefix-addresses -mmips:3000 +#name: MIPS usw +#as: -mips1 + +# Test the usw macro. + +.*: +file format .*mips.* + +Disassembly of section .text: +0+0000 <[^>]*> swl \$a0,[03]\(\$zero\) +0+0004 <[^>]*> swr \$a0,[03]\(\$zero\) +0+0008 <[^>]*> swl \$a0,[14]\(\$zero\) +0+000c <[^>]*> swr \$a0,[14]\(\$zero\) +0+0010 <[^>]*> li \$at,0x8000 +0+0014 <[^>]*> swl \$a0,[03]\(\$at\) +0+0018 <[^>]*> swr \$a0,[03]\(\$at\) +0+001c <[^>]*> swl \$a0,-3276[58]\(\$zero\) +0+0020 <[^>]*> swr \$a0,-3276[58]\(\$zero\) +0+0024 <[^>]*> lui \$at,0x1 +0+0028 <[^>]*> swl \$a0,[03]\(\$at\) +0+002c <[^>]*> swr \$a0,[03]\(\$at\) +0+0030 <[^>]*> lui \$at,0x1 +0+0034 <[^>]*> ori \$at,\$at,0xa5a5 +0+0038 <[^>]*> swl \$a0,[03]\(\$at\) +0+003c <[^>]*> swr \$a0,[03]\(\$at\) +0+0040 <[^>]*> swl \$a0,[03]\(\$a1\) +0+0044 <[^>]*> swr \$a0,[03]\(\$a1\) +0+0048 <[^>]*> swl \$a0,[14]\(\$a1\) +0+004c <[^>]*> swr \$a0,[-0-9]+\(\$a1\) +0+0050 <[^>]*> lui \$at,[-0-9x]+ +[ ]*50: [A-Z0-9_]*HI[A-Z0-9_]* .data.* +0+0054 <[^>]*> addiu \$at,\$at,[-0-9]+ +[ ]*54: [A-Z0-9_]*LO[A-Z0-9_]* .data.* +0+0058 <[^>]*> swl \$a0,[03]\(\$at\) +0+005c <[^>]*> swr \$a0,[03]\(\$at\) +0+0060 <[^>]*> lui \$at,[-0-9x]+ +[ ]*60: [A-Z0-9_]*HI[A-Z0-9_]* big_external_data_label +0+0064 <[^>]*> addiu \$at,\$at,[-0-9]+ +[ ]*64: [A-Z0-9_]*LO[A-Z0-9_]* big_external_data_label +0+0068 <[^>]*> swl \$a0,[03]\(\$at\) +0+006c <[^>]*> swr \$a0,[03]\(\$at\) +0+0070 <[^>]*> addiu \$at,\$gp,0 +[ ]*70: [A-Z0-9_]*GPREL[A-Z0-9_]* small_external_data_label +0+0074 <[^>]*> swl \$a0,[03]\(\$at\) +0+0078 <[^>]*> swr \$a0,[03]\(\$at\) +0+007c <[^>]*> lui \$at,0x0 +[ ]*7c: [A-Z0-9_]*HI[A-Z0-9_]* big_external_common +0+0080 <[^>]*> addiu \$at,\$at,[-0-9]+ +[ ]*80: [A-Z0-9_]*LO[A-Z0-9_]* big_external_common +0+0084 <[^>]*> swl \$a0,[03]\(\$at\) +0+0088 <[^>]*> swr \$a0,[03]\(\$at\) +0+008c <[^>]*> addiu \$at,\$gp,0 +[ ]*8c: [A-Z0-9_]*GPREL[A-Z0-9_]* small_external_common +0+0090 <[^>]*> swl \$a0,[03]\(\$at\) +0+0094 <[^>]*> swr \$a0,[03]\(\$at\) +0+0098 <[^>]*> lui \$at,[-0-9x]+ +[ ]*98: [A-Z0-9_]*HI[A-Z0-9_]* .bss.* +0+009c <[^>]*> addiu \$at,\$at,[-0-9]+ +[ ]*9c: [A-Z0-9_]*LO[A-Z0-9_]* .bss.* +0+00a0 <[^>]*> swl \$a0,[03]\(\$at\) +0+00a4 <[^>]*> swr \$a0,[03]\(\$at\) +0+00a8 <[^>]*> addiu \$at,\$gp,[-0-9]+ +[ ]*a8: [A-Z0-9_]*GPREL[A-Z0-9_]* .sbss.* +0+00ac <[^>]*> swl \$a0,[03]\(\$at\) +0+00b0 <[^>]*> swr \$a0,[03]\(\$at\) +0+00b4 <[^>]*> lui \$at,0x0 +[ ]*b4: [A-Z0-9_]*HI[A-Z0-9_]* .data.* +0+00b8 <[^>]*> addiu \$at,\$at,[-0-9]+ +[ ]*b8: [A-Z0-9_]*LO[A-Z0-9_]* .data.* +0+00bc <[^>]*> swl \$a0,[03]\(\$at\) +0+00c0 <[^>]*> swr \$a0,[03]\(\$at\) +0+00c4 <[^>]*> lui \$at,0x0 +[ ]*c4: [A-Z0-9_]*HI[A-Z0-9_]* big_external_data_label +0+00c8 <[^>]*> addiu \$at,\$at,[-0-9]+ +[ ]*c8: [A-Z0-9_]*LO[A-Z0-9_]* big_external_data_label +0+00cc <[^>]*> swl \$a0,[03]\(\$at\) +0+00d0 <[^>]*> swr \$a0,[03]\(\$at\) +0+00d4 <[^>]*> addiu \$at,\$gp,1 +[ ]*d4: [A-Z0-9_]*GPREL[A-Z0-9_]* small_external_data_label +0+00d8 <[^>]*> swl \$a0,[03]\(\$at\) +0+00dc <[^>]*> swr \$a0,[03]\(\$at\) +0+00e0 <[^>]*> lui \$at,0x0 +[ ]*e0: [A-Z0-9_]*HI[A-Z0-9_]* big_external_common +0+00e4 <[^>]*> addiu \$at,\$at,[-0-9]+ +[ ]*e4: [A-Z0-9_]*LO[A-Z0-9_]* big_external_common +0+00e8 <[^>]*> swl \$a0,[03]\(\$at\) +0+00ec <[^>]*> swr \$a0,[03]\(\$at\) +0+00f0 <[^>]*> addiu \$at,\$gp,1 +[ ]*f0: [A-Z0-9_]*GPREL[A-Z0-9_]* small_external_common +0+00f4 <[^>]*> swl \$a0,[03]\(\$at\) +0+00f8 <[^>]*> swr \$a0,[03]\(\$at\) +0+00fc <[^>]*> lui \$at,0x0 +[ ]*fc: [A-Z0-9_]*HI[A-Z0-9_]* .bss.* +0+0100 <[^>]*> addiu \$at,\$at,[-0-9]+ +[ ]*100: [A-Z0-9_]*LO[A-Z0-9_]* .bss.* +0+0104 <[^>]*> swl \$a0,[03]\(\$at\) +0+0108 <[^>]*> swr \$a0,[03]\(\$at\) +0+010c <[^>]*> addiu \$at,\$gp,[-0-9]+ +[ ]*10c: [A-Z0-9_]*GPREL[A-Z0-9_]* .sbss.* +0+0110 <[^>]*> swl \$a0,[03]\(\$at\) +0+0114 <[^>]*> swr \$a0,[03]\(\$at\) +0+0118 <[^>]*> lui \$at,[-0-9x]+ +[ ]*118: [A-Z0-9_]*HI[A-Z0-9_]* .data.* +0+011c <[^>]*> addiu \$at,\$at,[-0-9]+ +[ ]*11c: [A-Z0-9_]*LO[A-Z0-9_]* .data.* +0+0120 <[^>]*> swl \$a0,[03]\(\$at\) +0+0124 <[^>]*> swr \$a0,[03]\(\$at\) +0+0128 <[^>]*> lui \$at,[-0-9x]+ +[ ]*128: [A-Z0-9_]*HI[A-Z0-9_]* big_external_data_label +0+012c <[^>]*> addiu \$at,\$at,[-0-9]+ +[ ]*12c: [A-Z0-9_]*LO[A-Z0-9_]* big_external_data_label +0+0130 <[^>]*> swl \$a0,[03]\(\$at\) +0+0134 <[^>]*> swr \$a0,[03]\(\$at\) +0+0138 <[^>]*> lui \$at,[-0-9x]+ +[ ]*138: [A-Z0-9_]*HI[A-Z0-9_]* small_external_data_label +0+013c <[^>]*> addiu \$at,\$at,[-0-9]+ +[ ]*13c: [A-Z0-9_]*LO[A-Z0-9_]* small_external_data_label +0+0140 <[^>]*> swl \$a0,[03]\(\$at\) +0+0144 <[^>]*> swr \$a0,[03]\(\$at\) +0+0148 <[^>]*> lui \$at,[-0-9x]+ +[ ]*148: [A-Z0-9_]*HI[A-Z0-9_]* big_external_common +0+014c <[^>]*> addiu \$at,\$at,[-0-9]+ +[ ]*14c: [A-Z0-9_]*LO[A-Z0-9_]* big_external_common +0+0150 <[^>]*> swl \$a0,[03]\(\$at\) +0+0154 <[^>]*> swr \$a0,[03]\(\$at\) +0+0158 <[^>]*> lui \$at,[-0-9x]+ +[ ]*158: [A-Z0-9_]*HI[A-Z0-9_]* small_external_common +0+015c <[^>]*> addiu \$at,\$at,[-0-9]+ +[ ]*15c: [A-Z0-9_]*LO[A-Z0-9_]* small_external_common +0+0160 <[^>]*> swl \$a0,[03]\(\$at\) +0+0164 <[^>]*> swr \$a0,[03]\(\$at\) +0+0168 <[^>]*> lui \$at,[-0-9x]+ +[ ]*168: [A-Z0-9_]*HI[A-Z0-9_]* .bss.* +0+016c <[^>]*> addiu \$at,\$at,[-0-9]+ +[ ]*16c: [A-Z0-9_]*LO[A-Z0-9_]* .bss.* +0+0170 <[^>]*> swl \$a0,[03]\(\$at\) +0+0174 <[^>]*> swr \$a0,[03]\(\$at\) +0+0178 <[^>]*> lui \$at,[-0-9x]+ +[ ]*178: [A-Z0-9_]*HI[A-Z0-9_]* .sbss.* +0+017c <[^>]*> addiu \$at,\$at,[-0-9]+ +[ ]*17c: [A-Z0-9_]*LO[A-Z0-9_]* .sbss.* +0+0180 <[^>]*> swl \$a0,[03]\(\$at\) +0+0184 <[^>]*> swr \$a0,[03]\(\$at\) +0+0188 <[^>]*> lui \$at,0x0 +[ ]*188: [A-Z0-9_]*HI[A-Z0-9_]* .data.* +0+018c <[^>]*> addiu \$at,\$at,[-0-9]+ +[ ]*18c: [A-Z0-9_]*LO[A-Z0-9_]* .data.* +0+0190 <[^>]*> swl \$a0,[03]\(\$at\) +0+0194 <[^>]*> swr \$a0,[03]\(\$at\) +0+0198 <[^>]*> lui \$at,0x0 +[ ]*198: [A-Z0-9_]*HI[A-Z0-9_]* big_external_data_label +0+019c <[^>]*> addiu \$at,\$at,[-0-9]+ +[ ]*19c: [A-Z0-9_]*LO[A-Z0-9_]* big_external_data_label +0+01a0 <[^>]*> swl \$a0,[03]\(\$at\) +0+01a4 <[^>]*> swr \$a0,[03]\(\$at\) +0+01a8 <[^>]*> lui \$at,0x0 +[ ]*1a8: [A-Z0-9_]*HI[A-Z0-9_]* small_external_data_label +0+01ac <[^>]*> addiu \$at,\$at,[-0-9]+ +[ ]*1ac: [A-Z0-9_]*LO[A-Z0-9_]* small_external_data_label +0+01b0 <[^>]*> swl \$a0,[03]\(\$at\) +0+01b4 <[^>]*> swr \$a0,[03]\(\$at\) +0+01b8 <[^>]*> lui \$at,0x0 +[ ]*1b8: [A-Z0-9_]*HI[A-Z0-9_]* big_external_common +0+01bc <[^>]*> addiu \$at,\$at,[-0-9]+ +[ ]*1bc: [A-Z0-9_]*LO[A-Z0-9_]* big_external_common +0+01c0 <[^>]*> swl \$a0,[03]\(\$at\) +0+01c4 <[^>]*> swr \$a0,[03]\(\$at\) +0+01c8 <[^>]*> lui \$at,0x0 +[ ]*1c8: [A-Z0-9_]*HI[A-Z0-9_]* small_external_common +0+01cc <[^>]*> addiu \$at,\$at,[-0-9]+ +[ ]*1cc: [A-Z0-9_]*LO[A-Z0-9_]* small_external_common +0+01d0 <[^>]*> swl \$a0,[03]\(\$at\) +0+01d4 <[^>]*> swr \$a0,[03]\(\$at\) +0+01d8 <[^>]*> lui \$at,0x0 +[ ]*1d8: [A-Z0-9_]*HI[A-Z0-9_]* .bss.* +0+01dc <[^>]*> addiu \$at,\$at,[-0-9]+ +[ ]*1dc: [A-Z0-9_]*LO[A-Z0-9_]* .bss.* +0+01e0 <[^>]*> swl \$a0,[03]\(\$at\) +0+01e4 <[^>]*> swr \$a0,[03]\(\$at\) +0+01e8 <[^>]*> lui \$at,0x0 +[ ]*1e8: [A-Z0-9_]*HI[A-Z0-9_]* .sbss.* +0+01ec <[^>]*> addiu \$at,\$at,[-0-9]+ +[ ]*1ec: [A-Z0-9_]*LO[A-Z0-9_]* .sbss.* +0+01f0 <[^>]*> swl \$a0,[03]\(\$at\) +0+01f4 <[^>]*> swr \$a0,[03]\(\$at\) +0+01f8 <[^>]*> lui \$at,[-0-9x]+ +[ ]*1f8: [A-Z0-9_]*HI[A-Z0-9_]* .data.* +0+01fc <[^>]*> addiu \$at,\$at,[-0-9]+ +[ ]*1fc: [A-Z0-9_]*LO[A-Z0-9_]* .data.* +0+0200 <[^>]*> swl \$a0,[03]\(\$at\) +0+0204 <[^>]*> swr \$a0,[03]\(\$at\) +0+0208 <[^>]*> lui \$at,[-0-9x]+ +[ ]*208: [A-Z0-9_]*HI[A-Z0-9_]* big_external_data_label +0+020c <[^>]*> addiu \$at,\$at,0 +[ ]*20c: [A-Z0-9_]*LO[A-Z0-9_]* big_external_data_label +0+0210 <[^>]*> swl \$a0,[03]\(\$at\) +0+0214 <[^>]*> swr \$a0,[03]\(\$at\) +0+0218 <[^>]*> lui \$at,[-0-9x]+ +[ ]*218: [A-Z0-9_]*HI[A-Z0-9_]* small_external_data_label +0+021c <[^>]*> addiu \$at,\$at,0 +[ ]*21c: [A-Z0-9_]*LO[A-Z0-9_]* small_external_data_label +0+0220 <[^>]*> swl \$a0,[03]\(\$at\) +0+0224 <[^>]*> swr \$a0,[03]\(\$at\) +0+0228 <[^>]*> lui \$at,[-0-9x]+ +[ ]*228: [A-Z0-9_]*HI[A-Z0-9_]* big_external_common +0+022c <[^>]*> addiu \$at,\$at,0 +[ ]*22c: [A-Z0-9_]*LO[A-Z0-9_]* big_external_common +0+0230 <[^>]*> swl \$a0,[03]\(\$at\) +0+0234 <[^>]*> swr \$a0,[03]\(\$at\) +0+0238 <[^>]*> lui \$at,[-0-9x]+ +[ ]*238: [A-Z0-9_]*HI[A-Z0-9_]* small_external_common +0+023c <[^>]*> addiu \$at,\$at,0 +[ ]*23c: [A-Z0-9_]*LO[A-Z0-9_]* small_external_common +0+0240 <[^>]*> swl \$a0,[03]\(\$at\) +0+0244 <[^>]*> swr \$a0,[03]\(\$at\) +0+0248 <[^>]*> lui \$at,[-0-9x]+ +[ ]*248: [A-Z0-9_]*HI[A-Z0-9_]* .bss.* +0+024c <[^>]*> addiu \$at,\$at,[-0-9]+ +[ ]*24c: [A-Z0-9_]*LO[A-Z0-9_]* .bss.* +0+0250 <[^>]*> swl \$a0,[03]\(\$at\) +0+0254 <[^>]*> swr \$a0,[03]\(\$at\) +0+0258 <[^>]*> lui \$at,[-0-9x]+ +[ ]*258: [A-Z0-9_]*HI[A-Z0-9_]* .sbss.* +0+025c <[^>]*> addiu \$at,\$at,[-0-9]+ +[ ]*25c: [A-Z0-9_]*LO[A-Z0-9_]* .sbss.* +0+0260 <[^>]*> swl \$a0,[03]\(\$at\) +0+0264 <[^>]*> swr \$a0,[03]\(\$at\) +0+0268 <[^>]*> lui \$at,[-0-9x]+ +[ ]*268: [A-Z0-9_]*HI[A-Z0-9_]* .data.* +0+026c <[^>]*> addiu \$at,\$at,[-0-9]+ +[ ]*26c: [A-Z0-9_]*LO[A-Z0-9_]* .data.* +0+0270 <[^>]*> swl \$a0,[03]\(\$at\) +0+0274 <[^>]*> swr \$a0,[03]\(\$at\) +0+0278 <[^>]*> lui \$at,[-0-9x]+ +[ ]*278: [A-Z0-9_]*HI[A-Z0-9_]* big_external_data_label +0+027c <[^>]*> addiu \$at,\$at,[-0-9]+ +[ ]*27c: [A-Z0-9_]*LO[A-Z0-9_]* big_external_data_label +0+0280 <[^>]*> swl \$a0,[03]\(\$at\) +0+0284 <[^>]*> swr \$a0,[03]\(\$at\) +0+0288 <[^>]*> lui \$at,[-0-9x]+ +[ ]*288: [A-Z0-9_]*HI[A-Z0-9_]* small_external_data_label +0+028c <[^>]*> addiu \$at,\$at,[-0-9]+ +[ ]*28c: [A-Z0-9_]*LO[A-Z0-9_]* small_external_data_label +0+0290 <[^>]*> swl \$a0,[03]\(\$at\) +0+0294 <[^>]*> swr \$a0,[03]\(\$at\) +0+0298 <[^>]*> lui \$at,[-0-9x]+ +[ ]*298: [A-Z0-9_]*HI[A-Z0-9_]* big_external_common +0+029c <[^>]*> addiu \$at,\$at,[-0-9]+ +[ ]*29c: [A-Z0-9_]*LO[A-Z0-9_]* big_external_common +0+02a0 <[^>]*> swl \$a0,[03]\(\$at\) +0+02a4 <[^>]*> swr \$a0,[03]\(\$at\) +0+02a8 <[^>]*> lui \$at,[-0-9x]+ +[ ]*2a8: [A-Z0-9_]*HI[A-Z0-9_]* small_external_common +0+02ac <[^>]*> addiu \$at,\$at,[-0-9]+ +[ ]*2ac: [A-Z0-9_]*LO[A-Z0-9_]* small_external_common +0+02b0 <[^>]*> swl \$a0,[03]\(\$at\) +0+02b4 <[^>]*> swr \$a0,[03]\(\$at\) +0+02b8 <[^>]*> lui \$at,[-0-9x]+ +[ ]*2b8: [A-Z0-9_]*HI[A-Z0-9_]* .bss.* +0+02bc <[^>]*> addiu \$at,\$at,[-0-9]+ +[ ]*2bc: [A-Z0-9_]*LO[A-Z0-9_]* .bss.* +0+02c0 <[^>]*> swl \$a0,[03]\(\$at\) +0+02c4 <[^>]*> swr \$a0,[03]\(\$at\) +0+02c8 <[^>]*> lui \$at,[-0-9x]+ +[ ]*2c8: [A-Z0-9_]*HI[A-Z0-9_]* .sbss.* +0+02cc <[^>]*> addiu \$at,\$at,[-0-9]+ +[ ]*2cc: [A-Z0-9_]*LO[A-Z0-9_]* .sbss.* +0+02d0 <[^>]*> swl \$a0,[03]\(\$at\) +0+02d4 <[^>]*> swr \$a0,[03]\(\$at\) + ... diff --git a/gas/testsuite/gas/mips/usw.s b/gas/testsuite/gas/mips/usw.s new file mode 100644 index 0000000..df1c60c --- /dev/null +++ b/gas/testsuite/gas/mips/usw.s @@ -0,0 +1,66 @@ +# Source file used to test the usw macro. + + .data +data_label: + .extern big_external_data_label,1000 + .extern small_external_data_label,1 + .comm big_external_common,1000 + .comm small_external_common,1 + .lcomm big_local_common,1000 + .lcomm small_local_common,1 + + .text + usw $4,0 + usw $4,1 + usw $4,0x8000 + usw $4,-0x8000 + usw $4,0x10000 + usw $4,0x1a5a5 + usw $4,0($5) + usw $4,1($5) + usw $4,data_label + usw $4,big_external_data_label + usw $4,small_external_data_label + usw $4,big_external_common + usw $4,small_external_common + usw $4,big_local_common + usw $4,small_local_common + usw $4,data_label+1 + usw $4,big_external_data_label+1 + usw $4,small_external_data_label+1 + usw $4,big_external_common+1 + usw $4,small_external_common+1 + usw $4,big_local_common+1 + usw $4,small_local_common+1 + usw $4,data_label+0x8000 + usw $4,big_external_data_label+0x8000 + usw $4,small_external_data_label+0x8000 + usw $4,big_external_common+0x8000 + usw $4,small_external_common+0x8000 + usw $4,big_local_common+0x8000 + usw $4,small_local_common+0x8000 + usw $4,data_label-0x8000 + usw $4,big_external_data_label-0x8000 + usw $4,small_external_data_label-0x8000 + usw $4,big_external_common-0x8000 + usw $4,small_external_common-0x8000 + usw $4,big_local_common-0x8000 + usw $4,small_local_common-0x8000 + usw $4,data_label+0x10000 + usw $4,big_external_data_label+0x10000 + usw $4,small_external_data_label+0x10000 + usw $4,big_external_common+0x10000 + usw $4,small_external_common+0x10000 + usw $4,big_local_common+0x10000 + usw $4,small_local_common+0x10000 + usw $4,data_label+0x1a5a5 + usw $4,big_external_data_label+0x1a5a5 + usw $4,small_external_data_label+0x1a5a5 + usw $4,big_external_common+0x1a5a5 + usw $4,small_external_common+0x1a5a5 + usw $4,big_local_common+0x1a5a5 + usw $4,small_local_common+0x1a5a5 + +# Round to a 16 byte boundary, for ease in testing multiple targets. + nop + nop diff --git a/gas/testsuite/gas/mn10200/add.s b/gas/testsuite/gas/mn10200/add.s new file mode 100644 index 0000000..ed251bc --- /dev/null +++ b/gas/testsuite/gas/mn10200/add.s @@ -0,0 +1,13 @@ + .text + add d1,d2 + add d2,a3 + add a2,d1 + add a3,a2 + add 16,d1 + add 256,d2 + add 131071,d3 + add 16,a1 + add 256,a2 + add 131071,a3 + addc d1,d2 + addnf 16,a2 diff --git a/gas/testsuite/gas/mn10200/basic.exp b/gas/testsuite/gas/mn10200/basic.exp new file mode 100644 index 0000000..3793eb1 --- /dev/null +++ b/gas/testsuite/gas/mn10200/basic.exp @@ -0,0 +1,836 @@ +# Copyright (C) 1996 Free Software Foundation, Inc. + +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; either version 2 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ + +# Please email any bugs, comments, and/or additions to this file to: +# DejaGnu@cygnus.com + +# Written by Cygnus Support. + +proc do_add {} { + set testname "add.s: Add operations" + set x 0 + + gas_start "add.s" "-al" + + # Instead of having a variable for each match string just increment the + # total number of matches seen. That's simpler when testing large numbers + # of instructions (as these tests to). + while 1 { + expect { + -re "^ +\[0-9\]+ 0000 96\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0001 F20B\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0003 F2C9\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0005 F24E\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0007 D510\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0009 F71A0001\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 000d F463FFFF\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +8 +01\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0012 D110\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0014 F70A0001\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0018 F467FFFF\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +11 +01\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 001d F286\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 001f F50E10\[^\n\]*\n" { set x [expr $x+1] } + -re "\[^\n\]*\n" { } + timeout { perror "timeout\n"; break } + eof { break } + } + } + + # This was intended to do any cleanup necessary. It kinda looks like it + # isn't needed, but just in case, please keep it in for now. + gas_finish + + # Did we find what we were looking for? If not, flunk it. + if [expr $x==14] then { pass $testname } else { fail $testname } +} + +proc do_bcc {} { + set testname "bcc.s: Bcc tests" + set x 0 + + gas_start "bcc.s" "-al" + + # Instead of having a variable for each match string just increment the + # total number of matches seen. That's simpler when testing large numbers + # of instructions (as these tests to). + while 1 { + expect { + -re "^ +\[0-9\]+ 0000 E800\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0002 E900\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0004 E100\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0006 E200\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0008 E300\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 000a E000\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 000c E500\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 000e E600\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0010 E700\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0012 E400\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0014 F5FC00\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0017 F5FD00\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 001a F5FE00\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 001d F5FF00\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0020 EA00\[^\n\]*\n" { set x [expr $x+1] } + -re "\[^\n\]*\n" { } + timeout { perror "timeout\n"; break } + eof { break } + } + } + + # This was intended to do any cleanup necessary. It kinda looks like it + # isn't needed, but just in case, please keep it in for now. + gas_finish + + # Did we find what we were looking for? If not, flunk it. + if [expr $x==15] then { pass $testname } else { fail $testname } +} + +proc do_bccx {} { + set testname "bccx.s: Bccx tests" + set x 0 + + gas_start "bccx.s" "-al" + + # Instead of having a variable for each match string just increment the + # total number of matches seen. That's simpler when testing large numbers + # of instructions (as these tests to). + while 1 { + expect { + -re "^ +\[0-9\]+ 0000 F5E800\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0003 F5E900\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0006 F5E100\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0009 F5E200\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 000c F5E300\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 000f F5E000\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0012 F5E500\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0015 F5E600\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0018 F5E700\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 001b F5E400\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 001e F5EC00\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0021 F5ED00\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0024 F5EE00\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0027 F5EF00\[^\n\]*\n" { set x [expr $x+1] } + -re "\[^\n\]*\n" { } + timeout { perror "timeout\n"; break } + eof { break } + } + } + + # This was intended to do any cleanup necessary. It kinda looks like it + # isn't needed, but just in case, please keep it in for now. + gas_finish + + # Did we find what we were looking for? If not, flunk it. + if [expr $x==14] then { pass $testname } else { fail $testname } +} + +proc do_bit {} { + set testname "bit.s: bit tests" + set x 0 + + gas_start "bit.s" "-al" + + # Instead of having a variable for each match string just increment the + # total number of matches seen. That's simpler when testing large numbers + # of instructions (as these tests to). + while 1 { + expect { + -re "^ +\[0-9\]+ 0000 F50540\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0003 F7060020\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0007 F029\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0009 F039\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +12 +FFFF40\[^\n\]*\n" { set x [expr $x+1] } + -re "\[^\n\]*\n" { } + timeout { perror "timeout\n"; break } + eof { break } + } + } + + # This was intended to do any cleanup necessary. It kinda looks like it + # isn't needed, but just in case, please keep it in for now. + gas_finish + + # Did we find what we were looking for? If not, flunk it. + if [expr $x==4] then { pass $testname } else { fail $testname } +} + + +proc do_cmp {} { + set testname "cmp.s: cmp tests" + set x 0 + + gas_start "cmp.s" "-al" + + # Instead of having a variable for each match string just increment the + # total number of matches seen. That's simpler when testing large numbers + # of instructions (as these tests to). + while 1 { + expect { + -re "^ +\[0-9\]+ 0000 F396\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0002 F22B\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0004 F2EF\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0006 F26E\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0008 DB10\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 000a F74A0001\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 000e F479FFFF\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +8 +01\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0013 EE0001\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0016 F47DFFFF\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +10 +01\[^\n\]*\n" { set x [expr $x+1] } + -re "\[^\n\]*\n" { } + timeout { perror "timeout\n"; break } + eof { break } + } + } + + # This was intended to do any cleanup necessary. It kinda looks like it + # isn't needed, but just in case, please keep it in for now. + gas_finish + + # Did we find what we were looking for? If not, flunk it. + if [expr $x==11] then { pass $testname } else { fail $testname } +} + +proc do_ext {} { + set testname "ext.s: ext tests" + set x 0 + + gas_start "ext.s" "-al" + + # Instead of having a variable for each match string just increment the + # total number of matches seen. That's simpler when testing large numbers + # of instructions (as these tests to). + while 1 { + expect { + -re "^ +\[0-9\]+ 0000 F3C5\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0002 B2\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0003 B7\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0004 BA\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0005 BD\[^\n\]*\n" { set x [expr $x+1] } + -re "\[^\n\]*\n" { } + timeout { perror "timeout\n"; break } + eof { break } + } + } + + # This was intended to do any cleanup necessary. It kinda looks like it + # isn't needed, but just in case, please keep it in for now. + gas_finish + + # Did we find what we were looking for? If not, flunk it. + if [expr $x==5] then { pass $testname } else { fail $testname } +} + +proc do_extend {} { + set testname "extend.s: extended instruction tests" + set x 0 + + gas_start "extend.s" "-al" + + # Instead of having a variable for each match string just increment the + # total number of matches seen. That's simpler when testing large numbers + # of instructions (as these tests to). + while 1 { + expect { + -re "^ +\[0-9\]+ 0000 F505\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0002 F6FA\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0004 F606\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0006 F90210\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0009 FB030100\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 000d FD030001\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +7 +FFFF\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0013 F616\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0015 F91610\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0018 FB170100\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 001c FD170001\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +11 +FFFF\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0022 F64B\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0024 F65E\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0026 F676\[^\n\]*\n" { set x [expr $x+1] } + -re "\[^\n\]*\n" { } + timeout { perror "timeout\n"; break } + eof { break } + } + } + + # This was intended to do any cleanup necessary. It kinda looks like it + # isn't needed, but just in case, please keep it in for now. + gas_finish + + # Did we find what we were looking for? If not, flunk it. + if [expr $x==15] then { pass $testname } else { fail $testname } +} + +proc do_logical {} { + set testname "logical.s: logical tests" + set x 0 + + gas_start "logical.s" "-al" + + # Instead of having a variable for each match string just increment the + # total number of matches seen. That's simpler when testing large numbers + # of instructions (as these tests to). + while 1 { + expect { + -re "^ +\[0-9\]+ 0000 F306\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0002 F5027F\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0005 F703FF7F\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0009 F710FF7F\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 000d F316\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 000f F50A7F\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0012 F743FF7F\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0016 F714FF7F\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 001a F326\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 001c F74FFF7F\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0020 F3E7\[^\n\]*\n" { set x [expr $x+1] } + -re "^\[^\n\]*\n" { } + timeout { perror "timeout\n"; break } + eof { break } + } + } + + # This was intended to do any cleanup necessary. It kinda looks like it + # isn't needed, but just in case, please keep it in for now. + gas_finish + + # Did we find what we were looking for? If not, flunk it. + if [expr $x==11] then { pass $testname } else { fail $testname } +} + +proc do_loop {} { + set testname "loop.s: loop tests" + set x 0 + + gas_start "loop.s" "-al" + + # Instead of having a variable for each match string just increment the + # total number of matches seen. That's simpler when testing large numbers + # of instructions (as these tests to). + while 1 { + expect { + -re "^ +\[0-9\]+ 0000 D8\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0001 D9\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0002 D1\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0003 D2\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0004 D3\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0005 D0\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0006 D5\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0007 D6\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0008 D7\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0009 D4\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 000a DA\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 000b DB\[^\n\]*\n" { set x [expr $x+1] } + -re "\[^\n\]*\n" { } + timeout { perror "timeout\n"; break } + eof { break } + } + } + + # This was intended to do any cleanup necessary. It kinda looks like it + # isn't needed, but just in case, please keep it in for now. + gas_finish + + # Did we find what we were looking for? If not, flunk it. + if [expr $x==12] then { pass $testname } else { fail $testname } +} + +proc do_mov1 {} { + set testname "mov1.s: mov1 tests" + set x 0 + + gas_start "mov1.s" "-al" + + # Instead of having a variable for each match string just increment the + # total number of matches seen. That's simpler when testing large numbers + # of instructions (as these tests to). + while 1 { + expect { + -re "^ +\[0-9\]+ 0000 F236\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0002 F2F9\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0004 86\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0005 F279\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0007 F3F3\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0009 F3D8\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 000b F3E1\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 000d F3C8\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 000f 29\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0010 6908\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0012 F7C90001\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0016 F489FFFF\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +13 +01\[^\n\]*\n" { set x [expr $x+1] } + -re "\[^\n\]*\n" { } + timeout { perror "timeout\n"; break } + eof { break } + } + } + + # This was intended to do any cleanup necessary. It kinda looks like it + # isn't needed, but just in case, please keep it in for now. + gas_finish + + # Did we find what we were looking for? If not, flunk it. + if [expr $x==13] then { pass $testname } else { fail $testname } +} + +proc do_mov2 {} { + set testname "mov2.s: mov2 tests" + set x 0 + + gas_start "mov2.s" "-al" + + # Instead of having a variable for each match string just increment the + # total number of matches seen. That's simpler when testing large numbers + # of instructions (as these tests to). + while 1 { + expect { + -re "^ +\[0-9\]+ 0000 F156\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0002 C90080\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0005 F4C1FFFF\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +4 +01\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 000a 7908\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 000c F7B90001\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0010 F4F9FFFF \[^\n\]*\n" { set x [expr $x+1] } + -re "^ +7 +01\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0015 F116\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0017 F7310080\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 001b F4D1FFFF\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +10 +01\[^\n\]*\n" { set x [expr $x+1] } + -re "\[^\n\]*\n" { } + timeout { perror "timeout\n"; break } + eof { break } + } + } + + # This was intended to do any cleanup necessary. It kinda looks like it + # isn't needed, but just in case, please keep it in for now. + gas_finish + + # Did we find what we were looking for? If not, flunk it. + if [expr $x==12] then { pass $testname } else { fail $testname } +} + +proc do_mov3 {} { + set testname "mov3.s: mov3 tests" + set x 0 + + gas_start "mov3.s" "-al" + + # Instead of having a variable for each match string just increment the + # total number of matches seen. That's simpler when testing large numbers + # of instructions (as these tests to). + while 1 { + expect { + -re "^ +\[0-9\]+ 0000 09\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0001 4920\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0003 F7890001\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0007 F409FFFF\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +5 +01\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 000c F1E9\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 000e C18000\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0011 F441FFFF\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +8 +01\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0016 5920\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0018 F7A90001\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 001c F419FFFF\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +11 +01\[^\n\]*\n" { set x [expr $x+1] } + -re "\[^\n\]*\n" { } + timeout { perror "timeout\n"; break } + eof { break } + } + } + + # This was intended to do any cleanup necessary. It kinda looks like it + # isn't needed, but just in case, please keep it in for now. + gas_finish + + # Did we find what we were looking for? If not, flunk it. + if [expr $x==13] then { pass $testname } else { fail $testname } +} + +proc do_mov4 {} { + set testname "mov4.s: mov4 tests" + set x 0 + + gas_start "mov4.s" "-al" + + # Instead of having a variable for each match string just increment the + # total number of matches seen. That's simpler when testing large numbers + # of instructions (as these tests to). + while 1 { + expect { + -re "^ +\[0-9\]+ 0000 F1A9\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0002 F7218000\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0006 F451FFFF\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +4 +01\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 000b 8508\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 000d F90001\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0010 F471FFFF\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +7 +01\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0015 DD0001\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0018 F475FFFF\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +9 +01\[^\n\]*\n" { set x [expr $x+1] } + -re "\[^\n\]*\n" { } + timeout { perror "timeout\n"; break } + eof { break } + } + } + + # This was intended to do any cleanup necessary. It kinda looks like it + # isn't needed, but just in case, please keep it in for now. + gas_finish + + # Did we find what we were looking for? If not, flunk it. + if [expr $x==11] then { pass $testname } else { fail $testname } +} + +proc do_movx {} { + set testname "movx.s: movx tests" + set x 0 + + gas_start "movx.s" "-al" + + # Instead of having a variable for each match string just increment the + # total number of matches seen. That's simpler when testing large numbers + # of instructions (as these tests to). + while 1 { + expect { + -re "^ +\[0-9\]+ 0000 F57908\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0003 F7790001\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0007 F4B9FFFF\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +4 +01\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 000c F55908\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 000f F7690001\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0013 F439FFFF\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +7 +01\[^\n\]*\n" { set x [expr $x+1] } + -re "\[^\n\]*\n" { } + timeout { perror "timeout\n"; break } + eof { break } + } + } + + # This was intended to do any cleanup necessary. It kinda looks like it + # isn't needed, but just in case, please keep it in for now. + gas_finish + + # Did we find what we were looking for? If not, flunk it. + if [expr $x==8] then { pass $testname } else { fail $testname } +} + +proc do_movb {} { + set testname "movb.s: movb tests" + set x 0 + + gas_start "movb.s" "-al" + + # Instead of having a variable for each match string just increment the + # total number of matches seen. That's simpler when testing large numbers + # of instructions (as these tests to). + while 1 { + expect { + -re "^ +\[0-9\]+ 0000 F52908\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0003 F7D90001\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0007 F4A9FFFF\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +4 +01\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 000c F06B\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 000e F4C6FFFF\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +6 +01\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0013 19\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0014 F51908\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0017 F7990001\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 001b F429FFFF\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +10 +01\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0020 F0E9\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0022 C50001\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0025 F445FFFF\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +13 +01\[^\n\]*\n" { set x [expr $x+1] } + -re "\[^\n\]*\n" { } + timeout { perror "timeout\n"; break } + eof { break } + } + } + + # This was intended to do any cleanup necessary. It kinda looks like it + # isn't needed, but just in case, please keep it in for now. + gas_finish + + # Did we find what we were looking for? If not, flunk it. + if [expr $x==16] then { pass $testname } else { fail $testname } +} + +proc do_movbu {} { + set testname "movbu.s: movbu tests" + set x 0 + + gas_start "movbu.s" "-al" + + # Instead of having a variable for each match string just increment the + # total number of matches seen. That's simpler when testing large numbers + # of instructions (as these tests to). + while 1 { + expect { + -re "^ +\[0-9\]+ 0000 39\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0001 F53908\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0004 F7590001\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0008 F499FFFF\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +5 +01\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 000d F096\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 000f CD0080\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0012 F4C9FFFF\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +8 +01\[^\n\]*\n" { set x [expr $x+1] } + -re "\[^\n\]*\n" { } + timeout { perror "timeout\n"; break } + eof { break } + } + } + + # This was intended to do any cleanup necessary. It kinda looks like it + # isn't needed, but just in case, please keep it in for now. + gas_finish + + # Did we find what we were looking for? If not, flunk it. + if [expr $x==9] then { pass $testname } else { fail $testname } +} + +proc do_movhu {} { + set testname "movhu.s: movhu tests" + set x 0 + + gas_start "movhu.s" "-al" + + # Instead of having a variable for each match string just increment the + # total number of matches seen. That's simpler when testing large numbers + # of instructions (as these tests to). + while 1 { + expect { + -re "^ +\[0-9\]+ 0000 F066\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0002 F86608\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0005 FA660100\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0009 FC660001\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +5 +FFFF\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 000f F8BD08\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0012 FABD0100\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0016 FCBD0001\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +8 +FFFF\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 001c F4A5\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 001e 398000\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0021 FCAD0001\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +11 +FFFF\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0027 F076\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0029 F87620\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 002c FA760100\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0030 FC760001\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +15 +FFFF\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0036 F89720\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0039 FA978000\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 003d FC970001\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +18 +FFFF\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0043 F4DA\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0045 070080\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0048 FC870001\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +21 +FFFF\[^\n\]*\n" { set x [expr $x+1] } + -re "\[^\n\]*\n" { } + timeout { perror "timeout\n"; break } + eof { break } + } + } + + # This was intended to do any cleanup necessary. It kinda looks like it + # isn't needed, but just in case, please keep it in for now. + gas_finish + + # Did we find what we were looking for? If not, flunk it. + if [expr $x==26] then { pass $testname } else { fail $testname } +} + +proc do_movm {} { + set testname "movm.s: movm tests" + set x 0 + + gas_start "movm.s" "-al" + + # Instead of having a variable for each match string just increment the + # total number of matches seen. That's simpler when testing large numbers + # of instructions (as these tests to). + while 1 { + expect { + -re "^ +\[0-9\]+ 0000 CE30\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0002 CEF8\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0004 CF30\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0006 CFF8\[^\n\]*\n" { set x [expr $x+1] } + -re "\[^\n\]*\n" { } + timeout { perror "timeout\n"; break } + eof { break } + } + } + + # This was intended to do any cleanup necessary. It kinda looks like it + # isn't needed, but just in case, please keep it in for now. + gas_finish + + # Did we find what we were looking for? If not, flunk it. + if [expr $x==4] then { pass $testname } else { fail $testname } +} + +proc do_muldiv {} { + set testname "muldiv.s: muldiv tests" + set x 0 + + gas_start "muldiv.s" "-al" + + # Instead of having a variable for each match string just increment the + # total number of matches seen. That's simpler when testing large numbers + # of instructions (as these tests to). + while 1 { + expect { + -re "^ +\[0-9\]+ 0000 F346\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0002 F35B\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0004 F36E\[^\n\]*\n" { set x [expr $x+1] } + -re "\[^\n\]*\n" { } + timeout { perror "timeout\n"; break } + eof { break } + } + } + + # This was intended to do any cleanup necessary. It kinda looks like it + # isn't needed, but just in case, please keep it in for now. + gas_finish + + # Did we find what we were looking for? If not, flunk it. + if [expr $x==3] then { pass $testname } else { fail $testname } +} + +proc do_other {} { + set testname "other.s: other tests" + set x 0 + + gas_start "other.s" "-al" + + # Instead of having a variable for each match string just increment the + # total number of matches seen. That's simpler when testing large numbers + # of instructions (as these tests to). + while 1 { + expect { + -re "^ +\[0-9\]+ 0000 FC0001\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0003 F4E0FFFF\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +3 +01\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0008 F008\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 000a FD0001\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 000d F4E1FFFF\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +6 +01\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0012 F009\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0014 FE\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0015 EB\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0016 F6\[^\n\]*\n" { set x [expr $x+1] } + -re "\[^\n\]*\n" { } + timeout { perror "timeout\n"; break } + eof { break } + } + } + + # This was intended to do any cleanup necessary. It kinda looks like it + # isn't needed, but just in case, please keep it in for now. + gas_finish + + # Did we find what we were looking for? If not, flunk it. + if [expr $x==11] then { pass $testname } else { fail $testname } +} + +proc do_shift {} { + set testname "shift.s: shift tests" + set x 0 + + gas_start "shift.s" "-al" + + # Instead of having a variable for each match string just increment the + # total number of matches seen. That's simpler when testing large numbers + # of instructions (as these tests to). + while 1 { + expect { + -re "^ +\[0-9\]+ 0000 F33A\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0002 F33F\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0004 F335\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0006 F332\[^\n\]*\n" { set x [expr $x+1] } + -re "\[^\n\]*\n" { } + timeout { perror "timeout\n"; break } + eof { break } + } + } + + # This was intended to do any cleanup necessary. It kinda looks like it + # isn't needed, but just in case, please keep it in for now. + gas_finish + + # Did we find what we were looking for? If not, flunk it. + if [expr $x==4] then { pass $testname } else { fail $testname } +} + +proc do_sub {} { + set testname "sub.s: sub tests" + set x 0 + + gas_start "sub.s" "-al" + + # Instead of having a variable for each match string just increment the + # total number of matches seen. That's simpler when testing large numbers + # of instructions (as these tests to). + while 1 { + expect { + -re "^ +\[0-9\]+ 0000 A6\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0001 F21B\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0003 F2DF\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0005 F25E\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0007 F71EFF7F \[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 000b F46AFFFF\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +7 +01\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0010 F70EFF7F \[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0014 F46EFFFF\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +9 +01\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0019 F296 \[^\n\]*\n" { set x [expr $x+1] } + -re "\[^\n\]*\n" { } + timeout { perror "timeout\n"; break } + eof { break } + } + } + + # This was intended to do any cleanup necessary. It kinda looks like it + # isn't needed, but just in case, please keep it in for now. + gas_finish + + # Did we find what we were looking for? If not, flunk it. + if [expr $x==11] then { pass $testname } else { fail $testname } +} + +if [istarget mn10200*-*-*] then { + # Test the basic instruction parser. + do_add + do_bcc + do_bccx + do_bit + do_cmp + do_ext + do_logical + do_mov1 + do_mov2 + do_mov3 + do_mov4 + do_movb + do_movx + do_movbu + do_muldiv + do_other + do_shift + do_sub +} diff --git a/gas/testsuite/gas/mn10200/bcc.s b/gas/testsuite/gas/mn10200/bcc.s new file mode 100644 index 0000000..8292dce --- /dev/null +++ b/gas/testsuite/gas/mn10200/bcc.s @@ -0,0 +1,17 @@ + .text +foo: + beq foo + bne foo + bgt foo + bge foo + ble foo + blt foo + bhi foo + bcc foo + bls foo + bcs foo + bvc foo + bvs foo + bnc foo + bns foo + bra foo diff --git a/gas/testsuite/gas/mn10200/bccx.s b/gas/testsuite/gas/mn10200/bccx.s new file mode 100644 index 0000000..e4e7edf --- /dev/null +++ b/gas/testsuite/gas/mn10200/bccx.s @@ -0,0 +1,16 @@ + .text +foo: + beqx foo + bnex foo + bgtx foo + bgex foo + blex foo + bltx foo + bhix foo + bccx foo + blsx foo + bcsx foo + bvcx foo + bvsx foo + bncx foo + bnsx foo diff --git a/gas/testsuite/gas/mn10200/bit.s b/gas/testsuite/gas/mn10200/bit.s new file mode 100644 index 0000000..5db60d4 --- /dev/null +++ b/gas/testsuite/gas/mn10200/bit.s @@ -0,0 +1,5 @@ + .text + btst 64,d1 + btst 8192,d2 + bset d1,(a2) + bclr d1,(a2) diff --git a/gas/testsuite/gas/mn10200/cmp.s b/gas/testsuite/gas/mn10200/cmp.s new file mode 100644 index 0000000..133925b --- /dev/null +++ b/gas/testsuite/gas/mn10200/cmp.s @@ -0,0 +1,10 @@ + .text + cmp d1,d2 + cmp d2,a3 + cmp a3,d3 + cmp a3,a2 + cmp 16,d3 + cmp 256,d2 + cmp 131071,d1 + cmp 256,a2 + cmp 131071,a1 diff --git a/gas/testsuite/gas/mn10200/ext.s b/gas/testsuite/gas/mn10200/ext.s new file mode 100644 index 0000000..1be01ba --- /dev/null +++ b/gas/testsuite/gas/mn10200/ext.s @@ -0,0 +1,7 @@ + .text + ext d1 + extx d2 + extxu d3 + extxb d2 + extxbu d1 + diff --git a/gas/testsuite/gas/mn10200/logical.s b/gas/testsuite/gas/mn10200/logical.s new file mode 100644 index 0000000..0809d7f --- /dev/null +++ b/gas/testsuite/gas/mn10200/logical.s @@ -0,0 +1,12 @@ + .text + and d1,d2 + and 127,d2 + and 32767,d3 + and 32767,psw + or d1,d2 + or 127,d2 + or 32767,d3 + or 32767,psw + xor d1,d2 + xor 32767,d3 + not d3 diff --git a/gas/testsuite/gas/mn10200/mov1.s b/gas/testsuite/gas/mn10200/mov1.s new file mode 100644 index 0000000..c828e32 --- /dev/null +++ b/gas/testsuite/gas/mn10200/mov1.s @@ -0,0 +1,13 @@ + .text + mov d1,a2 + mov a2,d1 + mov d1,d2 + mov a2,a1 + mov psw,d3 + mov d2,psw + mov mdr,d1 + mov d2,mdr + mov (a2),d1 + mov (8,a2),d1 + mov (256,a2),d1 + mov (131071,a2),d1 diff --git a/gas/testsuite/gas/mn10200/mov2.s b/gas/testsuite/gas/mn10200/mov2.s new file mode 100644 index 0000000..8df6e25 --- /dev/null +++ b/gas/testsuite/gas/mn10200/mov2.s @@ -0,0 +1,10 @@ + .text + mov (d1,a1),d2 + mov (32768),d1 + mov (131071),d1 + mov (8,a2),a1 + mov (256,a2),a1 + mov (131071,a2),a1 + mov (d1,a1),a2 + mov (32768),a1 + mov (131071),a1 diff --git a/gas/testsuite/gas/mn10200/mov3.s b/gas/testsuite/gas/mn10200/mov3.s new file mode 100644 index 0000000..bd7490a --- /dev/null +++ b/gas/testsuite/gas/mn10200/mov3.s @@ -0,0 +1,11 @@ + .text + mov d1,(a2) + mov d1,(32,a2) + mov d1,(256,a2) + mov d1,(131071,a2) + mov d1,(d2,a2) + mov d1,(128) + mov d1,(131071) + mov a1,(32,a2) + mov a1,(256,a2) + mov a1,(131071,a2) diff --git a/gas/testsuite/gas/mn10200/mov4.s b/gas/testsuite/gas/mn10200/mov4.s new file mode 100644 index 0000000..f1187e0 --- /dev/null +++ b/gas/testsuite/gas/mn10200/mov4.s @@ -0,0 +1,9 @@ + .text + mov a1,(d2,a2) + mov a1,(128) + mov a1,(131071) + mov 8,d1 + mov 256,d1 + mov 131071,d1 + mov 256,a1 + mov 131071,a1 diff --git a/gas/testsuite/gas/mn10200/movb.s b/gas/testsuite/gas/mn10200/movb.s new file mode 100644 index 0000000..2556614 --- /dev/null +++ b/gas/testsuite/gas/mn10200/movb.s @@ -0,0 +1,13 @@ + .text + movb (8,a2),d1 + movb (256,a2),d1 + movb (131071,a2),d1 + movb (d2,a2),d3 + movb (131071),d2 + movb d1,(a2) + movb d1,(8,a2) + movb d1,(256,a2) + movb d1,(131071,a2) + movb d1,(d2,a2) + movb d1,(256) + movb d1,(131071) diff --git a/gas/testsuite/gas/mn10200/movbu.s b/gas/testsuite/gas/mn10200/movbu.s new file mode 100644 index 0000000..01d973a --- /dev/null +++ b/gas/testsuite/gas/mn10200/movbu.s @@ -0,0 +1,8 @@ + .text + movbu (a2),d1 + movbu (8,a2),d1 + movbu (256,a2),d1 + movbu (131071,a2),d1 + movbu (d1,a1),d2 + movbu (32768),d1 + movbu (131071),d1 diff --git a/gas/testsuite/gas/mn10200/movx.s b/gas/testsuite/gas/mn10200/movx.s new file mode 100644 index 0000000..70e1d71 --- /dev/null +++ b/gas/testsuite/gas/mn10200/movx.s @@ -0,0 +1,7 @@ + .text + movx (8,a2),d1 + movx (256,a2),d1 + movx (131071,a2),d1 + movx d1,(8,a2) + movx d1,(256,a2) + movx d1,(131071,a2) diff --git a/gas/testsuite/gas/mn10200/muldiv.s b/gas/testsuite/gas/mn10200/muldiv.s new file mode 100644 index 0000000..0f17026 --- /dev/null +++ b/gas/testsuite/gas/mn10200/muldiv.s @@ -0,0 +1,4 @@ + .text + mul d1,d2 + mulu d2,d3 + divu d3,d2 diff --git a/gas/testsuite/gas/mn10200/other.s b/gas/testsuite/gas/mn10200/other.s new file mode 100644 index 0000000..ecf94bd --- /dev/null +++ b/gas/testsuite/gas/mn10200/other.s @@ -0,0 +1,10 @@ + .text + jmp 256 + jmp 131071 + jmp (a2) + jsr 256 + jsr 131071 + jsr (a2) + rts + rti + nop diff --git a/gas/testsuite/gas/mn10200/shift.s b/gas/testsuite/gas/mn10200/shift.s new file mode 100644 index 0000000..568e769 --- /dev/null +++ b/gas/testsuite/gas/mn10200/shift.s @@ -0,0 +1,5 @@ + .text + asr d2 + lsr d3 + ror d1 + rol d2 diff --git a/gas/testsuite/gas/mn10200/sub.s b/gas/testsuite/gas/mn10200/sub.s new file mode 100644 index 0000000..2551654 --- /dev/null +++ b/gas/testsuite/gas/mn10200/sub.s @@ -0,0 +1,10 @@ + .text + sub d1,d2 + sub d2,a3 + sub a3,d3 + sub a3,a2 + sub 32767,d2 + sub 131071,d2 + sub 32767,a2 + sub 131071,a2 + subc d1,d2 diff --git a/gas/testsuite/gas/mn10300/add.s b/gas/testsuite/gas/mn10300/add.s new file mode 100644 index 0000000..16f558f --- /dev/null +++ b/gas/testsuite/gas/mn10300/add.s @@ -0,0 +1,15 @@ + .text + add d1,d2 + add d2,a3 + add a3,a2 + add a2,d1 + add 16,d1 + add 256,d2 + add 131071,d3 + add 16,a1 + add 256,a2 + add 131071,a3 + add 16,sp + add 256,sp + add 131071,sp + addc d1,d2 diff --git a/gas/testsuite/gas/mn10300/basic.exp b/gas/testsuite/gas/mn10300/basic.exp new file mode 100644 index 0000000..7c057b9 --- /dev/null +++ b/gas/testsuite/gas/mn10300/basic.exp @@ -0,0 +1,986 @@ +# Copyright (C) 1996 Free Software Foundation, Inc. + +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; either version 2 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ + +# Please email any bugs, comments, and/or additions to this file to: +# DejaGnu@cygnus.com + +# Written by Cygnus Support. + +proc do_add {} { + set testname "add.s: Add operations" + set x 0 + + gas_start "add.s" "-al" + + # Instead of having a variable for each match string just increment the + # total number of matches seen. That's simpler when testing large numbers + # of instructions (as these tests to). + while 1 { + expect { + -re "^ +\[0-9\]+ 0000 E6\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0001 F16B\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0003 F17E\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0005 F159\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0007 2910\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0009 FAC20001\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 000d FCC3FFFF\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +8 +0100\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0013 2110\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0015 FAD20001\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0019 FCD3FFFF\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +11 +0100\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 001f F8FE10\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0022 FAFE0001\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0026 FCFEFFFF\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +14 +0100\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 002c F146\[^\n\]*\n" { set x [expr $x+1] } + -re "\[^\n\]*\n" { } + timeout { perror "timeout\n"; break } + eof { break } + } + } + + # This was intended to do any cleanup necessary. It kinda looks like it + # isn't needed, but just in case, please keep it in for now. + gas_finish + + # Did we find what we were looking for? If not, flunk it. + if [expr $x==17] then { pass $testname } else { fail $testname } +} + +proc do_bcc {} { + set testname "bcc.s: Bcc tests" + set x 0 + + gas_start "bcc.s" "-al" + + # Instead of having a variable for each match string just increment the + # total number of matches seen. That's simpler when testing large numbers + # of instructions (as these tests to). + while 1 { + expect { + -re "^ +\[0-9\]+ 0000 C800\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0002 C900\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0004 C100\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0006 C200\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0008 C300\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 000a C000\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 000c C500\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 000e C600\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0010 C700\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0012 C400\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0014 F8E800\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0017 F8E900\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 001a F8EA00\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 001d F8EB00\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0020 CA00\[^\n\]*\n" { set x [expr $x+1] } + -re "\[^\n\]*\n" { } + timeout { perror "timeout\n"; break } + eof { break } + } + } + + # This was intended to do any cleanup necessary. It kinda looks like it + # isn't needed, but just in case, please keep it in for now. + gas_finish + + # Did we find what we were looking for? If not, flunk it. + if [expr $x==15] then { pass $testname } else { fail $testname } +} + +proc do_bit {} { + set testname "bit.s: bit tests" + set x 0 + + gas_start "bit.s" "-al" + + # Instead of having a variable for each match string just increment the + # total number of matches seen. That's simpler when testing large numbers + # of instructions (as these tests to). + while 1 { + expect { + -re "^ +\[0-9\]+ 0000 F8ED40\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0003 FAEE0020\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0007 FCEFFFFF\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +4 +0100\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 000d FAF90840\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0011 FE02FFFF\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +6 +010040\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0018 F086\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 001a FAF10840\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 001e FE00FFFF\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +9 +010040\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0025 F096\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0027 FAF50840\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 002b FE01FFFF\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +12 +010040\[^\n\]*\n" { set x [expr $x+1] } + -re "\[^\n\]*\n" { } + timeout { perror "timeout\n"; break } + eof { break } + } + } + + # This was intended to do any cleanup necessary. It kinda looks like it + # isn't needed, but just in case, please keep it in for now. + gas_finish + + # Did we find what we were looking for? If not, flunk it. + if [expr $x==15] then { pass $testname } else { fail $testname } +} + +proc do_cmp {} { + set testname "cmp.s: cmp tests" + set x 0 + + gas_start "cmp.s" "-al" + + # Instead of having a variable for each match string just increment the + # total number of matches seen. That's simpler when testing large numbers + # of instructions (as these tests to). + while 1 { + expect { + -re "^ +\[0-9\]+ 0000 A6\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0001 F1AB\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0003 F19F\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0005 BE\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0006 AF10\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0008 FACA0001\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 000c FCC9FFFF\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +8 +0100\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0012 BF10\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0014 FADA0001\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0018 FCD9FFFF\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +11 +0100\[^\n\]*\n" { set x [expr $x+1] } + -re "\[^\n\]*\n" { } + timeout { perror "timeout\n"; break } + eof { break } + } + } + + # This was intended to do any cleanup necessary. It kinda looks like it + # isn't needed, but just in case, please keep it in for now. + gas_finish + + # Did we find what we were looking for? If not, flunk it. + if [expr $x==12] then { pass $testname } else { fail $testname } +} + +proc do_ext {} { + set testname "ext.s: ext tests" + set x 0 + + gas_start "ext.s" "-al" + + # Instead of having a variable for each match string just increment the + # total number of matches seen. That's simpler when testing large numbers + # of instructions (as these tests to). + while 1 { + expect { + -re "^ +\[0-9\]+ 0000 F2D1\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0002 12\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0003 17\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0004 1A\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0005 1D\[^\n\]*\n" { set x [expr $x+1] } + -re "\[^\n\]*\n" { } + timeout { perror "timeout\n"; break } + eof { break } + } + } + + # This was intended to do any cleanup necessary. It kinda looks like it + # isn't needed, but just in case, please keep it in for now. + gas_finish + + # Did we find what we were looking for? If not, flunk it. + if [expr $x==5] then { pass $testname } else { fail $testname } +} + +proc do_extend {} { + set testname "extend.s: extended instruction tests" + set x 0 + + gas_start "extend.s" "-al" + + # Instead of having a variable for each match string just increment the + # total number of matches seen. That's simpler when testing large numbers + # of instructions (as these tests to). + while 1 { + expect { + -re "^ +\[0-9\]+ 0000 F505\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0002 F6FA\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0004 F606\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0006 F90210\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0009 FB030001\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 000d FD03FFFF\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +7 +0100\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0013 F616\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0015 F91610\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0018 FB170001\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 001c FD17FFFF\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +11 +0100\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0022 F64B\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0024 F65E\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0026 F676\[^\n\]*\n" { set x [expr $x+1] } + -re "\[^\n\]*\n" { } + timeout { perror "timeout\n"; break } + eof { break } + } + } + + # This was intended to do any cleanup necessary. It kinda looks like it + # isn't needed, but just in case, please keep it in for now. + gas_finish + + # Did we find what we were looking for? If not, flunk it. + if [expr $x==15] then { pass $testname } else { fail $testname } +} + +proc do_logical {} { + set testname "logical.s: logical tests" + set x 0 + + gas_start "logical.s" "-al" + + # Instead of having a variable for each match string just increment the + # total number of matches seen. That's simpler when testing large numbers + # of instructions (as these tests to). + while 1 { + expect { + -re "^ +\[0-9\]+ 0000 F206\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0002 F8E27F\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0005 FAE3FF7F\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0009 FCE3FFFF\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +5 +0100\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 000f FAFCFF7F\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0013 F216\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0015 F8E67F\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0018 FAE7FF7F\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 001c FCE7FFFF\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +10 +0100\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0022 FAFDFF7F\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0026 F226\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0028 FAEBFF7F\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 002c FCEBFFFF\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +14 +0100\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0032 F233\[^\n\]*\n" { set x [expr $x+1] } + -re "^\[^\n\]*\n" { } + timeout { perror "timeout\n"; break } + eof { break } + } + } + + # This was intended to do any cleanup necessary. It kinda looks like it + # isn't needed, but just in case, please keep it in for now. + gas_finish + + # Did we find what we were looking for? If not, flunk it. + if [expr $x==17] then { pass $testname } else { fail $testname } +} + +proc do_loop {} { + set testname "loop.s: loop tests" + set x 0 + + gas_start "loop.s" "-al" + + # Instead of having a variable for each match string just increment the + # total number of matches seen. That's simpler when testing large numbers + # of instructions (as these tests to). + while 1 { + expect { + -re "^ +\[0-9\]+ 0000 D8\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0001 D9\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0002 D1\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0003 D2\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0004 D3\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0005 D0\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0006 D5\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0007 D6\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0008 D7\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0009 D4\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 000a DA\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 000b DB\[^\n\]*\n" { set x [expr $x+1] } + -re "\[^\n\]*\n" { } + timeout { perror "timeout\n"; break } + eof { break } + } + } + + # This was intended to do any cleanup necessary. It kinda looks like it + # isn't needed, but just in case, please keep it in for now. + gas_finish + + # Did we find what we were looking for? If not, flunk it. + if [expr $x==12] then { pass $testname } else { fail $testname } +} + +proc do_mov1 {} { + set testname "mov1.s: mov1 tests" + set x 0 + + gas_start "mov1.s" "-al" + + # Instead of having a variable for each match string just increment the + # total number of matches seen. That's simpler when testing large numbers + # of instructions (as these tests to). + while 1 { + expect { + -re "^ +\[0-9\]+ 0000 86\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0001 F1E6\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0003 F1D9\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0005 99\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0006 3E\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0007 F2F4\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0009 F2FB\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 000b F2E1\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 000d F2FA\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 000f 76\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0010 F80608\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0013 FA060001\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0017 FC06FFFF\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +14 +0100\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 001d 5908\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 001f FAB50001\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0023 F2E7\[^\n\]*\n" { set x [expr $x+1] } + -re "\[^\n\]*\n" { } + timeout { perror "timeout\n"; break } + eof { break } + } + } + + # This was intended to do any cleanup necessary. It kinda looks like it + # isn't needed, but just in case, please keep it in for now. + gas_finish + + # Did we find what we were looking for? If not, flunk it. + if [expr $x==17] then { pass $testname } else { fail $testname } +} + +proc do_mov2 {} { + set testname "mov2.s: mov2 tests" + set x 0 + + gas_start "mov2.s" "-al" + + # Instead of having a variable for each match string just increment the + # total number of matches seen. That's simpler when testing large numbers + # of instructions (as these tests to). + while 1 { + expect { + -re "^ +\[0-9\]+ 0000 FCB5FFFF\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +2 +0100\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0006 F325\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0008 310080\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 000b FCA5FFFF\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +5 +0100\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0011 F006\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0013 F82608\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0016 FA260001 \[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 001a FC26FFFF\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +9 +0100\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0020 5D08\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0022 FAB10001\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0026 FCB1FFFF\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +12 +0100\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 002c F3A5\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 002e FAA10080\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0032 FCA1FFFF\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +15 +0100\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0038 F8F120\[^\n\]*\n" { set x [expr $x+1] } + -re "\[^\n\]*\n" { } + timeout { perror "timeout\n"; break } + eof { break } + } + } + + # This was intended to do any cleanup necessary. It kinda looks like it + # isn't needed, but just in case, please keep it in for now. + gas_finish + + # Did we find what we were looking for? If not, flunk it. + if [expr $x==20] then { pass $testname } else { fail $testname } +} + +proc do_mov3 {} { + set testname "mov3.s: mov3 tests" + set x 0 + + gas_start "mov3.s" "-al" + + # Instead of having a variable for each match string just increment the + # total number of matches seen. That's simpler when testing large numbers + # of instructions (as these tests to). + while 1 { + expect { + -re "^ +\[0-9\]+ 0000 66\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0001 F81620\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0004 FA160001\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0008 FC16FFFF\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +5 +0100\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 000e 4620\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0010 FA950080\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0014 FC95FFFF\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +8 +0100\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 001a F35A\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 001c 058000\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 001f FC85FFFF\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +11 +0100\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0025 F016\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0027 F83620\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 002a FA360001\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 002e FC36FFFF\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +15 +0100\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0034 4720\[^\n\]*\n" { set x [expr $x+1] } + -re "\[^\n\]*\n" { } + timeout { perror "timeout\n"; break } + eof { break } + } + } + + # This was intended to do any cleanup necessary. It kinda looks like it + # isn't needed, but just in case, please keep it in for now. + gas_finish + + # Did we find what we were looking for? If not, flunk it. + if [expr $x==19] then { pass $testname } else { fail $testname } +} + +proc do_mov4 {} { + set testname "mov4.s: mov4 tests" + set x 0 + + gas_start "mov4.s" "-al" + + # Instead of having a variable for each match string just increment the + # total number of matches seen. That's simpler when testing large numbers + # of instructions (as these tests to). + while 1 { + expect { + -re "^ +\[0-9\]+ 0000 FA940080\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0004 FC94FFFF\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +3 +0100\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 000a F3DA\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 000c FA848000\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0010 FC84FFFF\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +6 +0100\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0016 F8F520\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0019 8508\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 001b 2D0001\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 001e FCCDFFFF\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +10 +0100\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0024 9508\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0026 250001\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0029 FCDDFFFF\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +13 +0100\[^\n\]*\n" { set x [expr $x+1] } + -re "\[^\n\]*\n" { } + timeout { perror "timeout\n"; break } + eof { break } + } + } + + # This was intended to do any cleanup necessary. It kinda looks like it + # isn't needed, but just in case, please keep it in for now. + gas_finish + + # Did we find what we were looking for? If not, flunk it. + if [expr $x==16] then { pass $testname } else { fail $testname } +} + +proc do_movbu {} { + set testname "movbu.s: movbu tests" + set x 0 + + gas_start "movbu.s" "-al" + + # Instead of having a variable for each match string just increment the + # total number of matches seen. That's simpler when testing large numbers + # of instructions (as these tests to). + while 1 { + expect { + -re "^ +\[0-9\]+ 0000 F046\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0002 F84608\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0005 FA460001\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0009 FC46FFFF\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +5 +0100\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 000f F8B908\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0012 FAB90001\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0016 FCB9FFFF\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +8 +0100\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 001c F425\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 001e 350080\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0021 FCA9FFFF\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +11 +0100\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0027 F056\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0029 F85620\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 002c FA560001\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0030 FC56FFFF\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +15 +0100\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0036 F89620\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0039 FA960080\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 003d FC96FFFF\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +18 +0100\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0043 F45A\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0045 068000\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0048 FC86FFFF\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +21 +0100\[^\n\]*\n" { set x [expr $x+1] } + -re "\[^\n\]*\n" { } + timeout { perror "timeout\n"; break } + eof { break } + } + } + + # This was intended to do any cleanup necessary. It kinda looks like it + # isn't needed, but just in case, please keep it in for now. + gas_finish + + # Did we find what we were looking for? If not, flunk it. + if [expr $x==26] then { pass $testname } else { fail $testname } +} + +proc do_movhu {} { + set testname "movhu.s: movhu tests" + set x 0 + + gas_start "movhu.s" "-al" + + # Instead of having a variable for each match string just increment the + # total number of matches seen. That's simpler when testing large numbers + # of instructions (as these tests to). + while 1 { + expect { + -re "^ +\[0-9\]+ 0000 F066\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0002 F86608\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0005 FA660001\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0009 FC66FFFF\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +5 +0100\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 000f F8BD08\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0012 FABD0001\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0016 FCBDFFFF\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +8 +0100\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 001c F4A5\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 001e 390080\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0021 FCADFFFF\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +11 +0100\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0027 F076\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0029 F87620\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 002c FA760001\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0030 FC76FFFF\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +15 +0100\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0036 F89720\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0039 FA970080\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 003d FC97FFFF\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +18 +0100\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0043 F4DA\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0045 078000\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0048 FC87FFFF\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +21 +0100\[^\n\]*\n" { set x [expr $x+1] } + -re "\[^\n\]*\n" { } + timeout { perror "timeout\n"; break } + eof { break } + } + } + + # This was intended to do any cleanup necessary. It kinda looks like it + # isn't needed, but just in case, please keep it in for now. + gas_finish + + # Did we find what we were looking for? If not, flunk it. + if [expr $x==26] then { pass $testname } else { fail $testname } +} + +proc do_movm {} { + set testname "movm.s: movm tests" + set x 0 + + gas_start "movm.s" "-al" + + # Instead of having a variable for each match string just increment the + # total number of matches seen. That's simpler when testing large numbers + # of instructions (as these tests to). + while 1 { + expect { + -re "^ +\[0-9\]+ 0000 CE30\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0002 CEF8\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0004 CF30\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0006 CFF8\[^\n\]*\n" { set x [expr $x+1] } + -re "\[^\n\]*\n" { } + timeout { perror "timeout\n"; break } + eof { break } + } + } + + # This was intended to do any cleanup necessary. It kinda looks like it + # isn't needed, but just in case, please keep it in for now. + gas_finish + + # Did we find what we were looking for? If not, flunk it. + if [expr $x==4] then { pass $testname } else { fail $testname } +} + +proc do_muldiv {} { + set testname "muldiv.s: muldiv tests" + set x 0 + + gas_start "muldiv.s" "-al" + + # Instead of having a variable for each match string just increment the + # total number of matches seen. That's simpler when testing large numbers + # of instructions (as these tests to). + while 1 { + expect { + -re "^ +\[0-9\]+ 0000 F246\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0002 F25B\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0004 F26F\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0006 F27E\[^\n\]*\n" { set x [expr $x+1] } + -re "\[^\n\]*\n" { } + timeout { perror "timeout\n"; break } + eof { break } + } + } + + # This was intended to do any cleanup necessary. It kinda looks like it + # isn't needed, but just in case, please keep it in for now. + gas_finish + + # Did we find what we were looking for? If not, flunk it. + if [expr $x==4] then { pass $testname } else { fail $testname } +} + +proc do_other {} { + set testname "other.s: other tests" + set x 0 + + gas_start "other.s" "-al" + + # Instead of having a variable for each match string just increment the + # total number of matches seen. That's simpler when testing large numbers + # of instructions (as these tests to). + while 1 { + expect { + -re "^ +\[0-9\]+ 0000 08\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0001 44\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0002 49\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0003 53\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0004 F0F6\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0006 CC0001\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0009 DCFFFF01\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +8 +00\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 000e CD000130\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +9 +09\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0013 DDFFFF01\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +10 +003020\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 001a F0F2\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 001c FAFF0001\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0020 FCFFFFFF\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +13 +0100\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0026 DF3007\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0029 DE3005\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 002c F0FC\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 002e F0FD\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0030 F0FE\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0032 CB\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0033 F0FF\[^\n\]*\n" { set x [expr $x+1] } + -re "\[^\n\]*\n" { } + timeout { perror "timeout\n"; break } + eof { break } + } + } + + # This was intended to do any cleanup necessary. It kinda looks like it + # isn't needed, but just in case, please keep it in for now. + gas_finish + + # Did we find what we were looking for? If not, flunk it. + if [expr $x==23] then { pass $testname } else { fail $testname } +} + +proc do_shift {} { + set testname "shift.s: shift tests" + set x 0 + + gas_start "shift.s" "-al" + + # Instead of having a variable for each match string just increment the + # total number of matches seen. That's simpler when testing large numbers + # of instructions (as these tests to). + while 1 { + expect { + -re "^ +\[0-9\]+ 0000 F2B6\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0002 F8CA04\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0005 F2AB\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0007 F8C704\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 000a F29E\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 000c F8C204\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 000f 56\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0010 F285\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0012 F282\[^\n\]*\n" { set x [expr $x+1] } + -re "\[^\n\]*\n" { } + timeout { perror "timeout\n"; break } + eof { break } + } + } + + # This was intended to do any cleanup necessary. It kinda looks like it + # isn't needed, but just in case, please keep it in for now. + gas_finish + + # Did we find what we were looking for? If not, flunk it. + if [expr $x==9] then { pass $testname } else { fail $testname } +} + +proc do_sub {} { + set testname "sub.s: sub tests" + set x 0 + + gas_start "sub.s" "-al" + + # Instead of having a variable for each match string just increment the + # total number of matches seen. That's simpler when testing large numbers + # of instructions (as these tests to). + while 1 { + expect { + -re "^ +\[0-9\]+ 0000 F106\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0002 F12B\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0004 F11F\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0006 F13E\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0008 FCC6FFFF \[^\n\]*\n" { set x [expr $x+1] } + -re "^ +6 +0100\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 000e FCD5FFFF\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +7 +0100\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0014 F186\[^\n\]*\n" { set x [expr $x+1] } + -re "\[^\n\]*\n" { } + timeout { perror "timeout\n"; break } + eof { break } + } + } + + # This was intended to do any cleanup necessary. It kinda looks like it + # isn't needed, but just in case, please keep it in for now. + gas_finish + + # Did we find what we were looking for? If not, flunk it. + if [expr $x==9] then { pass $testname } else { fail $testname } +} + +proc do_udf {} { + set testname "udf.s: udf tests part 1" + set x 0 + + gas_start "udf.s" "-al" + + # Instead of having a variable for each match string just increment the + # total number of matches seen. That's simpler when testing large numbers + # of instructions (as these tests to). + while 1 { + expect { + -re "^ +\[0-9\]+ 0000 F601\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0002 F611\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0004 F621\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0006 F631\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0008 F641\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 000a F651\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 000c F661\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 000e F671\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0010 F681\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0012 F691\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0014 F6A1\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0016 F6B1\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0018 F6C1\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 001a F6D1\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 001c F6E1\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 001e F6F1\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0020 F501\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0022 F511\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0024 F521\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0026 F531\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0028 F541\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 002a F551\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 002c F561\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 002e F571\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0030 F581\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0032 F591\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0034 F5A1\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0036 F5B1\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0038 F5C1\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 003a F5D1\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 003c F5E1\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 003e F5F1\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0040 F9017F\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0043 F9117F\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0046 F9217F\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0049 F9317F\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 004c F9417F\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 004f F9517F\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0052 F9617F\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0055 F9717F\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0058 F9817F\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 005b F9917F\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 005e F9A17F\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0061 F9B17F\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0064 F9C17F\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0067 F9D17F\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 006a F9E17F\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 006d F9F17F\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0070 FB01FF7F\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0074 FB11FF7F\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0078 FB21FF7F\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 007c FB31FF7F\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0080 FB41FF7F\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0084 FB51FF7F\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0088 FB61FF7F\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 008c FB71FF7F\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0090 FB81FF7F\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0094 FB91FF7F\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0098 FBA1FF7F\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 009c FBB1FF7F\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 00a0 FBC1FF7F\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 00a4 FBD1FF7F\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 00a8 FBE1FF7F\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 00ac FBF1FF7F\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 00b0 FD01FFFF\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +66 +0000\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 00b6 FD11FFFF\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +67 +0000\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 00bc FD21FFFF\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +68 +0000\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 00c2 FD31FFFF\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +69 +0000\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 00c8 FD41FFFF\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +70 +0000\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 00ce FD51FFFF\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +71 +0000\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 00d4 FD61FFFF\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +72 +0000\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 00da FD71FFFF\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +73 +0000\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 00e0 FD81FFFF\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +74 +0000\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 00e6 FD91FFFF\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +75 +0000\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 00ec FDA1FFFF\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +76 +0000\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 00f2 FDB1FFFF\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +77 +0000\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 00f8 FDC1FFFF\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +78 +0000\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 00fe FDD1FFFF\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +79 +0000\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0104 FDE1FFFF\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +80 +0000\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 010a FDF1FFFF\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +81 +0000\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0110 F90580\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0113 F91580\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0116 F92580\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0119 F93580\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 011c F94580\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 011f F95580\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0122 F96580\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0125 F97580\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0128 F98580\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 012b F99580\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 012e F9A580\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0131 F9B580\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0134 F9C580\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0137 F9D580\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 013a F9E580\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 013d F9F580\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0140 FB050080\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0144 FB150080\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0148 FB250080\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 014c FB350080\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0150 FB450080\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0154 FB550080\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0158 FB650080\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 015c FB750080\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0160 FB850080\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0164 FB950080\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0168 FBA50080\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 016c FBB50080\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0170 FBC50080\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0174 FBD50080\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0178 FBE50080\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 017c FBF50080\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0180 FD050000\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +114 +0100\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0186 FD150000\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +115 +0100\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 018c FD250000\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +116 +0100\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0192 FD350000\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +117 +0100\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0198 FD450000\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +118 +0100\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 019e FD550000\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +119 +0100\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 01a4 FD650000\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +120 +0100\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 01aa FD750000\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +121 +0100\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 01b0 FD850000\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +122 +0100\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 01b6 FD950000\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +123 +0100\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 01bc FDA50000\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +124 +0100\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 01c2 FDB50000\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +125 +0100\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 01c8 FDC50000\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +126 +0100\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 01ce FDD50000\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +127 +0100\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 01d4 FDE50000\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +128 +0100\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 01da FDF50000\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +129 +0100\[^\n\]*\n" { set x [expr $x+1] } + -re "\[^\n\]*\n" { } + timeout { perror "timeout\n"; break } + eof { break } + } + } + + # This was intended to do any cleanup necessary. It kinda looks like it + # isn't needed, but just in case, please keep it in for now. + gas_finish + + # Did we find what we were looking for? If not, flunk it. + if [expr $x==160] then { pass $testname } else { fail $testname } +} + + +if [istarget mn10300*-*-*] then { + # Test the basic instruction parser. + do_add + do_bcc + do_bit + do_cmp + do_ext + do_extend + do_logical + do_loop + do_mov1 + do_mov2 + do_mov3 + do_mov4 + do_movbu + do_movhu + do_movm + do_muldiv + do_other + do_shift + do_sub + do_udf +} diff --git a/gas/testsuite/gas/mn10300/bcc.s b/gas/testsuite/gas/mn10300/bcc.s new file mode 100644 index 0000000..8292dce --- /dev/null +++ b/gas/testsuite/gas/mn10300/bcc.s @@ -0,0 +1,17 @@ + .text +foo: + beq foo + bne foo + bgt foo + bge foo + ble foo + blt foo + bhi foo + bcc foo + bls foo + bcs foo + bvc foo + bvs foo + bnc foo + bns foo + bra foo diff --git a/gas/testsuite/gas/mn10300/bit.s b/gas/testsuite/gas/mn10300/bit.s new file mode 100644 index 0000000..f5c5519 --- /dev/null +++ b/gas/testsuite/gas/mn10300/bit.s @@ -0,0 +1,12 @@ + .text + btst 64,d1 + btst 8192,d2 + btst 131071,d3 + btst 64,(8,a1) + btst 64,(131071) + bset d1,(a2) + bset 64,(8,a1) + bset 64,(131071) + bclr d1,(a2) + bclr 64,(8,a1) + bclr 64,(131071) diff --git a/gas/testsuite/gas/mn10300/cmp.s b/gas/testsuite/gas/mn10300/cmp.s new file mode 100644 index 0000000..7f8a71d --- /dev/null +++ b/gas/testsuite/gas/mn10300/cmp.s @@ -0,0 +1,11 @@ + .text + cmp d1,d2 + cmp d2,a3 + cmp a3,d3 + cmp a3,a2 + cmp 16,d3 + cmp 256,d2 + cmp 131071,d1 + cmp 16,a3 + cmp 256,a2 + cmp 131071,a1 diff --git a/gas/testsuite/gas/mn10300/ext.s b/gas/testsuite/gas/mn10300/ext.s new file mode 100644 index 0000000..f0e2e79 --- /dev/null +++ b/gas/testsuite/gas/mn10300/ext.s @@ -0,0 +1,7 @@ + .text + ext d1 + extb d2 + extbu d3 + exth d2 + exthu d1 + diff --git a/gas/testsuite/gas/mn10300/extend.s b/gas/testsuite/gas/mn10300/extend.s new file mode 100644 index 0000000..d6405b7 --- /dev/null +++ b/gas/testsuite/gas/mn10300/extend.s @@ -0,0 +1,15 @@ + .text + putx d1 + getx d2 + mulq d1,d2 + mulq 16,d2 + mulq 256,d3 + mulq 131071,d3 + mulqu d1,d2 + mulqu 16,d2 + mulqu 256,d3 + mulqu 131071,d3 + sat16 d2,d3 + sat24 d3,d2 + bsch d1,d2 + diff --git a/gas/testsuite/gas/mn10300/logical.s b/gas/testsuite/gas/mn10300/logical.s new file mode 100644 index 0000000..b0976db --- /dev/null +++ b/gas/testsuite/gas/mn10300/logical.s @@ -0,0 +1,15 @@ + .text + and d1,d2 + and 127,d2 + and 32767,d3 + and 131071,d3 + and 32767,psw + or d1,d2 + or 127,d2 + or 32767,d3 + or 131071,d3 + or 32767,psw + xor d1,d2 + xor 32767,d3 + xor 131071,d3 + not d3 diff --git a/gas/testsuite/gas/mn10300/loop.s b/gas/testsuite/gas/mn10300/loop.s new file mode 100644 index 0000000..d918207 --- /dev/null +++ b/gas/testsuite/gas/mn10300/loop.s @@ -0,0 +1,15 @@ + .text +foo: + leq + lne + lgt + lge + lle + llt + lhi + lcc + lls + lcs + lra + setlb + diff --git a/gas/testsuite/gas/mn10300/mov1.s b/gas/testsuite/gas/mn10300/mov1.s new file mode 100644 index 0000000..a44cc55 --- /dev/null +++ b/gas/testsuite/gas/mn10300/mov1.s @@ -0,0 +1,17 @@ + .text + mov d1,d2 + mov d1,a2 + mov a2,d1 + mov a2,a1 + mov sp,a2 + mov a1,sp + mov d2,psw + mov mdr,d1 + mov d2,mdr + mov (a2),d1 + mov (8,a2),d1 + mov (256,a2),d1 + mov (131071,a2),d1 + mov (8,sp),d1 + mov (256,sp),d1 + mov psw,d3 diff --git a/gas/testsuite/gas/mn10300/mov2.s b/gas/testsuite/gas/mn10300/mov2.s new file mode 100644 index 0000000..50d1edc5 --- /dev/null +++ b/gas/testsuite/gas/mn10300/mov2.s @@ -0,0 +1,16 @@ + .text + mov (131071,sp),d1 + mov (d1,a1),d2 + mov (32768),d1 + mov (131071),d1 + mov (a2),a1 + mov (8,a2),a1 + mov (256,a2),a1 + mov (131071,a2),a1 + mov (8,sp),a1 + mov (256,sp),a1 + mov (131071,sp),a1 + mov (d1,a1),a2 + mov (32768),a1 + mov (131071),a1 + mov (32,a1),sp diff --git a/gas/testsuite/gas/mn10300/mov3.s b/gas/testsuite/gas/mn10300/mov3.s new file mode 100644 index 0000000..90ec0b9 --- /dev/null +++ b/gas/testsuite/gas/mn10300/mov3.s @@ -0,0 +1,16 @@ + .text + mov d1,(a2) + mov d1,(32,a2) + mov d1,(256,a2) + mov d1,(131071,a2) + mov d1,(32,sp) + mov d1,(32768,sp) + mov d1,(131071,sp) + mov d1,(d2,a2) + mov d1,(128) + mov d1,(131071) + mov a1,(a2) + mov a1,(32,a2) + mov a1,(256,a2) + mov a1,(131071,a2) + mov a1,(32,sp) diff --git a/gas/testsuite/gas/mn10300/mov4.s b/gas/testsuite/gas/mn10300/mov4.s new file mode 100644 index 0000000..99d69c1 --- /dev/null +++ b/gas/testsuite/gas/mn10300/mov4.s @@ -0,0 +1,13 @@ + .text + mov a1,(32768,sp) + mov a1,(131071,sp) + mov a1,(d2,a2) + mov a1,(128) + mov a1,(131071) + mov sp,(32,a1) + mov 8,d1 + mov 256,d1 + mov 131071,d1 + mov 8,a1 + mov 256,a1 + mov 131071,a1 diff --git a/gas/testsuite/gas/mn10300/movbu.s b/gas/testsuite/gas/mn10300/movbu.s new file mode 100644 index 0000000..8fdb7be --- /dev/null +++ b/gas/testsuite/gas/mn10300/movbu.s @@ -0,0 +1,21 @@ + .text + movbu (a2),d1 + movbu (8,a2),d1 + movbu (256,a2),d1 + movbu (131071,a2),d1 + movbu (8,sp),d1 + movbu (256,sp),d1 + movbu (131071,sp),d1 + movbu (d1,a1),d2 + movbu (32768),d1 + movbu (131071),d1 + movbu d1,(a2) + movbu d1,(32,a2) + movbu d1,(256,a2) + movbu d1,(131071,a2) + movbu d1,(32,sp) + movbu d1,(32768,sp) + movbu d1,(131071,sp) + movbu d1,(d2,a2) + movbu d1,(128) + movbu d1,(131071) diff --git a/gas/testsuite/gas/mn10300/movhu.s b/gas/testsuite/gas/mn10300/movhu.s new file mode 100644 index 0000000..4637e80 --- /dev/null +++ b/gas/testsuite/gas/mn10300/movhu.s @@ -0,0 +1,21 @@ + .text + movhu (a2),d1 + movhu (8,a2),d1 + movhu (256,a2),d1 + movhu (131071,a2),d1 + movhu (8,sp),d1 + movhu (256,sp),d1 + movhu (131071,sp),d1 + movhu (d1,a1),d2 + movhu (32768),d1 + movhu (131071),d1 + movhu d1,(a2) + movhu d1,(32,a2) + movhu d1,(256,a2) + movhu d1,(131071,a2) + movhu d1,(32,sp) + movhu d1,(32768,sp) + movhu d1,(131071,sp) + movhu d1,(d2,a2) + movhu d1,(128) + movhu d1,(131071) diff --git a/gas/testsuite/gas/mn10300/movm.s b/gas/testsuite/gas/mn10300/movm.s new file mode 100644 index 0000000..ccfc683 --- /dev/null +++ b/gas/testsuite/gas/mn10300/movm.s @@ -0,0 +1,5 @@ + .text + movm (sp),[a2,a3] + movm (sp),[d2,d3,a2,a3,other] + movm [a2,a3],(sp) + movm [d2,d3,a2,a3,other],(sp) diff --git a/gas/testsuite/gas/mn10300/muldiv.s b/gas/testsuite/gas/mn10300/muldiv.s new file mode 100644 index 0000000..3f11e5d --- /dev/null +++ b/gas/testsuite/gas/mn10300/muldiv.s @@ -0,0 +1,5 @@ + .text + mul d1,d2 + mulu d2,d3 + div d3,d3 + divu d3,d2 diff --git a/gas/testsuite/gas/mn10300/other.s b/gas/testsuite/gas/mn10300/other.s new file mode 100644 index 0000000..3eaf74a --- /dev/null +++ b/gas/testsuite/gas/mn10300/other.s @@ -0,0 +1,20 @@ + .text + clr d2 + inc d1 + inc a2 + inc4 a3 + jmp (a2) + jmp 256 + jmp 131071 + call 256,[a2,a3],9 + call 131071,[a2,a3],32 + calls (a2) + calls 256 + calls 131071 + ret [a2,a3],7 + retf [a2,a3],5 + rets + rti + trap + nop + rtm diff --git a/gas/testsuite/gas/mn10300/shift.s b/gas/testsuite/gas/mn10300/shift.s new file mode 100644 index 0000000..ec8c9ce --- /dev/null +++ b/gas/testsuite/gas/mn10300/shift.s @@ -0,0 +1,10 @@ + .text + asr d1,d2 + asr 4,d2 + lsr d2,d3 + lsr 4,d3 + asl d3,d2 + asl 4,d2 + asl2 d2 + ror d1 + rol d2 diff --git a/gas/testsuite/gas/mn10300/sub.s b/gas/testsuite/gas/mn10300/sub.s new file mode 100644 index 0000000..13dc663 --- /dev/null +++ b/gas/testsuite/gas/mn10300/sub.s @@ -0,0 +1,8 @@ + .text + sub d1,d2 + sub d2,a3 + sub a3,d3 + sub a3,a2 + sub 131071,d2 + sub 131071,a1 + subc d1,d2 diff --git a/gas/testsuite/gas/mn10300/udf.s b/gas/testsuite/gas/mn10300/udf.s new file mode 100644 index 0000000..87cbd13 --- /dev/null +++ b/gas/testsuite/gas/mn10300/udf.s @@ -0,0 +1,129 @@ + .text + udf00 d0,d1 + udf01 d0,d1 + udf02 d0,d1 + udf03 d0,d1 + udf04 d0,d1 + udf05 d0,d1 + udf06 d0,d1 + udf07 d0,d1 + udf08 d0,d1 + udf09 d0,d1 + udf10 d0,d1 + udf11 d0,d1 + udf12 d0,d1 + udf13 d0,d1 + udf14 d0,d1 + udf15 d0,d1 + udf20 d0,d1 + udf21 d0,d1 + udf22 d0,d1 + udf23 d0,d1 + udf24 d0,d1 + udf25 d0,d1 + udf26 d0,d1 + udf27 d0,d1 + udf28 d0,d1 + udf29 d0,d1 + udf30 d0,d1 + udf31 d0,d1 + udf32 d0,d1 + udf33 d0,d1 + udf34 d0,d1 + udf35 d0,d1 + udf00 127,d1 + udf01 127,d1 + udf02 127,d1 + udf03 127,d1 + udf04 127,d1 + udf05 127,d1 + udf06 127,d1 + udf07 127,d1 + udf08 127,d1 + udf09 127,d1 + udf10 127,d1 + udf11 127,d1 + udf12 127,d1 + udf13 127,d1 + udf14 127,d1 + udf15 127,d1 + udf00 32767,d1 + udf01 32767,d1 + udf02 32767,d1 + udf03 32767,d1 + udf04 32767,d1 + udf05 32767,d1 + udf06 32767,d1 + udf07 32767,d1 + udf08 32767,d1 + udf09 32767,d1 + udf10 32767,d1 + udf11 32767,d1 + udf12 32767,d1 + udf13 32767,d1 + udf14 32767,d1 + udf15 32767,d1 + udf00 65535,d1 + udf01 65535,d1 + udf02 65535,d1 + udf03 65535,d1 + udf04 65535,d1 + udf05 65535,d1 + udf06 65535,d1 + udf07 65535,d1 + udf08 65535,d1 + udf09 65535,d1 + udf10 65535,d1 + udf11 65535,d1 + udf12 65535,d1 + udf13 65535,d1 + udf14 65535,d1 + udf15 65535,d1 + udfu00 128,d1 + udfu01 128,d1 + udfu02 128,d1 + udfu03 128,d1 + udfu04 128,d1 + udfu05 128,d1 + udfu06 128,d1 + udfu07 128,d1 + udfu08 128,d1 + udfu09 128,d1 + udfu10 128,d1 + udfu11 128,d1 + udfu12 128,d1 + udfu13 128,d1 + udfu14 128,d1 + udfu15 128,d1 + udfu00 32768,d1 + udfu01 32768,d1 + udfu02 32768,d1 + udfu03 32768,d1 + udfu04 32768,d1 + udfu05 32768,d1 + udfu06 32768,d1 + udfu07 32768,d1 + udfu08 32768,d1 + udfu09 32768,d1 + udfu10 32768,d1 + udfu11 32768,d1 + udfu12 32768,d1 + udfu13 32768,d1 + udfu14 32768,d1 + udfu15 32768,d1 + udfu00 65536,d1 + udfu01 65536,d1 + udfu02 65536,d1 + udfu03 65536,d1 + udfu04 65536,d1 + udfu05 65536,d1 + udfu06 65536,d1 + udfu07 65536,d1 + udfu08 65536,d1 + udfu09 65536,d1 + udfu10 65536,d1 + udfu11 65536,d1 + udfu12 65536,d1 + udfu13 65536,d1 + udfu14 65536,d1 + udfu15 65536,d1 diff --git a/gas/testsuite/gas/mri/char.d b/gas/testsuite/gas/mri/char.d new file mode 100644 index 0000000..025f4b5 --- /dev/null +++ b/gas/testsuite/gas/mri/char.d @@ -0,0 +1,9 @@ +#objcopy: -O srec +#name: MRI character constants +#as: -M + +# Test MRI character constants + +S0.* +S113....(61616263616263646500000061276200)|(61616263646362610000006500622761).* +#pass diff --git a/gas/testsuite/gas/mri/char.s b/gas/testsuite/gas/mri/char.s new file mode 100644 index 0000000..7b0a83a --- /dev/null +++ b/gas/testsuite/gas/mri/char.s @@ -0,0 +1,6 @@ +; Test MRI style character constants. + + dc.b 'a' + dc.b 'abc' + dc.l 'abcde' + dc.l 'a''b' diff --git a/gas/testsuite/gas/mri/comment.d b/gas/testsuite/gas/mri/comment.d new file mode 100644 index 0000000..30434dd --- /dev/null +++ b/gas/testsuite/gas/mri/comment.d @@ -0,0 +1,9 @@ +#nm: --extern-only +#name: MRI comments +#as: -M + +# Test MRI comments + +0+02 A RAM +0+01 A ROM + * U label diff --git a/gas/testsuite/gas/mri/comment.s b/gas/testsuite/gas/mri/comment.s new file mode 100644 index 0000000..857318f --- /dev/null +++ b/gas/testsuite/gas/mri/comment.s @@ -0,0 +1,13 @@ + xref label + xdef ROM,RAM + * this is a comment + + dc.l label loop if we haven't reach end yet + +ROM EQU $00000001 * word wide +RAM EQU $00000002 word wide + dc.l RAM + dc.l 0 ,really,a,comment +; a comment + ; another comment + ; another comment diff --git a/gas/testsuite/gas/mri/common.d b/gas/testsuite/gas/mri/common.d new file mode 100644 index 0000000..c1c1530 --- /dev/null +++ b/gas/testsuite/gas/mri/common.d @@ -0,0 +1,8 @@ +#nm: --extern-only +#name: MRI common sections +#as: -M + +# Test MRI common sections + +0+08 C 00com2 +0+08 C com1 diff --git a/gas/testsuite/gas/mri/common.s b/gas/testsuite/gas/mri/common.s new file mode 100644 index 0000000..d735c6b --- /dev/null +++ b/gas/testsuite/gas/mri/common.s @@ -0,0 +1,11 @@ +; Test MRI common sections + common com1 + ds.l 1 +com2 common 00 + ds.l 1 +incom ds.l 1 + common com1 + ds.l 1 + data + dc.l com1 + dc.l incom diff --git a/gas/testsuite/gas/mri/constants.d b/gas/testsuite/gas/mri/constants.d new file mode 100644 index 0000000..7210022 --- /dev/null +++ b/gas/testsuite/gas/mri/constants.d @@ -0,0 +1,20 @@ +#nm: --extern-only +#name: MRI constants +#as: -M + +# Test MRI style constants + +0*0 T foo +0*a A s01 +0*a A s02 +0*a A s03 +0*a A s04 +0*a A s05 +0*a A s06 +0*a A s07 +0*a A s08 +0*a A s09 +0*61 A s10 +0*61 A s11 +0*61626364 A s12 +0*61276200 A s13 diff --git a/gas/testsuite/gas/mri/constants.s b/gas/testsuite/gas/mri/constants.s new file mode 100644 index 0000000..0034e67 --- /dev/null +++ b/gas/testsuite/gas/mri/constants.s @@ -0,0 +1,31 @@ + xdef s01,s02,s03,s04,s05,s06,s07,s08,s09,s10,s11,s12,s13 +s01 equ %1010 +s02 equ 1010b +s03 equ @12 +s04 equ 12o +s05 equ 12q +s06 equ 10 +s07 equ 10d +s08 equ $a +s09 equ 0ah +s10 equ 'a' +s11 equ A'a' +s12 equ 'abcd' +s13 equ 'a''b' + + xdef foo +foo + moveq.l #%1010,d0 + moveq.l #1010b,d0 + moveq.l #@12,d0 + moveq.l #12o,d0 + moveq.l #12q,d0 + moveq.l #10,d0 + moveq.l #10d,d0 + moveq.l #$a,d0 + moveq.l #0ah,d0 + moveq.l #'a',d0 + moveq.l #A'a',d0 + nop + + end diff --git a/gas/testsuite/gas/mri/empty.s b/gas/testsuite/gas/mri/empty.s new file mode 100644 index 0000000..94c2cdd --- /dev/null +++ b/gas/testsuite/gas/mri/empty.s @@ -0,0 +1,9 @@ +SBT MACRO ; empty macro + ENDM + + SBT arg1 + SBT arg2 - one tww + SBT arg3 - one two three + SBT arg4 - one two three four + SBT arg5 - one two three four five + SBT arg6 - one two (three) diff --git a/gas/testsuite/gas/mri/equ.d b/gas/testsuite/gas/mri/equ.d new file mode 100644 index 0000000..e5f9a86 --- /dev/null +++ b/gas/testsuite/gas/mri/equ.d @@ -0,0 +1,7 @@ +#nm: --extern-only +#name: MRI EQU +#as: -M + +# Test the MRI EQU directive + +0*4 A SYMBOL diff --git a/gas/testsuite/gas/mri/equ.s b/gas/testsuite/gas/mri/equ.s new file mode 100644 index 0000000..a6512a1 --- /dev/null +++ b/gas/testsuite/gas/mri/equ.s @@ -0,0 +1,3 @@ +# Test the MRI EQU directive + XDEF SYMBOL +SYMBOL EQU 4 diff --git a/gas/testsuite/gas/mri/expr.d b/gas/testsuite/gas/mri/expr.d new file mode 100644 index 0000000..71dee4e --- /dev/null +++ b/gas/testsuite/gas/mri/expr.d @@ -0,0 +1,11 @@ +#nm: --extern-only +#name: MRI expressions +#as: -M + +# Test expressions in MRI mode + +00* A s1 +00*12 A s2 +00*6 A s3 +(00000000)?ff* A s4 +00* A s5 diff --git a/gas/testsuite/gas/mri/expr.s b/gas/testsuite/gas/mri/expr.s new file mode 100644 index 0000000..57677c1 --- /dev/null +++ b/gas/testsuite/gas/mri/expr.s @@ -0,0 +1,7 @@ +; Test expressions in MRI mode + xdef s1,s2,s3,s4,s5 +s1 equ 1>2 +s2 equ 3<<1*3 +s3 equ 5!!3 +s4 equ "0 +s5 equ (1>=2)!(1<>1) diff --git a/gas/testsuite/gas/mri/float.d b/gas/testsuite/gas/mri/float.d new file mode 100644 index 0000000..dea627a --- /dev/null +++ b/gas/testsuite/gas/mri/float.d @@ -0,0 +1,10 @@ +#objcopy: -O srec +#name: MRI floating point constants +#as: -M + +# Test MRI floating point constants + +S0.* +S118....(123456789ABCDEF03F800000412000004120000042)|(F0DEBC9A785634120000803F000020410000204100).* +S10.....(C80000)|(00C842).* +#pass diff --git a/gas/testsuite/gas/mri/float.s b/gas/testsuite/gas/mri/float.s new file mode 100644 index 0000000..637f9c6 --- /dev/null +++ b/gas/testsuite/gas/mri/float.s @@ -0,0 +1,7 @@ +; Test floating point constants in MRI mode. + + dc.d :1234_5678_9abc_def0 + dc.s 1.0 + dc.s 1e1 + dc.s 1_e_1 + dc.s 1E2 diff --git a/gas/testsuite/gas/mri/for.d b/gas/testsuite/gas/mri/for.d new file mode 100644 index 0000000..e75fb95 --- /dev/null +++ b/gas/testsuite/gas/mri/for.d @@ -0,0 +1,30 @@ +#objdump: -d --prefix-addresses +#name: MRI structured for +#as: -M + +# Test MRI structured for pseudo-op. + +.*: file format .* + +Disassembly of section .text: +0+000 <foo> clrw %d1 +0+002 <foo\+(0x|)2> movew #1,%d0 +0+006 <foo\+(0x|)6> cmpiw #10,%d0 +0+00a <foo\+(0x|)a> blts 0+016 <foo\+(0x|)16> +0+00c <foo\+(0x|)c> addw %d0,%d1 +0+00e <foo\+(0x|)e> bvcs 0+012 <foo\+(0x|)12> +0+010 <foo\+(0x|)10> bras 0+016 <foo\+(0x|)16> +0+012 <foo\+(0x|)12> addqw #2,%d0 +0+014 <foo\+(0x|)14> bras 0+006 <foo\+(0x|)6> +0+016 <foo\+(0x|)16> clrw %d1 +0+018 <foo\+(0x|)18> movew #10,%d0 +0+01c <foo\+(0x|)1c> cmpiw #1,%d0 +0+020 <foo\+(0x|)20> bgts 0+030 <foo\+(0x|)30> +0+022 <foo\+(0x|)22> cmpiw #100,%d1 +0+026 <foo\+(0x|)26> bgts 0+02a <foo\+(0x|)2a> +0+028 <foo\+(0x|)28> bras 0+02c <foo\+(0x|)2c> +0+02a <foo\+(0x|)2a> addw %d0,%d1 +0+02c <foo\+(0x|)2c> subqw #1,%d0 +0+02e <foo\+(0x|)2e> bras 0+01c <foo\+(0x|)1c> +0+030 <foo\+(0x|)30> nop +0+032 <foo\+(0x|)32> nop diff --git a/gas/testsuite/gas/mri/for.s b/gas/testsuite/gas/mri/for.s new file mode 100644 index 0000000..7524725 --- /dev/null +++ b/gas/testsuite/gas/mri/for.s @@ -0,0 +1,22 @@ +; Test MRI structured for pseudo-op. + + xdef foo +foo + clr d1 + for d0 = #1 to #10 by #2 do + add d0,d1 arbitrary text 'in comment field + if <vs> then + break + endi + endf + + clr d1 + for d0 = #10 downto #1 do + if d1 <ge> #100 then + next + endi + add d0,d1 + endf + + nop + nop diff --git a/gas/testsuite/gas/mri/if.d b/gas/testsuite/gas/mri/if.d new file mode 100644 index 0000000..832972c --- /dev/null +++ b/gas/testsuite/gas/mri/if.d @@ -0,0 +1,25 @@ +#objdump: -d --prefix-addresses +#name: MRI structured if +#as: -M + +# Test MRI structured if pseudo-op. + +.*: file format .* + +Disassembly of section .text: +0+000 <foo> cmpw %d1,%d0 +0+002 <foo\+(0x|)2> bles 0+014 <foo\+(0x|)14> +0+004 <foo\+(0x|)4> cmpw %d2,%d0 +0+006 <foo\+(0x|)6> bles 0+014 <foo\+(0x|)14> +0+008 <foo\+(0x|)8> cmpw %d1,%d2 +0+00a <foo\+(0x|)a> bles 0+010 <foo\+(0x|)10> +0+00c <foo\+(0x|)c> movew %d1,%d3 +0+00e <foo\+(0x|)e> bras 0+012 <foo\+(0x|)12> +0+010 <foo\+(0x|)10> movew %d2,%d3 +0+012 <foo\+(0x|)12> bras 0+01e <foo\+(0x|)1e> +0+014 <foo\+(0x|)14> cmpw %d0,%d1 +0+016 <foo\+(0x|)16> bgts 0+01c <foo\+(0x|)1c> +0+018 <foo\+(0x|)18> cmpw %d0,%d2 +0+01a <foo\+(0x|)1a> bles 0+01e <foo\+(0x|)1e> +0+01c <foo\+(0x|)1c> movew %d0,%d3 +0+01e <foo\+(0x|)1e> nop diff --git a/gas/testsuite/gas/mri/if.s b/gas/testsuite/gas/mri/if.s new file mode 100644 index 0000000..2646be8 --- /dev/null +++ b/gas/testsuite/gas/mri/if.s @@ -0,0 +1,17 @@ +; Test MRI structured if pseudo-op. + + xdef foo +foo + if d1 <gt> d0 and d2 <gt> d0 then + if d1 <gt> d2 then + move d1,d3 + else + move d2,d3 + endi + else + if d0 <gt> d1 or d0 <gt> d2 then + move d0,d3 + endi + endi + + nop diff --git a/gas/testsuite/gas/mri/immconst.d b/gas/testsuite/gas/mri/immconst.d new file mode 100644 index 0000000..ef2da10 --- /dev/null +++ b/gas/testsuite/gas/mri/immconst.d @@ -0,0 +1,22 @@ +#objdump: -d --prefix-addresses +#name: MRI immediate constants +#as: -M +#source: constants.s + +# Test MRI immediate constants + +.*: file format .* + +Disassembly of section .text: +0+000 <foo> moveq #10,%d0 +0+002 <foo\+(0x|)2> moveq #10,%d0 +0+004 <foo\+(0x|)4> moveq #10,%d0 +0+006 <foo\+(0x|)6> moveq #10,%d0 +0+008 <foo\+(0x|)8> moveq #10,%d0 +0+00a <foo\+(0x|)a> moveq #10,%d0 +0+00c <foo\+(0x|)c> moveq #10,%d0 +0+00e <foo\+(0x|)e> moveq #10,%d0 +0+010 <foo\+(0x|)10> moveq #10,%d0 +0+012 <foo\+(0x|)12> moveq #97,%d0 +0+014 <foo\+(0x|)14> moveq #97,%d0 +0+016 <foo\+(0x|)16> nop diff --git a/gas/testsuite/gas/mri/label.d b/gas/testsuite/gas/mri/label.d new file mode 100644 index 0000000..9ce5858 --- /dev/null +++ b/gas/testsuite/gas/mri/label.d @@ -0,0 +1,8 @@ +#nm: --extern-only +#name: MRI label +#as: -M + +# Test using an MRI style label + +0000* T LABEL +[ ]*U SYMBOL diff --git a/gas/testsuite/gas/mri/label.s b/gas/testsuite/gas/mri/label.s new file mode 100644 index 0000000..b05ec2a --- /dev/null +++ b/gas/testsuite/gas/mri/label.s @@ -0,0 +1,5 @@ +; Test using an MRI style label +* Also test MRI style comments +! And another comment + XDEF LABEL +LABEL DC.L SYMBOL ; And yet another comment diff --git a/gas/testsuite/gas/mri/moveml.d b/gas/testsuite/gas/mri/moveml.d new file mode 100644 index 0000000..2c36fa8 --- /dev/null +++ b/gas/testsuite/gas/mri/moveml.d @@ -0,0 +1,27 @@ +#objdump: -d +#name: MRI moveml +#as: -M + +.*: +file format .* + +Disassembly of section .text: + +0+000 <.text>: + 0: 4cdf 07fc moveml %sp@\+,%d2-%a2 + 4: 4cdf 07fc moveml %sp@\+,%d2-%a2 + 8: 48f9 07fc 0000 moveml %d2-%a2,0 <.text> + e: 0000 + 10: 48f9 07fc 0000 moveml %d2-%a2,0 <.text> + 16: 0000 + 18: 4cf9 07fc 0000 moveml 0 <.text>,%d2-%a2 + 1e: 0000 + 20: 4cf9 07fc 0000 moveml 0 <.text>,%d2-%a2 + 26: 0000 + 28: 4cf9 07fc 0001 moveml 16000 <fdsa>,%d2-%a2 + 2e: 6000 + 30: 4cf9 07fc 0001 moveml 16000 <fdsa>,%d2-%a2 + 36: 6000 + 38: 48f9 07fc 0001 moveml %d2-%a2,16000 <fdsa> + 3e: 6000 + 40: 48f9 07fc 0001 moveml %d2-%a2,16000 <fdsa> + 46: 6000 diff --git a/gas/testsuite/gas/mri/moveml.s b/gas/testsuite/gas/mri/moveml.s new file mode 100644 index 0000000..b8fc728 --- /dev/null +++ b/gas/testsuite/gas/mri/moveml.s @@ -0,0 +1,17 @@ +asdf reg a0-a2/d2-d7 +fdsa equ $16000 + + movem.l (sp)+,a0-a2/d2-d7 + movem.l (sp)+,asdf + + movem.l a0-a2/d2-d7,symbol + movem.l asdf,symbol + + movem.l symbol,a0-a2/d2-d7 + movem.l symbol,asdf + + movem.l fdsa,a0-a2/d2-d7 + movem.l fdsa,asdf + + movem.l a0-a2/d2-d7,fdsa + movem.l asdf,fdsa diff --git a/gas/testsuite/gas/mri/mri.exp b/gas/testsuite/gas/mri/mri.exp new file mode 100644 index 0000000..f3fcded --- /dev/null +++ b/gas/testsuite/gas/mri/mri.exp @@ -0,0 +1,28 @@ +# +# Test the m68k MRI compatibility mode. +# +# I originally thought that most of tests applied to any MRI +# assembler, but it turns out that different MRI assemblers use +# different syntaxes. +# + +if ![istarget "m68*-*-*"] { + return +} + +run_dump_test label +run_dump_test equ +run_dump_test constants +run_dump_test immconst +run_dump_test float +run_dump_test char +run_dump_test expr +run_dump_test common +run_dump_test comment +gas_test "empty.s" "-M" "" "MRI empty macro" +run_dump_test for +run_dump_test if +run_dump_test repeat +run_dump_test while +run_dump_test semi +run_dump_test moveml diff --git a/gas/testsuite/gas/mri/repeat.d b/gas/testsuite/gas/mri/repeat.d new file mode 100644 index 0000000..3cc5f63 --- /dev/null +++ b/gas/testsuite/gas/mri/repeat.d @@ -0,0 +1,16 @@ +#objdump: -d --prefix-addresses +#name: MRI structured repeat +#as: -M + +# Test MRI structured repeat pseudo-op. + +.*: file format .* + +Disassembly of section .text: +0+000 <foo> bccs 0+000 <foo> +0+002 <foo\+(0x|)2> clrw %d1 +0+004 <foo\+(0x|)4> addqw #1,%d1 +0+006 <foo\+(0x|)6> cmpiw #10,%d1 +0+00a <foo\+(0x|)a> bgts 0+004 <foo\+(0x|)4> +0+00c <foo\+(0x|)c> nop +0+00e <foo\+(0x|)e> nop diff --git a/gas/testsuite/gas/mri/repeat.s b/gas/testsuite/gas/mri/repeat.s new file mode 100644 index 0000000..0e4ea2b --- /dev/null +++ b/gas/testsuite/gas/mri/repeat.s @@ -0,0 +1,14 @@ +; Test MRI structured repeat pseudo-op. + + xdef foo +foo + repeat + until <cs> + + clr d1 + repeat + add #1,d1 + until d1 <ge> #10 + + nop + nop diff --git a/gas/testsuite/gas/mri/semi.d b/gas/testsuite/gas/mri/semi.d new file mode 100644 index 0000000..0decce1 --- /dev/null +++ b/gas/testsuite/gas/mri/semi.d @@ -0,0 +1,9 @@ +#objdump: -s -j .text +#name: MRI semi +#as: -M + +.*: .* + +Contents of section .text: + 0000 3b203b20 3a203a20 00000000 00000000 ; ; : : ........ + 0010 00000000 00000000 00000000 00000000 ................ diff --git a/gas/testsuite/gas/mri/semi.s b/gas/testsuite/gas/mri/semi.s new file mode 100644 index 0000000..5b30677 --- /dev/null +++ b/gas/testsuite/gas/mri/semi.s @@ -0,0 +1,14 @@ +semicolon macro + dc.b '; ' + endm + +colon macro + dc.b ': ' + endm + + semicolon + dc.b '; ' + colon + dc.b ': ' + + p2align 5 diff --git a/gas/testsuite/gas/mri/while.d b/gas/testsuite/gas/mri/while.d new file mode 100644 index 0000000..d8dd37a --- /dev/null +++ b/gas/testsuite/gas/mri/while.d @@ -0,0 +1,18 @@ +#objdump: -d --prefix-addresses +#name: MRI structured while +#as: -M + +# Test MRI structure while pseudo-op. + +.*: file format .* + +Disassembly of section .text: +0+000 <foo> bccs 0+004 <foo\+(0x|)4> +0+002 <foo\+(0x|)2> bras 0+000 <foo> +0+004 <foo\+(0x|)4> clrw %d1 +0+006 <foo\+(0x|)6> cmpiw #10,%d1 +0+00a <foo\+(0x|)a> blts 0+010 <foo\+(0x|)10> +0+00c <foo\+(0x|)c> addqw #1,%d1 +0+00e <foo\+(0x|)e> bras 0+006 <foo\+(0x|)6> +0+010 <foo\+(0x|)10> nop +0+012 <foo\+(0x|)12> nop diff --git a/gas/testsuite/gas/mri/while.s b/gas/testsuite/gas/mri/while.s new file mode 100644 index 0000000..35cbdbb --- /dev/null +++ b/gas/testsuite/gas/mri/while.s @@ -0,0 +1,14 @@ +; Test MRI structured while pseudo-op. + + xdef foo +foo + while <cs> do + endw + + clr d1 + while d1 <le> #10 do + add #1,d1 + endw + + nop + nop diff --git a/gas/testsuite/gas/ppc/astest.d b/gas/testsuite/gas/ppc/astest.d new file mode 100644 index 0000000..68aab55 --- /dev/null +++ b/gas/testsuite/gas/ppc/astest.d @@ -0,0 +1,74 @@ +#objdump: -Dr +#name: PowerPC test 1 + +.*: +file format elf32-powerpc + +Disassembly of section \.text: + +0+0000000 <foo>: + 0: 60 00 00 00 nop + 4: 60 00 00 00 nop + 8: 60 00 00 00 nop + +0+000000c <a>: + c: 48 00 00 04 b 10 <apfour> + +0+0000010 <apfour>: + 10: 48 00 00 08 b 18 <apfour\+0x8> + 14: 48 00 00 00 b 14 <apfour\+0x4> + 14: R_PPC_REL24 x + 18: 48 00 00 04 b 1c <apfour\+0xc> + 18: R_PPC_REL24 \.data\+0x4 + 1c: 48 00 00 00 b 1c <apfour\+0xc> + 1c: R_PPC_REL24 z + 20: 48 00 00 14 b 34 <apfour\+0x24> + 20: R_PPC_REL24 z\+0x14 + 24: 48 00 00 04 b 28 <apfour\+0x18> + 28: 48 00 00 00 b 28 <apfour\+0x18> + 28: R_PPC_REL24 a + 2c: 4b ff ff e4 b 10 <apfour> + 30: 48 00 00 04 b 34 <apfour\+0x24> + 30: R_PPC_REL24 a\+0x4 + 34: 4b ff ff e0 b 14 <apfour\+0x4> + 38: 48 00 00 00 b 38 <apfour\+0x28> + 38: R_PPC_LOCAL24PC a + 3c: 4b ff ff d4 b 10 <apfour> + + 40: 00 00 00 40 \.long 0x40 + 40: R_PPC_ADDR32 \.text\+0x40 + + 44: 00 00 00 4c \.long 0x4c + 44: R_PPC_ADDR32 \.text\+0x4c + 48: 00 00 00 00 \.long 0x0 + 48: R_PPC_REL32 x + 4c: 00 00 00 04 \.long 0x4 + 4c: R_PPC_REL32 x\+0x4 + \.\.\. + 50: R_PPC_REL32 z + 54: R_PPC_REL32 y + 58: R_PPC_ADDR32 x + 5c: R_PPC_ADDR32 y + 60: R_PPC_ADDR32 z + 64: ff ff ff fc fnmsub f31,f31,f31,f31 + 64: R_PPC_ADDR32 x\+0xf+ffffffc + 68: ff ff ff fc fnmsub f31,f31,f31,f31 + 68: R_PPC_ADDR32 y\+0xf+ffffffc + 6c: ff ff ff fc fnmsub f31,f31,f31,f31 + 6c: R_PPC_ADDR32 z\+0xf+ffffffc + 70: ff ff ff 9c \.long 0xffffff9c + 74: ff ff ff 9c \.long 0xffffff9c + \.\.\. + 78: R_PPC_ADDR32 a + 7c: R_PPC_ADDR32 b + 80: R_PPC_ADDR32 apfour + 84: ff ff ff fc fnmsub f31,f31,f31,f31 + 88: 00 00 00 02 \.long 0x2 + 88: R_PPC_ADDR32 apfour\+0x2 + 8c: 00 00 00 00 \.long 0x0 +Disassembly of section \.data: + +0+0000000 <x>: + 0: 00 00 00 00 \.long 0x0 + +0+0000004 <y>: + 4: 00 00 00 00 \.long 0x0 diff --git a/gas/testsuite/gas/ppc/astest.s b/gas/testsuite/gas/ppc/astest.s new file mode 100644 index 0000000..f1af216 --- /dev/null +++ b/gas/testsuite/gas/ppc/astest.s @@ -0,0 +1,52 @@ + .section ".data" + .globl x + .globl z +x: .long 0 +z = . + 4 +four = z - x - 4 +y: .long 0 + + .section ".text" +foo: + nop ; nop ; nop + .globl a +a: b .+4 +b: b .+8 + b x + b y + b z + b z+20 + b .+four + b a + b b + b a+4 + b b+4 + b a@local + b b@local + .long . + .long .+8 + .long x-. + .long x+4-. + .long z-. + .long y-. + .long x + .long y + .long z + .long x-four + .long y-four + .long z-four + .long a-. + .long b-. + .long a + .long b + +apfour = a + four + .long apfour + .long a-apfour + .long apfour+2 + .long apfour-b + + .type foo,@function + .type a,@function + .type b,@function + .type apfour,@function diff --git a/gas/testsuite/gas/ppc/astest2.d b/gas/testsuite/gas/ppc/astest2.d new file mode 100644 index 0000000..740e3bf --- /dev/null +++ b/gas/testsuite/gas/ppc/astest2.d @@ -0,0 +1,75 @@ +#objdump: -Dr +#name: PowerPC test 2 + +.*: +file format elf32-powerpc + +Disassembly of section .text: + +0+0000000 <foo>: + 0: 60 00 00 00 nop + 4: 60 00 00 00 nop + 8: 60 00 00 00 nop + c: 48 00 00 04 b 10 <foo\+0x10> + 10: 48 00 00 08 b 18 <foo\+0x18> + 14: 48 00 00 00 b 14 <foo\+0x14> + 14: R_PPC_REL24 x + 18: 48 00 00 04 b 1c <foo\+0x1c> + 18: R_PPC_REL24 .data\+0x4 + 1c: 48 00 00 00 b 1c <foo\+0x1c> + 1c: R_PPC_REL24 z + 20: 48 00 00 14 b 34 <foo\+0x34> + 20: R_PPC_REL24 z\+0x14 + 24: 48 00 00 04 b 28 <foo\+0x28> + 28: 48 00 00 00 b 28 <foo\+0x28> + 28: R_PPC_REL24 a + 2c: 48 00 00 50 b 7c <apfour> + 30: 48 00 00 04 b 34 <foo\+0x34> + 30: R_PPC_REL24 a\+0x4 + 34: 48 00 00 4c b 80 <apfour\+0x4> + 38: 48 00 00 00 b 38 <foo\+0x38> + 38: R_PPC_LOCAL24PC a + 3c: 48 00 00 40 b 7c <apfour> + + 40: 00 00 00 40 .long 0x40 + 40: R_PPC_ADDR32 .text\+0x40 + + 44: 00 00 00 4c .long 0x4c + 44: R_PPC_ADDR32 .text\+0x4c + 48: 00 00 00 00 .long 0x0 + 48: R_PPC_REL32 x + 4c: 00 00 00 04 .long 0x4 + 4c: R_PPC_REL32 x\+0x4 + ... + 50: R_PPC_REL32 z + 54: R_PPC_REL32 y + 58: R_PPC_ADDR32 x + 5c: R_PPC_ADDR32 y + 60: R_PPC_ADDR32 z + 64: ff ff ff fc fnmsub f31,f31,f31,f31 + 64: R_PPC_ADDR32 x\+0xf+ffffffc + 68: ff ff ff fc fnmsub f31,f31,f31,f31 + 68: R_PPC_ADDR32 y\+0xf+ffffffc + 6c: ff ff ff fc fnmsub f31,f31,f31,f31 + 6c: R_PPC_ADDR32 z\+0xf+ffffffc + 70: 00 00 00 08 .long 0x8 + 74: 00 00 00 08 .long 0x8 + +0+0000078 <a>: + 78: 00 00 00 00 .long 0x0 + 78: R_PPC_ADDR32 a + +0+000007c <apfour>: + ... + 7c: R_PPC_ADDR32 b + 80: R_PPC_ADDR32 apfour + 84: ff ff ff fc fnmsub f31,f31,f31,f31 + 88: 00 00 00 02 .long 0x2 + 88: R_PPC_ADDR32 apfour\+0x2 + 8c: 00 00 00 00 .long 0x0 +Disassembly of section .data: + +0+0000000 <x>: + 0: 00 00 00 00 .long 0x0 + +0+0000004 <y>: + 4: 00 00 00 00 .long 0x0 diff --git a/gas/testsuite/gas/ppc/astest2.s b/gas/testsuite/gas/ppc/astest2.s new file mode 100644 index 0000000..5af2233 --- /dev/null +++ b/gas/testsuite/gas/ppc/astest2.s @@ -0,0 +1,52 @@ +four = 4 + .section ".text" +foo: + nop ; nop ; nop + .globl a + b .+4 + b .+8 + b x + b y + b z + b z+20 + b .+four + b a + b b + b a+4 + b b+4 + b a@local + b b@local + .long . + .long .+8 + .long x-. + .long x+4-. + .long z-. + .long y-. + .long x + .long y + .long z + .long x-four + .long y-four + .long z-four + .long a-. + .long b-. +a: .long a +b: .long b + +apfour = a + four + .long apfour + .long a-apfour + .long apfour+2 + .long apfour-b + + .section ".data" + .globl x + .globl z +x: .long 0 +z = . + 4 +y: .long 0 + + .type foo,@function + .type a,@function + .type b,@function + .type apfour,@function diff --git a/gas/testsuite/gas/ppc/ppc.exp b/gas/testsuite/gas/ppc/ppc.exp new file mode 100644 index 0000000..572fbc3 --- /dev/null +++ b/gas/testsuite/gas/ppc/ppc.exp @@ -0,0 +1,21 @@ +# +# Some PowerPC tests +# + +# These tests are currently ELF specific, only because nobody has +# converted them to look for XCOFF relocations. + +if { [istarget powerpc*-*-*bsd*] \ + || [istarget powerpc*-*-elf*] \ + || [istarget powerpc*-*-eabi*] \ + || [istarget powerpc*-*-sysv4*] \ + || [istarget powerpc*-*-linux*] \ + || [istarget powerpc*-*-solaris*] \ + || [istarget powerpc*-*-rtems*] } then { + run_dump_test "astest" + run_dump_test "astest2" +} + +if { [istarget powerpc*-*-*] } then { + run_dump_test "simpshft" +} diff --git a/gas/testsuite/gas/ppc/simpshft.d b/gas/testsuite/gas/ppc/simpshft.d new file mode 100644 index 0000000..06893d5 --- /dev/null +++ b/gas/testsuite/gas/ppc/simpshft.d @@ -0,0 +1,27 @@ +#objdump: -s -j .text +#as: -mppc64 +#name: PowerPC test 3, simplified shifts + +.* + +Contents of section \.text: + 0000 78640fe0 7883f80e 78a545e4 78640020 xd..x...x.E.xd. + 0010 54640ffe 5083f800 54a5402e 5464043e Td..P...T.@.Td.> + 0020 78640004 786407e4 7864f806 7864ffe6 xd..xd..xd..xd.. + 0030 7864f842 7864ffe2 7864000c 7864080c xd.Bxd..xd..xd.. + 0040 78640fac 786407ec 78640000 78640800 xd..xd..xd..xd.. + 0050 7864f802 78640000 7864f802 78640800 xd..xd..xd..xd.. + 0060 78652010 786407e4 7864f806 78640000 xe .xd..xd..xd.. + 0070 7864f842 78640fe0 78640000 78640040 xd.Bxd..xd..xd.@ + 0080 786407e0 786407e4 786407a4 78640004 xd..xd..xd..xd.. + 0090 78640008 78640048 786407e8 78640fa8 xd..xd.Hxd..xd.. + 00a0 7864f80a 54640000 5464003e 5464f800 xd..Td..Td.>Td.. + 00b0 5464f83e 5464f87e 5464fffe 50640000 Td.>Td.~Td..Pd.. + 00c0 5064003e 50640ffe 5064f800 5064003e Pd.>Pd..Pd..Pd.> + 00d0 506407fe 5464003e 5464083e 5464f83e Pd..Td.>Td.>Td.> + 00e0 5464003e 5464f83e 5464083e 5c65203e Td.>Td.>Td.>\\e > + 00f0 5464003e 5464083c 5464f800 5464003e Td.>Td.<Td..Td.> + 0100 5464f87e 54640ffe 5464003e 5464007e Td.~Td..Td.>Td.~ + 0110 546407fe 5464003e 5464003c 54640000 Td..Td.>Td.<Td.. + 0120 5464003e 5464007e 546407fe 54640fbc Td.>Td.~Td..Td.. + 0130 5464f800 00000000 Td...... diff --git a/gas/testsuite/gas/ppc/simpshft.s b/gas/testsuite/gas/ppc/simpshft.s new file mode 100644 index 0000000..39ff98d --- /dev/null +++ b/gas/testsuite/gas/ppc/simpshft.s @@ -0,0 +1,110 @@ +# These are all the examples from section F.4 of +# "PowerPC Microprocessor Family: The Programming Environments". +# 64-bit examples + extrdi %r4,%r3,1,0 + insrdi %r3,%r4,1,0 + sldi %r5,%r5,8 + clrldi %r4,%r3,32 +# 32-bit examples + extrwi %r4,%r3,1,0 + insrwi %r3,%r4,1,0 + slwi %r5,%r5,8 + clrlwi %r4,%r3,16 + + +# These test the remaining corner cases for 64-bit operations. + extldi %r4,%r3,1,0 + extldi %r4,%r3,64,0 + extldi %r4,%r3,1,63 + extldi %r4,%r3,64,63 # bit weird, that one. + + extrdi %r4,%r3,63,0 + extrdi %r4,%r3,1,62 + + insrdi %r4,%r3,64,0 + insrdi %r4,%r3,63,0 + insrdi %r4,%r3,1,62 + insrdi %r4,%r3,1,63 + + rotldi %r4,%r3,0 + rotldi %r4,%r3,1 + rotldi %r4,%r3,63 + + rotrdi %r4,%r3,0 + rotrdi %r4,%r3,1 + rotrdi %r4,%r3,63 + + rotld %r5,%r3,%r4 + + sldi %r4,%r3,0 + sldi %r4,%r3,63 + + srdi %r4,%r3,0 + srdi %r4,%r3,1 + srdi %r4,%r3,63 + + clrldi %r4,%r3,0 + clrldi %r4,%r3,1 + clrldi %r4,%r3,63 + + clrrdi %r4,%r3,0 + clrrdi %r4,%r3,1 + clrrdi %r4,%r3,63 + + clrlsldi %r4,%r3,0,0 + clrlsldi %r4,%r3,1,0 + clrlsldi %r4,%r3,63,0 + clrlsldi %r4,%r3,63,1 + clrlsldi %r4,%r3,63,63 + +# These test the remaining corner cases for 32-bit operations. + extlwi %r4,%r3,1,0 + extlwi %r4,%r3,32,0 + extlwi %r4,%r3,1,31 + extlwi %r4,%r3,32,31 # bit weird, that one. + + extrwi %r4,%r3,31,0 + extrwi %r4,%r3,1,30 + + inslwi %r4,%r3,1,0 + inslwi %r4,%r3,32,0 + inslwi %r4,%r3,1,31 + + insrwi %r4,%r3,1,0 + insrwi %r4,%r3,32,0 + insrwi %r4,%r3,1,31 + + rotlwi %r4,%r3,0 + rotlwi %r4,%r3,1 + rotlwi %r4,%r3,31 + + rotrwi %r4,%r3,0 + rotrwi %r4,%r3,1 + rotrwi %r4,%r3,31 + + rotlw %r5,%r3,%r4 + + slwi %r4,%r3,0 + slwi %r4,%r3,1 + slwi %r4,%r3,31 + + srwi %r4,%r3,0 + srwi %r4,%r3,1 + srwi %r4,%r3,31 + + clrlwi %r4,%r3,0 + clrlwi %r4,%r3,1 + clrlwi %r4,%r3,31 + + clrrwi %r4,%r3,0 + clrrwi %r4,%r3,1 + clrrwi %r4,%r3,31 + + clrlslwi %r4,%r3,0,0 + clrlslwi %r4,%r3,1,0 + clrlslwi %r4,%r3,31,0 + clrlslwi %r4,%r3,31,1 + clrlslwi %r4,%r3,31,31 + +# Force alignment so that we pass the test on AIX + .p2align 3 diff --git a/gas/testsuite/gas/sh/basic.exp b/gas/testsuite/gas/sh/basic.exp new file mode 100644 index 0000000..30dbb0b --- /dev/null +++ b/gas/testsuite/gas/sh/basic.exp @@ -0,0 +1,86 @@ +# Copyright (C) 1995, 1996, 1997 Free Software Foundation, Inc. + +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; either version 2 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + +# Please email any bugs, comments, and/or additions to this file to: +# DejaGnu@cygnus.com + +# Written by Cygnus Support. + +proc do_fp {} { + set testname "fp.s: floating point tests (sh3e)" + set x 0 + + gas_start "fp.s" "-al" + + # Check the assembled instruction against a table built by the HP assembler + # Any differences should be checked by hand -- with the number of problems + # I've seen in the HP assembler I don't completely trust it. + # + # Instead of having a variable for each match string just increment the + # total number of matches seen. That's simpler when testing large numbers + # of instructions (as these tests to). + while 1 { + expect { + -re "^ +\[0-9\]+ 0000 F008\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0002 F00A\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0004 F009\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0006 F00B\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0008 F006\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 000a F007\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 000c F10C\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 000e F08D\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0010 F09D\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0012 F100\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0014 F101\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0016 F102\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0018 F103\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 001a F10E\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 001c F104\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 001e F105\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0020 F04D\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0022 F05D\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0024 F06D\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0026 F02D\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0028 F03D\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 002a F00D\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 002c F01D\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 002e 435A\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0030 4356\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0032 436A\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0034 4366\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0036 035A\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0038 4352\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 003a 036A\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 003c 4362\[^\n\]*\n" { set x [expr $x+1] } + -re "\[^\n\]*\n" { } + timeout { perror "timeout\n"; break } + eof { break } + } + } + + # This was intended to do any cleanup necessary. It kinda looks like it + # isn't needed, but just in case, please keep it in for now. + gas_finish + + # Did we find what we were looking for? If not, flunk it. + if [expr $x==31] then { pass $testname } else { fail $testname } +} + + +if [istarget sh*-*-*] then { + # Test the basic instruction parser. + do_fp +} diff --git a/gas/testsuite/gas/sh/fp.s b/gas/testsuite/gas/sh/fp.s new file mode 100644 index 0000000..352d864 --- /dev/null +++ b/gas/testsuite/gas/sh/fp.s @@ -0,0 +1,44 @@ + .file "test.c" + .data + +! Hitachi SH cc1 (cygnus-2.7.1-950728) arguments: -O -fpeephole +! -ffunction-cse -freg-struct-return -fdelayed-branch -fcommon -fgnu-linker + +gcc2_compiled.: +___gnu_compiled_c: + .text + .align 2 + .global _foo +_foo: + fmov.s @r0,fr0 + fmov.s fr0,@r0 + fmov.s @r0+,fr0 + fmov.s fr0,@-r0 + fmov.s @(r0,r0),fr0 + fmov.s fr0,@(r0,r0) + fmov fr0,fr1 + fldi0 fr0 + fldi1 fr0 + fadd fr0,fr1 + fsub fr0,fr1 + fmul fr0,fr1 + fdiv fr0,fr1 + fmac fr0,fr0,fr1 + fcmp/eq fr0,fr1 + fcmp/gt fr0,fr1 + fneg fr0 + fabs fr0 + fsqrt fr0 + float fpul,fr0 + ftrc fr0,fpul + fsts fpul,fr0 + flds fr0,fpul + lds r3,fpul + lds.l @r3+,fpul + lds r3,fpscr + lds.l @r3+,fpscr + sts fpul,r3 + sts.l fpul,@-r3 + sts fpscr,r3 + sts.l fpscr,@-r3 + diff --git a/gas/testsuite/gas/sparc-solaris/addend.exp b/gas/testsuite/gas/sparc-solaris/addend.exp new file mode 100644 index 0000000..27838c7 --- /dev/null +++ b/gas/testsuite/gas/sparc-solaris/addend.exp @@ -0,0 +1,36 @@ +# +# Solaris on SPARC tests +# + +if [istarget sparc*-*-solaris2*] then { + set x1 0 + set x2 0 + set x3 0 + set x4 0 + set x5 0 + set x6 0 + set testname "addends (part 2)" + if [gas_test_old "addend.s" "" "addends (part 1)"] then { + objdump_start_no_subdir "a.out" "-r" + while 1 { + # These are what we get using the Solaris assembler. + expect { + -re "08 R_SPARC_WDISP22 +foo1\[+\]+0x0+04\[^\n\]*\n" { incr x1 } + -re "0c R_SPARC_WDISP22 +foo1\[+\]+0x0+04\[^\n\]*\n" { incr x2 } + -re "10 R_SPARC_WDISP22 +foo1\[^\n\]*\n" { incr x3 } + -re "14 R_SPARC_WDISP22 +foo1\[^\n\]*\n" { incr x4 } + -re "1c R_SPARC_32 +foo1\[^\n\]*\n" { incr x5 } + -re "20 R_SPARC_32 +foo1\[+\]+0x0+04\[^\n\]*\n" { incr x6 } + -re "\[^\n\]*\n" { } + timeout { perror "timeout\n"; break } + eof { break } + } + } + objdump_finish + if [all_ones $x1 $x2 $x3 $x4 $x5 $x6] then { + pass $testname + } else { + fail $testname + } + } +} diff --git a/gas/testsuite/gas/sparc-solaris/addend.s b/gas/testsuite/gas/sparc-solaris/addend.s new file mode 100644 index 0000000..18eb108 --- /dev/null +++ b/gas/testsuite/gas/sparc-solaris/addend.s @@ -0,0 +1,11 @@ + .global foo +foo: + nop + nop + ba foo1+0x4 + ba foo1+0x4 + ba foo1 + ba foo1 + nop + .word foo1 + .word foo1+4 diff --git a/gas/testsuite/gas/sparc-solaris/gas.exp b/gas/testsuite/gas/sparc-solaris/gas.exp new file mode 100644 index 0000000..63af691 --- /dev/null +++ b/gas/testsuite/gas/sparc-solaris/gas.exp @@ -0,0 +1,10 @@ +# +# Solaris-2 on SPARC tests +# +# The two compilers, cc and gcc, generate quite different debugging +# records. Verify that we can accept both. +# +if [istarget sparc-*-solaris2*] then { + gas_test "sol-cc.s" "" $stdoptlist "SPARC Solaris cc -g" + gas_test "sol-gcc.s" "" $stdoptlist "SPARC Solaris gcc -g" +} diff --git a/gas/testsuite/gas/sparc-solaris/sol-cc.s b/gas/testsuite/gas/sparc-solaris/sol-cc.s new file mode 100644 index 0000000..8a250da --- /dev/null +++ b/gas/testsuite/gas/sparc-solaris/sol-cc.s @@ -0,0 +1,81 @@ + .section ".text" ! [internal] + .proc 4 + .global main + .align 4 + .global main +main: +!#PROLOGUE# 0 +!#PROLOGUE# 1 + save %sp,-96,%sp + sethi %hi(.L18),%o0 + sethi %hi(msg),%o1 + or %o1,%lo(msg),%o1 ! [internal] + call printf,2 + or %o0,%lo(.L18),%o0 ! [internal] + ret + restore %g0,0,%o0 + .type main,#function + .size main,(.-main) + .section ".data" ! [internal] + .align 4 +Ddata.data: + .section ".bss" ! [internal] +Bbss.bss: + .section ".rodata" ! [internal] +Drodata.rodata: + .file "hi-sol.c" + .global msg + .global msg +msg: + .ascii "hello, world!\0" + .type msg,#object + .size msg,14 + .section ".data1", #write, #alloc ! [internal] + .align 4 +.L18: + .ascii "%s\n\0" + .ident "acomp: (CDS) SPARCompilers 2.0.1 03 Sep 1992" + .section "text" ! [internal] + .stabs "/cygint/s1/users/raeburn/",100,0,0,0 + .stabs "hi-sol.c",100,0,3,0 + .stabs "",56,0,0,0 + .stabs "",56,0,0,0 + .stabs "Xt ; g ; O ; V=2.0",60,0,0,0x2bb773ba + .stabs "char:t(0,1)=bsc1;0;8;",128,0,0,0 + .stabs "short:t(0,2)=bs2;0;16;",128,0,0,0 + .stabs "int:t(0,3)=bs4;0;32;",128,0,0,0 + .stabs "long:t(0,4)=bs4;0;32;",128,0,0,0 + .stabs "long long:t(0,5)=bs8;0;64;",128,0,0,0 + .stabs "signed char:t(0,6)=bsc1;0;8;",128,0,0,0 + .stabs "signed short:t(0,7)=bs2;0;16;",128,0,0,0 + .stabs "signed int:t(0,8)=bs4;0;32;",128,0,0,0 + .stabs "signed long:t(0,9)=bs4;0;32;",128,0,0,0 + .stabs "signed long long:t(0,10)=bs8;0;64;",128,0,0,0 + .stabs "unsigned char:t(0,11)=buc1;0;8;",128,0,0,0 + .stabs "unsigned short:t(0,12)=bu2;0;16;",128,0,0,0 + .stabs "unsigned int:t(0,13)=bu4;0;32;",128,0,0,0 + .stabs "unsigned long:t(0,14)=bu4;0;32;",128,0,0,0 + .stabs "unsigned long long:t(0,15)=bu8;0;64;",128,0,0,0 + .stabs "float:t(0,16)=R1;4;",128,0,0,0 + .stabs "double:t(0,17)=R2;8;",128,0,0,0 + .stabs "long double:t(0,18)=R6;16;",128,0,0,0 + .stabs "void:t(0,19)=bs0;0;0",128,0,0,0 + .stabs "msg:G(0,20)=ar(0,3);0;13;(0,1)",32,0,14,0 + .stabs "main:F(0,3);(0,3);(0,21)=*(0,22)=*(0,1)",36,0,0,main + .stabs "main",42,0,0,0 + .stabn 192,0,1,0 + .stabn 68,0,4,0 + .stabs "argc:p(0,3)",160,0,4,68 + .stabs "argv:p(0,21)",160,0,4,72 + .stabs "printf:P(0,3)",36,0,0,0 + .stabn 224,0,1,0 + .stabs "",98,0,0,0 + .section "text" ! [internal] + .xstabs ".stab.index","/cygint/s1/users/raeburn/",100,0,0,0 + .xstabs ".stab.index","hi-sol.c",100,0,3,0 + .xstabs ".stab.index","",56,0,0,0 + .xstabs ".stab.index","",56,0,0,0 + .xstabs ".stab.index","Xt ; g ; O ; V=2.0",60,0,0,0x2bb773ba + .xstabs ".stab.index","msg",32,0,0,0 + .xstabs ".stab.index","main",42,0,0,0 + .xstabs ".stab.index","main",36,0,0,0 diff --git a/gas/testsuite/gas/sparc-solaris/sol-gcc.s b/gas/testsuite/gas/sparc-solaris/sol-gcc.s new file mode 100644 index 0000000..295fdcd --- /dev/null +++ b/gas/testsuite/gas/sparc-solaris/sol-gcc.s @@ -0,0 +1,66 @@ + .file "hi-sol.c" +.stabs "/1h/devo/src/gas/testsuite/gas/",100,0,0,.LLtext0 +.stabs "hi-sol.c",100,0,0,.LLtext0 +.section ".text" +.LLtext0: + .stabs "gcc2_compiled.", 0x3c, 0, 0, 0 +.stabs "int:t1=r1;-2147483648;2147483647;",128,0,0,0 +.stabs "char:t2=r2;0;127;",128,0,0,0 +.stabs "long int:t3=r1;-2147483648;2147483647;",128,0,0,0 +.stabs "unsigned int:t4=r1;0;-1;",128,0,0,0 +.stabs "long unsigned int:t5=r1;0;-1;",128,0,0,0 +.stabs "short int:t6=r1;-32768;32767;",128,0,0,0 +.stabs "long long int:t7=r1;0;-1;",128,0,0,0 +.stabs "short unsigned int:t8=r1;0;65535;",128,0,0,0 +.stabs "long long unsigned int:t9=r1;0;-1;",128,0,0,0 +.stabs "signed char:t10=r1;-128;127;",128,0,0,0 +.stabs "unsigned char:t11=r1;0;255;",128,0,0,0 +.stabs "float:t12=r1;4;0;",128,0,0,0 +.stabs "double:t13=r1;8;0;",128,0,0,0 +.stabs "long double:t14=r1;8;0;",128,0,0,0 +.stabs "void:t15=15",128,0,0,0 +.stabs "msg:G16=ar1;0;13;2",32,0,0,0 + .global msg +.section ".rodata" + .align 8 + .type msg,#object + .size msg,14 +msg: + .asciz "hello, world!" + .align 8 +.LLC0: + .asciz "%s\n" +.section ".text" + .align 4 +.stabs "main:F1",36,0,0,main +.stabs "argc:P1",64,0,0,24 +.stabs "argv:P17=*18=*2",64,0,0,25 + .global main + .type main,#function + .proc 04 +main: +.stabn 68,0,4,.LM1-main +.LM1: + !#PROLOGUE# 0 + save %sp,-112,%sp + !#PROLOGUE# 1 +.stabn 68,0,5,.LM2-main +.LM2: +.LLBB2: + sethi %hi(.LLC0),%o0 + or %o0,%lo(.LLC0),%o0 + sethi %hi(msg),%o1 + call printf,0 + or %o1,%lo(msg),%o1 +.stabn 68,0,6,.LM3-main +.LM3: +.stabn 68,0,7,.LM4-main +.LM4: +.LLBE2: + ret + restore %g0,0,%o0 +.LLfe1: + .size main,.LLfe1-main +.stabn 192,0,0,.LLBB2-main +.stabn 224,0,0,.LLBE2-main + .ident "GCC: (GNU) cygnus-2.3.3" diff --git a/gas/testsuite/gas/sparc/asi.d b/gas/testsuite/gas/sparc/asi.d new file mode 100644 index 0000000..835ea1a --- /dev/null +++ b/gas/testsuite/gas/sparc/asi.d @@ -0,0 +1,35 @@ +#as: -Av9 +#objdump: -dr +#name: sparc64 asi + +.*: +file format .*sparc.* + +Disassembly of section .text: + +0+ <.text>: + 0: c4 80 40 00 lda \[ %g1 \] \(0\), %g2 + 4: c4 80 5f e0 lda \[ %g1 \] \(255\), %g2 + 8: c4 80 42 00 lda \[ %g1 \] #ASI_AIUP, %g2 + c: c4 80 42 20 lda \[ %g1 \] #ASI_AIUS, %g2 + 10: c4 80 43 00 lda \[ %g1 \] #ASI_AIUP_L, %g2 + 14: c4 80 43 20 lda \[ %g1 \] #ASI_AIUS_L, %g2 + 18: c4 80 50 00 lda \[ %g1 \] #ASI_P, %g2 + 1c: c4 80 50 20 lda \[ %g1 \] #ASI_S, %g2 + 20: c4 80 50 40 lda \[ %g1 \] #ASI_PNF, %g2 + 24: c4 80 50 60 lda \[ %g1 \] #ASI_SNF, %g2 + 28: c4 80 51 00 lda \[ %g1 \] #ASI_P_L, %g2 + 2c: c4 80 51 20 lda \[ %g1 \] #ASI_S_L, %g2 + 30: c4 80 51 40 lda \[ %g1 \] #ASI_PNF_L, %g2 + 34: c4 80 51 60 lda \[ %g1 \] #ASI_SNF_L, %g2 + 38: c4 80 42 00 lda \[ %g1 \] #ASI_AIUP, %g2 + 3c: c4 80 42 20 lda \[ %g1 \] #ASI_AIUS, %g2 + 40: c4 80 43 00 lda \[ %g1 \] #ASI_AIUP_L, %g2 + 44: c4 80 43 20 lda \[ %g1 \] #ASI_AIUS_L, %g2 + 48: c4 80 50 00 lda \[ %g1 \] #ASI_P, %g2 + 4c: c4 80 50 20 lda \[ %g1 \] #ASI_S, %g2 + 50: c4 80 50 40 lda \[ %g1 \] #ASI_PNF, %g2 + 54: c4 80 50 60 lda \[ %g1 \] #ASI_SNF, %g2 + 58: c4 80 51 00 lda \[ %g1 \] #ASI_P_L, %g2 + 5c: c4 80 51 20 lda \[ %g1 \] #ASI_S_L, %g2 + 60: c4 80 51 40 lda \[ %g1 \] #ASI_PNF_L, %g2 + 64: c4 80 51 60 lda \[ %g1 \] #ASI_SNF_L, %g2 diff --git a/gas/testsuite/gas/sparc/asi.s b/gas/testsuite/gas/sparc/asi.s new file mode 100644 index 0000000..c56fe9c --- /dev/null +++ b/gas/testsuite/gas/sparc/asi.s @@ -0,0 +1,28 @@ +# Test asi's. + .text + lduwa [%g1]0,%g2 + lduwa [%g1]255,%g2 + lduwa [%g1]#ASI_AIUP,%g2 + lduwa [%g1]#ASI_AIUS,%g2 + lduwa [%g1]#ASI_AIUP_L,%g2 + lduwa [%g1]#ASI_AIUS_L,%g2 + lduwa [%g1]#ASI_P,%g2 + lduwa [%g1]#ASI_S,%g2 + lduwa [%g1]#ASI_PNF,%g2 + lduwa [%g1]#ASI_SNF,%g2 + lduwa [%g1]#ASI_P_L,%g2 + lduwa [%g1]#ASI_S_L,%g2 + lduwa [%g1]#ASI_PNF_L,%g2 + lduwa [%g1]#ASI_SNF_L,%g2 + lduwa [%g1]#ASI_AS_IF_USER_PRIMARY,%g2 + lduwa [%g1]#ASI_AS_IF_USER_SECONDARY,%g2 + lduwa [%g1]#ASI_AS_IF_USER_PRIMARY_LITTLE,%g2 + lduwa [%g1]#ASI_AS_IF_USER_SECONDARY_LITTLE,%g2 + lduwa [%g1]#ASI_PRIMARY,%g2 + lduwa [%g1]#ASI_SECONDARY,%g2 + lduwa [%g1]#ASI_PRIMARY_NOFAULT,%g2 + lduwa [%g1]#ASI_SECONDARY_NOFAULT,%g2 + lduwa [%g1]#ASI_PRIMARY_LITTLE,%g2 + lduwa [%g1]#ASI_SECONDARY_LITTLE,%g2 + lduwa [%g1]#ASI_PRIMARY_NOFAULT_LITTLE,%g2 + lduwa [%g1]#ASI_SECONDARY_NOFAULT_LITTLE,%g2 diff --git a/gas/testsuite/gas/sparc/membar.d b/gas/testsuite/gas/sparc/membar.d new file mode 100644 index 0000000..6ab6b2e --- /dev/null +++ b/gas/testsuite/gas/sparc/membar.d @@ -0,0 +1,19 @@ +#as: -Av9 +#objdump: -dr +#name: sparc64 membar + +.*: +file format .*sparc.* + +Disassembly of section .text: + +0+ <.text>: + 0: 81 43 e0 00 membar 0 + 4: 81 43 e0 7f membar #Sync|#MemIssue|#Lookaside|#StoreStore|#LoadStore|#StoreLoad|#LoadLoad + 8: 81 43 e0 7f membar #Sync|#MemIssue|#Lookaside|#StoreStore|#LoadStore|#StoreLoad|#LoadLoad + c: 81 43 e0 40 membar #Sync + 10: 81 43 e0 20 membar #MemIssue + 14: 81 43 e0 10 membar #Lookaside + 18: 81 43 e0 08 membar #StoreStore + 1c: 81 43 e0 04 membar #LoadStore + 20: 81 43 e0 02 membar #StoreLoad + 24: 81 43 e0 01 membar #LoadLoad diff --git a/gas/testsuite/gas/sparc/membar.s b/gas/testsuite/gas/sparc/membar.s new file mode 100644 index 0000000..d805e07 --- /dev/null +++ b/gas/testsuite/gas/sparc/membar.s @@ -0,0 +1,12 @@ +# Test membar args + .text + membar 0 + membar 127 + membar #Sync|#MemIssue|#Lookaside|#StoreStore|#LoadStore|#StoreLoad|#LoadLoad + membar #Sync + membar #MemIssue + membar #Lookaside + membar #StoreStore + membar #LoadStore + membar #StoreLoad + membar #LoadLoad diff --git a/gas/testsuite/gas/sparc/mism-1.s b/gas/testsuite/gas/sparc/mism-1.s new file mode 100644 index 0000000..fac5e48 --- /dev/null +++ b/gas/testsuite/gas/sparc/mism-1.s @@ -0,0 +1,22 @@ +! Test architecture mismatch warnings. +! We don't test every possible mismatch, we just want to be reasonable sure +! the mismatch checking code works. +! +! { dg-do assemble { target sparc*-*-* } } +! { dg-options -Av6 } + +! sparclite + + divscc %g1,%g2,%g3 ! { dg-error "mismatch|sparclite" "sparclite divscc mismatch" } + + scan %g1,%g2,%g3 ! { dg-error "mismatch|sparclite" "sparclite scan mismatch" } + +! v9 + + movrz %g1,%g2,%g3 ! { dg-error "mismatch|v9" "v9 fp reg mismatch" } + +! v9a + + shutdown ! { dg-error "mismatch|v9a" "v9a shutdown mismatch" } + +foo: diff --git a/gas/testsuite/gas/sparc/mismatch.exp b/gas/testsuite/gas/sparc/mismatch.exp new file mode 100644 index 0000000..6f89de2 --- /dev/null +++ b/gas/testsuite/gas/sparc/mismatch.exp @@ -0,0 +1,20 @@ +# Test architecture mismatch errors. +# +# GAS issues two lines of error text for each mismatch: +# +# mm-lite.s:7: Error: Architecture mismatch on "divscc". +# mm-lite.s:7: (Requires sparclite; requested architecture is v8.) +# +# The suggested regexp argument to dg-error is "mismatch|<arch>". + +if [istarget sparc*-*-*] { + + load_lib gas-dg.exp + + dg-init + + dg-runtest [lsort [glob -nocomplain $srcdir/$subdir/mism-*.s]] "" "" + + dg-finish + +} diff --git a/gas/testsuite/gas/sparc/prefetch.d b/gas/testsuite/gas/sparc/prefetch.d new file mode 100644 index 0000000..41803ed --- /dev/null +++ b/gas/testsuite/gas/sparc/prefetch.d @@ -0,0 +1,19 @@ +#as: -Av9 +#objdump: -dr +#name: sparc64 prefetch + +.*: +file format .*sparc.* + +Disassembly of section .text: + +0+ <.text>: + 0: c1 68 40 00 prefetch \[ %g1 \], #n_reads + 4: ff 68 40 00 prefetch \[ %g1 \], 31 + 8: c1 68 40 00 prefetch \[ %g1 \], #n_reads + c: c3 68 40 00 prefetch \[ %g1 \], #one_read + 10: c5 68 40 00 prefetch \[ %g1 \], #n_writes + 14: c7 68 40 00 prefetch \[ %g1 \], #one_write + 18: c1 e8 42 00 prefetcha \[ %g1 \] #ASI_AIUP, #n_reads + 1c: ff e8 60 00 prefetcha \[ %g1 \] %asi, 31 + 20: c1 e8 42 20 prefetcha \[ %g1 \] #ASI_AIUS, #n_reads + 24: c3 e8 60 00 prefetcha \[ %g1 \] %asi, #one_read diff --git a/gas/testsuite/gas/sparc/prefetch.s b/gas/testsuite/gas/sparc/prefetch.s new file mode 100644 index 0000000..18c68bb --- /dev/null +++ b/gas/testsuite/gas/sparc/prefetch.s @@ -0,0 +1,11 @@ + .text + prefetch [%g1],0 + prefetch [%g1],31 + prefetch [%g1],#n_reads + prefetch [%g1],#one_read + prefetch [%g1],#n_writes + prefetch [%g1],#one_write + prefetcha [%g1]#ASI_AIUP,0 + prefetcha [%g1]%asi,31 + prefetcha [%g1]#ASI_AIUS,#n_reads + prefetcha [%g1]%asi,#one_read diff --git a/gas/testsuite/gas/sparc/rdpr.d b/gas/testsuite/gas/sparc/rdpr.d new file mode 100644 index 0000000..60a7b61 --- /dev/null +++ b/gas/testsuite/gas/sparc/rdpr.d @@ -0,0 +1,26 @@ +#as: -Av9 +#objdump: -dr +#name: sparc64 rdpr + +.*: +file format .*sparc.* + +Disassembly of section .text: + +0+ <.text>: + 0: 83 50 00 00 rdpr %tpc, %g1 + 4: 85 50 40 00 rdpr %tnpc, %g2 + 8: 87 50 80 00 rdpr %tstate, %g3 + c: 89 50 c0 00 rdpr %tt, %g4 + 10: 8b 51 00 00 rdpr %tick, %g5 + 14: 8d 51 40 00 rdpr %tba, %g6 + 18: 8f 51 80 00 rdpr %pstate, %g7 + 1c: 91 51 c0 00 rdpr %tl, %o0 + 20: 93 52 00 00 rdpr %pil, %o1 + 24: 95 52 40 00 rdpr %cwp, %o2 + 28: 97 52 80 00 rdpr %cansave, %o3 + 2c: 99 52 c0 00 rdpr %canrestore, %o4 + 30: 9b 53 00 00 rdpr %cleanwin, %o5 + 34: 9d 53 40 00 rdpr %otherwin, %sp + 38: 9f 53 80 00 rdpr %wstate, %o7 + 3c: a1 53 c0 00 rdpr %fq, %l0 + 40: a3 57 c0 00 rdpr %ver, %l1 diff --git a/gas/testsuite/gas/sparc/rdpr.s b/gas/testsuite/gas/sparc/rdpr.s new file mode 100644 index 0000000..f44619c --- /dev/null +++ b/gas/testsuite/gas/sparc/rdpr.s @@ -0,0 +1,19 @@ +# Test rdpr + .text + rdpr %tpc,%g1 + rdpr %tnpc,%g2 + rdpr %tstate,%g3 + rdpr %tt,%g4 + rdpr %tick,%g5 + rdpr %tba,%g6 + rdpr %pstate,%g7 + rdpr %tl,%o0 + rdpr %pil,%o1 + rdpr %cwp,%o2 + rdpr %cansave,%o3 + rdpr %canrestore,%o4 + rdpr %cleanwin,%o5 + rdpr %otherwin,%o6 + rdpr %wstate,%o7 + rdpr %fq,%l0 + rdpr %ver,%l1 diff --git a/gas/testsuite/gas/sparc/reloc64.d b/gas/testsuite/gas/sparc/reloc64.d new file mode 100644 index 0000000..f4b825a --- /dev/null +++ b/gas/testsuite/gas/sparc/reloc64.d @@ -0,0 +1,76 @@ +#as: -Av9 +#objdump: -dr +#name: sparc64 reloc64 + +.*: +file format .*sparc.* + +Disassembly of section .text: + +0+ <foo>: + 0: 03 04 8d 15 sethi %hi\(0x12345400\), %g1 + 4: 82 10 62 78 or %g1, 0x278, %g1.* + 8: 01 00 00 00 nop + c: 03 00 00 00 sethi %hi\(0x0\), %g1 + c: R_SPARC_HH22 .text + 10: 82 10 60 00 mov %g1, %g1 ! 0 <foo> + 10: R_SPARC_HM10 .text + 14: 01 00 00 00 nop + 18: 03 00 00 00 sethi %hi\(0x0\), %g1 + 18: R_SPARC_HH22 .text\+0x1234567800000000 + 1c: 82 10 60 00 mov %g1, %g1 ! 0 <foo> + 1c: R_SPARC_HM10 .text\+0x1234567800000000 + 20: 01 00 00 00 nop + 24: 03 3f b7 2e sethi %hi\(0xfedcb800\), %g1 + 28: 82 10 62 98 or %g1, 0x298, %g1.* + 2c: 05 1d 95 0c sethi %hi\(0x76543000\), %g2 + 30: 84 10 62 10 or %g1, 0x210, %g2 + 34: 01 00 00 00 nop + 38: 03 00 00 00 sethi %hi\(0x0\), %g1 + 38: R_SPARC_HH22 .text + 3c: 82 10 60 00 mov %g1, %g1 ! 0 <foo> + 3c: R_SPARC_HM10 .text + 40: 05 00 00 00 sethi %hi\(0x0\), %g2 + 40: R_SPARC_LM22 .text + 44: 84 10 60 00 mov %g1, %g2 + 44: R_SPARC_LO10 .text + 48: 01 00 00 00 nop + 4c: 03 00 00 00 sethi %hi\(0x0\), %g1 + 4c: R_SPARC_HH22 .text\+0xfedcba9876543210 + 50: 82 10 60 00 mov %g1, %g1 ! 0 <foo> + 50: R_SPARC_HM10 .text\+0xfedcba9876543210 + 54: 05 00 00 00 sethi %hi\(0x0\), %g2 + 54: R_SPARC_LM22 .text\+0xfedcba9876543210 + 58: 84 10 60 00 mov %g1, %g2 + 58: R_SPARC_LO10 .text\+0xfedcba9876543210 + 5c: 01 00 00 00 nop + 60: 03 2a 61 d9 sethi %hi\(0xa9876400\), %g1 + 64: 82 10 61 43 or %g1, 0x143, %g1.* + 68: 82 10 62 10 or %g1, 0x210, %g1 + 6c: 01 00 00 00 nop + 70: 03 00 00 00 sethi %hi\(0x0\), %g1 + 70: R_SPARC_H44 .text + 74: 82 10 60 00 mov %g1, %g1 ! 0 <foo> + 74: R_SPARC_M44 .text + 78: 82 10 60 00 mov %g1, %g1 + 78: R_SPARC_L44 .text + 7c: 01 00 00 00 nop + 80: 03 00 00 00 sethi %hi\(0x0\), %g1 + 80: R_SPARC_H44 .text\+0xa9876543210 + 84: 82 10 60 00 mov %g1, %g1 ! 0 <foo> + 84: R_SPARC_M44 .text\+0xa9876543210 + 88: 82 10 60 00 mov %g1, %g1 + 88: R_SPARC_L44 .text\+0xa9876543210 + 8c: 01 00 00 00 nop + 90: 03 22 6a f3 sethi %hi\(0x89abcc00\), %g1 + 94: 82 18 7e 10 xor %g1, -496, %g1 + 98: 01 00 00 00 nop + 9c: 03 00 00 00 sethi %hi\(0x0\), %g1 + 9c: R_SPARC_HIX22 .text + a0: 82 18 60 00 xor %g1, 0, %g1 + a0: R_SPARC_LOX10 .text + a4: 01 00 00 00 nop + a8: 03 00 00 00 sethi %hi\(0x0\), %g1 + a8: R_SPARC_HIX22 .text\+0xffffffff76543210 + ac: 82 18 60 00 xor %g1, 0, %g1 + ac: R_SPARC_LOX10 .text\+0xffffffff76543210 + b0: 01 00 00 00 nop diff --git a/gas/testsuite/gas/sparc/reloc64.s b/gas/testsuite/gas/sparc/reloc64.s new file mode 100644 index 0000000..9ead6af --- /dev/null +++ b/gas/testsuite/gas/sparc/reloc64.s @@ -0,0 +1,48 @@ +# sparc64 special relocs + +foo: + sethi %uhi(0x1234567800000000),%g1 + or %g1,%ulo(0x1234567800000000),%g1 + nop + sethi %uhi(foo),%g1 + or %g1,%ulo(foo),%g1 + nop + sethi %uhi(foo+0x1234567800000000),%g1 + or %g1,%ulo(foo+0x1234567800000000),%g1 + nop + sethi %hh(0xfedcba9876543210),%g1 + or %g1,%hm(0xfedcba9876543210),%g1 + sethi %lm(0xfedcba9876543210),%g2 + or %g1,%lo(0xfedcba9876543210),%g2 + nop + sethi %hh(foo),%g1 + or %g1,%hm(foo),%g1 + sethi %lm(foo),%g2 + or %g1,%lo(foo),%g2 + nop + sethi %hh(foo+0xfedcba9876543210),%g1 + or %g1,%hm(foo+0xfedcba9876543210),%g1 + sethi %lm(foo+0xfedcba9876543210),%g2 + or %g1,%lo(foo+0xfedcba9876543210),%g2 + nop + sethi %h44(0xa9876543210),%g1 + or %g1,%m44(0xa9876543210),%g1 + or %g1,%l44(0xa9876543210),%g1 + nop + sethi %h44(foo),%g1 + or %g1,%m44(foo),%g1 + or %g1,%l44(foo),%g1 + nop + sethi %h44(foo+0xa9876543210),%g1 + or %g1,%m44(foo+0xa9876543210),%g1 + or %g1,%l44(foo+0xa9876543210),%g1 + nop + sethi %hix(0xffffffff76543210),%g1 + xor %g1,%lox(0xffffffff76543210),%g1 + nop + sethi %hix(foo),%g1 + xor %g1,%lox(foo),%g1 + nop + sethi %hix(foo+0xffffffff76543210),%g1 + xor %g1,%lox(foo+0xffffffff76543210),%g1 + nop diff --git a/gas/testsuite/gas/sparc/set64.d b/gas/testsuite/gas/sparc/set64.d new file mode 100644 index 0000000..121beca --- /dev/null +++ b/gas/testsuite/gas/sparc/set64.d @@ -0,0 +1,88 @@ +#as: -Av9 +#objdump: -dr +#name: sparc64 set64 + +.*: +file format .*sparc.* + +Disassembly of section .text: + +0+ <foo>: + 0: 05 00 00 00 sethi %hi\(0x0\), %g2 + 0: R_SPARC_HI22 .text + 4: 84 10 a0 00 mov %g2, %g2 ! 0 <foo> + 4: R_SPARC_LO10 .text + 8: 07 1d 95 0c sethi %hi\(0x76543000\), %g3 + c: 86 10 e2 10 or %g3, 0x210, %g3 ! 76543210 <\*ABS\*\+(0x|)0x76543210> + 10: 88 10 20 00 clr %g4 + 14: 0b 00 00 3f sethi %hi\(0xfc00\), %g5 + 18: 8a 11 63 ff or %g5, 0x3ff, %g5 ! ffff <\*ABS\*\+(0x|)ffff> + 1c: 03 00 00 00 sethi %hi\(0x0\), %g1 + 1c: R_SPARC_HH22 .text + 20: 82 10 60 00 mov %g1, %g1 ! 0 <foo> + 20: R_SPARC_HM10 .text + 24: 05 00 00 00 sethi %hi\(0x0\), %g2 + 24: R_SPARC_HI22 .text + 28: 84 10 a0 00 mov %g2, %g2 ! 0 <foo> + 28: R_SPARC_LO10 .text + 2c: 83 28 70 20 sllx %g1, 0x20, %g1 + 30: 84 10 80 01 or %g2, %g1, %g2 + 34: 86 10 3f ff mov -1, %g3 + 38: 86 10 20 00 clr %g3 + 3c: 86 10 20 01 mov 1, %g3 + 40: 86 10 2f ff mov 0xfff, %g3 + 44: 07 00 00 04 sethi %hi\(0x1000\), %g3 + 48: 86 10 30 00 mov -4096, %g3 + 4c: 07 3f ff fb sethi %hi\(0xffffec00\), %g3 + 50: 86 10 e3 ff or %g3, 0x3ff, %g3 ! ffffefff <\*ABS\*\+(0x|)ffffefff> + 54: 87 38 e0 00 sra %g3, 0, %g3 + 58: 07 00 00 3f sethi %hi\(0xfc00\), %g3 + 5c: 86 10 e3 ff or %g3, 0x3ff, %g3 ! ffff <\*ABS\*\+(0x|)ffff> + 60: 07 3f ff c0 sethi %hi\(0xffff0000\), %g3 + 64: 87 38 e0 00 sra %g3, 0, %g3 + 68: 09 1f ff ff sethi %hi\(0x7ffffc00\), %g4 + 6c: 88 11 23 ff or %g4, 0x3ff, %g4 ! 7fffffff <\*ABS\*\+(0x|)7fffffff> + 70: 09 20 00 00 sethi %hi\(0x80000000\), %g4 + 74: 09 20 00 00 sethi %hi\(0x80000000\), %g4 + 78: 89 39 20 00 sra %g4, 0, %g4 + 7c: 82 10 3f ff mov -1, %g1 + 80: 09 1f ff ff sethi %hi\(0x7ffffc00\), %g4 + 84: 88 11 23 ff or %g4, 0x3ff, %g4 ! 7fffffff <\*ABS\*\+(0x|)7fffffff> + 88: 83 28 70 20 sllx %g1, 0x20, %g1 + 8c: 88 11 00 01 or %g4, %g1, %g4 + 90: 09 3f ff ff sethi %hi\(0xfffffc00\), %g4 + 94: 88 11 23 ff or %g4, 0x3ff, %g4 ! ffffffff <\*ABS\*\+(0x|)ffffffff> + 98: 88 10 20 01 mov 1, %g4 + 9c: 89 29 30 20 sllx %g4, 0x20, %g4 + a0: 03 1f ff ff sethi %hi\(0x7ffffc00\), %g1 + a4: 82 10 63 ff or %g1, 0x3ff, %g1 ! 7fffffff <\*ABS\*\+(0x|)7fffffff> + a8: 0b 3f ff ff sethi %hi\(0xfffffc00\), %g5 + ac: 8a 11 63 ff or %g5, 0x3ff, %g5 ! ffffffff <\*ABS\*\+(0x|)ffffffff> + b0: 83 28 70 20 sllx %g1, 0x20, %g1 + b4: 8a 11 40 01 or %g5, %g1, %g5 + b8: 0b 20 00 00 sethi %hi\(0x80000000\), %g5 + bc: 8b 29 70 20 sllx %g5, 0x20, %g5 + c0: 8a 10 3f ff mov -1, %g5 + c4: 8b 29 70 20 sllx %g5, 0x20, %g5 + c8: 0b 20 00 00 sethi %hi\(0x80000000\), %g5 + cc: 8b 39 60 00 sra %g5, 0, %g5 + d0: 03 3f ff c0 sethi %hi\(0xffff0000\), %g1 + d4: 0b 3f ff c0 sethi %hi\(0xffff0000\), %g5 + d8: 83 28 70 20 sllx %g1, 0x20, %g1 + dc: 8a 11 40 01 or %g5, %g1, %g5 + e0: 03 3f ff c0 sethi %hi\(0xffff0000\), %g1 + e4: 8a 10 20 01 mov 1, %g5 + e8: 83 28 70 20 sllx %g1, 0x20, %g1 + ec: 8a 11 40 01 or %g5, %g1, %g5 + f0: 82 10 20 01 mov 1, %g1 + f4: 0b 3f ff c0 sethi %hi\(0xffff0000\), %g5 + f8: 8a 11 60 01 or %g5, 1, %g5 ! ffff0001 <\*ABS\*\+(0x|)ffff0001> + fc: 83 28 70 20 sllx %g1, 0x20, %g1 + 100: 8a 11 40 01 or %g5, %g1, %g5 + 104: 82 10 20 01 mov 1, %g1 + 108: 0b 3f ff c0 sethi %hi\(0xffff0000\), %g5 + 10c: 83 28 70 20 sllx %g1, 0x20, %g1 + 110: 8a 11 40 01 or %g5, %g1, %g5 + 114: 82 10 20 01 mov 1, %g1 + 118: 8a 10 20 01 mov 1, %g5 + 11c: 83 28 70 20 sllx %g1, 0x20, %g1 + 120: 8a 11 40 01 or %g5, %g1, %g5 diff --git a/gas/testsuite/gas/sparc/set64.s b/gas/testsuite/gas/sparc/set64.s new file mode 100644 index 0000000..92dc931 --- /dev/null +++ b/gas/testsuite/gas/sparc/set64.s @@ -0,0 +1,43 @@ +# sparc64 set insn handling (includes set, setuw, setsw, setx) +# FIXME: setuw,setsw not tested for yet. + +foo: + set foo,%g2 + set 0x76543210,%g3 + set 0,%g4 + set 65535,%g5 + + setx foo,%g1,%g2 + + setx -1,%g1,%g3 + setx 0,%g1,%g3 + setx 1,%g1,%g3 + setx 4095,%g1,%g3 + setx 4096,%g1,%g3 + setx -4096,%g1,%g3 + setx -4097,%g1,%g3 + setx 65535,%g1,%g3 + setx -65536,%g1,%g3 + + setx 2147483647,%g1,%g4 + setx 2147483648,%g1,%g4 + setx -2147483648,%g1,%g4 + setx -2147483649,%g1,%g4 + setx 4294967295,%g1,%g4 + setx 4294967296,%g1,%g4 + +! GAS doesn't handle large base10 numbers yet. +! setx 9223372036854775807,%g1,%g5 +! setx 9223372036854775808,%g1,%g5 +! setx -9223372036854775808,%g1,%g5 +! setx -9223372036854775809,%g1,%g5 + + setx 0x7fffffffffffffff,%g1,%g5 + setx 0x8000000000000000,%g1,%g5 ! test only hh22 needed + setx 0xffffffff00000000,%g1,%g5 ! test only hm10 needed + setx 0xffffffff80000000,%g1,%g5 ! test sign-ext of lower 32 + setx 0xffff0000ffff0000,%g1,%g5 ! test hh22,hi22 + setx 0xffff000000000001,%g1,%g5 ! test hh22,lo10 + setx 0x00000001ffff0001,%g1,%g5 ! test hm10,hi22,lo10 + setx 0x00000001ffff0000,%g1,%g5 ! test hm10,hi22 + setx 0x0000000100000001,%g1,%g5 ! test hm10,lo10 diff --git a/gas/testsuite/gas/sparc/sparc.exp b/gas/testsuite/gas/sparc/sparc.exp new file mode 100644 index 0000000..1a79358 --- /dev/null +++ b/gas/testsuite/gas/sparc/sparc.exp @@ -0,0 +1,27 @@ +# Some generic SPARC and SPARC64 tests + +# FIXME: The tests here aren't really bullet proof. A mistake in the opcode +# table can slip through since we use the same table for assembly and +# disassembly. The way to fix this is to include a hex dump of the insns +# and test that as well. Later. + +if [istarget sparc*-*-*] { + run_dump_test "synth" +} + + +if [istarget sparc64*-*-*] { + run_dump_test "asi" + run_dump_test "membar" + run_dump_test "prefetch" + run_dump_test "set64" + run_dump_test "synth64" + run_dump_test "rdpr" + run_dump_test "wrpr" + run_dump_test "reloc64" +} + +if [istarget sparclet*-*-*] { + run_dump_test "splet" + run_dump_test "splet-2" +} diff --git a/gas/testsuite/gas/sparc/splet-2.d b/gas/testsuite/gas/sparc/splet-2.d new file mode 100644 index 0000000..d055538 --- /dev/null +++ b/gas/testsuite/gas/sparc/splet-2.d @@ -0,0 +1,23 @@ +#as: -Asparclet +#objdump: -dr +#name: sparclet coprocessor registers + +.*: +file format .* + +Disassembly of section .text: + +0+ <start>: + 0: 81 b0 40 c0 cwrcxt %g1, %ccsr + 4: 83 b0 40 c0 cwrcxt %g1, %ccfr + 8: 85 b0 40 c0 cwrcxt %g1, %cccrcr + c: 87 b0 40 c0 cwrcxt %g1, %ccpr + 10: 89 b0 40 c0 cwrcxt %g1, %ccsr2 + 14: 8b b0 40 c0 cwrcxt %g1, %cccrr + 18: 8d b0 40 c0 cwrcxt %g1, %ccrstr + 1c: 83 b0 01 00 crdcxt %ccsr, %g1 + 20: 83 b0 41 00 crdcxt %ccfr, %g1 + 24: 83 b0 81 00 crdcxt %cccrcr, %g1 + 28: 83 b0 c1 00 crdcxt %ccpr, %g1 + 2c: 83 b1 01 00 crdcxt %ccsr2, %g1 + 30: 83 b1 41 00 crdcxt %cccrr, %g1 + 34: 83 b1 81 00 crdcxt %ccrstr, %g1 diff --git a/gas/testsuite/gas/sparc/splet-2.s b/gas/testsuite/gas/sparc/splet-2.s new file mode 100644 index 0000000..5d34495 --- /dev/null +++ b/gas/testsuite/gas/sparc/splet-2.s @@ -0,0 +1,21 @@ +! Test sparclet coprocessor registers. + + .text + .global start +start: + + cwrcxt %g1,%ccsr + cwrcxt %g1,%ccfr + cwrcxt %g1,%cccrcr + cwrcxt %g1,%ccpr + cwrcxt %g1,%ccsr2 + cwrcxt %g1,%cccrr + cwrcxt %g1,%ccrstr + + crdcxt %ccsr,%g1 + crdcxt %ccfr,%g1 + crdcxt %cccrcr,%g1 + crdcxt %ccpr,%g1 + crdcxt %ccsr2,%g1 + crdcxt %cccrr,%g1 + crdcxt %ccrstr,%g1 diff --git a/gas/testsuite/gas/sparc/splet.d b/gas/testsuite/gas/sparc/splet.d new file mode 100644 index 0000000..9ac0a21 --- /dev/null +++ b/gas/testsuite/gas/sparc/splet.d @@ -0,0 +1,195 @@ +#as: -Asparclet +#objdump: -dr +#name: sparclet extensions + +.*: +file format .* + +Disassembly of section .text: + +0+ <start>: + 0: a1 40 00 00 rd %y, %l0 + 4: a1 40 40 00 rd %asr1, %l0 + 8: a1 43 c0 00 rd %asr15, %l0 + c: a1 44 40 00 rd %asr17, %l0 + 10: a1 44 80 00 rd %asr18, %l0 + 14: a1 44 c0 00 rd %asr19, %l0 + 18: a1 45 00 00 rd %asr20, %l0 + 1c: a1 45 40 00 rd %asr21, %l0 + 20: a1 45 80 00 rd %asr22, %l0 + 24: 81 84 20 00 mov %l0, %y + 28: 83 84 20 00 mov %l0, %asr1 + 2c: 9f 84 20 00 mov %l0, %asr15 + 30: a3 84 20 00 mov %l0, %asr17 + 34: a5 84 20 00 mov %l0, %asr18 + 38: a7 84 20 00 mov %l0, %asr19 + 3c: a9 84 20 00 mov %l0, %asr20 + 40: ab 84 20 00 mov %l0, %asr21 + 44: ad 84 20 00 mov %l0, %asr22 + +0+48 <test_umul>: + 48: 86 50 40 02 umul %g1, %g2, %g3 + 4c: 86 50 40 02 umul %g1, %g2, %g3 + +0+50 <test_smul>: + 50: 86 58 40 02 smul %g1, %g2, %g3 + 54: 86 58 40 02 smul %g1, %g2, %g3 + +0+58 <test_stbar>: + 58: 81 43 c0 00 stbar + 5c: 81 43 c0 00 stbar + 60: 00 00 00 01 unimp 0x1 + 64: 81 dc 40 00 flush %l1 + +0+68 <test_scan>: + 68: a7 64 7f ff scan %l1, -1, %l3 + 6c: a7 64 60 00 scan %l1, 0, %l3 + 70: a7 64 40 11 scan %l1, %l1, %l3 + +0+74 <test_shuffle>: + 74: a3 6c 20 01 shuffle %l0, 1, %l1 + 78: a3 6c 20 02 shuffle %l0, 2, %l1 + 7c: a3 6c 20 04 shuffle %l0, 4, %l1 + 80: a3 6c 20 08 shuffle %l0, 8, %l1 + 84: a3 6c 20 10 shuffle %l0, 0x10, %l1 + 88: a3 6c 20 18 shuffle %l0, 0x18, %l1 + +0+8c <test_umac>: + 8c: a1 f4 40 12 umac %l1, %l2, %l0 + 90: a1 f4 60 02 umac %l1, 2, %l0 + 94: a1 f4 60 02 umac %l1, 2, %l0 + +0+98 <test_umacd>: + 98: a1 74 80 14 umacd %l2, %l4, %l0 + 9c: a1 74 a0 03 umacd %l2, 3, %l0 + a0: a1 74 a0 03 umacd %l2, 3, %l0 + +0+a4 <test_smac>: + a4: a1 fc 40 12 smac %l1, %l2, %l0 + a8: a1 fc 7f d6 smac %l1, -42, %l0 + ac: a1 fc 7f d6 smac %l1, -42, %l0 + +0+b0 <test_smacd>: + b0: a1 7c 80 14 smacd %l2, %l4, %l0 + b4: a1 7c a0 7b smacd %l2, 0x7b, %l0 + b8: a1 7c a0 7b smacd %l2, 0x7b, %l0 + +0+bc <test_umuld>: + bc: 90 4a 80 0c umuld %o2, %o4, %o0 + c0: 90 4a a2 34 umuld %o2, 0x234, %o0 + c4: 90 4a a5 67 umuld %o2, 0x567, %o0 + +0+c8 <test_smuld>: + c8: b0 6e 80 1c smuld %i2, %i4, %i0 + cc: b0 6e b0 00 smuld %i2, -4096, %i0 + d0: b0 6f 2f ff smuld %i4, 0xfff, %i0 + +0+d4 <test_coprocessor>: + d4: 81 b4 00 11 cpush %l0, %l1 + d8: 81 b4 20 01 cpush %l0, 1 + dc: 81 b4 00 51 cpusha %l0, %l1 + e0: 81 b4 20 41 cpusha %l0, 1 + e4: a1 b0 00 80 cpull %l0 + e8: a1 b0 01 00 crdcxt %ccsr, %l0 + ec: a1 b0 41 00 crdcxt %ccfr, %l0 + f0: a1 b0 c1 00 crdcxt %ccpr, %l0 + f4: a1 b0 81 00 crdcxt %cccrcr, %l0 + f8: 81 b4 00 c0 cwrcxt %l0, %ccsr + fc: 83 b4 00 c0 cwrcxt %l0, %ccfr + 100: 87 b4 00 c0 cwrcxt %l0, %ccpr + 104: 85 b4 00 c0 cwrcxt %l0, %cccrcr + 108: 01 c0 00 01 cbn 10c <test_coprocessor\+(0x|)38> + 108: WDISP22 stop\+0xfffffef8 + 10c: 01 00 00 00 nop + 110: 21 c0 00 01 cbn,a 114 <test_coprocessor\+(0x|)40> + 110: WDISP22 stop\+0xfffffef0 + 114: 01 00 00 00 nop + 118: 03 c0 00 01 cbe 11c <test_coprocessor\+(0x|)48> + 118: WDISP22 stop\+0xfffffee8 + 11c: 01 00 00 00 nop + 120: 23 c0 00 01 cbe,a 124 <test_coprocessor\+(0x|)50> + 120: WDISP22 stop\+0xfffffee0 + 124: 01 00 00 00 nop + 128: 05 c0 00 01 cbf 12c <test_coprocessor\+(0x|)58> + 128: WDISP22 stop\+0xfffffed8 + 12c: 01 00 00 00 nop + 130: 25 c0 00 01 cbf,a 134 <test_coprocessor\+(0x|)60> + 130: WDISP22 stop\+0xfffffed0 + 134: 01 00 00 00 nop + 138: 07 c0 00 01 cbef 13c <test_coprocessor\+(0x|)68> + 138: WDISP22 stop\+0xfffffec8 + 13c: 01 00 00 00 nop + 140: 27 c0 00 01 cbef,a 144 <test_coprocessor\+(0x|)70> + 140: WDISP22 stop\+0xfffffec0 + 144: 01 00 00 00 nop + 148: 09 c0 00 01 cbr 14c <test_coprocessor\+(0x|)78> + 148: WDISP22 stop\+0xfffffeb8 + 14c: 01 00 00 00 nop + 150: 29 c0 00 01 cbr,a 154 <test_coprocessor\+(0x|)80> + 150: WDISP22 stop\+0xfffffeb0 + 154: 01 00 00 00 nop + 158: 0b c0 00 01 cber 15c <test_coprocessor\+(0x|)88> + 158: WDISP22 stop\+0xfffffea8 + 15c: 01 00 00 00 nop + 160: 2b c0 00 01 cber,a 164 <test_coprocessor\+(0x|)90> + 160: WDISP22 stop\+0xfffffea0 + 164: 01 00 00 00 nop + 168: 0d c0 00 01 cbfr 16c <test_coprocessor\+(0x|)98> + 168: WDISP22 stop\+0xfffffe98 + 16c: 01 00 00 00 nop + 170: 2d c0 00 01 cbfr,a 174 <test_coprocessor\+(0x|)a0> + 170: WDISP22 stop\+0xfffffe90 + 174: 01 00 00 00 nop + 178: 0f c0 00 01 cbefr 17c <test_coprocessor\+(0x|)a8> + 178: WDISP22 stop\+0xfffffe88 + 17c: 01 00 00 00 nop + 180: 2f c0 00 01 cbefr,a 184 <test_coprocessor\+(0x|)b0> + 180: WDISP22 stop\+0xfffffe80 + 184: 01 00 00 00 nop + 188: 11 c0 00 01 cba 18c <test_coprocessor\+(0x|)b8> + 188: WDISP22 stop\+0xfffffe78 + 18c: 01 00 00 00 nop + 190: 31 c0 00 01 cba,a 194 <test_coprocessor\+(0x|)c0> + 190: WDISP22 stop\+0xfffffe70 + 194: 01 00 00 00 nop + 198: 13 c0 00 01 cbne 19c <test_coprocessor\+(0x|)c8> + 198: WDISP22 stop\+0xfffffe68 + 19c: 01 00 00 00 nop + 1a0: 33 c0 00 01 cbne,a 1a4 <test_coprocessor\+(0x|)d0> + 1a0: WDISP22 stop\+0xfffffe60 + 1a4: 01 00 00 00 nop + 1a8: 15 c0 00 01 cbnf 1ac <test_coprocessor\+(0x|)d8> + 1a8: WDISP22 stop\+0xfffffe58 + 1ac: 01 00 00 00 nop + 1b0: 35 c0 00 01 cbnf,a 1b4 <test_coprocessor\+(0x|)e0> + 1b0: WDISP22 stop\+0xfffffe50 + 1b4: 01 00 00 00 nop + 1b8: 17 c0 00 01 cbnef 1bc <test_coprocessor\+(0x|)e8> + 1b8: WDISP22 stop\+0xfffffe48 + 1bc: 01 00 00 00 nop + 1c0: 37 c0 00 01 cbnef,a 1c4 <test_coprocessor\+(0x|)f0> + 1c0: WDISP22 stop\+0xfffffe40 + 1c4: 01 00 00 00 nop + 1c8: 19 c0 00 01 cbnr 1cc <test_coprocessor\+(0x|)f8> + 1c8: WDISP22 stop\+0xfffffe38 + 1cc: 01 00 00 00 nop + 1d0: 39 c0 00 01 cbnr,a 1d4 <test_coprocessor\+(0x|)100> + 1d0: WDISP22 stop\+0xfffffe30 + 1d4: 01 00 00 00 nop + 1d8: 1b c0 00 01 cbner 1dc <test_coprocessor\+(0x|)108> + 1d8: WDISP22 stop\+0xfffffe28 + 1dc: 01 00 00 00 nop + 1e0: 3b c0 00 01 cbner,a 1e4 <test_coprocessor\+(0x|)110> + 1e0: WDISP22 stop\+0xfffffe20 + 1e4: 01 00 00 00 nop + 1e8: 1d c0 00 01 cbnfr 1ec <test_coprocessor\+(0x|)118> + 1e8: WDISP22 stop\+0xfffffe18 + 1ec: 01 00 00 00 nop + 1f0: 3d c0 00 01 cbnfr,a 1f4 <test_coprocessor\+(0x|)120> + 1f0: WDISP22 stop\+0xfffffe10 + 1f4: 01 00 00 00 nop + 1f8: 1f c0 00 01 cbnefr 1fc <test_coprocessor\+(0x|)128> + 1f8: WDISP22 stop\+0xfffffe08 + 1fc: 01 00 00 00 nop + 200: 3f c0 00 01 cbnefr,a 204 <test_coprocessor\+(0x|)130> + 200: WDISP22 stop\+0xfffffe00 + 204: 01 00 00 00 nop diff --git a/gas/testsuite/gas/sparc/splet.s b/gas/testsuite/gas/sparc/splet.s new file mode 100644 index 0000000..0dfd507 --- /dev/null +++ b/gas/testsuite/gas/sparc/splet.s @@ -0,0 +1,211 @@ + .text + .global start + +! Starting point +start: + +! test all ASRs + + rd %asr0, %l0 + rd %asr1, %l0 + rd %asr15, %l0 + rd %asr17, %l0 + rd %asr18, %l0 + rd %asr19, %l0 ! should stop the processor + rd %asr20, %l0 + rd %asr21, %l0 + rd %asr22, %l0 + + wr %l0, 0, %asr0 + wr %l0, 0, %asr1 + wr %l0, 0, %asr15 + wr %l0, 0, %asr17 + wr %l0, 0, %asr18 + wr %l0, 0, %asr19 + wr %l0, 0, %asr20 + wr %l0, 0, %asr21 + wr %l0, 0, %asr22 + +! test UMUL with no overflow inside Y +test_umul: + umul %g1, %g2, %g3 + +! test UMUL with an overflow inside Y + + umul %g1, %g2, %g3 ! %g3 must be equal to 0 + +! test SMUL with negative result +test_smul: + smul %g1, %g2, %g3 + +! test SMUL with positive result + + smul %g1, %g2, %g3 + +! test STBAR: there are two possible syntaxes +test_stbar: + stbar ! is a valid V8 syntax, at least a synthetic + ! instruction + rd %asr15, %g0 ! other solution + +! test UNIMP + unimp 1 + +! test FLUSH + flush %l1 ! is the official V8 syntax + +! test SCAN: find first 0 +test_scan: + scan %l1, 0xffffffff, %l3 + +! test scan: find first 1 + + scan %l1, 0, %l3 + +! test scan: find first bit != bit-0 + + scan %l1, %l1, %l3 + +! test SHUFFLE +test_shuffle: + shuffle %l0, 0x1, %l1 + shuffle %l0, 0x2, %l1 + shuffle %l0, 0x4, %l1 + shuffle %l0, 0x8, %l1 + shuffle %l0, 0x10, %l1 + shuffle %l0, 0x18, %l1 + +! test UMAC +test_umac: + umac %l1, %l2, %l0 + umac %l1, 2, %l0 + umac 2, %l1, %l0 + +! test UMACD +test_umacd: + umacd %l2, %l4, %l0 + umacd %l2, 3, %l0 + umacd 3, %l2, %l0 + +! test SMAC +test_smac: + smac %l1, %l2, %l0 + smac %l1, -42, %l0 + smac -42, %l1, %l0 + +! test SMACD +test_smacd: + smacd %l2, %l4, %l0 + smacd %l2, 123, %l0 + smacd 123, %l2, %l0 + +! test UMULD +test_umuld: + umuld %o2, %o4, %o0 + umuld %o2, 0x234, %o0 + umuld 0x567, %o2, %o0 + +! test SMULD +test_smuld: + smuld %i2, %i4, %i0 + smuld %i2, -4096, %i0 + smuld 4095, %i4, %i0 + +! Coprocessor instructions +test_coprocessor: +! %ccsr is register # 0 +! %ccfr is register # 1 +! %ccpr is register # 3 +! %cccrcr is register # 2 + +! test CPUSH: just syntax + + cpush %l0, %l1 + cpush %l0, 1 + cpusha %l0, %l1 + cpusha %l0, 1 + +! test CPULL: just syntax + + cpull %l0 + +! test CPRDCXT: just syntax + + crdcxt %ccsr, %l0 + crdcxt %ccfr, %l0 + crdcxt %ccpr, %l0 + crdcxt %cccrcr, %l0 + +! test CPWRCXT: just syntax + + cwrcxt %l0, %ccsr + cwrcxt %l0, %ccfr + cwrcxt %l0, %ccpr + cwrcxt %l0, %cccrcr + +! test CBccc: just syntax + + cbn stop + nop + cbn,a stop + nop + cbe stop + nop + cbe,a stop + nop + cbf stop + nop + cbf,a stop + nop + cbef stop + nop + cbef,a stop + nop + cbr stop + nop + cbr,a stop + nop + cber stop + nop + cber,a stop + nop + cbfr stop + nop + cbfr,a stop + nop + cbefr stop + nop + cbefr,a stop + nop + cba stop + nop + cba,a stop + nop + cbne stop + nop + cbne,a stop + nop + cbnf stop + nop + cbnf,a stop + nop + cbnef stop + nop + cbnef,a stop + nop + cbnr stop + nop + cbnr,a stop + nop + cbner stop + nop + cbner,a stop + nop + cbnfr stop + nop + cbnfr,a stop + nop + cbnefr stop + nop + cbnefr,a stop + nop diff --git a/gas/testsuite/gas/sparc/synth.d b/gas/testsuite/gas/sparc/synth.d new file mode 100644 index 0000000..dd222c5 --- /dev/null +++ b/gas/testsuite/gas/sparc/synth.d @@ -0,0 +1,11 @@ +#as: -Av7 +#objdump: -dr --prefix-addresses +#name: sparc synth + +.*: +file format .* + +Disassembly of section .text: +0+0000 <foo> xnor %g1, %g0, %g2 +0+0004 <foo\+(0x|)4> xnor %g1, %g0, %g1 +0+0008 <foo\+(0x|)8> neg %g1, %g2 +0+000c <foo\+(0x|)c> neg %g1 diff --git a/gas/testsuite/gas/sparc/synth.s b/gas/testsuite/gas/sparc/synth.s new file mode 100644 index 0000000..9e06628 --- /dev/null +++ b/gas/testsuite/gas/sparc/synth.s @@ -0,0 +1,7 @@ +# common (v8 or v9) synthetic insns + .text +foo: + not %g1,%g2 + not %g1 + neg %g1,%g2 + neg %g1 diff --git a/gas/testsuite/gas/sparc/synth64.d b/gas/testsuite/gas/sparc/synth64.d new file mode 100644 index 0000000..a29dab7 --- /dev/null +++ b/gas/testsuite/gas/sparc/synth64.d @@ -0,0 +1,19 @@ +#as: -Av9 +#objdump: -dr --prefix-addresses +#name: sparc64 synth64 + +.*: +file format .*sparc.* + +Disassembly of section .text: +0+0000 <foo-(0x|)4> iprefetch 0+0004 <foo> +0+0004 <foo> signx %g1, %g2 +0+0008 <foo\+(0x|)4> clruw %g1, %g2 +0+000c <foo\+(0x|)8> cas \[ %g1 \], %g2, %g3 +0+0010 <foo\+(0x|)c> casl \[ %g1 \], %g2, %g3 +0+0014 <foo\+(0x|)10> casx \[ %g1 \], %g2, %g3 +0+0018 <foo\+(0x|)14> casxl \[ %g1 \], %g2, %g3 +0+001c <foo\+(0x|)18> clrx \[ %g1 \+ %g2 \] +0+0020 <foo\+(0x|)1c> clrx \[ %g1 \] +0+0024 <foo\+(0x|)20> clrx \[ %g1 \+ 1 \] +0+0028 <foo\+(0x|)24> clrx \[ %g1 \+ 0x2a \] +0+002c <foo\+(0x|)28> clrx \[ 0x42 \] diff --git a/gas/testsuite/gas/sparc/synth64.s b/gas/testsuite/gas/sparc/synth64.s new file mode 100644 index 0000000..659f3c2 --- /dev/null +++ b/gas/testsuite/gas/sparc/synth64.s @@ -0,0 +1,16 @@ +# sparc64 synthetic insns + .text + iprefetch foo +foo: + signx %g1,%g2 + clruw %g1,%g2 + cas [%g1],%g2,%g3 + casl [%g1],%g2,%g3 + casx [%g1],%g2,%g3 + casxl [%g1],%g2,%g3 + + clrx [%g1+%g2] + clrx [%g1] + clrx [%g1+1] + clrx [42+%g1] + clrx [0x42] diff --git a/gas/testsuite/gas/sparc/wrpr.d b/gas/testsuite/gas/sparc/wrpr.d new file mode 100644 index 0000000..e75dcb8 --- /dev/null +++ b/gas/testsuite/gas/sparc/wrpr.d @@ -0,0 +1,24 @@ +#as: -Av9 +#objdump: -dr +#name: sparc64 wrpr + +.*: +file format .*sparc.* + +Disassembly of section .text: + +0+ <.text>: + 0: 81 90 40 00 wrpr %g1, %tpc + 4: 83 90 80 00 wrpr %g2, %tnpc + 8: 85 90 c0 00 wrpr %g3, %tstate + c: 87 91 00 00 wrpr %g4, %tt + 10: 89 91 40 00 wrpr %g5, %tick + 14: 8b 91 80 00 wrpr %g6, %tba + 18: 8d 91 c0 00 wrpr %g7, %pstate + 1c: 8f 92 00 00 wrpr %o0, %tl + 20: 91 92 40 00 wrpr %o1, %pil + 24: 93 92 80 00 wrpr %o2, %cwp + 28: 95 92 c0 00 wrpr %o3, %cansave + 2c: 97 93 00 00 wrpr %o4, %canrestore + 30: 99 93 40 00 wrpr %o5, %cleanwin + 34: 9b 93 80 00 wrpr %sp, %otherwin + 38: 9d 93 c0 00 wrpr %o7, %wstate diff --git a/gas/testsuite/gas/sparc/wrpr.s b/gas/testsuite/gas/sparc/wrpr.s new file mode 100644 index 0000000..67fd450 --- /dev/null +++ b/gas/testsuite/gas/sparc/wrpr.s @@ -0,0 +1,17 @@ +# Test wrpr + .text + wrpr %g1,%tpc + wrpr %g2,%tnpc + wrpr %g3,%tstate + wrpr %g4,%tt + wrpr %g5,%tick + wrpr %g6,%tba + wrpr %g7,%pstate + wrpr %o0,%tl + wrpr %o1,%pil + wrpr %o2,%cwp + wrpr %o3,%cansave + wrpr %o4,%canrestore + wrpr %o5,%cleanwin + wrpr %o6,%otherwin + wrpr %o7,%wstate diff --git a/gas/testsuite/gas/sun4/addend.d b/gas/testsuite/gas/sun4/addend.d new file mode 100644 index 0000000..50ff458 --- /dev/null +++ b/gas/testsuite/gas/sun4/addend.d @@ -0,0 +1,13 @@ +#objdump: -r +# name : addends +.*: +file format a.out-sunos-big + +RELOCATION RECORDS FOR \[.text\]: +OFFSET TYPE +VALUE +0+08 WDISP22 +foo1\+0xf+fc +0+0c WDISP22 +foo1\+0xf+f8 +0+10 WDISP22 +foo1\+0xf+f0 +0+14 WDISP22 +foo1\+0xf+ec +0+1c 32 +foo1 +0+20 32 +foo1\+0x0+4 +#0+20 32 +foo1\+0x0+4 diff --git a/gas/testsuite/gas/sun4/addend.exp b/gas/testsuite/gas/sun4/addend.exp new file mode 100644 index 0000000..f27b46e --- /dev/null +++ b/gas/testsuite/gas/sun4/addend.exp @@ -0,0 +1,7 @@ +# +# SunOS4 on SPARC tests +# + +if [istarget sparc-*-sunos4*] then { + run_dump_test "addend" +} diff --git a/gas/testsuite/gas/sun4/addend.s b/gas/testsuite/gas/sun4/addend.s new file mode 100644 index 0000000..18eb108 --- /dev/null +++ b/gas/testsuite/gas/sun4/addend.s @@ -0,0 +1,11 @@ + .global foo +foo: + nop + nop + ba foo1+0x4 + ba foo1+0x4 + ba foo1 + ba foo1 + nop + .word foo1 + .word foo1+4 diff --git a/gas/testsuite/gas/template b/gas/testsuite/gas/template new file mode 100644 index 0000000..a24d79e --- /dev/null +++ b/gas/testsuite/gas/template @@ -0,0 +1,96 @@ +# +# This is sort of a prototype test case, which parses the listing output +# from the assembler. Later, more prototypes should be added for cases +# where objdump gets run over the .o file, and anything else like that... +# +# When you write a test case that uses the listing output, just copy this +# file (trimming down the overly-verbose comments a little), and +# adjust it to do what you need. +# +# Remember that any ".exp" file found in the tree will be processed by +# dejagnu. + +# +# FIRST SAMPLE TEST CASE +# + +proc do_foo {} { +# This string is used below when printing out a success or failure message. +# If more than one test is run by a given .exp file, it'd be nice to include +# the name of the input file. + set testname "foo.s: multi-register tweaking and frobnication" + +# I use this as a flag to record whether the test case passed. If this +# flag is still clear when EOF is reached, this test fails. If there are +# two or more patterns, and I need to see all of them, I'll create N variables +# and check if the sum is N. + set x 0 + +# Call gas_start with two arguments: The input file name (which it'll search +# for in $srcdir/$subdir, that is, the source directory where the .exp file +# is), and a (possibly empty) string of options to pass to the assembler. + gas_start "foo.s" "-al" + +# Now I just iterate over all the output lines, looking for what I want +# to see. Since each pattern explicitly will not span line breaks, there's +# also a pattern for lines that don't match anything else. (Is it safe to +# use ".*" for patterns not crossing line breaks? I don't think "$" does the +# right thing for that, in any case. I should check into whether the extra +# pattern is even needed. + +# Apparently CRLF is received when using ptys for subprocesses; hence the +# \r\n for matching line number 3. + +# Note that if you use "{ ... }" for the expect clause, you can't have +# comments inside it. + +# This test case is kinda bogus in that seeing either a word of all zeros +# at address zero or a C-style comment on line three that says "Looking for +# C comments" (with very specific punctuation and whitespace) will cause +# it to pass this test. Usually + while 1 { + expect { + -re "^ +\[0-9\]+ 0000 00000000\[^\n\]*\n" { set x 1 } + -re "^ +3\[ \t\]+/. Looking for C comments. ./\r\n" { set x 1 } + -re "\[^\n\]*\n" { } + timeout { perror "timeout\n"; break } + eof { break } + } + } +# This was intended to do any cleanup necessary. It kinda looks like it isn't +# needed, but just in case, please keep it in for now. + gas_finish + +# Did we find what we were looking for? If not, flunk it. + if $x then { pass $testname } else { fail $testname } +} + +# Now actually run the test. It can be conditionalized if the test is +# not appropriate for all targets. The proc "istarget" checks a generalized +# form of the target name, so that (e.g.) "m68332-unknown-aout" would match +# here. So far, I think only the CPU name is actually ever altered. +if [istarget m68k-*] then { + do_foo +} + + + + +# +# SECOND SAMPLE TEST CASE +# + +# This is a tiny bit like the C compiler torture tests, in that it'll run +# the assembler with the power set of the list of options supplied. +# +# The first argument is the test file name; the second is arguments that +# are always to be provided; the third is a space-separated list of options +# which are optional (ending in ">" if output should be ignored, like "-a>"); +# the fourth is the name of the test. So far, only binary options are handled +# this way; N-way options (like CPU type for m68k) aren't handled yet. +# +# The variable $stdoptlist usually has a reasonable set of optional options +# for this target. + +# No, PIC isn't supported yet. This is only an example. +gas_test "quux.s" "-K" $stdoptlist "use of quuxes in PIC mode" diff --git a/gas/testsuite/gas/tic80/add.d b/gas/testsuite/gas/tic80/add.d new file mode 100644 index 0000000..3dec707 --- /dev/null +++ b/gas/testsuite/gas/tic80/add.d @@ -0,0 +1,22 @@ +#objdump: -d +#name: TIc80 signed and unsigned add instructions + +.*: +file format .*tic80.* + +Disassembly of section .text: + +00000000 <.text>: + 0: 0a 00 fb 62.* + 4: ff 3f ac 20.* + 8: 00 40 2c 21.* + c: 00 10 7b 31 00 40 00 00.* + 14: 00 10 fb 41 ff bf ff ff.* + 1c: 00 10 bb 5a ff ff ff 7f.* + 24: 00 10 3b 6b 00 00 00 80.* + 2c: 0a 20 fb 62.* + 30: ff bf ac 20.* + 34: 00 c0 2c 21.* + 38: 00 30 7b 31 00 40 00 00.* + 40: 00 30 fb 41 ff bf ff ff.* + 48: 00 30 bb 5a ff ff ff 7f.* + 50: 00 30 3b 6b 00 00 00 80.* diff --git a/gas/testsuite/gas/tic80/add.lst b/gas/testsuite/gas/tic80/add.lst new file mode 100644 index 0000000..e12b368 --- /dev/null +++ b/gas/testsuite/gas/tic80/add.lst @@ -0,0 +1,34 @@ +MVP MP Macro Assembler Version 1.13 Mon Feb 10 20:13:33 1997 +Copyright (c) 1993-1995 Texas Instruments Incorporated + +add.s PAGE 1 + + 1 ; Test signed and unsigned addition instruction. + 2 ; Test boundary conditions to ensure proper handling. + 3 ; Note that unsigned addition still uses signed immediates. + 4 + 5 00000000 62FB000A add r10,r11,r12 ; Register form + 6 00000004 20AC3FFF add 16383,r2,r4 ; Maximum positive short signed immediate + 7 00000008 212C4000 add -16384,r4,r4 ; Minimum negative short signed immediate + 8 0000000C 317B1000 add 16384,r5,r6 ; Minimum positive long signed immediate + 00000010 00004000 + 9 00000014 41FB1000 add -16385,r7,r8 ; Maximum negative short signed immediate + 00000018 FFFFBFFF + 10 0000001C 5ABB1000 add 2147483647,r10,r11 ; Maximum positive long signed immediate + 00000020 7FFFFFFF + 11 00000024 6B3B1000 add -2147483648,r12,r13 ; Minimum positive long signed immediate + 00000028 80000000 + 12 + 13 0000002C 62FB200A addu r10,r11,r12 ; Register form + 14 00000030 20ACBFFF addu 16383,r2,r4 ; Maximum positive short signed immediate + 15 00000034 212CC000 addu -16384,r4,r4 ; Minimum negative short signed immediate + 16 00000038 317B3000 addu 16384,r5,r6 ; Minimum positive long signed immediate + 0000003C 00004000 + 17 00000040 41FB3000 addu -16385,r7,r8 ; Maximum negative short signed immediate + 00000044 FFFFBFFF + 18 00000048 5ABB3000 addu 2147483647,r10,r11 ; Maximum positive long signed immediate + 0000004C 7FFFFFFF + 19 00000050 6B3B3000 addu -2147483648,r12,r13 ; Minimum positive long signed immediate + 00000054 80000000 + + No Errors, No Warnings diff --git a/gas/testsuite/gas/tic80/add.s b/gas/testsuite/gas/tic80/add.s new file mode 100644 index 0000000..6c229ed --- /dev/null +++ b/gas/testsuite/gas/tic80/add.s @@ -0,0 +1,19 @@ +; Test signed and unsigned addition instruction. +; Test boundary conditions to ensure proper handling. +; Note that unsigned addition still uses signed immediates. + + add r10,r11,r12 ; Register form + add 16383,r2,r4 ; Maximum positive short signed immediate + add -16384,r4,r4 ; Minimum negative short signed immediate + add 16384,r5,r6 ; Minimum positive long signed immediate + add -16385,r7,r8 ; Maximum negative long signed immediate + add 2147483647,r10,r11 ; Maximum positive long signed immediate + add -2147483648,r12,r13 ; Minimum negative long signed immediate + + addu r10,r11,r12 ; Register form + addu 16383,r2,r4 ; Maximum positive short signed immediate + addu -16384,r4,r4 ; Minimum negative short signed immediate + addu 16384,r5,r6 ; Minimum positive long signed immediate + addu -16385,r7,r8 ; Maximum negative long signed immediate + addu 2147483647,r10,r11 ; Maximum positive long signed immediate + addu -2147483648,r12,r13 ; Minimum negative long signed immediate diff --git a/gas/testsuite/gas/tic80/align.d b/gas/testsuite/gas/tic80/align.d new file mode 100644 index 0000000..88f9610 --- /dev/null +++ b/gas/testsuite/gas/tic80/align.d @@ -0,0 +1,19 @@ +#objdump: -d +#name: TIc80 .align pseudo op + +.*: +file format .*tic80.* + +Disassembly of section .text: + +00000000 <.text>: + 0: ab 00 00 00.* + 4: cd 00 ef 00.* + 8: f1 00 00 00.* + c: ee 00 00 00.* + 10: ac 00 00 00.* + 14: 00 00 00 00.* + 18: ab 00 00 00.* + 1c: 00 00 00 00.* + 20: fe 00 00 00.* + \.\.\. + 30: de ad be ef.* diff --git a/gas/testsuite/gas/tic80/align.lst b/gas/testsuite/gas/tic80/align.lst new file mode 100644 index 0000000..915415a --- /dev/null +++ b/gas/testsuite/gas/tic80/align.lst @@ -0,0 +1,47 @@ +MVP MP Macro Assembler Version 1.13 Thu Feb 27 17:02:23 1997 +Copyright (c) 1993-1995 Texas Instruments Incorporated + +align.s PAGE 1 + + 1 ;; Test the .align directive. + 2 + 3 00000000 .text + 4 + 5 ;; This should generate 0xAB000000 + 6 00000000 AB .byte 0xAB + 7 00000001 .align ; Should default to 4 byte alignment + 8 + 9 ;; This should generate 0xCD00EF00 + 10 00000004 CD .byte 0xCD + 11 .align 2 ; Should align to the next 2-byte boundary (pad with one null byt + 12 00000006 EF .byte 0xEF + 13 .align 1 + 14 + 15 ;; This should generate 0xF1000000 + 16 00000007 .align 4 ; Should not affect alignment (already on 4) + 17 00000008 F1 .byte 0xF1 + 18 00000009 .align 4 ; Should align to next 4 byte boundary + 19 + 20 ;; This should generate 0xEE000000 since we are already on 4 byte alignment + 21 0000000C EE .byte 0xEE + 22 0000000D .align 8 + 23 + 24 ;; This should generate 0xAC000000 0x00000000 + 25 00000010 AC .byte 0xAC + 26 00000011 .align 8 + 27 + 28 ;; This should generate 0xAB000000 0x00000000 since we are at 8 byte alignment + 29 00000018 AB .byte 0xAB + 30 00000019 .align 16 + 31 + 32 ;; This should generate 0xFE000000 0x00000000 0x00000000 0x00000000 + 33 00000020 FE .byte 0xFE + 34 00000021 .align 16 + 35 + 36 ;; This just forces the disassembler to not print ... for trailing nulls + 37 00000030 DE .byte 0xDE, 0xAD, 0xBE, 0xEF + 00000031 AD + 00000032 BE + 00000033 EF + + No Errors, No Warnings diff --git a/gas/testsuite/gas/tic80/align.s b/gas/testsuite/gas/tic80/align.s new file mode 100644 index 0000000..02c1256 --- /dev/null +++ b/gas/testsuite/gas/tic80/align.s @@ -0,0 +1,37 @@ +;; Test the .align directive. + + .text + + ;; This should generate 0xAB000000 + .byte 0xAB + .align ; Should default to 4 byte alignment + + ;; This should generate 0xCD00EF00 + .byte 0xCD + .align 2 ; Should align to the next 2-byte boundary (pad with one null byte) + .byte 0xEF + .align 1 + + ;; This should generate 0xF1000000 + .align 4 ; Should not affect alignment (already on 4) + .byte 0xF1 + .align 4 ; Should align to next 4 byte boundary + + ;; This should generate 0xEE000000 since we are already on 4 byte alignment + .byte 0xEE + .align 8 + + ;; This should generate 0xAC000000 0x00000000 + .byte 0xAC + .align 8 + + ;; This should generate 0xAB000000 0x00000000 since we are at 8 byte alignment + .byte 0xAB + .align 16 + + ;; This should generate 0xFE000000 0x00000000 0x00000000 0x00000000 + .byte 0xFE + .align 16 + + ;; This just forces the disassembler to not print ... for trailing nulls + .byte 0xDE, 0xAD, 0xBE, 0xEF diff --git a/gas/testsuite/gas/tic80/bitnum.d b/gas/testsuite/gas/tic80/bitnum.d new file mode 100644 index 0000000..fcaee8b --- /dev/null +++ b/gas/testsuite/gas/tic80/bitnum.d @@ -0,0 +1,82 @@ +#objdump: -d +#name: TIc80 coverage of symbolic BITNUM values + +.*: +file format .*tic80.* + +Disassembly of section .text: + +00000000 <.text>: + 0: 0a 40 39 fa.* + 4: 0a 40 39 f2.* + 8: 0a 40 39 ea.* + c: 0a 40 39 e2.* + 10: 0a 40 39 da.* + 14: 0a 40 39 d2.* + 18: 0a 40 39 ca.* + 1c: 0a 40 39 c2.* + 20: 0a 40 39 ba.* + 24: 0a 40 39 b2.* + 28: 0a 40 39 aa.* + 2c: 0a 40 39 a2.* + 30: 0a 40 39 9a.* + 34: 0a 40 39 92.* + 38: 0a 40 39 8a.* + 3c: 0a 40 39 82.* + 40: 0a 40 39 7a.* + 44: 0a 40 39 72.* + 48: 0a 40 39 6a.* + 4c: 0a 40 39 62.* + 50: 0a 40 39 5a.* + 54: 0a 40 39 52.* + 58: 0a 40 39 4a.* + 5c: 0a 40 39 42.* + 60: 0a 40 39 3a.* + 64: 0a 40 39 32.* + 68: 0a 40 39 2a.* + 6c: 0a 40 39 22.* + 70: 0a 40 39 1a.* + 74: 0a 40 39 12.* + 78: 0a 40 39 5a.* + 7c: 0a 40 39 52.* + 80: 0a 40 39 4a.* + 84: 0a 40 39 42.* + 88: 0a 40 39 3a.* + 8c: 0a 40 39 32.* + 90: 0a 40 39 2a.* + 94: 0a 40 39 22.* + 98: 0a 40 39 1a.* + 9c: 0a 40 39 12.* + a0: 0a 40 39 0a.* + a4: 0a 40 39 02.* + a8: 0a 40 39 fa.* + ac: 0a 40 39 f2.* + b0: 0a 40 39 ea.* + b4: 0a 40 39 e2.* + b8: 0a 40 39 da.* + bc: 0a 40 39 d2.* + c0: 0a 40 39 ca.* + c4: 0a 40 39 c2.* + c8: 0a 40 39 ba.* + cc: 0a 40 39 b2.* + d0: 0a 40 39 aa.* + d4: 0a 40 39 a2.* + d8: 0a 40 39 9a.* + dc: 0a 40 39 92.* + e0: 0a 40 39 8a.* + e4: 0a 40 39 82.* + e8: 0a 40 39 7a.* + ec: 0a 40 39 72.* + f0: 0a 40 39 6a.* + f4: 0a 40 39 62.* + f8: 0a 40 39 5a.* + fc: 0a 40 39 52.* + 100: 0a 40 39 4a.* + 104: 0a 40 39 42.* + 108: 0a 40 39 3a.* + 10c: 0a 40 39 32.* + 110: 0a 40 39 2a.* + 114: 0a 40 39 22.* + 118: 0a 40 39 1a.* + 11c: 0a 40 39 12.* + 120: 0a 40 39 0a.* + 124: 0a 40 39 02.* diff --git a/gas/testsuite/gas/tic80/bitnum.lst b/gas/testsuite/gas/tic80/bitnum.lst new file mode 100644 index 0000000..acc268b --- /dev/null +++ b/gas/testsuite/gas/tic80/bitnum.lst @@ -0,0 +1,97 @@ +MVP MP Macro Assembler Version 1.13 Sat Feb 22 21:37:15 1997 +Copyright (c) 1993-1995 Texas Instruments Incorporated + +bitnum.s PAGE 1 + + 1 ;; Test that all the predefined symbol names for the BITNUM field + 2 ;; are properly accepted and translated to numeric values. Also + 3 ;; verifies that they are disassembled correctly as symbolics, and + 4 ;; that the raw numeric values are handled correctly (stored as + 5 ;; the one's complement of the operand numeric value. + 6 + 7 00000000 FA39400A bbo r10,r8,eq.b ; (~0 & 0x1F) + 8 00000004 F239400A bbo r10,r8,ne.b ; (~1 & 0x1F) + 9 00000008 EA39400A bbo r10,r8,gt.b ; (~2 & 0x1F) + 10 0000000C E239400A bbo r10,r8,le.b ; (~3 & 0x1F) + 11 00000010 DA39400A bbo r10,r8,lt.b ; (~4 & 0x1F) + 12 00000014 D239400A bbo r10,r8,ge.b ; (~5 & 0x1F) + 13 00000018 CA39400A bbo r10,r8,hi.b ; (~6 & 0x1F) + 14 0000001C C239400A bbo r10,r8,ls.b ; (~7 & 0x1F) + 15 00000020 BA39400A bbo r10,r8,lo.b ; (~8 & 0x1F) + 16 00000024 B239400A bbo r10,r8,hs.b ; (~9 & 0x1F) + 17 + 18 00000028 AA39400A bbo r10,r8,eq.h ; (~10 & 0x1F) + 19 0000002C A239400A bbo r10,r8,ne.h ; (~11 & 0x1F) + 20 00000030 9A39400A bbo r10,r8,gt.h ; (~12 & 0x1F) + 21 00000034 9239400A bbo r10,r8,le.h ; (~13 & 0x1F) + 22 00000038 8A39400A bbo r10,r8,lt.h ; (~14 & 0x1F) + 23 0000003C 8239400A bbo r10,r8,ge.h ; (~15 & 0x1F) + 24 00000040 7A39400A bbo r10,r8,hi.h ; (~16 & 0x1F) + 25 00000044 7239400A bbo r10,r8,ls.h ; (~17 & 0x1F) + 26 00000048 6A39400A bbo r10,r8,lo.h ; (~18 & 0x1F) + 27 0000004C 6239400A bbo r10,r8,hs.h ; (~19 & 0x1F) + 28 + 29 00000050 5A39400A bbo r10,r8,eq.w ; (~20 & 0x1F) + 30 00000054 5239400A bbo r10,r8,ne.w ; (~21 & 0x1F) + 31 00000058 4A39400A bbo r10,r8,gt.w ; (~22 & 0x1F) + 32 0000005C 4239400A bbo r10,r8,le.w ; (~23 & 0x1F) + 33 00000060 3A39400A bbo r10,r8,lt.w ; (~24 & 0x1F) + 34 00000064 3239400A bbo r10,r8,ge.w ; (~25 & 0x1F) + 35 00000068 2A39400A bbo r10,r8,hi.w ; (~26 & 0x1F) + 36 0000006C 2239400A bbo r10,r8,ls.w ; (~27 & 0x1F) + 37 00000070 1A39400A bbo r10,r8,lo.w ; (~28 & 0x1F) + 38 00000074 1239400A bbo r10,r8,hs.w ; (~29 & 0x1F) + 39 + 40 00000078 5A39400A bbo r10,r8,eq.f ; (~20 & 0x1F) + 41 0000007C 5239400A bbo r10,r8,ne.f ; (~21 & 0x1F) + 42 00000080 4A39400A bbo r10,r8,gt.f ; (~22 & 0x1F) + 43 00000084 4239400A bbo r10,r8,le.f ; (~23 & 0x1F) + 44 00000088 3A39400A bbo r10,r8,lt.f ; (~24 & 0x1F) + 45 0000008C 3239400A bbo r10,r8,ge.f ; (~25 & 0x1F) + 46 00000090 2A39400A bbo r10,r8,ou.f ; (~26 & 0x1F) + 47 00000094 2239400A bbo r10,r8,in.f ; (~27 & 0x1F) + 48 00000098 1A39400A bbo r10,r8,ib.f ; (~28 & 0x1F) + 49 0000009C 1239400A bbo r10,r8,ob.f ; (~29 & 0x1F) + 50 000000A0 0A39400A bbo r10,r8,uo.f ; (~30 & 0x1F) + 51 000000A4 0239400A bbo r10,r8,or.f ; (~31 & 0x1F) + 52 + 53 000000A8 FA39400A bbo r10,r8,0 + 54 000000AC F239400A bbo r10,r8,1 + 55 000000B0 EA39400A bbo r10,r8,2 + MVP MP Macro Assembler Version 1.13 Sat Feb 22 21:37:15 1997 +Copyright (c) 1993-1995 Texas Instruments Incorporated + +bitnum.s PAGE 2 + + 56 000000B4 E239400A bbo r10,r8,3 + 57 000000B8 DA39400A bbo r10,r8,4 + 58 000000BC D239400A bbo r10,r8,5 + 59 000000C0 CA39400A bbo r10,r8,6 + 60 000000C4 C239400A bbo r10,r8,7 + 61 000000C8 BA39400A bbo r10,r8,8 + 62 000000CC B239400A bbo r10,r8,9 + 63 000000D0 AA39400A bbo r10,r8,10 + 64 000000D4 A239400A bbo r10,r8,11 + 65 000000D8 9A39400A bbo r10,r8,12 + 66 000000DC 9239400A bbo r10,r8,13 + 67 000000E0 8A39400A bbo r10,r8,14 + 68 000000E4 8239400A bbo r10,r8,15 + 69 000000E8 7A39400A bbo r10,r8,16 + 70 000000EC 7239400A bbo r10,r8,17 + 71 000000F0 6A39400A bbo r10,r8,18 + 72 000000F4 6239400A bbo r10,r8,19 + 73 000000F8 5A39400A bbo r10,r8,20 + 74 000000FC 5239400A bbo r10,r8,21 + 75 00000100 4A39400A bbo r10,r8,22 + 76 00000104 4239400A bbo r10,r8,23 + 77 00000108 3A39400A bbo r10,r8,24 + 78 0000010C 3239400A bbo r10,r8,25 + 79 00000110 2A39400A bbo r10,r8,26 + 80 00000114 2239400A bbo r10,r8,27 + 81 00000118 1A39400A bbo r10,r8,28 + 82 0000011C 1239400A bbo r10,r8,29 + 83 00000120 0A39400A bbo r10,r8,30 + 84 00000124 0239400A bbo r10,r8,31 + 85 + + No Errors, No Warnings diff --git a/gas/testsuite/gas/tic80/bitnum.s b/gas/testsuite/gas/tic80/bitnum.s new file mode 100644 index 0000000..2526e06 --- /dev/null +++ b/gas/testsuite/gas/tic80/bitnum.s @@ -0,0 +1,85 @@ +;; Test that all the predefined symbol names for the BITNUM field +;; are properly accepted and translated to numeric values. Also +;; verifies that they are disassembled correctly as symbolics, and +;; that the raw numeric values are handled correctly (stored as +;; the one's complement of the operand numeric value. + + bbo r10,r8,eq.b ; (~0 & 0x1F) + bbo r10,r8,ne.b ; (~1 & 0x1F) + bbo r10,r8,gt.b ; (~2 & 0x1F) + bbo r10,r8,le.b ; (~3 & 0x1F) + bbo r10,r8,lt.b ; (~4 & 0x1F) + bbo r10,r8,ge.b ; (~5 & 0x1F) + bbo r10,r8,hi.b ; (~6 & 0x1F) + bbo r10,r8,ls.b ; (~7 & 0x1F) + bbo r10,r8,lo.b ; (~8 & 0x1F) + bbo r10,r8,hs.b ; (~9 & 0x1F) + + bbo r10,r8,eq.h ; (~10 & 0x1F) + bbo r10,r8,ne.h ; (~11 & 0x1F) + bbo r10,r8,gt.h ; (~12 & 0x1F) + bbo r10,r8,le.h ; (~13 & 0x1F) + bbo r10,r8,lt.h ; (~14 & 0x1F) + bbo r10,r8,ge.h ; (~15 & 0x1F) + bbo r10,r8,hi.h ; (~16 & 0x1F) + bbo r10,r8,ls.h ; (~17 & 0x1F) + bbo r10,r8,lo.h ; (~18 & 0x1F) + bbo r10,r8,hs.h ; (~19 & 0x1F) + + bbo r10,r8,eq.w ; (~20 & 0x1F) + bbo r10,r8,ne.w ; (~21 & 0x1F) + bbo r10,r8,gt.w ; (~22 & 0x1F) + bbo r10,r8,le.w ; (~23 & 0x1F) + bbo r10,r8,lt.w ; (~24 & 0x1F) + bbo r10,r8,ge.w ; (~25 & 0x1F) + bbo r10,r8,hi.w ; (~26 & 0x1F) + bbo r10,r8,ls.w ; (~27 & 0x1F) + bbo r10,r8,lo.w ; (~28 & 0x1F) + bbo r10,r8,hs.w ; (~29 & 0x1F) + + bbo r10,r8,eq.f ; (~20 & 0x1F) + bbo r10,r8,ne.f ; (~21 & 0x1F) + bbo r10,r8,gt.f ; (~22 & 0x1F) + bbo r10,r8,le.f ; (~23 & 0x1F) + bbo r10,r8,lt.f ; (~24 & 0x1F) + bbo r10,r8,ge.f ; (~25 & 0x1F) + bbo r10,r8,ou.f ; (~26 & 0x1F) + bbo r10,r8,in.f ; (~27 & 0x1F) + bbo r10,r8,ib.f ; (~28 & 0x1F) + bbo r10,r8,ob.f ; (~29 & 0x1F) + bbo r10,r8,uo.f ; (~30 & 0x1F) + bbo r10,r8,or.f ; (~31 & 0x1F) + + bbo r10,r8,0 + bbo r10,r8,1 + bbo r10,r8,2 + bbo r10,r8,3 + bbo r10,r8,4 + bbo r10,r8,5 + bbo r10,r8,6 + bbo r10,r8,7 + bbo r10,r8,8 + bbo r10,r8,9 + bbo r10,r8,10 + bbo r10,r8,11 + bbo r10,r8,12 + bbo r10,r8,13 + bbo r10,r8,14 + bbo r10,r8,15 + bbo r10,r8,16 + bbo r10,r8,17 + bbo r10,r8,18 + bbo r10,r8,19 + bbo r10,r8,20 + bbo r10,r8,21 + bbo r10,r8,22 + bbo r10,r8,23 + bbo r10,r8,24 + bbo r10,r8,25 + bbo r10,r8,26 + bbo r10,r8,27 + bbo r10,r8,28 + bbo r10,r8,29 + bbo r10,r8,30 + bbo r10,r8,31 + diff --git a/gas/testsuite/gas/tic80/ccode.d b/gas/testsuite/gas/tic80/ccode.d new file mode 100644 index 0000000..b5a38aa --- /dev/null +++ b/gas/testsuite/gas/tic80/ccode.d @@ -0,0 +1,32 @@ +#objdump: -d +#name: TIc80 coverage of symbolic condition code values + +.*: +file format .*tic80.* + +Disassembly of section .text: + +00000000 <.text>: + 0: 07 a0 79 01.* + 4: 07 a0 79 09.* + 8: 07 a0 79 11.* + c: 07 a0 79 19.* + 10: 07 a0 79 21.* + 14: 07 a0 79 29.* + 18: 07 a0 79 31.* + 1c: 07 a0 79 39.* + 20: 07 a0 79 41.* + 24: 07 a0 79 49.* + 28: 07 a0 79 51.* + 2c: 07 a0 79 59.* + 30: 07 a0 79 61.* + 34: 07 a0 79 69.* + 38: 07 a0 79 71.* + 3c: 07 a0 79 79.* + 40: 07 a0 79 81.* + 44: 07 a0 79 89.* + 48: 07 a0 79 91.* + 4c: 07 a0 79 99.* + 50: 07 a0 79 a1.* + 54: 07 a0 79 a9.* + 58: 07 a0 79 b1.* + 5c: 07 a0 79 b9.* diff --git a/gas/testsuite/gas/tic80/ccode.lst b/gas/testsuite/gas/tic80/ccode.lst new file mode 100644 index 0000000..460351c --- /dev/null +++ b/gas/testsuite/gas/tic80/ccode.lst @@ -0,0 +1,37 @@ +MVP MP Macro Assembler Version 1.13 Mon Feb 10 17:00:49 1997 +Copyright (c) 1993-1995 Texas Instruments Incorporated + +ccode.s PAGE 1 + + 1 ;; Test that all the predefined symbol names for the condition + 2 ;; codes are properly accepted and translated to numeric values. + 3 ;; Also verifies that they are disassembled correctly as symbolics. + 4 + 5 00000000 0179A007 bcnd.a r7,r5,nev.b ; 00000 + 6 00000004 0979A007 bcnd.a r7,r5,gt0.b ; 00001 + 7 00000008 1179A007 bcnd.a r7,r5,eq0.b ; 00010 + 8 0000000C 1979A007 bcnd.a r7,r5,ge0.b ; 00011 + 9 00000010 2179A007 bcnd.a r7,r5,lt0.b ; 00100 + 10 00000014 2979A007 bcnd.a r7,r5,ne0.b ; 00101 + 11 00000018 3179A007 bcnd.a r7,r5,le0.b ; 00110 + 12 0000001C 3979A007 bcnd.a r7,r5,alw.b ; 00111 + 13 + 14 00000020 4179A007 bcnd.a r7,r5,nev.h ; 01000 + 15 00000024 4979A007 bcnd.a r7,r5,gt0.h ; 01001 + 16 00000028 5179A007 bcnd.a r7,r5,eq0.h ; 01010 + 17 0000002C 5979A007 bcnd.a r7,r5,ge0.h ; 01011 + 18 00000030 6179A007 bcnd.a r7,r5,lt0.h ; 01100 + 19 00000034 6979A007 bcnd.a r7,r5,ne0.h ; 01101 + 20 00000038 7179A007 bcnd.a r7,r5,le0.h ; 01110 + 21 0000003C 7979A007 bcnd.a r7,r5,alw.h ; 01111 + 22 + 23 00000040 8179A007 bcnd.a r7,r5,nev.w ; 10000 + 24 00000044 8979A007 bcnd.a r7,r5,gt0.w ; 10001 + 25 00000048 9179A007 bcnd.a r7,r5,eq0.w ; 10010 + 26 0000004C 9979A007 bcnd.a r7,r5,ge0.w ; 10011 + 27 00000050 A179A007 bcnd.a r7,r5,lt0.w ; 10100 + 28 00000054 A979A007 bcnd.a r7,r5,ne0.w ; 10101 + 29 00000058 B179A007 bcnd.a r7,r5,le0.w ; 10110 + 30 0000005C B979A007 bcnd.a r7,r5,alw.w ; 10111 + + No Errors, No Warnings diff --git a/gas/testsuite/gas/tic80/ccode.s b/gas/testsuite/gas/tic80/ccode.s new file mode 100644 index 0000000..9e4aac1 --- /dev/null +++ b/gas/testsuite/gas/tic80/ccode.s @@ -0,0 +1,30 @@ +;; Test that all the predefined symbol names for the condition +;; codes are properly accepted and translated to numeric values. +;; Also verifies that they are disassembled correctly as symbolics. + + bcnd.a r7,r5,nev.b ; 00000 + bcnd.a r7,r5,gt0.b ; 00001 + bcnd.a r7,r5,eq0.b ; 00010 + bcnd.a r7,r5,ge0.b ; 00011 + bcnd.a r7,r5,lt0.b ; 00100 + bcnd.a r7,r5,ne0.b ; 00101 + bcnd.a r7,r5,le0.b ; 00110 + bcnd.a r7,r5,alw.b ; 00111 + + bcnd.a r7,r5,nev.h ; 01000 + bcnd.a r7,r5,gt0.h ; 01001 + bcnd.a r7,r5,eq0.h ; 01010 + bcnd.a r7,r5,ge0.h ; 01011 + bcnd.a r7,r5,lt0.h ; 01100 + bcnd.a r7,r5,ne0.h ; 01101 + bcnd.a r7,r5,le0.h ; 01110 + bcnd.a r7,r5,alw.h ; 01111 + + bcnd.a r7,r5,nev.w ; 10000 + bcnd.a r7,r5,gt0.w ; 10001 + bcnd.a r7,r5,eq0.w ; 10010 + bcnd.a r7,r5,ge0.w ; 10011 + bcnd.a r7,r5,lt0.w ; 10100 + bcnd.a r7,r5,ne0.w ; 10101 + bcnd.a r7,r5,le0.w ; 10110 + bcnd.a r7,r5,alw.w ; 10111 diff --git a/gas/testsuite/gas/tic80/cregops.d b/gas/testsuite/gas/tic80/cregops.d new file mode 100644 index 0000000..44b61e9 --- /dev/null +++ b/gas/testsuite/gas/tic80/cregops.d @@ -0,0 +1,68 @@ +#objdump: -d +#name: TIc80 control register operands + +.*: +file format .*tic80.* + +Disassembly of section .text: + +00000000 <.text>: + 0: 34 00 02 10.* + 4: 39 00 02 10.* + 8: 3a 00 02 10.* + c: 02 00 02 10.* + 10: 00 05 02 10.* + 14: 00 04 02 10.* + 18: 01 04 02 10.* + 1c: 0a 04 02 10.* + 20: 0b 04 02 10.* + 24: 0c 04 02 10.* + 28: 0d 04 02 10.* + 2c: 0e 04 02 10.* + 30: 0f 04 02 10.* + 34: 02 04 02 10.* + 38: 03 04 02 10.* + 3c: 04 04 02 10.* + 40: 05 04 02 10.* + 44: 06 04 02 10.* + 48: 07 04 02 10.* + 4c: 08 04 02 10.* + 50: 09 04 02 10.* + 54: 33 00 02 10.* + 58: 01 00 02 10.* + 5c: 00 00 02 10.* + 60: 11 00 02 10.* + 64: 14 00 02 10.* + 68: 13 00 02 10.* + 6c: 10 00 02 10.* + 70: 12 00 02 10.* + 74: 08 00 02 10.* + 78: 06 00 02 10.* + 7c: 00 03 02 10.* + 80: 00 40 02 10.* + 84: 01 40 02 10.* + 88: 04 00 02 10.* + 8c: 00 02 02 10.* + 90: 01 02 02 10.* + 94: 0a 02 02 10.* + 98: 0b 02 02 10.* + 9c: 0c 02 02 10.* + a0: 0d 02 02 10.* + a4: 0e 02 02 10.* + a8: 0f 02 02 10.* + ac: 02 02 02 10.* + b0: 03 02 02 10.* + b4: 04 02 02 10.* + b8: 05 02 02 10.* + bc: 06 02 02 10.* + c0: 07 02 02 10.* + c4: 08 02 02 10.* + c8: 09 02 02 10.* + cc: 31 00 02 10.* + d0: 30 00 02 10.* + d4: 02 40 02 10.* + d8: 0d 00 02 10.* + dc: 0a 00 02 10.* + e0: 20 00 02 10.* + e4: 21 00 02 10.* + e8: 0e 00 02 10.* + ec: 0f 00 02 10.* diff --git a/gas/testsuite/gas/tic80/cregops.lst b/gas/testsuite/gas/tic80/cregops.lst new file mode 100644 index 0000000..65ea57f --- /dev/null +++ b/gas/testsuite/gas/tic80/cregops.lst @@ -0,0 +1,76 @@ +MVP MP Macro Assembler Version 1.13 Mon Feb 10 17:00:56 1997 +Copyright (c) 1993-1995 Texas Instruments Incorporated + +cregops.s PAGE 1 + + 1 ;; Test that all predefined symbol names for control registers + 2 ;; are properly accepted and translated to numeric values. Also + 3 ;; verifies that they are diassembled correctly as symbolics. + 4 + 5 00000000 10020034 rdcr ANASTAT,r2 + 6 00000004 10020039 rdcr BRK1,r2 + 7 00000008 1002003A rdcr BRK2,r2 + 8 0000000C 10020002 rdcr CONFIG,r2 + 9 00000010 10020500 rdcr DLRU,r2 + 10 00000014 10020400 rdcr DTAG0,r2 + 11 00000018 10020401 rdcr DTAG1,r2 + 12 0000001C 1002040A rdcr DTAG10,r2 + 13 00000020 1002040B rdcr DTAG11,r2 + 14 00000024 1002040C rdcr DTAG12,r2 + 15 00000028 1002040D rdcr DTAG13,r2 + 16 0000002C 1002040E rdcr DTAG14,r2 + 17 00000030 1002040F rdcr DTAG15,r2 + 18 00000034 10020402 rdcr DTAG2,r2 + 19 00000038 10020403 rdcr DTAG3,r2 + 20 0000003C 10020404 rdcr DTAG4,r2 + 21 00000040 10020405 rdcr DTAG5,r2 + 22 00000044 10020406 rdcr DTAG6,r2 + 23 00000048 10020407 rdcr DTAG7,r2 + 24 0000004C 10020408 rdcr DTAG8,r2 + 25 00000050 10020409 rdcr DTAG9,r2 + 26 00000054 10020033 rdcr ECOMCNTL,r2 + 27 00000058 10020001 rdcr EIP,r2 + 28 0000005C 10020000 rdcr EPC,r2 + 29 00000060 10020011 rdcr FLTADR,r2 + 30 00000064 10020014 rdcr FLTDTH,r2 + 31 00000068 10020013 rdcr FLTDTL,r2 + 32 0000006C 10020010 rdcr FLTOP,r2 + 33 00000070 10020012 rdcr FLTTAG,r2 + 34 00000074 10020008 rdcr FPST,r2 + 35 00000078 10020006 rdcr IE,r2 + 36 0000007C 10020300 rdcr ILRU,r2 + 37 00000080 10024000 rdcr IN0P,r2 + 38 00000084 10024001 rdcr IN1P,r2 + 39 00000088 10020004 rdcr INTPEN,r2 + 40 0000008C 10020200 rdcr ITAG0,r2 + 41 00000090 10020201 rdcr ITAG1,r2 + 42 00000094 1002020A rdcr ITAG10,r2 + 43 00000098 1002020B rdcr ITAG11,r2 + 44 0000009C 1002020C rdcr ITAG12,r2 + 45 000000A0 1002020D rdcr ITAG13,r2 + 46 000000A4 1002020E rdcr ITAG14,r2 + 47 000000A8 1002020F rdcr ITAG15,r2 + 48 000000AC 10020202 rdcr ITAG2,r2 + 49 000000B0 10020203 rdcr ITAG3,r2 + 50 000000B4 10020204 rdcr ITAG4,r2 + 51 000000B8 10020205 rdcr ITAG5,r2 + 52 000000BC 10020206 rdcr ITAG6,r2 + 53 000000C0 10020207 rdcr ITAG7,r2 + 54 000000C4 10020208 rdcr ITAG8,r2 + 55 000000C8 10020209 rdcr ITAG9,r2 + MVP MP Macro Assembler Version 1.13 Mon Feb 10 17:00:56 1997 +Copyright (c) 1993-1995 Texas Instruments Incorporated + +cregops.s PAGE 2 + + 56 000000CC 10020031 rdcr MIP,r2 + 57 000000D0 10020030 rdcr MPC,r2 + 58 000000D4 10024002 rdcr OUTP,r2 + 59 000000D8 1002000D rdcr PKTREQ,r2 + 60 000000DC 1002000A rdcr PPERROR,r2 + 61 000000E0 10020020 rdcr SYSSTK,r2 + 62 000000E4 10020021 rdcr SYSTMP,r2 + 63 000000E8 1002000E rdcr TCOUNT,r2 + 64 000000EC 1002000F rdcr TSCALE,r2 + + No Errors, No Warnings diff --git a/gas/testsuite/gas/tic80/cregops.s b/gas/testsuite/gas/tic80/cregops.s new file mode 100644 index 0000000..8a0adcf --- /dev/null +++ b/gas/testsuite/gas/tic80/cregops.s @@ -0,0 +1,64 @@ +;; Test that all predefined symbol names for control registers +;; are properly accepted and translated to numeric values. Also +;; verifies that they are diassembled correctly as symbolics. + + rdcr ANASTAT,r2 + rdcr BRK1,r2 + rdcr BRK2,r2 + rdcr CONFIG,r2 + rdcr DLRU,r2 + rdcr DTAG0,r2 + rdcr DTAG1,r2 + rdcr DTAG10,r2 + rdcr DTAG11,r2 + rdcr DTAG12,r2 + rdcr DTAG13,r2 + rdcr DTAG14,r2 + rdcr DTAG15,r2 + rdcr DTAG2,r2 + rdcr DTAG3,r2 + rdcr DTAG4,r2 + rdcr DTAG5,r2 + rdcr DTAG6,r2 + rdcr DTAG7,r2 + rdcr DTAG8,r2 + rdcr DTAG9,r2 + rdcr ECOMCNTL,r2 + rdcr EIP,r2 + rdcr EPC,r2 + rdcr FLTADR,r2 + rdcr FLTDTH,r2 + rdcr FLTDTL,r2 + rdcr FLTOP,r2 + rdcr FLTTAG,r2 + rdcr FPST,r2 + rdcr IE,r2 + rdcr ILRU,r2 + rdcr IN0P,r2 + rdcr IN1P,r2 + rdcr INTPEN,r2 + rdcr ITAG0,r2 + rdcr ITAG1,r2 + rdcr ITAG10,r2 + rdcr ITAG11,r2 + rdcr ITAG12,r2 + rdcr ITAG13,r2 + rdcr ITAG14,r2 + rdcr ITAG15,r2 + rdcr ITAG2,r2 + rdcr ITAG3,r2 + rdcr ITAG4,r2 + rdcr ITAG5,r2 + rdcr ITAG6,r2 + rdcr ITAG7,r2 + rdcr ITAG8,r2 + rdcr ITAG9,r2 + rdcr MIP,r2 + rdcr MPC,r2 + rdcr OUTP,r2 + rdcr PKTREQ,r2 + rdcr PPERROR,r2 + rdcr SYSSTK,r2 + rdcr SYSTMP,r2 + rdcr TCOUNT,r2 + rdcr TSCALE,r2 diff --git a/gas/testsuite/gas/tic80/endmask.d b/gas/testsuite/gas/tic80/endmask.d new file mode 100644 index 0000000..5cd0847 --- /dev/null +++ b/gas/testsuite/gas/tic80/endmask.d @@ -0,0 +1,41 @@ +#objdump: -d +#name: TIc80 coverage of shift instruction ENDMASK field + +.*: +file format .*tic80.* + +Disassembly of section .text: + +00000000 <.text>: + 0: 05 00 c7 49.* + 4: 25 00 c7 49.* + 8: 45 00 c7 49.* + c: 65 00 c7 49.* + 10: 85 00 c7 49.* + 14: a5 00 c7 49.* + 18: c5 00 c7 49.* + 1c: e5 00 c7 49.* + 20: 05 01 c7 49.* + 24: 25 01 c7 49.* + 28: 45 01 c7 49.* + 2c: 65 01 c7 49.* + 30: 85 01 c7 49.* + 34: a5 01 c7 49.* + 38: c5 01 c7 49.* + 3c: e5 01 c7 49.* + 40: 05 02 c7 49.* + 44: 25 02 c7 49.* + 48: 45 02 c7 49.* + 4c: 65 02 c7 49.* + 50: 85 02 c7 49.* + 54: a5 02 c7 49.* + 58: c5 02 c7 49.* + 5c: e5 02 c7 49.* + 60: 05 03 c7 49.* + 64: 25 03 c7 49.* + 68: 45 03 c7 49.* + 6c: 65 03 c7 49.* + 70: 85 03 c7 49.* + 74: a5 03 c7 49.* + 78: c5 03 c7 49.* + 7c: e5 03 c7 49.* + 80: 05 00 c7 49.* diff --git a/gas/testsuite/gas/tic80/endmask.lst b/gas/testsuite/gas/tic80/endmask.lst new file mode 100644 index 0000000..9103b33 --- /dev/null +++ b/gas/testsuite/gas/tic80/endmask.lst @@ -0,0 +1,45 @@ +MVP MP Macro Assembler Version 1.13 Mon Feb 10 17:00:29 1997 +Copyright (c) 1993-1995 Texas Instruments Incorporated + +endmask.s PAGE 1 + + 1 ;; Test all possible combinations of the endmask in bits 5-9. + 2 ;; The mask that is used is computed as 2**bits-1 where bits + 3 ;; are the bits 5-9 from the instruction. Note that 0 and 32 + 4 ;; are treated identically, and disassembled as 0. + 5 + 6 00000000 49C70005 sl.iz 5,0,r7,r9 + 7 00000004 49C70025 sl.iz 5,1,r7,r9 + 8 00000008 49C70045 sl.iz 5,2,r7,r9 + 9 0000000C 49C70065 sl.iz 5,3,r7,r9 + 10 00000010 49C70085 sl.iz 5,4,r7,r9 + 11 00000014 49C700A5 sl.iz 5,5,r7,r9 + 12 00000018 49C700C5 sl.iz 5,6,r7,r9 + 13 0000001C 49C700E5 sl.iz 5,7,r7,r9 + 14 00000020 49C70105 sl.iz 5,8,r7,r9 + 15 00000024 49C70125 sl.iz 5,9,r7,r9 + 16 00000028 49C70145 sl.iz 5,10,r7,r9 + 17 0000002C 49C70165 sl.iz 5,11,r7,r9 + 18 00000030 49C70185 sl.iz 5,12,r7,r9 + 19 00000034 49C701A5 sl.iz 5,13,r7,r9 + 20 00000038 49C701C5 sl.iz 5,14,r7,r9 + 21 0000003C 49C701E5 sl.iz 5,15,r7,r9 + 22 00000040 49C70205 sl.iz 5,16,r7,r9 + 23 00000044 49C70225 sl.iz 5,17,r7,r9 + 24 00000048 49C70245 sl.iz 5,18,r7,r9 + 25 0000004C 49C70265 sl.iz 5,19,r7,r9 + 26 00000050 49C70285 sl.iz 5,20,r7,r9 + 27 00000054 49C702A5 sl.iz 5,21,r7,r9 + 28 00000058 49C702C5 sl.iz 5,22,r7,r9 + 29 0000005C 49C702E5 sl.iz 5,23,r7,r9 + 30 00000060 49C70305 sl.iz 5,24,r7,r9 + 31 00000064 49C70325 sl.iz 5,25,r7,r9 + 32 00000068 49C70345 sl.iz 5,26,r7,r9 + 33 0000006C 49C70365 sl.iz 5,27,r7,r9 + 34 00000070 49C70385 sl.iz 5,28,r7,r9 + 35 00000074 49C703A5 sl.iz 5,29,r7,r9 + 36 00000078 49C703C5 sl.iz 5,30,r7,r9 + 37 0000007C 49C703E5 sl.iz 5,31,r7,r9 + 38 00000080 49C70005 sl.iz 5,32,r7,r9 + + No Errors, No Warnings diff --git a/gas/testsuite/gas/tic80/endmask.s b/gas/testsuite/gas/tic80/endmask.s new file mode 100644 index 0000000..a36aede --- /dev/null +++ b/gas/testsuite/gas/tic80/endmask.s @@ -0,0 +1,38 @@ +;; Test all possible combinations of the endmask in bits 5-9. +;; The mask that is used is computed as 2**bits-1 where bits +;; are the bits 5-9 from the instruction. Note that 0 and 32 +;; are treated identically, and disassembled as 0. + + sl.iz 5,0,r7,r9 + sl.iz 5,1,r7,r9 + sl.iz 5,2,r7,r9 + sl.iz 5,3,r7,r9 + sl.iz 5,4,r7,r9 + sl.iz 5,5,r7,r9 + sl.iz 5,6,r7,r9 + sl.iz 5,7,r7,r9 + sl.iz 5,8,r7,r9 + sl.iz 5,9,r7,r9 + sl.iz 5,10,r7,r9 + sl.iz 5,11,r7,r9 + sl.iz 5,12,r7,r9 + sl.iz 5,13,r7,r9 + sl.iz 5,14,r7,r9 + sl.iz 5,15,r7,r9 + sl.iz 5,16,r7,r9 + sl.iz 5,17,r7,r9 + sl.iz 5,18,r7,r9 + sl.iz 5,19,r7,r9 + sl.iz 5,20,r7,r9 + sl.iz 5,21,r7,r9 + sl.iz 5,22,r7,r9 + sl.iz 5,23,r7,r9 + sl.iz 5,24,r7,r9 + sl.iz 5,25,r7,r9 + sl.iz 5,26,r7,r9 + sl.iz 5,27,r7,r9 + sl.iz 5,28,r7,r9 + sl.iz 5,29,r7,r9 + sl.iz 5,30,r7,r9 + sl.iz 5,31,r7,r9 + sl.iz 5,32,r7,r9 diff --git a/gas/testsuite/gas/tic80/float.d b/gas/testsuite/gas/tic80/float.d new file mode 100644 index 0000000..87eb85b --- /dev/null +++ b/gas/testsuite/gas/tic80/float.d @@ -0,0 +1,40 @@ +#objdump: -d +#name: TIc80 simple floating point operands + +.*: +file format .*tic80.* + +Disassembly of section .text: + +00000000 <.text>: + 0: 80 12 be 51 16 68 a9 65.* + 8: 00 12 be 51 16 68 a9 e5.* + 10: 00 10 be 51 9a 6d 41 19.* + 18: 80 b0 3e 52 9a 6d 41 99.* + 20: 00 b0 3e 52 00 00 00 00.* + 28: 80 72 be 51 00 00 00 40.* + 30: 00 72 be 51 00 00 00 3f.* + 38: 00 70 be 51 00 00 80 45.* + 40: 80 52 be 51 00 00 80 c5.* + 48: 00 52 be 51 00 00 00 40.* + 50: 00 50 be 51 00 00 00 40.* + 58: 80 93 3e 40 00 00 00 40.* + 60: 80 95 3e 40 00 00 00 40.* + 68: 80 91 3e 40 00 00 00 40.* + 70: 80 97 3e 40 00 00 00 40.* + 78: 00 92 3e 40 00 00 00 40.* + 80: 00 94 3e 40 00 00 00 40.* + 88: 00 90 3e 40 00 00 00 40.* + 90: 00 96 3e 40 00 00 00 40.* + 98: 00 93 3e 40 00 00 00 40.* + a0: 00 95 3e 40 00 00 00 40.* + a8: 00 91 3e 40 00 00 00 40.* + b0: 00 97 3e 40 00 00 00 40.* + b8: 80 92 3e 40 00 00 00 40.* + c0: 80 94 3e 40 00 00 00 40.* + c8: 80 90 3e 40 00 00 00 40.* + d0: 80 96 3e 40 00 00 00 40.* + d8: 00 f2 3e 50 00 00 00 40.* + e0: 00 f0 3e 50 00 00 00 40.* + e8: 80 32 be 51 00 00 00 40.* + f0: 00 32 be 51 00 00 00 40.* + f8: 00 30 be 51 00 00 00 40.* diff --git a/gas/testsuite/gas/tic80/float.lst b/gas/testsuite/gas/tic80/float.lst new file mode 100644 index 0000000..6134590 --- /dev/null +++ b/gas/testsuite/gas/tic80/float.lst @@ -0,0 +1,76 @@ +MVP MP Macro Assembler Version 1.13 Wed Feb 26 22:09:09 1997 +Copyright (c) 1993-1995 Texas Instruments Incorporated + +float.s PAGE 1 + + 1 00000000 51BE1280 fadd.sdd 1.0E23,r6,r10 ; Immediate form + 00000004 65A96816 + 2 00000008 51BE1200 fadd.ssd -1.0E23,r6,r10 ; Immediate form + 0000000C E5A96816 + 3 00000010 51BE1000 fadd.sss 1.0E-23,r6,r10 ; Immediate form + 00000014 19416D9A + 4 00000018 523EB080 fcmp.sd -1.0E-23,r8,r10 ; Immediate form + 0000001C 99416D9A + 5 00000020 523EB000 fcmp.ss 0.0,r8,r10 ; Immediate form + 00000024 00000000 + 6 00000028 51BE7280 fdiv.sdd 2.0,r6,r10 ; Immediate form + 0000002C 40000000 + 7 00000030 51BE7200 fdiv.ssd 0.5,r6,r10 ; Immediate form + 00000034 3F000000 + 8 00000038 51BE7000 fdiv.sss 4096.0,r6,r10 ; Immediate form + 0000003C 45800000 + 9 00000040 51BE5280 fmpy.sdd -4096.0,r6,r10 ; Immediate form + 00000044 C5800000 + 10 00000048 51BE5200 fmpy.ssd 2.0,r6,r10 ; Immediate form + 0000004C 40000000 + 11 00000050 51BE5000 fmpy.sss 2.0,r6,r10 ; Immediate form + 00000054 40000000 + 12 00000058 403E9380 frndm.sd 2.0,r8 ; Immediate form + 0000005C 40000000 + 13 00000060 403E9580 frndm.si 2.0,r8 ; Immediate form + 00000064 40000000 + 14 00000068 403E9180 frndm.ss 2.0,r8 ; Immediate form + 0000006C 40000000 + 15 00000070 403E9780 frndm.su 2.0,r8 ; Immediate form + 00000074 40000000 + 16 00000078 403E9200 frndn.sd 2.0,r8 ; Immediate form + 0000007C 40000000 + 17 00000080 403E9400 frndn.si 2.0,r8 ; Immediate form + 00000084 40000000 + 18 00000088 403E9000 frndn.ss 2.0,r8 ; Immediate form + 0000008C 40000000 + 19 00000090 403E9600 frndn.su 2.0,r8 ; Immediate form + 00000094 40000000 + 20 00000098 403E9300 frndp.sd 2.0,r8 ; Immediate form + 0000009C 40000000 + 21 000000A0 403E9500 frndp.si 2.0,r8 ; Immediate form + 000000A4 40000000 + 22 000000A8 403E9100 frndp.ss 2.0,r8 ; Immediate form + 000000AC 40000000 + 23 000000B0 403E9700 frndp.su 2.0,r8 ; Immediate form + 000000B4 40000000 + 24 000000B8 403E9280 frndz.sd 2.0,r8 ; Immediate form + 000000BC 40000000 + 25 000000C0 403E9480 frndz.si 2.0,r8 ; Immediate form + 000000C4 40000000 + 26 000000C8 403E9080 frndz.ss 2.0,r8 ; Immediate form + 000000CC 40000000 + 27 000000D0 403E9680 frndz.su 2.0,r8 ; Immediate form + 000000D4 40000000 + 28 000000D8 503EF200 fsqrt.sd 2.0,r10 ; Immediate form + MVP MP Macro Assembler Version 1.13 Wed Feb 26 22:09:09 1997 +Copyright (c) 1993-1995 Texas Instruments Incorporated + +float.s PAGE 2 + + 000000DC 40000000 + 29 000000E0 503EF000 fsqrt.ss 2.0,r10 ; Immediate form + 000000E4 40000000 + 30 000000E8 51BE3280 fsub.sdd 2.0,r6,r10 ; Immediate form + 000000EC 40000000 + 31 000000F0 51BE3200 fsub.ssd 2.0,r6,r10 ; Immediate form + 000000F4 40000000 + 32 000000F8 51BE3000 fsub.sss 2.0,r6,r10 ; Immediate form + 000000FC 40000000 + + No Errors, No Warnings diff --git a/gas/testsuite/gas/tic80/float.s b/gas/testsuite/gas/tic80/float.s new file mode 100644 index 0000000..98a2b7a --- /dev/null +++ b/gas/testsuite/gas/tic80/float.s @@ -0,0 +1,32 @@ + fadd.sdd 0f1.0E23,r6,r10 ; Immediate form + fadd.ssd 0f-1.0E23,r6,r10 ; Immediate form + fadd.sss 0f1.0E-23,r6,r10 ; Immediate form + fcmp.sd 0f-1.0E-23,r8,r10 ; Immediate form + fcmp.ss 0f0.0,r8,r10 ; Immediate form + fdiv.sdd 0f2.0,r6,r10 ; Immediate form + fdiv.ssd 0f0.5,r6,r10 ; Immediate form + fdiv.sss 0f4096.0,r6,r10 ; Immediate form + fmpy.sdd 0f-4096.0,r6,r10 ; Immediate form + fmpy.ssd 0f2.0,r6,r10 ; Immediate form + fmpy.sss 0f2.0,r6,r10 ; Immediate form + frndm.sd 0f2.0,r8 ; Immediate form + frndm.si 0f2.0,r8 ; Immediate form + frndm.ss 0f2.0,r8 ; Immediate form + frndm.su 0f2.0,r8 ; Immediate form + frndn.sd 0f2.0,r8 ; Immediate form + frndn.si 0f2.0,r8 ; Immediate form + frndn.ss 0f2.0,r8 ; Immediate form + frndn.su 0f2.0,r8 ; Immediate form + frndp.sd 0f2.0,r8 ; Immediate form + frndp.si 0f2.0,r8 ; Immediate form + frndp.ss 0f2.0,r8 ; Immediate form + frndp.su 0f2.0,r8 ; Immediate form + frndz.sd 0f2.0,r8 ; Immediate form + frndz.si 0f2.0,r8 ; Immediate form + frndz.ss 0f2.0,r8 ; Immediate form + frndz.su 0f2.0,r8 ; Immediate form + fsqrt.sd 0f2.0,r10 ; Immediate form + fsqrt.ss 0f2.0,r10 ; Immediate form + fsub.sdd 0f2.0,r6,r10 ; Immediate form + fsub.ssd 0f2.0,r6,r10 ; Immediate form + fsub.sss 0f2.0,r6,r10 ; Immediate form diff --git a/gas/testsuite/gas/tic80/regops.d b/gas/testsuite/gas/tic80/regops.d new file mode 100644 index 0000000..dd0fa85 --- /dev/null +++ b/gas/testsuite/gas/tic80/regops.d @@ -0,0 +1,188 @@ +#objdump: -d +#name: TIc80 register operands + +.*: +file format .*tic80.* + +Disassembly of section .text: + +00000000 <.text>: + 0: 03 00 3b 29.* + 4: 03 20 3b 29.* + 8: 05 20 32 11.* + c: 05 20 32 11.* + 10: 0a 00 33 73.* + 14: 0a 80 32 73.* + 18: 0a 40 32 73.* + 1c: 0a 40 39 1a.* + 20: 0a 60 39 fa.* + 24: 0a 00 39 22.* + 28: 0a 20 39 2a.* + 2c: 04 80 b9 21.* + 30: 04 a0 b9 21.* + 34: 06 00 39 00.* + 38: 06 20 39 00.* + 3c: 0a 00 03 00.* + 40: 06 00 38 f8.* + 44: 06 20 38 f8.* + 48: 07 40 30 00.* + 4c: 03 00 3a 29.* + 50: 08 00 b7 02.* + 54: 08 00 b7 0a.* + 58: 04 04 b4 41.* + 5c: 04 24 b4 41.* + 60: 04 44 b4 41.* + 64: 04 64 b4 41.* + 68: 04 04 b5 41.* + 6c: 04 24 b5 41.* + 70: 04 04 b6 41.* + 74: 04 24 b6 41.* + 78: 04 44 b6 41.* + 7c: 04 64 b6 41.* + 80: 05 20 30 08.* + 84: e3 47 71 31.* + 88: c2 07 71 49.* + 8c: 02 00 3e 31.* + 90: 02 02 3e 31.* + 94: 82 02 3e 31.* + 98: 22 02 3e 31.* + 9c: a2 02 3e 31.* + a0: 04 a0 be 41.* + a4: 84 a0 be 41.* + a8: 24 a0 be 41.* + ac: a4 a0 be 41.* + b0: 02 60 3e 31.* + b4: 02 62 3e 31.* + b8: 82 62 3e 31.* + bc: 22 62 3e 31.* + c0: a2 62 3e 31.* + c4: 02 40 3e 31.* + c8: 02 42 3e 31.* + cc: 82 42 3e 31.* + d0: 22 42 3e 31.* + d4: a2 42 3e 31.* + d8: 42 45 3e 31.* + dc: e2 47 3e 31.* + e0: 84 81 3e 30.* + e4: 84 83 3e 30.* + e8: 84 85 3e 30.* + ec: 84 87 3e 30.* + f0: a2 81 3e 40.* + f4: a2 83 3e 40.* + f8: a2 85 3e 40.* + fc: a2 87 3e 40.* + 100: c4 81 3e 30.* + 104: c4 83 3e 30.* + 108: e2 81 3e 40.* + 10c: e2 83 3e 40.* + 110: 04 80 3e 30.* + 114: 04 82 3e 30.* + 118: 04 84 3e 30.* + 11c: 04 86 3e 30.* + 120: 22 80 3e 40.* + 124: 22 82 3e 40.* + 128: 22 84 3e 40.* + 12c: 22 86 3e 40.* + 130: 44 80 3e 30.* + 134: 44 82 3e 30.* + 138: 62 80 3e 40.* + 13c: 62 82 3e 40.* + 140: 04 81 3e 30.* + 144: 04 83 3e 30.* + 148: 04 85 3e 30.* + 14c: 04 87 3e 30.* + 150: 22 81 3e 40.* + 154: 22 83 3e 40.* + 158: 22 85 3e 40.* + 15c: 22 87 3e 40.* + 160: 44 81 3e 30.* + 164: 44 83 3e 30.* + 168: 62 81 3e 40.* + 16c: 62 83 3e 40.* + 170: 84 80 3e 30.* + 174: 84 82 3e 30.* + 178: 84 84 3e 30.* + 17c: 84 86 3e 30.* + 180: a2 80 3e 40.* + 184: a2 82 3e 40.* + 188: a2 84 3e 40.* + 18c: a2 86 3e 40.* + 190: c4 80 3e 30.* + 194: c4 82 3e 30.* + 198: e2 80 3e 40.* + 19c: e2 82 3e 40.* + 1a0: 06 e0 3e 40.* + 1a4: 06 e2 3e 40.* + 1a8: 26 e2 3e 40.* + 1ac: 02 20 3e 31.* + 1b0: 02 22 3e 31.* + 1b4: 82 22 3e 31.* + 1b8: 22 22 3e 31.* + 1bc: a2 22 3e 31.* + 1c0: e4 e3 31 52.* + 1c4: 04 80 b8 41.* + 1c8: 04 a0 b8 41.* + 1cc: 04 00 b4 41.* + 1d0: 04 20 b4 41.* + 1d4: 04 40 b4 41.* + 1d8: 04 60 b4 41.* + 1dc: 04 00 b5 41.* + 1e0: 04 20 b5 41.* + 1e4: 00 00 ff 41.* + 1e8: 01 e0 b2 18.* + 1ec: 01 e0 b2 18.* + 1f0: 01 c0 b3 18.* + 1f4: 01 a0 b3 18.* + 1f8: 01 60 b3 18.* + 1fc: 06 80 30 20.* + 200: 00 20 3f 29.* + 204: e2 03 31 52.* + 208: e8 07 b1 30.* + 20c: e4 c3 b1 30.* + 210: 84 01 71 31.* + 214: 84 21 71 31.* + 218: 84 41 71 31.* + 21c: 84 61 71 31.* + 220: 84 81 71 31.* + 224: 84 a1 71 31.* + 228: 84 c1 71 31.* + 22c: 84 e1 71 31.* + 230: 84 09 71 31.* + 234: 84 29 71 31.* + 238: 84 49 71 31.* + 23c: 84 69 71 31.* + 240: 84 89 71 31.* + 244: 84 a9 71 31.* + 248: 84 c9 71 31.* + 24c: 84 e9 71 31.* + 250: 84 05 71 31.* + 254: 84 25 71 31.* + 258: 84 45 71 31.* + 25c: 84 65 71 31.* + 260: 84 85 71 31.* + 264: 84 a5 71 31.* + 268: 84 c5 71 31.* + 26c: 84 e5 71 31.* + 270: 04 a4 b1 41.* + 274: 84 0d 71 31.* + 278: 84 2d 71 31.* + 27c: 84 4d 71 31.* + 280: 84 6d 71 31.* + 284: 84 8d 71 31.* + 288: 84 ad 71 31.* + 28c: 84 cd 71 31.* + 290: 84 ed 71 31.* + 294: 04 64 b1 41.* + 298: 04 00 b6 41.* + 29c: 04 20 b6 41.* + 2a0: 04 40 b6 41.* + 2a4: 04 60 b6 41.* + 2a8: 07 40 3b 4a.* + 2ac: 07 60 3b 4a.* + 2b0: 08 a0 b0 21.* + 2b4: 0a 20 30 00.* + 2b8: 02 00 3c 01.* + 2bc: 82 00 bc 01.* + 2c0: a2 00 bc 02.* + 2c4: 06 a0 70 01.* + 2c8: 05 20 b3 39.* + 2cc: 07 c0 32 4a.* diff --git a/gas/testsuite/gas/tic80/regops.lst b/gas/testsuite/gas/tic80/regops.lst new file mode 100644 index 0000000..f889dd1 --- /dev/null +++ b/gas/testsuite/gas/tic80/regops.lst @@ -0,0 +1,264 @@ +MVP MP Macro Assembler Version 1.13 Mon Feb 10 17:00:24 1997 +Copyright (c) 1993-1995 Texas Instruments Incorporated + +regops.s PAGE 1 + + 1 ;; Simple register forms + 2 ;; Those instructions which also use an immediate just use a constant. + 3 + 4 00000000 .text + 5 + 6 00000000 293B0003 add r3,r4,r5 + 7 00000004 293B2003 addu r3,r4,r5 + 8 00000008 11322005 and r5,r4,r2 + 9 0000000C 11322005 and.tt r5,r4,r2 + 10 00000010 7333000A and.ff r10,r12,r14 + 11 00000014 7332800A and.ft r10,r12,r14 + 12 00000018 7332400A and.tf r10,r12,r14 + 13 0000001C 1A39400A bbo r10,r8,lo.w + 14 00000020 FA39600A bbo.a r10,r8,eq.b + 15 00000024 2239000A bbz r10,r8,ls.w + 16 00000028 2A39200A bbz.a r10,r8,hi.w + 17 0000002C 21B98004 bcnd r4,r6,lt0.b + 18 00000030 21B9A004 bcnd.a r4,r6,lt0.b + 19 00000034 00390006 br r6 + 20 00000038 00392006 br.a r6 + 21 0000003C 0003000A brcr 10 + 22 00000040 F8380006 bsr r6,r31 + 23 00000044 F8382006 bsr.a r6,r31 + 24 00000048 00304007 cmnd r7 + 25 0000004C 293A0003 cmp r3,r4,r5 + 26 00000050 02B70008 dcachec r8(r10) + 27 00000054 0AB70008 dcachef r8(r10) + 28 00000058 41B40404 dld.b r4(r6),r8 + 29 0000005C 41B42404 dld.h r4(r6),r8 + 30 00000060 41B44404 dld r4(r6),r8 + 31 00000064 41B46404 dld.d r4(r6),r8 + 32 00000068 41B50404 dld.ub r4(r6),r8 + 33 0000006C 41B52404 dld.uh r4(r6),r8 + 34 00000070 41B60404 dst.b r4(r6),r8 + 35 00000074 41B62404 dst.h r4(r6),r8 + 36 00000078 41B64404 dst r4(r6),r8 + 37 0000007C 41B66404 dst.d r4(r6),r8 + 38 00000080 08302005 etrap r5 + 39 00000084 317147E3 exts r3,31,r5,r6 + 40 00000088 497107C2 extu r2,30,r5,r9 + 41 0000008C 313E0002 fadd.sss r2,r4,r6 + 42 00000090 313E0202 fadd.ssd r2,r4,r6 + 43 00000094 313E0282 fadd.sdd r2,r4,r6 + 44 00000098 313E0222 fadd.dsd r2,r4,r6 + 45 0000009C 313E02A2 fadd.ddd r2,r4,r6 + 46 000000A0 41BEA004 fcmp.ss r4,r6,r8 + 47 000000A4 41BEA084 fcmp.sd r4,r6,r8 + 48 000000A8 41BEA024 fcmp.ds r4,r6,r8 + 49 000000AC 41BEA0A4 fcmp.dd r4,r6,r8 + 50 000000B0 313E6002 fdiv.sss r2,r4,r6 + 51 000000B4 313E6202 fdiv.ssd r2,r4,r6 + 52 000000B8 313E6282 fdiv.sdd r2,r4,r6 + 53 000000BC 313E6222 fdiv.dsd r2,r4,r6 + 54 000000C0 313E62A2 fdiv.ddd r2,r4,r6 + 55 000000C4 313E4002 fmpy.sss r2,r4,r6 + MVP MP Macro Assembler Version 1.13 Mon Feb 10 17:00:24 1997 +Copyright (c) 1993-1995 Texas Instruments Incorporated + +regops.s PAGE 2 + + 56 000000C8 313E4202 fmpy.ssd r2,r4,r6 + 57 000000CC 313E4282 fmpy.sdd r2,r4,r6 + 58 000000D0 313E4222 fmpy.dsd r2,r4,r6 + 59 000000D4 313E42A2 fmpy.ddd r2,r4,r6 + 60 000000D8 313E4542 fmpy.iii r2,r4,r6 + 61 000000DC 313E47E2 fmpy.uuu r2,r4,r6 + 62 000000E0 303E8184 frndm.ss r4,r6 + 63 000000E4 303E8384 frndm.sd r4,r6 + 64 000000E8 303E8584 frndm.si r4,r6 + 65 000000EC 303E8784 frndm.su r4,r6 + 66 000000F0 403E81A2 frndm.ds r2,r8 + 67 000000F4 403E83A2 frndm.dd r2,r8 + 68 000000F8 403E85A2 frndm.di r2,r8 + 69 000000FC 403E87A2 frndm.du r2,r8 + 70 00000100 303E81C4 frndm.is r4,r6 + 71 00000104 303E83C4 frndm.id r4,r6 + 72 00000108 403E81E2 frndm.us r2,r8 + 73 0000010C 403E83E2 frndm.ud r2,r8 + 74 00000110 303E8004 frndn.ss r4,r6 + 75 00000114 303E8204 frndn.sd r4,r6 + 76 00000118 303E8404 frndn.si r4,r6 + 77 0000011C 303E8604 frndn.su r4,r6 + 78 00000120 403E8022 frndn.ds r2,r8 + 79 00000124 403E8222 frndn.dd r2,r8 + 80 00000128 403E8422 frndn.di r2,r8 + 81 0000012C 403E8622 frndn.du r2,r8 + 82 00000130 303E8044 frndn.is r4,r6 + 83 00000134 303E8244 frndn.id r4,r6 + 84 00000138 403E8062 frndn.us r2,r8 + 85 0000013C 403E8262 frndn.ud r2,r8 + 86 00000140 303E8104 frndp.ss r4,r6 + 87 00000144 303E8304 frndp.sd r4,r6 + 88 00000148 303E8504 frndp.si r4,r6 + 89 0000014C 303E8704 frndp.su r4,r6 + 90 00000150 403E8122 frndp.ds r2,r8 + 91 00000154 403E8322 frndp.dd r2,r8 + 92 00000158 403E8522 frndp.di r2,r8 + 93 0000015C 403E8722 frndp.du r2,r8 + 94 00000160 303E8144 frndp.is r4,r6 + 95 00000164 303E8344 frndp.id r4,r6 + 96 00000168 403E8162 frndp.us r2,r8 + 97 0000016C 403E8362 frndp.ud r2,r8 + 98 00000170 303E8084 frndz.ss r4,r6 + 99 00000174 303E8284 frndz.sd r4,r6 + 100 00000178 303E8484 frndz.si r4,r6 + 101 0000017C 303E8684 frndz.su r4,r6 + 102 00000180 403E80A2 frndz.ds r2,r8 + 103 00000184 403E82A2 frndz.dd r2,r8 + 104 00000188 403E84A2 frndz.di r2,r8 + 105 0000018C 403E86A2 frndz.du r2,r8 + 106 00000190 303E80C4 frndz.is r4,r6 + 107 00000194 303E82C4 frndz.id r4,r6 + 108 00000198 403E80E2 frndz.us r2,r8 + 109 0000019C 403E82E2 frndz.ud r2,r8 + 110 000001A0 403EE006 fsqrt.ss r6,r8 + MVP MP Macro Assembler Version 1.13 Mon Feb 10 17:00:24 1997 +Copyright (c) 1993-1995 Texas Instruments Incorporated + +regops.s PAGE 3 + + 111 000001A4 403EE206 fsqrt.sd r6,r8 + 112 000001A8 403EE226 fsqrt.dd r6,r8 + 113 000001AC 313E2002 fsub.sss r2,r4,r6 + 114 000001B0 313E2202 fsub.ssd r2,r4,r6 + 115 000001B4 313E2282 fsub.sdd r2,r4,r6 + 116 000001B8 313E2222 fsub.dsd r2,r4,r6 + 117 000001BC 313E22A2 fsub.ddd r2,r4,r6 + 118 000001C0 5231E3E4 ins r4,31,r8,r10 + 119 000001C4 41B88004 jsr r4(r6),r8 + 120 000001C8 41B8A004 jsr.a r4(r6),r8 + 121 000001CC 41B40004 ld.b r4(r6),r8 + 122 000001D0 41B42004 ld.h r4(r6),r8 + 123 000001D4 41B44004 ld r4(r6),r8 + 124 000001D8 41B46004 ld.d r4(r6),r8 + 125 000001DC 41B50004 ld.ub r4(r6),r8 + 126 000001E0 41B52004 ld.uh r4(r6),r8 + 127 000001E4 41FF0007 lmo r7,r8 + 128 000001E8 18B2E001 or r1,r2,r3 + 129 000001EC 18B2E001 or.tt r1,r2,r3 + 130 000001F0 18B3C001 or.ff r1,r2,r3 + 131 000001F4 18B3A001 or.ft r1,r2,r3 + 132 000001F8 18B36001 or.tf r1,r2,r3 + 133 000001FC 20308006 rdcr r6,r4 + 134 00000200 293F2004 rmo r4,r5 + 135 00000204 523103E2 rotl r2,31,r8,r10 + 136 00000208 30B107E8 rotr r8,31,r2,r6 + 137 0000020C 30B1C3E4 shl r4,31,r2,r6 + 138 00000210 31710184 sl.dz r4,12,r5,r6 + 139 00000214 31712184 sl.dm r4,12,r5,r6 + 140 00000218 31714184 sl.ds r4,12,r5,r6 + 141 0000021C 31716184 sl.ez r4,12,r5,r6 + 142 00000220 31718184 sl.em r4,12,r5,r6 + 143 00000224 3171A184 sl.es r4,12,r5,r6 + 144 00000228 3171C184 sl.iz r4,12,r5,r6 + 145 0000022C 3171E184 sl.im r4,12,r5,r6 + 146 00000230 31710984 sli.dz r4,12,r5,r6 + 147 00000234 31712984 sli.dm r4,12,r5,r6 + 148 00000238 31714984 sli.ds r4,12,r5,r6 + 149 0000023C 31716984 sli.ez r4,12,r5,r6 + 150 00000240 31718984 sli.em r4,12,r5,r6 + 151 00000244 3171A984 sli.es r4,12,r5,r6 + 152 00000248 3171C984 sli.iz r4,12,r5,r6 + 153 0000024C 3171E984 sli.im r4,12,r5,r6 + 154 00000250 31710584 sr.dz r4,12,r5,r6 + 155 00000254 31712584 sr.dm r4,12,r5,r6 + 156 00000258 31714584 sr.ds r4,12,r5,r6 + 157 0000025C 31716584 sr.ez r4,12,r5,r6 + 158 00000260 31718584 sr.em r4,12,r5,r6 + 159 00000264 3171A584 sr.es r4,12,r5,r6 + 160 00000268 3171C584 sr.iz r4,12,r5,r6 + 161 0000026C 3171E584 sr.im r4,12,r5,r6 + 162 00000270 41B1A404 sra r4,32,r6,r8 + 163 00000274 31710D84 sri.dz r4,12,r5,r6 + 164 00000278 31712D84 sri.dm r4,12,r5,r6 + 165 0000027C 31714D84 sri.ds r4,12,r5,r6 + MVP MP Macro Assembler Version 1.13 Mon Feb 10 17:00:24 1997 +Copyright (c) 1993-1995 Texas Instruments Incorporated + +regops.s PAGE 4 + + 166 00000280 31716D84 sri.ez r4,12,r5,r6 + 167 00000284 31718D84 sri.em r4,12,r5,r6 + 168 00000288 3171AD84 sri.es r4,12,r5,r6 + 169 0000028C 3171CD84 sri.iz r4,12,r5,r6 + 170 00000290 3171ED84 sri.im r4,12,r5,r6 + 171 00000294 41B16404 srl r4,32,r6,r8 + 172 00000298 41B60004 st.b r4(r6),r8 + 173 0000029C 41B62004 st.h r4(r6),r8 + 174 000002A0 41B64004 st r4(r6),r8 + 175 000002A4 41B66004 st.d r4(r6),r8 + 176 000002A8 4A3B4007 sub r7,r8,r9 + 177 000002AC 4A3B6007 subu r7,r8,r9 + 178 000002B0 21B0A008 swcr r8,r6,r4 + 179 000002B4 0030200A trap r10 + 180 000002B8 013C0002 vadd.ss r2,r4,r4 + 181 000002BC 01BC0082 vadd.sd r2,r6,r6 + 182 000002C0 02BC00A2 vadd.dd r2,r10,r10 + 183 ; vld0.s r6 + 184 ; vld1.s r7 + 185 ; vld0.d r6 + 186 ; vld1.d r8 + 187 ; vmac.sss r7,r9,0,a3 + 188 ; vmac.sss r7,r9,0,r10 + 189 ; vmac.sss r7,r9,a1,a3 + 190 ; vmac.sss r7,r9,a3,r10 + 191 ; vmac.ssd r7,r9,0,a0 + 192 ; vmac.ssd r7,r9,0,r10 + 193 ; vmac.ssd r7,r9,a1,a2 + 194 ; vmac.ssd r7,r9,a3,r10 + 195 ; vmpy.ss r1,r3,r3 + 196 ; vmpy.sd r5,r6,r6 + 197 ; vmpy.dd r2,r4,r4 + 198 ; vmsc.sss r7,r9,0,a0 + 199 ; vmsc.sss r7,r9,0,r10 + 200 ; vmsc.sss r7,r9,a0,a1 + 201 ; vmsc.sss r7,r9,a3,r10 + 202 ; vmsc.ssd r7,r9,0,a0 + 203 ; vmsc.ssd r7,r9,0,r10 + 204 ; vmsc.ssd r7,r9,a0,a1 + 205 ; vmsc.ssd r7,r9,a3,r10 + 206 ; vmsub.ss r6,a2,a4 + 207 ; vmsub.sd r6,a2,a4 + 208 ; vmsub.ss r4,a4,r6 + 209 ; vmsub.sd r4,a4,r6 + 210 ; vrnd.si r4,r6 + 211 ; vrnd.si r4,a0 + 212 ; vrnd.su r4,r6 + 213 ; vrnd.su r4,a0 + 214 ; vrnd.ss r4,r6 + 215 ; vrnd.ss r4,a0 + 216 ; vrnd.sd r4,r6 + 217 ; vrnd.sd r4,a0 + 218 ; vrnd.di r4,r6 + 219 ; vrnd.di r4,a0 + 220 ; vrnd.du r4,r6 + MVP MP Macro Assembler Version 1.13 Mon Feb 10 17:00:24 1997 +Copyright (c) 1993-1995 Texas Instruments Incorporated + +regops.s PAGE 5 + + 221 ; vrnd.du r4,a0 + 222 ; vrnd.ds r4,r6 + 223 ; vrnd.ds r4,a0 + 224 ; vrnd.dd r4,r6 + 225 ; vrnd.dd r4,a0 + 226 ; vrnd.is r4,r6 + 227 ; vrnd.id r4,r6 + 228 ; vrnd.us r4,r6 + 229 ; vrnd.ud r4,r6 + 230 ; vst.s r6 + 231 ; vst.d r6 + 232 ; vsub.ss r2,r4,r6 + 233 ; vsub.sd r2,r4,r6 + 234 ; vsub.dd r2,r4,r6 + 235 000002C4 0170A006 wrcr r6,r5 + 236 000002C8 39B32005 xnor r5,r6,r7 + 237 000002CC 4A32C007 xor r7,r8,r9 + + No Errors, No Warnings diff --git a/gas/testsuite/gas/tic80/regops.s b/gas/testsuite/gas/tic80/regops.s new file mode 100644 index 0000000..f4f9352 --- /dev/null +++ b/gas/testsuite/gas/tic80/regops.s @@ -0,0 +1,237 @@ +;; Simple register forms +;; Those instructions which also use an immediate just use a constant. + + .text + + add r3,r4,r5 + addu r3,r4,r5 + and r5,r4,r2 + and.tt r5,r4,r2 + and.ff r10,r12,r14 + and.ft r10,r12,r14 + and.tf r10,r12,r14 + bbo r10,r8,lo.w + bbo.a r10,r8,eq.b + bbz r10,r8,ls.w + bbz.a r10,r8,hi.w + bcnd r4,r6,lt0.b + bcnd.a r4,r6,lt0.b + br r6 + br.a r6 + brcr 10 + bsr r6,r31 + bsr.a r6,r31 + cmnd r7 + cmp r3,r4,r5 + dcachec r8(r10) + dcachef r8(r10) + dld.b r4(r6),r8 + dld.h r4(r6),r8 + dld r4(r6),r8 + dld.d r4(r6),r8 + dld.ub r4(r6),r8 + dld.uh r4(r6),r8 + dst.b r4(r6),r8 + dst.h r4(r6),r8 + dst r4(r6),r8 + dst.d r4(r6),r8 + etrap r5 + exts r3,31,r5,r6 + extu r2,30,r5,r9 + fadd.sss r2,r4,r6 + fadd.ssd r2,r4,r6 + fadd.sdd r2,r4,r6 + fadd.dsd r2,r4,r6 + fadd.ddd r2,r4,r6 + fcmp.ss r4,r6,r8 + fcmp.sd r4,r6,r8 + fcmp.ds r4,r6,r8 + fcmp.dd r4,r6,r8 + fdiv.sss r2,r4,r6 + fdiv.ssd r2,r4,r6 + fdiv.sdd r2,r4,r6 + fdiv.dsd r2,r4,r6 + fdiv.ddd r2,r4,r6 + fmpy.sss r2,r4,r6 + fmpy.ssd r2,r4,r6 + fmpy.sdd r2,r4,r6 + fmpy.dsd r2,r4,r6 + fmpy.ddd r2,r4,r6 + fmpy.iii r2,r4,r6 + fmpy.uuu r2,r4,r6 + frndm.ss r4,r6 + frndm.sd r4,r6 + frndm.si r4,r6 + frndm.su r4,r6 + frndm.ds r2,r8 + frndm.dd r2,r8 + frndm.di r2,r8 + frndm.du r2,r8 + frndm.is r4,r6 + frndm.id r4,r6 + frndm.us r2,r8 + frndm.ud r2,r8 + frndn.ss r4,r6 + frndn.sd r4,r6 + frndn.si r4,r6 + frndn.su r4,r6 + frndn.ds r2,r8 + frndn.dd r2,r8 + frndn.di r2,r8 + frndn.du r2,r8 + frndn.is r4,r6 + frndn.id r4,r6 + frndn.us r2,r8 + frndn.ud r2,r8 + frndp.ss r4,r6 + frndp.sd r4,r6 + frndp.si r4,r6 + frndp.su r4,r6 + frndp.ds r2,r8 + frndp.dd r2,r8 + frndp.di r2,r8 + frndp.du r2,r8 + frndp.is r4,r6 + frndp.id r4,r6 + frndp.us r2,r8 + frndp.ud r2,r8 + frndz.ss r4,r6 + frndz.sd r4,r6 + frndz.si r4,r6 + frndz.su r4,r6 + frndz.ds r2,r8 + frndz.dd r2,r8 + frndz.di r2,r8 + frndz.du r2,r8 + frndz.is r4,r6 + frndz.id r4,r6 + frndz.us r2,r8 + frndz.ud r2,r8 + fsqrt.ss r6,r8 + fsqrt.sd r6,r8 + fsqrt.dd r6,r8 + fsub.sss r2,r4,r6 + fsub.ssd r2,r4,r6 + fsub.sdd r2,r4,r6 + fsub.dsd r2,r4,r6 + fsub.ddd r2,r4,r6 + ins r4,31,r8,r10 + jsr r4(r6),r8 + jsr.a r4(r6),r8 + ld.b r4(r6),r8 + ld.h r4(r6),r8 + ld r4(r6),r8 + ld.d r4(r6),r8 + ld.ub r4(r6),r8 + ld.uh r4(r6),r8 + lmo r7,r8 + or r1,r2,r3 + or.tt r1,r2,r3 + or.ff r1,r2,r3 + or.ft r1,r2,r3 + or.tf r1,r2,r3 + rdcr r6,r4 + rmo r4,r5 + rotl r2,31,r8,r10 + rotr r8,31,r2,r6 + shl r4,31,r2,r6 + sl.dz r4,12,r5,r6 + sl.dm r4,12,r5,r6 + sl.ds r4,12,r5,r6 + sl.ez r4,12,r5,r6 + sl.em r4,12,r5,r6 + sl.es r4,12,r5,r6 + sl.iz r4,12,r5,r6 + sl.im r4,12,r5,r6 + sli.dz r4,12,r5,r6 + sli.dm r4,12,r5,r6 + sli.ds r4,12,r5,r6 + sli.ez r4,12,r5,r6 + sli.em r4,12,r5,r6 + sli.es r4,12,r5,r6 + sli.iz r4,12,r5,r6 + sli.im r4,12,r5,r6 + sr.dz r4,12,r5,r6 + sr.dm r4,12,r5,r6 + sr.ds r4,12,r5,r6 + sr.ez r4,12,r5,r6 + sr.em r4,12,r5,r6 + sr.es r4,12,r5,r6 + sr.iz r4,12,r5,r6 + sr.im r4,12,r5,r6 + sra r4,32,r6,r8 + sri.dz r4,12,r5,r6 + sri.dm r4,12,r5,r6 + sri.ds r4,12,r5,r6 + sri.ez r4,12,r5,r6 + sri.em r4,12,r5,r6 + sri.es r4,12,r5,r6 + sri.iz r4,12,r5,r6 + sri.im r4,12,r5,r6 + srl r4,32,r6,r8 + st.b r4(r6),r8 + st.h r4(r6),r8 + st r4(r6),r8 + st.d r4(r6),r8 + sub r7,r8,r9 + subu r7,r8,r9 + swcr r8,r6,r4 + trap r10 + vadd.ss r2,r4,r4 + vadd.sd r2,r6,r6 + vadd.dd r2,r10,r10 +; vld0.s r6 +; vld1.s r7 +; vld0.d r6 +; vld1.d r8 +; vmac.sss r7,r9,0,a3 +; vmac.sss r7,r9,0,r10 +; vmac.sss r7,r9,a1,a3 +; vmac.sss r7,r9,a3,r10 +; vmac.ssd r7,r9,0,a0 +; vmac.ssd r7,r9,0,r10 +; vmac.ssd r7,r9,a1,a2 +; vmac.ssd r7,r9,a3,r10 +; vmpy.ss r1,r3,r3 +; vmpy.sd r5,r6,r6 +; vmpy.dd r2,r4,r4 +; vmsc.sss r7,r9,0,a0 +; vmsc.sss r7,r9,0,r10 +; vmsc.sss r7,r9,a0,a1 +; vmsc.sss r7,r9,a3,r10 +; vmsc.ssd r7,r9,0,a0 +; vmsc.ssd r7,r9,0,r10 +; vmsc.ssd r7,r9,a0,a1 +; vmsc.ssd r7,r9,a3,r10 +; vmsub.ss r6,a2,a4 +; vmsub.sd r6,a2,a4 +; vmsub.ss r4,a4,r6 +; vmsub.sd r4,a4,r6 +; vrnd.si r4,r6 +; vrnd.si r4,a0 +; vrnd.su r4,r6 +; vrnd.su r4,a0 +; vrnd.ss r4,r6 +; vrnd.ss r4,a0 +; vrnd.sd r4,r6 +; vrnd.sd r4,a0 +; vrnd.di r4,r6 +; vrnd.di r4,a0 +; vrnd.du r4,r6 +; vrnd.du r4,a0 +; vrnd.ds r4,r6 +; vrnd.ds r4,a0 +; vrnd.dd r4,r6 +; vrnd.dd r4,a0 +; vrnd.is r4,r6 +; vrnd.id r4,r6 +; vrnd.us r4,r6 +; vrnd.ud r4,r6 +; vst.s r6 +; vst.d r6 +; vsub.ss r2,r4,r6 +; vsub.sd r2,r4,r6 +; vsub.dd r2,r4,r6 + wrcr r6,r5 + xnor r5,r6,r7 + xor r7,r8,r9 diff --git a/gas/testsuite/gas/tic80/regops2.d b/gas/testsuite/gas/tic80/regops2.d new file mode 100644 index 0000000..0b7f4a1 --- /dev/null +++ b/gas/testsuite/gas/tic80/regops2.d @@ -0,0 +1,68 @@ +#objdump: -d +#name: TIc80 register operands with :m modifier + +.*: +file format .*tic80.* + +Disassembly of section .text: + +00000000 <.text>: + 0: 08 80 b7 02.* + 4: 04 00 9e 02.* + 8: fc 7f 9e 02.* + c: 00 90 b7 02 78 56 34 12.* + 14: 00 90 b7 02 ef be ad de.* + 1c: 08 80 b7 0a.* + 20: 04 00 9e 0a.* + 24: fc 7f 9e 0a.* + 28: 00 90 b7 0a 78 56 34 12.* + 30: 00 90 b7 0a ef be ad de.* + 38: 04 84 b4 41.* + 3c: 04 a4 b4 41.* + 40: 04 c4 b4 41.* + 44: 04 e4 b4 41.* + 48: 00 94 b4 41 00 00 00 e0.* + 50: 00 b4 b4 41 00 00 00 e0.* + 58: 00 d4 b4 41 00 00 00 e0.* + 60: 00 f4 b4 41 00 00 00 e0.* + 68: 04 84 b5 41.* + 6c: 04 a4 b5 41.* + 70: 00 94 b5 41 00 00 00 e0.* + 78: 00 b4 b5 41 00 00 00 e0.* + 80: 04 84 b6 41.* + 84: 04 a4 b6 41.* + 88: 04 c4 b6 41.* + 8c: 04 e4 b6 41.* + 90: 00 94 b6 41 00 00 00 e0.* + 98: 00 b4 b6 41 00 00 00 e0.* + a0: 00 d4 b6 41 00 00 00 e0.* + a8: 00 f4 b6 41 00 00 00 e0.* + b0: 04 80 b4 41.* + b4: 04 a0 b4 41.* + b8: 04 c0 b4 41.* + bc: 04 e0 b4 41.* + c0: f0 7f 92 41.* + c4: f0 ff 92 41.* + c8: f0 7f 93 41.* + cc: f0 ff 93 41.* + d0: 00 90 b4 41 00 00 00 e0.* + d8: 00 b0 b4 41 00 00 00 e0.* + e0: 00 d0 b4 41 00 00 00 e0.* + e8: 00 f0 b4 41 00 00 00 e0.* + f0: 04 80 b5 41.* + f4: 04 a0 b5 41.* + f8: f0 7f 96 41.* + fc: f0 ff 96 41.* + 100: 00 90 b5 41 00 00 00 e0.* + 108: 00 b0 b5 41 00 00 00 e0.* + 110: 04 80 b6 41.* + 114: 04 a0 b6 41.* + 118: 04 c0 b6 41.* + 11c: 04 e0 b6 41.* + 120: 00 7f 9a 41.* + 124: 00 ff 9a 41.* + 128: 00 7f 9b 41.* + 12c: 00 ff 9b 41.* + 130: 00 90 b6 41 00 00 00 e0.* + 138: 00 b0 b6 41 00 00 00 e0.* + 140: 00 d0 b6 41 00 00 00 e0.* + 148: 00 f0 b6 41 00 00 00 e0.* diff --git a/gas/testsuite/gas/tic80/regops2.lst b/gas/testsuite/gas/tic80/regops2.lst new file mode 100644 index 0000000..651fb97 --- /dev/null +++ b/gas/testsuite/gas/tic80/regops2.lst @@ -0,0 +1,96 @@ +MVP MP Macro Assembler Version 1.13 Wed Feb 26 14:32:14 1997 +Copyright (c) 1993-1995 Texas Instruments Incorporated + +regops2.s PAGE 1 + + 1 00000000 02B78008 dcachec r8(r10:m) ; Register form (modified) + 2 00000004 029E0004 dcachec 4(r10:m) ; Short Immediate form (positive offset) (modified) + 3 00000008 029E7FFC dcachec -4(r10:m) ; Short Immediate form (negative offset) (modified) + 4 0000000C 02B79000 dcachec 0x12345678(r10:m) ; Long Immediate form (positive offset) (modified) + 00000010 12345678 + 5 00000014 02B79000 dcachec 0xDEADBEEF(r10:m) ; Long Immediate form (negative offset) (modified) + 00000018 DEADBEEF + 6 0000001C 0AB78008 dcachef r8(r10:m) ; Register form (modified) + 7 00000020 0A9E0004 dcachef 4(r10:m) ; Short Immediate form (positive offset) (modified) + 8 00000024 0A9E7FFC dcachef -4(r10:m) ; Short Immediate form (negative offset) (modified) + 9 00000028 0AB79000 dcachef 0x12345678(r10:m) ; Long Immediate form (positive offset) (modified) + 0000002C 12345678 + 10 00000030 0AB79000 dcachef 0xDEADBEEF(r10:m) ; Long Immediate form (negative offset) (modified) + 00000034 DEADBEEF + 11 00000038 41B48404 dld.b r4(r6:m),r8 ; Register form + 12 0000003C 41B4A404 dld.h r4(r6:m),r8 ; Register form + 13 00000040 41B4C404 dld r4(r6:m),r8 ; Register form + 14 00000044 41B4E404 dld.d r4(r6:m),r8 ; Register form + 15 00000048 41B49400 dld.b 0xE0000000(r6:m),r8 ; Long Immediate form + 0000004C E0000000 + 16 00000050 41B4B400 dld.h 0xE0000000(r6:m),r8 ; Long Immediate form + 00000054 E0000000 + 17 00000058 41B4D400 dld 0xE0000000(r6:m),r8 ; Long Immediate form + 0000005C E0000000 + 18 00000060 41B4F400 dld.d 0xE0000000(r6:m),r8 ; Long Immediate form + 00000064 E0000000 + 19 00000068 41B58404 dld.ub r4(r6:m),r8 ; Register form + 20 0000006C 41B5A404 dld.uh r4(r6:m),r8 ; Register form + 21 00000070 41B59400 dld.ub 0xE0000000(r6:m),r8 ; Long Immediate form + 00000074 E0000000 + 22 00000078 41B5B400 dld.uh 0xE0000000(r6:m),r8 ; Long Immediate form + 0000007C E0000000 + 23 00000080 41B68404 dst.b r4(r6:m),r8 ; Register form + 24 00000084 41B6A404 dst.h r4(r6:m),r8 ; Register form + 25 00000088 41B6C404 dst r4(r6:m),r8 ; Register form + 26 0000008C 41B6E404 dst.d r4(r6:m),r8 ; Register form + 27 00000090 41B69400 dst.b 0xE0000000(r6:m),r8 ; Long Immediate form + 00000094 E0000000 + 28 00000098 41B6B400 dst.h 0xE0000000(r6:m),r8 ; Long Immediate form + 0000009C E0000000 + 29 000000A0 41B6D400 dst 0xE0000000(r6:m),r8 ; Long Immediate form + 000000A4 E0000000 + 30 000000A8 41B6F400 dst.d 0xE0000000(r6:m),r8 ; Long Immediate form + 000000AC E0000000 + 31 000000B0 41B48004 ld.b r4(r6:m),r8 ; Register form + 32 000000B4 41B4A004 ld.h r4(r6:m),r8 ; Register form + 33 000000B8 41B4C004 ld r4(r6:m),r8 ; Register form + 34 000000BC 41B4E004 ld.d r4(r6:m),r8 ; Register form + 35 000000C0 41927FF0 ld.b -16(r6:m),r8 ; Short Immediate form + 36 000000C4 4192FFF0 ld.h -16(r6:m),r8 ; Short Immediate form + 37 000000C8 41937FF0 ld -16(r6:m),r8 ; Short Immediate form + 38 000000CC 4193FFF0 ld.d -16(r6:m),r8 ; Short Immediate form + 39 000000D0 41B49000 ld.b 0xE0000000(r6:m),r8 ; Long Immediate form + 000000D4 E0000000 + 40 000000D8 41B4B000 ld.h 0xE0000000(r6:m),r8 ; Long Immediate form + MVP MP Macro Assembler Version 1.13 Wed Feb 26 14:32:14 1997 +Copyright (c) 1993-1995 Texas Instruments Incorporated + +regops2.s PAGE 2 + + 000000DC E0000000 + 41 000000E0 41B4D000 ld 0xE0000000(r6:m),r8 ; Long Immediate form + 000000E4 E0000000 + 42 000000E8 41B4F000 ld.d 0xE0000000(r6:m),r8 ; Long Immediate form + 000000EC E0000000 + 43 000000F0 41B58004 ld.ub r4(r6:m),r8 ; Register form + 44 000000F4 41B5A004 ld.uh r4(r6:m),r8 ; Register form + 45 000000F8 41967FF0 ld.ub -16(r6:m),r8 ; Short Immediate form + 46 000000FC 4196FFF0 ld.uh -16(r6:m),r8 ; Short Immediate form + 47 00000100 41B59000 ld.ub 0xE0000000(r6:m),r8 ; Long Immediate form + 00000104 E0000000 + 48 00000108 41B5B000 ld.uh 0xE0000000(r6:m),r8 ; Long Immediate form + 0000010C E0000000 + 49 00000110 41B68004 st.b r4(r6:m),r8 ; Register form + 50 00000114 41B6A004 st.h r4(r6:m),r8 ; Register form + 51 00000118 41B6C004 st r4(r6:m),r8 ; Register form + 52 0000011C 41B6E004 st.d r4(r6:m),r8 ; Register form + 53 00000120 419A7F00 st.b -256(r6:m),r8 ; Short Immediate form + 54 00000124 419AFF00 st.h -256(r6:m),r8 ; Short Immediate form + 55 00000128 419B7F00 st -256(r6:m),r8 ; Short Immediate form + 56 0000012C 419BFF00 st.d -256(r6:m),r8 ; Short Immediate form + 57 00000130 41B69000 st.b 0xE0000000(r6:m),r8 ; Long Immediate form + 00000134 E0000000 + 58 00000138 41B6B000 st.h 0xE0000000(r6:m),r8 ; Long Immediate form + 0000013C E0000000 + 59 00000140 41B6D000 st 0xE0000000(r6:m),r8 ; Long Immediate form + 00000144 E0000000 + 60 00000148 41B6F000 st.d 0xE0000000(r6:m),r8 ; Long Immediate form + 0000014C E0000000 + + No Errors, No Warnings diff --git a/gas/testsuite/gas/tic80/regops2.s b/gas/testsuite/gas/tic80/regops2.s new file mode 100644 index 0000000..18755b3 --- /dev/null +++ b/gas/testsuite/gas/tic80/regops2.s @@ -0,0 +1,60 @@ + dcachec r8(r10:m) ; Register form (modified) + dcachec 4(r10:m) ; Short Immediate form (positive offset) (modified) + dcachec -4(r10:m) ; Short Immediate form (negative offset) (modified) + dcachec 0x12345678(r10:m) ; Long Immediate form (positive offset) (modified) + dcachec 0xDEADBEEF(r10:m) ; Long Immediate form (negative offset) (modified) + dcachef r8(r10:m) ; Register form (modified) + dcachef 4(r10:m) ; Short Immediate form (positive offset) (modified) + dcachef -4(r10:m) ; Short Immediate form (negative offset) (modified) + dcachef 0x12345678(r10:m) ; Long Immediate form (positive offset) (modified) + dcachef 0xDEADBEEF(r10:m) ; Long Immediate form (negative offset) (modified) + dld.b r4(r6:m),r8 ; Register form + dld.h r4(r6:m),r8 ; Register form + dld r4(r6:m),r8 ; Register form + dld.d r4(r6:m),r8 ; Register form + dld.b 0xE0000000(r6:m),r8 ; Long Immediate form + dld.h 0xE0000000(r6:m),r8 ; Long Immediate form + dld 0xE0000000(r6:m),r8 ; Long Immediate form + dld.d 0xE0000000(r6:m),r8 ; Long Immediate form + dld.ub r4(r6:m),r8 ; Register form + dld.uh r4(r6:m),r8 ; Register form + dld.ub 0xE0000000(r6:m),r8 ; Long Immediate form + dld.uh 0xE0000000(r6:m),r8 ; Long Immediate form + dst.b r4(r6:m),r8 ; Register form + dst.h r4(r6:m),r8 ; Register form + dst r4(r6:m),r8 ; Register form + dst.d r4(r6:m),r8 ; Register form + dst.b 0xE0000000(r6:m),r8 ; Long Immediate form + dst.h 0xE0000000(r6:m),r8 ; Long Immediate form + dst 0xE0000000(r6:m),r8 ; Long Immediate form + dst.d 0xE0000000(r6:m),r8 ; Long Immediate form + ld.b r4(r6:m),r8 ; Register form + ld.h r4(r6:m),r8 ; Register form + ld r4(r6:m),r8 ; Register form + ld.d r4(r6:m),r8 ; Register form + ld.b -16(r6:m),r8 ; Short Immediate form + ld.h -16(r6:m),r8 ; Short Immediate form + ld -16(r6:m),r8 ; Short Immediate form + ld.d -16(r6:m),r8 ; Short Immediate form + ld.b 0xE0000000(r6:m),r8 ; Long Immediate form + ld.h 0xE0000000(r6:m),r8 ; Long Immediate form + ld 0xE0000000(r6:m),r8 ; Long Immediate form + ld.d 0xE0000000(r6:m),r8 ; Long Immediate form + ld.ub r4(r6:m),r8 ; Register form + ld.uh r4(r6:m),r8 ; Register form + ld.ub -16(r6:m),r8 ; Short Immediate form + ld.uh -16(r6:m),r8 ; Short Immediate form + ld.ub 0xE0000000(r6:m),r8 ; Long Immediate form + ld.uh 0xE0000000(r6:m),r8 ; Long Immediate form + st.b r4(r6:m),r8 ; Register form + st.h r4(r6:m),r8 ; Register form + st r4(r6:m),r8 ; Register form + st.d r4(r6:m),r8 ; Register form + st.b -256(r6:m),r8 ; Short Immediate form + st.h -256(r6:m),r8 ; Short Immediate form + st -256(r6:m),r8 ; Short Immediate form + st.d -256(r6:m),r8 ; Short Immediate form + st.b 0xE0000000(r6:m),r8 ; Long Immediate form + st.h 0xE0000000(r6:m),r8 ; Long Immediate form + st 0xE0000000(r6:m),r8 ; Long Immediate form + st.d 0xE0000000(r6:m),r8 ; Long Immediate form diff --git a/gas/testsuite/gas/tic80/regops3.d b/gas/testsuite/gas/tic80/regops3.d new file mode 100644 index 0000000..32a3012 --- /dev/null +++ b/gas/testsuite/gas/tic80/regops3.d @@ -0,0 +1,28 @@ +#objdump: -d +#name: TIc80 register operands with :s modifier + +.*: +file format .*tic80.* + +Disassembly of section .text: + +00000000 <.text>: + 0: 04 0c b4 41.* + 4: 04 2c b4 41.* + 8: 04 4c b4 41.* + c: 04 6c b4 41.* + 10: 04 0c b5 41.* + 14: 04 2c b5 41.* + 18: 04 0c b6 41.* + 1c: 04 2c b6 41.* + 20: 04 4c b6 41.* + 24: 04 6c b6 41.* + 28: 04 08 b4 41.* + 2c: 04 28 b4 41.* + 30: 04 48 b4 41.* + 34: 04 68 b4 41.* + 38: 04 08 b5 41.* + 3c: 04 28 b5 41.* + 40: 04 08 b6 41.* + 44: 04 28 b6 41.* + 48: 04 48 b6 41.* + 4c: 04 68 b6 41.* diff --git a/gas/testsuite/gas/tic80/regops3.lst b/gas/testsuite/gas/tic80/regops3.lst new file mode 100644 index 0000000..d65803f --- /dev/null +++ b/gas/testsuite/gas/tic80/regops3.lst @@ -0,0 +1,27 @@ +MVP MP Macro Assembler Version 1.13 Wed Feb 26 14:32:19 1997 +Copyright (c) 1993-1995 Texas Instruments Incorporated + +regops3.s PAGE 1 + + 1 00000000 41B40C04 dld.b r4:s(r6),r8 ; Register form + 2 00000004 41B42C04 dld.h r4:s(r6),r8 ; Register form + 3 00000008 41B44C04 dld r4:s(r6),r8 ; Register form + 4 0000000C 41B46C04 dld.d r4:s(r6),r8 ; Register form + 5 00000010 41B50C04 dld.ub r4:s(r6),r8 ; Register form + 6 00000014 41B52C04 dld.uh r4:s(r6),r8 ; Register form + 7 00000018 41B60C04 dst.b r4:s(r6),r8 ; Register form + 8 0000001C 41B62C04 dst.h r4:s(r6),r8 ; Register form + 9 00000020 41B64C04 dst r4:s(r6),r8 ; Register form + 10 00000024 41B66C04 dst.d r4:s(r6),r8 ; Register form + 11 00000028 41B40804 ld.b r4:s(r6),r8 ; Register form + 12 0000002C 41B42804 ld.h r4:s(r6),r8 ; Register form + 13 00000030 41B44804 ld r4:s(r6),r8 ; Register form + 14 00000034 41B46804 ld.d r4:s(r6),r8 ; Register form + 15 00000038 41B50804 ld.ub r4:s(r6),r8 ; Register form + 16 0000003C 41B52804 ld.uh r4:s(r6),r8 ; Register form + 17 00000040 41B60804 st.b r4:s(r6),r8 ; Register form + 18 00000044 41B62804 st.h r4:s(r6),r8 ; Register form + 19 00000048 41B64804 st r4:s(r6),r8 ; Register form + 20 0000004C 41B66804 st.d r4:s(r6),r8 ; Register form + + No Errors, No Warnings diff --git a/gas/testsuite/gas/tic80/regops3.s b/gas/testsuite/gas/tic80/regops3.s new file mode 100644 index 0000000..5ed87d5 --- /dev/null +++ b/gas/testsuite/gas/tic80/regops3.s @@ -0,0 +1,20 @@ + dld.b r4:s(r6),r8 ; Register form + dld.h r4:s(r6),r8 ; Register form + dld r4:s(r6),r8 ; Register form + dld.d r4:s(r6),r8 ; Register form + dld.ub r4:s(r6),r8 ; Register form + dld.uh r4:s(r6),r8 ; Register form + dst.b r4:s(r6),r8 ; Register form + dst.h r4:s(r6),r8 ; Register form + dst r4:s(r6),r8 ; Register form + dst.d r4:s(r6),r8 ; Register form + ld.b r4:s(r6),r8 ; Register form + ld.h r4:s(r6),r8 ; Register form + ld r4:s(r6),r8 ; Register form + ld.d r4:s(r6),r8 ; Register form + ld.ub r4:s(r6),r8 ; Register form + ld.uh r4:s(r6),r8 ; Register form + st.b r4:s(r6),r8 ; Register form + st.h r4:s(r6),r8 ; Register form + st r4:s(r6),r8 ; Register form + st.d r4:s(r6),r8 ; Register form diff --git a/gas/testsuite/gas/tic80/regops4.d b/gas/testsuite/gas/tic80/regops4.d new file mode 100644 index 0000000..33607c9 --- /dev/null +++ b/gas/testsuite/gas/tic80/regops4.d @@ -0,0 +1,28 @@ +#objdump: -d +#name: TIc80 register operands with both :m and :s modifier + +.*: +file format .*tic80.* + +Disassembly of section .text: + +00000000 <.text>: + 0: 04 8c b4 41.* + 4: 04 ac b4 41.* + 8: 04 cc b4 41.* + c: 04 ec b4 41.* + 10: 04 8c b5 41.* + 14: 04 ac b5 41.* + 18: 04 8c b6 41.* + 1c: 04 ac b6 41.* + 20: 04 cc b6 41.* + 24: 04 ec b6 41.* + 28: 04 88 b4 41.* + 2c: 04 a8 b4 41.* + 30: 04 c8 b4 41.* + 34: 04 e8 b4 41.* + 38: 04 88 b5 41.* + 3c: 04 a8 b5 41.* + 40: 04 88 b6 41.* + 44: 04 a8 b6 41.* + 48: 04 c8 b6 41.* + 4c: 04 e8 b6 41.* diff --git a/gas/testsuite/gas/tic80/regops4.lst b/gas/testsuite/gas/tic80/regops4.lst new file mode 100644 index 0000000..3af3c9a --- /dev/null +++ b/gas/testsuite/gas/tic80/regops4.lst @@ -0,0 +1,27 @@ +MVP MP Macro Assembler Version 1.13 Wed Feb 26 14:32:25 1997 +Copyright (c) 1993-1995 Texas Instruments Incorporated + +regops4.s PAGE 1 + + 1 00000000 41B48C04 dld.b r4:s(r6:m),r8 ; Register form + 2 00000004 41B4AC04 dld.h r4:s(r6:m),r8 ; Register form + 3 00000008 41B4CC04 dld r4:s(r6:m),r8 ; Register form + 4 0000000C 41B4EC04 dld.d r4:s(r6:m),r8 ; Register form + 5 00000010 41B58C04 dld.ub r4:s(r6:m),r8 ; Register form + 6 00000014 41B5AC04 dld.uh r4:s(r6:m),r8 ; Register form + 7 00000018 41B68C04 dst.b r4:s(r6:m),r8 ; Register form + 8 0000001C 41B6AC04 dst.h r4:s(r6:m),r8 ; Register form + 9 00000020 41B6CC04 dst r4:s(r6:m),r8 ; Register form + 10 00000024 41B6EC04 dst.d r4:s(r6:m),r8 ; Register form + 11 00000028 41B48804 ld.b r4:s(r6:m),r8 ; Register form + 12 0000002C 41B4A804 ld.h r4:s(r6:m),r8 ; Register form + 13 00000030 41B4C804 ld r4:s(r6:m),r8 ; Register form + 14 00000034 41B4E804 ld.d r4:s(r6:m),r8 ; Register form + 15 00000038 41B58804 ld.ub r4:s(r6:m),r8 ; Register form + 16 0000003C 41B5A804 ld.uh r4:s(r6:m),r8 ; Register form + 17 00000040 41B68804 st.b r4:s(r6:m),r8 ; Register form + 18 00000044 41B6A804 st.h r4:s(r6:m),r8 ; Register form + 19 00000048 41B6C804 st r4:s(r6:m),r8 ; Register form + 20 0000004C 41B6E804 st.d r4:s(r6:m),r8 ; Register form + + No Errors, No Warnings diff --git a/gas/testsuite/gas/tic80/regops4.s b/gas/testsuite/gas/tic80/regops4.s new file mode 100644 index 0000000..5ba77e9 --- /dev/null +++ b/gas/testsuite/gas/tic80/regops4.s @@ -0,0 +1,20 @@ + dld.b r4:s(r6:m),r8 ; Register form + dld.h r4:s(r6:m),r8 ; Register form + dld r4:s(r6:m),r8 ; Register form + dld.d r4:s(r6:m),r8 ; Register form + dld.ub r4:s(r6:m),r8 ; Register form + dld.uh r4:s(r6:m),r8 ; Register form + dst.b r4:s(r6:m),r8 ; Register form + dst.h r4:s(r6:m),r8 ; Register form + dst r4:s(r6:m),r8 ; Register form + dst.d r4:s(r6:m),r8 ; Register form + ld.b r4:s(r6:m),r8 ; Register form + ld.h r4:s(r6:m),r8 ; Register form + ld r4:s(r6:m),r8 ; Register form + ld.d r4:s(r6:m),r8 ; Register form + ld.ub r4:s(r6:m),r8 ; Register form + ld.uh r4:s(r6:m),r8 ; Register form + st.b r4:s(r6:m),r8 ; Register form + st.h r4:s(r6:m),r8 ; Register form + st r4:s(r6:m),r8 ; Register form + st.d r4:s(r6:m),r8 ; Register form diff --git a/gas/testsuite/gas/tic80/relocs1.c b/gas/testsuite/gas/tic80/relocs1.c new file mode 100644 index 0000000..6af04b1 --- /dev/null +++ b/gas/testsuite/gas/tic80/relocs1.c @@ -0,0 +1,28 @@ +extern int xfunc (int y); + +static int sfunc (int y) +{ + xfunc (y); +} + +int gfunc (int y) +{ + sfunc (y); +} + +int branches (int y) +{ + int z; + + for (z = y; z < y + 10; z++) + { + if (z & 0x1) + { + gfunc (z); + } + else + { + xfunc (z); + } + } +} diff --git a/gas/testsuite/gas/tic80/relocs1.d b/gas/testsuite/gas/tic80/relocs1.d new file mode 100644 index 0000000..14ca6c9 --- /dev/null +++ b/gas/testsuite/gas/tic80/relocs1.d @@ -0,0 +1,56 @@ +#objdump: -d +#name: TIc80 simple relocs, global/local funcs & branches (code) + +.*: +file format .*tic80.* + +Disassembly of section .text: + +00000000 <_sfunc>: + 0: f0 ff 6c 08.* + 4: 0c 00 59 f8.* + 8: 00 00 59 10.* + c: 00 90 38 f8 00 00 00 00.* + 14: 00 00 51 10.* + 18: 0c 00 51 f8.* + 1c: 1f 80 38 00.* + 20: 10 80 6c 08.* + +00000024 <_gfunc>: + 24: f0 ff 6c 08.* + 28: 0c 00 59 f8.* + 2c: 00 00 59 10.* + 30: 00 90 38 f8 00 00 00 00.* + 38: 00 00 51 10.* + 3c: 0c 00 51 f8.* + 40: 1f 80 38 00.* + 44: 10 80 6c 08.* + +00000048 <_branches>: + 48: f0 ff 6c 08.* + 4c: 0c 00 59 f8.* + 50: 00 00 59 10.* + 54: 00 00 51 10.* + 58: 04 00 59 10.* + 5c: 00 00 51 10.* + 60: 04 00 51 18.* + 64: 0a 80 ac 10.* + 68: 03 00 ba 10.* + 6c: 12 80 a5 30.* + 70: 04 00 51 10.* + 74: 05 80 a4 f8.* + 78: 00 90 38 f8 24 00 00 00.* + 80: 04 00 51 10.* + 84: 04 80 24 00.* + 88: 00 90 38 f8 00 00 00 00.* + 90: 04 00 51 10.* + 94: 04 00 51 10.* + 98: 01 80 ac 10.* + 9c: 04 00 59 10.* + a0: 00 00 51 18.* + a4: 04 00 51 10.* + a8: 0a 80 ec 18.* + ac: 02 00 fa 10.* + b0: f0 ff a5 38.* + b4: 0c 00 51 f8.* + b8: 1f 80 38 00.* + bc: 10 80 6c 08.* diff --git a/gas/testsuite/gas/tic80/relocs1.lst b/gas/testsuite/gas/tic80/relocs1.lst new file mode 100644 index 0000000..9faeb1a --- /dev/null +++ b/gas/testsuite/gas/tic80/relocs1.lst @@ -0,0 +1,80 @@ +MVP MP Macro Assembler Version 1.13 Sat Feb 22 13:19:28 1997 +Copyright (c) 1993-1995 Texas Instruments Incorporated + +relocs1.s PAGE 1 + + 1 ;; This is the hand hacked output of the TI C compiler for a simple + 2 ;; test program that contains local/global functions, local/global + 3 ;; function calls, and an "if" and "for" statement. + 4 + 5 .global _xfunc + 6 + 7 00000000 _sfunc: + 8 00000000 086CFFF0 addu -16,r1,r1 + 9 00000004 F859000C st 12(r1),r31 + 10 00000008 10590000 st 0(r1),r2 + 11 0000000C F8389000 jsr _xfunc(r0),r31 + 00000010 00000000 + 12 00000014 10510000 ld 0(r1),r2 + 13 00000018 F851000C ld 12(r1),r31 + 14 0000001C 0038801F jsr r31(r0),r0 + 15 00000020 086C8010 addu 16,r1,r1 + 16 + 17 .global _gfunc + 18 + 19 00000024 _gfunc: + 20 00000024 086CFFF0 addu -16,r1,r1 + 21 00000028 F859000C st 12(r1),r31 + 22 0000002C 10590000 st 0(r1),r2 + 23 00000030 F8389000 jsr _sfunc(r0),r31 + 00000034 00000000 + 24 00000038 10510000 ld 0(r1),r2 + 25 0000003C F851000C ld 12(r1),r31 + 26 00000040 0038801F jsr r31(r0),r0 + 27 00000044 086C8010 addu 16,r1,r1 + 28 + 29 + 30 .global _branches + 31 + 32 00000048 _branches: + 33 00000048 086CFFF0 addu -16,r1,r1 + 34 0000004C F859000C st 12(r1),r31 + 35 00000050 10590000 st 0(r1),r2 + 36 00000054 10510000 ld 0(r1),r2 + 37 00000058 10590004 st 4(r1),r2 + 38 0000005C 10510000 ld 0(r1),r2 + 39 00000060 18510004 ld 4(r1),r3 + 40 00000064 10AC800A addu 10,r2,r2 + 41 00000068 10BA0003 cmp r3,r2,r2 + 42 0000006C 30A58012 bbo.a L12,r2,ge.w + 43 00000070 L8: + 44 00000070 10510004 ld 4(r1),r2 + 45 00000074 F8A48005 bbz.a L10,r2,0 + 46 00000078 F8389000 jsr _gfunc(r0),r31 + 0000007C 00000024 + 47 00000080 10510004 ld 4(r1),r2 + 48 00000084 00248004 br.a L11 + 49 00000088 L10: + 50 00000088 F8389000 jsr _xfunc(r0),r31 + 0000008C 00000000 + 51 00000090 10510004 ld 4(r1),r2 + MVP MP Macro Assembler Version 1.13 Sat Feb 22 13:19:28 1997 +Copyright (c) 1993-1995 Texas Instruments Incorporated + +relocs1.s PAGE 2 + + 52 00000094 L11: + 53 00000094 10510004 ld 4(r1),r2 + 54 00000098 10AC8001 addu 1,r2,r2 + 55 0000009C 10590004 st 4(r1),r2 + 56 000000A0 18510000 ld 0(r1),r3 + 57 000000A4 10510004 ld 4(r1),r2 + 58 000000A8 18EC800A addu 10,r3,r3 + 59 000000AC 10FA0002 cmp r2,r3,r2 + 60 000000B0 38A5FFF0 bbo.a L8,r2,lt.w + 61 000000B4 L12: + 62 000000B4 F851000C ld 12(r1),r31 + 63 000000B8 0038801F jsr r31(r0),r0 + 64 000000BC 086C8010 addu 16,r1,r1 + + No Errors, No Warnings diff --git a/gas/testsuite/gas/tic80/relocs1.s b/gas/testsuite/gas/tic80/relocs1.s new file mode 100644 index 0000000..149e395 --- /dev/null +++ b/gas/testsuite/gas/tic80/relocs1.s @@ -0,0 +1,66 @@ +;; This is the hand hacked output of the TI C compiler for a simple +;; test program that contains local/global functions, local/global +;; function calls, and an "if" and "for" statement. + + .file "relocs1.s" + + .global _xfunc + +_sfunc: + addu -16,r1,r1 + st 12(r1),r31 + st 0(r1),r2 + jsr _xfunc(r0),r31 + ld 0(r1),r2 + ld 12(r1),r31 + jsr r31(r0),r0 + addu 16,r1,r1 + + .global _gfunc + +_gfunc: + addu -16,r1,r1 + st 12(r1),r31 + st 0(r1),r2 + jsr _sfunc(r0),r31 + ld 0(r1),r2 + ld 12(r1),r31 + jsr r31(r0),r0 + addu 16,r1,r1 + + + .global _branches + +_branches: + addu -16,r1,r1 + st 12(r1),r31 + st 0(r1),r2 + ld 0(r1),r2 + st 4(r1),r2 + ld 0(r1),r2 + ld 4(r1),r3 + addu 10,r2,r2 + cmp r3,r2,r2 + bbo.a L12,r2,ge.w +L8: + ld 4(r1),r2 + bbz.a L10,r2,0 + jsr _gfunc(r0),r31 + ld 4(r1),r2 + br.a L11 +L10: + jsr _xfunc(r0),r31 + ld 4(r1),r2 +L11: + ld 4(r1),r2 + addu 1,r2,r2 + st 4(r1),r2 + ld 0(r1),r3 + ld 4(r1),r2 + addu 10,r3,r3 + cmp r2,r3,r2 + bbo.a L8,r2,lt.w +L12: + ld 12(r1),r31 + jsr r31(r0),r0 + addu 16,r1,r1 diff --git a/gas/testsuite/gas/tic80/relocs1b.d b/gas/testsuite/gas/tic80/relocs1b.d new file mode 100644 index 0000000..4eb3161 --- /dev/null +++ b/gas/testsuite/gas/tic80/relocs1b.d @@ -0,0 +1,12 @@ +#objdump: -r +#source: relocs1.s +#name: TIc80 simple relocs, global/local funcs & branches (relocs) + +.*: +file format .*tic80.* + +RELOCATION RECORDS FOR \[.text\]: +OFFSET TYPE VALUE +00000010 32 _xfunc +00000034 32 .text +0000007c 32 .text +0000008c 32 _xfunc diff --git a/gas/testsuite/gas/tic80/relocs2.c b/gas/testsuite/gas/tic80/relocs2.c new file mode 100644 index 0000000..3f1120c --- /dev/null +++ b/gas/testsuite/gas/tic80/relocs2.c @@ -0,0 +1,41 @@ +extern char x_char; +extern short x_short; +static int x_int; +extern long x_long; +extern float x_float; +extern double x_double; +extern char *x_char_p; + +static char s_char; +static short s_short; +static int s_int; +static long s_long; +static float s_float; +static double s_double; +static char *s_char_p; + +char g_char; +short g_short; +int g_int; +long g_long; +float g_float; +double g_double; +char *g_char_p; + +main () +{ + x_char = s_char; + g_char = x_char; + x_short = s_short; + g_short = x_short; + x_int = s_int; + g_int = x_int; + x_long = s_long; + g_long = x_long; + x_float = s_float; + g_float = x_float; + x_double = s_double; + g_double = x_double; + x_char_p = s_char_p; + g_char_p = x_char_p; +} diff --git a/gas/testsuite/gas/tic80/relocs2.d b/gas/testsuite/gas/tic80/relocs2.d new file mode 100644 index 0000000..cf3e87d --- /dev/null +++ b/gas/testsuite/gas/tic80/relocs2.d @@ -0,0 +1,37 @@ +#objdump: -d +#name: TIc80 simple relocs, static and global variables (code) + +.*: +file format .*tic80.* + +Disassembly of section .text: + +00000000 <_main>: + 0: 00 10 34 10 24 02 00 00.* + 8: 00 10 36 10 00 00 00 00.* + 10: 00 10 34 10 00 00 00 00.* + 18: 00 10 36 10 04 02 00 00.* + 20: 00 30 34 10 24 03 00 00.* + 28: 00 30 36 10 00 00 00 00.* + 30: 00 30 34 10 00 00 00 00.* + 38: 00 30 36 10 04 03 00 00.* + 40: 00 50 34 10 34 02 00 00.* + 48: 00 50 36 10 34 03 00 00.* + 50: 00 50 34 10 34 03 00 00.* + 58: 00 50 36 10 14 02 00 00.* + 60: 00 50 34 10 f4 01 00 00.* + 68: 00 50 36 10 00 00 00 00.* + 70: 00 50 34 10 00 00 00 00.* + 78: 00 50 36 10 f4 00 00 00.* + 80: 00 50 34 10 f4 02 00 00.* + 88: 00 50 36 10 00 00 00 00.* + 90: 00 50 34 10 00 00 00 00.* + 98: 00 50 36 10 14 03 00 00.* + a0: 00 70 34 10 e4 01 00 00.* + a8: 00 70 36 10 00 00 00 00.* + b0: 00 70 34 10 00 00 00 00.* + b8: 00 70 36 10 e4 02 00 00.* + c0: 00 50 34 10 44 03 00 00.* + c8: 00 50 36 10 00 00 00 00.* + d0: 00 50 34 10 00 00 00 00.* + d8: 00 50 36 10 e4 00 00 00.* + e0: 1f a0 38 00.* diff --git a/gas/testsuite/gas/tic80/relocs2.lst b/gas/testsuite/gas/tic80/relocs2.lst new file mode 100644 index 0000000..0690a8c --- /dev/null +++ b/gas/testsuite/gas/tic80/relocs2.lst @@ -0,0 +1,112 @@ +MVP MP Macro Assembler Version 1.13 Sun Feb 23 12:16:32 1997 +Copyright (c) 1993-1995 Texas Instruments Incorporated + +relocs2.s PAGE 1 + + 1 ;; This is the hand hacked output of the TI C compiler for a simple + 2 ;; test program that contains static, global, and extern data variables. + 3 + 4 .file "relocs2.s" + 5 .global _x_char + 6 .global _x_short + 7 .global _x_long + 8 .global _x_float + 9 .global _x_double + 10 .global _x_char_p + 11 .global _g_char + 12 .global _g_short + 13 .global _g_int + 14 .global _g_long + 15 .global _g_float + 16 .global _g_double + 17 .global _g_char_p + 18 .global _main + 19 + 20 00000000 _main: + 21 00000000 10341000 ld.b _s_char+0(r0),r2 + 00000004 0000001C + 22 00000008 10361000 st.b _x_char+0(r0),r2 + 0000000C 00000000 + 23 00000010 10341000 ld.b _x_char+0(r0),r2 + 00000014 00000000 + 24 00000018 10361000 st.b _g_char+0(r0),r2 + 0000001C 00000014 + 25 00000020 10343000 ld.h _s_short+0(r0),r2 + 00000024 0000003C + 26 00000028 10363000 st.h _x_short+0(r0),r2 + 0000002C 00000000 + 27 00000030 10343000 ld.h _x_short+0(r0),r2 + 00000034 00000000 + 28 00000038 10363000 st.h _g_short+0(r0),r2 + 0000003C 00000034 + 29 00000040 10345000 ld _s_int+0(r0),r2 + 00000044 00000020 + 30 00000048 10365000 st _x_int+0(r0),r2 + 0000004C 00000040 + 31 00000050 10345000 ld _x_int+0(r0),r2 + 00000054 00000040 + 32 00000058 10365000 st _g_int+0(r0),r2 + 0000005C 00000018 + 33 00000060 10345000 ld _s_long+0(r0),r2 + 00000064 00000010 + 34 00000068 10365000 st _x_long+0(r0),r2 + 0000006C 00000000 + 35 00000070 10345000 ld _x_long+0(r0),r2 + 00000074 00000000 + 36 00000078 10365000 st _g_long+0(r0),r2 + 0000007C 00000004 + 37 00000080 10345000 ld _s_float+0(r0),r2 + 00000084 00000030 + 38 00000088 10365000 st _x_float+0(r0),r2 + MVP MP Macro Assembler Version 1.13 Sun Feb 23 12:16:32 1997 +Copyright (c) 1993-1995 Texas Instruments Incorporated + +relocs2.s PAGE 2 + + 0000008C 00000000 + 39 00000090 10345000 ld _x_float+0(r0),r2 + 00000094 00000000 + 40 00000098 10365000 st _g_float+0(r0),r2 + 0000009C 00000038 + 41 000000A0 10347000 ld.d _s_double+0(r0),r2 + 000000A4 00000008 + 42 000000A8 10367000 st.d _x_double+0(r0),r2 + 000000AC 00000000 + 43 000000B0 10347000 ld.d _x_double+0(r0),r2 + 000000B4 00000000 + 44 000000B8 10367000 st.d _g_double+0(r0),r2 + 000000BC 00000028 + 45 000000C0 10345000 ld _s_char_p+0(r0),r2 + 000000C4 00000044 + 46 000000C8 10365000 st _x_char_p+0(r0),r2 + 000000CC 00000000 + 47 000000D0 10345000 ld _x_char_p+0(r0),r2 + 000000D4 00000000 + 48 000000D8 10365000 st _g_char_p+0(r0),r2 + 000000DC 00000000 + 49 000000E0 0038A01F jsr.a r31(r0),r0 + 50 + 51 .global _g_char_p + 52 00000000 .bss _g_char_p,4,4 + 53 .global _g_long + 54 00000004 .bss _g_long,4,4 + 55 00000008 .bss _s_double,8,8 + 56 00000010 .bss _s_long,4,4 + 57 .global _g_char + 58 00000014 .bss _g_char,1,4 + 59 .global _g_int + 60 00000018 .bss _g_int,4,4 + 61 0000001C .bss _s_char,1,4 + 62 00000020 .bss _s_int,4,4 + 63 .global _g_double + 64 00000028 .bss _g_double,8,8 + 65 00000030 .bss _s_float,4,4 + 66 .global _g_short + 67 00000034 .bss _g_short,2,4 + 68 .global _g_float + 69 00000038 .bss _g_float,4,4 + 70 0000003C .bss _s_short,2,4 + 71 00000040 .bss _x_int,4,4 + 72 00000044 .bss _s_char_p,4,4 + + No Errors, No Warnings diff --git a/gas/testsuite/gas/tic80/relocs2.s b/gas/testsuite/gas/tic80/relocs2.s new file mode 100644 index 0000000..e4257df --- /dev/null +++ b/gas/testsuite/gas/tic80/relocs2.s @@ -0,0 +1,72 @@ +;; This is the hand hacked output of the TI C compiler for a simple +;; test program that contains static, global, and extern data variables. + + .file "relocs2.s" + .global _x_char + .global _x_short + .global _x_long + .global _x_float + .global _x_double + .global _x_char_p + .global _g_char + .global _g_short + .global _g_int + .global _g_long + .global _g_float + .global _g_double + .global _g_char_p + .global _main + +_main: + ld.b _s_char+0(r0),r2 + st.b _x_char+0(r0),r2 + ld.b _x_char+0(r0),r2 + st.b _g_char+0(r0),r2 + ld.h _s_short+0(r0),r2 + st.h _x_short+0(r0),r2 + ld.h _x_short+0(r0),r2 + st.h _g_short+0(r0),r2 + ld _s_int+0(r0),r2 + st _x_int+0(r0),r2 + ld _x_int+0(r0),r2 + st _g_int+0(r0),r2 + ld _s_long+0(r0),r2 + st _x_long+0(r0),r2 + ld _x_long+0(r0),r2 + st _g_long+0(r0),r2 + ld _s_float+0(r0),r2 + st _x_float+0(r0),r2 + ld _x_float+0(r0),r2 + st _g_float+0(r0),r2 + ld.d _s_double+0(r0),r2 + st.d _x_double+0(r0),r2 + ld.d _x_double+0(r0),r2 + st.d _g_double+0(r0),r2 + ld _s_char_p+0(r0),r2 + st _x_char_p+0(r0),r2 + ld _x_char_p+0(r0),r2 + st _g_char_p+0(r0),r2 + jsr.a r31(r0),r0 + + .global _g_char_p + .bss _g_char_p,4,4 + .global _g_long + .bss _g_long,4,4 + .bss _s_double,8,8 + .bss _s_long,4,4 + .global _g_char + .bss _g_char,1,4 + .global _g_int + .bss _g_int,4,4 + .bss _s_char,1,4 + .bss _s_int,4,4 + .global _g_double + .bss _g_double,8,8 + .bss _s_float,4,4 + .global _g_short + .bss _g_short,2,4 + .global _g_float + .bss _g_float,4,4 + .bss _s_short,2,4 + .bss _x_int,4,4 + .bss _s_char_p,4,4 diff --git a/gas/testsuite/gas/tic80/relocs2b.d b/gas/testsuite/gas/tic80/relocs2b.d new file mode 100644 index 0000000..604f99d --- /dev/null +++ b/gas/testsuite/gas/tic80/relocs2b.d @@ -0,0 +1,38 @@ +#objdump: -r +#source: relocs2.s +#name: TIc80 simple relocs, static and global variables (relocs) + +.*: +file format .*tic80.* + +RELOCATION RECORDS FOR \[.text\]: +OFFSET TYPE VALUE +00000004 32 .bss\+0xffffff1c +0000000c 32 _x_char +00000014 32 _x_char +0000001c 32 .bss\+0xffffff1c +00000024 32 .bss\+0xffffff1c +0000002c 32 _x_short +00000034 32 _x_short +0000003c 32 .bss\+0xffffff1c +00000044 32 .bss\+0xffffff1c +0000004c 32 .bss\+0xffffff1c +00000054 32 .bss\+0xffffff1c +0000005c 32 .bss\+0xffffff1c +00000064 32 .bss\+0xffffff1c +0000006c 32 _x_long +00000074 32 _x_long +0000007c 32 .bss\+0xffffff1c +00000084 32 .bss\+0xffffff1c +0000008c 32 _x_float +00000094 32 _x_float +0000009c 32 .bss\+0xffffff1c +000000a4 32 .bss\+0xffffff1c +000000ac 32 _x_double +000000b4 32 _x_double +000000bc 32 .bss\+0xffffff1c +000000c4 32 .bss\+0xffffff1c +000000cc 32 _x_char_p +000000d4 32 _x_char_p +000000dc 32 .bss\+0xffffff1c + + diff --git a/gas/testsuite/gas/tic80/tic80.exp b/gas/testsuite/gas/tic80/tic80.exp new file mode 100644 index 0000000..49c4633 --- /dev/null +++ b/gas/testsuite/gas/tic80/tic80.exp @@ -0,0 +1,21 @@ +# +# TI TMS320C80 tests. +# +if [istarget tic80*-*-*] then { + + run_dump_test "regops" + run_dump_test "regops2" + run_dump_test "regops3" + run_dump_test "regops4" + run_dump_test "cregops" + run_dump_test "float" + run_dump_test "endmask" + run_dump_test "bitnum" + run_dump_test "ccode" + run_dump_test "add" + run_dump_test "relocs1" + run_dump_test "relocs1b" + run_dump_test "relocs2" + run_dump_test "relocs2b" + run_dump_test "align" +} diff --git a/gas/testsuite/gas/v850/arith.s b/gas/testsuite/gas/v850/arith.s new file mode 100644 index 0000000..e72140f --- /dev/null +++ b/gas/testsuite/gas/v850/arith.s @@ -0,0 +1,24 @@ + + .text + .global arith_opcodes +arith_opcodes: + add r5,r6 + add 5,r6 + addi 7,r5,r6 + divh r5,r6 + mulh r5,r6 + mulh 5,r6 + mulhi 7,r5,r6 + sar r5,r6 + sar 31,r6 + satadd r5,r6 + satadd 5,r6 + satsub r5,r6 + satsubi 7,r5,r6 + satsubr r5,r6 + shl r5,r6 + shl 31,r6 + shr r5,r6 + shr 31,r6 + sub r5,r6 + subr r5,r6 diff --git a/gas/testsuite/gas/v850/basic.exp b/gas/testsuite/gas/v850/basic.exp new file mode 100644 index 0000000..c06a631 --- /dev/null +++ b/gas/testsuite/gas/v850/basic.exp @@ -0,0 +1,438 @@ +# Copyright (C) 1996 Free Software Foundation, Inc. + +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; either version 2 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ + +# Please email any bugs, comments, and/or additions to this file to: +# DejaGnu@cygnus.com + +# Written by Cygnus Support. + +proc do_arith {} { + set testname "arith.s: Arithmetic operations" + set x 0 + + gas_start "arith.s" "-al" + + # Instead of having a variable for each match string just increment the + # total number of matches seen. That's simpler when testing large numbers + # of instructions (as these tests to). + # -re "^ +\[0-9\]+ 0000 489A0000\[^\n\]*\n" { set x [expr $x+1] } + while 1 { + expect { + -re "^ +\[0-9\]+ 0000 C531\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0002 4532\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0004 05360700\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0008 4530\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 000a E530\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 000c E532\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 000e E5360700\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0012 E537A000\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0016 BF32\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0018 C530\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 001a 2532\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 001c A530\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 001e 65360700\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0022 8530\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0024 E537C000\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0028 DF32\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 002a E5378000\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 002e 9F32\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0030 A531\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0032 8531\[^\n\]*\n" { set x [expr $x+1] } + -re "\[^\n\]*\n" { } + timeout { perror "timeout\n"; break } + eof { break } + } + } + + # This was intended to do any cleanup necessary. It kinda looks like it + # isn't needed, but just in case, please keep it in for now. + gas_finish + + # Did we find what we were looking for? If not, flunk it. + if [expr $x==20] then { pass $testname } else { fail $testname } +} + +proc do_bit {} { + set testname "bit.s: bit operations" + set x 0 + + gas_start "bit.s" "-al" + + # Instead of having a variable for each match string just increment the + # total number of matches seen. That's simpler when testing large numbers + # of instructions (as these tests to). + while 1 { + expect { + -re "^ +\[0-9\]+ 0000 C6AF1000\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0004 C66F1000\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0008 C62F1000\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 000c C6EF1000\[^\n\]*\n" { set x [expr $x+1] } + -re "\[^\n\]*\n" { } + timeout { perror "timeout\n"; break } + eof { break } + } + } + + # This was intended to do any cleanup necessary. It kinda looks like it + # isn't needed, but just in case, please keep it in for now. + gas_finish + + # Did we find what we were looking for? If not, flunk it. + if [expr $x==4] then { pass $testname } else { fail $testname } +} + +proc do_branch {} { + set testname "branch.s: branch operations" + set x 0 + + gas_start "branch.s" "-al" + + # Instead of having a variable for each match string just increment the + # total number of matches seen. That's simpler when testing large numbers + # of instructions (as these tests to). + while 1 { + expect { + -re "^ +\[0-9\]+ 0000 8F05\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0002 FEFD\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0004 E6FD\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0006 D7FD\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0008 CBFD\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 000a B9FD\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 000c A1FD\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 000e 93FD\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0010 82FD\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0012 FAF5\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0014 E0F5\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0016 D8F5\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0018 C4F5\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 001a BCF5\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 001c A1F5\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 001e 99F5\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0020 82F5\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0022 FAED\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0024 E5ED\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0026 DDED\[^\n\]*\n" { set x [expr $x+1] } + -re "\[^\n\]*\n" { } + timeout { perror "timeout\n"; break } + eof { break } + } + } + + # This was intended to do any cleanup necessary. It kinda looks like it + # isn't needed, but just in case, please keep it in for now. + gas_finish + + # Did we find what we were looking for? If not, flunk it. + if [expr $x==20] then { pass $testname } else { fail $testname } +} + +proc do_compare {} { + set testname "compare.s: compare operations" + set x 0 + + gas_start "compare.s" "-al" + + # Instead of having a variable for each match string just increment the + # total number of matches seen. That's simpler when testing large numbers + # of instructions (as these tests to). + while 1 { + expect { + -re "^ +\[0-9\]+ 0000 E531\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0002 6532\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0004 E02F0000\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0008 E82F0000\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 000c E12F0000\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0010 E12F0000\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0014 E92F0000\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0018 E92F0000\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 001c E22F0000\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0020 EA2F0000\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0024 E32F0000\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0028 EB2F0000\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 002c E42F0000\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0030 E42F0000\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0034 EC2F0000\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0038 EC2F0000\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 003c E52F0000\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0040 ED2F0000\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0044 E62F0000\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0048 EE2F0000\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 004c E72F0000\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0050 EF2F0000\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0054 6531\[^\n\]*\n" { set x [expr $x+1] } + -re "\[^\n\]*\n" { } + timeout { perror "timeout\n"; break } + eof { break } + } + } + + # This was intended to do any cleanup necessary. It kinda looks like it + # isn't needed, but just in case, please keep it in for now. + gas_finish + + # Did we find what we were looking for? If not, flunk it. + if [expr $x==23] then { pass $testname } else { fail $testname } +} + +proc do_jumps {} { + set testname "jumps.s: jumps operations" + set x 0 + + gas_start "jumps.s" "-al" + + # Instead of having a variable for each match string just increment the + # total number of matches seen. That's simpler when testing large numbers + # of instructions (as these tests to). + while 1 { + expect { + -re "^ +\[0-9\]+ 0000 802F0000\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0004 6500\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0006 BF07FAFF\[^\n\]*\n" { set x [expr $x+1] } + -re "\[^\n\]*\n" { } + timeout { perror "timeout\n"; break } + eof { break } + } + } + + # This was intended to do any cleanup necessary. It kinda looks like it + # isn't needed, but just in case, please keep it in for now. + gas_finish + + # Did we find what we were looking for? If not, flunk it. + if [expr $x==3] then { pass $testname } else { fail $testname } +} + +proc do_logical {} { + set testname "logical.s: logical operations" + set x 0 + + gas_start "logical.s" "-al" + + # Instead of having a variable for each match string just increment the + # total number of matches seen. That's simpler when testing large numbers + # of instructions (as these tests to). + while 1 { + expect { + -re "^ +\[0-9\]+ 0000 4531\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0002 C5360700\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0006 2530\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0008 0531\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 000a 85360700\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 000e 2531\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0010 A5360700\[^\n\]*\n" { set x [expr $x+1] } + -re "\[^\n\]*\n" { } + timeout { perror "timeout\n"; break } + eof { break } + } + } + + # This was intended to do any cleanup necessary. It kinda looks like it + # isn't needed, but just in case, please keep it in for now. + gas_finish + + # Did we find what we were looking for? If not, flunk it. + if [expr $x==7] then { pass $testname } else { fail $testname } +} + +proc do_mem {} { + set testname "mem.s: memory operations" + set x 0 + + gas_start "mem.s" "-al" + + # Instead of having a variable for each match string just increment the + # total number of matches seen. That's simpler when testing large numbers + # of instructions (as these tests to). + while 1 { + expect { + -re "^ +\[0-9\]+ 0000 05370500\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0004 25370400\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0008 25370500\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 000c 4033\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 000e 4034\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0010 4035\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0012 462F0500\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0016 662F0400\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 001a 662F0500\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 001e C033\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0020 C034\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0022 4135\[^\n\]*\n" { set x [expr $x+1] } + -re "\[^\n\]*\n" { } + timeout { perror "timeout\n"; break } + eof { break } + } + } + + # This was intended to do any cleanup necessary. It kinda looks like it + # isn't needed, but just in case, please keep it in for now. + gas_finish + + # Did we find what we were looking for? If not, flunk it. + if [expr $x==12] then { pass $testname } else { fail $testname } +} + +proc do_misc {} { + set testname "misc.s: misc operations" + set x 0 + + gas_start "misc.s" "-al" + + # Instead of having a variable for each match string just increment the + # total number of matches seen. That's simpler when testing large numbers + # of instructions (as these tests to). + while 1 { + expect { + -re "^ +\[0-9\]+ 0000 E0076001\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0004 E0876001\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0008 E0072001\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 000c 0000\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 000e E0074001\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0012 E0070001\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0016 FF070001\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 001a E72F2000\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 001e E53F4000\[^\n\]*\n" { set x [expr $x+1] } + -re "\[^\n\]*\n" { } + timeout { perror "timeout\n"; break } + eof { break } + } + } + + # This was intended to do any cleanup necessary. It kinda looks like it + # isn't needed, but just in case, please keep it in for now. + gas_finish + + # Did we find what we were looking for? If not, flunk it. + if [expr $x==9] then { pass $testname } else { fail $testname } +} + +proc do_move {} { + set testname "move.s: move operations" + set x 0 + + gas_start "move.s" "-al" + + # Instead of having a variable for each match string just increment the + # total number of matches seen. That's simpler when testing large numbers + # of instructions (as these tests to). + while 1 { + expect { + -re "^ +\[0-9\]+ 0000 0530\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0002 0532\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0004 25360700\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0008 45360700\[^\n\]*\n" { set x [expr $x+1] } + -re "\[^\n\]*\n" { } + timeout { perror "timeout\n"; break } + eof { break } + } + } + + # This was intended to do any cleanup necessary. It kinda looks like it + # isn't needed, but just in case, please keep it in for now. + gas_finish + + # Did we find what we were looking for? If not, flunk it. + if [expr $x==4] then { pass $testname } else { fail $testname } +} + +proc do_hilo {} { + set testname "hilo.s: hilo tests" + set x 0 + + gas_start "hilo.s" "-al" + + # Instead of having a variable for each match string just increment the + # total number of matches seen. That's simpler when testing large numbers + # of instructions (as these tests to). + while 1 { + expect { + -re "^ +\[0-9\]+ 0000 200EEFBE\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0004 410EAEDE\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0008 410EADDE\[^\n\]*\n" { set x [expr $x+1] } + -re "\[^\n\]*\n" { } + timeout { perror "timeout\n"; break } + eof { break } + } + } + + # This was intended to do any cleanup necessary. It kinda looks like it + # isn't needed, but just in case, please keep it in for now. + gas_finish + + # Did we find what we were looking for? If not, flunk it. + if [expr $x==3] then { pass $testname } else { fail $testname } +} + + +proc do_simple_reloc_tests {} { + set testname "reloc.s: Test for proper relocations (part 2)" + set x 0 + + if [gas_test_old "reloc.s" "" "Test for proper relocation (part 1)"] then { + objdump_start_no_subdir "a.out" "-r" + + while 1 { + expect { + -re "^00000002\[^\n\]*R_V850_LO16\[^\n\]*\n" + { set x [expr $x+1] } + -re "^00000006\[^\n\]*R_V850_HI16_S\[^\n\]*\n" + { set x [expr $x+1] } + -re "^0000000a\[^\n\]*R_V850_HI16\[^\n\]*\n" + { set x [expr $x+1] } + -re "^0000000e\[^\n\]*R_V850_ZDA_16_16_OFFSET\[^\n\]*\n" + { set x [expr $x+1] } + -re "^00000012\[^\n\]*R_V850_TDA_16_16_OFFSET\[^\n\]*\n" + { set x [expr $x+1] } + -re "^00000016\[^\n\]*R_V850_SDA_16_16_OFFSET\[^\n\]*\n" + { set x [expr $x+1] } + -re "\[^\n\]*\n" { } + timeout { perror "timeout\n"; break } + eof { break } + } + } + } + + # This was intended to do any cleanup necessary. It kinda looks like it + # isn't needed, but just in case, please keep it in for now. + objdump_finish + + # Did we find what we were looking for? If not, flunk it. + if [expr $x==6] then { pass $testname } else { fail $testname } +} + +if [istarget v850*-*-*] then { + # Test the basic instruction parser. + do_arith + do_bit + do_branch + do_compare + do_jumps + do_logical + do_mem + do_misc + do_move + + # Make sure we handle lo() hi() and hi0() correctly. + do_hilo + + # Check for proper relocs on lo, hi, hi0, zdaoff, tdaoff and sdaoff + # expressions + do_simple_reloc_tests + + gas_test "hilo2.s" "" "" "hi/lo regression test" + gas_test "fepsw.s" "" "" "eqsw regression test" + + gas_test_error "range.s" "-mwarn-signed-overflow" "Check for range error on byte load/store" +} diff --git a/gas/testsuite/gas/v850/bit.s b/gas/testsuite/gas/v850/bit.s new file mode 100644 index 0000000..aa1ac05 --- /dev/null +++ b/gas/testsuite/gas/v850/bit.s @@ -0,0 +1,8 @@ + + .text + .global bit +bit: + clr1 5,16[r6] + not1 5,16[r6] + set1 5,16[r6] + tst1 5,16[r6] diff --git a/gas/testsuite/gas/v850/branch.s b/gas/testsuite/gas/v850/branch.s new file mode 100644 index 0000000..a1c1b42 --- /dev/null +++ b/gas/testsuite/gas/v850/branch.s @@ -0,0 +1,24 @@ + + .text + .global bcc +bcc: + bgt bcc + bge bcc + blt bcc + ble bcc + bh bcc + bnl bcc + bl bcc + bnh bcc + be bcc + bne bcc + bv bcc + bnv bcc + bn bcc + bp bcc + bc bcc + bnc bcc + bz bcc + bnz bcc + br bcc + bsa bcc diff --git a/gas/testsuite/gas/v850/compare.s b/gas/testsuite/gas/v850/compare.s new file mode 100644 index 0000000..d41c8a8 --- /dev/null +++ b/gas/testsuite/gas/v850/compare.s @@ -0,0 +1,28 @@ + + .text + .global compare +compare: + cmp r5,r6 + cmp 5,r6 + setf v,r5 + setf nv,r5 + setf c,r5 + setf l,r5 + setf nc,r5 + setf nl,r5 + setf z,r5 + setf nz,r5 + setf nh,r5 + setf h,r5 + setf s,r5 + setf n,r5 + setf ns,r5 + setf p,r5 + setf t,r5 + setf sa,r5 + setf lt,r5 + setf ge,r5 + setf le,r5 + setf gt,r5 + tst r5,r6 + diff --git a/gas/testsuite/gas/v850/fepsw.s b/gas/testsuite/gas/v850/fepsw.s new file mode 100644 index 0000000..e20333c --- /dev/null +++ b/gas/testsuite/gas/v850/fepsw.s @@ -0,0 +1,2 @@ + .text + ldsr r17,fepsw diff --git a/gas/testsuite/gas/v850/hilo.s b/gas/testsuite/gas/v850/hilo.s new file mode 100644 index 0000000..5067e56 --- /dev/null +++ b/gas/testsuite/gas/v850/hilo.s @@ -0,0 +1,5 @@ + + .text + movea lo(0xdeadbeef),r0,r1 + movhi hi(0xdeadbeef),r1,r1 + movhi hi0(0xdeadbeef),r1,r1 diff --git a/gas/testsuite/gas/v850/hilo2.s b/gas/testsuite/gas/v850/hilo2.s new file mode 100644 index 0000000..661d593 --- /dev/null +++ b/gas/testsuite/gas/v850/hilo2.s @@ -0,0 +1,4 @@ + .text + .org 0x10000 + movea hi(blah),r0,r1 +blah: diff --git a/gas/testsuite/gas/v850/jumps.s b/gas/testsuite/gas/v850/jumps.s new file mode 100644 index 0000000..173164b --- /dev/null +++ b/gas/testsuite/gas/v850/jumps.s @@ -0,0 +1,8 @@ + + .text + .global jumps +jumps: + jarl jumps,r5 + jmp [r5] + jr jumps + diff --git a/gas/testsuite/gas/v850/logical.s b/gas/testsuite/gas/v850/logical.s new file mode 100644 index 0000000..ab00b3b --- /dev/null +++ b/gas/testsuite/gas/v850/logical.s @@ -0,0 +1,11 @@ + + .text + .global logicals +logicals: + and r5,r6 + andi 7,r5,r6 + not r5,r6 + or r5,r6 + ori 7,r5,r6 + xor r5,r6 + xori 7,r5,r6 diff --git a/gas/testsuite/gas/v850/mem.s b/gas/testsuite/gas/v850/mem.s new file mode 100644 index 0000000..9c69cea --- /dev/null +++ b/gas/testsuite/gas/v850/mem.s @@ -0,0 +1,16 @@ + + .text + .global memory +memory: + ld.b 5[r5],r6 + ld.h 4[r5],r6 + ld.w 4[r5],r6 + sld.b 64[ep],r6 + sld.h 128[ep],r6 + sld.w 128[ep],r6 + st.b r5,5[r6] + st.h r5,4[r6] + st.w r5,4[r6] + sst.b r6,64[ep] + sst.h r6,128[ep] + sst.w r6,128[ep] diff --git a/gas/testsuite/gas/v850/misc.s b/gas/testsuite/gas/v850/misc.s new file mode 100644 index 0000000..52c4e4b --- /dev/null +++ b/gas/testsuite/gas/v850/misc.s @@ -0,0 +1,13 @@ + + .text + .global misc +misc: + di + ei + halt + nop + reti + trap 0 + trap 31 + ldsr r7,psw + stsr psw,r7 diff --git a/gas/testsuite/gas/v850/move.s b/gas/testsuite/gas/v850/move.s new file mode 100644 index 0000000..cba6fae --- /dev/null +++ b/gas/testsuite/gas/v850/move.s @@ -0,0 +1,8 @@ + + .text + .global move +move: + mov r5,r6 + mov 5,r6 + movea 7,r5,r6 + movhi 7,r5,r6 diff --git a/gas/testsuite/gas/v850/range.s b/gas/testsuite/gas/v850/range.s new file mode 100644 index 0000000..42accf4 --- /dev/null +++ b/gas/testsuite/gas/v850/range.s @@ -0,0 +1,2 @@ + .text + ld.b 0xff62[r0],r0 diff --git a/gas/testsuite/gas/v850/reloc.s b/gas/testsuite/gas/v850/reloc.s new file mode 100644 index 0000000..6738d26 --- /dev/null +++ b/gas/testsuite/gas/v850/reloc.s @@ -0,0 +1,7 @@ + .text + movea lo(foo),r0,r1 + movhi hi(foo),r1,r1 + movhi hi0(foo),r1,r1 + movea zdaoff(_foo),r0,r1 + movhi tdaoff(_foo),ep,r1 + movhi sdaoff(_foo),gp,r1 diff --git a/gas/testsuite/gas/vax/quad.exp b/gas/testsuite/gas/vax/quad.exp new file mode 100644 index 0000000..34770c5 --- /dev/null +++ b/gas/testsuite/gas/vax/quad.exp @@ -0,0 +1,23 @@ +proc do_quad {} { + set testname "quad.s: quadword immediate values" + set x1 0 + set x2 0 + set x3 0 + gas_start "quad.s" "-al" + while 1 { + expect { + -re "^ +2\[ \t\]+0000+ 7D8F7856\[ \t\]+movq\[^\n\]*\n" { set x1 1 } + -re "^ +2\[ \t\]+3412DDCC\[^\n\]*\n" { set x2 1 } + -re "^ +2\[ \t\]+BBAA5001\[ \t\]*\r\n" { set x3 1 } + -re "\[^\n\]*\n" { } + timeout { perror "timeout\n"; break } + eof { break } + } + } + gas_finish + if [all_ones $x1 $x2 $x3] then { pass $testname } else { fail $testname } +} + +if [istarget vax-*-*] then { + do_quad +} diff --git a/gas/testsuite/gas/vax/quad.s b/gas/testsuite/gas/vax/quad.s new file mode 100644 index 0000000..78ad4ad --- /dev/null +++ b/gas/testsuite/gas/vax/quad.s @@ -0,0 +1,2 @@ + .text + movq $0xaabbccdd12345678,r0 diff --git a/gas/testsuite/gas/vtable/entry0.d b/gas/testsuite/gas/vtable/entry0.d new file mode 100644 index 0000000..ee0bb99 --- /dev/null +++ b/gas/testsuite/gas/vtable/entry0.d @@ -0,0 +1,10 @@ +#objdump: -r +#name: vtable entry0 + +.*: +file format .* + +RELOCATION RECORDS FOR \[.text\]: +OFFSET +TYPE +VALUE +0+0000010 R_.*_GNU_VTENTRY vtbl_a + + diff --git a/gas/testsuite/gas/vtable/entry0.s b/gas/testsuite/gas/vtable/entry0.s new file mode 100644 index 0000000..36f89e3 --- /dev/null +++ b/gas/testsuite/gas/vtable/entry0.s @@ -0,0 +1,2 @@ +.text +.vtable_entry vtbl_a, 16 diff --git a/gas/testsuite/gas/vtable/entry1.d b/gas/testsuite/gas/vtable/entry1.d new file mode 100644 index 0000000..7fa6e4b --- /dev/null +++ b/gas/testsuite/gas/vtable/entry1.d @@ -0,0 +1,10 @@ +#objdump: -r +#name: vtable entry1 + +.*: +file format .* + +RELOCATION RECORDS FOR \[.text\]: +OFFSET +TYPE +VALUE +0+0000000 R_.*_GNU_VTENTRY vtbl_a.* + + diff --git a/gas/testsuite/gas/vtable/entry1.s b/gas/testsuite/gas/vtable/entry1.s new file mode 100644 index 0000000..36f89e3 --- /dev/null +++ b/gas/testsuite/gas/vtable/entry1.s @@ -0,0 +1,2 @@ +.text +.vtable_entry vtbl_a, 16 diff --git a/gas/testsuite/gas/vtable/inherit0.d b/gas/testsuite/gas/vtable/inherit0.d new file mode 100644 index 0000000..62795b1 --- /dev/null +++ b/gas/testsuite/gas/vtable/inherit0.d @@ -0,0 +1,10 @@ +#objdump: -r +#name: vtable inherit0 + +.*: +file format .* + +RELOCATION RECORDS FOR \[.data\]: +OFFSET +TYPE +VALUE +0+0000000 R_.*_GNU_VTINHERIT \*ABS\* +0+0000010 R_.*_GNU_VTINHERIT vtbl_a + diff --git a/gas/testsuite/gas/vtable/inherit0.s b/gas/testsuite/gas/vtable/inherit0.s new file mode 100644 index 0000000..d438df6 --- /dev/null +++ b/gas/testsuite/gas/vtable/inherit0.s @@ -0,0 +1,13 @@ +.data + +.type vtbl_a,object +vtbl_a: + .space 16 +.size vtbl_a,16 +.vtable_inherit vtbl_a, 0 + +.type vtbl_b,object +vtbl_b: + .space 16 +.size vtbl_b,16 +.vtable_inherit vtbl_b, vtbl_a diff --git a/gas/testsuite/gas/vtable/inherit1.l b/gas/testsuite/gas/vtable/inherit1.l new file mode 100644 index 0000000..bdd6358 --- /dev/null +++ b/gas/testsuite/gas/vtable/inherit1.l @@ -0,0 +1,6 @@ +.*: Assembler messages: +.*:1: Error: expected `vtbl_a' to have already been set for .vtable_inherit +.*GAS.* + + + +1.*vtable_inherit vtbl_a, 0 diff --git a/gas/testsuite/gas/vtable/inherit1.s b/gas/testsuite/gas/vtable/inherit1.s new file mode 100644 index 0000000..7dd1d28 --- /dev/null +++ b/gas/testsuite/gas/vtable/inherit1.s @@ -0,0 +1 @@ +.vtable_inherit vtbl_a, 0 diff --git a/gas/testsuite/gas/vtable/vtable.exp b/gas/testsuite/gas/vtable/vtable.exp new file mode 100644 index 0000000..5d14451 --- /dev/null +++ b/gas/testsuite/gas/vtable/vtable.exp @@ -0,0 +1,39 @@ +# +# vtable tests +# +proc run_list_test { name opts } { + global srcdir subdir + set testname "vtable $name" + set file $srcdir/$subdir/$name + gas_run ${name}.s $opts ">&dump.out" + if { [regexp_diff "dump.out" "${file}.l"] } then { + fail $testname + verbose "output is [file_contents "dump.out"]" 2 + return + } + pass $testname +} + +# Vtable bits are only supported by ELF targets. +if {[istarget "*-*-elf*"] || [istarget "*-*-linux*"]} then { + + + # not supported by D30V + if {[istarget "d30v-*-*"]} { + return + } + + run_dump_test "inherit0" + run_list_test "inherit1" "-al" + + # The vtable entry results are different on Rel and Rela targets. + if {[istarget "i*86-*-*"] || [istarget "mips*-*-*"]} then { + + run_dump_test "entry0" + + } else { + + run_dump_test "entry1" + + } +} diff --git a/gas/testsuite/gasp/INC1.H b/gas/testsuite/gasp/INC1.H new file mode 100644 index 0000000..0d37323 --- /dev/null +++ b/gas/testsuite/gasp/INC1.H @@ -0,0 +1,3 @@ +FILE 1 FIRST LINE + .INCLUDE "INC2.H" +FILE 1 LAST LINE diff --git a/gas/testsuite/gasp/INC2.H b/gas/testsuite/gasp/INC2.H new file mode 100644 index 0000000..083c3dc --- /dev/null +++ b/gas/testsuite/gasp/INC2.H @@ -0,0 +1,2 @@ + FILE 2 FIRST LINE + FILE 2 LAST LINE diff --git a/gas/testsuite/gasp/assign.asm b/gas/testsuite/gasp/assign.asm new file mode 100644 index 0000000..7f66718 --- /dev/null +++ b/gas/testsuite/gasp/assign.asm @@ -0,0 +1,13 @@ + +foo: .ASSIGNC "hello" +BAR: .ASSIGNA 12+34 + + \&foo'foo + \&foo\&foo\&foo + \&foo \&foo \&foo + \&BAR\&bar\&BAR + + + + + .END diff --git a/gas/testsuite/gasp/assign.err b/gas/testsuite/gasp/assign.err new file mode 100644 index 0000000..fe3733f --- /dev/null +++ b/gas/testsuite/gasp/assign.err @@ -0,0 +1 @@ +assign.asm:8 Can't find preprocessor variable bar. diff --git a/gas/testsuite/gasp/assign.out b/gas/testsuite/gasp/assign.out new file mode 100644 index 0000000..85509ae --- /dev/null +++ b/gas/testsuite/gasp/assign.out @@ -0,0 +1,22 @@ +! + +!foo: .ASSIGNC "hello" +!BAR: .ASSIGNA 12+34 +! + +! \&foo'foo + hellofoo +! \&foo\&foo\&foo + hellohellohello +! \&foo \&foo \&foo + hello hello hello +! \&BAR\&bar\&BAR + 4646 +! + +! + +! + +! +! .END diff --git a/gas/testsuite/gasp/condass.asm b/gas/testsuite/gasp/condass.asm new file mode 100644 index 0000000..2bd9f07 --- /dev/null +++ b/gas/testsuite/gasp/condass.asm @@ -0,0 +1,129 @@ + .AIF 1 EQ 1 + OK + .AELSE + BAD + .AENDI + .AIF 1 EQ 2 + BAD + .AELSE + OK + .AENDI + .AIF 1 EQ 2 + BAD + .AELSE + OK + .AIF 1 EQ 2 + BAD + .AELSE + OK + .AENDI + .AENDI + .AIF 1 LT 2 + OK + .AENDI + .AIF 1 EQ 2 + BAD + .AENDI + .AIF 1 NE 2 + OK + .AENDI + .AIF 1 LE 2 + OK + .AENDI + .AIF 1 GT 2 + BAD + .AENDI + .AIF 3 GE 2 + OK + .AENDI + .AIF 3 LT 2 + BAD + .AENDI + .AIF 3 EQ 2 + BAD + .AENDI + .AIF 3 NE 2 + OK + .AENDI + .AIF 3 LE 2 + BAD + .AENDI + .AIF 3 GT 2 + OK + .AENDI + .AIF 3 GE 2 + OK + .AENDI + .AIF "FOO" EQ "BAR" + BAD + .AENDI + .AIF "FOO" EQ "FOO" + OK + .AENDI + .AIF "FOO" NE "BAR" + OK + .AENDI + .AIF "FOO" EQ "FOO" + OK + .AENDI + .AIF 1 EQ 1 + .AIF 1 EQ 1 + OK + .AELSE + BAD + .AENDI + .AIF 1 EQ 0 + BAD + .AELSE + OK + .AENDI + OK + .AELSE + BAD + .AENDI + .AIF 1 EQ 0 + BAD + .AELSE + OK + .AENDI + .AIF 1 EQ 1 + OK + .AELSE + BAD + .AENDI + .AIF 1 EQ 0 + BAD + .AELSE + .AIF 1 EQ 1 + OK + .AELSE + BAD + .AENDI + .AIF 1 EQ 0 + BAD + .AELSE + OK + .AENDI + OK + .AENDI + .AIF 1 EQ 1 + OK + .AIF 1 EQ 1 + OK + .AELSE + BAD + .AENDI + .AIF 1 EQ 0 + BAD + .AELSE + OK + .AENDI + .AELSE + BAD + .AENDI + .AIF 1 EQ 0 + BAD + .AELSE + OK + .AENDI + .END diff --git a/gas/testsuite/gasp/condass.err b/gas/testsuite/gasp/condass.err new file mode 100644 index 0000000..e69de29 --- /dev/null +++ b/gas/testsuite/gasp/condass.err diff --git a/gas/testsuite/gasp/condass.out b/gas/testsuite/gasp/condass.out new file mode 100644 index 0000000..115cef5 --- /dev/null +++ b/gas/testsuite/gasp/condass.out @@ -0,0 +1,155 @@ +! .AIF 1 EQ 1 +! OK + OK +! .AELSE +! BAD +! .AENDI +! .AIF 1 EQ 2 +! BAD +! .AELSE +! OK + OK +! .AENDI +! .AIF 1 EQ 2 +! BAD +! .AELSE +! OK + OK +! .AIF 1 EQ 2 +! BAD +! .AELSE +! OK + OK +! .AENDI +! .AENDI +! .AIF 1 LT 2 +! OK + OK +! .AENDI +! .AIF 1 EQ 2 +! BAD +! .AENDI +! .AIF 1 NE 2 +! OK + OK +! .AENDI +! .AIF 1 LE 2 +! OK + OK +! .AENDI +! .AIF 1 GT 2 +! BAD +! .AENDI +! .AIF 3 GE 2 +! OK + OK +! .AENDI +! .AIF 3 LT 2 +! BAD +! .AENDI +! .AIF 3 EQ 2 +! BAD +! .AENDI +! .AIF 3 NE 2 +! OK + OK +! .AENDI +! .AIF 3 LE 2 +! BAD +! .AENDI +! .AIF 3 GT 2 +! OK + OK +! .AENDI +! .AIF 3 GE 2 +! OK + OK +! .AENDI +! .AIF "FOO" EQ "BAR" +! BAD +! .AENDI +! .AIF "FOO" EQ "FOO" +! OK + OK +! .AENDI +! .AIF "FOO" NE "BAR" +! OK + OK +! .AENDI +! .AIF "FOO" EQ "FOO" +! OK + OK +! .AENDI +! .AIF 1 EQ 1 +! .AIF 1 EQ 1 +! OK + OK +! .AELSE +! BAD +! .AENDI +! .AIF 1 EQ 0 +! BAD +! .AELSE +! OK + OK +! .AENDI +! OK + OK +! .AELSE +! BAD +! .AENDI +! .AIF 1 EQ 0 +! BAD +! .AELSE +! OK + OK +! .AENDI +! .AIF 1 EQ 1 +! OK + OK +! .AELSE +! BAD +! .AENDI +! .AIF 1 EQ 0 +! BAD +! .AELSE +! .AIF 1 EQ 1 +! OK + OK +! .AELSE +! BAD +! .AENDI +! .AIF 1 EQ 0 +! BAD +! .AELSE +! OK + OK +! .AENDI +! OK + OK +! .AENDI +! .AIF 1 EQ 1 +! OK + OK +! .AIF 1 EQ 1 +! OK + OK +! .AELSE +! BAD +! .AENDI +! .AIF 1 EQ 0 +! BAD +! .AELSE +! OK + OK +! .AENDI +! .AELSE +! BAD +! .AENDI +! .AIF 1 EQ 0 +! BAD +! .AELSE +! OK + OK +! .AENDI +! .END diff --git a/gas/testsuite/gasp/crash.asm b/gas/testsuite/gasp/crash.asm new file mode 100644 index 0000000..a710cc5 --- /dev/null +++ b/gas/testsuite/gasp/crash.asm @@ -0,0 +1,22 @@ + + Stuff to try and crash it + +foo: .MACRO + HI +bar: .MACRO + THERE + bar + .ENDM + + + .ENDM + foo + foo + foo + foo + foo + bar + + + + diff --git a/gas/testsuite/gasp/crash.err b/gas/testsuite/gasp/crash.err new file mode 100644 index 0000000..1008802 --- /dev/null +++ b/gas/testsuite/gasp/crash.err @@ -0,0 +1 @@ +crash.asm:18 Unreasonable expansion (-u turns off check). diff --git a/gas/testsuite/gasp/crash.out b/gas/testsuite/gasp/crash.out new file mode 100644 index 0000000..6b948a3 --- /dev/null +++ b/gas/testsuite/gasp/crash.out @@ -0,0 +1,3059 @@ +! + +! Stuff to try and crash it + Stuff to try and crash it +! + +!foo: .MACRO +! HI +!bar: .MACRO +! THERE +! bar +! .ENDM +! +! +! .ENDM +! foo +! HI + HI +!bar: .MACRO +! THERE +! bar +! .ENDM +! + +! + +! foo +! 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THERE + THERE +! bar diff --git a/gas/testsuite/gasp/crash1.asm b/gas/testsuite/gasp/crash1.asm new file mode 100644 index 0000000..d2b6b30 --- /dev/null +++ b/gas/testsuite/gasp/crash1.asm @@ -0,0 +1,13 @@ + + + .MACRO foo a b c=a + \a \b \c \d + .ENDM + + foo 1 2 + foo 1 2 3 4 + foo 1 + foo + + + .END diff --git a/gas/testsuite/gasp/crash1.err b/gas/testsuite/gasp/crash1.err new file mode 100644 index 0000000..e69de29 --- /dev/null +++ b/gas/testsuite/gasp/crash1.err diff --git a/gas/testsuite/gasp/crash1.out b/gas/testsuite/gasp/crash1.out new file mode 100644 index 0000000..725d078 --- /dev/null +++ b/gas/testsuite/gasp/crash1.out @@ -0,0 +1,24 @@ +! + +! + +! .MACRO foo a b c=a +! \a \b \c \d +! .ENDM +! + +! foo 1 2 +! 1 2 a \d + 1 2 a \d +! foo 1 2 3 4 +! foo 1 +! 1 a \d + 1 a \d +! foo +! a \d + a \d +! + +! + +! .END diff --git a/gas/testsuite/gasp/crash2.asm b/gas/testsuite/gasp/crash2.asm new file mode 100644 index 0000000..288a003 --- /dev/null +++ b/gas/testsuite/gasp/crash2.asm @@ -0,0 +1,41 @@ + +foo: .ASSIGNA 1 + \&foo+1 + \&foo+1 +foo: .ASSIGNC "foo" + \&foo+1 + \&foo+1 + +foo: .ASSIGNA 1 + \&foo+1 + \&foo+1 +foo: .ASSIGNC "foo" + \&foo+1 + \&foo+1 + +foo: .ASSIGNA 1 + \&foo+1 + \&foo+1 +foo: .ASSIGNC "foo" + \&foo+1 + \&foo+1 + +foo: .ASSIGNA 1 + \&foo+1 + \&foo+1 +foo: .ASSIGNC "foo" + \&foo+1 + \&foo+1 + +foo: .ASSIGNA 1 + \&foo+1 + \&foo+1 +foo: .ASSIGNC "foo" + \&foo+1 + \&foo+1 + foo + foo foo + foo foo + foo + .END + diff --git a/gas/testsuite/gasp/crash2.err b/gas/testsuite/gasp/crash2.err new file mode 100644 index 0000000..e69de29 --- /dev/null +++ b/gas/testsuite/gasp/crash2.err diff --git a/gas/testsuite/gasp/crash2.out b/gas/testsuite/gasp/crash2.out new file mode 100644 index 0000000..0d1a2f7 --- /dev/null +++ b/gas/testsuite/gasp/crash2.out @@ -0,0 +1,69 @@ +! + +!foo: .ASSIGNA 1 +! \&foo+1 + 1+1 +! \&foo+1 + 1+1 +!foo: .ASSIGNC "foo" +! \&foo+1 + foo+1 +! \&foo+1 + foo+1 +! + +!foo: .ASSIGNA 1 +! \&foo+1 + 1+1 +! \&foo+1 + 1+1 +!foo: .ASSIGNC "foo" +! \&foo+1 + foo+1 +! \&foo+1 + foo+1 +! + +!foo: .ASSIGNA 1 +! \&foo+1 + 1+1 +! \&foo+1 + 1+1 +!foo: .ASSIGNC "foo" +! \&foo+1 + foo+1 +! \&foo+1 + foo+1 +! + +!foo: .ASSIGNA 1 +! \&foo+1 + 1+1 +! \&foo+1 + 1+1 +!foo: .ASSIGNC "foo" +! \&foo+1 + foo+1 +! \&foo+1 + foo+1 +! + +!foo: .ASSIGNA 1 +! \&foo+1 + 1+1 +! \&foo+1 + 1+1 +!foo: .ASSIGNC "foo" +! \&foo+1 + foo+1 +! \&foo+1 + foo+1 +! foo + foo +! foo foo + foo foo +! foo foo + foo foo +! foo + foo +! .END diff --git a/gas/testsuite/gasp/data.asm b/gas/testsuite/gasp/data.asm new file mode 100644 index 0000000..ba6b0a0 --- /dev/null +++ b/gas/testsuite/gasp/data.asm @@ -0,0 +1,23 @@ + +foo .DATA 1,2,3 +bar .DATA 1,2,3,4,5 ,6 + .DATA.B 12345,12,2 + .DATA.W 9,2,12,3,13+41,foo+9 + .DATA.L 2~99 + + + + .DATAB 1,2,3 + .DATAB 1,2,3 + + + + + .DATAB 1,9+32 + + .DATAB.L 1,H'11111111 + .DATAB.W 2,H'2222 + .DATAB.B 3,H'333 + + + .END diff --git a/gas/testsuite/gasp/data.err b/gas/testsuite/gasp/data.err new file mode 100644 index 0000000..e69de29 --- /dev/null +++ b/gas/testsuite/gasp/data.err diff --git a/gas/testsuite/gasp/data.out b/gas/testsuite/gasp/data.out new file mode 100644 index 0000000..e96e1e5 --- /dev/null +++ b/gas/testsuite/gasp/data.out @@ -0,0 +1,45 @@ +! + +!foo .DATA 1,2,3 +foo: .long 1,2,3 +!bar .DATA 1,2,3,4,5 ,6 +bar: .long 1,2,3,4,5,6 +! .DATA.B 12345,12,2 + .byte 12345,12,2 +! .DATA.W 9,2,12,3,13+41,foo+9 + .short 9,2,12,3,54,foo+9 +! .DATA.L 2~99 + .long 97 +! + +! + +! + +! .DATAB 1,2,3 + .fill 1,4,2 +! .DATAB 1,2,3 + .fill 1,4,2 +! + +! + +! + +! + +! .DATAB 1,9+32 + .fill 1,4,41 +! + +! .DATAB.L 1,H'11111111 + .fill 1,4,286331153 +! .DATAB.W 2,H'2222 + .fill 2,2,8738 +! .DATAB.B 3,H'333 + .fill 3,1,819 +! + +! + +! .END diff --git a/gas/testsuite/gasp/exp.asm b/gas/testsuite/gasp/exp.asm new file mode 100644 index 0000000..041608a --- /dev/null +++ b/gas/testsuite/gasp/exp.asm @@ -0,0 +1,80 @@ + +; test all ops + +a1 .EQU 4+10 +a2 .EQU 4-10 +a3 .EQU 4&10 +a4 .EQU 4|2 +a5 .EQU 4~2 +a6 .EQU 4*10 +a7 .EQU 40/10 +a8 .EQU +7 +a9 .EQU -7 +a10 .EQU ~7 + + + a1 a2 a3 a4 a5 a6 a7 a8 a9 a10 + +; test the priorities + +b1 .EQU 1|2~3&4+5-8*7/2 +b2 .EQU (1|2~(3&(4+5-(8*(7/2))))) +b3 .EQU 10*2/3*4 +b4 .EQU (((10*2)/3)*4) +b5 .EQU 10+2-3+4 +b6 .EQU (((10+2)-3)+4) + + b1 b2 b3 b4 + +; test association + +c1 .EQU -~3 +c2 .EQU ~-3 +c3 .EQU -(~3) +c4 .EQU ~(-3) + + c1 c2 c3 c4 + +; test rules for symbols + +ok1 .EQU FOO +ok2 .EQU FOO+10 +ok3 .EQU 10+FOO +ok4 .EQU FOO-10 + + ok1 + ok2 + ok3 + ok4 + +ok5 .EQU FOO+3+4+5+6 +ok6 .EQU FOO-BAR + + ok5 + ok6 + +bad1 .EQU FOO+FOO +bad2 .EQU FOO*2 +bad3 .EQU FOO/2 +bad4 .EQU FOO|2 +bad5 .EQU FOO&2 +bad6 .EQU FOO~2 +bad7 .EQU FOO*2 + +; test spacing + +space1 .EQU 1 + 2 +3+FOO + 3 +space2 + +; from the SH manual + + .DATA.L 1+(2-(3+(4-5))),1 + + .DATA.L -H'fffffff1+H'000000f0*H'00000010|H'000000f0&H'0000ffff,H'00000fff + + .DATA.L -~-~H'0000000f,H'00 + + + + + .END diff --git a/gas/testsuite/gasp/exp.err b/gas/testsuite/gasp/exp.err new file mode 100644 index 0000000..f41fd52 --- /dev/null +++ b/gas/testsuite/gasp/exp.err @@ -0,0 +1,7 @@ +exp.asm:56 can't add two relocatable expressions +exp.asm:57 the * operator cannot take non-absolute arguments. +exp.asm:58 the / operator cannot take non-absolute arguments. +exp.asm:59 the | operator cannot take non-absolute arguments. +exp.asm:60 the & operator cannot take non-absolute arguments. +exp.asm:61 the ~ operator cannot take non-absolute arguments. +exp.asm:62 the * operator cannot take non-absolute arguments. diff --git a/gas/testsuite/gasp/exp.out b/gas/testsuite/gasp/exp.out new file mode 100644 index 0000000..cecb9a8 --- /dev/null +++ b/gas/testsuite/gasp/exp.out @@ -0,0 +1,124 @@ +! + +!; test all ops + ; test all ops +! + +!a1 .EQU 4+10 +!a2 .EQU 4-10 +!a3 .EQU 4&10 +!a4 .EQU 4|2 +!a5 .EQU 4~2 +!a6 .EQU 4*10 +!a7 .EQU 40/10 +!a8 .EQU +7 +!a9 .EQU -7 +!a10 .EQU ~7 +! + +! + +! a1 a2 a3 a4 a5 a6 a7 a8 a9 a10 + 14 -6 0 6 6 40 4 7 -7 -8 +! + +!; test the priorities + ; test the priorities +! + +!b1 .EQU 1|2~3&4+5-8*7/2 +!b2 .EQU (1|2~(3&(4+5-(8*(7/2))))) +!b3 .EQU 10*2/3*4 +!b4 .EQU (((10*2)/3)*4) +!b5 .EQU 10+2-3+4 +!b6 .EQU (((10+2)-3)+4) +! + +! b1 b2 b3 b4 + 2 2 24 24 +! + +!; test association + ; test association +! + +!c1 .EQU -~3 +!c2 .EQU ~-3 +!c3 .EQU -(~3) +!c4 .EQU ~(-3) +! + +! c1 c2 c3 c4 + 4 2 4 2 +! + +!; test rules for symbols + ; test rules for symbols +! + +!ok1 .EQU FOO +!ok2 .EQU FOO+10 +!ok3 .EQU 10+FOO +!ok4 .EQU FOO-10 +! + +! ok1 + FOO +! ok2 + FOO+10 +! ok3 + FOO+10 +! ok4 + FOO+-10 +! + +!ok5 .EQU FOO+3+4+5+6 +!ok6 .EQU FOO-BAR +! + +! ok5 + FOO+18 +! ok6 + FOO-FOO +! + +!bad1 .EQU FOO+FOO +!bad2 .EQU FOO*2 +!bad3 .EQU FOO/2 +!bad4 .EQU FOO|2 +!bad5 .EQU FOO&2 +!bad6 .EQU FOO~2 +!bad7 .EQU FOO*2 +! + +!; test spacing + ; test spacing +! + +!space1 .EQU 1 + 2 +3+FOO + 3 +!space2 +space2: +! + +!; from the SH manual + ; from the SH manual +! + +! .DATA.L 1+(2-(3+(4-5))),1 + .long 1,1 +! + +! .DATA.L -H'fffffff1+H'000000f0*H'00000010|H'000000f0&H'0000ffff,H'00000fff + .long 4095,4095 +! + +! .DATA.L -~-~H'0000000f,H'00 + .long 17,0 +! + +! + +! +! + +! .END diff --git a/gas/testsuite/gasp/gasp.exp b/gas/testsuite/gasp/gasp.exp new file mode 100644 index 0000000..2a72a6d --- /dev/null +++ b/gas/testsuite/gasp/gasp.exp @@ -0,0 +1,40 @@ +# Test gasp. + +proc gasp_test { filename testname opt } { + global GASP + global srcdir + global host_triplet + + send_log "$srcdir/lib/run $GASP -I$srcdir/gasp -s $opt $filename.asm -o gasp.out\n" + catch "exec $srcdir/lib/run $GASP -I$srcdir/gasp -s $opt $filename.asm -o gasp.out" errs + catch "exec diff gasp.out $filename.out" diffs + set diffs [prune_warnings $diffs] + if ![string match "" $diffs] { + send_log "$diffs\n" + verbose $diffs + fail $testname + return 0 + } else { + pass $testname + } + +} + +foreach src [ lsort [ glob $srcdir/gasp/*.asm ] ] { + regsub -all ".asm" $src "" t + regsub "^.*/(\[^/\]*)$" $t "gasp \\1" testname + gasp_test $t $testname "" +} + +foreach src [ lsort [ glob $srcdir/gasp/mri/*.asm ] ] { + regsub -all ".asm" $src "" t + regsub "^.*/(\[^/\]*)$" $t "gasp MRI \\1" testname + gasp_test $t $testname "-M" +} + +# FIXME: this is here cause of a bug in DejaGnu 1.1.1. When it is no longer +# in use, then this can be removed. +if [info exists errorInfo] then { + unset errorInfo +} + diff --git a/gas/testsuite/gasp/include.asm b/gas/testsuite/gasp/include.asm new file mode 100644 index 0000000..69ed1dd --- /dev/null +++ b/gas/testsuite/gasp/include.asm @@ -0,0 +1,4 @@ + HI + .INCLUDE "INC1.H" + THERE + .END diff --git a/gas/testsuite/gasp/include.err b/gas/testsuite/gasp/include.err new file mode 100644 index 0000000..e69de29 --- /dev/null +++ b/gas/testsuite/gasp/include.err diff --git a/gas/testsuite/gasp/include.out b/gas/testsuite/gasp/include.out new file mode 100644 index 0000000..d77a0df --- /dev/null +++ b/gas/testsuite/gasp/include.out @@ -0,0 +1,15 @@ +! HI + HI +! .INCLUDE "INC1.H" +!FILE 1 FIRST LINE +FILE: 1 FIRST LINE +! .INCLUDE "INC2.H" +! FILE 2 FIRST LINE + FILE 2 FIRST LINE +! FILE 2 LAST LINE + FILE 2 LAST LINE +!FILE 1 LAST LINE +FILE: 1 LAST LINE +! THERE + THERE +! .END diff --git a/gas/testsuite/gasp/listing.asm b/gas/testsuite/gasp/listing.asm new file mode 100644 index 0000000..2f14cfc --- /dev/null +++ b/gas/testsuite/gasp/listing.asm @@ -0,0 +1,15 @@ + + + .HEADING " ""QUOTE"" " + .PAGE + .PRINT LIST + foo + .PRINT NOLIST + foo + + + .FORM LIN=12 + .FORM COL=90 + .FORM LIN=123 COL=23 + + .END diff --git a/gas/testsuite/gasp/listing.err b/gas/testsuite/gasp/listing.err new file mode 100644 index 0000000..e69de29 --- /dev/null +++ b/gas/testsuite/gasp/listing.err diff --git a/gas/testsuite/gasp/listing.out b/gas/testsuite/gasp/listing.out new file mode 100644 index 0000000..585bda2 --- /dev/null +++ b/gas/testsuite/gasp/listing.out @@ -0,0 +1,28 @@ +! + +! + +! .HEADING " ""QUOTE"" " + .title " "QUOTE" " +! .PAGE + .eject +! .PRINT LIST + .list +! foo + foo +! .PRINT NOLIST + .nolist +! foo + foo +! + +! + +! .FORM LIN=12 + .psize 12,132 +! .FORM COL=90 + .psize 60,90 +! .FORM LIN=123 COL=23 + .psize 123,23 +! +! .END diff --git a/gas/testsuite/gasp/macro.asm b/gas/testsuite/gasp/macro.asm new file mode 100644 index 0000000..dfb16bf --- /dev/null +++ b/gas/testsuite/gasp/macro.asm @@ -0,0 +1,102 @@ + .MACRO SUM FROM=0, TO=9 + ; \FROM \TO + MOV R\FROM,R10 +COUNT .ASSIGNA \FROM+1 + .AWHILE \&COUNT LE \TO + MOV R\&COUNT,R10 +COUNT .ASSIGNA \&COUNT+1 + .AENDW + .ENDM + + SUM 0,5 + SUM TO=5 + SUM FROM=2, TO=5 + + +; hi this is a comment + .MACRO BACK_SLASH_SET + \(MOV #"\",R0) + .ENDM + BACK_SLASH_SET + .MACRO COMM + bar ; this comment will get copied out + foo \; this one will get dropped + .ENDM + COMM + BACK_SLASH_SET + .MACRO PLUS2 + ADD #1,R\&V1 + .SDATA "\&V'1" + .ENDM +V .ASSIGNC "R" +V1 .ASSIGNA 1 + PLUS2 + .MACRO PLUS1 P,P1 + ADD #1,\P1 + .SDATA "\P'1" + .ENDM + PLUS1 R,R1 + + .MACRO SUM P1 + MOV R0,R10 + ADD R1,R10 + ADD R2,R10 + \P1 + ADD R3,R10 + .ENDM + + SUM .EXITM + + .MACRO foo bar=a default=b + \bar + \default + bar + default + .ENDM + foo default=dog bar=cat + foo X Y + foo + foo bar=cat default=dog + + + .MACRO foo bar + HI + HI \bar + HI + .ENDM + + foo 1 + foo 123 + foo 1 2 3 4 + foo + + + .MACRO PUSH Rn + MOV.L \Rn,@-r15 + .ENDM + PUSH R0 + PUSH R1 + + + .MACRO RES_STR STR, Rn + MOV.L #str\@,\Rn + BRA end_str\@ + NOP +str\@ .SDATA "\STR" + .ALIGN 2 +end_str\@ + .ENDM + + RES_STR "ONE",R0 + RES_STR "TWO",R1 + RES_STR "THREE",R2 + + + + RES_STR STR=donkey Rn=R1 + RES_STR donkey,R1 + RES_STR donkey Rn=R1 + .END + + + diff --git a/gas/testsuite/gasp/macro.err b/gas/testsuite/gasp/macro.err new file mode 100644 index 0000000..e69de29 --- /dev/null +++ b/gas/testsuite/gasp/macro.err diff --git a/gas/testsuite/gasp/macro.out b/gas/testsuite/gasp/macro.out new file mode 100644 index 0000000..0740732 --- /dev/null +++ b/gas/testsuite/gasp/macro.out @@ -0,0 +1,382 @@ +! .MACRO SUM FROM=0, TO=9 +! ; \FROM \TO +! MOV R\FROM,R10 +!COUNT .ASSIGNA \FROM+1 +! .AWHILE \&COUNT LE \TO +! MOV R\&COUNT,R10 +!COUNT .ASSIGNA \&COUNT+1 +! .AENDW +! .ENDM +! + +! SUM 0,5 +! ; 0 5 + ; 0 5 +! MOV R0,R10 + MOV R0,R10 +!COUNT .ASSIGNA 0+1 +! .AWHILE \&COUNT LE 5 +! MOV R\&COUNT,R10 +!COUNT .ASSIGNA \&COUNT+1 +! .AENDW +! MOV R\&COUNT,R10 + MOV R1,R10 +!COUNT .ASSIGNA \&COUNT+1 +! .AWHILE \&COUNT LE 5 +! MOV R\&COUNT,R10 +!COUNT .ASSIGNA \&COUNT+1 +! .AENDW +! MOV R\&COUNT,R10 + MOV R2,R10 +!COUNT .ASSIGNA \&COUNT+1 +! .AWHILE \&COUNT LE 5 +! MOV R\&COUNT,R10 +!COUNT .ASSIGNA \&COUNT+1 +! .AENDW +! MOV R\&COUNT,R10 + MOV R3,R10 +!COUNT .ASSIGNA \&COUNT+1 +! .AWHILE \&COUNT LE 5 +! MOV R\&COUNT,R10 +!COUNT .ASSIGNA \&COUNT+1 +! .AENDW +! MOV R\&COUNT,R10 + MOV R4,R10 +!COUNT .ASSIGNA \&COUNT+1 +! .AWHILE \&COUNT LE 5 +! MOV R\&COUNT,R10 +!COUNT .ASSIGNA \&COUNT+1 +! .AENDW +! MOV R\&COUNT,R10 + MOV R5,R10 +!COUNT .ASSIGNA \&COUNT+1 +! .AWHILE \&COUNT LE 5 +! MOV R\&COUNT,R10 +!COUNT .ASSIGNA \&COUNT+1 +! .AENDW +! SUM TO=5 +! ; 0 5 + ; 0 5 +! MOV R0,R10 + MOV R0,R10 +!COUNT .ASSIGNA 0+1 +! .AWHILE \&COUNT LE 5 +! MOV R\&COUNT,R10 +!COUNT .ASSIGNA \&COUNT+1 +! .AENDW +! MOV R\&COUNT,R10 + MOV R1,R10 +!COUNT .ASSIGNA \&COUNT+1 +! .AWHILE \&COUNT LE 5 +! MOV R\&COUNT,R10 +!COUNT .ASSIGNA \&COUNT+1 +! .AENDW +! MOV R\&COUNT,R10 + MOV R2,R10 +!COUNT .ASSIGNA \&COUNT+1 +! .AWHILE \&COUNT LE 5 +! MOV R\&COUNT,R10 +!COUNT .ASSIGNA \&COUNT+1 +! .AENDW +! MOV R\&COUNT,R10 + MOV R3,R10 +!COUNT .ASSIGNA \&COUNT+1 +! .AWHILE \&COUNT LE 5 +! MOV R\&COUNT,R10 +!COUNT .ASSIGNA \&COUNT+1 +! .AENDW +! MOV R\&COUNT,R10 + MOV R4,R10 +!COUNT .ASSIGNA \&COUNT+1 +! .AWHILE \&COUNT LE 5 +! MOV R\&COUNT,R10 +!COUNT .ASSIGNA \&COUNT+1 +! .AENDW +! MOV R\&COUNT,R10 + MOV R5,R10 +!COUNT .ASSIGNA \&COUNT+1 +! .AWHILE \&COUNT LE 5 +! MOV R\&COUNT,R10 +!COUNT .ASSIGNA \&COUNT+1 +! .AENDW +! SUM FROM=2, TO=5 +! ; 2 5 + ; 2 5 +! MOV R2,R10 + MOV R2,R10 +!COUNT .ASSIGNA 2+1 +! .AWHILE \&COUNT LE 5 +! MOV R\&COUNT,R10 +!COUNT .ASSIGNA \&COUNT+1 +! .AENDW +! MOV R\&COUNT,R10 + MOV R3,R10 +!COUNT .ASSIGNA \&COUNT+1 +! .AWHILE \&COUNT LE 5 +! MOV R\&COUNT,R10 +!COUNT .ASSIGNA \&COUNT+1 +! .AENDW +! MOV R\&COUNT,R10 + MOV R4,R10 +!COUNT .ASSIGNA \&COUNT+1 +! .AWHILE \&COUNT LE 5 +! MOV R\&COUNT,R10 +!COUNT .ASSIGNA \&COUNT+1 +! .AENDW +! MOV R\&COUNT,R10 + MOV R5,R10 +!COUNT .ASSIGNA \&COUNT+1 +! .AWHILE \&COUNT LE 5 +! MOV R\&COUNT,R10 +!COUNT .ASSIGNA \&COUNT+1 +! .AENDW +! + +! + +!; hi this is a comment + ; hi this is a comment +! .MACRO BACK_SLASH_SET +! \(MOV #"\",R0) +! .ENDM +! BACK_SLASH_SET +! MOV #"\",R0 + MOV #"\",R0 +! .MACRO COMM +! bar ; this comment will get copied out +! foo \; this one will get dropped +! .ENDM +! COMM +! bar ; this comment will get copied out + bar ; this comment will get copied out +! foo \; this one will get dropped + foo \; this one will get dropped +! BACK_SLASH_SET +! MOV #"\",R0 + MOV #"\",R0 +! .MACRO PLUS2 +! ADD #1,R\&V1 +! .SDATA "\&V'1" +! .ENDM +!V .ASSIGNC "R" +!V1 .ASSIGNA 1 +! PLUS2 +! ADD #1,R\&V1 + ADD #1,R1 +! .SDATA "\&V'1" + .byte 82,49 +! .MACRO PLUS1 P,P1 +! ADD #1,\P1 +! .SDATA "\P'1" +! .ENDM +! PLUS1 R,R1 +! ADD #1,R1 + ADD #1,R1 +! .SDATA "R1" + .byte 82,49 +! + +! .MACRO SUM P1 +! MOV R0,R10 +! ADD R1,R10 +! ADD R2,R10 +! \P1 +! ADD R3,R10 +! .ENDM +! + +! SUM .EXITM +! MOV R0,R10 + MOV R0,R10 +! ADD R1,R10 + ADD R1,R10 +! ADD R2,R10 + ADD R2,R10 +! .EXITM +! + +! .MACRO foo bar=a default=b +! \bar +! \default +! bar +! default +! .ENDM +! foo default=dog bar=cat +! cat + cat +! dog + dog +! bar + bar +! default + default +! foo X Y +! X + X +! Y + Y +! bar + bar +! default + default +! foo +! a + a +! b + b +! bar + bar +! default + default +! foo bar=cat default=dog +! cat + cat +! dog + dog +! bar + bar +! default + default +! + +! + +! .MACRO foo bar +! HI +! HI \bar +! HI +! .ENDM +! + +! foo 1 +! HI + HI +! HI 1 + HI 1 +! HI + HI +! foo 123 +! HI + HI +! HI 123 + HI 123 +! HI + HI +! foo 1 2 3 4 +! foo +! HI + HI +! HI + HI +! HI + HI +! + +! +! .MACRO PUSH Rn +! MOV.L \Rn,@-r15 +! .ENDM +! PUSH R0 +! MOV.L R0,@-r15 + MOV.L R0,@-r15 +! PUSH R1 +! MOV.L R1,@-r15 + MOV.L R1,@-r15 +! + +! + +! .MACRO RES_STR STR, Rn +! MOV.L #str\@,\Rn +! BRA end_str\@ +! NOP +!str\@ .SDATA "\STR" +! .ALIGN 2 +!end_str\@ +! .ENDM +! +! RES_STR "ONE",R0 +! MOV.L #str00018,R0 + MOV.L #str00018,R0 +! BRA end_str00018 + BRA end_str00018 +! NOP + NOP +!str00018 .SDATA "ONE" +str00018: .byte 79,78,69 +! .ALIGN 2 + .align 2 +!end_str00018 +end_str00018: +! RES_STR "TWO",R1 +! MOV.L #str00019,R1 + MOV.L #str00019,R1 +! BRA end_str00019 + BRA end_str00019 +! NOP + NOP +!str00019 .SDATA "TWO" +str00019: .byte 84,87,79 +! .ALIGN 2 + .align 2 +!end_str00019 +end_str00019: +! RES_STR "THREE",R2 +! MOV.L #str00020,R2 + MOV.L #str00020,R2 +! BRA end_str00020 + BRA end_str00020 +! NOP + NOP +!str00020 .SDATA "THREE" +str00020: .byte 84,72,82,69,69 +! .ALIGN 2 + .align 2 +!end_str00020 +end_str00020: +! + +! + +! + +! RES_STR STR=donkey Rn=R1 +! MOV.L #str00021,R1 + MOV.L #str00021,R1 +! BRA end_str00021 + BRA end_str00021 +! NOP + NOP +!str00021 .SDATA "donkey" +str00021: .byte 100,111,110,107,101,121 +! .ALIGN 2 + .align 2 +!end_str00021 +end_str00021: +! RES_STR donkey,R1 +! MOV.L #str00022,R1 + MOV.L #str00022,R1 +! BRA end_str00022 + BRA end_str00022 +! NOP + NOP +!str00022 .SDATA "donkey" +str00022: .byte 100,111,110,107,101,121 +! .ALIGN 2 + .align 2 +!end_str00022 +end_str00022: +! RES_STR donkey Rn=R1 +! MOV.L #str00023,R1 + MOV.L #str00023,R1 +! BRA end_str00023 + BRA end_str00023 +! NOP + NOP +!str00023 .SDATA "donkey" +str00023: .byte 100,111,110,107,101,121 +! .ALIGN 2 + .align 2 +!end_str00023 +end_str00023: +! .END diff --git a/gas/testsuite/gasp/mdouble.asm b/gas/testsuite/gasp/mdouble.asm new file mode 100644 index 0000000..dbb77b4 --- /dev/null +++ b/gas/testsuite/gasp/mdouble.asm @@ -0,0 +1,47 @@ + + .MACRO HI + A + \! this is hidden + B + ! this is not + C + .ENDM + Hello + HI + Emily + + + H'0f + 200+H'0F + +XX .ASSIGNA Q'100 +! Definition: + .MACRO GET X=100,Y,Z + MOV #\X+H'0F,@B + \Y +\Z JMP @MAIN +L\@ ADD #1,@HL + MOV #0,@C \! Clear C + ADD #2,@C + ADD #\&XX, @C + .ENDM + + NOP + +!Call: + GET 200,"ADD #1,@B", ENTRY + .END + + ; Definition: + + + NOP + + ;Call: + MOV #200+0F,@B + ADD #1,@B +ENTRY: JMP @MAIN +L00000: ADD #1,@HL + MOV #0,@C + ADD #2,@C + ADD #0, @C diff --git a/gas/testsuite/gasp/mdouble.err b/gas/testsuite/gasp/mdouble.err new file mode 100644 index 0000000..e69de29 --- /dev/null +++ b/gas/testsuite/gasp/mdouble.err diff --git a/gas/testsuite/gasp/mdouble.out b/gas/testsuite/gasp/mdouble.out new file mode 100644 index 0000000..9d9ad62 --- /dev/null +++ b/gas/testsuite/gasp/mdouble.out @@ -0,0 +1,68 @@ +! + +! .MACRO HI +! A +! \! this is hidden +! B +! ! this is not +! C +! .ENDM +! Hello + Hello +! HI +! A + A +! +! B + B +! ! this is not + ! this is not +! C + C +! Emily + Emily +! +! + +! H'0f + 15 +! 200+H'0F + 200+15 +! + +!XX .ASSIGNA Q'100 +!! Definition: + ! Definition: +! .MACRO GET X=100,Y,Z +! MOV #\X+H'0F,@B +! \Y +!\Z JMP @MAIN +!L\@ ADD #1,@HL +! MOV #0,@C \! Clear C +! ADD #2,@C +! ADD #\&XX, @C +! .ENDM +! + +! NOP + NOP +! + +!!Call: + !Call: +! GET 200,"ADD #1,@B", ENTRY +! MOV #200+H'0F,@B + MOV #200+15,@B +! ADD #1,@B + ADD #1,@B +!ENTRY JMP @MAIN +ENTRY: JMP @MAIN +!L00001 ADD #1,@HL +L00001: ADD #1,@HL +! MOV #0,@C + MOV #0,@C +! ADD #2,@C + ADD #2,@C +! ADD #\&XX, @C + ADD #64, @C +! .END diff --git a/gas/testsuite/gasp/mri/embed.asm b/gas/testsuite/gasp/mri/embed.asm new file mode 100644 index 0000000..f1b8f78 --- /dev/null +++ b/gas/testsuite/gasp/mri/embed.asm @@ -0,0 +1,5 @@ +embed macro label +addr&&label dc.l label + endm + + embed foo diff --git a/gas/testsuite/gasp/mri/embed.out b/gas/testsuite/gasp/mri/embed.out new file mode 100644 index 0000000..92d925f --- /dev/null +++ b/gas/testsuite/gasp/mri/embed.out @@ -0,0 +1,9 @@ +;embed macro label +;addr&&label dc.l label +; endm +; + +; embed foo +;addrfoo dc.l foo +addrfoo: dc.l foo +;
\ No newline at end of file diff --git a/gas/testsuite/gasp/mri/exists.asm b/gas/testsuite/gasp/mri/exists.asm new file mode 100644 index 0000000..87220c6 --- /dev/null +++ b/gas/testsuite/gasp/mri/exists.asm @@ -0,0 +1,10 @@ +exists macro arg1,arg2 + ifne ==arg2 + move arg1,arg2 + elsec + push arg1 + endc + endm + + exists foo,bar + exists foo diff --git a/gas/testsuite/gasp/mri/exists.out b/gas/testsuite/gasp/mri/exists.out new file mode 100644 index 0000000..e75337d --- /dev/null +++ b/gas/testsuite/gasp/mri/exists.out @@ -0,0 +1,24 @@ +;exists macro arg1,arg2 +; ifne ==arg2 +; move arg1,arg2 +; elsec +; push arg1 +; endc +; endm +; + +; exists foo,bar +; ifne -1 +; move foo,bar + move foo,bar +; elsec +; push foo +; endc +; exists foo +; ifne 0 +; move foo, +; elsec +; push foo + push foo +; endc +;
\ No newline at end of file diff --git a/gas/testsuite/gasp/mri/irp.asm b/gas/testsuite/gasp/mri/irp.asm new file mode 100644 index 0000000..cda21d9 --- /dev/null +++ b/gas/testsuite/gasp/mri/irp.asm @@ -0,0 +1,4 @@ + irp param,arg1,arg2,arg3 + dc.l param + endr + end quit diff --git a/gas/testsuite/gasp/mri/irp.out b/gas/testsuite/gasp/mri/irp.out new file mode 100644 index 0000000..9105620 --- /dev/null +++ b/gas/testsuite/gasp/mri/irp.out @@ -0,0 +1,8 @@ +; irp param,arg1,arg2,arg3 +; dc.l param +; endr + dc.l arg1 + dc.l arg2 + dc.l arg3 +; end quit + end quit diff --git a/gas/testsuite/gasp/mri/irpc.asm b/gas/testsuite/gasp/mri/irpc.asm new file mode 100644 index 0000000..a51d687 --- /dev/null +++ b/gas/testsuite/gasp/mri/irpc.asm @@ -0,0 +1,3 @@ + irpc dummy,1234 + dc.l dummy + endr diff --git a/gas/testsuite/gasp/mri/irpc.out b/gas/testsuite/gasp/mri/irpc.out new file mode 100644 index 0000000..59f8824 --- /dev/null +++ b/gas/testsuite/gasp/mri/irpc.out @@ -0,0 +1,8 @@ +; irpc dummy,1234 +; dc.l dummy +; endr + dc.l 1 + dc.l 2 + dc.l 3 + dc.l 4 +;
\ No newline at end of file diff --git a/gas/testsuite/gasp/mri/macro.asm b/gas/testsuite/gasp/mri/macro.asm new file mode 100644 index 0000000..b711bd0 --- /dev/null +++ b/gas/testsuite/gasp/mri/macro.asm @@ -0,0 +1,8 @@ +get macro arg1,arg2,arg3 + dc.l arg1 + arg2 +arg3 dc.l \4 + move.\0 d0,d1 + endm + + get.b 1,<dc.l 2>,label,four diff --git a/gas/testsuite/gasp/mri/macro.out b/gas/testsuite/gasp/mri/macro.out new file mode 100644 index 0000000..86eeb94 --- /dev/null +++ b/gas/testsuite/gasp/mri/macro.out @@ -0,0 +1,18 @@ +;get macro arg1,arg2,arg3 +; dc.l arg1 +; arg2 +;arg3 dc.l \4 +; move.\0 d0,d1 +; endm +; + +; get.b 1,<dc.l 2>,label,four +; dc.l 1 + dc.l 1 +; dc.l 2 + dc.l 2 +;label dc.l four +label: dc.l four +; move.b d0,d1 + move.b d0,d1 +;
\ No newline at end of file diff --git a/gas/testsuite/gasp/mri/narg.asm b/gas/testsuite/gasp/mri/narg.asm new file mode 100644 index 0000000..114c940 --- /dev/null +++ b/gas/testsuite/gasp/mri/narg.asm @@ -0,0 +1,9 @@ +loop macro arg1,arg2,arg3 + dc.l NARG + ifne NARG + dc.l arg1 + loop arg2,arg3 + endc + endm + + loop 1,2,3 diff --git a/gas/testsuite/gasp/mri/narg.out b/gas/testsuite/gasp/mri/narg.out new file mode 100644 index 0000000..723ebc1 --- /dev/null +++ b/gas/testsuite/gasp/mri/narg.out @@ -0,0 +1,38 @@ +;loop macro arg1,arg2,arg3 +; dc.l NARG +; ifne NARG +; dc.l arg1 +; loop arg2,arg3 +; endc +; endm +; + +; loop 1,2,3 +; dc.l 3 + dc.l 3 +; ifne 3 +; dc.l 1 + dc.l 1 +; loop 2,3 +; dc.l 2 + dc.l 2 +; ifne 2 +; dc.l 2 + dc.l 2 +; loop 3, +; dc.l 1 + dc.l 1 +; ifne 1 +; dc.l 3 + dc.l 3 +; loop , +; dc.l 0 + dc.l 0 +; ifne 0 +; dc.l +; loop , +; endc +; endc +; endc +; endc +;
\ No newline at end of file diff --git a/gas/testsuite/gasp/mri/rept.asm b/gas/testsuite/gasp/mri/rept.asm new file mode 100644 index 0000000..d563bb2 --- /dev/null +++ b/gas/testsuite/gasp/mri/rept.asm @@ -0,0 +1,3 @@ + rept 3 + dc.l 1 + endr diff --git a/gas/testsuite/gasp/mri/rept.out b/gas/testsuite/gasp/mri/rept.out new file mode 100644 index 0000000..da4ed6b --- /dev/null +++ b/gas/testsuite/gasp/mri/rept.out @@ -0,0 +1,16 @@ +; rept 3 +; dc.l 1 +; endr +; dc.l 1 + dc.l 1 +; REPT 2 +; dc.l 1 +; ENDR +; dc.l 1 + dc.l 1 +; REPT 1 +; dc.l 1 +; ENDR +; dc.l 1 + dc.l 1 +;
\ No newline at end of file diff --git a/gas/testsuite/gasp/pl1.asm b/gas/testsuite/gasp/pl1.asm new file mode 100644 index 0000000..f38bfde --- /dev/null +++ b/gas/testsuite/gasp/pl1.asm @@ -0,0 +1,20 @@ + + .ALTERNATE + +alloc MACRO val1,val2 + DB val1 + DB val2 + ENDM + + alloc "that's" 'show biz' + alloc 0,1 + alloc 0 1 + alloc 0 1 + alloc ,1 + + + + + + + diff --git a/gas/testsuite/gasp/pl1.err b/gas/testsuite/gasp/pl1.err new file mode 100644 index 0000000..a1e3318 --- /dev/null +++ b/gas/testsuite/gasp/pl1.err @@ -0,0 +1 @@ +END missing from end of file. diff --git a/gas/testsuite/gasp/pl1.out b/gas/testsuite/gasp/pl1.out new file mode 100644 index 0000000..8b80f12 --- /dev/null +++ b/gas/testsuite/gasp/pl1.out @@ -0,0 +1,49 @@ +! +! .ALTERNATE +! + +!alloc MACRO val1,val2 +! DB val1 +! DB val2 +! ENDM +! + +! alloc "that's" 'show biz' +! DB "that's" + .byte 116,104,97,116,39,115 +! DB "show biz" + .byte 115,104,111,119,32,98,105,122 +! alloc 0,1 +! DB 0 + .byte 0 +! DB 1 + .byte 1 +! alloc 0 1 +! DB 0 + .byte 0 +! DB 1 + .byte 1 +! alloc 0 1 +! DB 0 + .byte 0 +! DB 1 + .byte 1 +! alloc ,1 +! DB + .byte +! DB 1 + .byte 1 +! + +! + +! +! + +! + +! + +! + +!
\ No newline at end of file diff --git a/gas/testsuite/gasp/pl2.asm b/gas/testsuite/gasp/pl2.asm new file mode 100644 index 0000000..2971137 --- /dev/null +++ b/gas/testsuite/gasp/pl2.asm @@ -0,0 +1,28 @@ + + + .ALTERNATE + + ! ok + !! also ok + +foo MACRO + ! you can see me + !! but not me + ! you can see me + !! but not me + but this "SHOULD !!BE OK" + ENDM + + foo + + +define MACRO val1,val2 + DB val1 ! this comment will show up + DB val2 !! this on won't + ENDM + + define 0,1 + + + END + diff --git a/gas/testsuite/gasp/pl2.err b/gas/testsuite/gasp/pl2.err new file mode 100644 index 0000000..e69de29 --- /dev/null +++ b/gas/testsuite/gasp/pl2.err diff --git a/gas/testsuite/gasp/pl2.out b/gas/testsuite/gasp/pl2.out new file mode 100644 index 0000000..cca6fa3 --- /dev/null +++ b/gas/testsuite/gasp/pl2.out @@ -0,0 +1,51 @@ +! + +! + +! .ALTERNATE +! + +! ! ok + ! ok +! !! also ok + !! also ok +! + +!foo MACRO +! ! you can see me +! !! but not me +! ! you can see me +! !! but not me +! but this "SHOULD !!BE OK" +! ENDM +! + +! foo +! ! you can see me + ! you can see me +! +! ! you can see me + ! you can see me +! +! but this "SHOULD !!BE OK" + but this "SHOULD !!BE OK" +! + +! + +!define MACRO val1,val2 +! DB val1 ! this comment will show up +! DB val2 !! this on won't +! ENDM +! + +! define 0,1 +! DB 0 ! this comment will show up + .byte 0! this comment will show up +! DB 1 + .byte 1 +! + +! + +! END diff --git a/gas/testsuite/gasp/pl3.asm b/gas/testsuite/gasp/pl3.asm new file mode 100644 index 0000000..0131dcc --- /dev/null +++ b/gas/testsuite/gasp/pl3.asm @@ -0,0 +1,30 @@ + .ALTERNATE + +foo MACRO string + LOCAL lab1, lab2 +lab1: DATA.L lab2 +lab2: SDATA string + ENDM + + foo "An example" + foo "using LOCAL" + +! test of LOCAL directive + +chk_err MACRO limit + LOCAL skip !! frob + LOCAL zap,dog,barf +barf: cmp ax,limit !! check value against + !! limit + jle skip !! skip call if OK +skip: call error + foo dog + zap dog + nop + ENDM + + chk_err 5 + chk_err 10 + + + END diff --git a/gas/testsuite/gasp/pl3.err b/gas/testsuite/gasp/pl3.err new file mode 100644 index 0000000..e69de29 --- /dev/null +++ b/gas/testsuite/gasp/pl3.err diff --git a/gas/testsuite/gasp/pl3.out b/gas/testsuite/gasp/pl3.out new file mode 100644 index 0000000..066194c --- /dev/null +++ b/gas/testsuite/gasp/pl3.out @@ -0,0 +1,86 @@ +! .ALTERNATE +! + +!foo MACRO string +! LOCAL lab1, lab2 +!lab1: DATA.L lab2 +!lab2: SDATA string +! ENDM +! + +! foo "An example" +! +!LL0001: DATA.L LL0002 +LL0001: .long LL0002 +!LL0002: SDATA "An example" +LL0002: .byte 65,110,32,101,120,97,109,112,108,101 +! foo "using LOCAL" +! +!LL0003: DATA.L LL0004 +LL0003: .long LL0004 +!LL0004: SDATA "using LOCAL" +LL0004: .byte 117,115,105,110,103,32,76,79,67,65,76 +! + +!! test of LOCAL directive + ! test of LOCAL directive +! + +!chk_err MACRO limit +! LOCAL skip !! frob +! LOCAL zap,dog,barf +!barf: cmp ax,limit !! check value against +! !! limit +! jle skip !! skip call if OK +!skip: call error +! foo dog +! zap dog +! nop +! ENDM +! + +! chk_err 5 +! +! +!LL0008: cmp ax,5 +LL0008: cmp ax,5 +! +! jle LL0005 + jle LL0005 +!LL0005: call error +LL0005: call error +! foo LL0007 +! +!LL0009: DATA.L LL000a +LL0009: .long LL000a +!LL000a: SDATA LL0007 +LL000a: .byte 76,76,48,48,48,55 +! LL0006 LL0007 + LL0006 LL0007 +! nop + nop +! chk_err 10 +! +! +!LL000e: cmp ax,10 +LL000e: cmp ax,10 +! +! jle LL000b + jle LL000b +!LL000b: call error +LL000b: call error +! foo LL000d +! +!LL000f: DATA.L LL0010 +LL000f: .long LL0010 +!LL0010: SDATA LL000d +LL0010: .byte 76,76,48,48,48,100 +! LL000c LL000d + LL000c LL000d +! nop + nop +! + +! + +! END diff --git a/gas/testsuite/gasp/pl4.asm b/gas/testsuite/gasp/pl4.asm new file mode 100644 index 0000000..f1dd3e8 --- /dev/null +++ b/gas/testsuite/gasp/pl4.asm @@ -0,0 +1,10 @@ + .ALTERNATE +! test of macro substitution around &s + + +foo MACRO a,b + x&a&b + ENDM + + foo 3 2 + END diff --git a/gas/testsuite/gasp/pl4.err b/gas/testsuite/gasp/pl4.err new file mode 100644 index 0000000..e69de29 --- /dev/null +++ b/gas/testsuite/gasp/pl4.err diff --git a/gas/testsuite/gasp/pl4.out b/gas/testsuite/gasp/pl4.out new file mode 100644 index 0000000..35d1391 --- /dev/null +++ b/gas/testsuite/gasp/pl4.out @@ -0,0 +1,16 @@ +! .ALTERNATE +!! test of macro substitution around &s + ! test of macro substitution around &s +! + +! + +!foo MACRO a,b +! x&a&b +! ENDM +! + +! foo 3 2 +! x32 + x32 +! END diff --git a/gas/testsuite/gasp/pl5.asm b/gas/testsuite/gasp/pl5.asm new file mode 100644 index 0000000..16b999b --- /dev/null +++ b/gas/testsuite/gasp/pl5.asm @@ -0,0 +1,15 @@ +! test of literal text operator + .ALTERNATE +foop MACRO str1,str2 + SDATA "str1" + SDATA str2 + ENDM + + + + foop this< is a <string> with angle brackets> + foop this< is a string with spaces> + foop this < is a string with a !>> + + + END diff --git a/gas/testsuite/gasp/pl5.err b/gas/testsuite/gasp/pl5.err new file mode 100644 index 0000000..e69de29 --- /dev/null +++ b/gas/testsuite/gasp/pl5.err diff --git a/gas/testsuite/gasp/pl5.out b/gas/testsuite/gasp/pl5.out new file mode 100644 index 0000000..0aa488b --- /dev/null +++ b/gas/testsuite/gasp/pl5.out @@ -0,0 +1,32 @@ +!! test of literal text operator + ! test of literal text operator +! .ALTERNATE +!foop MACRO str1,str2 +! SDATA "str1" +! SDATA str2 +! ENDM +! + +! + +! +! foop this< is a <string> with angle brackets> +! SDATA "this" + .byte 116,104,105,115 +! SDATA " is a <string> with angle brackets" + .byte 32,105,115,32,97,32,60,115,116,114,105,110,103,62,32,119,105,116,104,32,97,110,103,108,101,32,98,114,97,99,107,101,116,115 +! foop this< is a string with spaces> +! SDATA "this" + .byte 116,104,105,115 +! SDATA " is a string with spaces" + .byte 32,105,115,32,97,32,115,116,114,105,110,103,32,119,105,116,104,32,115,112,97,99,101,115 +! foop this < is a string with a !>> +! SDATA "this" + .byte 116,104,105,115 +! SDATA " is a string with a >" + .byte 32,105,115,32,97,32,115,116,114,105,110,103,32,119,105,116,104,32,97,32,62 +! + +! + +! END diff --git a/gas/testsuite/gasp/pl6.asm b/gas/testsuite/gasp/pl6.asm new file mode 100644 index 0000000..162d617 --- /dev/null +++ b/gas/testsuite/gasp/pl6.asm @@ -0,0 +1,21 @@ + .ALTERNATE +! test of expression operator +define MACRO val, string + SDATA val + SDATA string + ENDM + define "1","99%of100" ! notice % within string + define %1 + 2, "=3" + + + define % 1 + 2 %3+4 + + define %3*4-2 <=10> + + define %3*4-2 5 + + define %1 + 2,<is equal to %1 + 2, right?> + + ! has no effect + + end diff --git a/gas/testsuite/gasp/pl6.err b/gas/testsuite/gasp/pl6.err new file mode 100644 index 0000000..e69de29 --- /dev/null +++ b/gas/testsuite/gasp/pl6.err diff --git a/gas/testsuite/gasp/pl6.out b/gas/testsuite/gasp/pl6.out new file mode 100644 index 0000000..dcd16cf --- /dev/null +++ b/gas/testsuite/gasp/pl6.out @@ -0,0 +1,54 @@ +! .ALTERNATE +!! test of expression operator + ! test of expression operator +!define MACRO val, string +! SDATA val +! SDATA string +! ENDM +! define "1","99%of100" ! notice % within string +! SDATA "1" + .byte 49 +! SDATA "99%of100" + .byte 57,57,37,111,102,49,48,48 +! define %1 + 2, "=3" +! SDATA 3 + .byte 51 +! SDATA "=3" + .byte 61,51 +! + +! + +! define % 1 + 2 %3+4 +! SDATA 3 + .byte 51 +! SDATA 7 + .byte 55 +! + +! define %3*4-2 <=10> +! SDATA 10 + .byte 49,48 +! SDATA "=10" + .byte 61,49,48 +! + +! define %3*4-2 5 +! SDATA 10 + .byte 49,48 +! SDATA 5 + .byte 53 +! + +! define %1 + 2,<is equal to %1 + 2, right?> +! SDATA 3 + .byte 51 +! SDATA "is equal to %1 + 2, right?" + .byte 105,115,32,101,113,117,97,108,32,116,111,32,37,49,32,43,32,50,44,32,114,105,103,104,116,63 +! + +! ! has no effect + ! has no effect +! + +! end diff --git a/gas/testsuite/gasp/pl7.asm b/gas/testsuite/gasp/pl7.asm new file mode 100644 index 0000000..58a40af --- /dev/null +++ b/gas/testsuite/gasp/pl7.asm @@ -0,0 +1,12 @@ + .ALTERNATE +! test of string operators +define MACRO str1,str2 + SDATA str1 + SDATA "str2" +ENDM + define one" way to get "spaces,0 + define "lot's! of <special>,chars%", 0 + + + + diff --git a/gas/testsuite/gasp/pl7.err b/gas/testsuite/gasp/pl7.err new file mode 100644 index 0000000..a1e3318 --- /dev/null +++ b/gas/testsuite/gasp/pl7.err @@ -0,0 +1 @@ +END missing from end of file. diff --git a/gas/testsuite/gasp/pl7.out b/gas/testsuite/gasp/pl7.out new file mode 100644 index 0000000..1519b34 --- /dev/null +++ b/gas/testsuite/gasp/pl7.out @@ -0,0 +1,26 @@ +! .ALTERNATE +!! test of string operators + ! test of string operators +!define MACRO str1,str2 +! SDATA str1 +! SDATA "str2" +!ENDM +! define one" way to get "spaces,0 +! SDATA one" way to get "spaces + .byte 111,110,101,34,32,119,97,121,32,116,111,32,103,101,116,32,34,115,112,97,99,101,115 +! SDATA "0" + .byte 48 +! define "lot's! of <special>,chars%", 0 +! SDATA "lot's of <special>,chars%" + .byte 108,111,116,39,115,32,111,102,32,60,115,112,101,99,105,97,108,62,44,99,104,97,114,115,37 +! SDATA "0" + .byte 48 +! + +! + +! + +! + +!
\ No newline at end of file diff --git a/gas/testsuite/gasp/pl8.asm b/gas/testsuite/gasp/pl8.asm new file mode 100644 index 0000000..925b172 --- /dev/null +++ b/gas/testsuite/gasp/pl8.asm @@ -0,0 +1,18 @@ + + .ALTERNATE + SDATA %1+2+3 + SDATA "5" + + + + MACRO foo + SDATA "HI" !! this will go + SDATA "THERE ! this will stay + ENDM + + foo + + + SDATA <!<this is <a wacky> example!>!!> + SDATA "<this is <a wacky> example>!" + END diff --git a/gas/testsuite/gasp/pl8.err b/gas/testsuite/gasp/pl8.err new file mode 100644 index 0000000..e69de29 --- /dev/null +++ b/gas/testsuite/gasp/pl8.err diff --git a/gas/testsuite/gasp/pl8.out b/gas/testsuite/gasp/pl8.out new file mode 100644 index 0000000..3710412 --- /dev/null +++ b/gas/testsuite/gasp/pl8.out @@ -0,0 +1,33 @@ +! + +! .ALTERNATE +! SDATA %1+2+3 + .byte 37,49,43,50,43,51,32 +! SDATA "5" + .byte 53 +! + +! + +! + +! MACRO foo +! SDATA "HI" !! this will go +! SDATA "THERE ! this will stay +! ENDM +! + +! foo +! SDATA "HI" + .byte 72,73 +! SDATA "THERE ! this will stay + .byte 84,72,69,82,69,9,32,116,104,105,115,32,119,105,108,108,32,115,116,97,121 +! + +! + +! SDATA <!<this is <a wacky> example!>!!> + .byte 60,116,104,105,115,32,105,115,32,60,97,32,119,97,99,107,121,62,32,101,120,97,109,112,108,101,62,33 +! SDATA "<this is <a wacky> example>!" + .byte 60,116,104,105,115,32,105,115,32,60,97,32,119,97,99,107,121,62,32,101,120,97,109,112,108,101,62,34 +! END diff --git a/gas/testsuite/gasp/pr7583.asm b/gas/testsuite/gasp/pr7583.asm new file mode 100644 index 0000000..c97caf5 --- /dev/null +++ b/gas/testsuite/gasp/pr7583.asm @@ -0,0 +1,3 @@ + + .sdata "v1.0000" + .end diff --git a/gas/testsuite/gasp/pr7583.err b/gas/testsuite/gasp/pr7583.err new file mode 100644 index 0000000..e69de29 --- /dev/null +++ b/gas/testsuite/gasp/pr7583.err diff --git a/gas/testsuite/gasp/pr7583.out b/gas/testsuite/gasp/pr7583.out new file mode 100644 index 0000000..a5df1d7 --- /dev/null +++ b/gas/testsuite/gasp/pr7583.out @@ -0,0 +1,5 @@ +! + +! .sdata "v1.0000" + .byte 118,49,46,48,48,48,48 +! .end diff --git a/gas/testsuite/gasp/reg.asm b/gas/testsuite/gasp/reg.asm new file mode 100644 index 0000000..eb463ed --- /dev/null +++ b/gas/testsuite/gasp/reg.asm @@ -0,0 +1,9 @@ + + +foo .REG (r1) + add foo,foo + +bar .reg (r2) + add bar,foo + + .END diff --git a/gas/testsuite/gasp/reg.err b/gas/testsuite/gasp/reg.err new file mode 100644 index 0000000..e69de29 --- /dev/null +++ b/gas/testsuite/gasp/reg.err diff --git a/gas/testsuite/gasp/reg.out b/gas/testsuite/gasp/reg.out new file mode 100644 index 0000000..79268a3 --- /dev/null +++ b/gas/testsuite/gasp/reg.out @@ -0,0 +1,15 @@ +! + +! + +!foo .REG (r1) +! add foo,foo + add r1,r1 +! + +!bar .reg (r2) +! add bar,foo + add r2,r1 +! + +! .END diff --git a/gas/testsuite/gasp/rep.asm b/gas/testsuite/gasp/rep.asm new file mode 100644 index 0000000..027ac47 --- /dev/null +++ b/gas/testsuite/gasp/rep.asm @@ -0,0 +1,13 @@ + .AREPEAT 5 + FIVE + .AREPEAT 2 + TWO + .AENDR + .AREPEAT 3 + THREE + .AREPEAT 2 + TWO + .AENDR + .AENDR + .AENDR + .END diff --git a/gas/testsuite/gasp/rep.err b/gas/testsuite/gasp/rep.err new file mode 100644 index 0000000..e69de29 --- /dev/null +++ b/gas/testsuite/gasp/rep.err diff --git a/gas/testsuite/gasp/rep.out b/gas/testsuite/gasp/rep.out new file mode 100644 index 0000000..510d0e1 --- /dev/null +++ b/gas/testsuite/gasp/rep.out @@ -0,0 +1,391 @@ +! .AREPEAT 5 +! FIVE +! .AREPEAT 2 +! TWO +! .AENDR +! .AREPEAT 3 +! THREE +! .AREPEAT 2 +! TWO +! .AENDR +! .AENDR +! .AENDR +! FIVE + FIVE +! .AREPEAT 2 +! TWO +! .AENDR +! TWO + TWO +! .AREPEAT 1 +! TWO +! .AENDR +! TWO + TWO +! .AREPEAT 3 +! THREE +! .AREPEAT 2 +! TWO +! .AENDR +! .AENDR +! THREE + THREE +! .AREPEAT 2 +! TWO +! .AENDR +! TWO + TWO +! .AREPEAT 1 +! TWO +! .AENDR +! TWO + TWO +! .AREPEAT 2 +! THREE +! .AREPEAT 2 +! TWO +! .AENDR +! .AENDR +! THREE + THREE +! .AREPEAT 2 +! TWO +! .AENDR +! TWO + TWO +! .AREPEAT 1 +! TWO +! .AENDR +! TWO + TWO +! .AREPEAT 1 +! THREE +! .AREPEAT 2 +! TWO +! .AENDR +! .AENDR +! THREE + THREE +! .AREPEAT 2 +! TWO +! .AENDR +! TWO + TWO +! .AREPEAT 1 +! TWO +! .AENDR +! TWO + TWO +! .AREPEAT 4 +! FIVE +! .AREPEAT 2 +! TWO +! .AENDR +! .AREPEAT 3 +! THREE +! .AREPEAT 2 +! TWO +! .AENDR +! .AENDR +! .AENDR +! FIVE + FIVE +! .AREPEAT 2 +! TWO +! .AENDR +! TWO + TWO +! .AREPEAT 1 +! TWO +! .AENDR +! TWO + TWO +! .AREPEAT 3 +! THREE +! .AREPEAT 2 +! TWO +! .AENDR +! .AENDR +! THREE + THREE +! .AREPEAT 2 +! TWO +! .AENDR +! TWO + TWO +! .AREPEAT 1 +! TWO +! .AENDR +! TWO + TWO +! .AREPEAT 2 +! THREE +! .AREPEAT 2 +! TWO +! .AENDR +! .AENDR +! THREE + THREE +! .AREPEAT 2 +! TWO +! .AENDR +! TWO + TWO +! .AREPEAT 1 +! TWO +! .AENDR +! TWO + TWO +! .AREPEAT 1 +! THREE +! .AREPEAT 2 +! TWO +! .AENDR +! .AENDR +! THREE + THREE +! .AREPEAT 2 +! TWO +! .AENDR +! TWO + TWO +! .AREPEAT 1 +! TWO +! .AENDR +! TWO + TWO +! .AREPEAT 3 +! FIVE +! .AREPEAT 2 +! TWO +! .AENDR +! .AREPEAT 3 +! THREE +! .AREPEAT 2 +! TWO +! .AENDR +! .AENDR +! .AENDR +! FIVE + FIVE +! .AREPEAT 2 +! TWO +! .AENDR +! TWO + TWO +! .AREPEAT 1 +! TWO +! .AENDR +! TWO + TWO +! .AREPEAT 3 +! THREE +! .AREPEAT 2 +! TWO +! .AENDR +! .AENDR +! THREE + THREE +! .AREPEAT 2 +! TWO +! .AENDR +! TWO + TWO +! .AREPEAT 1 +! TWO +! .AENDR +! TWO + TWO +! .AREPEAT 2 +! THREE +! .AREPEAT 2 +! TWO +! .AENDR +! .AENDR +! THREE + THREE +! .AREPEAT 2 +! TWO +! .AENDR +! TWO + TWO +! .AREPEAT 1 +! TWO +! .AENDR +! TWO + TWO +! .AREPEAT 1 +! THREE +! .AREPEAT 2 +! TWO +! .AENDR +! .AENDR +! THREE + THREE +! .AREPEAT 2 +! TWO +! .AENDR +! TWO + TWO +! .AREPEAT 1 +! TWO +! .AENDR +! TWO + TWO +! .AREPEAT 2 +! FIVE +! .AREPEAT 2 +! TWO +! .AENDR +! .AREPEAT 3 +! THREE +! .AREPEAT 2 +! TWO +! .AENDR +! .AENDR +! .AENDR +! FIVE + FIVE +! .AREPEAT 2 +! TWO +! .AENDR +! TWO + TWO +! .AREPEAT 1 +! TWO +! .AENDR +! TWO + TWO +! .AREPEAT 3 +! THREE +! .AREPEAT 2 +! TWO +! .AENDR +! .AENDR +! THREE + THREE +! .AREPEAT 2 +! TWO +! .AENDR +! TWO + TWO +! .AREPEAT 1 +! TWO +! .AENDR +! TWO + TWO +! .AREPEAT 2 +! THREE +! .AREPEAT 2 +! TWO +! .AENDR +! .AENDR +! THREE + THREE +! .AREPEAT 2 +! TWO +! .AENDR +! TWO + TWO +! .AREPEAT 1 +! TWO +! .AENDR +! TWO + TWO +! .AREPEAT 1 +! THREE +! .AREPEAT 2 +! TWO +! .AENDR +! .AENDR +! THREE + THREE +! .AREPEAT 2 +! TWO +! .AENDR +! TWO + TWO +! .AREPEAT 1 +! TWO +! .AENDR +! TWO + TWO +! .AREPEAT 1 +! FIVE +! .AREPEAT 2 +! TWO +! .AENDR +! .AREPEAT 3 +! THREE +! .AREPEAT 2 +! TWO +! .AENDR +! .AENDR +! .AENDR +! FIVE + FIVE +! .AREPEAT 2 +! TWO +! .AENDR +! TWO + TWO +! .AREPEAT 1 +! TWO +! .AENDR +! TWO + TWO +! .AREPEAT 3 +! THREE +! .AREPEAT 2 +! TWO +! .AENDR +! .AENDR +! THREE + THREE +! .AREPEAT 2 +! TWO +! .AENDR +! TWO + TWO +! .AREPEAT 1 +! TWO +! .AENDR +! TWO + TWO +! .AREPEAT 2 +! THREE +! .AREPEAT 2 +! TWO +! .AENDR +! .AENDR +! THREE + THREE +! .AREPEAT 2 +! TWO +! .AENDR +! TWO + TWO +! .AREPEAT 1 +! TWO +! .AENDR +! TWO + TWO +! .AREPEAT 1 +! THREE +! .AREPEAT 2 +! TWO +! .AENDR +! .AENDR +! THREE + THREE +! .AREPEAT 2 +! TWO +! .AENDR +! TWO + TWO +! .AREPEAT 1 +! TWO +! .AENDR +! TWO + TWO +! .END diff --git a/gas/testsuite/gasp/repeat.asm b/gas/testsuite/gasp/repeat.asm new file mode 100644 index 0000000..7a85da3 --- /dev/null +++ b/gas/testsuite/gasp/repeat.asm @@ -0,0 +1,14 @@ + + .AREPEAT 10 + TEN + .AREPEAT 2 + TWENTY + .AENDR + .AENDR + + .AREPEAT 3 + ROTCL R2 + DIV1 R0,R1 + .AENDR + + .END diff --git a/gas/testsuite/gasp/repeat.err b/gas/testsuite/gasp/repeat.err new file mode 100644 index 0000000..e69de29 --- /dev/null +++ b/gas/testsuite/gasp/repeat.err diff --git a/gas/testsuite/gasp/repeat.out b/gas/testsuite/gasp/repeat.out new file mode 100644 index 0000000..705d8d8 --- /dev/null +++ b/gas/testsuite/gasp/repeat.out @@ -0,0 +1,211 @@ +! + +! .AREPEAT 10 +! TEN +! .AREPEAT 2 +! TWENTY +! .AENDR +! .AENDR +! TEN + TEN +! .AREPEAT 2 +! TWENTY +! .AENDR +! TWENTY + TWENTY +! .AREPEAT 1 +! TWENTY +! .AENDR +! TWENTY + TWENTY +! .AREPEAT 9 +! TEN +! .AREPEAT 2 +! TWENTY +! .AENDR +! .AENDR +! TEN + TEN +! .AREPEAT 2 +! TWENTY +! .AENDR +! TWENTY + TWENTY +! .AREPEAT 1 +! TWENTY +! .AENDR +! TWENTY + TWENTY +! .AREPEAT 8 +! TEN +! .AREPEAT 2 +! TWENTY +! .AENDR +! .AENDR +! TEN + TEN +! .AREPEAT 2 +! TWENTY +! .AENDR +! TWENTY + TWENTY +! .AREPEAT 1 +! TWENTY +! .AENDR +! TWENTY + TWENTY +! .AREPEAT 7 +! TEN +! .AREPEAT 2 +! TWENTY +! .AENDR +! .AENDR +! TEN + TEN +! .AREPEAT 2 +! TWENTY +! .AENDR +! TWENTY + TWENTY +! .AREPEAT 1 +! TWENTY +! .AENDR +! TWENTY + TWENTY +! .AREPEAT 6 +! TEN +! .AREPEAT 2 +! TWENTY +! .AENDR +! .AENDR +! TEN + TEN +! .AREPEAT 2 +! TWENTY +! .AENDR +! TWENTY + TWENTY +! .AREPEAT 1 +! TWENTY +! .AENDR +! TWENTY + TWENTY +! .AREPEAT 5 +! TEN +! .AREPEAT 2 +! TWENTY +! .AENDR +! .AENDR +! TEN + TEN +! .AREPEAT 2 +! TWENTY +! .AENDR +! TWENTY + TWENTY +! .AREPEAT 1 +! TWENTY +! .AENDR +! TWENTY + TWENTY +! .AREPEAT 4 +! TEN +! .AREPEAT 2 +! TWENTY +! .AENDR +! .AENDR +! TEN + TEN +! .AREPEAT 2 +! TWENTY +! .AENDR +! TWENTY + TWENTY +! .AREPEAT 1 +! TWENTY +! .AENDR +! TWENTY + TWENTY +! .AREPEAT 3 +! TEN +! .AREPEAT 2 +! TWENTY +! .AENDR +! .AENDR +! TEN + TEN +! .AREPEAT 2 +! TWENTY +! .AENDR +! TWENTY + TWENTY +! .AREPEAT 1 +! TWENTY +! .AENDR +! TWENTY + TWENTY +! .AREPEAT 2 +! TEN +! .AREPEAT 2 +! TWENTY +! .AENDR +! .AENDR +! TEN + TEN +! .AREPEAT 2 +! TWENTY +! .AENDR +! TWENTY + TWENTY +! .AREPEAT 1 +! TWENTY +! .AENDR +! TWENTY + TWENTY +! .AREPEAT 1 +! TEN +! .AREPEAT 2 +! TWENTY +! .AENDR +! .AENDR +! TEN + TEN +! .AREPEAT 2 +! TWENTY +! .AENDR +! TWENTY + TWENTY +! .AREPEAT 1 +! TWENTY +! .AENDR +! TWENTY + TWENTY +! + +! .AREPEAT 3 +! ROTCL R2 +! DIV1 R0,R1 +! .AENDR +! ROTCL R2 + ROTCL R2 +! DIV1 R0,R1 + DIV1 R0,R1 +! .AREPEAT 2 +! ROTCL R2 +! DIV1 R0,R1 +! .AENDR +! ROTCL R2 + ROTCL R2 +! DIV1 R0,R1 + DIV1 R0,R1 +! .AREPEAT 1 +! ROTCL R2 +! DIV1 R0,R1 +! .AENDR +! ROTCL R2 + ROTCL R2 +! DIV1 R0,R1 + DIV1 R0,R1 +! + +! .END diff --git a/gas/testsuite/gasp/reperr.asm b/gas/testsuite/gasp/reperr.asm new file mode 100644 index 0000000..60882b2 --- /dev/null +++ b/gas/testsuite/gasp/reperr.asm @@ -0,0 +1,2 @@ + + .REPEAT 10 diff --git a/gas/testsuite/gasp/reperr.err b/gas/testsuite/gasp/reperr.err new file mode 100644 index 0000000..a1e3318 --- /dev/null +++ b/gas/testsuite/gasp/reperr.err @@ -0,0 +1 @@ +END missing from end of file. diff --git a/gas/testsuite/gasp/reperr.out b/gas/testsuite/gasp/reperr.out new file mode 100644 index 0000000..2c9f8c6 --- /dev/null +++ b/gas/testsuite/gasp/reperr.out @@ -0,0 +1,5 @@ +! + +! .REPEAT 10 + .REPEAT 10 +!
\ No newline at end of file diff --git a/gas/testsuite/gasp/reperr1.asm b/gas/testsuite/gasp/reperr1.asm new file mode 100644 index 0000000..2d987e4 --- /dev/null +++ b/gas/testsuite/gasp/reperr1.asm @@ -0,0 +1,3 @@ + + .AREPEAT 10 + .END diff --git a/gas/testsuite/gasp/reperr1.err b/gas/testsuite/gasp/reperr1.err new file mode 100644 index 0000000..536545b --- /dev/null +++ b/gas/testsuite/gasp/reperr1.err @@ -0,0 +1 @@ +End of file whilst inside AREPEAT, started on line 3. diff --git a/gas/testsuite/gasp/reperr1.out b/gas/testsuite/gasp/reperr1.out new file mode 100644 index 0000000..dd82880 --- /dev/null +++ b/gas/testsuite/gasp/reperr1.out @@ -0,0 +1,5 @@ +! + +! .AREPEAT 10 +! .END +!
\ No newline at end of file diff --git a/gas/testsuite/gasp/reperr2.asm b/gas/testsuite/gasp/reperr2.asm new file mode 100644 index 0000000..de06a71 --- /dev/null +++ b/gas/testsuite/gasp/reperr2.asm @@ -0,0 +1,6 @@ + + .AREPEAT 5 + .AENDR + .AENDR + .END + diff --git a/gas/testsuite/gasp/reperr2.err b/gas/testsuite/gasp/reperr2.err new file mode 100644 index 0000000..840ccc5 --- /dev/null +++ b/gas/testsuite/gasp/reperr2.err @@ -0,0 +1 @@ +reperr2.asm:4 AENDR without a AREPEAT. diff --git a/gas/testsuite/gasp/reperr2.out b/gas/testsuite/gasp/reperr2.out new file mode 100644 index 0000000..df7a84d --- /dev/null +++ b/gas/testsuite/gasp/reperr2.out @@ -0,0 +1,14 @@ +! + +! .AREPEAT 5 +! .AENDR +! .AREPEAT 4 +! .AENDR +! .AREPEAT 3 +! .AENDR +! .AREPEAT 2 +! .AENDR +! .AREPEAT 1 +! .AENDR +! .AENDR +! .END diff --git a/gas/testsuite/gasp/reperr3.asm b/gas/testsuite/gasp/reperr3.asm new file mode 100644 index 0000000..464bc79 --- /dev/null +++ b/gas/testsuite/gasp/reperr3.asm @@ -0,0 +1,21 @@ + .AREPEAT 4 + .AREPEAT 4 + .AREPEAT 4 + .AREPEAT 4 + stuff + .AENDR + which + .AENDR + will + .AENDR + get + .AENDR + repetaed + .AENDR + + .AENDR + .AENDR + .AENDR + .AENDR + .AENDR + .END diff --git a/gas/testsuite/gasp/reperr3.err b/gas/testsuite/gasp/reperr3.err new file mode 100644 index 0000000..1be0dce --- /dev/null +++ b/gas/testsuite/gasp/reperr3.err @@ -0,0 +1,6 @@ +reperr3.asm:14 AENDR without a AREPEAT. +reperr3.asm:16 AENDR without a AREPEAT. +reperr3.asm:17 AENDR without a AREPEAT. +reperr3.asm:18 AENDR without a AREPEAT. +reperr3.asm:19 AENDR without a AREPEAT. +reperr3.asm:20 AENDR without a AREPEAT. diff --git a/gas/testsuite/gasp/reperr3.out b/gas/testsuite/gasp/reperr3.out new file mode 100644 index 0000000..9a3513b --- /dev/null +++ b/gas/testsuite/gasp/reperr3.out @@ -0,0 +1,2035 @@ +! .AREPEAT 4 +! .AREPEAT 4 +! .AREPEAT 4 +! .AREPEAT 4 +! stuff +! .AENDR +! which +! .AENDR +! will +! .AENDR +! get +! .AENDR +! .AREPEAT 4 +! .AREPEAT 4 +! .AREPEAT 4 +! stuff +! .AENDR +! which +! .AENDR +! will +! .AENDR +! .AREPEAT 4 +! .AREPEAT 4 +! stuff +! .AENDR +! which +! .AENDR +! .AREPEAT 4 +! stuff +! .AENDR +! stuff + stuff +! .AREPEAT 3 +! stuff +! .AENDR +! stuff + stuff +! .AREPEAT 2 +! stuff +! .AENDR +! stuff + stuff +! .AREPEAT 1 +! stuff +! .AENDR +! stuff + stuff +! which + which +! .AREPEAT 3 +! .AREPEAT 4 +! stuff +! .AENDR +! which +! .AENDR +! .AREPEAT 4 +! stuff +! .AENDR +! stuff + stuff +! .AREPEAT 3 +! stuff +! .AENDR +! stuff + stuff +! .AREPEAT 2 +! stuff +! .AENDR +! stuff + stuff +! .AREPEAT 1 +! stuff +! .AENDR +! stuff + stuff +! which + which +! .AREPEAT 2 +! .AREPEAT 4 +! stuff +! .AENDR +! which +! .AENDR +! .AREPEAT 4 +! stuff +! .AENDR +! stuff + stuff +! .AREPEAT 3 +! stuff +! .AENDR +! stuff + stuff +! .AREPEAT 2 +! stuff +! .AENDR +! stuff + stuff +! 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+ +! + +! .SDATA "HI","STEVE" + .byte 72,73,83,84,69,86,69 +! .SDATA "HI" , "STEVE" , <72>,<73>,<83><69><86><69> + .byte 72,73,83,84,69,86,69,72,73,83,69,86,69 +! + +! .SDATA "H""I" , "STEVE" , <72>,<73>,<83><69><86><69> + .byte 72,34,73,83,84,69,86,69,72,73,83,69,86,69 +! + +! + +! + +! .SDATA "SHOULD NOT FAIL" "HERE" + .byte 83,72,79,85,76,68,32,78,79,84,32,70,65,73,76,72,69,82,69 +! .SDATA "SHOULD FAIL" foo "HERE" + .byte 83,72,79,85,76,68,32,70,65,73,76,102,111,111,32,34,72,69,82,69,34,32 +! + +! .SDATAB 8,"BOINK" + .byte 66,79,73,78,75 + .byte 66,79,73,78,75 + .byte 66,79,73,78,75 + .byte 66,79,73,78,75 + .byte 66,79,73,78,75 + .byte 66,79,73,78,75 + .byte 66,79,73,78,75 + .byte 66,79,73,78,75 +! + +! ; examples from book + ; examples from book +! + +! .SDATAB 2,"AAAAA" + .byte 65,65,65,65,65 + .byte 65,65,65,65,65 +! .SDATAB 2,"""BBB""" + .byte 34,66,66,66,34 + .byte 34,66,66,66,34 +! .SDATAB 2,"AABB"<H'07> + .byte 65,65,66,66,0 + .byte 65,65,66,66,0 +! + +! + +!a1: .SDATAZ "HI" +a1: .byte 72,73,0 +!a2: .SDATAC "HI" +a2: .byte 2,72,73 +!a3: .SDATA "HI" +a3: .byte 72,73 +!
\ No newline at end of file diff --git a/gas/testsuite/gasp/sfunc.asm b/gas/testsuite/gasp/sfunc.asm new file mode 100644 index 0000000..b59949a --- /dev/null +++ b/gas/testsuite/gasp/sfunc.asm @@ -0,0 +1,26 @@ + + .MACRO RESERVE_STR P1=0 P2 + .SDATA .SUBSTR("ABCDEFG",\P1,\P2) + .ENDM + + RESERVE_STR 2,2 + RESERVE_STR ,3 + + + .MACRO FIND_STR P1 + .DATA.W .INSTR("ABCDEFG","\P1", 0) + .ENDM + + FIND_STR CDE + FIND_STR H + + .MACRO RESERVE_LENGTH P1 + .ALIGN 4 + .SRES .LEN("\P1") + .ENDM + + RESERVE_LENGTH ABCDEF + RESERVE_LENGTH ABC + + .END + diff --git a/gas/testsuite/gasp/sfunc.err b/gas/testsuite/gasp/sfunc.err new file mode 100644 index 0000000..e69de29 --- /dev/null +++ b/gas/testsuite/gasp/sfunc.err diff --git a/gas/testsuite/gasp/sfunc.out b/gas/testsuite/gasp/sfunc.out new file mode 100644 index 0000000..50f694f --- /dev/null +++ b/gas/testsuite/gasp/sfunc.out @@ -0,0 +1,49 @@ +! + +! .MACRO RESERVE_STR P1=0 P2 +! .SDATA .SUBSTR("ABCDEFG",\P1,\P2) +! .ENDM +! + +! RESERVE_STR 2,2 +! .SDATA .SUBSTR("ABCDEFG",2,2) + .byte 67,68 +! RESERVE_STR ,3 +! .SDATA .SUBSTR("ABCDEFG",0,3) + .byte 65,66,67 +! + +! + +! .MACRO FIND_STR P1 +! .DATA.W .INSTR("ABCDEFG","\P1", 0) +! .ENDM +! + +! FIND_STR CDE +! .DATA.W .INSTR("ABCDEFG","CDE", 0) + .short 2 +! FIND_STR H +! .DATA.W .INSTR("ABCDEFG","H", 0) + .short -1 +! + +! .MACRO RESERVE_LENGTH P1 +! .ALIGN 4 +! .SRES .LEN("\P1") +! .ENDM +! + +! RESERVE_LENGTH ABCDEF +! .ALIGN 4 + .align 4 +! .SRES .LEN("ABCDEF") + .space 24 +! RESERVE_LENGTH ABC +! .ALIGN 4 + .align 4 +! .SRES .LEN("ABC") + .space 12 +! + +! .END diff --git a/gas/testsuite/gasp/t1.asm b/gas/testsuite/gasp/t1.asm new file mode 100644 index 0000000..df54c6c --- /dev/null +++ b/gas/testsuite/gasp/t1.asm @@ -0,0 +1,3 @@ + + test for eof in middle of line + .END diff --git a/gas/testsuite/gasp/t1.err b/gas/testsuite/gasp/t1.err new file mode 100644 index 0000000..e69de29 --- /dev/null +++ b/gas/testsuite/gasp/t1.err diff --git a/gas/testsuite/gasp/t1.out b/gas/testsuite/gasp/t1.out new file mode 100644 index 0000000..39230e1 --- /dev/null +++ b/gas/testsuite/gasp/t1.out @@ -0,0 +1,5 @@ +! + +! test for eof in middle of line + test for eof in middle of line +! .END diff --git a/gas/testsuite/gasp/t2.asm b/gas/testsuite/gasp/t2.asm new file mode 100644 index 0000000..38a351a --- /dev/null +++ b/gas/testsuite/gasp/t2.asm @@ -0,0 +1,8 @@ + + + test ++ continued ++ lines + + + .END diff --git a/gas/testsuite/gasp/t2.err b/gas/testsuite/gasp/t2.err new file mode 100644 index 0000000..e69de29 --- /dev/null +++ b/gas/testsuite/gasp/t2.err diff --git a/gas/testsuite/gasp/t2.out b/gas/testsuite/gasp/t2.out new file mode 100644 index 0000000..0c44e8b --- /dev/null +++ b/gas/testsuite/gasp/t2.out @@ -0,0 +1,13 @@ +! + +! + +! test +!+continued +!+lines + testcontinuedlines +! + +! + +! .END diff --git a/gas/testsuite/gasp/t3.asm b/gas/testsuite/gasp/t3.asm new file mode 100644 index 0000000..27702db --- /dev/null +++ b/gas/testsuite/gasp/t3.asm @@ -0,0 +1,12 @@ + + test base convertions + + B'1001000 + Q'210 + D'136 + H'88 + + FOOB'1001000BAR + FOOQ'210BAR + FOOD'136BAR + FOOH'88BAR diff --git a/gas/testsuite/gasp/t3.err b/gas/testsuite/gasp/t3.err new file mode 100644 index 0000000..a1e3318 --- /dev/null +++ b/gas/testsuite/gasp/t3.err @@ -0,0 +1 @@ +END missing from end of file. diff --git a/gas/testsuite/gasp/t3.out b/gas/testsuite/gasp/t3.out new file mode 100644 index 0000000..8ad150b --- /dev/null +++ b/gas/testsuite/gasp/t3.out @@ -0,0 +1,25 @@ +! + +! test base convertions + test base convertions +! + +! B'1001000 + 72 +! Q'210 + 136 +! D'136 + 136 +! H'88 + 136 +! + +! FOOB'1001000BAR + FOOB'1001000BAR +! FOOQ'210BAR + FOOQ'210BAR +! FOOD'136BAR + FOOD'136BAR +! FOOH'88BAR + FOOH'88BAR +!
\ No newline at end of file diff --git a/gas/testsuite/gasp/while.asm b/gas/testsuite/gasp/while.asm new file mode 100644 index 0000000..09143cc --- /dev/null +++ b/gas/testsuite/gasp/while.asm @@ -0,0 +1,18 @@ + donkey +bar .ASSIGNA 0 + .AWHILE \&bar LT 5 + HI BAR IS \&bar +foo .ASSIGNA 0 + .AWHILE \&foo LT 2 + HI BEFORE + .AREPEAT 2 + HI MEDIUM \&foo \&bar + .AENDR + HI AFTER +foo .ASSIGNA \&foo + 1 + .AENDW +bar .ASSIGNA \&bar + 1 + AND ITS NOW \&bar + .AENDW + .END + diff --git a/gas/testsuite/gasp/while.err b/gas/testsuite/gasp/while.err new file mode 100644 index 0000000..e69de29 --- /dev/null +++ b/gas/testsuite/gasp/while.err diff --git a/gas/testsuite/gasp/while.out b/gas/testsuite/gasp/while.out new file mode 100644 index 0000000..128aeb1 --- /dev/null +++ b/gas/testsuite/gasp/while.out @@ -0,0 +1,388 @@ +! donkey + donkey +!bar .ASSIGNA 0 +! .AWHILE \&bar LT 5 +! HI BAR IS \&bar +!foo .ASSIGNA 0 +! .AWHILE \&foo LT 2 +! HI BEFORE +! .AREPEAT 2 +! HI MEDIUM \&foo \&bar +! .AENDR +! HI AFTER +!foo .ASSIGNA \&foo + 1 +! .AENDW +!bar .ASSIGNA \&bar + 1 +! AND ITS NOW \&bar +! .AENDW +! HI BAR IS \&bar + HI BAR IS 0 +!foo .ASSIGNA 0 +! .AWHILE \&foo LT 2 +! HI BEFORE +! .AREPEAT 2 +! HI MEDIUM \&foo \&bar +! .AENDR +! HI AFTER +!foo .ASSIGNA \&foo + 1 +! .AENDW +! HI BEFORE + HI BEFORE +! .AREPEAT 2 +! HI MEDIUM \&foo \&bar +! .AENDR +! HI MEDIUM \&foo \&bar + HI MEDIUM 0 0 +! .AREPEAT 1 +! HI MEDIUM \&foo \&bar +! .AENDR +! HI MEDIUM \&foo \&bar + HI MEDIUM 0 0 +! HI AFTER + HI AFTER +!foo .ASSIGNA \&foo + 1 +! .AWHILE \&foo LT 2 +! HI BEFORE +! .AREPEAT 2 +! HI MEDIUM \&foo \&bar +! .AENDR +! HI AFTER +!foo .ASSIGNA \&foo + 1 +! .AENDW +! HI BEFORE + HI BEFORE +! .AREPEAT 2 +! HI MEDIUM \&foo \&bar +! .AENDR +! HI MEDIUM \&foo \&bar + HI MEDIUM 1 0 +! .AREPEAT 1 +! HI MEDIUM \&foo \&bar +! .AENDR +! HI MEDIUM \&foo \&bar + HI MEDIUM 1 0 +! HI AFTER + HI AFTER +!foo .ASSIGNA \&foo + 1 +! .AWHILE \&foo LT 2 +! HI BEFORE +! .AREPEAT 2 +! HI MEDIUM \&foo \&bar +! .AENDR +! HI AFTER +!foo .ASSIGNA \&foo + 1 +! .AENDW +!bar .ASSIGNA \&bar + 1 +! AND ITS NOW \&bar + AND ITS NOW 1 +! .AWHILE \&bar LT 5 +! HI BAR IS \&bar +!foo .ASSIGNA 0 +! .AWHILE \&foo LT 2 +! HI BEFORE +! .AREPEAT 2 +! HI MEDIUM \&foo \&bar +! .AENDR +! HI AFTER +!foo .ASSIGNA \&foo + 1 +! .AENDW +!bar .ASSIGNA \&bar + 1 +! AND ITS NOW \&bar +! .AENDW +! HI BAR IS \&bar + HI BAR IS 1 +!foo .ASSIGNA 0 +! .AWHILE \&foo LT 2 +! HI BEFORE +! .AREPEAT 2 +! HI MEDIUM \&foo \&bar +! .AENDR +! HI AFTER +!foo .ASSIGNA \&foo + 1 +! .AENDW +! HI BEFORE + HI BEFORE +! .AREPEAT 2 +! HI MEDIUM \&foo \&bar +! .AENDR +! HI MEDIUM \&foo \&bar + HI MEDIUM 0 1 +! .AREPEAT 1 +! HI MEDIUM \&foo \&bar +! .AENDR +! HI MEDIUM \&foo \&bar + HI MEDIUM 0 1 +! HI AFTER + HI AFTER +!foo .ASSIGNA \&foo + 1 +! .AWHILE \&foo LT 2 +! HI BEFORE +! .AREPEAT 2 +! HI MEDIUM \&foo \&bar +! .AENDR +! HI AFTER +!foo .ASSIGNA \&foo + 1 +! .AENDW +! HI BEFORE + HI BEFORE +! .AREPEAT 2 +! HI MEDIUM \&foo \&bar +! .AENDR +! HI MEDIUM \&foo \&bar + HI MEDIUM 1 1 +! .AREPEAT 1 +! HI MEDIUM \&foo \&bar +! .AENDR +! HI MEDIUM \&foo \&bar + HI MEDIUM 1 1 +! HI AFTER + HI AFTER +!foo .ASSIGNA \&foo + 1 +! .AWHILE \&foo LT 2 +! HI BEFORE +! .AREPEAT 2 +! HI MEDIUM \&foo \&bar +! .AENDR +! HI AFTER +!foo .ASSIGNA \&foo + 1 +! .AENDW +!bar .ASSIGNA \&bar + 1 +! AND ITS NOW \&bar + AND ITS NOW 2 +! .AWHILE \&bar LT 5 +! HI BAR IS \&bar +!foo .ASSIGNA 0 +! .AWHILE \&foo LT 2 +! HI BEFORE +! .AREPEAT 2 +! HI MEDIUM \&foo \&bar +! .AENDR +! HI AFTER +!foo .ASSIGNA \&foo + 1 +! .AENDW +!bar .ASSIGNA \&bar + 1 +! AND ITS NOW \&bar +! .AENDW +! HI BAR IS \&bar + HI BAR IS 2 +!foo .ASSIGNA 0 +! .AWHILE \&foo LT 2 +! HI BEFORE +! .AREPEAT 2 +! HI MEDIUM \&foo \&bar +! .AENDR +! HI AFTER +!foo .ASSIGNA \&foo + 1 +! .AENDW +! HI BEFORE + HI BEFORE +! .AREPEAT 2 +! HI MEDIUM \&foo \&bar +! .AENDR +! HI MEDIUM \&foo \&bar + HI MEDIUM 0 2 +! .AREPEAT 1 +! HI MEDIUM \&foo \&bar +! .AENDR +! HI MEDIUM \&foo \&bar + HI MEDIUM 0 2 +! HI AFTER + HI AFTER +!foo .ASSIGNA \&foo + 1 +! .AWHILE \&foo LT 2 +! HI BEFORE +! .AREPEAT 2 +! HI MEDIUM \&foo \&bar +! .AENDR +! HI AFTER +!foo .ASSIGNA \&foo + 1 +! .AENDW +! HI BEFORE + HI BEFORE +! .AREPEAT 2 +! HI MEDIUM \&foo \&bar +! .AENDR +! HI MEDIUM \&foo \&bar + HI MEDIUM 1 2 +! .AREPEAT 1 +! HI MEDIUM \&foo \&bar +! .AENDR +! HI MEDIUM \&foo \&bar + HI MEDIUM 1 2 +! HI AFTER + HI AFTER +!foo .ASSIGNA \&foo + 1 +! .AWHILE \&foo LT 2 +! HI BEFORE +! .AREPEAT 2 +! HI MEDIUM \&foo \&bar +! .AENDR +! HI AFTER +!foo .ASSIGNA \&foo + 1 +! .AENDW +!bar .ASSIGNA \&bar + 1 +! AND ITS NOW \&bar + AND ITS NOW 3 +! .AWHILE \&bar LT 5 +! HI BAR IS \&bar +!foo .ASSIGNA 0 +! .AWHILE \&foo LT 2 +! HI BEFORE +! .AREPEAT 2 +! HI MEDIUM \&foo \&bar +! .AENDR +! HI AFTER +!foo .ASSIGNA \&foo + 1 +! .AENDW +!bar .ASSIGNA \&bar + 1 +! AND ITS NOW \&bar +! .AENDW +! HI BAR IS \&bar + HI BAR IS 3 +!foo .ASSIGNA 0 +! .AWHILE \&foo LT 2 +! HI BEFORE +! .AREPEAT 2 +! HI MEDIUM \&foo \&bar +! .AENDR +! HI AFTER +!foo .ASSIGNA \&foo + 1 +! .AENDW +! HI BEFORE + HI BEFORE +! .AREPEAT 2 +! HI MEDIUM \&foo \&bar +! .AENDR +! HI MEDIUM \&foo \&bar + HI MEDIUM 0 3 +! .AREPEAT 1 +! HI MEDIUM \&foo \&bar +! .AENDR +! HI MEDIUM \&foo \&bar + HI MEDIUM 0 3 +! HI AFTER + HI AFTER +!foo .ASSIGNA \&foo + 1 +! .AWHILE \&foo LT 2 +! HI BEFORE +! .AREPEAT 2 +! HI MEDIUM \&foo \&bar +! .AENDR +! HI AFTER +!foo .ASSIGNA \&foo + 1 +! .AENDW +! HI BEFORE + HI BEFORE +! .AREPEAT 2 +! HI MEDIUM \&foo \&bar +! .AENDR +! HI MEDIUM \&foo \&bar + HI MEDIUM 1 3 +! .AREPEAT 1 +! HI MEDIUM \&foo \&bar +! .AENDR +! HI MEDIUM \&foo \&bar + HI MEDIUM 1 3 +! HI AFTER + HI AFTER +!foo .ASSIGNA \&foo + 1 +! .AWHILE \&foo LT 2 +! HI BEFORE +! .AREPEAT 2 +! HI MEDIUM \&foo \&bar +! .AENDR +! HI AFTER +!foo .ASSIGNA \&foo + 1 +! .AENDW +!bar .ASSIGNA \&bar + 1 +! AND ITS NOW \&bar + AND ITS NOW 4 +! .AWHILE \&bar LT 5 +! HI BAR IS \&bar +!foo .ASSIGNA 0 +! .AWHILE \&foo LT 2 +! HI BEFORE +! .AREPEAT 2 +! HI MEDIUM \&foo \&bar +! .AENDR +! HI AFTER +!foo .ASSIGNA \&foo + 1 +! .AENDW +!bar .ASSIGNA \&bar + 1 +! AND ITS NOW \&bar +! .AENDW +! HI BAR IS \&bar + HI BAR IS 4 +!foo .ASSIGNA 0 +! .AWHILE \&foo LT 2 +! HI BEFORE +! .AREPEAT 2 +! HI MEDIUM \&foo \&bar +! .AENDR +! HI AFTER +!foo .ASSIGNA \&foo + 1 +! .AENDW +! HI BEFORE + HI BEFORE +! .AREPEAT 2 +! HI MEDIUM \&foo \&bar +! .AENDR +! HI MEDIUM \&foo \&bar + HI MEDIUM 0 4 +! .AREPEAT 1 +! HI MEDIUM \&foo \&bar +! .AENDR +! HI MEDIUM \&foo \&bar + HI MEDIUM 0 4 +! HI AFTER + HI AFTER +!foo .ASSIGNA \&foo + 1 +! .AWHILE \&foo LT 2 +! HI BEFORE +! .AREPEAT 2 +! HI MEDIUM \&foo \&bar +! .AENDR +! HI AFTER +!foo .ASSIGNA \&foo + 1 +! .AENDW +! HI BEFORE + HI BEFORE +! .AREPEAT 2 +! HI MEDIUM \&foo \&bar +! .AENDR +! HI MEDIUM \&foo \&bar + HI MEDIUM 1 4 +! .AREPEAT 1 +! HI MEDIUM \&foo \&bar +! .AENDR +! HI MEDIUM \&foo \&bar + HI MEDIUM 1 4 +! HI AFTER + HI AFTER +!foo .ASSIGNA \&foo + 1 +! .AWHILE \&foo LT 2 +! HI BEFORE +! .AREPEAT 2 +! HI MEDIUM \&foo \&bar +! .AENDR +! HI AFTER +!foo .ASSIGNA \&foo + 1 +! .AENDW +!bar .ASSIGNA \&bar + 1 +! AND ITS NOW \&bar + AND ITS NOW 5 +! .AWHILE \&bar LT 5 +! HI BAR IS \&bar +!foo .ASSIGNA 0 +! .AWHILE \&foo LT 2 +! HI BEFORE +! .AREPEAT 2 +! HI MEDIUM \&foo \&bar +! .AENDR +! HI AFTER +!foo .ASSIGNA \&foo + 1 +! .AENDW +!bar .ASSIGNA \&bar + 1 +! AND ITS NOW \&bar +! .AENDW +! .END diff --git a/gas/testsuite/lib/doboth b/gas/testsuite/lib/doboth new file mode 100755 index 0000000..bcb837c --- /dev/null +++ b/gas/testsuite/lib/doboth @@ -0,0 +1,19 @@ +#!/bin/sh + +x=$1 ; shift +y=$1 ; shift + +rm tmp.0 > /dev/null 2>&1 +ln -s $x tmp.0 +$* tmp.0 > tmp.1 + +rm tmp.0 +ln -s $y tmp.0 +$* tmp.0 > tmp.2 + +rm tmp.0 + +diff -c tmp.1 tmp.2 +exit + +#eof diff --git a/gas/testsuite/lib/doobjcmp b/gas/testsuite/lib/doobjcmp new file mode 100755 index 0000000..35c32da --- /dev/null +++ b/gas/testsuite/lib/doobjcmp @@ -0,0 +1,88 @@ +#!/bin/sh +# compare two object files, in depth. + +x=$1 +y=$2 +BOTH="$1 $2" + + +# if they cmp, we're fine. +if (cmp $BOTH > /dev/null) +then + exit 0 +fi + +# otherwise, we must look closer. +if (doboth $BOTH size) +then + echo Sizes ok. +else + echo Sizes differ: + size $BOTH +# exit 1 +fi + +if (doboth $BOTH objdump +header) +then + echo Headers ok. +else + echo Header differences. +# exit 1 +fi + +if (doboth $BOTH objdump +text > /dev/null) +then + echo Text ok. +else + echo Text differences. +# doboth $BOTH objdump +text +# exit 1 +fi + +if (doboth $BOTH objdump +data > /dev/null) +then + echo Data ok. +else + echo Data differences. +# doboth $BOTH objdump +data +# exit 1 +fi + +if (doboth $BOTH objdump +symbols > /dev/null) +then + echo Symbols ok. +else + echo -n Symbol differences... + + if (doboth $BOTH dounsortsymbols) + then + echo but symbols are simply ordered differently. +# echo Now what to do about relocs'?' +# exit 1 + else + echo and symbols differ in content. + exit 1 + fi +fi + +# of course, if there were symbol diffs, then the reloc symbol indexes +# will be off. + +if (doboth $BOTH objdump -r > /dev/null) +then + echo Reloc ok. +else + echo -n Reloc differences... + + if (doboth $BOTH dounsortreloc) + then + echo but relocs are simply ordered differently. + else + echo and relocs differ in content. + exit 1 + fi +fi + +exit + +# eof diff --git a/gas/testsuite/lib/dostriptest b/gas/testsuite/lib/dostriptest new file mode 100755 index 0000000..3a51701 --- /dev/null +++ b/gas/testsuite/lib/dostriptest @@ -0,0 +1,14 @@ +#!/bin/sh + +x=striptest.xx.$$ +y=striptest.yy.$$ + +cp $1 $x +strip $x +cp $2 $y +strip $y + +doobjcmp $x $y +exit + +#eof diff --git a/gas/testsuite/lib/dotest b/gas/testsuite/lib/dotest new file mode 100755 index 0000000..a768a22 --- /dev/null +++ b/gas/testsuite/lib/dotest @@ -0,0 +1,43 @@ +#!/bin/sh +# ad hoc debug tool + +x=$1 +y=$2 + +xout=`basename $x`.xxx.$$ +yout=`basename $x`.yyy.$$ + +mkdir $xout +mkdir $yout + +for i in *.s +do + echo Testing $i... + object=`basename $i .s`.o + $x $i -o $xout/$object + $y $i -o $yout/$object + +# if they cmp, we're ok. Otherwise we have to look closer. + + if (cmp $xout/$object $yout/$object) + then + echo $i is ok. + else + if (doobjcmp $xout/$object $yout/$object) + then + echo Not the same but objcmp ok. + else + exit 1 + fi + fi + + echo +done + +rm -rf $xout $yout + +exit 0 + +# EOF + + diff --git a/gas/testsuite/lib/dounsreloc b/gas/testsuite/lib/dounsreloc new file mode 100755 index 0000000..0d69533 --- /dev/null +++ b/gas/testsuite/lib/dounsreloc @@ -0,0 +1,8 @@ +#!/bin/sh +# objdump the reloc table, but strip off the headings and reloc +# numbers and sort the result. Intended for use in comparing reloc +# tables that may not be in the same order. + +objdump +reloc +omit-relocation-numbers +omit-symbol-numbers $1 \ + | sort +#eof diff --git a/gas/testsuite/lib/dounssym b/gas/testsuite/lib/dounssym new file mode 100755 index 0000000..a44da62 --- /dev/null +++ b/gas/testsuite/lib/dounssym @@ -0,0 +1,8 @@ +#!/bin/sh +# objdump the symbol table, but strip off the headings and symbol +# numbers and sort the result. Intended for use in comparing symbol +# tables that may not be in the same order. + +objdump +symbols +omit-symbol-numbers $1 \ + | sort +#eof diff --git a/gas/testsuite/lib/gas-defs.exp b/gas/testsuite/lib/gas-defs.exp new file mode 100644 index 0000000..757718f --- /dev/null +++ b/gas/testsuite/lib/gas-defs.exp @@ -0,0 +1,574 @@ +# Copyright (C) 1993, 1994, 1997 Free Software Foundation, Inc. + +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; either version 2 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + +# Please email any bugs, comments, and/or additions to this file to: +# DejaGnu@cygnus.com + +# This file was written by Ken Raeburn (raeburn@cygnus.com). + +proc gas_version {} { + global AS + catch "exec $AS -version < /dev/null" tmp + # Should find a way to discard constant parts, keep whatever's + # left, so the version string could be almost anything at all... + regexp "\[^\n\]* (cygnus-|)(\[-0-9.a-zA-Z-\]+)\[\r\n\].*" $tmp version cyg number + if ![info exists number] then { + return "[which $AS] (no version number)\n" + } + clone_output "[which $AS] $number\n" + unset version +} + +proc gas_run { prog as_opts redir } { + global AS + global ASFLAGS + global comp_output + global srcdir + global subdir + global host_triplet + + verbose "Executing $srcdir/lib/run $AS $ASFLAGS $as_opts $srcdir/$subdir/$prog $redir" + catch "exec $srcdir/lib/run $AS $ASFLAGS $as_opts $srcdir/$subdir/$prog $redir" comp_output + set comp_output [prune_warnings $comp_output] + verbose "output was $comp_output" + return [list $comp_output ""]; +} + +proc all_ones { args } { + foreach x $args { if [expr $x!=1] { return 0 } } + return 1 +} + +proc gas_start { prog as_opts } { + global AS + global ASFLAGS + global srcdir + global subdir + global spawn_id + + verbose "Starting $AS $ASFLAGS $as_opts $prog" 2 + catch { + spawn -noecho -nottycopy $srcdir/lib/run $AS $ASFLAGS $as_opts $srcdir/$subdir/$prog + } foo + if ![regexp {^[0-9]+} $foo] then { + perror "Can't run $subdir/$prog: $foo" + } +} + +proc gas_finish { } { + global spawn_id + + catch "close" + catch "wait" +} + +proc want_no_output { testname } { + global comp_output + + if ![string match "" $comp_output] then { + send_log "$comp_output\n" + verbose "$comp_output" 3 + } + if [string match "" $comp_output] then { + pass "$testname" + return 1 + } else { + fail "$testname" + return 0 + } +} + +proc gas_test_old { file as_opts testname } { + gas_run $file $as_opts "" + return [want_no_output $testname] +} + +proc gas_test { file as_opts var_opts testname } { + global comp_output + + set i 0 + foreach word $var_opts { + set ignore_stdout($i) [string match "*>" $word] + set opt($i) [string trim $word {>}] + incr i + } + set max [expr 1<<$i] + for {set i 0} {[expr $i<$max]} {incr i} { + set maybe_ignore_stdout "" + set extra_opts "" + for {set bit 0} {(1<<$bit)<$max} {incr bit} { + set num [expr 1<<$bit] + if [expr $i&$num] then { + set extra_opts "$extra_opts $opt($bit)" + if $ignore_stdout($bit) then { + set maybe_ignore_stdout ">/dev/null" + } + } + } + set extra_opts [string trim $extra_opts] + gas_run $file "$as_opts $extra_opts" $maybe_ignore_stdout + + # Should I be able to use a conditional expression here? + if [string match "" $extra_opts] then { + want_no_output $testname + } else { + want_no_output "$testname ($extra_opts)" + } + } + if [info exists errorInfo] then { + unset errorInfo + } +} + +proc gas_test_ignore_stdout { file as_opts testname } { + global comp_output + + gas_run $file $as_opts ">/dev/null" + want_no_output $testname +} + +proc gas_test_error { file as_opts testname } { + global comp_output + + gas_run $file $as_opts ">/dev/null" + if ![string match "" $comp_output] then { + send_log "$comp_output\n" + verbose "$comp_output" 3 + } + if [string match "" $comp_output] then { + fail "$testname" + } else { + pass "$testname" + } +} + +proc gas_exit {} {} + +proc gas_init { args } { + global target_cpu + global target_cpu_family + global target_family + global target_vendor + global target_os + global stdoptlist + + case "$target_cpu" in { + "m68???" { set target_cpu_family m68k } + "i[34]86" { set target_cpu_family i386 } + default { set target_cpu_family $target_cpu } + } + + set target_family "$target_cpu_family-$target_vendor-$target_os" + set stdoptlist "-a>" + + if ![istarget "*-*-*"] { + perror "Target name [istarget] is not a triple." + } + # Need to return an empty string. + return +} + + +# run_dump_test FILE +# +# Assemble a .s file, then run some utility on it and check the output. +# +# There should be an assembly language file named FILE.s in the test +# suite directory, and a pattern file called FILE.d. `run_dump_test' +# will assemble FILE.s, run some tool like `objdump', `objcopy', or +# `nm' on the .o file to produce textual output, and then analyze that +# with regexps. The FILE.d file specifies what program to run, and +# what to expect in its output. +# +# The FILE.d file begins with zero or more option lines, which specify +# flags to pass to the assembler, the program to run to dump the +# assembler's output, and the options it wants. The option lines have +# the syntax: +# +# # OPTION: VALUE +# +# OPTION is the name of some option, like "name" or "objdump", and +# VALUE is OPTION's value. The valid options are described below. +# Whitespace is ignored everywhere, except within VALUE. The option +# list ends with the first line that doesn't match the above syntax +# (hmm, not great for error detection). +# +# The interesting options are: +# +# name: TEST-NAME +# The name of this test, passed to DejaGNU's `pass' and `fail' +# commands. If omitted, this defaults to FILE, the root of the +# .s and .d files' names. +# +# as: FLAGS +# When assembling FILE.s, pass FLAGS to the assembler. +# +# PROG: PROGRAM-NAME +# The name of the program to run to analyze the .o file produced +# by the assembler. This can be omitted; run_dump_test will guess +# which program to run by seeing which of the flags options below +# is present. +# +# objdump: FLAGS +# nm: FLAGS +# objcopy: FLAGS +# Use the specified program to analyze the .o file, and pass it +# FLAGS, in addition to the .o file name. +# +# source: SOURCE +# Assemble the file SOURCE.s. If omitted, this defaults to FILE.s. +# This is useful if several .d files want to share a .s file. +# +# Each option may occur at most once. +# +# After the option lines come regexp lines. `run_dump_test' calls +# `regexp_diff' to compare the output of the dumping tool against the +# regexps in FILE.d. `regexp_diff' is defined later in this file; see +# further comments there. + +proc run_dump_test { name } { + global subdir srcdir + global OBJDUMP NM AS OBJCOPY + global OBJDUMPFLAGS NMFLAGS ASFLAGS OBJCOPYFLAGS + global host_triplet + + if [string match "*/*" $name] { + set file $name + set name [file tail $name] + } else { + set file "$srcdir/$subdir/$name" + } + set opt_array [slurp_options "${file}.d"] + if { $opt_array == -1 } { + unresolved $subdir/$name + return + } + set opts(as) {} + set opts(objdump) {} + set opts(nm) {} + set opts(objcopy) {} + set opts(name) {} + set opts(PROG) {} + set opts(source) {} + + foreach i $opt_array { + set opt_name [lindex $i 0] + set opt_val [lindex $i 1] + if ![info exists opts($opt_name)] { + perror "unknown option $opt_name in file $file.d" + unresolved $subdir/$name + return + } + if [string length $opts($opt_name)] { + perror "option $opt_name multiply set in $file.d" + unresolved $subdir/$name + return + } + set opts($opt_name) $opt_val + } + + if {$opts(PROG) != ""} { + switch -- $opts(PROG) { + objdump + { set program objdump } + nm + { set program nm } + objcopy + { set program objcopy } + default + { perror "unrecognized program option $opts(PROG) in $file.d" + unresolved $subdir/$name + return } + } + } else { + # Guess which program to run, by seeing which option was specified. + set program "" + foreach p {objdump objcopy nm} { + if {$opts($p) != ""} { + if {$program != ""} { + perror "ambiguous dump program in $file.d" + unresolved $subdir/$name + return + } else { + set program $p + } + } + } + if {$program == ""} { + perror "dump program unspecified in $file.d" + unresolved $subdir/$name + return + } + } + + set progopts1 $opts($program) + eval set progopts \$[string toupper $program]FLAGS + eval set binary \$[string toupper $program] + if { $opts(name) == "" } { + set testname "$subdir/$name" + } else { + set testname $opts(name) + } + + if { $opts(source) == "" } { + set sourcefile ${file}.s + } else { + set sourcefile $srcdir/$subdir/$opts(source) + } + + send_log "$AS $ASFLAGS $opts(as) -o dump.o $sourcefile\n" + catch "exec $srcdir/lib/run $AS $ASFLAGS $opts(as) -o dump.o $sourcefile" comp_output + set comp_output [prune_warnings $comp_output] + + if ![string match "" $comp_output] then { + send_log "$comp_output\n" + verbose "$comp_output" 3 + fail $testname + return + } + + if { [which $binary] == 0 } { + untested $testname + return + } + + if { $progopts1 == "" } { set $progopts1 "-r" } + verbose "running $binary $progopts $progopts1" 3 + + # Objcopy, unlike the other two, won't send its output to stdout, + # so we have to run it specially. + if { $program == "objcopy" } { + send_log "$binary $progopts $progopts1 dump.o dump.out\n" + catch "exec $binary $progopts $progopts1 dump.o dump.out" comp_output + set comp_output [prune_warnings $comp_output] + if ![string match "" $comp_output] then { + send_log "$comp_output\n" + fail $testname + return + } + } else { + send_log "$binary $progopts $progopts1 dump.o > dump.out\n" + catch "exec $binary $progopts $progopts1 dump.o > dump.out" comp_output + set comp_output [prune_warnings $comp_output] + if ![string match "" $comp_output] then { + send_log "$comp_output\n" + fail $testname + return + } + } + + verbose_eval {[file_contents "dump.out"]} 3 + if { [regexp_diff "dump.out" "${file}.d"] } then { + fail $testname + verbose "output is [file_contents "dump.out"]" 2 + return + } + + pass $testname +} + +proc slurp_options { file } { + if [catch { set f [open $file r] } x] { + #perror "couldn't open `$file': $x" + perror "$x" + return -1 + } + set opt_array {} + # whitespace expression + set ws {[ ]*} + set nws {[^ ]*} + # whitespace is ignored anywhere except within the options list; + # option names are alphabetic only + set pat "^#${ws}(\[a-zA-Z\]*)$ws:${ws}(.*)$ws\$" + while { [gets $f line] != -1 } { + set line [string trim $line] + # Whitespace here is space-tab. + if [regexp $pat $line xxx opt_name opt_val] { + # match! + lappend opt_array [list $opt_name $opt_val] + } else { + break + } + } + close $f + return $opt_array +} + +proc objdump { opts } { + global OBJDUMP + global comp_output + global host_triplet + + catch "exec $OBJDUMP $opts" comp_output + set comp_output [prune_warnings $comp_output] + verbose "objdump output=$comp_output\n" 3 +} + +proc objdump_start_no_subdir { prog opts } { + global OBJDUMP + global srcdir + global spawn_id + + verbose "Starting $OBJDUMP $opts $prog" 2 + catch { + spawn -noecho -nottyinit $srcdir/lib/run $OBJDUMP $opts $prog + } foo + if ![regexp {^[0-9]+} $foo] then { + perror "Can't run $prog: $foo" + } +} + +proc objdump_finish { } { + global spawn_id + + catch "close" + catch "wait" +} + +# Default timeout is 10 seconds, loses on a slow machine. But some +# configurations of dejagnu may override it. +if {$timeout<120} then { set timeout 120 } + +expect_after -i { + timeout { perror "timeout" } + "virtual memory exhausted" { perror "virtual memory exhausted" } + buffer_full { perror "buffer full" } + eof { perror "eof" } +} + +# regexp_diff, based on simple_diff taken from ld test suite +# compares two files line-by-line +# file1 contains strings, file2 contains regexps and #-comments +# blank lines are ignored in either file +# returns non-zero if differences exist +# +proc regexp_diff { file_1 file_2 } { + + set eof -1 + set end_1 0 + set end_2 0 + set differences 0 + set diff_pass 0 + + if [file exists $file_1] then { + set file_a [open $file_1 r] + } else { + warning "$file_1 doesn't exist" + return 1 + } + + if [file exists $file_2] then { + set file_b [open $file_2 r] + } else { + fail "$file_2 doesn't exist" + close $file_a + return 1 + } + + verbose " Regexp-diff'ing: $file_1 $file_2" 2 + + while { 1 } { + set line_a "" + set line_b "" + while { [string length $line_a] == 0 } { + if { [gets $file_a line_a] == $eof } { + set end_1 1 + break + } + } + while { [string length $line_b] == 0 || [string match "#*" $line_b] } { + if [ string match "#pass" $line_b ] { + set end_2 1 + set diff_pass 1 + break + } + if { [gets $file_b line_b] == $eof } { + set end_2 1 + break + } + } + + if { $diff_pass } { + break + } elseif { $end_1 && $end_2 } { + break + } elseif { $end_1 } { + send_log "extra regexps in $file_2 starting with \"^$line_b$\"\nEOF from $file_1\n" + verbose "extra regexps in $file_2 starting with \"^$line_b$\"\nEOF from $file_1" 3 + set differences 1 + break + } elseif { $end_2 } { + send_log "extra lines in $file_1 starting with \"^$line_a$\"\nEOF from $file_2\n" + verbose "extra lines in $file_1 starting with \"^$line_a$\"\nEOF from $file_2\n" 3 + set differences 1 + break + } else { + verbose "regexp \"^$line_b$\"\nline \"$line_a\"" 3 + if ![regexp "^$line_b$" "$line_a"] { + send_log "regexp_diff match failure\n" + send_log "regexp \"^$line_b$\"\nline \"$line_a\"\n" + set differences 1 + break + } + } + } + + if { $differences == 0 && !$diff_pass && [eof $file_a] != [eof $file_b] } { + send_log "$file_1 and $file_2 are different lengths\n" + verbose "$file_1 and $file_2 are different lengths" 3 + set differences 1 + } + + close $file_a + close $file_b + + return $differences +} + +proc file_contents { filename } { + set file [open $filename r] + set contents [read $file] + close $file + return $contents +} + +proc verbose_eval { expr { level 1 } } { + global verbose + if $verbose>$level then { eval verbose "$expr" $level } +} + +# This definition is taken from an unreleased version of DejaGnu. Once +# that version gets released, and has been out in the world for a few +# months at least, it may be safe to delete this copy. +if ![string length [info proc prune_warnings]] { + # + # prune_warnings -- delete various system verbosities from TEXT. + # + # An example is: + # ld.so: warning: /usr/lib/libc.so.1.8.1 has older revision than expected 9 + # + # Sites with particular verbose os's may wish to override this in site.exp. + # + proc prune_warnings { text } { + # This is from sun4's. Do it for all machines for now. + # The "\\1" is to try to preserve a "\n" but only if necessary. + regsub -all "(^|\n)(ld.so: warning:\[^\n\]*\n?)+" $text "\\1" text + + # It might be tempting to get carried away and delete blank lines, etc. + # Just delete *exactly* what we're ask to, and that's it. + return $text + } +} diff --git a/gas/testsuite/lib/gas-dg.exp b/gas/testsuite/lib/gas-dg.exp new file mode 100644 index 0000000..92f7f31 --- /dev/null +++ b/gas/testsuite/lib/gas-dg.exp @@ -0,0 +1,53 @@ +# Define gas callbacks for dg.exp. + +load_lib dg.exp + +# The use of this function is still in a bit of flux. +# It should be theoretically possible to assemble, link, and run a file +# but we currently don't support that. Assembler testcases aren't usually +# that elaborate anyway. :-) + +proc gas-dg-test { prog do_what tool_flags } { + # FIXME: the gas testsuite doesn't define tmpdir. Use outdir? + set output_file "./a.out" + + switch $do_what { + "preprocess" { + } + "assemble" { + } + "link" { + } + "run" { + # This is the only place where we care if an executable was + # created or not. If it was, dg.exp will try to run it. + catch "exec rm -f $output_file" + } + default { + perror "$do_what: not a valid dg-do keyword" + return "" + } + } + + # gas_start prepends $srcdir/$subdir so we must remove it from PROG + # if present. First remove extraneous //'s. + global srcdir subdir + set dir "$srcdir/$subdir" + regsub -all "//" $dir "/" dir + regsub -all "//" $prog "/" prog + if [string match "$dir/*" $prog] { + regsub "$dir" $prog "" prog + } + + # FIXME: This should be gas_start but it doesn't set comp_output. + return [gas_run $prog $tool_flags ""] +} + +proc gas-dg-prune { system text } { + #send_user "Before:$text\n" + regsub -all "(^|\n)\[^\n\]*: Assembler messages:\[^\n\]*" $text "" text + regsub -all "(^|\n)\[^\n\]*: End of file not at end\[^\n\]*Newline inserted." $text "" text + #send_user "After:$text\n" + + return $text +} diff --git a/gas/testsuite/lib/run b/gas/testsuite/lib/run new file mode 100755 index 0000000..d4150f8 --- /dev/null +++ b/gas/testsuite/lib/run @@ -0,0 +1,2 @@ +#!/bin/sh +eval exec $@ |