6 files changed, 402 insertions, 0 deletions
diff --git a/gas/testsuite/ChangeLog b/gas/testsuite/ChangeLog
index 001af60..9db1287 100644
--- a/gas/testsuite/ChangeLog
+++ b/gas/testsuite/ChangeLog
@@ -1,3 +1,12 @@
+Sun Sep 04 17:58:10 1994	Richard Earnshaw (rwe@pegasus.esprit.ec.org)
+
+	* gas/arm/*: New subtree.  Add ARM tests.
+
+Mon Aug  8 12:13:31 1994  Jeff Law  (law@snake.cs.utah.edu)
+
+	* gas/hppa/unsorted/unsorted.exp: Accept any character
+	between foo's type and foo itself.
+
 Fri Jul 15 19:09:25 1994  Ken Raeburn  (raeburn@cujo.cygnus.com)
 
 	* lib/gas-defs.exp (run_dump_test): New routine for running the
@@ -10,6 +19,9 @@ Fri Jul 15 19:09:25 1994  Ken Raeburn  (raeburn@cujo.cygnus.com)
 	(regexp_diff): Always return a value.  Fix bugs in actually doing
 	the regexp test.
 
+	* gas/sun4/addend.exp: Use run_dump_test.
+	* gas/sun4/addend.d: Fix regular expressions so that they work.
+
 Thu Jul  7 11:55:33 1994  Jeff Law  (law@snake.cs.utah.edu)
 
 	* gas/hppa/reloc/relocreduce2.s: More relocation reduction tests.
diff --git a/gas/testsuite/gas/arm/arm6.s b/gas/testsuite/gas/arm/arm6.s
new file mode 100644
index 0000000..209e1ca
--- /dev/null
+++ b/gas/testsuite/gas/arm/arm6.s
@@ -0,0 +1,13 @@
+.text
+.align 0
+	
+	mrs	r8, CPSR
+	mrseq	r9, CPSR_all
+	mrs	r1, CPSR_flg
+	mrs	r2, SPSR
+
+	msr	CPSR, r1
+	msrne	CPSR_flg, #0xf0000000
+	msr	SPSR_flg, r8
+	msr	SPSR_all, r9
+
diff --git a/gas/testsuite/gas/arm/copro.s b/gas/testsuite/gas/arm/copro.s
new file mode 100644
index 0000000..46c9b92
--- /dev/null
+++ b/gas/testsuite/gas/arm/copro.s
@@ -0,0 +1,24 @@
+.text
+.align 0
+	cdp	p1, 4, cr1, cr2, cr3
+	cdpeq	4, 3, c1, c4, cr5, 5
+
+	ldc	5, cr9, [r3]
+	ldcl	1, cr14, [r1, #32]
+	ldcmi	0, cr0, [r2, #1020]!
+	ldcpll	p7, c1, [r3], #64
+	ldc	p0, c8, foo
+foo:
+
+	stc	5, cr0, [r3]
+	stcl	3, cr15, [r0, #8]
+	stceq	p4, cr12, [r2, #100]!
+	stccc	p6, c8, [r4], #48
+	stc	p1, c7, bar
+bar:
+
+	mrc	2, 3, r5, c1, c2
+	mrcge	p4, 5, r15, cr1, cr2, 7
+
+	mcr	p7, 1, r15, cr1, cr1
+	mcrlt	5, 1, r8, cr2, cr9, 0
diff --git a/gas/testsuite/gas/arm/float.s b/gas/testsuite/gas/arm/float.s
new file mode 100644
index 0000000..9cf52ad
--- /dev/null
+++ b/gas/testsuite/gas/arm/float.s
@@ -0,0 +1,150 @@
+.text
+.align 0
+	mvfe	f0, f1
+	mvfeqe	f3, f5
+	mvfeqd	f4, #1.0
+	mvfs	f4, f7
+	mvfsp	f0, f1
+	mvfdm	f3, f4
+	mvfez	f7, f7
+
+	adfe	f0, f1, #2.0
+	adfeqe	f1, f2, #0.5
+	adfsm	f3, f4, f5
+	
+	sufd	f0, f0, #2.0
+	sufs	f1, f2, #10.0
+	sufneez f3, f4, f5
+
+	rsfs	f1, f1, #0.0
+	rsfdp	f3, f0, #5.0
+	rsfled	f7, f6, f0
+
+	mufd	f0, f0, f0
+	mufez	f1, f2, #3.0
+	mufals	f0, f0, #4.0
+
+	dvfd	f0, f0, #1.0000
+	dvfez	f0, f1, #10e0
+	dvfmism f3, f4, f5
+
+	rdfe	f0, f1, #1.0e1
+	rdfs	f3, f7, #0f1
+	rdfccdp	f4, f4, f3
+
+	powd	f0, f2, f3
+	pows	f1, f3, #0e1e1
+	powcsez	f4, f7, #1
+
+	rpws	f7, f6, f7
+	rpweqd	f0, f1, f2
+	rpwem	f2, f2, f3
+
+	rmfd	f1, f2, #3
+	rmfvss	f3, f4, f4
+	rmfep	f4, f7, f0
+
+	fmls	f0, f1, f2
+	fmleqs	f1, f3, f5
+	fmlplsz	f4, f6, f0
+
+	fdvs	f1, f3, #10
+	fdvsp	f0, f1, f2
+	fdvhssm	f4, f4, f4
+
+	frds	f1, f1, #1.0
+	frdgts	f2, f1, f0
+	frdgtsz	f4, f4, f5
+
+	pold	f0, f1, f2
+	polsz	f4, f6, #3.0
+	poleqe	f5, f6, f7
+
+	mnfs	f0, f1
+	mnfd	f0, #3.0
+	mnfez	f0, #4.0
+	mnfeqez f0, f5
+	mnfsp	f0, f4
+	mnfdm	f1, f7
+
+	absd	f0, f1
+	abssp	f1, #3.0
+	abseqe	f4, f5
+
+	rnds	f1, f2
+	rndd	f3, f4
+	rndeqez	f6, #4.0
+
+	sqts	f5, f5
+	sqtdp	f6, f6
+	sqtplez f7, f6
+
+	logs	f0, #10
+	loge	f0, #0f10
+	lognedz	f0, f1
+
+	lgne	f1, f2
+	lgndz	f1, f3
+	lgnvcs	f3, f4
+
+	exps	f1, f3
+	expem	f3, #10.0
+	exppld	f6, f7
+
+	sind	f0, f1
+	sinsm	f1, f2
+	singte	f4, #5
+
+	cosd	f1, f3
+	cosem	f4, f5
+	cosnedp	f6, f1
+
+	tane	f1, f5
+	tansz	f4, f7
+	tangedz	f1, #4.0
+
+	asne	f4, f5
+	asnsp	f6, #5e-1
+	asnmidz	f5, f5
+
+	acss	f5, f6
+	acsd	f6, f0
+	acshsem	f1, #0.05e1
+
+	atne	f0, f5
+	atnsz	f1, #5
+	atnltd	f3, f2
+
+	urde	f5, f4
+	nrme	f6, f5
+	nrmpldz	f7, f5
+
+	fltsp	f0, r8
+	flte	f1, r0
+	flteqdz	f5, r7
+
+	fix	r0, f1
+	fixz	r1, f7
+	fixcsm	r5, f5
+
+	wfc	r0
+	wfs	r1
+	rfseq	r2
+	rfc	r4
+
+	cmf	f0, #1
+	cmf	f1, f2
+	cmfeq	f0, f1
+
+	cnf	f0, #3
+	cnf	f1, #0.5
+	cnfvs	f3, f4
+
+	cmfe	f0, f1
+	cmfeeq	f1, f2
+	cmfeqe	f3, #5.0
+
+	cnfe	f1, f3
+	cnfeeq	f3, f4
+	cnfeqe	f4, f7
+	cnfale	f4, #5.0
diff --git a/gas/testsuite/gas/arm/gas.exp b/gas/testsuite/gas/arm/gas.exp
new file mode 100644
index 0000000..657a1ff
--- /dev/null
+++ b/gas/testsuite/gas/arm/gas.exp
@@ -0,0 +1,14 @@
+#
+# Some ARM tests
+#
+if [istarget arm-*-riscix*] then {
+    gas_test "inst.s" "" $stdoptlist "Basic instruction set"
+
+    gas_test "arm3.s" "" $stdoptlist "Arm 3 instructions"
+
+    gas_test "arm6.s" "" $stdoptlist "Arm 6 instructions"
+
+    gas_test "copro.s" "" $stdoptlist "Co processor instructions"
+
+    gas_test "float.s" "" $stdoptlist "Core floating point instructions"
+}
diff --git a/gas/testsuite/gas/arm/inst.s b/gas/testsuite/gas/arm/inst.s
new file mode 100644
index 0000000..ff092c9
--- /dev/null
+++ b/gas/testsuite/gas/arm/inst.s
@@ -0,0 +1,189 @@
+@	Test file for ARM/GAS -- basic instructions
+
+.text
+.align
+	mov	r0, #0
+	mov	r1, r2
+	mov	r3, r4, lsl #3
+	mov	r5, r6, lsr r7
+	mov	r8, r9, asr r10
+	mov	r11, r12, asl r13
+	mov	r14, r15, rrx
+	moval	r1, r2
+	moveq	r2, r3
+	movne	r4, r5
+	movlt	r6, r7
+	movge	r8, r9
+	movle	r10, r11
+	movgt	r12, r13
+	movcc	r1, r2
+	movcs	r1, r3
+	movmi	r3, r6
+	movpl	r7, r9
+	movvs	r1, r8
+	movvc	r9, r1, lsr #31
+	movhi	r8, r15
+	movls	r15, r14
+	movhs	r9, r8
+	movul	r1, r3
+	movs	r0, r8
+	movuls	r0, r7
+	
+	add	r0, r1, #10
+	add	r2, r3, r4
+	add	r5, r6, r7, asl #5
+	add	r1, r2, r3, lsl r1
+
+	and	r0, r1, #10
+	and	r2, r3, r4
+	and	r5, r6, r7, asl #5
+	and	r1, r2, r3, lsl r1
+
+	eor	r0, r1, #10
+	eor	r2, r3, r4
+	eor	r5, r6, r7, asl #5
+	eor	r1, r2, r3, lsl r1
+
+	sub	r0, r1, #10
+	sub	r2, r3, r4
+	sub	r5, r6, r7, asl #5
+	sub	r1, r2, r3, lsl r1
+
+	adc	r0, r1, #10
+	adc	r2, r3, r4
+	adc	r5, r6, r7, asl #5
+	adc	r1, r2, r3, lsl r1
+
+	sbc	r0, r1, #10
+	sbc	r2, r3, r4
+	sbc	r5, r6, r7, asl #5
+	sbc	r1, r2, r3, lsl r1
+
+	rsb	r0, r1, #10
+	rsb	r2, r3, r4
+	rsb	r5, r6, r7, asl #5
+	rsb	r1, r2, r3, lsl r1
+
+	rsc	r0, r1, #10
+	rsc	r2, r3, r4
+	rsc	r5, r6, r7, asl #5
+	rsc	r1, r2, r3, lsl r1
+
+	orr	r0, r1, #10
+	orr	r2, r3, r4
+	orr	r5, r6, r7, asl #5
+	orr	r1, r2, r3, lsl r1
+
+	bic	r0, r1, #10
+	bic	r2, r3, r4
+	bic	r5, r6, r7, asl #5
+	bic	r1, r2, r3, lsl r1
+
+	mvn	r0, #10
+	mvn	r2, r4
+	mvn	r5, r7, asl #5
+	mvn	r1, r3, lsl r1
+
+	tst	r0, #10
+	tst	r2, r4
+	tst	r5, r7, asl #5
+	tst	r1, r3, lsl r1
+
+	teq	r0, #10
+	teq	r2, r4
+	teq	r5, r7, asl #5
+	teq	r1, r3, lsl r1
+
+	cmp	r0, #10
+	cmp	r2, r4
+	cmp	r5, r7, asl #5
+	cmp	r1, r3, lsl r1
+
+	cmn	r0, #10
+	cmn	r2, r4
+	cmn	r5, r7, asl #5
+	cmn	r1, r3, lsl r1
+
+	teqp	r0, #10
+	teqp	r2, r4
+	teqp	r5, r7, asl #5
+	teqp	r1, r3, lsl r1
+
+	cmnp	r0, #10
+	cmnp	r2, r4
+	cmnp	r5, r7, asl #5
+	cmnp	r1, r3, lsl r1
+
+	cmpp	r0, #10
+	cmpp	r2, r4
+	cmpp	r5, r7, asl #5
+	cmpp	r1, r3, lsl r1
+
+	tstp	r0, #10
+	tstp	r2, r4
+	tstp	r5, r7, asl #5
+	tstp	r1, r3, lsl r1
+
+	mul	r0, r1, r2
+	muls	r1, r2, r3
+	mulne	r0, r1, r0
+	mullss	r9, r8, r7
+
+	mla	r1, r9, r10, r11
+	mlas	r3, r4, r9, r12
+	mlalt	r9, r8, r7, r13
+	mlages	r4, r1, r3, r14
+
+	ldr	r0, [r1]
+	ldr	r1, [r1, r2]
+	ldr	r2, [r3, r4]!
+	ldr	r2, [r2, #32]
+	ldr	r2, [r3, r4, lsr #8]
+	ldreq	r4, [r5, r4, asl #9]!
+	ldrne	r4, [r5], #6
+	ldrt	r1, [r2], r3
+	ldr	r2, [r4], r5, lsr #8
+foo:
+	ldr	r0, foo
+	ldrb	r3, [r4]
+	ldrnebt	r5, [r8]
+	
+	str	r0, [r1]
+	str	r1, [r1, r2]
+	str	r3, [r3, r4]!
+	str	r2, [r2, #32]
+	str	r2, [r3, r4, lsr #8]
+	streq	r4, [r5, r4, asl #9]!
+	strne	r4, [r5], #6
+	str	r1, [r2], r3
+	strt	r2, [r4], r5, lsr #8
+	str	r1, bar
+bar:
+	stralb	r1, [r7]
+	strbt	r2, [r0]
+
+	ldmia	r0, {r1}
+	ldmeqib	r2, {r3, r4, r5}
+	ldmalda	r3, {r0-r15}^
+	ldmdb	r11!, {r0-r8, r10}
+	ldmed	r1, {r0, r1, r2}|0xf0
+	ldmfd	r2, {r3, r4}+{r5, r6, r7, r8}
+	ldmea	r3, 3
+	ldmfa	r4!, {r8, r9}^
+	
+	stmia	r0, {r1}
+	stmeqib	r2, {r3, r4, r5}
+	stmalda	r3, {r0-r15}^
+	stmdb	r10!, {r0-r8, r10}
+	stmed	r1, {r0, r1, r2}
+	stmfd	r2, {r3, r4}
+	stmea	r3, 3
+	stmfa	r4!, {r8, r9}^
+
+	swi	0x123456
+	swihs	0x33
+
+	bl	_wombat
+	blpl	bar
+	b	_wibble
+	ble	testerfunc