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-rw-r--r--gas/doc/as.texinfo10
-rw-r--r--gas/doc/c-mips.texi6
2 files changed, 11 insertions, 5 deletions
diff --git a/gas/doc/as.texinfo b/gas/doc/as.texinfo
index e654c24..e826523 100644
--- a/gas/doc/as.texinfo
+++ b/gas/doc/as.texinfo
@@ -383,7 +383,8 @@ gcc(1), ld(1), and the Info entries for @file{binutils} and @file{ld}.
[@b{-non_shared}] [@b{-xgot}] [@b{--membedded-pic}]
[@b{-mabi}=@var{ABI}] [@b{-32}] [@b{-n32}] [@b{-64}] [@b{-mfp32}] [@b{-mgp32}]
[@b{-march}=@var{CPU}] [@b{-mtune}=@var{CPU}] [@b{-mips1}] [@b{-mips2}]
- [@b{-mips3}] [@b{-mips4}] [@b{-mips5}] [@b{-mips32}] [@b{-mips64}]
+ [@b{-mips3}] [@b{-mips4}] [@b{-mips5}] [@b{-mips32}] [@b{-mips32r2}]
+ [@b{-mips64}]
[@b{-construct-floats}] [@b{-no-construct-floats}]
[@b{-trap}] [@b{-no-break}] [@b{-break}] [@b{-no-trap}]
[@b{-mfix7000}] [@b{-mno-fix7000}]
@@ -909,13 +910,16 @@ Generate ``little endian'' format output.
@itemx -mips4
@itemx -mips5
@itemx -mips32
+@itemx -mips32r2
@itemx -mips64
Generate code for a particular @sc{mips} Instruction Set Architecture level.
@samp{-mips1} is an alias for @samp{-march=r3000}, @samp{-mips2} is an
alias for @samp{-march=r6000}, @samp{-mips3} is an alias for
@samp{-march=r4000} and @samp{-mips4} is an alias for @samp{-march=r8000}.
-@samp{-mips5}, @samp{-mips32}, and @samp{-mips64} correspond to generic
-@samp{MIPS V}, @samp{MIPS32}, and @samp{MIPS64} ISA processors,
+@samp{-mips5}, @samp{-mips32}, @samp{-mips32r2}, and @samp{-mips64}
+correspond to generic
+@samp{MIPS V}, @samp{MIPS32}, @samp{MIPS32 Release 2}, and
+@samp{MIPS64} ISA processors,
respectively.
@item -march=@var{CPU}
diff --git a/gas/doc/c-mips.texi b/gas/doc/c-mips.texi
index 6b82fd0..621efe8 100644
--- a/gas/doc/c-mips.texi
+++ b/gas/doc/c-mips.texi
@@ -65,13 +65,15 @@ to select big-endian output, and @samp{-EL} for little-endian.
@itemx -mips4
@itemx -mips5
@itemx -mips32
+@itemx -mips32r2
@itemx -mips64
Generate code for a particular MIPS Instruction Set Architecture level.
@samp{-mips1} corresponds to the @sc{r2000} and @sc{r3000} processors,
@samp{-mips2} to the @sc{r6000} processor, @samp{-mips3} to the
@sc{r4000} processor, and @samp{-mips4} to the @sc{r8000} and
-@sc{r10000} processors. @samp{-mips5}, @samp{-mips32}, and
-@samp{-mips64} correspond to generic @sc{MIPS V}, @sc{MIPS32}, and
+@sc{r10000} processors. @samp{-mips5}, @samp{-mips32}, @samp{-mips32r2}, and
+@samp{-mips64} correspond to generic @sc{MIPS V}, @sc{MIPS32},
+@sc{MIPS32 Release 2}, and
@sc{MIPS64} ISA processors, respectively. You can also switch
instruction sets during the assembly; see @ref{MIPS ISA, Directives to
override the ISA level}.