diff options
Diffstat (limited to 'gas/doc')
| -rw-r--r-- | gas/doc/as.texinfo | 12 | ||||
| -rw-r--r-- | gas/doc/c-mips.texi | 14 |
2 files changed, 16 insertions, 10 deletions
diff --git a/gas/doc/as.texinfo b/gas/doc/as.texinfo index 9f7a21f..f7b4085 100644 --- a/gas/doc/as.texinfo +++ b/gas/doc/as.texinfo @@ -391,7 +391,7 @@ gcc(1), ld(1), and the Info entries for @file{binutils} and @file{ld}. [@b{-mabi}=@var{ABI}] [@b{-32}] [@b{-n32}] [@b{-64}] [@b{-mfp32}] [@b{-mgp32}] [@b{-march}=@var{CPU}] [@b{-mtune}=@var{CPU}] [@b{-mips1}] [@b{-mips2}] [@b{-mips3}] [@b{-mips4}] [@b{-mips5}] [@b{-mips32}] [@b{-mips32r2}] - [@b{-mips64}] + [@b{-mips64}] [@b{-mips64r2}] [@b{-construct-floats}] [@b{-no-construct-floats}] [@b{-trap}] [@b{-no-break}] [@b{-break}] [@b{-no-trap}] [@b{-mfix7000}] [@b{-mno-fix7000}] @@ -927,15 +927,17 @@ Generate ``little endian'' format output. @itemx -mips32 @itemx -mips32r2 @itemx -mips64 +@itemx -mips64r2 Generate code for a particular @sc{mips} Instruction Set Architecture level. @samp{-mips1} is an alias for @samp{-march=r3000}, @samp{-mips2} is an alias for @samp{-march=r6000}, @samp{-mips3} is an alias for @samp{-march=r4000} and @samp{-mips4} is an alias for @samp{-march=r8000}. -@samp{-mips5}, @samp{-mips32}, @samp{-mips32r2}, and @samp{-mips64} +@samp{-mips5}, @samp{-mips32}, @samp{-mips32r2}, @samp{-mips64}, and +@samp{-mips64r2} correspond to generic -@samp{MIPS V}, @samp{MIPS32}, @samp{MIPS32 Release 2}, and -@samp{MIPS64} ISA processors, -respectively. +@samp{MIPS V}, @samp{MIPS32}, @samp{MIPS32 Release 2}, @samp{MIPS64}, +and @samp{MIPS64 Release 2} +ISA processors, respectively. @item -march=@var{CPU} Generate code for a particular @sc{mips} cpu. diff --git a/gas/doc/c-mips.texi b/gas/doc/c-mips.texi index 4da7b25..6f8b737 100644 --- a/gas/doc/c-mips.texi +++ b/gas/doc/c-mips.texi @@ -67,14 +67,17 @@ to select big-endian output, and @samp{-EL} for little-endian. @itemx -mips32 @itemx -mips32r2 @itemx -mips64 +@itemx -mips64r2 Generate code for a particular MIPS Instruction Set Architecture level. @samp{-mips1} corresponds to the @sc{r2000} and @sc{r3000} processors, @samp{-mips2} to the @sc{r6000} processor, @samp{-mips3} to the @sc{r4000} processor, and @samp{-mips4} to the @sc{r8000} and -@sc{r10000} processors. @samp{-mips5}, @samp{-mips32}, @samp{-mips32r2}, and -@samp{-mips64} correspond to generic @sc{MIPS V}, @sc{MIPS32}, -@sc{MIPS32 Release 2}, and -@sc{MIPS64} ISA processors, respectively. You can also switch +@sc{r10000} processors. @samp{-mips5}, @samp{-mips32}, @samp{-mips32r2}, +@samp{-mips64}, and @samp{-mips64r2} +correspond to generic +@sc{MIPS V}, @sc{MIPS32}, @sc{MIPS32 Release 2}, @sc{MIPS64}, +and @sc{MIPS64 Release 2} +ISA processors, respectively. You can also switch instruction sets during the assembly; see @ref{MIPS ISA, Directives to override the ISA level}. @@ -294,7 +297,8 @@ assembly language programmers! @kindex @code{.set mips@var{n}} @sc{gnu} @code{@value{AS}} supports an additional directive to change the @sc{mips} Instruction Set Architecture level on the fly: @code{.set -mips@var{n}}. @var{n} should be a number from 0 to 5, or 32, 32r2, or 64. +mips@var{n}}. @var{n} should be a number from 0 to 5, or 32, 32r2, 64 +or 64r2. The values other than 0 make the assembler accept instructions for the corresponding @sc{isa} level, from that point on in the assembly. @code{.set mips@var{n}} affects not only which instructions |