diff options
Diffstat (limited to 'gas/doc')
| -rw-r--r-- | gas/doc/as.texinfo | 4 | ||||
| -rw-r--r-- | gas/doc/c-aarch64.texi | 3 | ||||
| -rw-r--r-- | gas/doc/c-avr.texi | 9 | ||||
| -rw-r--r-- | gas/doc/c-msp430.texi | 13 | ||||
| -rw-r--r-- | gas/doc/c-ppc.texi | 3 | ||||
| -rw-r--r-- | gas/doc/c-s390.texi | 2 |
6 files changed, 28 insertions, 6 deletions
diff --git a/gas/doc/as.texinfo b/gas/doc/as.texinfo index 65b14a4..8c125fd 100644 --- a/gas/doc/as.texinfo +++ b/gas/doc/as.texinfo @@ -487,7 +487,7 @@ gcc(1), ld(1), and the Info entries for @file{binutils} and @file{ld}. @b{-m620}|@b{-me500}|@b{-e500x2}|@b{-me500mc}|@b{-me500mc64}|@b{-me5500}|@b{-me6500}|@b{-mppc64bridge}| @b{-mbooke}|@b{-mpower4}|@b{-mpwr4}|@b{-mpower5}|@b{-mpwr5}|@b{-mpwr5x}|@b{-mpower6}|@b{-mpwr6}| @b{-mpower7}|@b{-mpwr7}|@b{-mpower8}|@b{-mpwr8}|@b{-mpower9}|@b{-mpwr9}@b{-ma2}| - @b{-mcell}|@b{-mspe}|@b{-mtitan}|@b{-me300}|@b{-mcom}] + @b{-mcell}|@b{-mspe}|@b{-mspe2}|@b{-mtitan}|@b{-me300}|@b{-mcom}] [@b{-many}] [@b{-maltivec}|@b{-mvsx}|@b{-mhtm}|@b{-mvle}] [@b{-mregnames}|@b{-mno-regnames}] [@b{-mrelocatable}|@b{-mrelocatable-lib}|@b{-K PIC}] [@b{-memb}] @@ -1740,7 +1740,7 @@ Specify which s390 processor variant is the target, @samp{g5} (or @samp{arch3}), @samp{g6}, @samp{z900} (or @samp{arch5}), @samp{z990} (or @samp{arch6}), @samp{z9-109}, @samp{z9-ec} (or @samp{arch7}), @samp{z10} (or @samp{arch8}), @samp{z196} (or @samp{arch9}), @samp{zEC12} (or @samp{arch10}), -@samp{z13} (or @samp{arch11}), or @samp{arch12}. +@samp{z13} (or @samp{arch11}), or @samp{z14} (or @samp{arch12}). @item -mregnames @itemx -mno-regnames Allow or disallow symbolic names for registers. diff --git a/gas/doc/c-aarch64.texi b/gas/doc/c-aarch64.texi index 6774205..e73d48c 100644 --- a/gas/doc/c-aarch64.texi +++ b/gas/doc/c-aarch64.texi @@ -363,6 +363,9 @@ example: foo .req w0 @end smallexample +ip0, ip1, lr and fp are automatically defined to +alias to X16, X17, X30 and X29 respectively. + @c SSSSSSSSSSSSSSSSSSSSSSSSSS @c TTTTTTTTTTTTTTTTTTTTTTTTTT diff --git a/gas/doc/c-avr.texi b/gas/doc/c-avr.texi index e419964..cb9cbe0 100644 --- a/gas/doc/c-avr.texi +++ b/gas/doc/c-avr.texi @@ -97,9 +97,12 @@ atxmega16a4, atxmega16a4u, atxmega16c4, atxmega16d4, atxmega16x1, atxmega32a4, atxmega32a4u, atxmega32c4, atxmega32d4, atxmega16e5, atxmega8e5, atxmega32e5, atxmega32x1). -Instruction set avrxmega3 is for the XMEGA AVR core with 8K to 64K -program memory space and greater than 64K data space (MCU types: -none). +Instruction set avrxmega3 is for the XMEGA AVR core with up to 64K +of combined program memory and RAM, and with program memory +visible in the RAM address space (MCU types: +attiny212, attiny214, attiny412, attiny414, attiny416, attiny417, +attiny814, attiny816, attiny817, attiny1614, attiny1616, attiny1617, +attiny3214, attiny3216, attiny3217). Instruction set avrxmega4 is for the XMEGA AVR core with up to 64K program memory space and less than 64K data space (MCU types: diff --git a/gas/doc/c-msp430.texi b/gas/doc/c-msp430.texi index eb0e757..d80f540 100644 --- a/gas/doc/c-msp430.texi +++ b/gas/doc/c-msp430.texi @@ -107,6 +107,19 @@ disables warnings about missing NOP instructions. mark the object file as one that requires data to copied from ROM to RAM at execution startup. Disabled by default. +@item -mdata-region=@var{region} +Select the region data will be placed in. +Region placement is performed by the compiler and linker. The only effect this +option will have on the assembler is that if @var{upper} or @var{either} is +selected, then the symbols to initialise high data and bss will be defined. +Valid @var{region} values are: +@table @code +@item none +@item lower +@item upper +@item either +@end table + @end table @node MSP430 Syntax diff --git a/gas/doc/c-ppc.texi b/gas/doc/c-ppc.texi index d94b418..7e66625 100644 --- a/gas/doc/c-ppc.texi +++ b/gas/doc/c-ppc.texi @@ -99,6 +99,9 @@ Generate code for Freescale e6500 core complex. @item -mspe Generate code for Motorola SPE instructions. +@item -mspe2 +Generate code for Freescale SPE2 instructions. + @item -mtitan Generate code for AppliedMicro Titan core complex. diff --git a/gas/doc/c-s390.texi b/gas/doc/c-s390.texi index 2f417cb..a50d726 100644 --- a/gas/doc/c-s390.texi +++ b/gas/doc/c-s390.texi @@ -18,7 +18,7 @@ and eleven chip levels. The architecture modes are the Enterprise System Architecture (ESA) and the newer z/Architecture mode. The chip levels are g5 (or arch3), g6, z900 (or arch5), z990 (or arch6), z9-109, z9-ec (or arch7), z10 (or arch8), z196 (or arch9), zEC12 (or arch10), z13 -(or arch11), and arch12. +(or arch11), and z14 (or arch12). @menu * s390 Options:: Command-line Options. |