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+@c Copyright (C) 2016 Free Software Foundation, Inc.
+@c This is part of the GAS anual.
+@c For copying conditions, see the file as.texinfo
+@c man end
+
+@ifset GENERIC
+@page
+@node RISC-V-Dependent
+@chapter RISC-V Dependent Features
+@end ifset
+@ifclear GENERIC
+@node Machine Dependencies
+@chapter RISC-V Dependent Features
+@end ifclear
+
+@cindex RISC-V support
+@menu
+* RISC-V Options:: RISC-V Options
+@end menu
+
+@node RISC-V Options
+@section Options
+
+The following table lists all availiable RISC-V specific options
+
+@c man begin OPTIONS
+@table @gcctabopt
+@cindex @samp{-m32} option, RISC-V
+@cindex @samp{-m64} option, RISC-V
+@item -m32 | -m64
+Select the base ISA, either RV32 or RV64.
+
+@cindex @samp{-mrvc} option, RISC-V
+@item -mrvc
+Enables the C ISA subset for compressed instructions.
+
+@cindex @samp{-msoft-float} option, RISC-V
+@cindex @samp{-mhard-float} option, RISC-V
+@item -msoft-float | -mhard-float
+Select the floating-point ABI, hard-float has F registers while soft-float
+doesn't.
+
+@cindex @samp{-march=RV{32,64}{G,I}{M,}{A,}{F,}{D,}{C,}} option, RISC-V
+@item -march=RV{32,64}{G,I}{M,}{A,}{F,}{D,}{C,}
+Select the base isa, as specified by ISA. For example -march=RV32IMA.
+
+@end table
+@c man end