diff options
Diffstat (limited to 'gas/doc/c-mips.texi')
| -rw-r--r-- | gas/doc/c-mips.texi | 14 |
1 files changed, 9 insertions, 5 deletions
diff --git a/gas/doc/c-mips.texi b/gas/doc/c-mips.texi index 4da7b25..6f8b737 100644 --- a/gas/doc/c-mips.texi +++ b/gas/doc/c-mips.texi @@ -67,14 +67,17 @@ to select big-endian output, and @samp{-EL} for little-endian. @itemx -mips32 @itemx -mips32r2 @itemx -mips64 +@itemx -mips64r2 Generate code for a particular MIPS Instruction Set Architecture level. @samp{-mips1} corresponds to the @sc{r2000} and @sc{r3000} processors, @samp{-mips2} to the @sc{r6000} processor, @samp{-mips3} to the @sc{r4000} processor, and @samp{-mips4} to the @sc{r8000} and -@sc{r10000} processors. @samp{-mips5}, @samp{-mips32}, @samp{-mips32r2}, and -@samp{-mips64} correspond to generic @sc{MIPS V}, @sc{MIPS32}, -@sc{MIPS32 Release 2}, and -@sc{MIPS64} ISA processors, respectively. You can also switch +@sc{r10000} processors. @samp{-mips5}, @samp{-mips32}, @samp{-mips32r2}, +@samp{-mips64}, and @samp{-mips64r2} +correspond to generic +@sc{MIPS V}, @sc{MIPS32}, @sc{MIPS32 Release 2}, @sc{MIPS64}, +and @sc{MIPS64 Release 2} +ISA processors, respectively. You can also switch instruction sets during the assembly; see @ref{MIPS ISA, Directives to override the ISA level}. @@ -294,7 +297,8 @@ assembly language programmers! @kindex @code{.set mips@var{n}} @sc{gnu} @code{@value{AS}} supports an additional directive to change the @sc{mips} Instruction Set Architecture level on the fly: @code{.set -mips@var{n}}. @var{n} should be a number from 0 to 5, or 32, 32r2, or 64. +mips@var{n}}. @var{n} should be a number from 0 to 5, or 32, 32r2, 64 +or 64r2. The values other than 0 make the assembler accept instructions for the corresponding @sc{isa} level, from that point on in the assembly. @code{.set mips@var{n}} affects not only which instructions |