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-rw-r--r--gas/doc/c-i860.texi10
1 files changed, 5 insertions, 5 deletions
diff --git a/gas/doc/c-i860.texi b/gas/doc/c-i860.texi
index c959450..a66024e 100644
--- a/gas/doc/c-i860.texi
+++ b/gas/doc/c-i860.texi
@@ -26,7 +26,7 @@ that I will add later (jle@cygnus.com).
@end menu
@node Notes-i860
-@section i860 Notes
+@section i860 Notes
This is a fairly complete i860 assembler which is compatible with the
UNIX System V/860 Release 4 assembler. However, it does not currently
support SVR4 PIC (i.e., @code{@@GOT, @@GOTOFF, @@PLT}).
@@ -43,7 +43,7 @@ is @code{ha%expression} whereas the SVR4 syntax is @code{[expression]@@ha}
(and similarly for the "l" and "h" selectors).
@node Options-i860
@section i860 Command-line Options
-@subsection SVR4 compatibility options
+@subsection SVR4 compatibility options
@table @code
@item -V
Print assembler version.
@@ -52,7 +52,7 @@ Ignored.
@item -Qn
Ignored.
@end table
-@subsection Other options
+@subsection Other options
@table @code
@item -EL
Select little endian output (this is the default).
@@ -137,7 +137,7 @@ or large_imm@@l,%rn,%rn
@end smallexample
@item Load/store with relocatable address expression:
-For example, the pseudo-instruction @code{ld.b addr_exp(%rx),%rn}
+For example, the pseudo-instruction @code{ld.b addr_exp(%rx),%rn}
will be expanded into:
@smallexample
orh addr_exp@@ha,%rx,%r31
@@ -150,7 +150,7 @@ The analogous expansions apply to @code{ld.x, st.x, fld.x, pfld.x, fst.x}, and @
If any of the arithmetic operations @code{adds, addu, subs, subu} are used
with an immediate larger than 16-bits (signed), then they will be expanded.
For instance, the pseudo-instruction @code{adds large_imm,%rx,%rn} expands to:
-@smallexample
+@smallexample
orh large_imm@@h,%r0,%r31
or large_imm@@l,%r31,%r31
adds %r31,%rx,%rn