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Diffstat (limited to 'gas/ChangeLog-2017')
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diff --git a/gas/ChangeLog-2017 b/gas/ChangeLog-2017 new file mode 100644 index 0000000..1aee83c --- /dev/null +++ b/gas/ChangeLog-2017 @@ -0,0 +1,4419 @@ +2017-12-28 Jim Wilson <jimw@sifive.com> + + * testsuite/gas/riscv/priv-reg.d, testsuite/gas/riscv/priv-reg.s: New. + +2017-12-20 Jim Wilson <jimw@sifive.com> + + * config/tc-riscv.c (risc_ip) <o>: Add comment. + * testsuite/gas/riscv/c-nonzero-imm.d, + * testsuite/gas/riscv/c-nonzero-imm.l, + * testsuite/gas/riscv/c-nonzero-imm.s, + * testsuite/gas/riscv/c-nonzero-reg.d, + * testsuite/gas/riscv/c-nonzero-reg.l, + * testsuite/gas/riscv/c-nonzero-reg.s, + * testsuite/gas/riscv/c-zero-imm-64.d, + * testsuite/gas/riscv/c-zero-imm-64.s, + * testsuite/gas/riscv/c-zero-imm.d, testsuite/gas/riscv/c-zero-imm.s, + * testsuite/gas/riscv/c-zero-reg.d, + * testsuite/gas/riscv/c-zero-reg.s: New. + +2017-12-19 Tamar Christina <tamar.christina@arm.com> + + PR 22559 + * config/tc-aarch64.c (vectype_to_qualifier): Support AARCH64_OPND_QLF_S_4B. + * gas/testsuite/gas/aarch64/dotproduct.d: Update disassembly. + +2017-12-19 Tamar Christina <tamar.christina@arm.com> + + PR 22529 + * config/tc-aarch64.c (vectype_to_qualifier): Support AARCH64_OPND_QLF_V_4B. + * gas/testsuite/gas/aarch64/pr22529.s: New. + * gas/testsuite/gas/aarch64/pr22529.d: New. + * gas/testsuite/gas/aarch64/pr22529.l: New. + +2017-12-18 Nick Clifton <nickc@redhat.com> + + PR 22493 + * config/tc-arm.c (encode_ldmstm): Do not use A2 encoding of the + PUSH insn when pushing the stack pointer. + +2017-12-18 Jan Beulich <jbeulich@suse.com> + + * config/tc-i386.c (regymm, regzmm): Delete. + (operand_type_register_match). Extend comment. Also handle some + memory operands here. Extend to cover .regsimd. + (build_vex_prefix): Derive vector_length from actual operand + size. + (process_operands, build_modrm_byte): Use .regsimd. + +2017-12-18 Jan Beulich <jbeulich@suse.com> + + * config/tc-i386.c (match_simd_size): New. + (match_mem_size): Use it. + (operand_size_match): Likewise. Split .reg and .acc checks. + (pi, check_VecOperands, match_template, check_byte_reg, + check_long_reg, check_qword_reg, build_modrm_byte, + parse_real_register): Replace .regxmm, .regymm, and .regzmm + checks. + (md_assemble): Qualify .acc check with .xmmword one. + (bad_implicit_operand): Delete. + (process_operands): Replace .firstxmm0 checks with .acc plus + .xmmword ones. Drop now pointless assertions. Convert .acc to + .regsimd. + * config/tc-i386-intel.c (i386_intel_simplify_register): Replace + .regxmm, .regymm, and .regzmm checks. + * testsuite/gas/i386/x86-64-specific-reg.l: Adjust expectations. + +2017-12-18 Jan Beulich <jbeulich@suse.com> + + * config/tc-i386.c (operand_type_check): Extend comment. + (match_reg_size): Also check .tbyte. + (match_mem_size): No longer check .tbyte here. + (md_assemble): Drop .floatacc check. + (check_byte_reg): Drop .floatreg and .floatacc checks. + (process_operands, parse_real_register): Replace .floatreg + check. + +2017-12-18 Jan Beulich <jbeulich@suse.com> + + * config/tc-i386.c (operand_type_check, pi): Switch .reg<N> to + just .reg. + (operand_size_match): Qualify .anysize check with .reg one. + Extend .acc check to also cover .reg. + (operand_type_register_match): Drop m0 and m1 parameters. Switch + .reg<N> to .byte/.word/.dword/.qword. Drop .acc special + handling. + (md_assemble): Expand .reg8 checks to .reg plus .bytes ones. + (optimize_imm, process_suffix, check_byte_reg, check_long_reg, + check_qword_reg, check_word_reg): Expand .reg<N> checks to .reg + plus size ones. + (match_template): Drop arguments from calls to + operand_type_register_match(). + (build_modrm_byte, i386_addressing_mode, i386_index_check, + parse_real_register): Replace .reg<N> checks. + * config/tc-i386-intel.c (i386_intel_simplify, + i386_intel_operand): Switch .reg16 to .word. + +2017-12-17 H.J. Lu <hongjiu.lu@intel.com> + + PR gas/22623 + * gas/config/tc-i386.c (output_insn): Check pseudo prefix + without instruction. + * testsuite/gas/i386/i386.exp: Run inval-pseudo. + * testsuite/gas/i386/inval-pseudo.l: New file. + * testsuite/gas/i386/inval-pseudo.s: Likewise. + +2017-12-15 Jan Beulich <jbeulich@suse.com> + + * config/tc-i386.c (match_template): Add missing ! to + reg{x,y,z}mm checks in q- and l-suffix handling. + +2017-12-15 Jan Beulich <jbeulich@suse.com> + + * config/tc-i386.c (build_modrm_byte): Add missing ! to reg64 + check leading to abort(). + +2017-12-14 Nick Clifton <nickc@redhat.com> + + * config/tc-m32c.c: Update address of FSF in copyright notice. + * config/tc-m32c.h: Likewise. + * config/tc-mt.c: Likewise. + * config/tc-mt.h: Likewise. + * config/tc-visium.c: Likewise. + * config/tc-visium.h: Likewise. + * testsuite/gas/rx/explode: Likewise. + +2017-12-13 Jim Wilson <jimw@sifive.com> + + PR 22599 + * testsuite/gas/riscv/fsxxi.d, testsuite/gas/riscv/fsxxi.s: New. + +2017-12-13 Dimitar Dimitrov <dimitar@dinux.eu> + + * testsuite/gas/pru/extern.s: New test for print of U16_PMEMM + relocation. + * testsuite/gas/pru/extern.d: New test driver. + +2017-12-12 Alan Modra <amodra@gmail.com> + + PR 21118 + * config/tc-ppc.c (md_assemble): Don't mask register number. + +2017-12-07 Max Filippov <jcmvbkbc@gmail.com> + + * config/tc-xtensa.c (xg_order_trampoline_chain): Replace + xg_order_trampoline_chain_entry call with check for + canonicalized symbol equality and offset equality. + +2017-12-04 Alan Modra <amodra@gmail.com> + + PR 22544 + * doc/as.texinfo (8byte): Correct. + +2017-12-04 Alan Modra <amodra@gmail.com> + + * testsuite/gas/ppc/ppc.exp: Don't exclude VLE tests when little-endian. + * testsuite/gas/ppc/efs.d: Add -mbig to assembler options. + * testsuite/gas/ppc/efs2.d: Likewise. + * testsuite/gas/ppc/lsp-checks.d: Likewise. + * testsuite/gas/ppc/lsp.d: Likewise. + * testsuite/gas/ppc/spe.d: Likewise. + * testsuite/gas/ppc/spe2-checks.d: Likewise. + * testsuite/gas/ppc/spe2.d: Likewise. + * testsuite/gas/ppc/spe_ambiguous.d: Likewise. + * testsuite/gas/ppc/vle-mult-ld-st-insns.d: Likewise. + * testsuite/gas/ppc/vle-reloc.d: Likewise. + * testsuite/gas/ppc/vle-simple-1.d: Likewise. + * testsuite/gas/ppc/vle-simple-2.d: Likewise. + * testsuite/gas/ppc/vle-simple-3.d: Likewise. + * testsuite/gas/ppc/vle-simple-4.d: Likewise. + * testsuite/gas/ppc/vle-simple-5.d: Likewise. + * testsuite/gas/ppc/vle-simple-6.d: Likewise. + * testsuite/gas/ppc/vle.d: Likewise. + +2017-12-03 Jim Wilson <jimw@sifive.com> + + * doc/c-riscv.texi (RISC-V-Directives): Move @section immediately after + @node. + +2017-12-01 Palmer Dabbelt <palmer@sifive.com> + Jim Wilson <jimw@sifive.com> + + * doc/as.texinfo (RISC-V): Alphabetize RISC-V entries. Change + RISC-V-Opts to RISC-V-Options. Delete redundant space. Add -fpic + and related options to option list. + * doc/c-riscv.texi: (RISC-V-Options): Renamed from RISC-V-Opts. + (RISC-V Options): Renamed from Options. Add missing period. + (-fpic): Also mention -fPIC. + (RISC-V Directives): New node. + +2017-12-01 Peter Bergner <bergner@vnet.ibm.com> + + * config/tc-ppc.c (last_insn): Update type. + (insn_validate) <omask, mask>: Likewise. + (ppc_setup_opcodes) <mask, right_bit>: Likewise. + <PRINT_OPCODE_TABLE>: Update types and printf format specifiers. + (ppc_insert_operand): Update return and argument types and remove + unneeded type casts. + <min, max, right, tmp>: Update type. + (md_assemble): Remove unneeded type casts. + <insn, val, tmp_insn>: Update type. + +2017-11-29 Jan Beulich <jbeulich@suse.com> + + * config/tc-i386.c (enum i386_error): Remove try_vector_disp8. + (mode_from_disp_size, build_modrm_byte, build_modrm_byte, + disp_size): Remove reference to .vec_disp8. + (output_disp): Likewise. Unconditionally use i.memshift. + (fits_in_vec_disp8): Rename to fits_in_disp8. + (type_names): Remove OPERAND_TYPE_VEC_DISP8 entry. + (optimize_disp): Use fits_in_disp8. + (check_VecOperands): Re-work (simplify) .disp8memshift + conditional handling. + +2017-11-29 Jan Beulich <jbeulich@suse.com> + + PR gas/21874 + * config/tc-i386-intel.c (i386_intel_simplify): Chain together + multiple segment override expressions. + (i386_intel_operand): Issue diagnostic for redundant segment + overrides. + * testsuite/gas/i386/intelok.e: New. + * testsuite/gas/i386/intelok.d: Reference intelok.e. + * testsuite/gas/i386/inval-seg.s: Add redundant override checks. + * testsuite/gas/i386/inval-seg.l: Adjust expectations. + +2017-11-29 Jim Wilson <jimw@sifive.com> + Palmer Dabbelt <palmer@sifive.com> + + * config/tc-riscv.c (riscv_frag_align_code): New local insn_alignment. + Early return if bytes less than or equal to insn_alignment. + * testsuite/gas/riscv/align-1.l: New. + * testsuite/gas/riscv/align-1.s: New. + * testsuite/gas/riscv/riscv.exp: Use run_dump_tests. Use run_list_test + for align-1. + + PR gas/22464 + * doc/c-i386.texi (-n): Clarify docs. + +2017-11-29 Renlin Li <renlin.li@arm.com> + + * config/tc-aarch64.c (reg_names): Fix IP1 register alias typo. + * testsuite/gas/aarch64/register_aliases.s: Add IP0 and IP1 tests. + * testsuite/gas/aarch64/register_aliases.d: Update. + +2017-11-29 Stefan Stroe <stroestefan@gmail.com> + + * po/Make-in (datadir): Define as @datadir@. + (localedir): Define as @localedir@. + (gnulocaledir, gettextsrcdir): Use @datarootdir@. + +2017-11-29 Nick Clifton <nickc@redhat.com> + + PR 22492 + * config/obj-elf.c (obj_elf_version): Use record_alignment rather + than bfd_set_section_alignment. + +2017-11-27 Andrew Waterman <andrew@sifive.com> + Palmer Dabbelt <palmer@sifive.com> + Jim Wilson <jimw@sifive.com> + + * config/tc-riscv.c (riscv_handle_implicit_zero_offset): New. + (riscv_ip): Cases 'k', 'l', 'm', 'n', 'M', 'N', add call to + riscv_handle_implicit_zero_offset. At label load_store, replace + existing code with call to riscv_handle_implicit_zero_offset. + * testsuite/gas/riscv/c-ld.d, testsuite/gas/riscv/c-ld.s: New. + * testsuite/gas/riscv/c-lw.d, testsuite/gas/riscv/c-lw.s: New. + * testsuite/gas/riscv/riscv.exp: Run new tests. + +2017-11-27 Max Filippov <jcmvbkbc@gmail.com> + + * config/tc-xtensa.c (find_trampoline_seg): Add static variable + that caches the result of the most recent search. + +2017-11-27 Max Filippov <jcmvbkbc@gmail.com> + + * config/tc-xtensa.c (trampoline_chain_entry, trampoline_chain) + (trampoline_chain_index): New structures. + (trampoline_index): Add chain_index field. + (xg_order_trampoline_chain_entry, xg_sort_trampoline_chain) + (xg_find_chain_entry, xg_get_best_chain_entry) + (xg_order_trampoline_chain, xg_get_trampoline_chain) + (xg_find_best_eq_target, xg_add_location_to_chain) + (xg_create_trampoline_chain, xg_get_single_symbol_slot): New + functions. + (xg_relax_fixups): Call xg_find_best_eq_target to adjust jump + target to point to an existing jump. Call + xg_create_trampoline_chain to create new jump target. Call + xg_add_location_to_chain to add newly created trampoline jump + to the corresponding chain. + (add_jump_to_trampoline): Extract loop searching for a single + slot with a symbol into a separate function, replace that code + with a call to that function. + (relax_frag_immed): Call xg_find_best_eq_target to adjust jump + target to point to an existing jump. + * testsuite/gas/xtensa/all.exp: Add trampoline-2 test. + * testsuite/gas/xtensa/trampoline.d: Adjust absolute addresses + as many duplicate trampoline chains are now coalesced. + * testsuite/gas/xtensa/trampoline.s: Add _nop so that objdump + stays in sync with instruction stream. + * testsuite/gas/xtensa/trampoline-2.l: New test result file. + * testsuite/gas/xtensa/trampoline-2.s: New test source file. + +2017-11-27 Max Filippov <jcmvbkbc@gmail.com> + + * config/tc-xtensa.c (search_trampolines, get_best_trampoline): + Remove definitions. + (xg_find_best_trampoline_for_tinsn): New function. + (relax_frag_immed): Replace call to get_best_trampoline with a + call to xg_find_best_trampoline_for_tinsn. + * testsuite/gas/xtensa/trampoline.d: Adjust absolute addresses + as the placement of trampolines for relaxed branches has been + changed. + +2017-11-27 Max Filippov <jcmvbkbc@gmail.com> + + * config/tc-xtensa.c (trampoline_index): New structure. + (trampoline_seg): Replace trampoline list with trampoline index. + (xg_find_trampoline, xg_add_trampoline_to_index) + (xg_remove_trampoline_from_index, xg_add_trampoline_to_seg) + (xg_is_trampoline_frag_full, xg_get_fulcrum) + (xg_find_best_trampoline, xg_relax_fixup, xg_relax_fixups) + (xg_is_relaxable_fixup): New functions. + (J_MARGIN): New macro. + (xtensa_create_trampoline_frag): Use xg_add_trampoline_to_seg + instead of open-coded addition to the linked list. + (dump_trampolines): Iterate through the trampoline_seg::index. + (cached_fixupS, cached_fixup, fixup_cacheS, fixup_cache) + (fixup_order, xtensa_make_cached_fixup) + (xtensa_realloc_fixup_cache, xtensa_cache_relaxable_fixups) + (xtensa_find_first_cached_fixup, xtensa_delete_cached_fixup) + (xtensa_add_cached_fixup, check_and_update_trampolines): Remove + definitions. + (xg_relax_trampoline): Extract logic into separate functions, + replace body with a call to xg_relax_fixups. + (search_trampolines): Replace search in linked list with search + in index. Change data type of address-tracking variables from + int to offsetT. Replace abs with labs. + (xg_append_jump): Finish the trampoline frag if it's full. + (add_jump_to_trampoline): Remove trampoline frag from the index + if the frag is full. + * config/tc-xtensa.h (xtensa_frag_type): Remove next_trampoline. + * testsuite/gas/xtensa/trampoline.d: Adjust absolute addresses + as the placement of trampolines has slightly changed. + * testsuite/gas/xtensa/trampoline.s: Add _nop so that objdump + stays in sync with instruction stream. + +2017-11-27 Max Filippov <jcmvbkbc@gmail.com> + + * config/tc-xtensa.c (init_trampoline_frag): Replace pointer to + struct trampoline_frag parameter with pointer to fragS. + (xg_append_jump): Remove jump_around parameter. + (struct trampoline_frag): Remove. + (struct trampoline_seg): Change type of trampoline_list from + struct trampoline_frag to fragS. + (xtensa_create_trampoline_frag): Don't allocate struct + trampoline_frag. Initialize new fragS::tc_frag_data fields. + (dump_trampolines, xg_relax_trampoline, search_trampolines) + (get_best_trampoline, init_trampoline_frag) + (add_jump_to_trampoline, relax_frag_immed): Replace pointer to + struct trampoline_frag with a pointer to fragS. + (xg_append_jump): Remove jump_around parameter, use + fragS::tc_frag_data.jump_around_fix instead. + (xg_relax_trampoline, init_trampoline_frag) + (add_jump_to_trampoline): Don't pass jump_around parameter to + xg_append_jump. + * config/tc-xtensa.h (struct xtensa_frag_type): Add new fields: + needs_jump_around, next_trampoline and jump_around_fix. + +2017-11-27 Max Filippov <jcmvbkbc@gmail.com> + + * config/tc-xtensa.c (find_trampoline_seg): Move above the first + use. + (xtensa_create_trampoline_frag): Replace trampoline seg search + code with a call to find_trampoline_seg. + +2017-11-27 Max Filippov <jcmvbkbc@gmail.com> + + * config/tc-xtensa.c (xg_append_jump): New function. + (xg_relax_trampoline, init_trampoline_frag) + (add_jump_to_trampoline): Replace trampoline jump assembling + code with a call to xg_append_jump. + +2017-11-27 Max Filippov <jcmvbkbc@gmail.com> + + * config/tc-xtensa.c (xg_relax_trampoline): New function. + (xtensa_relax_frag): Replace trampoline relaxation code with a + call to xg_relax_trampoline. + +2017-11-27 Nick Clifton <nickc@redhat.com> + + PR 22492 + * config/obj-elf.c (obj_elf_version): Set the alignment of the + .note section. + +2017-11-26 H.J. Lu <hongjiu.lu@intel.com> + + * testsuite/gas/i386/sse-noavx.s: Add tests for fisttps and + fisttpl. + * testsuite/gas/i386/x86-64-sse-noavx.s: Likewise. + * testsuite/gas/i386/ilp32/x86-64-sse-noavx.d: Updated. + * testsuite/gas/i386/sse-noavx.d: Likewise. + * testsuite/gas/i386/x86-64-sse-noavx.d: Likewise. + +2017-11-24 Jim Wilson <jimw@sifive.com> + + * write.h (FAKE_LABEL_CHAR): Expand comment. + +2017-11-24 Jan Beulich <jbeulich@suse.com> + + * config/tc-i386.c (check_VecOperations): Check register type + for masking. Quote the actual register name in the respective + diagnostic. Check {z} wasn't specified on its own. + * testsuite/gas/i386/inval-avx512f.s, + testsuite/gas/i386/x86-64-inval-avx512f.s: Add further bad + masking tests. + * testsuite/gas/i386/inval-avx512f.l, + testsuite/gas/i386/x86-64-inval-avx512f.l: Adjust expectations. + +2017-11-24 Jan Beulich <jbeulich@suse.com> + + * testsuite/gas/i386/intel.d, testsuite/gas/i386/opcode.d, + testsuite/gas/i386/opcode-suffix.d, testsuite/gas/i386/sse3.d, + testsuite/gas/i386/sse-noavx.d, testsuite/gas/i386/x86-64-sse3.d, + testsuite/gas/i386/x86-64-sse-noavx.d, + testsuite/gas/i386/ilp32/x86-64-sse3.d, + testsuite/gas/i386/ilp32/x86-64-sse-noavx.d: Adjust expectations. + +2017-11-23 Jim Wilson <jimw@sifive.com> + + * testsuite/gas/all/err-fakelabel.s (dg-error): Also accept fatal error + string. + + * as.c (INITIALIZING_EMULS): Define. + * config/obj-multi.h (FAKE_LABEL_NAME): When INITIALIZING_EMULS set, + don't define it. + +2017-11-23 Igor Tsimbalist <igor.v.tsimbalist@intel.com> + + * testsuite/gas/i386/avx512f_vaes-intel.d: Regenerate. + * testsuite/gas/i386/avx512f_vaes.d: Likewise. + * testsuite/gas/i386/avx512f_vaes-wig1-intel.d: Likewise. + * testsuite/gas/i386/avx512f_vaes-wig1.d: Likewise. + * testsuite/gas/i386/avx512vl_vaes-intel.d: Likewise. + * testsuite/gas/i386/avx512vl_vaes.d: Likewise. + * testsuite/gas/i386/x86-64-avx512f_vaes.s: Add instructions with + disp8*N. + * testsuite/gas/i386/x86-64-avx512f_vaes-intel.d: Regenerate. + * testsuite/gas/i386/x86-64-avx512f_vaes.d: Likewise. + * testsuite/gas/i386/x86-64-avx512f_vaes-wig.s: Add instructions with + disp8*N. + * testsuite/gas/i386/x86-64-avx512f_vaes-wig1-intel.d: Regenerate. + * testsuite/gas/i386/x86-64-avx512f_vaes-wig1.d: Likewise. + * testsuite/gas/i386/x86-64-avx512vl_vaes-intel.d: Regenerate. + * testsuite/gas/i386/x86-64-avx512vl_vaes.d: Likewise. + * testsuite/gas/i386/x86-64-avx512vl_vaes-wig.s: Add instructions with + disp8*N. + * testsuite/gas/i386/x86-64-avx512vl_vaes-wig1-intel.d: Regenerate. + * testsuite/gas/i386/x86-64-avx512vl_vaes-wig1.d: Regenerate. + +2017-11-23 Jan Beulich <jbeulich@suse.com> + + * tc-i386.c (check_VecOperands): Don't clear .disp16. + * testsuite/gas/i386/avx512f.s: Add 16-bit addressing tests. + * testsuite/gas/i386/avx512f.d, + testsuite/gas/i386/avx512f-intel.d: Adjust expectations. + +2017-11-23 Jan Beulich <jbeulich@suse.com> + + PR gas/22441 + * config/tc-i386.c (build_modrm_byte): Add address override + prefix checks alongside 64-bit mode ones. + * testsuite/gas/i386/reloc64.s: Add 32-bit signed/unsigned + relocation cases. + * testsuite/gas/i386/reloc64.d: Adjust expectations. + +2017-11-23 Jan Beulich <jbeulich@suse.com> + + * config/tc-i386.c (build_modrm_byte): Drop VSIB handling from + code also setting fake_zero_displacement. + +2017-11-23 Jan Beulich <jbeulich@suse.com> + + * testsuite/gas/i386/arch-4.s: Correct ud1 and ud2b. Add ud0. + * testsuite/gas/i386/intel.s: Test ud2 instead of ud2b. + * testsuite/gas/i386/opcode.s: Likewise. + * testsuite/gas/i386/arch-4.d, testsuite/gas/i386/intel.d, + testsuite/gas/i386/opcode.d, testsuite/gas/i386/opcode-intel.d, + testsuite/gas/i386/opcode-suffix.d: Adjust expectations. + +2017-11-23 Jan Beulich <jbeulich@suse.com> + + * config/tc-i386-intel.c (i386_intel_operand): Don't call + as_bad() if a prior error was already reported. + * testsuite/gas/i386/inval-avx512f.l, + testsuite/gas/i386/x86-64-inval-avx512f.l: Adjust expectations. + +2017-11-22 Jim Wilson <jimw@sifive.com> + + * as.c: Include write.h. + (common_emul_init): Use FAKE_LABEL_NAME. + * ecoff.c (add_file, ecoff_directive_end, ecoff_directive_loc): + Likewise. + (ecoff_build_symbols): Use FAKE_LABEL_CHAR. + * expr.c (get_symbol_name): Use FAKE_LABEL_CHAR. Accept only if + input_from_string is TRUE. + * read.c (input_from_string): New. + (read_symbol_name): Use FAKE_LABEL_CHAR. Accept only if + input_from_string is TRUE. + (temp_ilp): Set input_from_string to TRUE. + (restore_ilp): Set input_from_string to FALSE. + * read.h (input_from_string): Declare. + * symbols.c: Include write.h + (S_IS_LOCAL): Check for FAKE_LABEL_CHAR. + (symbol_relc_make_sym): Fix comment refering to default fake label + string. + * write.h (FAKE_LABEL_CHAR): New. + * config/tc-riscv.h (FAKE_LABEL_CHAR): Define. + * testsuite/gas/all/err-fakelabel.s: New. + + * doc/as.texinfo (.align): Change some to most for text nop fill. + (.balign, .p2align): Likewise. + +2017-11-22 Thomas Preud'homme <thomas.preudhomme@arm.com> + + * config/tc-arm.c (arm_reg_type): Comment on the link with + reg_expected_msgs. + (reg_expected_msgs): Initialize using array designators with + arm_reg_type index. + +2017-11-22 Claudiu Zissulescu <claziss@synopsys.com> + + * testsuite/gas/arc/hregs-err.s: New test. + +2017-11-21 H.J. Lu <hongjiu.lu@intel.com> + + PR gas/22464 + * testsuite/gas/i386/align-1.s: New file. + * testsuite/gas/i386/align-1a.d: Likewise. + * testsuite/gas/i386/align-1b.d: Likewise. + * testsuite/gas/i386/i386.exp: Run align-1a and align-1b. + +2017-11-21 Claudiu Zissulescu <claziss@synopsys.com> + + * testsuite/gas/arc/b.d : Update test. + * testsuite/gas/arc/bl.d: Likewise. + * testsuite/gas/arc/jli-1.d: Likewise. + * testsuite/gas/arc/lp.d: Likewise. + * testsuite/gas/arc/pcl-relocs.d: Likewise. + * testsuite/gas/arc/pcrel-relocs.d: Likewise. + * testsuite/gas/arc/pic-relocs.d: Likewise. + * testsuite/gas/arc/plt-relocs.d: Likewise. + * testsuite/gas/arc/pseudos.d: Likewise. + * testsuite/gas/arc/relax-avoid2.d: Likewise. + * testsuite/gas/arc/relax-avoid3.d: Likewise. + * testsuite/gas/arc/relax-b.d: Likewise. + * testsuite/gas/arc/tls-relocs.d: Likewise. + * testsuite/gas/arc/relax-add01.d: Likewise. + * testsuite/gas/arc/relax-add04.d: Likewise. + * testsuite/gas/arc/relax-ld01.d: Likewise. + * testsuite/gas/arc/relax-sub01.d: Likewise. + * testsuite/gas/arc/relax-sub02.d: Likewise. + * testsuite/gas/arc/relax-sub04.d: Likewise. + * testsuite/gas/arc/pcl-print.s: New file. + * testsuite/gas/arc/pcl-print.d: Likewise. + * testsuite/gas/arc/nps400-12.d: Likewise. + +2017-11-21 Alan Modra <amodra@gmail.com> + + * config/tc-xtensa.c (finish_vinsn): Avoid multiple ngettext calls + in error message. + +2017-11-20 Alan Modra <amodra@gmail.com> + + * testsuite/gas/i386/x86-64-reg-bad.l: Accept trailing padding. + +2017-11-16 Tamar Christina <tamar.christina@arm.com> + + * config/tc-aarch64.c (fp16fml): New. + * doc/c-aarch64.texi (fp16fml): New. + * testsuite/gas/aarch64/armv8_2-a-crypto-fp16.d (fp16): Make fp16fml. + * testsuite/gas/aarch64/armv8_3-a-crypto-fp16.d (fp16): Make fp16fml. + +2017-11-16 Tamar Christina <tamar.christina@arm.com> + + * opcodes/aarch64-tbl.h + (aarch64_feature_crypto): Add ARCH64_FEATURE_SIMD and AARCH64_FEATURE_FP. + (aarch64_feature_crypto_v8_2, aarch64_feature_sm4): Likewise. + (aarch64_feature_sha3): Likewise. + +2017-11-16 Tamar Christina <tamar.christina@arm.com> + + * doc/c-aarch64.texi (armv8.4-a, sha2, sha3, sm4): New. + (dotprod): Update default note. + +2017-11-16 Tamar Christina <tamar.christina@arm.com> + + * testsuite/gas/aarch64/armv8_4-a-illegal.d: New. + * testsuite/gas/aarch64/armv8_4-a-illegal.l: New. + * testsuite/gas/aarch64/armv8_4-a-illegal.s: New. + * testsuite/gas/aarch64/armv8_4-a.d: New. + * testsuite/gas/aarch64/armv8_4-a.s: New. + * testsuite/gas/aarch64/armv8_2-a-crypto-fp16.s: New. + * testsuite/gas/aarch64/armv8_2-a-crypto-fp16.d: New. + * testsuite/gas/aarch64/armv8_3-a-crypto-fp16.d: New. + * testsuite/gas/aarch64/armv8_4-a-crypto-fp16.d: New. + * testsuite/gas/aarch64/armv8_2-a-crypto-fp16-illegal.s: New. + * testsuite/gas/aarch64/armv8_2-a-crypto-fp16-illegal.l: New. + * testsuite/gas/aarch64/armv8_2-a-crypto-fp16-illegal.d: New. + +2017-11-16 Jan Beulich <jbeulich@suse.com> + + * testsuite/gas/i386/noextreg.s: Add tests with register index + bit 3 set. + * testsuite/gas/i386/noextreg.d: Adjust expectations. + +2017-11-16 Jan Beulich <jbeulich@suse.com> + + * config/tc-i386.c (process_suffix): Ignore .no_qsuf outside of + 64-bit mode. + * testsuite/gas/i386/ptwrite.s: Add test for memory operand + without DWORD PTR. + * testsuite/gas/i386/ptwrite.d, + testsuite/gas/i386/ptwrite-intel.d: Adjust expectations. + +2017-11-15 H.J. Lu <hongjiu.lu@intel.com> + + * testsuite/gas/i386/noextreg.s: Replace .code64/.code32 and + 64-bit instructions with .byte. Remove ELF directive. + +2017-11-15 Tamar Christina <tamar.christina@arm.com> + + * config/tc-arm.c (arm_ext_fp16_fml, fp16fml): New. + (do_neon_fmac_maybe_scalar_long): Use arm_ext_fp16_fml. + * doc/c-arm.texi (fp16, fp16fml): New. + * testsuite/gas/arm/armv8_2-a-fp16.d (fp16): Make fp16fml. + * testsuite/gas/arm/armv8_3-a-fp16.d (fp16): Make fp16fml. + * testsuite/gas/arm/armv8_2-a-fp16-illegal.d (fp16): Make fp16fml. + * testsuite/gas/arm/armv8_2-a-fp16-thumb2.d (fp16): Make fp16fml. + +2017-11-15 Nick Clifton <nickc@redhat.com> + + PR 15152 + * testsuite/gas/avr/large-debug-line-table.d: Update expected + output. + * testsuite/gas/elf/dwarf2-11.d: Likewise. + * testsuite/gas/elf/dwarf2-12.d: Likewise. + * testsuite/gas/elf/dwarf2-13.d: Likewise. + * testsuite/gas/elf/dwarf2-14.d: Likewise. + * testsuite/gas/elf/dwarf2-15.d: Likewise. + * testsuite/gas/elf/dwarf2-16.d: Likewise. + * testsuite/gas/elf/dwarf2-17.d: Likewise. + * testsuite/gas/elf/dwarf2-18.d: Likewise. + * testsuite/gas/elf/dwarf2-5.d: Likewise. + * testsuite/gas/elf/dwarf2-6.d: Likewise. + * testsuite/gas/elf/dwarf2-7.d: Likewise. + +2017-11-15 Jan Beulich <jbeulich@suse.com> + + * testsuite/gas/i386/noextreg.s: Add tests for VEX-encoded GPR + insns with VEX.W set. + * testsuite/gas/i386/noextreg.d: Adjust expectations. + +2017-11-15 Jan Beulich <jbeulich@suse.com> + + * testsuite/gas/i386/noextreg.{s,d}: New. + * testsuite/gas/i386/i386.exp: Run new test. + +2017-11-15 Jan Beulich <jbeulich@suse.com> + + * testsuite/gas/i386/x86-64-reg.s: Add extended byte reg tests. + * testsuite/gas/i386/x86-64-reg.d, + testsuite/gas/i386/x86-64-reg-intel.d, + testsuite/gas/i386/ilp32/x86-64-reg.d, + testsuite/gas/i386/ilp32/x86-64-reg-intel.d: Adjust + expectations. + + * testsuite/gas/i386/x86-64-reg-bad.{s,l}: New. + * testsuite/gas/i386/i386.exp: Run new test. + +2017-11-14 Jim Wilson <jimw@sifive.com> + + * testsuite/gas/lns/lns.exp (lns-common-1): Add riscv*-*-* to alt list. + +2017-11-14 Jan Beulich <jbeulich@suse.com> + + * testsuite/gas/i386/x86-64-xop.d, testsuite/gas/i386/xop.d, + testsuite/gas/i386/xop32reg.d: Adjust expectations. + +2017-11-14 Jan Beulich <jbeulich@suse.com> + + * testsuite/gas/i386/avx512bw.s: Add vpcmp* pseudo tests. + * testsuite/gas/i386/avx512bw_vl.s: Likewise. + * testsuite/gas/i386/avx512bw.d, testsuite/gas/i386/avx512bw-intel.d, + testsuite/gas/i386/avx512bw_vl.d, + testsuite/gas/i386/avx512bw_vl-intel.d: Adjust expectations. + +2017-11-14 Jan Beulich <jbeulich@suse.com> + + * testsuite/gas/i386/string-ok.s: Add a few more valid patterns. + Move bogus tests ... + * testsuite/gas/i386/string-bad.s: ... here. + * testsuite/gas/i386/string-bad.l: Adjust expectations. + * testsuite/gas/i386/string-ok.d: Likewise. + * testsuite/gas/i386/string-ok.e: Likewise. + +2017-11-13 Jan Beulich <jbeulich@suse.com> + + * config/tc-aarch64.c (R_Z_BHSDQ_VZP): Rename to ... + (R_Z_SP_BHSDQ_VZP): ... and include both stack pointer variants. + +2017-11-13 Jan Beulich <jbeulich@suse.com> + + * testsuite/gas/ia64/group-1.d: Adjust expectations. + * testsuite/gas/ia64/group-2.d: Likewise. + * testsuite/gas/ia64/xdata.d: Likewise. + +2017-11-13 Jan Beulich <jbeulich@suse.com> + + * config/tc-i386.c (process_suffix): Treat .shiftcount just like + .inoutportreg. + * testsuite/gas/i386/inval.s: Add ambiguous shift/rotate cases. + * testsuite/gas/i386/inval.l: Adjust expectations. + +2017-11-13 Jan Beulich <jbeulich@suse.com> + + * config/tc-i386-intel.c (i386_intel_simplify_register): Also + recognize RegRiz/RegEiz as index-only registers. + * testsuite/gas/i386/intel.s: Add tests exercising base/index + swapping. + * testsuite/gas/i386/intel.d: Adjust expectations. + +2017-11-13 Jan Beulich <jbeulich@suse.com> + + * config/tc-i386.c (i386_index_check): Break out ... + (i386_addressing_mode): ... this new function. + * config/tc-i386-intel.c (i386_intel_operand): Do base/index + swapping and the setting of .baseindex earlier. Call + i386_addressing_mode. + * testsuite/gas/i386/x86-64-inval.s: Add out of range + displacement case. + * testsuite/gas/i386/x86-64-inval.l: Adjust expectations. + +2017-11-09 Jim Wilson <jimw@sifive.com> + + * testsuite/gas/elf/dwarf2-10.l: Accept optional line number in error. + +2017-11-06 Tamar Christina <tamar.christina@arm.com> + + * gas/testsuite/gas/aarch64/dotproduct_armv8_4.s: New. + * gas/testsuite/gas/aarch64/dotproduct_armv8_4.d: New. + +2017-11-09 Tamar Christina <tamar.christina@arm.com> + + * gas/testsuite/gas/aarch64/armv8_4-a-registers-illegal.d: New. + * gas/testsuite/gas/aarch64/armv8_4-a-registers-illegal.l: New. + * gas/testsuite/gas/aarch64/armv8_4-a-registers-illegal.s: New. + * gas/testsuite/gas/aarch64/armv8_4-a-registers.d: New. + * gas/testsuite/gas/aarch64/armv8_4-a-registers.s: New. + +2017-11-09 Tamar Christina <tamar.christina@arm.com> + + * config/tc-aarch64.c (process_omitted_operand): + Add AARCH64_OPND_Va, AARCH64_OPND_SM3_IMM2 + and AARCH64_OPND_IMM_2. + (parse_operands): Add AARCH64_OPND_Va, AARCH64_OPND_SM3_IMM2, + AARCH64_OPND_IMM_2, AARCH64_OPND_MASK + and AARCH64_OPND_ADDR_OFFSET. + +2017-11-09 Tamar Christina <tamar.christina@arm.com> + + * config/tc-aarch64.c (aarch64_arch_option_table): Add armv8.4-a. + (aarch64_features): Add SM4 and SHA3. + +2017-11-08 Tamar Christina <tamar.christina@arm.com> + + * config/tc-aarch64.c + (aarch64_features): Include AES and SHA2 in CRYPTO. + Add SHA2 and AES. + +2017-11-08 Jiong Wang <jiong.wang@arm.com> + Tamar Christina <tamar.christina@arm.com> + + * config/tc-arm.c (arm_extensions): + (arm_archs): New entry for "armv8.4-a". + Add FPU_ARCH_DOTPROD_NEON_VFP_ARMV8. + (arm_ext_v8_2): New variable. + (enum arm_reg_type): New enumeration REG_TYPE_NSD. + (reg_expected_msgs): New entry for REG_TYPE_NSD. + (parse_typed_reg_or_scalar): Handle REG_TYPE_NSD. + (parse_scalar): Support REG_TYPE_VFS. + (enum operand_parse_code): New enumerations OP_RNSD and OP_RNSD_RNSC. + (parse_operands): Handle OP_RNSD and OP_RNSD_RNSC. + (NEON_SHAPE_DEF): New entries for DHH and DHS. + (neon_scalar_for_fmac_fp16_long): New function to generate Rm encoding + for new FP16 instructions in ARMv8.2-A. + (do_neon_fmac_maybe_scalar_long): New function to encode new FP16 + instructions in ARMv8.2-A. + (do_neon_vfmal): Wrapper function for vfmal. + (do_neon_vfmsl): Wrapper function for vfmsl. + (insns): New entries for vfmal and vfmsl. + * doc/c-arm.texi (-march): Document "armv8.4-a". + * testsuite/gas/arm/dotprod-mandatory.d: New test. + * testsuite/gas/arm/armv8_2-a-fp16.s: New test source. + * testsuite/gas/arm/armv8_2-a-fp16-illegal.s: New test source. + * testsuite/gas/arm/armv8_2-a-fp16.d: New test. + * testsuite/gas/arm/armv8_3-a-fp16.d: New test. + * testsuite/gas/arm/armv8_4-a-fp16.d: New test. + * testsuite/gas/arm/armv8_2-a-fp16-thumb2.d: New test. + * testsuite/gas/arm/armv8_2-a-fp16-illegal.d: New test. + * testsuite/gas/arm/armv8_2-a-fp16-illegal.l: New error file. + +2017-11-08 Alan Modra <amodra@gmail.com> + + * config/tc-xtensa.c (finish_vinsn): Properly pluralize error message. + +2017-11-07 Jim Wilson <jimw@sifive.com> + + * config/tc-riscv.c (append_insn): Call frag_wane and frag_new at + end for linker optimizable relocs. + * testsuite/gas/riscv/eh-relocs.d: New. + * testsuite/gas/riscv/eh-relocs.s: New. + * testsuite/gas/riscv/riscv.exp: Run eh-relocs test. + +2017-11-07 Palmer Dabbelt <palmer@dabbelt.com> + + * testsuite/gas/riscv/satp.d: New test. + testsuite/gas/riscv/satp.s: Likewise. + testsuite/gas/riscv/riscv.exp: Likewise. + config/tc-riscv.c (md_begin): Handle CSR aliases. + +2017-11-07 Tamar Christina <tamar.christina@arm.com> + + * config/tc-arm.c (arm_cpus): + Change FPU_ARCH_CRYPTO_NEON_VFP_ARMV8 + into FPU_ARCH_CRYPTO_NEON_VFP_ARMV8_DOTPROD. + +2017-11-07 Alan Modra <amodra@gmail.com> + + * read.c (assemble_one, s_bundle_unlock): Formatting. + Consistently add comma and "bytes" to error message. + * testsuite/gas/i386/bundle-bad.l: Adjust to suit. + +2017-11-07 Alan Modra <amodra@gmail.com> + + * testsuite/gas/arm/got_prel.d, + * testsuite/gas/elf/dwarf2-1.d, + * testsuite/gas/elf/dwarf2-2.d, + * testsuite/gas/elf/dwarf2-3.d, + * testsuite/gas/elf/dwarf2-5.d, + * testsuite/gas/elf/dwarf2-6.d, + * testsuite/gas/i386/debug1.d, + * testsuite/gas/i386/dw2-compress-1.d, + * testsuite/gas/i386/dw2-compress-3a.d, + * testsuite/gas/i386/dw2-compress-3b.d, + * testsuite/gas/i386/dw2-compressed-1.d, + * testsuite/gas/i386/dw2-compressed-3a.d, + * testsuite/gas/i386/dw2-compressed-3b.d, + * testsuite/gas/i386/ilp32/x86-64-localpic.d, + * testsuite/gas/i386/localpic.d, + * testsuite/gas/i386/x86-64-localpic.d, + * testsuite/gas/ia64/pr13167.d, + * testsuite/gas/mips/loc-swap-2.d, + * testsuite/gas/mips/loc-swap.d, + * testsuite/gas/mips/micromips@loc-swap-2.d, + * testsuite/gas/mips/micromips@loc-swap.d, + * testsuite/gas/mips/mips16-dwarf2-n32.d, + * testsuite/gas/mips/mips16-dwarf2.d, + * testsuite/gas/mips/mips16@loc-swap-2.d, + * testsuite/gas/mips/mips16@loc-swap.d, + * testsuite/gas/mips/mips16e@loc-swap.d, + * testsuite/gas/mmix/bspec-1.d, + * testsuite/gas/mmix/bspec-2.d, + * testsuite/gas/tic6x/unwind-1.d, + * testsuite/gas/tic6x/unwind-2.d, + * testsuite/gas/tic6x/unwind-3.d: Update for pluralization + fixes. + +2017-11-07 Alan Modra <amodra@gmail.com> + + * as.c (main): Properly pluralize messages. + * frags.c (frag_grow): Likewise. + * read.c (emit_expr_with_reloc, emit_expr_fix): Likewise. + (parse_bitfield_cons): Likewise. + * write.c (fixup_segment, compress_debug, write_contents): Likewise. + (relax_segment): Likewise. + * config/tc-arm.c (s_arm_elf_cons): Likewise. + * config/tc-cr16.c (l_cons): Likewise. + * config/tc-i370.c (i370_elf_cons): Likewise. + * config/tc-m68k.c (m68k_elf_cons): Likewise. + * config/tc-msp430.c (msp430_operands): Likewise. + * config/tc-s390.c (s390_elf_cons, s390_literals): Likewise. + * config/tc-mcore.c (md_apply_fix): Likewise. + * config/tc-tic54x.c (md_assemble): Likewise. + * config/tc-xtensa.c (xtensa_elf_cons): Likewise. + (xg_expand_assembly_insn): Likewise. + * config/xtensa-relax.c (build_transition): Likewise. + +2017-11-07 Alan Modra <amodra@gmail.com> + + * asintl.h (textdomain, bindtextdomain): Use safer "do nothing". + (ngettext, dngettext, dcngettext): Define when !ENABLE_NLS. + +2017-11-03 Siddhesh Poyarekar <siddhesh.poyarekar@linaro.org> + Jim Wilson <jim.wilson@linaro.org> + + * config/tc-aarch64.c (aarch64_cpus): Add saphira. + * doc/c-aarch64.texi: Likewise. + +2017-11-02 Thomas Preud'homme <thomas.preudhomme@arm.com> + + * testsuite/gas/arm/copro-thumb_v6t2plus-thumb_v6t2-1.d: Add + --disassembler-options=force-thumb to objdump options. + * testsuite/gas/arm/copro-thumb_v6t2plus-thumb_v6t2-2.d: Likewise. + +2017-11-01 James Bowman <james.bowman@ftdichip.com> + + * config/tc-ft32.c (md_assemble): Add relaxation reloc + BFD_RELOC_FT32_RELAX. + (md_longopts): Add "norelax" and "no-relax". + (md_apply_fix): Add reloc BFD_RELOC_FT32_DIFF32. + (relaxable_section, ft32_validate_fix_sub, ft32_force_relocation, + ft32_allow_local_subtract): New function. + * config/tc-ft32.h: Remove unused MD_PCREL_FROM_SECTION. + * testsuite/gas/ft32/insnsc.s: New test exercising all FT32B + shortcodes. + * testsuite/gas/ft32/insnsc.d: New driver file. + * testsuite/gas/all/gas.exp: Update. + * testsuite/gas/ft32/ft32.exp: Run the new test. + * testsuite/gas/ft32/insn.d: Update. + * testsuite/gas/elf/dwarf2-11.d: Update. + * testsuite/gas/elf/dwarf2-12.d: Update. + * testsuite/gas/elf/dwarf2-13.d: Update. + * testsuite/gas/elf/dwarf2-14.d: Update. + * testsuite/gas/elf/dwarf2-15.d: Update. + * testsuite/gas/elf/dwarf2-16.d: Update. + * testsuite/gas/elf/dwarf2-17.d: Update. + * testsuite/gas/elf/dwarf2-18.d: Update. + * testsuite/gas/elf/dwarf2-3.d: Update. + * testsuite/gas/elf/dwarf2-5.d: Update. + * testsuite/gas/elf/dwarf2-7.d: Update. + +2017-11-01 Thomas Preud'homme <thomas.preudhomme@arm.com> + + * config/tc-arm.c (arm_ext_v2): Define to ARM_EXT_V2 feature bit. + * testsuite/gas/arm/copro.s: Split into + * testsuite/gas/arm/copro-arm_v2plus-thumb_v6t2plus.s: This while + changing it to unified syntax and + * testsuite/gas/arm/copro-arm_v5plus-thumb_v6t2plus.s: this and ... + * testsuite/gas/arm/copro-arm_v5teplus-thumb_v6t2plus.s: This and ... + * testsuite/gas/arm/copro-arm_v6plus-thumb_v6t2plus.s: This. + * testsuite/gas/arm/copro.d: Split into ... + * testsuite/gas/arm/copro-arm_v2plus-arm_v2.d: This but target ARMv2 + and ... + * testsuite/gas/arm/copro-arm_v5plus-arm_v5.d: this but target ARMv5 + and ... + * testsuite/gas/arm/copro-arm_v5teplus-arm_v5te.d: This but target + ARMv5TE and ... + * testsuite/gas/arm/copro-arm_v6plus-arm_v6.d: This but target ARMv6. + * testsuite/gas/arm/copro-arm_v2plus-arm_v1.d: New testcase. + * testsuite/gas/arm/copro-thumb_v6t2plus-thumb_v4t-1.d: New testcase. + * testsuite/gas/arm/copro-arm_v2plus-thumb_v6t2plus-unavail.l: Expected + errors for the above two testcases. + * testsuite/gas/arm/copro-thumb_v6t2plus-thumb_v6t2-1.d: New testcase. + * testsuite/gas/arm/copro-arm_v5plus-arm_v4.d: New testcase. + * testsuite/gas/arm/copro-thumb_v6t2plus-thumb_v4t-2.d: New testcase. + * testsuite/gas/arm/copro-arm_v5plus-thumb_v6t2plus-unavail.l: + Expected errors for the above two testcases. + * testsuite/gas/arm/copro-thumb_v6t2plus-thumb_v6t2-2.d: New testcase. + * testsuite/gas/arm/copro-arm_v5teplus-arm_v5.d: New testcase. + * testsuite/gas/arm/copro-thumb_v6t2plus-thumb_v4t-3.d: New testcase. + * testsuite/gas/arm/copro-arm_v5teplus-thumb_v6t2plus-unavail.l: + Expected errors for the above two testcases. + * testsuite/gas/arm/copro-thumb_v6t2plus-thumb_v6t2-3.d: New testcase. + * testsuite/gas/arm/copro-arm_v6plus-arm_v5te.d: New testcase. + * testsuite/gas/arm/copro-thumb_v6t2plus-thumb_v4t-4.d: New testcase. + * testsuite/gas/arm/copro-arm_v6plus-thumb_v6t2plus-unavail.l: + Expected errors for the above two testcases. + * testsuite/gas/arm/copro-thumb_v6t2plus-thumb_v6t2-4.d: New testcase. + +2017-10-26 H.J. Lu <hongjiu.lu@intel.com> + + PR gas/22352 + * config/tc-i386.c (check_VecOperands): Also check XMM register + for invalid register in AVX512 gathers. + * testsuite/gas/i386/vgather-check.s: Add tests for AVX512 + gathers with XMM register. + * testsuite/gas/i386/x86-64-vgather-check.s: Likewise. + * testsuite/gas/i386/vgather-check-error.l: Updated. + * testsuite/gas/i386/vgather-check-none.d: Likewise. + * testsuite/gas/i386/vgather-check-warn.d: Likewise. + * testsuite/gas/i386/vgather-check-warn.e: Likewise. + * testsuite/gas/i386/vgather-check.d: Likewise. + * testsuite/gas/i386/x86-64-vgather-check-error.l: Likewise. + * testsuite/gas/i386/x86-64-vgather-check-none.d: Likewise. + * testsuite/gas/i386/x86-64-vgather-check-warn.d: Likewise. + * testsuite/gas/i386/x86-64-vgather-check-warn.e: Likewise. + * testsuite/gas/i386/x86-64-vgather-check.d: Likewise. + +2017-10-26 Hans-Peter Nilsson <hp@bitrange.com> + + * testsuite/gas/all/fill-1.s: Use L2 rather than .L2. + +2017-10-25 Alan Modra <amodra@gmail.com> + + PR 22348 + * config/tc-crx.c (instruction, output_opcode): Make static. + (relocatable, ins_parse, cur_arg_num): Likewise. + (parse_insn): Adjust for renamed opcodes globals. + (check_range): Likewise + +2017-10-25 Alan Modra <amodra@gmail.com> + + * testsuite/gas/all/fill-1.d: Exclude tic4x and tic54x. + * testsuite/gas/all/fill-1.s: Use L1 rather than .L1. + +2017-10-24 Andrew Waterman <andrew@sifive.com> + + * testsuite/gas/riscv/c-addi16sp-fail.d: New test. + * testsuite/gas/riscv/c-addi16sp-fail.l: Likewise. + * testsuite/gas/riscv/c-addi16sp-fail.s: Likewise. + * testsuite/gas/riscv/c-addi4spn-fail.d: Likewise. + * testsuite/gas/riscv/c-addi4spn-fail.l: Likewise. + * testsuite/gas/riscv/c-addi4spn-fail.s: Likewise. + * testsuite/gas/riscv/riscv.exp: Add new tests. + +2017-10-24 Andrew Waterman <andrew@sifive.com> + + * testsuite/gas/riscv/c-lui-fail.d: New testcase. + * gas/testsuite/gas/riscv/c-lui-fail.l: Likewise. + * gas/testsuite/gas/riscv/c-lui-fail.s: Likewise. + * gas/testsuite/gas/riscv/riscv.exp: Likewise. + +2017-10-24 H.J. Lu <hongjiu.lu@intel.com> + + * config/tc-i386.c (md_pseudo_table): Add .code64 directive + only if BFD64 is defined. + * testsuite/gas/i386/code64-inval.l: New file. + * gas/testsuite/gas/i386/code64-inval.s: Likewise. + * gas/testsuite/gas/i386/code64.d: Likewise. + * gas/testsuite/gas/i386/code64.s: Likewise. + * testsuite/gas/i386/i386.exp: Run mixed-mode-reloc32, + att-regs, intel-regs, intel-expr and string-ok tests only if + assembler supports x86-64. Run code64 and code64-inval. + +2017-10-23 Palmer Dabbelt <palmer@dabbelt.com> + + * config/tc-riscv.c (riscv_frag_align_code): Align code by 4 + bytes on non-RVC systems. + +2017-10-23 Maciej W. Rozycki <macro@imgtec.com> + + * config/tc-mips.c (mips_elf_final_processing): Don't set + EF_MIPS_ABI2 in `e_flags'. + +2017-10-23 Igor Tsimbalist <igor.v.tsimbalist@intel.com> + + * config/tc-i386.c (cpu_arch): Add .avx512_bitalg. + (cpu_noarch): noavx512_bitalg. + * doc/c-i386.texi: Document .avx512_bitalg, noavx512_bitalg. + * testsuite/gas/i386/i386.exp: Add AVX512_BITALG tests. + * testsuite/gas/i386/avx512f_bitalg-intel.d: New test. + * testsuite/gas/i386/avx512f_bitalg.d: Likewise. + * testsuite/gas/i386/avx512f_bitalg.s: Likewise. + * testsuite/gas/i386/avx512vl_bitalg-intel.d: Likewise. + * testsuite/gas/i386/avx512vl_bitalg.d: Likewise. + * testsuite/gas/i386/avx512vl_bitalg.s: Likewise. + * testsuite/gas/i386/x86-64-avx512f_bitalg-intel.d: Likewise. + * testsuite/gas/i386/x86-64-avx512f_bitalg.d: Likewise. + * testsuite/gas/i386/x86-64-avx512f_bitalg.s: Likewise. + * testsuite/gas/i386/x86-64-avx512vl_bitalg-intel.d: Likewise. + * testsuite/gas/i386/x86-64-avx512vl_bitalg.d: Likewise. + * testsuite/gas/i386/x86-64-avx512vl_bitalg.s: Likewise. + +2017-10-23 Igor Tsimbalist <igor.v.tsimbalist@intel.com> + + * config/tc-i386.c (cpu_arch): Add .avx512_vnni. + (cpu_noarch): Add noavx512_vnni. + * doc/c-i386.texi: Document .avx512_vnni. + * testsuite/gas/i386/i386.exp: Add AVX512_VNNI tests. + * testsuite/gas/i386/avx512vnni-intel.d: New test. + * testsuite/gas/i386/avx512vnni.d: Likewise. + * testsuite/gas/i386/avx512vnni.s: Likewise. + * testsuite/gas/i386/avx512vnni_vl-intel.d: Likewise. + * testsuite/gas/i386/avx512vnni_vl.d: Likewise. + * testsuite/gas/i386/avx512vnni_vl.s: Likewise. + * testsuite/gas/i386/x86-64-avx512vnni-intel.d: Likewise. + * testsuite/gas/i386/x86-64-avx512vnni.d: Likewise. + * testsuite/gas/i386/x86-64-avx512vnni.s: Likewise. + * testsuite/gas/i386/x86-64-avx512vnni_vl-intel.d: Likewise. + * testsuite/gas/i386/x86-64-avx512vnni_vl.d: Likewise. + * testsuite/gas/i386/x86-64-avx512vnni_vl.s: Likewise. + +2017-10-23 Igor Tsimbalist <igor.v.tsimbalist@intel.com> + + * config/tc-i386.c (cpu_arch): Add VPCLMULQDQ. + * doc/c-i386.texi: Document VPCLMULQDQ. + * testsuite/gas/i386/i386.exp: Run VPCLMULQDQ tests. + * testsuite/gas/i386/avx512f_vpclmulqdq-intel.d: New test. + * testsuite/gas/i386/avx512f_vpclmulqdq-wig.s: Ditto. + * testsuite/gas/i386/avx512f_vpclmulqdq-wig1-intel.d: Ditto. + * testsuite/gas/i386/avx512f_vpclmulqdq-wig1.d: Ditto. + * testsuite/gas/i386/avx512f_vpclmulqdq.d: Ditto. + * testsuite/gas/i386/avx512f_vpclmulqdq.s: Ditto. + * testsuite/gas/i386/avx512vl_vpclmulqdq-intel.d: Ditto. + * testsuite/gas/i386/avx512vl_vpclmulqdq-wig.s: Ditto. + * testsuite/gas/i386/avx512vl_vpclmulqdq-wig1-intel.d: Ditto. + * testsuite/gas/i386/avx512vl_vpclmulqdq-wig1.d: Ditto. + * testsuite/gas/i386/avx512vl_vpclmulqdq.d: Ditto. + * testsuite/gas/i386/avx512vl_vpclmulqdq.s: Ditto. + * testsuite/gas/i386/vpclmulqdq-intel.d: Ditto. + * testsuite/gas/i386/vpclmulqdq.d: Ditto. + * testsuite/gas/i386/vpclmulqdq.s: Ditto. + * testsuite/gas/i386/x86-64-avx512f_vpclmulqdq-intel.d: Ditto. + * testsuite/gas/i386/x86-64-avx512f_vpclmulqdq-wig.s: Ditto. + * testsuite/gas/i386/x86-64-avx512f_vpclmulqdq-wig1-intel.d: Ditto. + * testsuite/gas/i386/x86-64-avx512f_vpclmulqdq-wig1.d: Ditto. + * testsuite/gas/i386/x86-64-avx512f_vpclmulqdq.d: Ditto. + * testsuite/gas/i386/x86-64-avx512f_vpclmulqdq.s: Ditto. + * testsuite/gas/i386/x86-64-avx512vl_vpclmulqdq-intel.d: Ditto. + * testsuite/gas/i386/x86-64-avx512vl_vpclmulqdq-wig.s: Ditto. + * testsuite/gas/i386/x86-64-avx512vl_vpclmulqdq-wig1-intel.d: Ditto. + * testsuite/gas/i386/x86-64-avx512vl_vpclmulqdq-wig1.d: Ditto. + * testsuite/gas/i386/x86-64-avx512vl_vpclmulqdq.d: Ditto. + * testsuite/gas/i386/x86-64-avx512vl_vpclmulqdq.s: Ditto. + * testsuite/gas/i386/x86-64-vpclmulqdq-intel.d: Ditto. + * testsuite/gas/i386/x86-64-vpclmulqdq.d: Ditto. + * testsuite/gas/i386/x86-64-vpclmulqdq.s: Ditto. + +2017-10-23 Igor Tsimbalist <igor.v.tsimbalist@intel.com> + + * config/tc-i386.c (cpu_arch): Add VAES. + * doc/c-i386.texi: Document VAES. + * testsuite/gas/i386/i386.exp: Run VAES tests. + * testsuite/gas/i386/avx512f_vaes-intel.d: New test. + * testsuite/gas/i386/avx512f_vaes-wig.s: Ditto. + * testsuite/gas/i386/avx512f_vaes-wig1-intel.d: Ditto. + * testsuite/gas/i386/avx512f_vaes-wig1.d: Ditto. + * testsuite/gas/i386/avx512f_vaes.d: Ditto. + * testsuite/gas/i386/avx512f_vaes.s: Ditto. + * testsuite/gas/i386/avx512vl_vaes-intel.d: Ditto. + * testsuite/gas/i386/avx512vl_vaes-wig.s: Ditto. + * testsuite/gas/i386/avx512vl_vaes-wig1-intel.d: Ditto. + * testsuite/gas/i386/avx512vl_vaes-wig1.d: Ditto. + * testsuite/gas/i386/avx512vl_vaes.d: Ditto. + * testsuite/gas/i386/avx512vl_vaes.s: Ditto. + * testsuite/gas/i386/vaes-intel.d: Ditto. + * testsuite/gas/i386/vaes.d: Ditto. + * testsuite/gas/i386/vaes.s: Ditto. + * testsuite/gas/i386/x86-64-avx512f_vaes-intel.d: Ditto. + * testsuite/gas/i386/x86-64-avx512f_vaes-wig.s: Ditto. + * testsuite/gas/i386/x86-64-avx512f_vaes-wig1-intel.d: Ditto. + * testsuite/gas/i386/x86-64-avx512f_vaes-wig1.d: Ditto. + * testsuite/gas/i386/x86-64-avx512f_vaes.d: Ditto. + * testsuite/gas/i386/x86-64-avx512f_vaes.s: Ditto. + * testsuite/gas/i386/x86-64-avx512vl_vaes-intel.d: Ditto. + * testsuite/gas/i386/x86-64-avx512vl_vaes-wig.s: Ditto. + * testsuite/gas/i386/x86-64-avx512vl_vaes-wig1-intel.d: Ditto. + * testsuite/gas/i386/x86-64-avx512vl_vaes-wig1.d: Ditto. + * testsuite/gas/i386/x86-64-avx512vl_vaes.d: Ditto. + * testsuite/gas/i386/x86-64-avx512vl_vaes.s: Ditto. + * testsuite/gas/i386/x86-64-vaes-intel.d: Ditto. + * testsuite/gas/i386/x86-64-vaes.d: Ditto. + * testsuite/gas/i386/x86-64-vaes.s: Ditto. + +2017-10-23 Igor Tsimbalist <igor.v.tsimbalist@intel.com> + + * config/tc-i386.c (cpu_arch): Add .gfni. + * doc/c-i386.texi: Document .gfni. + * testsuite/gas/i386/i386.exp: Add GFNI tests. + * testsuite/gas/i386/avx.s: New GFNI test. + * testsuite/gas/i386/x86-64-avx.s: Likewise. + * testsuite/gas/i386/avx.d: Adjust. + * testsuite/gas/i386/avx-intel.d: Likewise + * testsuite/gas/i386/ilp32/x86-64-avx-intel.d: Likewise. + * testsuite/gas/i386/ilp32/x86-64-avx.d: Likewise. + * testsuite/gas/i386/avx512f_gfni-intel.d: New test. + * testsuite/gas/i386/avx512f_gfni.d: Likewise. + * testsuite/gas/i386/avx512f_gfni.s: Likewise. + * testsuite/gas/i386/avx512vl_gfni-intel.d: Likewise. + * testsuite/gas/i386/avx512vl_gfni.d: Likewise. + * testsuite/gas/i386/avx512vl_gfni.s: Likewise. + * testsuite/gas/i386/gfni-intel.d: Likewise. + * testsuite/gas/i386/gfni.d: Likewise. + * testsuite/gas/i386/gfni.s: Likewise. + * testsuite/gas/i386/x86-64-avx512f_gfni-intel.d: Likewise. + * testsuite/gas/i386/x86-64-avx512f_gfni.d: Likewise. + * testsuite/gas/i386/x86-64-avx512f_gfni.s: Likewise. + * testsuite/gas/i386/x86-64-avx512vl_gfni-intel.d: Likewise. + * testsuite/gas/i386/x86-64-avx512vl_gfni.d: Likewise. + * testsuite/gas/i386/x86-64-avx512vl_gfni.s: Likewise. + * testsuite/gas/i386/x86-64-avx_gfni-intel.d: Likewise. + * testsuite/gas/i386/x86-64-avx_gfni.d: Likewise. + * testsuite/gas/i386/x86-64-avx_gfni.s: Likewise. + * testsuite/gas/i386/x86-64-gfni-intel.d: Likewise. + * testsuite/gas/i386/x86-64-gfni.d: Likewise. + * testsuite/gas/i386/x86-64-gfni.s: Likewise. + +2017-10-23 Igor Tsimbalist <igor.v.tsimbalist@intel.com> + + * config/tc-i386.c (cpu_arch): Add .avx512_vbmi2. + (cpu_noarch): noavx512_vbmi2. + * doc/c-i386.texi: Document .avx512_vbmi2, noavx512_vbmi2. + * testsuite/gas/i386/i386.exp: Add AVX512_VBMI2 tests. + * testsuite/gas/i386/avx512vbmi2-intel.d: New test. + * testsuite/gas/i386/avx512vbmi2.d: Likewise. + * testsuite/gas/i386/avx512vbmi2.s: Likewise. + * testsuite/gas/i386/avx512vbmi2_vl-intel.d: Likewise. + * testsuite/gas/i386/avx512vbmi2_vl.d: Likewise. + * testsuite/gas/i386/avx512vbmi2_vl.s: Likewise. + * testsuite/gas/i386/x86-64-avx512vbmi2-intel.d: Likewise. + * testsuite/gas/i386/x86-64-avx512vbmi2.d: Likewise. + * testsuite/gas/i386/x86-64-avx512vbmi2.s: Likewise. + * testsuite/gas/i386/x86-64-avx512vbmi2_vl-intel.d: Likewise. + * testsuite/gas/i386/x86-64-avx512vbmi2_vl.d: Likewise. + * testsuite/gas/i386/x86-64-avx512vbmi2_vl.s: Likewise. + +2017-10-22 Hans-Peter Nilsson <hp@axis.com> + + PR gas/22304 + * testsuite/gas/cris/range-err-1.s: Remove quotes left from last edit. + +2017-10-20 Nick Clifton <nickc@redhat.com> + + PR 22324 + * read.c (s_rept): Use size_t type for count parameter. + (do_repeat): Change type of count parameter to size_t. + Issue an error is the count parameter is negative. + (do_repeat_with_expression): Likewise. + * read.h: Update prototypes for do_repeat and + do_repeat_with_expression. + * doc/as.texinfo (Rept): Document that a zero count is allowed but + negative counts are not. + * config/tc-rx.c (rx_rept): Use size_t type for count parameter. + * config/tc-tic54x.c (tic54x_loop): Cast count parameter to size_t + type. + * testsuite/gas/macros/end.s: Add a test using a negative repeat + count. + * testsuite/gas/macros/end.l: Add expected error message. + +2017-10-19 Palmer Dabbelt <palmer@dabbelt.com> + + * config/tc-riscv.c (md_apply_fix): Mark + BFD_RELOC_RISCV_PCREL_HI20 as relaxable when relaxations are + enabled. + +2017-10-19 Nick Clifton <nickc@redhat.com> + + PR 21621 + * config/tc-avr.h (struct avr_frag_data): Add prev_opcode field. + (TC_FRAG_INIT): Define. + (avr_frag_init): Add prototype. + * config/tc-avr.c (avr_frag_init): New function. + (avr_operands): Replace static local 'prev' variable with + prev_opcode field in current frag. + * testsuite/gas/avr/pr21621.s: New test source file. + * testsuite/gas/avr/pr21621.d: New test driver file. + * testsuite/gas/avr/pr21621.s: New test error output file. + +2017-10-19 Andreas Krebbel <krebbel@linux.vnet.ibm.com> + + * testsuite/gas/all/fill-1.s: Use normal labels. Change .text to + .data. Pick different values. Use .dc.w instead of .word. + * testsuite/gas/all/fill-1.d: New objdump output check. + * testsuite/gas/all/gas.exp: Use run_dump_test to execute fill-1 + testcase. + +2017-10-18 Palmer Dabbelt <palmer@dabbelt.com> + + * testsuite/gas/all/align.d: Mark as unsupported on RISC-V. + testsuite/gas/all/relax.d: Likewise. + testsuite/gas/all/sleb128-2.d: Likewise. + testsuite/gas/all/sleb128-4.d: Likewise. + testsuite/gas/all/sleb128-5.d: Likewise. + testsuite/gas/all/sleb128-7.d: Likewise. + testsuite/gas/elf/section11.d: Likewise. + testsuite/gas/all/gas.exp (diff1.s): Likewise. + +2017-10-18 Nick Clifton <nickc@redhat.com> + + PR gas/22304 + * testsuite/gas/cris/range-err-1.s: Remove spurious xfails. + * testsuite/gas/cris/cris.exp: Expect the shexpr-1 test to pass. + +2017-10-18 Nick Clifton <nickc@redhat.com> + + * po/sv.po: Updated Swedish translation. + +2017-10-16 Sandra Loosemore <sandra@codesourcery.com> + Henry Wong <henry@stuffedcow.net> + + * config/tc-nios2.c (nios2_translate_pseudo_insn): Check for + correct number of arguments. + (md_assemble): Handle failure of nios2_translate_pseudo_insn. + * testsuite/gas/nios2/illegal_pseudoinst.l: New file. + * testsuite/gas/nios2/illegal_pseudoinst.s: New file. + * testsuite/gas/nios2/nios2.exp: Add illegal_pseudoinst test. + +2017-10-12 James Bowman <james.bowman@ftdichip.com> + + * config/tc-ft32.c (md_assemble): Replace FT32_FLD_K8 with + K15. + (md_apply_fix, tc_gen_reloc): Add BFD_RELOC_FT32_15. + +2017-10-11 Nick Clifton <nickc@redhat.com> + + PR 21977 + * listing.c (listing_newline): Use the name of the current + physical input file, rather than the current logical input file, + unless including high level source in the listing. + * input-scrub.c (as_where_physical): New function. Returns the + name of the current physical input file. + * as.h: Add prototype for as_where_physical. + +2017-10-09 Andreas Krebbel <krebbel@linux.vnet.ibm.com> + + * testsuite/gas/s390/zarch-arch12.d (prno, tpei, irbm): New + instructions added. + * testsuite/gas/s390/zarch-arch12.s: Likewise. + * testsuite/gas/s390/zarch-z13.d: Rename ppno to prno. + +2017-10-09 Andreas Krebbel <krebbel@linux.vnet.ibm.com> + + * testsuite/gas/all/fill-1.s: Replace nop with .word 42 + +2017-10-09 Andreas Krebbel <krebbel@linux.vnet.ibm.com> + + * read.c (s_fill): Invoke expression instead of + get_known_segmented_expression. + * testsuite/gas/all/fill-1.s: New testcase. + * testsuite/gas/all/gas.exp: Run fill-1 testcase + +2017-10-05 Nick Clifton <nickc@redhat.com> + + PR 22133 + * config/tc-msp430.c (parse_exp): Skip an 'h' suffix to constant + expressions. + (msp430_srcoperand): Check that the entire text was parsed by + parse_exp. + (msp430_operands): Likewise. + * testsuite/gas/msp430/pr22133.s: New test file. + * testsuite/gas/msp430/pr22133.d: New test driver. + * testsuite/gas/msp430/pr22133.s: Expected error output. + * testsuite/gas/msp430/msp430.exp: Run the new test. + +2017-10-04 H.J. Lu <hongjiu.lu@intel.com> + + PR gas/21167 + * testsuite/gas/elf/elf.exp: Run group3. + * testsuite/gas/elf/group3.d: New file. + * testsuite/gas/elf/group3.s: Likewise. + +2017-10-05 Alan Modra <amodra@gmail.com> + + PR 21167 + * config/obj-elf.c (struct group_list): Delete elt_count. + (groups): New static. + (build_group_lists): Don't count elements. + (elf_adjust_symtab): Use "groups" rather than auto "list". Set up + pointer from group member to SHT_GROUP section. Don't size + SHT_GROUP section or clean up here.. + (elf_frob_file_after_relocs): ..do so here instead. + * testsuite/gas/arc/jli-1.d, + * testsuite/gas/elf/groupautob.d, + * testsuite/gas/mips/compact-eh-eb-2.d, + * testsuite/gas/mips/compact-eh-eb-5.d, + * testsuite/gas/mips/compact-eh-el-2.d, + * testsuite/gas/mips/compact-eh-el-5.d: Adjust. + +2017-10-01 Alexander Fedotov <alfedotov@gmail.com> + + * testsuite/gas/ppc/vle-mult-ld-st-insns.s: New file: Tests the + support for the VLE multiple load/store instructions. + * testsuite/gas/ppc/vle-mult-ld-st-insns.d: New file: Test + driver. + * testsuite/gas/ppc/ppc.exp: Run it. + +2017-09-27 Nick Clifton <nickc@redhat.com> + + PR 22179 + * testsuite/gas/riscv/fmv.x.s: New file: Tests the support for the + renamed fmv.x.s and fmv.s.x instructions. + * testsuite/gas/riscv/fmv.x.d: New file: Test driver. + +2017-09-21 Maciej W. Rozycki <macro@imgtec.com> + + * testsuite/gas/mips/elf_mach_5900.d: New test. + * testsuite/gas/mips/mips.exp: Run it. + +2017-09-21 James Cowgill <James.Cowgill@imgtec.com> + + PR gas/21762 + * config/tc-mips.c (s_mips_stab): Insert call to + file_mips_check_options. + * testsuite/gas/mips/micromips@stabs-symbol-type.d: New test. + * testsuite/gas/mips/mips.exp: Run the new tests. + * testsuite/gas/mips/mips16@stabs-symbol-type.d: New test. + * testsuite/gas/mips/stabs-symbol-type.d: New test. + * testsuite/gas/mips/stabs-symbol-type.s: New test source. + +2017-09-21 Alan Modra <amodra@gmail.com> + + * config/tc-ppc.h (EH_FRAME_ALIGNMENT): Define. + +2017-09-14 Alan Modra <amodra@gmail.com> + + PR 22127 + * write.c (resolve_reloc_expr_symbols): Don't segfault when + sec has been set to NULL. + +2017-09-09 H.J. Lu <hongjiu.lu@intel.com> + + * config/tc-i386.c (NOTRACK_PREFIX): Removed. + (REX_PREFIX): Updated. + (MAX_PREFIXES): Likewise. + (parse_insn): Remove restriction on NOTRACK prefix position. + * testsuite/gas/i386/notrack.s: Add tests with NOTRACK prefix + before other prefixes. + * testsuite/gas/i386/x86-64-notrack.s: Likewise. + * testsuite/gas/i386/notrackbad.s: Remove tests with NOTRACK + prefix before other prefixes. + * testsuite/gas/i386/x86-64-notrackbad.s: Likewise. + * testsuite/gas/i386/notrack-intel.d: Updated. + * testsuite/gas/i386/notrack.d: Likewise. + * testsuite/gas/i386/notrackbad.l: Likewise. + * testsuite/gas/i386/x86-64-notrack-intel.d: Likewise. + * testsuite/gas/i386/x86-64-notrack.d: Likewise. + * testsuite/gas/i386/x86-64-notrackbad.l: Likewise. + +2017-09-07 Palmer Dabbelt <palmer@dabbelt.com> + + * config/tc-riscv.c (riscv_frag_align_code): Emit the entire + alignment sequence inside R_RISCV_ALIGN. + +2017-09-05 Alexander Fedotov <alexander.fedotov@nxp.com> + Edmar Wienskoski <edmar.wienskoski@nxp.com + + * config/tc-ppc.c (md_parse_option): Handle "mno-vle" flag. + (ppc_elf_section_letter): New function. + * config/tc-ppc.h (md_elf_section_letter): New. + * testsuite/gas/elf/section10.d: Adjust for VLE. + +2017-09-01 Tamar Christina <tamar.christina@arm.com> + + * config/tc-aarch64.c (aarch64_cpus): Enable DOTPROD for + cortex-a55 and cortx-a75. + +2017-08-30 Maciej W. Rozycki <macro@imgtec.com> + + * testsuite/gas/mips/branch-addend-micromips.d: New test. + * testsuite/gas/mips/branch-addend-micromips-n32.d: New test. + * testsuite/gas/mips/branch-addend-micromips-n64.d: New test. + * testsuite/gas/mips/branch-addend-micromips.s: New test source. + * testsuite/gas/mips/mips.exp: Run the new tests. + +2017-08-30 Maciej W. Rozycki <macro@imgtec.com> + + * config/tc-mips.c (md_convert_frag): Respect + `mips_ignore_branch_isa'. + * testsuite/gas/mips/branch-local-5.d: New test. + * testsuite/gas/mips/branch-local-n32-5.d: New test. + * testsuite/gas/mips/branch-local-n64-5.d: New test. + * testsuite/gas/mips/branch-local-6.d: New test. + * testsuite/gas/mips/branch-local-n32-6.d: New test. + * testsuite/gas/mips/branch-local-n64-6.d: New test. + * testsuite/gas/mips/branch-local-7.d: New test. + * testsuite/gas/mips/branch-local-n32-7.d: New test. + * testsuite/gas/mips/branch-local-n64-7.d: New test. + * testsuite/gas/mips/branch-local-ignore-5.d: New test. + * testsuite/gas/mips/branch-local-ignore-n32-5.d: New test. + * testsuite/gas/mips/branch-local-ignore-n64-5.d: New test. + * testsuite/gas/mips/branch-local-ignore-6.d: New test. + * testsuite/gas/mips/branch-local-ignore-n32-6.d: New test. + * testsuite/gas/mips/branch-local-ignore-n64-6.d: New test. + * testsuite/gas/mips/branch-local-5.l: New stderr output. + * testsuite/gas/mips/branch-local-6.l: New stderr output. + * testsuite/gas/mips/branch-local-5.s: New test source. + * testsuite/gas/mips/branch-local-6.s: New test source. + * testsuite/gas/mips/branch-local-7.s: New test source. + * testsuite/gas/mips/mips.exp: Run the new tests. + +2017-08-30 Maciej W. Rozycki <macro@imgtec.com> + + * testsuite/gas/mips/branch-local-n32-2.d: Use `branch-local-2.l' + for `error-output'. + * testsuite/gas/mips/branch-local-n64-2.d: Likewise. + * testsuite/gas/mips/branch-local-n32-3.d: Use `branch-local-3.l' + for `error-output'. + * testsuite/gas/mips/branch-local-n64-3.d: Likewise. + * testsuite/gas/mips/branch-local-n32-2.l: Remove file. + * testsuite/gas/mips/branch-local-n64-2.l: Remove file. + * testsuite/gas/mips/branch-local-n32-3.l: Remove file. + * testsuite/gas/mips/branch-local-n64-3.l: Remove file. + +2017-08-29 Jozef Lawrynowicz <jozef.l@somniumtech.com> + + * config/tc-msp430.c (md_parse_option): Define high data and high + bss symbols if -mdata-region is passed. + Define -mdata-region open. + * doc/c-msp430.texi: Document -mdata-region. + * testsuite/gas/msp430/high-data-bss-sym.d: New test. + * testsuite/gas/msp430/high-data-bss-sym.s: New. + * testsuite/gas/msp430/msp430.exp: Add -mdata-region tests. + +2017-08-23 Alexander Fedotov <alexander.fedotov@nxp.com> + Edmar Wienskoski <edmar.wienskoski@nxp.com + + * config/tc-ppc.c: + (md_parse_option): Add mspe2 switch. + (md_show_usage): Document -mspe2. + (ppc_setup_opcodes): Handle spe2_opcodes. + * doc/as.texinfo: Document -mspe2. + * doc/c-ppc.texi: Likewise. + * testsuite/gas/ppc/efs.d: New file. + * testsuite/gas/ppc/efs.s: Likewise. + * testsuite/gas/ppc/efs2.d: Likewise. + * testsuite/gas/ppc/efs2.s: Likewise. + * testsuite/gas/ppc/ppc.exp: Run new tests. + * testsuite/gas/ppc/spe.d: New file. + * testsuite/gas/ppc/spe.s: Likewise. + * testsuite/gas/ppc/spe2-checks.d: Likewise. + * testsuite/gas/ppc/spe2-checks.l: Likewise. + * testsuite/gas/ppc/spe2-checks.s: Likewise. + * testsuite/gas/ppc/spe2.d: Likewise. + * testsuite/gas/ppc/spe2.s: Likewise. + * testsuite/gas/ppc/spe_ambiguous.d: Likewise. + * testsuite/gas/ppc/spe_ambiguous.s: Likewise. + +2017-08-23 James Clarke <jrtc27@jrtc27.com> + + * config/tc-sparc.c (tc_gen_reloc): Convert BFD_RELOC_8/16/32/64 + into the corresponding BFD_RELOC_8/16/32/64_PCREL relocation + when requested. + * config/tc-sparc.h (DIFF_EXPR_OK): Define to enable PC-relative + diff relocations. + (TC_FORCE_RELOCATION_SUB_LOCAL): Define to ensure only supported + relocations are made PC-relative. + (CFI_DIFF_EXPR_OK): Define to 0 to force BFD_RELOC_32_PCREL to + be used directly, since otherwise BFD_RELOC_SPARC_UA32 will be + used for .eh_frame which cannot in general be converted to a + BFD_RELOC_32_PCREL due to alignment requirements. + +2017-08-22 Alan Modra <amodra@gmail.com> + + * testsuite/gas/ppc/lsp-checks.d: Assemble with -a32. + * testsuite/gas/ppc/lsp.d: Likewise. + +2017-08-21 Alexander Fedotov <alexander.fedotov@nxp.com> + Edmar Wienskoski <edmar.wienskoski@nxp.com + + * testsuite/gas/ppc/lsp-checks.d, + * testsuite/gas/ppc/lsp-checks.l, + * testsuite/gas/ppc/lsp-checks.s: New test. + * testsuite/gas/ppc/lsp.d, + * testsuite/gas/ppc/lsp.s: New test. + * testsuite/gas/ppc/ppc.exp: Run new tests. + +2017-08-15 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com> + + * config/tc-aarch64.c (REGDEF_ALIAS): Define + (reg_names): Update for ip0, ip1, fp, lr to use REGDEF_ALIAS + * doc/c-aarch64.texi: Update documentation on .req. + * testsuite/gas/diagnostic.s: Update + * testsuite/gas/diagnostic.l: Likewise + * testsuite/gas/register_aliases.s: New file. + * testsuite/gas/register_aliases.d: New file. + +2017-08-11 H.J. Lu <hongjiu.lu@intel.com> + + PR gas/21667 + * read.c (pseudo_set): Update error message for alias of common + symbol. + * write.c (write_object_file): Disallow both local and global + aliases of common symbol. + * testsuite/gas/elf/common5a.d: New file. + * testsuite/gas/elf/common5a.l: Likewise. + * testsuite/gas/elf/common5a.s: Likewise. + * testsuite/gas/elf/common5b.d: Likewise. + * testsuite/gas/elf/common5b.l: Likewise. + * testsuite/gas/elf/common5b.s: Likewise. + * testsuite/gas/elf/common5c.d: Likewise. + * testsuite/gas/elf/common5c.s: Likewise. + * testsuite/gas/elf/common5d.d: Likewise. + * testsuite/gas/elf/common5d.s: Likewise. + * testsuite/gas/elf/elf.exp: Run common5a, common5b, common5c + and common5d. + +2017-08-10 Nick Clifton <nickc@redhat.com> + + PR gas/21939 + * config/obj-macho.c (obj_mach_o_set_indirect_symbols): Increase + size of indirect_syms array so that it is large enough to hold + every symbol if necessary. + +2017-08-09 Jiong Wang <jiong.wang@arm.com> + + * config/tc-arm.c (do_crc32_1): Remove warning on REG_SP for thumb_mode. + * testsuite/gas/arm/crc32-armv8-a-bad.d: Update exepcted result. + * testsuite/gas/arm/crc32-armv8-r-bad.d: Likewise. + * testsuite/gas/arm/crc32-armv8-a.d: Likewise. + * testsuite/gas/arm/crc32-armv8-r.d: Likewise. + * testsuite/gas/arm/crc32-armv8-ar-bad.s: Update test case. + * testsuite/gas/arm/crc32-armv8-ar.s: Likewise. + * testsuite/gas/arm/crc32-bad.l: Update expected error message. + +2017-08-02 Nick Clifton <nickc@redhat.com> + + * testsuite/gas/all/gas.exp: Add am33 to the skip lists of tests + passed over by the mn10300 target. + * testsuite/gas/elf/elf.exp: Likewise. + * testsuite/gas/elf/dwarf2-11.d: Correct skip of am33 target. + * testsuite/gas/elf/dwarf2-12.d: Likewise. + * testsuite/gas/elf/dwarf2-13.d: Likewise. + * testsuite/gas/elf/dwarf2-14.d: Likewise. + * testsuite/gas/elf/dwarf2-15.d: Likewise. + * testsuite/gas/elf/dwarf2-16.d: Likewise. + * testsuite/gas/elf/dwarf2-17.d: Likewise. + * testsuite/gas/elf/dwarf2-18.d: Likewise. + * testsuite/gas/elf/dwarf2-5.d: Likewise. + * testsuite/gas/elf/dwarf2-6.d: Likewise. + * testsuite/gas/elf/dwarf2-7.d: Likewise. + +2017-07-31 John David Anglin <danglin@gcc.gnu.org> + + * config/tc-hppa.c (pa_ip): Clear `d' bit in branch on bit instructions + with a double-word condition and a fixed bit position greater than 31. + +2017-07-28 Andrew Waterman <andrew@sifive.com> + + * config/tc-riscv.c (riscv_set_arch): Handle the Q subset like + all other subsets. + Obviate use-after-free. + +2017-07-25 Nick Clifton <nickc@redhat.com> + + PR 21739 + * testsuite/gas/arc/add_s-err.s: Update expected error message. + +2017-07-24 Nick Clifton <nickc@redhat.com> + + PR 21809 + * config/tc-aarch64.c (aarch64_init_frag): Do not set a mapping + state for frags in debug sections. + * config/tc-arm.c (arm_init_frag): Likewise. + +2017-07-24 Hans-Peter Nilsson <hp@bitrange.com> + + * dwarf2dbg.c (dwarf2dbg_final_check): Rename local variable exp + from expr. + +2017-07-21 Andreas Krebbel <krebbel@linux.vnet.ibm.com> + + * config/tc-s390.c (s390_parse_cpu): Add z14 as alternate CPU + name. + * doc/as.texinfo: Add z14 to CPU string list. + * doc/c-s390.texi: Likewise. + +2017-07-21 Alexandre Oliva <aoliva@redhat.com> + + * dwarf2dbg.c (unused): Check offset of next in struct line_entry. + (current): Initialize view. + (force_reset_view, view_assert_failed): New variables. + (reverse_line_entry_list): New function. + (set_or_check_view): Likewise. + (dwarf2_gen_line_info_1): Call it. + (dwarf2_where): Set view to NULL. + (dwarf2_emit_insn): Return early when called before first file. + (dwarf2_directive_loc): Add view support. Emit insn + immediately when view option is given. + (process_entries): Avoid set_address to reset view when a known + address change already implies the view reset. + (dwarf2dbg_final_check): New function. + * dwarf2dbg.h (struct dwarf2_line_info): Add view. + (dwarf2dbg_final_check): Declare. + * read.c (s_leb128): Parse expression as deferred. + * write.c (write_object_file): Check pending view asserts. + (cvt_frag_to_fill): Complain about undefined leb128 operand. + * doc/as.texinfo (.loc): Document view support. + * NEWS: Mention the new feature. + * testsuite/gas/all/gas.exp: Run sleb128-9. + * testsuite/gas/all/sleb128-9.d: New. + * testsuite/gas/all/sleb128-9.l: New. + * testsuite/gas/all/sleb128-9.s: New. + * testsuite/gas/elf/dwarf2-1.d: Add nonzero views. + * testsuite/gas/elf/dwarf2-2.d: Likewise. + * testsuite/gas/elf/dwarf2-5.d: New. + * testsuite/gas/elf/dwarf2-5.s: New. + * testsuite/gas/elf/dwarf2-6.d: New. + * testsuite/gas/elf/dwarf2-6.s: New. + * testsuite/gas/elf/dwarf2-7.d: New. + * testsuite/gas/elf/dwarf2-7.s: New. + * testsuite/gas/elf/dwarf2-8.d: New. + * testsuite/gas/elf/dwarf2-8.l: New. + * testsuite/gas/elf/dwarf2-8.s: New. + * testsuite/gas/elf/dwarf2-9.d: New. + * testsuite/gas/elf/dwarf2-9.l: New. + * testsuite/gas/elf/dwarf2-9.s: New. + * testsuite/gas/elf/dwarf2-10.d: New. + * testsuite/gas/elf/dwarf2-10.l: New. + * testsuite/gas/elf/dwarf2-10.s: New. + * testsuite/gas/elf/dwarf2-11.d: New. + * testsuite/gas/elf/dwarf2-11.s: New. + * testsuite/gas/elf/dwarf2-12.d: New. + * testsuite/gas/elf/dwarf2-12.s: New. + * testsuite/gas/elf/dwarf2-13.d: New. + * testsuite/gas/elf/dwarf2-13.s: New. + * testsuite/gas/elf/dwarf2-14.d: New. + * testsuite/gas/elf/dwarf2-14.s: New. + * testsuite/gas/elf/dwarf2-15.d: New. + * testsuite/gas/elf/dwarf2-15.s: New. + * testsuite/gas/elf/dwarf2-16.d: New. + * testsuite/gas/elf/dwarf2-16.s: New. + * testsuite/gas/elf/dwarf2-17.d: New. + * testsuite/gas/elf/dwarf2-17.s: New. + * testsuite/gas/elf/dwarf2-18.d: New. + * testsuite/gas/elf/dwarf2-18.s: New. + * testsuite/gas/elf/elf.exp: Run dwarf2-5..18 tests. + * testsuite/gas/i386/dw2-compress-1.d: Add nonzero views. + * testsuite/gas/i386/dw2-compressed-1.d: Likewise. + * testsuite/gas/i386/ilp32/lns/lns-duplicate.d: Likewise. + * testsuite/gas/lns/lns-big-delta.d: Likewise. + * testsuite/gas/lns/lns-duplicate.d: Likewise. + * testsuite/gas/mips/loc-swap-2.d: Likewise. + * testsuite/gas/mips/loc-swap-3.d: Likewise. + * testsuite/gas/mips/loc-swap.d: Likewise. + * testsuite/gas/mips/micromips@loc-swap-2.d: Likewise. + * testsuite/gas/mips/micromips@loc-swap.d: Likewise. + * testsuite/gas/mips/mips16@loc-swap-2.d: Likewise. + * testsuite/gas/mips/mips16@loc-swap.d: Likewise. + * testsuite/gas/mips/mips16e@loc-swap.d: Likewise. + +2017-07-19 Claudiu Zissulescu <claziss@synopsys.com> + + * testsuite/gas/arc/jli-1.d: New file. + * testsuite/gas/arc/jli-1.s: Likewise. + * testsuite/gas/arc/taux.d: Update for jli_base. + +2017-07-19 Tristan Gingold <gingold@adacore.com> + + * as.c (start_sbrk): Remove. + (main): Remove assignment. + (dump_statistics): Remove display of data size. + +2017-07-19 Tristan Gingold <gingold@adacore.com> + + * testsuite/gas/pe/seh-x64-err-2.s: New test. + * testsuite/gas/pe/seh-x64-err-2.l: New stderr output. + * testsuite/gas/pe/pe.exp: Add test. + * config/obj-coff-seh.c (obj_coff_seh_do_final): Don't try to end + seh part. + +2017-07-18 Nick Clifton <nickc@redhat.com> + + PR 21775 + * config/tc-arm.c: Fix spelling typos. + * config/tc-mips.c: Likewise. + * config/tc-msp430.c: Likewise. + * config/tc-sh64.c: Likewise. + * config/tc-tic4x.c: Likewise. + * ecoff.c: Likewise. + * testsuite/gas/arm/ldr-bad.l: Likewise. + * testsuite/gas/arm/ldr-t-bad.l: Likewise. + * testsuite/gas/tic54x/opcodes.s: Likewise. + * testsuite/gas/msp340/errata_warns.l: Likewise. + +2017-07-18 Nick Clifton <nickc@redhat.com> + + * po/uk.po: Updated Ukranian translation. + +2017-07-17 Georg-Johann Lay <avr@gjlay.de> + + PR 21472 + * config/tc-avr.c (mcu_types): Add entries for: attiny212, + attiny214, attiny412, attiny414, attiny814, attiny1614, + attiny1616, attiny1617, attiny3214, attiny3216, attiny3217. + (md_show_usage): Adjust doc for "avrxmega3". + * doc/c-avr.texi (AVR options) [-mmcu=]: Adjust doc for avrxmega3. + Add MCUs: attiny212, attiny214, attiny412, attiny414, attiny416, + attiny417, attiny814, attiny816, attiny817, attiny1614, + attiny1616, attiny1617, attiny3214, attiny3216, attiny3217. + +2017-07-13 Jim Wilson <jim.wilson@linaro.org> + + * config/tc-arch64.c (aarch64_cpus): Add AARCH64_FEATURE_RDMA to + falkor and qdf24xx entries. + +2017-07-12 Alan Modra <amodra@gmail.com> + + * po/es.po: Update from translationproject.org/latest/gas/. + * po/fi.po: Likewise. + * po/fr.po: Likewise. + * po/id.po: Likewise. + * po/ja.po: Likewise. + * po/ru.po: Likewise. + * po/sv.po: Likewise. + * po/tr.po: Likewise. + * po/uk.po: Likewise. + * po/zh_CN.po: Likewise. + +2017-07-12 Nick Clifton <nickc@redhat.com> + + Fix compile time warnings using gcc 7.1.1. + * config/tc-pru.c (md_assemble): Add continue statement after + handling 'E' operand character. + * config/tc-v850.c (md_assemble): Initialise the 'insn' variable. + +2017-07-05 James Greenhalgh <james.greenhalgh@arm.com> + + * config/tc-arm.c (arm_cpus): Add Cortex-A55 and Cortex-A75. + * doc/c-arm.texi (-mcpu): Document Cortex-A55 and Cortex-A75. + +2017-07-05 Borislav Petkov <bp@suse.de> + + * testsuite/gas/i386/opcode.s: Add tests for ModRM.reg == 6 variants. + * testsuite/gas/i386/opcode.d: ditto. + * testsuite/gas/i386/x86-64-opcode.s: Add x86_64 variants too. + * testsuite/gas/i386/x86-64-opcode.d: ditto. + +2017-07-04 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com> + + * config/tc-arm.c (arm_regs): Add MVFR2. + (do_vmrs): Constraint for MVFR2 and armv8. + (do_vmsr): Likewise. + * testsuite/gas/arm/armv8-a+fp.d: Update. + * testsuite/gas/arm/armv8-ar+fp.s: Likewise. + * testsuite/gas/arm/armv8-r+fp.d: Likewise. + * testsuite/gas/arm/vfp-bad.s: Likewise. + * testsuite/gas/arm/vfp-bad.l: Likewise. + +2017-07-04 Tristan Gingold <gingold@adacore.com> + + * configure: Regenerate. + +2017-07-04 Tristan Gingold <gingold@adacore.com> + + * NEWS: Add marker for 2.29. + +2017-07-03 Alan Modra <amodra@gmail.com> + + * testsuite/gas/elf/symver.d: Don't run on hppa64-hpux. + +2017-06-30 Maciej W. Rozycki <macro@imgtec.com> + + * config/tc-mips.c (md_convert_frag): Use a switch on the + microMIPS relaxation type rather than a chain of conditionals. + +2017-06-30 Maciej W. Rozycki <macro@imgtec.com> + + * config/tc-mips.c (md_convert_frag): Rewrite `fix_new_exp' + calls in terms of `fix_new'. + +2017-06-30 Maciej W. Rozycki <macro@imgtec.com> + + * config/tc-mips.c (md_convert_frag): Don't make a helper + expression symbol for `fix_new_exp' called with a non-zero + offset. + * testsuite/gas/mips/relax-offset.d: New test. + * testsuite/gas/mips/mips1@relax-offset.d: New test. + * testsuite/gas/mips/r3000@relax-offset.d: New test. + * testsuite/gas/mips/r3900@relax-offset.d: New test. + * testsuite/gas/mips/micromips@relax-offset.d: New test. + * testsuite/gas/mips/relax-offset.l: New stderr output. + * testsuite/gas/mips/relax-offset.s: New test source. + * testsuite/gas/mips/mips.exp: Run the new tests. + +2017-06-30 Georg-Johann Lay <avr@gjlay.de> + + PR gas/21683 + * doc/c-avr.texi (AVR Options) <-mgcc-isr>: Document it. + (AVR Pseudo Instructions): New node. + * config/tc-avr.h (md_pre_output_hook): Define to avr_pre_output_hook. + (md_undefined_symbol): Define to avr_undefined_symbol. + (avr_pre_output_hook, avr_undefined_symbol): New protos. + * config/tc-avr.c (struc-symbol.h): Include it. + (ISR_CHUNK_Done, ISR_CHUNK_Prologue, ISR_CHUNK_Epilogue): New enums. + (avr_isr, avr_gccisr_opcode) + (avr_no_sreg_hash, avr_no_sreg): New static variables. + (avr_opt_s) <have_gccisr>: Add field. + (avr_opt): Add initializer for have_gccisr. + (enum options) <OPTION_HAVE_GCCISR>: Add enum. + (md_longopts) <"mgcc-isr">: Add entry. + (md_show_usage): Document -mgcc-isr. + (md_parse_option) [OPTION_HAVE_GCCISR]: Handle it. + (md_undefined_symbol): Remove. + (avr_undefined_symbol, avr_pre_output_hook): New fuctions. + (md_begin) <avr_no_sreg_hash, avr_gccisr_opcode>: Initialize them. + (avr_operand) <pregno>: Add argument and set *pregno if function + is called for a register constraint. + [N]: Handle constraint. + (avr_operands) <avr_operand>: Pass 5th parameter to calls. + [avr_opt.have_gccisr]: Call avr_update_gccisr. Call + avr_gccisr_operands instead of avr_operands. + (avr_update_gccisr, avr_emit_insn, avr_patch_gccisr_frag) + (avr_gccisr_operands, avr_check_gccisr_done): New static functions. + * testsuite/gas/avr/gccisr-01.d: New test. + * testsuite/gas/avr/gccisr-01.s: New test. + * testsuite/gas/avr/gccisr-02.d: New test. + * testsuite/gas/avr/gccisr-02.s: New test. + * testsuite/gas/avr/gccisr-03.d: New test. + * testsuite/gas/avr/gccisr-03.s: New test. + +2017-06-30 Maciej W. Rozycki <macro@imgtec.com> + + * config/tc-mips.c (match_float_constant): Update description. + (match_operand): Likewise. + +2017-06-30 Andrew Bennett <andrew.bennett@imgtec.com> + Maciej W. Rozycki <macro@imgtec.com> + + * config/tc-mips.c (mips_ases): Add microMIPS XPA support. + * testsuite/gas/mips/micromips@xpa.d: New test. + * testsuite/gas/mips/mips.exp: Run the new test. Enable + `xpa-virt-err' test for `micromips'. + +2017-06-30 Andrew Bennett <andrew.bennett@imgtec.com> + Maciej W. Rozycki <macro@imgtec.com> + + * testsuite/gas/mips/micromips@r5.d: New test. + * testsuite/gas/mips/mips.exp: Run the new test. + +2017-06-30 Maciej W. Rozycki <macro@imgtec.com> + Andrew Bennett <andrew.bennett@imgtec.com> + + * config/tc-mips.c (mips_set_ase): Handle the ASE_XPA_VIRT flag. + * testsuite/gas/mips/xpa.d: Remove `xpa' from `-M' in `objdump' + flags. Add `-mvirt' to `as' flags. + * testsuite/gas/mips/xpa-err.d: New test. + * testsuite/gas/mips/xpa-virt-err.d: New test. + * testsuite/gas/mips/xpa-err.l: New stderr output. + * testsuite/gas/mips/xpa-virt-err.l: New stderr output. + * testsuite/gas/mips/xpa-err.s: New test source. + * testsuite/gas/mips/xpa-virt-err.s: New test source. + * testsuite/gas/mips/mips.exp: Run the new tests. + +2017-06-29 Maciej W. Rozycki <macro@imgtec.com> + + * testsuite/gas/mips/mips16e2@mips16e2-mt-sub.d: Adjust for the + ASE_MIPS16E2_MT flag disassembler fix. + * testsuite/gas/mips/mips16e2-interaptiv-mr2@mips16e2-mt-sub.d: + Likewise. + +2017-06-29 Maciej W. Rozycki <macro@imgtec.com> + + * config/tc-mips.c (mips_set_ase): Clear the ASE_MIPS16E2_MT + flag before recalculating. + * testsuite/gas/mips/mips16e2-mt-err.d: New test. + * testsuite/gas/mips/mips16e2-mt-err.l: New stderr output. + * testsuite/gas/mips/mips16e2-mt-err.s: New test source. + * testsuite/gas/mips/mips.exp: Run the new test. + +2017-06-28 Tamar Christina <tamar.christina@arm.com> + + * config/tc-aarch64.c (aarch64_reg_parse_32_64): Accept 4B. + (aarch64_features): Added dotprod. + * doc/c-aarch64.texi: Added dotprod. + * testsuite/gas/aarch64/dotproduct.d: New. + * testsuite/gas/aarch64/dotproduct.s: New. + +2017-06-28 Jiong Wang <jiong.wang@arm.com> + + * config/tc-arm.c (fpu_neon_ext_dotprod): New variable. + (neon_scalar_for_mul): Improve comments. + (do_neon_dotproduct): New function to encode Dot Product instructions. + (do_neon_dotproduct_s): Wrapper function for signed Dot Product + instructions. + (do_neon_dotproduct_u): Wrapper function for unsigned Dot Product + instructions. + (insns): New entries for vsdot and vudot. + (arm_extensions): New entry for "dotprod". + * doc/c-arm.texi: Document new "dotprod" extension. + * testsuite/gas/arm/dotprod.s: New test source. + * testsuite/gas/arm/dotprod-illegal.s: New test source. + * testsuite/gas/arm/dotprod.d: New test. + * testsuite/gas/arm/dotprod-thumb2.d: New test. + * testsuite/gas/arm/dotprod-illegal.d: New test. + * testsuite/gas/arm/dotprod-legacy-arch.d: New test. + * testsuite/gas/arm/dotprod-illegal.l: New error file. + * testsuite/gas/arm/dotprod-legacy-arch.l: New error file. + +2017-06-28 Maciej W. Rozycki <macro@imgtec.com> + + * testsuite/gas/mips/elf_mach_interaptiv-mr2.d: New test. + * testsuite/gas/mips/save-err.d: New test. + * testsuite/gas/mips/save-sub.d: New test. + * testsuite/gas/mips/interaptiv-mr2@save.d: New test. + * testsuite/gas/mips/mips1@save-sub.d: New test. + * testsuite/gas/mips/mips2@save-sub.d: New test. + * testsuite/gas/mips/mips3@save-sub.d: New test. + * testsuite/gas/mips/mips4@save-sub.d: New test. + * testsuite/gas/mips/mips5@save-sub.d: New test. + * testsuite/gas/mips/mips32@save-sub.d: New test. + * testsuite/gas/mips/mips64@save-sub.d: New test. + * testsuite/gas/mips/mips16@save-sub.d: New test. + * testsuite/gas/mips/mips16e@save-sub.d: New test. + * testsuite/gas/mips/r3000@save-sub.d: New test. + * testsuite/gas/mips/r3900@save-sub.d: New test. + * testsuite/gas/mips/r4000@save-sub.d: New test. + * testsuite/gas/mips/vr5400@save-sub.d: New test. + * testsuite/gas/mips/interaptiv-mr2@save-sub.d: New test. + * testsuite/gas/mips/sb1@save-sub.d: New test. + * testsuite/gas/mips/octeon2@save-sub.d: New test. + * testsuite/gas/mips/octeon3@save-sub.d: New test. + * testsuite/gas/mips/xlr@save-sub.d: New test. + * testsuite/gas/mips/r5900@save-sub.d: New test. + * testsuite/gas/mips/mips16e2-copy.d: New test. + * testsuite/gas/mips/mips16e2-copy-err.d: New test. + * testsuite/gas/mips/save.d: Remove `MIPS16e' from the `name' + option. Adjust for trailing padding change. + * testsuite/gas/mips/mips16e2-copy-err.l: New stderr output. + * testsuite/gas/mips/save-sub.s: New test source. + * testsuite/gas/mips/mips16e2-copy.s: New test source. + * testsuite/gas/mips/mips16e2-copy-err.s: New test source. + * testsuite/gas/mips/save.s: Update description, change trailing + padding and remove trailing white space. + * testsuite/gas/mips/mips.exp: Expand `save' and `save-err' + tests across the regular MIPS interAptiv MR2 architecture. Run + the new tests. + +2017-06-28 Maciej W. Rozycki <macro@imgtec.com> + + * testsuite/gas/mips/mips.exp (interaptiv-mr2): New architecture. + (mips16e2-interaptiv-mr2): Likewise. + * testsuite/gas/mips/mips16e2-interaptiv-mr2@mips16-macro.d: New + test. + * testsuite/gas/mips/mips16e2-interaptiv-mr2@mips16-macro-t.d: + New test. + * testsuite/gas/mips/mips16e2-interaptiv-mr2@mips16-macro-e.d: + New test. + * testsuite/gas/mips/mips16e2-interaptiv-mr2@mips16-insn-t.d: + New test. + * testsuite/gas/mips/mips16e2-interaptiv-mr2@mips16-insn-e.d: + New test. + * testsuite/gas/mips/mips16e2-interaptiv-mr2@mips16e-64.d: New + test. + * testsuite/gas/mips/mips16e2-interaptiv-mr2@mips16-sub.d: New + test. + * testsuite/gas/mips/mips16e2-interaptiv-mr2@mips16e-sub.d: New + test. + * testsuite/gas/mips/mips16e2-interaptiv-mr2@mips16e-64-sub.d: + New test. + * testsuite/gas/mips/mips16e2-interaptiv-mr2@mips16e2-mt-sub.d: + New test. + * testsuite/gas/mips/mips16e2-interaptiv-mr2@mips16-asmacro.d: + New test. + * testsuite/gas/mips/interaptiv-mr2@mcu.d: New test. + * testsuite/gas/mips/interaptiv-mr2@isa-override-1.d: New test. + * testsuite/gas/mips/interaptiv-mr2@isa-override-2.d: New test. + * testsuite/gas/mips/attr-gnu-4-5.d: Ignore any number of ASE + flag lines present rather than just one. + * testsuite/gas/mips/attr-gnu-4-6.d: Likewise. + * testsuite/gas/mips/attr-gnu-4-7.d: Likewise. + * testsuite/gas/mips/attr-none-o32-fp64-nooddspreg.d: Likewise. + * testsuite/gas/mips/attr-none-o32-fp64.d: Likewise. + * testsuite/gas/mips/attr-none-o32-fpxx.d: Likewise. + * testsuite/gas/mips/mips16e2-interaptiv-mr2@mips16-macro.l: New + stderr output. + * testsuite/gas/mips/mips16e2-interaptiv-mr2@mips16-macro-t.l: + New stderr output. + * testsuite/gas/mips/mips16e2-interaptiv-mr2@mips16-macro-e.l: + New stderr output. + * testsuite/gas/mips/mips16e2-interaptiv-mr2@mips16-insn-t.l: + New stderr output. + * testsuite/gas/mips/mips16e2-interaptiv-mr2@mips16-insn-e.l: + New stderr output. + * testsuite/gas/mips/mips16e2-interaptiv-mr2@mips16-sub.l: New + stderr output. + * testsuite/gas/mips/mips16e2-interaptiv-mr2@mips16e-sub.l: New + stderr output. + * testsuite/gas/mips/mips16e2-interaptiv-mr2@mips16e-64-sub.l: + New stderr output. + * testsuite/gas/mips/interaptiv-mr2@isa-override-1.l: New stderr + output. + * testsuite/gas/mips/interaptiv-mr2@isa-override-2.l: New stderr + output. + +2017-06-28 Maciej W. Rozycki <macro@imgtec.com> + Matthew Fortune <matthew.fortune@imgtec.com> + + * config/tc-mips.c (validate_mips_insn): Handle + OP_SAVE_RESTORE_LIST specially. + (mips_encode_save_restore, mips16_encode_save_restore): New + functions. + (match_save_restore_list_operand): Factor out SAVE/RESTORE + operand insertion into the instruction word or halfword to these + new functions. + (mips_cpu_info_table): Add "interaptiv-mr2" entry. + + * doc/c-mips.texi (MIPS Options): Add `interaptiv-mr2' to the + `-march=' argument list. + +2017-06-27 Maciej W. Rozycki <macro@imgtec.com> + + * testsuite/gas/mips/mips16e-save.d: Rename to... + * testsuite/gas/mips/save.d: ... this. + * testsuite/gas/mips/mips16e-save-err.d: Update the + `error-output' option and rename to... + * testsuite/gas/mips/save-err.d: ... this. + * testsuite/gas/mips/mips16e-save-err.l: Rename to... + * testsuite/gas/mips/save-err.l: ... this. + * testsuite/gas/mips/mips16e-save.s: Rename to... + * testsuite/gas/mips/save.s: ... this. + * testsuite/gas/mips/mips16e-save-err.s: Rename to... + * testsuite/gas/mips/save-err.s: ... this. + * testsuite/gas/mips/mips.exp: Rename `mips16e-save' and + `mips16e-save-err' invocations to `save' and `save-err' + respectively and reorder these tests away from MIPS16 tests. + +2017-06-27 Maciej W. Rozycki <macro@imgtec.com> + + * testsuite/gas/mips/mips16e-save.d: Remove `-mmips:isa32 + -mmips:16' from `objdump' flags and `-march=mips32 -mips16' from + `as' flags. + * testsuite/gas/mips/mips16e-save-err.d: Remove `-march=mips32' + from `as' flags. + * testsuite/gas/mips/mips16e-save.s: Remove the `.set mips16' + pseudo-op. + * testsuite/gas/mips/mips16e-save-err.s: Likewise. + * testsuite/gas/mips/mips.exp: Run SAVE/RESTORE tests across all + MIPS16e architectures. + +2017-06-27 Maciej W. Rozycki <macro@imgtec.com> + + * testsuite/gas/mips/mips16e-save-err.d: New test. + * gas/testsuite/gas/mips/mips.exp: Fold `mips16e-save-err' list + test into the new test. + +2017-06-27 Maciej W. Rozycki <macro@imgtec.com> + + * testsuite/gas/mips/mips16e-save.d: Capitalize the `name' + option. + +2017-06-26 Kuan-Lin Chen <rufus@andestech.com> + + * config/tc-riscv.c (md_apply_fix) [BFD_RELOC_32]: Convert to a + R_RISCV_32_PCREL relocation. + +2017-06-26 H.J. Lu <hongjiu.lu@intel.com> + + PR gas/21661 + * config/obj-elf.c (obj_elf_symver): Don't allow .symver with + common symbol. + (elf_frob_symbol): Likewise. + * testsuite/gas/elf/elf.exp: Run pr21661. + * testsuite/gas/elf/pr21661.d: New file. + * testsuite/gas/elf/pr21661.s: Likewise. + +2017-06-26 Nick Clifton <nickc@redhat.com> + + * config/tc-arm.c (fpu_any): Only define for ELF based targets. + +2017-06-26 Claudiu Zissulescu <claziss@synopsys.com> + + * /config/tc-arc.c (is_br_jmp_insn_p): Update macro with known + instructions to be accounted as jumps. + (assemble_insn): Check for limms into the delay slots. Emit an + error if so. + * testsuite/gas/arc/asm-errors-3.d: New file. + * testsuite/gas/arc/asm-errors-3.err: Likewise. + * testsuite/gas/arc/asm-errors-3.s: Likewise. + +2017-06-26 Thomas Preud'homme <thomas.preudhomme@arm.com> + + * NEWS: Mention support of ARM Cortex-R52 processor. + * config/tc-arm.c (arm_cpus): Add entry for ARM Cortex-R52 processor. + * doc/c-arm.texi: Mention support for -mcpu=cortex-r52. + +2017-06-24 Thomas Preud'homme <thomas.preudhomme@arm.com> + + * NEWS: Mention support for ARMv8-R architecture. + * config/tc-arm.c (arm_archs): Add entry for ARMv8-R. + (arm_extensions): Restrict pan, ras and rdma extension to + ARMv8-A and make crypto, fp and simd extensions available to + ARMv8-R. + (cpu_arch_ver): Add entry for ARMv8-R. + (aeabi_set_public_attributes): Update gas_assert for Tag_DIV_use + logic. + * testsuite/gas/arm/armv8-a+fp.s: Rename into ... + * testsuite/gas/arm/armv8-ar+fp.s: This. Remove .arch directive. + * testsuite/gas/arm/armv8-a+fp.d: Specify source to assemble and + architecture to assemble for. + * testsuite/gas/arm/armv8-r+fp.d: New. + * testsuite/gas/arm/armv8-a+simd.s: Rename into ... + * testsuite/gas/arm/armv8-ar+simd.s: This. Remove .arch directive. + * testsuite/gas/arm/armv8-a+simd.d: Specify source to assemble and + architecture to assemble for. + * testsuite/gas/arm/armv8-r+simd.d: New. + * testsuite/gas/arm/armv8-a-bad.s: Rename into ... + * testsuite/gas/arm/armv8-ar-bad.s: This. Remove .arch directive. + * testsuite/gas/arm/armv8-a-bad.l: Rename into ... + * testsuite/gas/arm/armv8-ar-bad.l: This. Decrement line number by 1. + * testsuite/gas/arm/armv8-a-bad.d: Specify source to assemble, + architecture to assemble for and adjust error output file. + * testsuite/gas/arm/armv8-r-bad.d: New. + * testsuite/gas/arm/armv8-a-barrier.s: Rename into ... + * testsuite/gas/arm/armv8-ar-barrier.s: This. + * testsuite/gas/arm/armv8-a-barrier-arm.d: Adjust source. + * testsuite/gas/arm/armv8-a-barrier-thumb.d: Likewise. + * testsuite/gas/arm/armv8-r-barrier-arm.d: New. + * testsuite/gas/arm/armv8-r-barrier-thumb.d: New. + * testsuite/gas/arm/armv8-a-it-bad.s: Rename into ... + * testsuite/gas/arm/armv8-ar-it-bad.s: This. Remove .arch directive. + * testsuite/gas/arm/armv8-a-it-bad.l: Rename into ... + * testsuite/gas/arm/armv8-ar-it-bad.l: This. Decrement line number + by 1. + * testsuite/gas/arm/armv8-a-it-bad.d: Specify source to assemble, + architecture to assemble for and adjust error output file. + * testsuite/gas/arm/armv8-r-it-bad.d: New. + * testsuite/gas/arm/armv8-a.s: Rename into ... + * testsuite/gas/arm/armv8-ar.s: This. Remove .arch directive. + * testsuite/gas/arm/armv8-a.d: Specify source to assemble and + architecture to assemble for. + * testsuite/gas/arm/armv8-r.d: New. + * testsuite/gas/arm/attr-march-armv8-r+crypto.d: New. + * testsuite/gas/arm/attr-march-armv8-r+fp.d: New. + * testsuite/gas/arm/attr-march-armv8-r+simd.d: New. + * testsuite/gas/arm/attr-march-armv8-r.d: New. + * testsuite/gas/arm/crc32.s: Rename into ... + * testsuite/gas/arm/crc32-armv8-ar.s: This. + * testsuite/gas/arm/crc32.d: Rename into ... + * testsuite/gas/arm/crc32-armv8-a.d: This. Specify source to assemble. + * testsuite/gas/arm/crc32-armv8-r.d: New. + * testsuite/gas/arm/crc32-bad.s: Rename into ... + * testsuite/gas/arm/crc32-armv8-ar-bad.s: This. + * testsuite/gas/arm/crc32-bad.d: Rename into ... + * testsuite/gas/arm/crc32-armv8-a-bad.d: This. Specify source to + assemble. + * testsuite/gas/arm/crc32-armv8-r-bad.d: New. + * testsuite/gas/arm/mask_1.s: Rename into ... + * testsuite/gas/arm/mask_1-armv8-ar.s: This. + * testsuite/gas/arm/mask_1.d: Rename into ... + * testsuite/gas/arm/mask_1-armv8-a.d: This. Specify source to + assemble. + * testsuite/gas/arm/mask_1-armv8-r.d: new. + +2017-06-24 Thomas Preud'homme <thomas.preudhomme@arm.com> + + * config/tc-arm.c (arm_ext_v6m): Delete. + (arm_ext_v7m): Delete. + (arm_ext_m): Remove ARM_EXT_OS from the set of feature defined M + profile. + (arm_arch_v6m_only): Delete. + (do_t_swi): Remove special case for ARMv6S-M. + (md_assemble): Display error message previously in do_t_swi when + SVC is not available. + (insns): Guard swi and svc by arm_ext_os for Thumb mode. + (aeabi_set_public_attributes): Remove special case for ARMv6S-M. + +2017-05-11 Andrew Waterman <andrew@sifive.com> + + * config/tc-riscv.c (riscv_ip): Changes as_warn to as_bad for improper + shift amounts. + +2017-06-22 Nick Clifton <nickc@redhat.com> + + * config/tc-arm.c (arm_ext_v7m): Add ATTRIBUTE_UNUSED. + +2017-06-21 Thomas Preud'homme <thomas.preudhomme@arm.com> + + * config/tc-arm.c (fpu_any): Defined from FPU_ANY. + (cpu_arch_ver): Add all architectures and sort by release date. + (have_ext_for_needed_feat_p): New. + (get_aeabi_cpu_arch_from_fset): New. + (aeabi_set_public_attributes): Call above function to determine + Tag_CPU_arch and Tag_CPU_arch_profile values. Adapt Tag_ARM_ISA_use + and Tag_THUMB_ISA_use selection logic to check absence of feature bit + accordingly. + * testsuite/gas/arm/attr-march-armv1.d: Fix expected Tag_CPU_arch build + attribute value. + * testsuite/gas/arm/attr-march-armv2.d: Likewise. + * testsuite/gas/arm/attr-march-armv2a.d: Likewise. + * testsuite/gas/arm/attr-march-armv2s.d: Likewise. + * testsuite/gas/arm/attr-march-armv3.d: Likewise. + * testsuite/gas/arm/attr-march-armv3m.d: Likewise. + * testsuite/gas/arm/pr12198-2.d: Likewise. + +2017-06-21 H.J. Lu <hongjiu.lu@intel.com> + + * testsuite/gas/i386/cet-intel.d: Updated. + * testsuite/gas/i386/cet.d: Likewise. + * testsuite/gas/i386/x86-64-cet-intel.d: Likewise. + * testsuite/gas/i386/x86-64-cet.d: Likewise. + * testsuite/gas/i386/cet.s: Update incsspd and setssbsy tests. + * testsuite/gas/i386/x86-64-cet.s: Likewise. + +2017-06-21 H.J. Lu <hongjiu.lu@intel.com> + + * testsuite/gas/i386/cet-intel.d: Updated. + * testsuite/gas/i386/cet.d: Likewise. + * testsuite/gas/i386/x86-64-cet-intel.d: Likewise. + * testsuite/gas/i386/x86-64-cet.d: Likewise. + * testsuite/gas/i386/cet.s: Replace savessp with saveprevssp. + * testsuite/gas/i386/x86-64-cet.s: Likewise. + +2017-06-21 H.J. Lu <hongjiu.lu@intel.com> + + * config/tc-i386.c (md_assemble): Update NOTRACK prefix check. + * testsuite/gas/i386/notrack-intel.d: Updated. + * testsuite/gas/i386/notrack.d: Likewise. + * testsuite/gas/i386/notrackbad.l: Likewise. + * testsuite/gas/i386/x86-64-notrack-intel.d: Likewise. + * testsuite/gas/i386/x86-64-notrack.d: Likewise. + * testsuite/gas/i386/x86-64-notrackbad.l: Likewise. + * testsuite/gas/i386/notrack.s: Add NOTRACK prefix tests with + memory indirect branch. + * testsuite/gas/i386/x86-64-notrack.s: Likewise. + * testsuite/gas/i386/notrackbad.s: Remove memory indirect branch + with NOTRACK prefix. + * testsuite/gas/i386/x86-64-notrackbad.s: Likewise. + +2017-06-20 Thomas Preud'homme <thomas.preudhomme@arm.com> + + * config/tc-arm.c (arm_extensions): New duplicate idiv entry to enable + Thumb division for ARMv7 architecture. + (arm_parse_extension): Document expected behavior for duplicate + entries. + (s_arm_arch_extension): Likewise. + * testsuite/gas/arm/forbid-armv7-idiv-ext.d: New test. + * testsuite/gas/arm/forbid-armv7-idiv-ext.l: New expected output for + above test. + +2017-06-21 Thomas Preud'homme <thomas.preudhomme@arm.com> + + * config/tc-arm.c (aeabi_set_public_attributes): Populate flags from + feature bits used or selected_cpu depending on whether a CPU was + selected by the user. + +2017-06-21 Thomas Preud'homme <thomas.preudhomme@arm.com> + + * config/tc-arm.c (aeabi_set_public_attributes): Test *mcpu_ext_opt to + decide whether to set Tag_DSP_extension build attribute value. Remove + now useless arm_arch variable. + +2017-06-21 Thomas Preud'homme <thomas.preudhomme@arm.com> + + * config/tc-arm.c (dyn_mcpu_ext_opt): New static variable. + (dyn_march_ext_opt): Likewise. + (md_begin): Copy extension feature bits alongside architecture ones. + Merge extensions feature bits in selected_cpu and cpu_variant if there + is some. + (arm_parse_extension): Pass architecture and extension feature bits in + separate parameters, with architecture bits being read only. Update + **opt_p directly rather than *ext_set and initialize it if needed. + (arm_parse_cpu): Stop merging architecture and extension feature bits + and instead use mcpu_cpu_opt and dyn_mcpu_ext_opt to memorize them + respectively. Adapt to change in parameters of arm_parse_extension. + (arm_parse_arch): Adapt to change in parameters of arm_parse_extension. + (aeabi_set_attribute_string): Make function static. + (arm_md_post_relax): New function. + (s_arm_cpu): Stop merging architecture and extension feature bits and + instead use mcpu_cpu_opt and dyn_mcpu_ext_opt to memorize them + respectively. Merge extension feature bits in cpu_variant + if there is any. + (s_arm_arch): Reset extension feature bit. Set selected_cpu from + *mcpu_cpu_opt and cpu_variant from selected_cpu and *mfpu_opt for + consistency with s_arm_cpu. + (s_arm_arch_extension): Update *dyn_mcpu_ext_opt rather than + selected_cpu, allocating it before hand if needed. Set selected_cpu + from it and then cpu_variant. + (s_arm_fpu): Merge *mcpu_ext_opt feature bits if any in cpu_variant. + * config/tc-arm.h (md_post_relax_hook): Set to arm_md_post_relax. + (aeabi_set_public_attributes): Delete external declaration. + (arm_md_post_relax): Declare externally. + +2017-06-21 Thomas Preud'homme <thomas.preudhomme@arm.com> + + * config/tc-arm.c (struct arm_cpu_option_table): New ext field. + (ARM_CPU_OPT): Add parameter to set new ext field and reorder canonical + name field just after the name field. + (arm_cpus): Move extension feature bit from value field to ext field, + reorder parameter according to changes in ARM_CPU_OPT and reindent. + (arm_parse_cpu): Point mcpu_cpu_opt to a bitfield merging the value and + ext field from the selected arm_cpus entry. + (s_arm_cpu): Likewise. + +2017-06-21 James Greenhalgh <james.greenhalgh@arm.com> + + * config/tc-aarch64.c (aarch64_cpus): Add cortex-a55 and cortex-a75. + * doc/c-aarch64.texi (-mcpu): Document cortex-a55 and cortex-a75. + +2017-06-15 H.J. Lu <hongjiu.lu@intel.com> + + PR binutils/21594 + * testsuite/gas/i386/mpx.s: Add 2 tests with invalid bnd + register. + * testsuite/gas/i386/x86-64-mpx.s: Likewise. + * testsuite/gas/i386/mpx.d: Updated. + * testsuite/gas/i386/x86-64-mpx.d: Likewise. + +2017-06-14 Max Filippov <jcmvbkbc@gmail.com> + + * config/tc-xtensa.c (density_supported, xtensa_fetch_width, + absolute_literals_supported): Leave definitions uninitialized. + (directive_state): Leave entries for directive_density and + directive_absolute_literals initialized to false. + (xg_init_global_config, xtensa_init): New functions. + * config/tc-xtensa.h (TARGET_BYTES_BIG_ENDIAN): Define as 0. + (HOST_SPECIAL_INIT): New definition. + (xtensa_init): New declaration. + +2017-06-07 Michael Collison <michael.collison@arm.com> + + * config/tc-aarch64.c (reg_entry_reg_names): Add IP0, + IP1, FP, and LR as register aliases of register 16, 17, 29 + and 30 respectively. + * testsuite/gas/aarch64/diagnostic.l: Remove diagnostic + prohibiting register 'lr' which is now an alias. + * testsuite/gas/aarch64/diagnostic.s: Remove instruction + utilizing register 'lr' which is now an alias. + +2017-06-06 Jiong Wang <jiong.wang@arm.com> + + * config/tc-arm.c (reject_bad_reg): Allow REG_SP on ARMv8-A. + (parse_operands): Allow REG_SP for OP_oRRnpcsp and OP_RRnpcsp on + ARMv8-A. + (do_co_reg): Allow REG_SP for Rd on ARMv8-A. + (do_t_add_sub): Likewise. + (do_t_mov_cmp): Likewise. + (do_t_tb): Likewise. + * testsuite/gas/arm/ld-sp-warn.l: Delete the warning on REG_SP as Rt for + ldrsb. + * testsuite/gas/arm/sp-pc-validations-bad-t-v8a.d: New test. + * testsuite/gas/arm/sp-pc-validations-bad-t-v8a.l: New test. + * testsuite/gas/arm/sp-pc-validations-bad-t.d: Specifies -march=armv7-a. + * testsuite/gas/arm/sp-pc-validations-bad-t.s: Remove ".arch armv7-a". + * testsuite/gas/arm/sp-usage-thumb2-relax-on-v7.d: New test. + * testsuite/gas/arm/sp-usage-thumb2-relax-on-v7.l: New test. + * testsuite/gas/arm/sp-usage-thumb2-relax-on-v8.d: New test. + * testsuite/gas/arm/sp-usage-thumb2-relax.s: New test. + * testsuite/gas/arm/strex-bad-t.d: Specifies -march=armv7-a. + +2017-06-05 Jim Wilson <jim.wilson@linaro.org> + + * config/tc-arm.c (arm_cpus): Delete falkor and qdf24xx entries. + * doc/c-arm.texi (-mcpu): Likewise. + +2017-05-30 Anton Kolesov <anton.kolesov@synopsys.com> + + * config/tc-arc.c (cpu_types): Include arc-cpu.def + +2017-05-23 H.J. Lu <hongjiu.lu@intel.com> + + * gas/testsuite/gas/i386/notrackbad.l: Updated for non-ELF + targets. + * gas/testsuite/gas/i386/x86-64-notrackbad.l: Likewise. + +2017-05-23 Claudiu Zissulescu <claziss@synopsys.com> + + * config/tc-arc.c (md_apply_fix): Use as_bad_where. + (assemble_insn): Use as_bad. + +2017-05-22 H.J. Lu <hongjiu.lu@intel.com> + + * config/tc-i386.c (REX_PREFIX): Changed to 7. + (NOTRACK_PREFIX): New. + (MAX_PREFIXES): Changed to 8. + (_i386_insn): Add notrack_prefix. + (PREFIX_GROUP): Add PREFIX_DS. + (add_prefix): Return PREFIX_DS for DS_PREFIX_OPCODE. + (md_assemble): Check if NOTRACK prefix is supported. + (parse_insn): Set notrack_prefix and issue an error for + other prefixes after NOTRACK prefix. + * testsuite/gas/i386/i386.exp: Run tests for NOTRACK prefix. + * testsuite/gas/i386/notrack-intel.d: New file. + * testsuite/gas/i386/notrack.d: Likewise. + * testsuite/gas/i386/notrack.s: Likewise. + * testsuite/gas/i386/notrackbad.l: Likewise. + * testsuite/gas/i386/notrackbad.s: Likewise. + * testsuite/gas/i386/x86-64-notrack-intel.d: Likewise. + * testsuite/gas/i386/x86-64-notrack.d: Likewise. + * testsuite/gas/i386/x86-64-notrack.s: Likewise. + * testsuite/gas/i386/x86-64-notrackbad.l: Likewise. + * testsuite/gas/i386/x86-64-notrackbad.s: Likewise. + +2017-05-22 Jiong Wang <jiong.wang@arm.com> + + * configure.tgt: Set "arch" to "aarch64" if ${cpu} equals "aarch64". + Recognize the new triplet name aarch64*-linux-gnu_ilp32. + * configure.ac: Output DEFAULT_ARCH macro for AArch64. + * configure: Regenerate. + * config/tc-aarch64.h (aarch64_after_parse_args): New declaration. + (md_after_parse_args): New define. + * config/tc-aarch64.c (aarch64_abi_type): New enumeration + AARCH64_ABI_NONE. + (DEFAULT_ARCH): New define. + (aarch64_abi): Set default value to AARCH64_ABI_NONE. + (aarch64_after_parse_args): New function. + +2017-05-19 Jose E. Marchesi <jose.marchesi@oracle.com> + + * config/tc-sparc.c (sparc_arch_table): Entries for `sparc6', + `v9m8' and `v8plusm8'. + (sparc_md_end): Handle SPARC_OPCODE_ARCH_M8. + (get_hwcap_name): Support the M8 hardware capabilities. + (sparc_ip): Handle new operand types. + * doc/c-sparc.texi (Sparc-Opts): Document -Av9m8, -Av8plusm8 and + -Asparc6, and the corresponding -xarch aliases. + * testsuite/gas/sparc/sparc6.s: New file. + * testsuite/gas/sparc/sparc6.d: Likewise. + * testsuite/gas/sparc/sparc6-diag.s: Likewise. + * testsuite/gas/sparc/sparc6-diag.l: Likewise. + * testsuite/gas/sparc/fpcmpshl.s: Likewise. + * testsuite/gas/sparc/fpcmpshl.d: Likewise. + * testsuite/gas/sparc/fpcmpshl-diag.s: Likewise. + * testsuite/gas/sparc/fpcmpshl-diag.l: Likewise. + * testsuite/gas/sparc/ldm-stm.s: Likewise. + * testsuite/gas/sparc/ldm-stm.d: Likewise. + * testsuite/gas/sparc/ldm-stm-diag.s: Likewise. + * testsuite/gas/sparc/ldm-stm-diag.l: Likewise. + * testsuite/gas/sparc/ldmf-stmf.s: Likewise. + * testsuite/gas/sparc/ldmf-stmf.d: Likewise. + * testsuite/gas/sparc/ldmf-stmf-diag.s: Likewise. + * testsuite/gas/sparc/ldmf-stmf-diag.l: Likewise. + * testsuite/gas/sparc/on.s: Likewise. + * testsuite/gas/sparc/on.d: Likewise. + * testsuite/gas/sparc/on-diag.s: Likewise. + * testsuite/gas/sparc/on-diag.l: Likewise. + * testsuite/gas/sparc/rle.s: Likewise. + * testsuite/gas/sparc/rle.d: Likewise. + * testsuite/gas/sparc/sparc.exp (gas_64_check): Run new tests. + * testsuite/gas/sparc/rdasr.s: Add test for RDENTROPY. + * testsuite/gas/sparc/rdasr.d: Likewise. + +2017-05-19 Jose E. Marchesi <jose.marchesi@oracle.com> + + * testsuite/gas/sparc/call-relax.d: Support 32-bit targets. + * testsuite/gas/sparc/sparc.exp (gas_64_check): Use -64 to + run asi-bump-warn. + +2017-05-19 Georg-Johann Lay <avr@gjlay.de> + + PR ld/21472 + * config/tc-avr.c (mcu_types): Add entries for: attiny416, + attiny417, attiny816, attiny817. + +2017-05-18 Alan Modra <amodra@gmail.com> + + * config/tc-aarch64.c: Don't compare booleans against TRUE or FALSE. + * config/tc-hppa.c: Likewise. + * config/tc-mips.c: Likewise. + * config/tc-score7.c: Likewise. + +2017-05-16 Alan Modra <amodra@gmail.com> + + * write.c (GENERIC_FORCE_RELOCATION_LOCAL): Define. + (TC_FORCE_RELOCATION_LOCAL): Use it. + (GENERIC_FORCE_RELOCATION_SUB_SAME): Define. + (TC_FORCE_RELOCATION_SUB_SAME): Use it. + * config/tc-arm.h (TC_FORCE_RELOCATION_LOCAL, + TC_FORCE_RELOCATION_SUB_SAME): Use GENERIC defines. + * config/tc-aarch64.h: Similarly. + * config/tc-avr.h: Similarly. + * config/tc-cris.h: Similarly. + * config/tc-i386.h: Similarly. + * config/tc-i960.h: Similarly. + * config/tc-ia64.h: Similarly. + * config/tc-microblaze.h: Similarly. + * config/tc-mips.h: Similarly. + * config/tc-msp430.h: Similarly. + * config/tc-nds32.h: Similarly. + * config/tc-pru.h: Similarly. + * config/tc-riscv.h: Similarly. + * config/tc-rl78.h: Similarly. + * config/tc-s390.h: Similarly. + * config/tc-sh.h: Similarly. + * config/tc-sh64.h: Similarly. + * config/tc-sparc.h: Similarly. + * config/tc-xtensa.h: Similarly. + * config/tc-mn10300.h: Similarly. + (GENERIC_FORCE_RELOCATION_LOCAL): Define. + * config/tc-msp430.c (msp430_force_relocation_local): Modify to + be addition to rather than replacement of standard + TC_FORCE_RELOCATION_LOCAL. + +2017-05-15 Nick Clifton <nickc@redhat.com> + + PR gas/21458 + * config/tc-arm.c (do_adr): If the ADR involves a thumb function + symbol, ensure that the T bit will be set. + (do_adrl): Likewise. + (do_t_adr): Likewise. + * testsuite/gas/arm/pr21458.s: New test. + * testsuite/gas/arm/pr21458.d: New test driver. + +2017-05-15 Maciej W. Rozycki <macro@imgtec.com> + + * testsuite/gas/mips/mips16-pcrel-1.d: Remove `-mips3' from `as' + flags. + * testsuite/gas/mips/mips16-pcrel-pic-1.d: Likewise. + * testsuite/gas/mips/mips16-pcrel-n32-0.d: Likewise. + * testsuite/gas/mips/mips16-pcrel-n32-1.d: Likewise. + * testsuite/gas/mips/mips16-pcrel-n64-0.d: Likewise. + * testsuite/gas/mips/mips16-pcrel-n64-1.d: Likewise. + * testsuite/gas/mips/mips16-pcrel-n64-sym32-0.d: Likewise. + * testsuite/gas/mips/mips16-pcrel-n64-sym32-1.d: Likewise. + * testsuite/gas/mips/mips16-pcrel-reloc-4.d: Likewise. + * testsuite/gas/mips/mips16-pcrel-reloc-5.d: Likewise. + * testsuite/gas/mips/mips16-pcrel-reloc-6.d: Likewise. + * testsuite/gas/mips/mips16-pcrel-reloc-7.d: Likewise. + * testsuite/gas/mips/mips16-pcrel-addend-4.d: Likewise. + * testsuite/gas/mips/mips16-pcrel-addend-5.d: Likewise. + * testsuite/gas/mips/mips16-pcrel-addend-6.d: Likewise. + * testsuite/gas/mips/mips16-pcrel-addend-7.d: Likewise. + * testsuite/gas/mips/mips16-pcrel-addend-9.d: Likewise. + * testsuite/gas/mips/mips16-pcrel-addend-pic-9.d: Likewise. + * testsuite/gas/mips/mips16-pcrel-addend-n32-8.d: Likewise. + * testsuite/gas/mips/mips16-pcrel-addend-n32-9.d: Likewise. + * testsuite/gas/mips/mips16-pcrel-addend-n64-sym32-8.d: + Likewise. + * testsuite/gas/mips/mips16-pcrel-addend-n64-sym32-9.d: + Likewise. + * testsuite/gas/mips/mips16-pcrel-addend-n64-8.d: Likewise. + * testsuite/gas/mips/mips16-pcrel-addend-n64-9.d: Likewise. + * testsuite/gas/mips/mips16-pcrel-absolute-2.d: Likewise. + * testsuite/gas/mips/mips16-pcrel-absolute-3.d: Likewise. + * testsuite/gas/mips/mips16-pcrel-absolute-6.d: Likewise. + * testsuite/gas/mips/mips16-pcrel-absolute-7.d: Likewise. + * testsuite/gas/mips/mips16-pcrel-absolute-pic-6.d: Likewise. + * testsuite/gas/mips/mips16-pcrel-absolute-n32-4.d: Likewise. + * testsuite/gas/mips/mips16-pcrel-absolute-n32-6.d: Likewise. + * testsuite/gas/mips/mips16-pcrel-absolute-n64-4.d: Likewise. + * testsuite/gas/mips/mips16-pcrel-absolute-n64-6.d: Likewise. + * testsuite/gas/mips/mips16-pcrel-absolute-n64-sym32-4.d: + Likewise. + * testsuite/gas/mips/mips16-pcrel-absolute-n64-sym32-6.d: + Likewise. + * testsuite/gas/mips/mips16-pcrel-absolute-pic-n32-4.d: + Likewise. + * testsuite/gas/mips/mips16-pcrel-absolute-pic-n32-6.d: + Likewise. + * testsuite/gas/mips/mips16-pcrel-absolute-pic-n64-4.d: + Likewise. + * testsuite/gas/mips/mips16-pcrel-absolute-pic-n64-6.d: + Likewise. + * testsuite/gas/mips/mips16-pcrel-absolute-pic-n64-sym32-4.d: + Likewise. + * testsuite/gas/mips/mips16-pcrel-absolute-pic-n64-sym32-6.d: + Likewise. + * testsuite/gas/mips/mips16e2@mips16-pcrel-0.d: New test. + * testsuite/gas/mips/mips16e2@mips16-pcrel-1.d: New test. + * testsuite/gas/mips/mips16e2@mips16-pcrel-2.d: New test. + * testsuite/gas/mips/mips16e2@mips16-pcrel-n32-0.d: New test. + * testsuite/gas/mips/mips16e2@mips16-pcrel-n32-1.d: New test. + * testsuite/gas/mips/mips16e2@mips16-pcrel-n64-sym32-0.d: New + test. + * testsuite/gas/mips/mips16e2@mips16-pcrel-n64-sym32-1.d: New + test. + * testsuite/gas/mips/mips16e2@mips16-pcrel-delay-0.d: New test. + * testsuite/gas/mips/mips16e2@mips16-pcrel-delay-1.d: New test. + * testsuite/gas/mips/mips16e2@mips16-pcrel-reloc-2.d: New test. + * testsuite/gas/mips/mips16e2@mips16-pcrel-reloc-3.d: New test. + * testsuite/gas/mips/mips16e2@mips16-pcrel-reloc-6.d: New test. + * testsuite/gas/mips/mips16e2@mips16-pcrel-reloc-7.d: New test. + * testsuite/gas/mips/mips16e2@mips16-pcrel-addend-2.d: New test. + * testsuite/gas/mips/mips16e2@mips16-pcrel-addend-3.d: New test. + * testsuite/gas/mips/mips16e2@mips16-pcrel-addend-6.d: New test. + * testsuite/gas/mips/mips16e2@mips16-pcrel-addend-7.d: New test. + * testsuite/gas/mips/mips16e2@mips16-pcrel-addend-8.d: New test. + * testsuite/gas/mips/mips16e2@mips16-pcrel-addend-9.d: New test. + * testsuite/gas/mips/mips16e2@mips16-pcrel-addend-n32-8.d: New + test. + * testsuite/gas/mips/mips16e2@mips16-pcrel-addend-n32-9.d: New + test. + * testsuite/gas/mips/mips16e2@mips16-pcrel-addend-n64-sym32-8.d: + New test. + * testsuite/gas/mips/mips16e2@mips16-pcrel-addend-n64-sym32-9.d: + New test. + * testsuite/gas/mips/mips16e2@mips16-pcrel-absolute.d: New test. + * testsuite/gas/mips/mips16e2@mips16-pcrel-absolute-1.d: New + test. + * testsuite/gas/mips/mips16e2@mips16-pcrel-absolute-2.d: New + test. + * testsuite/gas/mips/mips16e2@mips16-pcrel-absolute-3.d: New + test. + * testsuite/gas/mips/mips16e2@mips16-pcrel-absolute-4.d: New + test. + * testsuite/gas/mips/mips16e2@mips16-pcrel-absolute-5.d: New + test. + * testsuite/gas/mips/mips16e2@mips16-pcrel-absolute-6.d: New + test. + * testsuite/gas/mips/mips16e2@mips16-pcrel-absolute-7.d: New + test. + * testsuite/gas/mips/mips16e2@mips16-pcrel-absolute-pic-4.d: New + test. + * testsuite/gas/mips/mips16e2@mips16-pcrel-absolute-pic-6.d: New + test. + * testsuite/gas/mips/mips16e2@mips16-pcrel-absolute-n32-4.d: New + test. + * testsuite/gas/mips/mips16e2@mips16-pcrel-absolute-n32-6.d: New + test. + * testsuite/gas/mips/mips16e2@mips16-pcrel-absolute-n64-sym32-4.d: + New test. + * testsuite/gas/mips/mips16e2@mips16-pcrel-absolute-n64-sym32-6.d: + New test. + * testsuite/gas/mips/mips16e2@mips16-pcrel-absolute-pic-n32-4.d: + New test. + * testsuite/gas/mips/mips16e2@mips16-pcrel-absolute-pic-n32-6.d: + New test. + * testsuite/gas/mips/mips16e2@mips16-pcrel-absolute-pic-n64-sym32-4.d: + New test. + * testsuite/gas/mips/mips16e2@mips16-pcrel-absolute-pic-n64-sym32-6.d: + New test. + * testsuite/gas/mips/mips16-pcrel-1.l: Adjust line numbers. + * testsuite/gas/mips/mips16-pcrel-1.s: Adjust for alignment + preservation between MIPS16 and MIPS16e2 code. + * testsuite/gas/mips/mips.exp: Run MIPS16 relaxation tests over + all MIPS16 architectures. + +2017-05-15 Maciej W. Rozycki <macro@imgtec.com> + + * testsuite/gas/mips/mips16e2.d: New test. + * testsuite/gas/mips/mips16e2-mt.d: New test. + * testsuite/gas/mips/mips16e2-sub.d: New test. + * testsuite/gas/mips/mips16e2@mips16e2-sub.d: New test. + * testsuite/gas/mips/mips16e2-mt-sub.d: New test. + * testsuite/gas/mips/mips16e2@mips16e2-mt-sub.d: New test. + * testsuite/gas/mips/mips16e2-hilo.d: New test. + * testsuite/gas/mips/mips16e2-hilo-n32.d: New test. + * testsuite/gas/mips/mips16e2-reloc-error.d: New test. + * testsuite/gas/mips/mips16e2-imm-error.d: New test. + * testsuite/gas/mips/elf_ase_mips16e2.d: New test. + * testsuite/gas/mips/elf_ase_mips16e2-2.d: New test. + * testsuite/gas/mips/elf-rel9-mips16e2.d: New test. + * testsuite/gas/mips/mips16e2-lui.d: New test. + * testsuite/gas/mips/mips16e2@mips32r2-sync.d: New test. + * testsuite/gas/mips/mips16e2@mips32r2-sync-1.d: New test. + * testsuite/gas/mips/mips16e2@lui-2.d: New test. + * testsuite/gas/mips/mips16e2-reloc-error.l: New stderr output. + * testsuite/gas/mips/mips16e2-imm-error.l: New stderr output. + * testsuite/gas/mips/mips16e2@lui-2.l: New stderr output. + * testsuite/gas/mips/mips16e2.s: New test source. + * testsuite/gas/mips/mips16e2-mt.s: New test source. + * testsuite/gas/mips/mips16e2-sub.s: New test source. + * testsuite/gas/mips/mips16e2-mt-sub.s: New test source. + * testsuite/gas/mips/mips16e2-hilo.s: New test source. + * testsuite/gas/mips/mips16e2-reloc-error.s: New test source. + * testsuite/gas/mips/mips16e2-imm-error.s: New test source. + * testsuite/gas/mips/elf-rel9-mips16e2.s: New test source. + * testsuite/gas/mips/mips16e2-lui.s: New test source. + * testsuite/gas/mips/mips.exp: Expand `mips32r2-sync', + `mips32r2-sync-1', `lui-1' and `lui-2' tests across MIPS16e2 + architectures. Run the new tests. + +2017-05-15 Maciej W. Rozycki <macro@imgtec.com> + + * testsuite/gas/mips/mips.exp (run_dump_test_arch): Add + `mips16e2@' prefix. + (run_list_test_arch): Likewise. + (mips16e2-32, mips16e2-64): New architectures. + * testsuite/gas/mips/mips16e2-32@mips16-macro.d: New test. + * testsuite/gas/mips/mips16e2-32@mips16-macro-t.d: New test. + * testsuite/gas/mips/mips16e2-32@mips16-macro-e.d: New test. + * testsuite/gas/mips/mips16e2-32@mips16-insn-t.d: New test. + * testsuite/gas/mips/mips16e2-32@mips16-insn-e.d: New test. + * testsuite/gas/mips/mips16e2-32@mips16e-64.d: New test. + * testsuite/gas/mips/mips16e2-32@mips16-sub.d: New test. + * testsuite/gas/mips/mips16e2-32@mips16e-64-sub.d: New test. + * testsuite/gas/mips/mips16e2@relax-swap3.d: New test. + * testsuite/gas/mips/mips16-32@mips16-asmacro.d: Remove `source' + tag. Add `-I$srcdir/$subdir' to `as' flags. + * testsuite/gas/mips/mips16-64@mips16-asmacro.d: Likewise. + * testsuite/gas/mips/mips16e2-32@mips16-macro.l: New stderr + output. + * testsuite/gas/mips/mips16e2-32@mips16-macro-t.l: New stderr + output. + * testsuite/gas/mips/mips16e2-32@mips16-macro-e.l: New stderr + output. + * testsuite/gas/mips/mips16e2-32@mips16-insn-t.l: New stderr + output. + * testsuite/gas/mips/mips16e2-32@mips16-insn-e.l: New stderr + output. + * testsuite/gas/mips/mips16-sub.s: Add `.set nomips16e2'. + * testsuite/gas/mips/mips16e-sub.s: Likewise. + * testsuite/gas/mips/mips16e-64-sub.s: Likewise. + * testsuite/gas/mips/mips16-asmacro.s: Remove `.set mips32'. + * testsuite/gas/mips/mips16-32@mips16-asmacro.s: New test + source. + * testsuite/gas/mips/mips16-64@mips16-asmacro.s: New test + source. + +2017-05-15 Maciej W. Rozycki <macro@imgtec.com> + Matthew Fortune <matthew.fortune@imgtec.com> + Andrew Bennett <andrew.bennett@imgtec.com> + + * config/tc-mips.c (RELAX_MIPS16_ENCODE): Add `e2' flag. + (RELAX_MIPS16_E2): New macro. + (RELAX_MIPS16_PIC, RELAX_MIPS16_SYM32, RELAX_MIPS16_NOMACRO) + (RELAX_MIPS16_USER_SMALL, RELAX_MIPS16_USER_EXT) + (RELAX_MIPS16_DSLOT, RELAX_MIPS16_JAL_DSLOT) + (RELAX_MIPS16_EXTENDED, RELAX_MIPS16_MARK_EXTENDED) + (RELAX_MIPS16_CLEAR_EXTENDED, RELAX_MIPS16_ALWAYS_EXTENDED) + (RELAX_MIPS16_MARK_ALWAYS_EXTENDED) + (RELAX_MIPS16_CLEAR_ALWAYS_EXTENDED, RELAX_MIPS16_MACRO) + (RELAX_MIPS16_MARK_MACRO, RELAX_MIPS16_CLEAR_MACRO): Shift bits. + (mips16_immed_extend): New prototype. + (options): Add OPTION_MIPS16E2 and OPTION_NO_MIPS16E2 enum + values. + (md_longopts): Add "mmips16e2" and "mno-mips16e2" options. + (mips_ases): Add "mips16e2" entry. + (mips_set_ase): Handle MIPS16e2 ASE. + (insn_insert_operand): Explicitly handle immediates with MIPS16 + instructions that require 32-bit encoding. + (is_opcode_valid_16): Pass enabled ASE bitmask on to + `opcode_is_member'. + (validate_mips_insn): Explicitly handle immediates with MIPS16 + instructions that require 32-bit encoding. + (operand_reg_mask) <OP_REG28>: Add handler. + (match_reg28_operand): New function. + (match_operand) <OP_REG28>: Add handler. + (append_insn): Pass ASE_MIPS16E2 setting to RELAX_MIPS16_ENCODE. + (match_mips16_insn): Handle MIPS16 instructions that require + 32-bit encoding and `V' and `u' operand codes. + (mips16_ip): Allow any characters except from `.' in opcodes. + (mips16_immed_extend): Handle 9-bit immediates. Do not shuffle + immediates whose width is not one of these listed. + (md_estimate_size_before_relax): Handle MIPS16e2 relaxation. + (mips_relax_frag): Likewise. + (md_convert_frag): Likewise. + (mips_convert_ase_flags): Handle MIPS16e2 ASE. + + * doc/as.texinfo (Target MIPS options): Add `-mmips16e2' and + `-mno-mips16e2' options. + (-mmips16e2, -mno-mips16e2): New options. + * doc/c-mips.texi (MIPS Options): Add `-mmips16e2' and + `-mno-mips16e2' options. + (MIPS ASE Instruction Generation Overrides): Add `.set mips16e2' + and `.set nomips16e2'. + +2017-05-15 Maciej W. Rozycki <macro@imgtec.com> + + * config/tc-mips.c (match_int_operand): Call + `match_out_of_range' before returning failure for 0x8000-0xffff + values conditionally allowed. + +2017-05-15 Maciej W. Rozycki <macro@imgtec.com> + + * config/tc-mips.c (match_int_operand): Call + `match_not_constant' before returning failure for a non-constant + 16-bit immediate conditionally allowed. + +2017-05-15 Maciej W. Rozycki <macro@imgtec.com> + + * config/tc-mips.c (match_const_int): Call `match_out_of_range' + rather than `match_not_constant' for unrelocated operands + retrieved as an `O_big' expression. + (match_int_operand): Call `match_out_of_range' for relocatable + operands retrieved as an `O_big' expression. + (match_mips16_insn): Call `match_out_of_range' for relaxable + operands retrieved as an `O_big' expression. + * testsuite/gas/mips/addiu-error.d: New test. + * testsuite/gas/mips/mips16@addiu-error.d: New test. + * testsuite/gas/mips/micromips@addiu-error.d: New test. + * testsuite/gas/mips/break-error.d: New test. + * testsuite/gas/mips/lui-1.l: Adjust error message. + * testsuite/gas/mips/addiu-error.l: New stderr output. + * testsuite/gas/mips/mips16@addiu-error.l: New stderr output. + * testsuite/gas/mips/micromips@addiu-error.l: New stderr output. + * testsuite/gas/mips/break-error.l: New stderr output. + * testsuite/gas/mips/addiu-error.s: New test source. + * testsuite/gas/mips/break-error.s: New test source. + * testsuite/gas/mips/mips.exp: Run the new tests. + +2017-05-15 Maciej W. Rozycki <macro@imgtec.com> + + * config/tc-mips.c (match_mips16_insn): Remove the explicit + OT_INTEGER check before the `match_expression' call. + * testsuite/gas/mips/mips16-insn-e.l: Adjust messages. + * testsuite/gas/mips/mips16-32@mips16-insn-e.l: Likewise. + * testsuite/gas/mips/mips16-64@mips16-insn-e.l: Likewise. + * testsuite/gas/mips/mips16e-32@mips16-insn-e.l: Likewise. + * testsuite/gas/mips/mips16-reg-error.d: New test. + * testsuite/gas/mips/mips16-reg-error.l: New stderr output. + * testsuite/gas/mips/mips16-reg-error.s: New test source. + * testsuite/gas/mips/mips.exp: Run the new test. + +2017-05-15 Maciej W. Rozycki <macro@imgtec.com> + + * config/tc-mips.c (match_mips16_insn): Call + `match_not_constant' for a disallowed relocation operation. + * testsuite/gas/mips/mips16-reloc-error.d: New test. + * testsuite/gas/mips/mips16-reloc-error.l: New stderr output. + * testsuite/gas/mips/mips16-reloc-error.s: New test source. + * testsuite/gas/mips/mips.exp: Run the new test. + +2017-05-15 Maciej W. Rozycki <macro@imgtec.com> + + * testsuite/gas/mips/lui-1.d: New test. + * testsuite/gas/mips/lui-2.d: New test. + * gas/testsuite/gas/mips/mips.exp: Fold corresponding list tests + into the new tests. + +2017-05-15 Maciej W. Rozycki <macro@imgtec.com> + + * config/tc-mips.c (match_const_int): Update description. + +2017-05-15 Maciej W. Rozycki <macro@imgtec.com> + + * doc/as.texinfo (-mips16, -no-mips16): Refer to `.module + mips16' rather than `.set mips16'. + (-mmicromips, -mno-micromips): Refer to `.module micromips' and + `.module nomicromips' rather than `.set micromips' and `.set + nomicromips'. + (-msmartmips, -mno-smartmips): Refer to `.module smartmips' + rather than `.set smartmips'. + * doc/c-mips.texi (MIPS Options): Refer to `.module mips16', + `.module micromips', `.module nomicromips' and `.module + smartmips' rather than `.set mips16', `.set micromips', `.set + nomicromips' and `.set smartmips' respectively. + +2017-05-12 Maciej W. Rozycki <macro@imgtec.com> + Matthew Fortune <matthew.fortune@imgtec.com> + + * config/tc-mips.c (mips_percent_op): Add "%gprel". + (mips16_percent_op): Add "%gp_rel". + * testsuite/gas/mips/elf-rel8.s:: Add `%gprel' forms. + * testsuite/gas/mips/elf-rel8-mips16.s: Add `%gp_rel' forms. + * testsuite/gas/mips/elf-rel8.d: Adjust accordingly. + * testsuite/gas/mips/elf-rel8-mips16.d: Likewise. + +2017-05-12 Maciej W. Rozycki <macro@imgtec.com> + + * testsuite/gas/mips/mips16.d: Adjust BREAK disassembly. + * testsuite/gas/mips/mips16-64@mips16.d: Likewise. + * testsuite/gas/mips/mips16-64.d: Likewise. + * testsuite/gas/mips/mips16-64@mips16-64.d: Likewise. + * testsuite/gas/mips/mips16-macro.d: Likewise. + * testsuite/gas/mips/mips16-64@mips16-macro.d: Likewise. + * testsuite/gas/mips/mips16-sub.d: Likewise. + * testsuite/gas/mips/mips16-32@mips16-sub.d: Likewise. + +2017-05-11 Maciej W. Rozycki <macro@imgtec.com> + + * testsuite/gas/mips/mips32r2-sync-1.d: New test. + * testsuite/gas/mips/micromips@mips32r2-sync-1.d: New test. + * testsuite/gas/mips/mips.exp: Run the new tests. + +2017-05-10 Maciej W. Rozycki <macro@imgtec.com> + + * testsuite/gas/mips/isa-override-2.d: New test. + * testsuite/gas/mips/mips1@isa-override-2.d: New test. + * testsuite/gas/mips/r3000@isa-override-2.d: New test. + * testsuite/gas/mips/r3900@isa-override-2.d: New test. + * testsuite/gas/mips/mips2@isa-override-2.d: New test. + * testsuite/gas/mips/mips32@isa-override-2.d: New test. + * testsuite/gas/mips/mips32r2@isa-override-2.d: New test. + * testsuite/gas/mips/mips32r3@isa-override-2.d: New test. + * testsuite/gas/mips/mips32r5@isa-override-2.d: New test. + * testsuite/gas/mips/mips32r6@isa-override-2.d: New test. + * testsuite/gas/mips/octeon3@isa-override-2.d: New test. + * testsuite/gas/mips/r3000@isa-override-2.l: Remove list test. + * testsuite/gas/mips/mips1@isa-override-2.s: Remove test source. + * testsuite/gas/mips/r3000@isa-override-2.s: Remove test source. + * testsuite/gas/mips/r3900@isa-override-2.s: Remove test source. + * testsuite/gas/mips/mips2@isa-override-2.s: Remove test source. + * testsuite/gas/mips/mips32@isa-override-2.s: Remove test + source. + * testsuite/gas/mips/mips32r2@isa-override-2.s: Remove test + source. + * testsuite/gas/mips/mips32r3@isa-override-2.s: Remove test + source. + * testsuite/gas/mips/mips32r5@isa-override-2.s: Remove test + source. + * testsuite/gas/mips/mips32r6@isa-override-2.s: Remove test + source. + * testsuite/gas/mips/octeon3@isa-override-2.s: Remove test + source. + * gas/testsuite/gas/mips/mips.exp: Fold corresponding list tests + into the new tests. + +2017-05-10 Maciej W. Rozycki <macro@imgtec.com> + + * testsuite/gas/mips/mips16e-sub.d: Correct test name. + * testsuite/gas/mips/mips16-32@mips16e-sub.d: Likewise. + * testsuite/gas/mips/mips16-64@mips16e-sub.d: Likewise. + * testsuite/gas/mips/mips16e-64-sub.d: Likewise. + * testsuite/gas/mips/mips16-32@mips16e-64-sub.d: Likewise. + * testsuite/gas/mips/mips16-64@mips16e-64-sub.d: Likewise. + * testsuite/gas/mips/mips16e-32@mips16e-64-sub.d: Likewise. + +2017-05-10 Maciej W. Rozycki <macro@imgtec.com> + + * testsuite/gas/mips/mips16-macro.l: Remove list test. + +2017-05-10 Maciej W. Rozycki <macro@imgtec.com> + + * testsuite/gas/mips/r3900@ecoff@ld.d: Remove test. + * testsuite/gas/mips/mips2@ecoff@ld.d: Remove test. + * testsuite/gas/mips/mips32@ecoff@ld.d: Remove test. + * testsuite/gas/mips/mips32r2@ecoff@ld.d: Remove test. + * testsuite/gas/mips/r3900@ecoff@ld-forward.d: Remove test. + * testsuite/gas/mips/mips2@ecoff@ld-forward.d: Remove test. + * testsuite/gas/mips/mips32@ecoff@ld-forward.d: Remove test. + * testsuite/gas/mips/mips32r2@ecoff@ld-forward.d: Remove test. + * testsuite/gas/mips/mips1@ecoff@sd.d: Remove test. + * testsuite/gas/mips/r3000@ecoff@sd.d: Remove test. + * testsuite/gas/mips/r3900@ecoff@sd.d: Remove test. + * testsuite/gas/mips/mips2@ecoff@sd.d: Remove test. + * testsuite/gas/mips/mips32@ecoff@sd.d: Remove test. + * testsuite/gas/mips/mips32r2@ecoff@sd.d: Remove test. + * testsuite/gas/mips/mips1@ecoff@sd-forward.d: Remove test. + * testsuite/gas/mips/r3000@ecoff@sd-forward.d: Remove test. + * testsuite/gas/mips/r3900@ecoff@sd-forward.d: Remove test. + * testsuite/gas/mips/mips2@ecoff@sd-forward.d: Remove test. + * testsuite/gas/mips/mips32@ecoff@sd-forward.d: Remove test. + * testsuite/gas/mips/mips32r2@ecoff@sd-forward.d: Remove test. + +2017-05-10 Claudiu Zissulescu <claziss@synopsys.com> + + * testsuite/gas/arc/attr-arc600.d: New file. + * testsuite/gas/arc/attr-arc600_mul32x16.d: Likewise. + * testsuite/gas/arc/attr-arc600_norm.d: Likewise. + * testsuite/gas/arc/attr-arc601.d: Likewise. + * testsuite/gas/arc/attr-arc601_mul32x16.d: Likewise. + * testsuite/gas/arc/attr-arc601_mul64.d: Likewise. + * testsuite/gas/arc/attr-arc601_norm.d: Likewise. + * testsuite/gas/arc/attr-arc700.d: Likewise. + * testsuite/gas/arc/attr-arcem.d: Likewise. + * testsuite/gas/arc/attr-archs.d: Likewise. + * testsuite/gas/arc/attr-autodetect-1.d: Likewise. + * testsuite/gas/arc/attr-autodetect-1.s: Likewise. + * testsuite/gas/arc/attr-cpu-a601.d: Likewise. + * testsuite/gas/arc/attr-cpu-a601.s: Likewise. + * testsuite/gas/arc/attr-cpu-a700.d: Likewise. + * testsuite/gas/arc/attr-cpu-a700.s: Likewise. + * testsuite/gas/arc/attr-cpu-em.d: Likewise. + * testsuite/gas/arc/attr-cpu-em.s: Likewise. + * testsuite/gas/arc/attr-cpu-hs.d: Likewise. + * testsuite/gas/arc/attr-cpu-hs.s: Likewise. + * testsuite/gas/arc/attr-em.d: Likewise. + * testsuite/gas/arc/attr-em4.d: Likewise. + * testsuite/gas/arc/attr-em4_dmips.d: Likewise. + * testsuite/gas/arc/attr-em4_fpuda.d: Likewise. + * testsuite/gas/arc/attr-em4_fpus.d: Likewise. + * testsuite/gas/arc/attr-hs.d: Likewise. + * testsuite/gas/arc/attr-hs34.d: Likewise. + * testsuite/gas/arc/attr-hs38.d: Likewise. + * testsuite/gas/arc/attr-hs38_linux.d: Likewise. + * testsuite/gas/arc/attr-mul64.d: Likewise. + * testsuite/gas/arc/attr-name.d: Likewise. + * testsuite/gas/arc/attr-name.s: Likewise. + * testsuite/gas/arc/attr-nps400.d: Likewise. + * testsuite/gas/arc/attr-override-mcpu.d: Likewise. + * testsuite/gas/arc/attr-override-mcpu.s + * testsuite/gas/arc/attr-quarkse_em.d: Likewise. + * testsuite/gas/arc/blank.s: Likewise. + * testsuite/gas/elf/section2.e-arc: Likewise. + * testsuite/gas/arc/cpu-pseudop-1.d: Update test. + * testsuite/gas/arc/cpu-pseudop-2.d: Likewise. + * testsuite/gas/arc/nps400-0.d: Likewise. + * testsuite/gas/elf/elf.exp: Set target_machine for ARC. + * config/tc-arc.c (opcode/arc-attrs.h): Include. + (ARC_GET_FLAG, ARC_SET_FLAG, streq): Define. + (arc_attribute): Declare new function. + (md_pseudo_table): Add arc_attribute. + (cpu_types): Rename default cpu features. + (selected_cpu): Set the default OSABI flag. + (mpy_option): New variable. + (pic_option): Likewise. + (sda_option): Likewise. + (tls_option): Likewise. + (feature_type, feature_list): Remove. + (arc_initial_eflag): Likewise. + (attributes_set_explicitly): New variable. + (arc_check_feature): Check also for the conflicting features. + (arc_select_cpu): Refactor assignment of selected_cpu.eflags. + (arc_option): Remove setting of private flags and architecture. + (check_cpu_feature): Refactor feature names. + (autodetect_attributes): New function. + (assemble_tokens): Use above function. + (md_parse_option): Refactor feature names. + (arc_attribute): New function. + (arc_set_attribute_int): Likewise. + (arc_set_attribute_string): Likewise. + (arc_stralloc): Likewise. + (arc_set_public_attributes): Likewise. + (arc_md_end): Likewise. + (arc_copy_symbol_attributes): Likewise. + (rc_convert_symbolic_attribute): Likewise. + * config/tc-arc.h (md_end): Define. + (CONVERT_SYMBOLIC_ATTRIBUTE): Likewise. + (TC_COPY_SYMBOL_ATTRIBUTES): Likewise. + * doc/c-arc.texi: Document ARC object attributes. + +2017-05-03 Maciej W. Rozycki <macro@imgtec.com> + + * config/tc-mips.c (RELAX_MIPS16_ENCODE): Add `pic', `sym32' and + `nomacro' flags. + (RELAX_MIPS16_PIC, RELAX_MIPS16_SYM32, RELAX_MIPS16_NOMACRO): + New macros. + (RELAX_MIPS16_USER_SMALL, RELAX_MIPS16_USER_EXT) + (RELAX_MIPS16_DSLOT, RELAX_MIPS16_JAL_DSLOT) + (RELAX_MIPS16_EXTENDED, RELAX_MIPS16_MARK_EXTENDED) + (RELAX_MIPS16_CLEAR_EXTENDED, RELAX_MIPS16_ALWAYS_EXTENDED) + (RELAX_MIPS16_MARK_ALWAYS_EXTENDED) + (RELAX_MIPS16_CLEAR_ALWAYS_EXTENDED): Shift bits. + (RELAX_MIPS16_MACRO, RELAX_MIPS16_MARK_MACRO) + (RELAX_MIPS16_CLEAR_MACRO): New macros. + (append_insn): Pass `mips_pic', HAVE_32BIT_SYMBOLS and + `mips_opts.warn_about_macros' settings to RELAX_MIPS16_ENCODE. + (mips16_macro_frag): New function. + (md_estimate_size_before_relax): Handle HI16/LO16 relaxation. + (mips_relax_frag): Likewise. + (md_convert_frag): Likewise. + + * testsuite/gas/mips/mips16@relax-swap3.d: Remove error output, + add dump patterns. + * testsuite/gas/mips/mips16e@relax-swap3.d: New test + subarchitecture. + * testsuite/gas/mips/micromips@relax-swap3.d: Remove trailing + NOP padding. + * testsuite/gas/mips/mips16-pcrel-reloc-2.d: Remove error + output, add dump patterns. + * testsuite/gas/mips/mips16-pcrel-reloc-3.d: Remove error + output, add dump patterns. + * testsuite/gas/mips/mips16-pcrel-reloc-6.d: Remove error + output, add dump patterns. + * testsuite/gas/mips/mips16-pcrel-reloc-7.d: Remove error + output, add dump patterns. + * testsuite/gas/mips/mips16-pcrel-addend-2.d: Remove error + output, add dump patterns. + * testsuite/gas/mips/mips16-pcrel-addend-3.d: Remove error + output, add dump patterns. + * testsuite/gas/mips/mips16-pcrel-absolute.d: Remove error + output, add dump patterns. + * testsuite/gas/mips/mips16-pcrel-absolute-1.d: Remove error + output, add dump patterns. + * testsuite/gas/mips/mips16@relax-swap3.l: Remove file. + * testsuite/gas/mips/mips16-pcrel-reloc-2.l: Remove file. + * testsuite/gas/mips/mips16-pcrel-reloc-3.l: Remove file. + * testsuite/gas/mips/mips16-pcrel-reloc-6.l: Remove file. + * testsuite/gas/mips/mips16-pcrel-reloc-7.l: Remove file. + * testsuite/gas/mips/mips16-pcrel-addend-2.l: Remove file. + * testsuite/gas/mips/mips16-pcrel-addend-3.l: Remove file. + * testsuite/gas/mips/mips16-pcrel-absolute.l: Remove file. + * testsuite/gas/mips/mips16-pcrel-absolute-1.l: Remove file. + * testsuite/gas/mips/relax-swap3.s: Adjust trailing padding. + + * testsuite/gas/mips/mips16-pcrel-0.d: New test. + * testsuite/gas/mips/mips16-pcrel-1.d: New test. + * testsuite/gas/mips/mips16-pcrel-2.d: New test. + * testsuite/gas/mips/mips16-pcrel-3.d: New test. + * testsuite/gas/mips/mips16-pcrel-4.d: New test. + * testsuite/gas/mips/mips16-pcrel-5.d: New test. + * testsuite/gas/mips/mips16-pcrel-pic-0.d: New test. + * testsuite/gas/mips/mips16-pcrel-pic-1.d: New test. + * testsuite/gas/mips/mips16-pcrel-n32-0.d: New test. + * testsuite/gas/mips/mips16-pcrel-n32-1.d: New test. + * testsuite/gas/mips/mips16-pcrel-n64-sym32-0.d: New test. + * testsuite/gas/mips/mips16-pcrel-n64-sym32-1.d: New test. + * testsuite/gas/mips/mips16-pcrel-n64-0.d: New test. + * testsuite/gas/mips/mips16-pcrel-n64-1.d: New test. + * testsuite/gas/mips/mips16-pcrel-delay-0.d: New test. + * testsuite/gas/mips/mips16-pcrel-delay-1.d: New test. + * testsuite/gas/mips/mips16-pcrel-addend-4.d: New test. + * testsuite/gas/mips/mips16-pcrel-addend-5.d: New test. + * testsuite/gas/mips/mips16-pcrel-addend-6.d: New test. + * testsuite/gas/mips/mips16-pcrel-addend-7.d: New test. + * testsuite/gas/mips/mips16-pcrel-addend-8.d: New test. + * testsuite/gas/mips/mips16-pcrel-addend-9.d: New test. + * testsuite/gas/mips/mips16-pcrel-addend-pic-8.d: New test. + * testsuite/gas/mips/mips16-pcrel-addend-pic-9.d: New test. + * testsuite/gas/mips/mips16-pcrel-addend-n32-8.d: New test. + * testsuite/gas/mips/mips16-pcrel-addend-n32-9.d: New test. + * testsuite/gas/mips/mips16-pcrel-addend-n64-sym32-8.d: New test. + * testsuite/gas/mips/mips16-pcrel-addend-n64-sym32-9.d: New test. + * testsuite/gas/mips/mips16-pcrel-addend-n64-8.d: New test. + * testsuite/gas/mips/mips16-pcrel-addend-n64-9.d: New test. + * testsuite/gas/mips/mips16-pcrel-absolute-2.d: New test. + * testsuite/gas/mips/mips16-pcrel-absolute-3.d: New test. + * testsuite/gas/mips/mips16-pcrel-absolute-4.d: New test. + * testsuite/gas/mips/mips16-pcrel-absolute-5.d: New test. + * testsuite/gas/mips/mips16-pcrel-absolute-6.d: New test. + * testsuite/gas/mips/mips16-pcrel-absolute-7.d: New test. + * testsuite/gas/mips/mips16-pcrel-absolute-pic-4.d: New test. + * testsuite/gas/mips/mips16-pcrel-absolute-pic-6.d: New test. + * testsuite/gas/mips/mips16-pcrel-absolute-n32-4.d: New test. + * testsuite/gas/mips/mips16-pcrel-absolute-n32-6.d: New test. + * testsuite/gas/mips/mips16-pcrel-absolute-n64-4.d: New test. + * testsuite/gas/mips/mips16-pcrel-absolute-n64-6.d: New test. + * testsuite/gas/mips/mips16-pcrel-absolute-n64-sym32-4.d: New + test. + * testsuite/gas/mips/mips16-pcrel-absolute-n64-sym32-6.d: New + test. + * testsuite/gas/mips/mips16-pcrel-absolute-pic-n32-4.d: New + test. + * testsuite/gas/mips/mips16-pcrel-absolute-pic-n32-6.d: New + test. + * testsuite/gas/mips/mips16-pcrel-absolute-pic-n64-4.d: New + test. + * testsuite/gas/mips/mips16-pcrel-absolute-pic-n64-6.d: New + test. + * testsuite/gas/mips/mips16-pcrel-absolute-pic-n64-sym32-4.d: + New test. + * testsuite/gas/mips/mips16-pcrel-absolute-pic-n64-sym32-6.d: + New test. + * testsuite/gas/mips/mips16-pcrel-0.l: New stderr output. + * testsuite/gas/mips/mips16-pcrel-1.l: New stderr output. + * testsuite/gas/mips/mips16-pcrel-2.l: New stderr output. + * testsuite/gas/mips/mips16-pcrel-3.l: New stderr output. + * testsuite/gas/mips/mips16-pcrel-4.l: New stderr output. + * testsuite/gas/mips/mips16-pcrel-5.l: New stderr output. + * testsuite/gas/mips/mips16-pcrel-delay-0.l: New stderr output. + * testsuite/gas/mips/mips16-pcrel-delay-1.l: New stderr output. + * testsuite/gas/mips/mips16-pcrel-addend-8.l: New stderr output. + * testsuite/gas/mips/mips16-pcrel-addend-9.l: New stderr output. + * testsuite/gas/mips/mips16-pcrel-absolute-4.l: New stderr + output. + * testsuite/gas/mips/mips16-pcrel-absolute-6.l: New stderr + output. + * testsuite/gas/mips/mips16-pcrel-0.s: New test source. + * testsuite/gas/mips/mips16-pcrel-1.s: New test source. + * testsuite/gas/mips/mips16-pcrel-2.s: New test source. + * testsuite/gas/mips/mips16-pcrel-3.s: New test source. + * testsuite/gas/mips/mips16-pcrel-4.s: New test source. + * testsuite/gas/mips/mips16-pcrel-5.s: New test source. + * testsuite/gas/mips/mips16-pcrel-delay-0.s: New test source. + * testsuite/gas/mips/mips16-pcrel-delay-1.s: New test source. + * testsuite/gas/mips/mips16-pcrel-addend-4.s: New test source. + * testsuite/gas/mips/mips16-pcrel-addend-5.s: New test source. + * testsuite/gas/mips/mips16-pcrel-addend-6.s: New test source. + * testsuite/gas/mips/mips16-pcrel-addend-7.s: New test source. + * testsuite/gas/mips/mips16-pcrel-addend-8.s: New test source. + * testsuite/gas/mips/mips16-pcrel-addend-9.s: New test source. + * testsuite/gas/mips/mips16-pcrel-absolute-2.s: New test. + * testsuite/gas/mips/mips16-pcrel-absolute-3.s: New test. + * testsuite/gas/mips/mips16-pcrel-absolute-4.s: New test. + * testsuite/gas/mips/mips16-pcrel-absolute-5.s: New test. + * testsuite/gas/mips/mips16-pcrel-absolute-6.s: New test. + * testsuite/gas/mips/mips16-pcrel-absolute-7.s: New test. + * testsuite/gas/mips/mips.exp: Run the new tests. + +2017-05-03 Nick Clifton <nickc@redhat.com> + + PR gas/20941 + * symbols.c (snapshot_symbol): Handle the case where + resolve_expression returns a local symbol. + +2017-05-02 Maciej W. Rozycki <macro@imgtec.com> + + * config/tc-mips.c (append_insn): Call `symbol_append' for any + expression symbol created for MIPS16 relaxation. + (match_mips16_insn): Don't encode a constant value as an + immediate with a PC-relative operand. + + * testsuite/gas/mips/mips16-pcrel-absolute-1.d: New test. + * testsuite/gas/mips/mips16-branch-absolute-1.d: New test. + * testsuite/gas/mips/mips16-branch-absolute-2.d: New test. + * testsuite/gas/mips/mips16-branch-absolute-addend-1.d: New + test. + * testsuite/gas/mips/mips16-branch-absolute-n32-1.d: New test. + * testsuite/gas/mips/mips16-branch-absolute-n32-2.d: New test. + * testsuite/gas/mips/mips16-branch-absolute-addend-n32-1.d: New + test. + * testsuite/gas/mips/mips16-branch-absolute-n64-1.d: New test. + * testsuite/gas/mips/mips16-branch-absolute-n64-2.d: New test. + * testsuite/gas/mips/mips16-branch-absolute-addend-n64-1.d: New + test. + * testsuite/gas/mips/mips16-pcrel-absolute-1.l: New stderr + output. + * testsuite/gas/mips/mips16-pcrel-absolute-1.s: New test source. + * testsuite/gas/mips/mips16-branch-absolute-1.s: New test + source. + * testsuite/gas/mips/mips16-branch-absolute-2.s: New test + source. + * testsuite/gas/mips/mips16-branch-absolute-addend-1.s: New test + source. + * testsuite/gas/mips/mips.exp: Run the new tests. + +2017-04-27 Maciej W. Rozycki <macro@imgtec.com> + + * config/tc-mips.c (mips16_pcrel_val): New function, factored + out from... + (mips16_extended_frag): ... here. + (md_convert_frag): Use `mips16_pcrel_val' rather than repeated + code in MIPS16 relaxation, with `stretch' hardcoded to 0. + +2017-04-27 Maciej W. Rozycki <macro@imgtec.com> + + * config/tc-mips.c (RELAX_MIPS16_LONG_BRANCH): Rename to... + (RELAX_MIPS16_ALWAYS_EXTENDED): ... this. + (RELAX_MIPS16_MARK_LONG_BRANCH): Rename to... + (RELAX_MIPS16_MARK_ALWAYS_EXTENDED): ... this. + (RELAX_MIPS16_CLEAR_LONG_BRANCH): Rename to... + (RELAX_MIPS16_CLEAR_ALWAYS_EXTENDED): ... this. + (mips16_extended_frag): Adjust accordingly. + +2017-04-27 Alan Modra <amodra@gmail.com> + + * symbols.c (S_FORCE_RELOC): Separate section and symbol tests. + +2017-04-26 Maciej W. Rozycki <macro@imgtec.com> + + * config/tc-mips.c (RELAX_ENCODE): Add `PIC' flag. + (RELAX_PIC): New macro. + (RELAX_USE_SECOND, RELAX_SECOND_LONGER, RELAX_NOMACRO) + (RELAX_DELAY_SLOT, RELAX_DELAY_SLOT_16BIT) + (RELAX_DELAY_SLOT_SIZE_FIRST, RELAX_DELAY_SLOT_SIZE_SECOND): + Shift bits. + (RELAX_BRANCH_ENCODE): Add `pic' flag. + (RELAX_BRANCH_UNCOND, RELAX_BRANCH_LIKELY, RELAX_BRANCH_LINK) + (RELAX_BRANCH_TOOFAR): Shift bits. + (RELAX_BRANCH_PIC): New macro. + (RELAX_MICROMIPS_ENCODE): Add `pic' flag. + (RELAX_MICROMIPS_PIC): New macro. + (RELAX_MICROMIPS_UNCOND, RELAX_MICROMIPS_COMPACT) + (RELAX_MICROMIPS_LINK, RELAX_MICROMIPS_NODS) + (RELAX_MICROMIPS_RELAX32): Shift bits. + (relax_close_frag): Pass `mips_pic' setting to RELAX_ENCODE. + (append_insn): Pass `mips_pic' setting to RELAX_BRANCH_ENCODE + and RELAX_MICROMIPS_ENCODE, and record it in `fx_tcbit2' of the + first fixup created. + (md_apply_fix) <BFD_RELOC_16_PCREL_S2>: Use `fx_tcbit2' of the + fixup processed rather than `mips_pic' in choosing to relax an + out of range branch to a jump. + (relaxed_branch_length): Use the `pic' flag of the relaxed frag + rather than `mips_pic'. + (relaxed_micromips_32bit_branch_length): Likewise. + (md_estimate_size_before_relax): Likewise. + (md_convert_frag): Likewise. + + * testsuite/gas/mips/option-pic-relax-0.d: New test. + * testsuite/gas/mips/option-pic-relax-1.d: New test. + * testsuite/gas/mips/option-pic-relax-2.d: New test. + * testsuite/gas/mips/option-pic-relax-3.d: New test. + * testsuite/gas/mips/option-pic-relax-3a.d: New test. + * testsuite/gas/mips/option-pic-relax-4.d: New test. + * testsuite/gas/mips/option-pic-relax-5.d: New test. + * testsuite/gas/mips/option-pic-relax-2.l: New stderr output. + * testsuite/gas/mips/option-pic-relax-3.l: New stderr output. + * testsuite/gas/mips/option-pic-relax-4.l: New stderr output. + * testsuite/gas/mips/option-pic-relax-5.l: New stderr output. + * testsuite/gas/mips/option-pic-relax-0.s: New test source. + * testsuite/gas/mips/option-pic-relax-1.s: New test source. + * testsuite/gas/mips/option-pic-relax-2.s: New test source. + * testsuite/gas/mips/option-pic-relax-3.s: New test source. + * testsuite/gas/mips/option-pic-relax-4.s: New test source. + * testsuite/gas/mips/option-pic-relax-5.s: New test source. + * testsuite/gas/mips/mips.exp: Run the new tests. + +2017-04-25 Claudiu Zissulescu <claziss@synopsys.com> + + * testsuite/gas/arc/leave_enter.d: Update test. + * testsuite/gas/arc/leave_enter.s: Likewise. + +2017-04-25 Claudiu Zissulescu <claziss@synopsys.com> + + * testsuite/gas/arc/b.d: Update test. + * testsuite/gas/arc/noargs_hs.d: Likewise. + +2017-04-25 Maciej W. Rozycki <macro@imgtec.com> + + * config/tc-mips.c (md_convert_frag): Correct + BFD_RELOC_MIPS16_16_PCREL_S1 fixup size. + * testsuite/gas/mips/mips16-branch-addend-4.d: New test. + * testsuite/gas/mips/mips16-branch-addend-5.d: New test. + * testsuite/gas/mips/mips16-branch-addend-5.l: New stderr + output. + * testsuite/gas/mips/mips16-branch-addend-4.s: New test source. + * testsuite/gas/mips/mips16-branch-addend-5.s: New test source. + * testsuite/gas/mips/mips.exp: Run the new tests. + +2017-04-25 Jose E. Marchesi <jose.marchesi@oracle.com> + + PR gas/21407 + * config/tc-sparc.c (md_apply_fix): Do not transform `call' + instructions into branch instructions in fixups generating + additional relocations. + * testsuite/gas/sparc/call-relax.s: New file. + * testsuite/gas/sparc/call-relax.d: Likewise. + * testsuite/gas/sparc/call-relax-aout.d: Likewise. + * testsuite/gas/sparc/sparc.exp: Test call-relax and call-relax-aout. + +2017-04-24 Thomas Preud'homme <thomas.preudhomme@arm.com> + + * config/tc-arm.c (move_or_literal_pool): Remove code generating MOVS. + Forbid MOV.W and MOVW if destination is SP or PC. + * testsuite/gas/arm/thumb2_ldr_immediate_highregs_armv6t2.s: Explain + expectation of LDR not generating a MOVS for low registers and small + constants. Add tests of MOVW generation. + * testsuite/gas/arm/thumb2_ldr_immediate_highregs_armv6t2.d: Update + expected disassembly. + +2017-04-22 Alan Modra <amodra@gmail.com> + + * testsuite/gas/ppc/vle.s: Format. Add se_rfgi and e_sc. + * testsuite/gas/ppc/vle.d: Update. + +2017-04-21 Nick Clifton <nickc@redhat.com> + + PR binutils/21380 + * testsuite/gas/aarch64/illegal-3.s: New file. + * testsuite/gas/aarch64/illegal-3.d: New file. + +2017-04-11 Alan Modra <amodra@gmail.com> + + * config/tc-ppc.c (md_show_usage): Delete mention of -mhtm. + * testsuite/gas/ppc/htm.d: Pass -mpower8 and -Mpower8. + +2017-04-10 Max Filippov <jcmvbkbc@gmail.com> + + * config/tc-xtensa.c (xtensa_maybe_create_literal_pool_frag): + Initialize lps->frag_count with auto_litpool_limit. + (xg_promote_candidate_litpool): New function. + (xtensa_move_literals): Extract candidate litpool promotion code + into separate function. Call it for all possible found + candidates. + (xtensa_switch_to_literal_fragment): Drop 'recursive' flag and + call to xtensa_mark_literal_pool_location that it guards. + Replace it with call to xtensa_maybe_create_literal_pool_frag. + Initialize pool_location with created literal pool candidate. + * testsuite/gas/xtensa/all.exp: Add new tests. + * testsuite/gas/xtensa/auto-litpools-first1.d: New test results. + * testsuite/gas/xtensa/auto-litpools-first1.s: New test. + * testsuite/gas/xtensa/auto-litpools-first2.d: New test results. + * testsuite/gas/xtensa/auto-litpools-first2.s: New test. + * testsuite/gas/xtensa/auto-litpools.d: Fix offsets changed due + to additional jump instruction. + +2017-04-07 Alan Modra <amodra@gmail.com> + + * testsuite/gas/ppc/altivec2.s: Delete E6500 vector insns. + * testsuite/gas/ppc/altivec2.d: Adjust to suit. + +2017-04-07 Alan Modra <amodra@gmail.com> + + * testsuite/gas/elf/section12a.d: Don't expect alignment of 1 + for .mbind.text. + +2017-04-06 Pip Cet <pipcet@gmail.com> + + * testsuite/gas/wasm32/allinsn.d: Adjust test for disassembler + changes. + * testsuite/gas/wasm32/disass.d: New test. + * testsuite/gas/wasm32/disass.s: New test. + * testsuite/gas/wasm32/disass-2.d: New test. + * testsuite/gas/wasm32/disass-2.s: New test. + * testsuite/gas/wasm32/reloc.d: Adjust test for changed reloc + names. + * testsuite/gas/wasm32/reloc.s: Update test for changed assembler + syntax. + * testsuite/gas/wasm32/wasm32.exp: Run new tests. Expect allinsn + test to succeed. + +2017-04-04 H.J. Lu <hongjiu.lu@intel.com> + + * NEWS: Mention support for ELF SHF_GNU_MBIND. + * config/obj-elf.c (section_match): New. + (get_section): Match both sh_info and group name. + (obj_elf_change_section): Add argument for sh_info. Pass both + sh_info and group name to get_section. Issue an error for + SHF_GNU_MBIND section without SHF_ALLOC. Set sh_info. + (obj_elf_parse_section_letters): Set SHF_GNU_MBIND for 'd'. + (obj_elf_section): Support SHF_GNU_MBIND section info. + * config/obj-elf.h (obj_elf_change_section): Add argument for + sh_info. + * config/tc-arm.c (start_unwind_section): Pass 0 as sh_info to + obj_elf_change_section. + * config/tc-ia64.c (obj_elf_vms_common): Likewise. + * config/tc-microblaze.c (microblaze_s_data): Likewise. + (microblaze_s_sdata): Likewise. + (microblaze_s_rdata): Likewise. + (microblaze_s_bss): Likewise. + * config/tc-mips.c (s_change_section): Likewise. + * config/tc-msp430.c (msp430_profiler): Likewise. + * config/tc-rx.c (parse_rx_section): Likewise. + * config/tc-tic6x.c (tic6x_start_unwind_section): Likewise. + * doc/as.texinfo: Document 'd' for SHF_GNU_MBIND. + * testsuite/gas/elf/elf.exp: Run section12a, section12b and + section13. + * testsuite/gas/elf/section10.d: Updated. + * testsuite/gas/elf/section10.s: Likewise. + * testsuite/gas/elf/section12.s: New file. + * testsuite/gas/elf/section12a.d: Likewise. + * testsuite/gas/elf/section12b.d: Likewise. + * testsuite/gas/elf/section13.l: Likewise. + * testsuite/gas/elf/section13.d: Likewise. + * testsuite/gas/elf/section13.s: Likewise. + +2017-04-03 Palmer Dabbelt <palmer@dabbelt.com> + + * config/tc-riscv.c (riscv_clear_subsets): Cast argument to free to + avoid const warnings. + +2017-03-30 Palmer Dabbelt <palmer@dabbelt.com> + + * config/tc-riscv.c (riscv_clear_subsets): New function. + (riscv_add_subset): Call riscv_clear_subsets and riscv_set_rvc to + clear RVC when it's been previously set. + +2017-03-31 Nick Clifton <nickc@redhat.com> + + PR gas/21333 + * config/tc-s390.c (tc_s390_fix_adjustable): Allow non pc-relative + fixups in mergeable sections to be adjusted. + +2017-03-30 Pip Cet <pipcet@gmail.com> + + * config/tc-wasm32.h: New file: Add WebAssembly assembler target. + * config/tc-wasm32.c: New file: Add WebAssembly assembler target. + * Makefile.am: Add WebAssembly assembler target. + * configure.tgt: Add WebAssembly assembler target. + * doc/c-wasm32.texi: New file: Start documenting WebAssembly + assembler. + * doc/all.texi: Define WASM32. + * doc/as.texinfo: Add WebAssembly entries. + * NEWS: Mention the new support. + * Makefile.in: Regenerate. + * po/gas.pot: Regenerate. + * po/POTFILES.in: Regenerate. + * testsuite/gas/wasm32: New directory. + * testsuite/gas/wasm32/allinsn.d: New file. + * testsuite/gas/wasm32/allinsn.s: New file. + * testsuite/gas/wasm32/illegal.l: New file. + * testsuite/gas/wasm32/illegal.s: New file. + * testsuite/gas/wasm32/illegal-2.l: New file. + * testsuite/gas/wasm32/illegal-2.s: New file. + * testsuite/gas/wasm32/illegal-3.l: New file. + * testsuite/gas/wasm32/illegal-3.s: New file. + * testsuite/gas/wasm32/illegal-4.l: New file. + * testsuite/gas/wasm32/illegal-4.s: New file. + * testsuite/gas/wasm32/illegal-5.l: New file. + * testsuite/gas/wasm32/illegal-5.s: New file. + * testsuite/gas/wasm32/illegal-6.l: New file. + * testsuite/gas/wasm32/illegal-6.s: New file. + * testsuite/gas/wasm32/illegal-7.l: New file. + * testsuite/gas/wasm32/illegal-7.s: New file. + * testsuite/gas/wasm32/illegal-8.l: New file. + * testsuite/gas/wasm32/illegal-8.s: New file. + * testsuite/gas/wasm32/illegal-9.l: New file. + * testsuite/gas/wasm32/illegal-9.s: New file. + * testsuite/gas/wasm32/illegal-10.l: New file. + * testsuite/gas/wasm32/illegal-10.s: New file. + * testsuite/gas/wasm32/illegal-11.l: New file. + * testsuite/gas/wasm32/illegal-11.s: New file. + * testsuite/gas/wasm32/illegal-12.l: New file. + * testsuite/gas/wasm32/illegal-12.s: New file. + * testsuite/gas/wasm32/illegal-13.l: New file. + * testsuite/gas/wasm32/illegal-13.s: New file. + * testsuite/gas/wasm32/illegal-14.l: New file. + * testsuite/gas/wasm32/illegal-14.s: New file. + * testsuite/gas/wasm32/illegal-15.l: New file. + * testsuite/gas/wasm32/illegal-15.s: New file. + * testsuite/gas/wasm32/illegal-16.l: New file. + * testsuite/gas/wasm32/illegal-16.s: New file. + * testsuite/gas/wasm32/illegal-17.l: New file. + * testsuite/gas/wasm32/illegal-17.s: New file. + * testsuite/gas/wasm32/illegal-18.l: New file. + * testsuite/gas/wasm32/illegal-18.s: New file. + * testsuite/gas/wasm32/illegal-19.l: New file. + * testsuite/gas/wasm32/illegal-19.s: New file. + * testsuite/gas/wasm32/illegal-20.l: New file. + * testsuite/gas/wasm32/illegal-20.s: New file. + * testsuite/gas/wasm32/illegal-21.l: New file. + * testsuite/gas/wasm32/illegal-21.s: New file. + * testsuite/gas/wasm32/illegal-22.l: New file. + * testsuite/gas/wasm32/illegal-22.s: New file. + * testsuite/gas/wasm32/illegal-24.l: New file. + * testsuite/gas/wasm32/illegal-24.s: New file. + * testsuite/gas/wasm32/illegal-25.l: New file. + * testsuite/gas/wasm32/illegal-25.s: New file. + * testsuite/gas/wasm32/reloc.d: New file. + * testsuite/gas/wasm32/reloc.s: New file. + * testsuite/gas/wasm32/wasm32.exp: New tests for WebAssembly + architecture. + +2017-03-29 Alan Modra <amodra@gmail.com> + + * config/tc-ppc.c (md_parse_option): Reject -mraw. + +2017-03-27 Alan Modra <amodra@gmail.com> + + PR 21303 + * testsuite/gas/ppc/pr21303.d, + * testsuite/gas/ppc/pr21303.s: New test + * testsuite/gas/ppc/ppc.exp: Run it. + +2017-03-27 Rinat Zelig <rinat@mellanox.com> + + * testsuite/gas/arc/nps400-12.s: New file. + * testsuite/gas/arc/nps400-12.d: New file. + +2017-03-24 Thomas preud'homme <thomas.preudhomme@arm.com> + + * config/tc-arm.: (md_begin): Set selected_cpu from *mcpu_cpu_opt when + CPU_DEFAULT is defined. + +2017-03-21 Palmer Dabbbelt <palmer@dabbelt.com> + + * config/tc-riscv.c (md_show_usage): Remode defuct -m32, -m64, + -msoft-float, -mhard-float, -mno-rvc, and -mrvc options; and don't + print an invalid default ISA string. + * doc/c-riscv.texi (OPTIONS): Add -fpic and -fno-pic options. + +2017-03-22 Max Filippov <jcmvbkbc@gmail.com> + + * config/tc-xtensa.c (xtensa_relax_frag): Change fx_size of the + reassigned fixup to size of jump instruction (3) and fx_r_type + to BFD_RELOC_XTENSA_SLOT0_OP, as there's only one slot. + (add_jump_to_trampoline): Search + origfrag->tc_frag_data.slot_symbols for the slot with non-NULL + symbol and use that slot instead of slot 0. + +2017-03-21 Andreas Krebbel <krebbel@linux.vnet.ibm.com> + + * config/tc-s390.c (s390_parse_cpu): Remove S390_INSTR_FLAG_VX2 + from cpu_table. Remove vx2, and novx2 from cpu_flags. + +2017-03-21 Rinat Zelig <rinat@mellanox.com> + + * testsuite/gas/arc/nps400-11.s: New file. + * testsuite/gas/arc/nps400-11.d: New file. + +2017-03-20 Nick Clifton <nickc@redhat.com> + + * doc/as.texinfo (2byte): Note that if no expressions are present + the directive does nothing. Emphasize that the output is + unaligned, and that this can have an effect on the relocations + generated. + (4byte): Simplify description. Refer back to the 2byte + description. + (8byte): Likewise. + +2017-03-20 Richard Earnshaw <rearnsha@arm.com> + + * config/tc-arm.c (arm_fpus): Note entires that should not be + documented. + * doc/c-arm.texi (-mfpu): Add missing FPU entries for neon-vfpv3 and + neon-fp16. Fix spelling error. + +2017-03-20 Richard Earnshaw <rearnsha@arm.com> + + * config/tc-arm.c (arm_fpus): Add neon-vfpv3 as an alias for neon. + +2017-03-16 Rinat Zelig <rinat@mellanox.com> + + * config/tc-arc.c (assemble_insn): Only handle ".t" and ".nt" + specially for ARCv2. + +2017-03-14 Kito Cheng <kito.cheng@gmail.com> + + * config/tc-riscv.c (validate_riscv_insn): Add 'o' RVC immediate + encoding format, which can accept 0-valued immediates. + (riscv_ip): Likewise. + +2017-03-15 Nick Clifton <nickc@redhat.com> + + * config/tc-riscv.c (riscv_pre_output_hook): Fix compile time + warning about discarding a const qualifier. + +2017-03-02 Kuan-Lin Chen <rufus@andestech.com> + + * config/tc-riscv.h (HWARD2_USE_FIXED_ADVANCE_PC): New define. + +2017-03-02 Kuan-Lin Chen <rufus@andestech.com> + + * config/tc-riscv.c (md_apply_fix): Set fx_frag and + fx_next->fx_frag for CFA_advance_loc relocations. + +2017-03-02 Kuan-Lin Chen <rufus@andestech.com> + + * config/tc-riscv.c (md_apply_fix): Compute the correct offsets + for CFA relocations. + +2017-03-13 Nick Clifton <nickc@redhat.com> + + PR binutils/21202 + * config/tc-aarch64.c (reloc_table): Rename + BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC to + BFD_RELOC_AARCH64_TLSDESC_LD64_LO12. Rname + BFD_RELOC_AARCH64_TLSDESC_ADD_LO12_NC to + BFD_RELOC_AARCH64_TLSDESC_ADD_LO12. + (md_apply_fix): Likewise. + (aarch64_force_relocation): Likewise. + * testsuite/gas/aarch64/tls.d: Update regexp. + +2017-03-10 Tobin C. Harding <me@tobin.cc> + Nick Clifton <nickc@redhat.com> + + * doc/as.texinfo (2byte): Tidy up wording. Add note that + overlarge values will produce a warning message and be trunacted. + (4byte): Likewise. + +2017-03-09 H.J. Lu <hongjiu.lu@intel.com> + + * config/tc-i386.c (_i386_insn): Add dir_encoding and + vec_encoding. Remove swap_operand and need_vrex. + (extra_symbol_chars): Add '}'. + (md_begin): Mark '}' with LEX_BEGIN_NAME. Allow '}' in + mnemonic. + (build_vex_prefix): Don't use 2-byte VEX encoding with + {vex3}. Check dir_encoding and load. + (parse_insn): Check pseudo prefixes. Set dir_encoding. + (VEX_check_operands): Likewise. + (match_template): Check dir_encoding and load. + (parse_real_register): Set vec_encoding instead of need_vrex. + (parse_register): Likewise. + * doc/c-i386.texi: Document {disp8}, {disp32}, {load}, {store}, + {vex2}, {vex3} and {evex}. Remove ".s", ".d8" and ".d32" + * testsuite/gas/i386/i386.exp: Run pseudos and x86-64-pseudos. + * testsuite/gas/i386/pseudos.d: New file. + * testsuite/gas/i386/pseudos.s: Likewise. + * testsuite/gas/i386/x86-64-pseudos.d: Likewise. + * testsuite/gas/i386/x86-64-pseudos.s: Likewise. + +2017-03-08 Peter Bergner <bergner@vnet.ibm.com> + + * testsuite/gas/ppc/altivec2.d (as): Use the -mpower8 option. + (objdump): Use the -Mpower8 option. + +2017-03-08 Peter Bergner <bergner@vnet.ibm.com> + + * testsuite/gas/ppc/power9.d <lnia> New test. + * testsuite/gas/ppc/power9.s: Likewise. + +2017-03-07 Alan Modra <amodra@gmail.com> + + * doc/as.texinfo (2byte, 4byte, 8byte): Correct @section placement. + +2017-03-07 Tobin C. Harding <me@tobin.cc> + Alan Modra <amodra@gmail.com> + + * doc/as.texinfo (2byte, 4byte, 8byte): Document. + * doc/c-arm.texi (2byte, 4byte, 8byte): Omit if ELF. + +2017-03-06 H.J. Lu <hongjiu.lu@intel.com> + + * config/tc-i386.c (cpu_arch): Add .cet. + * doc/c-i386.texi: Document cet. + * testsuite/gas/i386/cet-intel.d: New file. + * testsuite/gas/i386/cet.d: Likewise. + * testsuite/gas/i386/cet.s: Likewise. + * testsuite/gas/i386/x86-64-cet-intel.d: Likewise. + * testsuite/gas/i386/x86-64-cet.d: Likewise. + * testsuite/gas/i386/x86-64-cet.s: Likewise. + * testsuite/gas/i386/i386.exp: Run Intel CET tests. + +2017-03-06 H.J. Lu <hongjiu.lu@intel.com> + + * testsuite/gas/i386/x86-64-mpx-inval-2.s: Force a good alignment. + * testsuite/gas/i386/x86-64-mpx-inval-2.l: Expect [0-9A-F]+. + +2017-03-06 Alan Modra <amodra@gmail.com> + + * dw2gencfi.c (encoding_size): Return unsigned int. + (emit_expr_encoded): Assert size matches reloc bitsize. + (output_fde): Use unsigned for offset_size and addr_size. Set + addr_size earlier and use in place of constant 4 and uses of + DWARF2_FDE_RELOC_SIZE. Assert it matches reloc bitsize. + +2017-03-06 Alan Modra <amodra@gmail.com> + + * dw2gencfi.c: Wrap overlong lines. Add parens for emacs + auto reformat. Formatting and whitespace fixes. + +2017-03-05 Mark Wielaard <mark@klomp.org> + + * dwarf2dbg.c (out_debug_abbrev): Use DW_FORM_strp instead of + DW_FORM_string for DW_AT_name, DW_AT_comp_dir and DW_AT_producer. + (out_debug_info): Accept symbols to name, comp_dir and producer in + the .debug_str section and emit those offsets not full strings. + (out_debug_str): New function that outputs the strings for name, + comp_dir and producer in .debug_str and generates symbols to those + strings. + (out_debug_line): Create a .debug_str section if necessary and call + out_debug_str before calling out_debug_info. + * testsuite/gas/aarch64/dwarf.d: Add extra section symbol to expected + output. + +2017-03-02 Maciej W. Rozycki <macro@imgtec.com> + + * write.c (relax_segment) <rs_org>: Only bail out if the fixed + part of the frag has overrun the location requested. + + * testsuite/gas/all/org-1.d: New test. + * testsuite/gas/all/org-2.d: New test. + * testsuite/gas/all/org-3.d: New test. + * testsuite/gas/all/org-4.d: New test. + * testsuite/gas/all/org-5.d: New test. + * testsuite/gas/all/org-6.d: New test. + * testsuite/gas/all/org-1.l: New stderr output. + * testsuite/gas/all/org-2.l: New stderr output. + * testsuite/gas/all/org-3.l: New stderr output. + * testsuite/gas/all/org-1.s: New test source. + * testsuite/gas/all/org-2.s: New test source. + * testsuite/gas/all/org-3.s: New test source. + * testsuite/gas/all/org-4.s: New test source. + * testsuite/gas/all/org-5.s: New test source. + * testsuite/gas/all/org-6.s: New test source. + * testsuite/gas/all/gas.exp: Run the new tests. + + * testsuite/gas/mips/org-1.d: New test. + * testsuite/gas/mips/org-2.d: New test. + * testsuite/gas/mips/org-3.d: New test. + * testsuite/gas/mips/org-4.d: New test. + * testsuite/gas/mips/org-5.d: New test. + * testsuite/gas/mips/org-6.d: New test. + * testsuite/gas/mips/org-7.d: New test. + * testsuite/gas/mips/org-8.d: New test. + * testsuite/gas/mips/org-9.d: New test. + * testsuite/gas/mips/org-10.d: New test. + * testsuite/gas/mips/org-11.d: New test. + * testsuite/gas/mips/org-12.d: New test. + * testsuite/gas/mips/org-1.l: New stderr output. + * testsuite/gas/mips/org-4.l: New stderr output. + * testsuite/gas/mips/org-5.l: New stderr output. + * testsuite/gas/mips/org-6.l: New stderr output. + * testsuite/gas/mips/org-10.l: New stderr output. + * testsuite/gas/mips/org-1.s: New test source. + * testsuite/gas/mips/org-2.s: New test source. + * testsuite/gas/mips/org-3.s: New test source. + * testsuite/gas/mips/org-4.s: New test source. + * testsuite/gas/mips/org-5.s: New test source. + * testsuite/gas/mips/org-6.s: New test source. + * testsuite/gas/mips/org-7.s: New test source. + * testsuite/gas/mips/org-8.s: New test source. + * testsuite/gas/mips/org-9.s: New test source. + * testsuite/gas/mips/org-10.s: New test source. + * testsuite/gas/mips/org-11.s: New test source. + * testsuite/gas/mips/org-12.s: New test source. + * testsuite/gas/mips/mips.exp: Run the new tests. + +2017-03-01 Szabolcs Nagy <szabolcs.nagy@arm.com> + + * doc/c-aarch64.texi (AArch64 Extensions): Document rcpc. + +2017-02-28 Jan Beulich <jbeulich@suse.com> + + * testsuite/gas/i386/x86-64-avx.s: Add suffixed variants of + VPCMPESTR{I,M}. + * testsuite/gas/i386/x86-64-sse2avx.s: Likewise. + * testsuite/gas/i386/x86-64-sse4_2.s: Add suffixed variants + of PCMPESTR{I,M}. + * testsuite/gas/i386/ilp32/x86-64-avx-intel.d: Likewise. + * testsuite/gas/i386/ilp32/x86-64-avx.d: Likewise. + * testsuite/gas/i386/ilp32/x86-64-sse2avx.d: Likewise. + * testsuite/gas/i386/ilp32/x86-64-sse4_2-intel.d: Likewise. + * testsuite/gas/i386/ilp32/x86-64-sse4_2.d: Likewise. + * testsuite/gas/i386/x86-64-avx-intel.d: Likewise. + * testsuite/gas/i386/x86-64-avx.d: Likewise. + * testsuite/gas/i386/x86-64-sse2avx.d: Likewise. + * testsuite/gas/i386/x86-64-sse4_2-intel.d: Likewise. + * testsuite/gas/i386/x86-64-sse4_2.d: Likewise. + +2017-02-28 Alan Modra <amodra@gmail.com> + + * config/tc-nios2.h (TC_FORCE_RELOCATION_SUB_LOCAL): Define. + +2017-02-28 Alan Modra <amodra@gmail.com> + + * config/tc-ppc.c (md_assemble): Use BFD_RELOC_PPC_16DX_HA for addpcis. + (md_apply_fix): Remove fx_subsy check. Move code converting to + pcrel reloc earlier and handle BFD_RELOC_PPC_16DX_HA. Remove code + emiiting errors on seeing fx_pcrel set on unexpected relocs, as + that is done now by the generic code via.. + * config/tc-ppc.h (TC_FORCE_RELOCATION_SUB_LOCAL): ..this. Define. + (TC_VALIDATE_FIX_SUB): Define. + +2017-02-28 Maciej W. Rozycki <macro@imgtec.com> + + * testsuite/gas/mips/jalr4.s: Add `jalr $0, $25' instructions. + * testsuite/gas/mips/jalr4.d: Adjust accordingly. Remove MIPSr6 + encoding patterns. + * testsuite/gas/mips/jalr4-n64.d: Likewise. + * testsuite/gas/mips/mipsr6@jalr4.d: New test. + * testsuite/gas/mips/mipsr6@jalr4-n32.d: New test. + * testsuite/gas/mips/mipsr6@jalr4-n64.d: New test. + +2017-02-25 Alan Modra <amodra@gmail.com> + + * testsuite/gas/elf/strtab.s: Don't put directives on first + column or continuation with labels not in first column. + +2017-02-24 Richard Sandiford <richard.sandiford@arm.com> + + * doc/c-aarch64.texi: Document that sve implies fp16, simd and compnum. + * config/tc-aarch64.c (parse_vector_type_for_operand): Allow .q + to be used with SVE registers. + (parse_operands): Handle new SVE operands. + (aarch64_features): Make "sve" require F16 rather than FP. Also + require COMPNUM. + * testsuite/gas/aarch64/sve.s: Add tests for new instructions. + Include compnum tests. + * testsuite/gas/aarch64/sve.d: Update accordingly. + * testsuite/gas/aarch64/sve-invalid.s: Add tests for new instructions. + * testsuite/gas/aarch64/sve-invalid.l: Update accordingly. Also + update expected output for new FMOV and MOV alternatives. + +2017-02-24 Richard Sandiford <richard.sandiford@arm.com> + + * doc/c-aarch64.texi: Add a "compnum" entry. + * config/tc-aarch64.c (aarch64_features): Likewise, + * testsuite/gas/aarch64/advsimd-compnum.s: New test. + * testsuite/gas/aarch64/advsimd-compnum.d: Likewise. + +2017-02-24 Jan Beulich <jbeulich@suse.com> + + * testsuite/gas/i386/opcode.s: Add alternative TEST forms. + * testsuite/gas/i386/x86-64-opcode.s: Likewise. + * testsuite/gas/i386/opcode.d: Adjust accordingly. + * testsuite/gas/i386/opcode-intel.d: Likewise. + * testsuite/gas/i386/x86-64-opcode.d: Likewise. + * testsuite/gas/i386/ilp32/x86-64-opcode.d: Likewise. + +2017-02-24 Sheldon Lobo <sheldon.lobo@oracle.com> + + Test cases for the architecture level aware SPARC ASI work. + * gas/testsuite/gas/sparc/sparc.exp: 2 new tests + * gas/testsuite/gas/sparc/asi-bump-warn.s: New test + * gas/testsuite/gas/sparc/asi-bump-warn.l: Likewise + * gas/testsuite/gas/sparc/asi-arch-error.s: Likewise + * gas/testsuite/gas/sparc/asi-arch-error.l: Likewise + +2017-02-23 Maciej W. Rozycki <macro@imgtec.com> + + * testsuite/gas/mips/jalr4.d: New test. + * testsuite/gas/mips/jalr4-n32.d: New test. + * testsuite/gas/mips/jalr4-n64.d: New test. + * testsuite/gas/mips/jalr4.s: New test source. + * testsuite/gas/mips/mips.exp: Run the new tests. + +2017-02-23 Sheldon Lobo <sheldon.lobo@oracle.com> + + Add support for associating SPARC ASIs with an architecture level. + * config/tc-sparc.c (parse_sparc_asi): New encode SPARC ASIs. + +2017-02-23 Jan Beulich <jbeulich@suse.com> + + * testsuite/gas/all/err-sizeof.s: Don't use sums or differences + of symbols as expression. + +2017-02-23 Jan Beulich <jbeulich@suse.com> + + * gas/testsuite/gas/i386/x86-64-mpx-inval-2.d: Add 32- and 16- + bit GPR forms of BNDCL, BNDCU, and BNDCN. Add RSP-as-index + Intel syntax forms of BNDMK, BNDSTX, and BNDLDX. + * gas/testsuite/gas/i386/x86-64-mpx-inval-2.l: Adjust. + +2017-02-22 Maciej W. Rozycki <macro@imgtec.com> + + * ecoff.c (ecoff_directive_end) [md_flush_pending_output]: Call + `md_flush_pending_output'. + * config/tc-mips.c (s_mips_end) [md_flush_pending_output]: Call + `md_flush_pending_output' unconditionally. + * testsuite/gas/mips/debug-label-end-1.d: New test. + * testsuite/gas/mips/debug-label-end-2.d: New test. + * testsuite/gas/mips/debug-label-end-3.d: New test. + * testsuite/gas/mips/debug-label-end.s: New test source. + * testsuite/gas/mips/mips.exp: Run the new tests. + +2017-02-22 Hans-Peter Nilsson <hp@axis.com> + + * testsuite/gas/all/err-sizeof.s: Include cris*-*-* in the list of + targets yielding an error message matching "too complex". + +2017-02-22 Nick Clifton <nickc@redhat.com> + + * testsuite/gas/arm/vcmp-noprefix-imm.d: Skip for non-ELF targets. + +2017-02-21 Jan Beulich <jbeulich@suse.com> + + * expr.c (operand): Handle missing operand to .startof.() and + .sizeof.(). + * testsuite/gas/all/err-sizeof.s: New. + +2017-02-20 Alan Modra <amodra@gmail.com> + + PR 21118 + * NEWS: Revise powerpc register check. + * config/tc-ppc.c (ppc_optimize_expr, md_assemble): Make "invalid + register expression" a warning. + +2017-02-17 Maciej W. Rozycki <macro@imgtec.com> + + * ecoff.c (ecoff_directive_ent, add_procedure): Handle `.aent'. + * config/obj-ecoff.c (obj_pseudo_table): Add "aent" entry. + * config/obj-elf.c (ecoff_debug_pseudo_table): Likewise. + * testsuite/gas/mips/aent-2.d: New test. + * testsuite/gas/mips/aent-mdebug.d: New test. + * testsuite/gas/mips/aent-mdebug-2.d: New test. + * testsuite/gas/mips/mips.exp: Run the new tests. + +2017-02-15 Richard Sandiford <richard.sandiford@arm.com> + + * testsuite/gas/aarch64/sve-sysreg.s, + testsuite/gas/aarch64/sve-sysreg.d, + testsuite/gas/aarch64/sve-sysreg-invalid.d, + testsuite/gas/aarch64/sve-sysreg-invalid.l: New tests. + +2017-02-15 Richard Sandiford <richard.sandiford@arm.com> + + * doc/c-aarch64.texi: Fix sve entry. + +2017-02-15 Claudiu Zissulescu <claziss@synopsys.com> + + * config/tc-arc.c (md_convert_frag): Remove @pcl relocation + information from input expression. + (assemble_insn): Make sure pcrel is correctly set. + (arc_pcrel_adjust): Compensate for PCL rounding. + * testsuite/gas/arc/relax-add01.d: New file. + * testsuite/gas/arc/relax-add01.s: Likewise. + * testsuite/gas/arc/relax-add02.d: Likewise. + * testsuite/gas/arc/relax-add02.s: Likewise. + * testsuite/gas/arc/relax-add03.d: Likewise. + * testsuite/gas/arc/relax-add03.s: Likewise. + * testsuite/gas/arc/relax-add04.d: Likewise. + * testsuite/gas/arc/relax-add04.s: Likewise. + * testsuite/gas/arc/relax-ld01.d: Likewise. + * testsuite/gas/arc/relax-ld01.s: Likewise. + * testsuite/gas/arc/relax-ld02.d: Likewise. + * testsuite/gas/arc/relax-ld02.s: Likewise. + * testsuite/gas/arc/relax-mov01.d: Likewise. + * testsuite/gas/arc/relax-mov01.s: Likewise. + * testsuite/gas/arc/relax-mov02.d: Likewise. + * testsuite/gas/arc/relax-mov02.s: Likewise. + * testsuite/gas/arc/relax-mpy01.d: Likewise. + * testsuite/gas/arc/relax-mpy01.s: Likewise. + * testsuite/gas/arc/relax-sub01.d: Likewise. + * testsuite/gas/arc/relax-sub01.s: Likewise. + * testsuite/gas/arc/relax-sub02.d: Likewise. + * testsuite/gas/arc/relax-sub02.s: Likewise. + * testsuite/gas/arc/relax-sub03.d: Likewise. + * testsuite/gas/arc/relax-sub03.s: Likewise. + * testsuite/gas/arc/relax-sub04.d: Likewise. + * testsuite/gas/arc/relax-sub04.s: Likewise. + +2017-02-09 Vineet Gupta <vgupta@synopsys.com> + + * testsuite/gas/arc/st.d: Update for 0xe having a name now + +2017-02-14 Alan Modra <amodra@gmail.com> + + PR 21118 + * NEWS: Mention powerpc register checks. + * config/tc-ppc.c (struct pd_reg): Make value a short. Add flags. + (pre_defined_registers): Delete fpscr and pmr entries. Set + register type in flags. + (cr_names): Set type in flags. + (reg_name_search): Return pointer to struct pd_reg rather than value. + (register_name): Adjust to suit. Set X_md from flags. + (ppc_parse_name): Likewise. + (ppc_optimize_expr): New function. + (md_assemble): Verify expresion reg flags match operand. + * config/tc-ppc.h (md_optimize_expr): Define. + (ppc_optimize_expr): Declare. + +2017-02-14 Alan Modra <amodra@gmail.com> + + * testsuite/gas/ppc/cell.s: Correct invalid registers. + * testsuite/gas/ppc/vle-simple-1.s: Likewise. + * testsuite/gas/ppc/vle-simple-2.s: Likewise. + +2017-02-13 Thomas Preud'homme <thomas.preudhomme@arm.com> + + * config/tc-arm.c (parse_ifimm_zero): Make prefix optional in unified + syntax. + * testsuite/gas/arm/vcmp-noprefix-imm.d: New file. + * testsuite/gas/arm/vcmp-noprefix-imm.s: New file. + +2017-02-10 Nicholas Piggin <npiggin@gmail.com> + + * testsuite/gas/ppc/power9.d <scv, rfscv>: New tests. + +2017-02-02 Maciej W. Rozycki <macro@imgtec.com> + + * doc/as.texinfo (Overview): Select MIPS options for man page + inclusion. + +2017-01-30 Maciej W. Rozycki <macro@imgtec.com> + + * config/tc-mips.c (mips_ignore_branch_isa): New variable. + (options): Add OPTION_IGNORE_BRANCH_ISA and + OPTION_NO_IGNORE_BRANCH_ISA enum values. + (md_longopts): Add "mignore-branch-isa" and + "mno-ignore-branch-isa" options. + (md_parse_option): Handle OPTION_IGNORE_BRANCH_ISA and + OPTION_NO_IGNORE_BRANCH_ISA. + (fix_bad_cross_mode_branch_p): Return FALSE if + `mips_ignore_branch_isa' has been set. + (md_show_usage): Add `-mignore-branch-isa' and + `-mno-ignore-branch-isa'. + + * doc/as.texinfo (Target MIPS options): Add + `-mignore-branch-isa' and `-mno-ignore-branch-isa' options. + (-mignore-branch-isa, -mno-ignore-branch-isa): New options. + * doc/c-mips.texi (MIPS Options): Add `-mignore-branch-isa' and + `-mno-ignore-branch-isa' options. + + * testsuite/gas/mips/branch-local-ignore-2.d: New test. + * testsuite/gas/mips/branch-local-ignore-3.d: New test. + * testsuite/gas/mips/branch-local-ignore-n32-2.d: New test. + * testsuite/gas/mips/branch-local-ignore-n32-3.d: New test. + * testsuite/gas/mips/branch-local-ignore-n64-2.d: New test. + * testsuite/gas/mips/branch-local-ignore-n64-3.d: New test. + * testsuite/gas/mips/mips.exp: Run the new tests. + +2017-01-30 Maciej W. Rozycki <macro@imgtec.com> + + * testsuite/gas/mips/branch-local-2.d: New test. + * testsuite/gas/mips/branch-local-3.d: New test. + * testsuite/gas/mips/branch-local-n32-2.d: New test. + * testsuite/gas/mips/branch-local-n32-3.d: New test. + * testsuite/gas/mips/branch-local-n64-2.d: New test. + * testsuite/gas/mips/branch-local-n64-3.d: New test. + * testsuite/gas/mips/mips.exp: Fold corresponding list tests + into the new tests. + +2017-01-27 Alexis Deruell <alexis.deruelle@gmail.com> + + PR 21056 + * testsuite/gas/tic6x/insns16-parallel.s: New test case. + * testsuite/gas/tic6x/insns16-parallel.d: New test driver. + +2017-01-25 Sebastian Huber <sebastian.huber@embedded-brains.de> + + * configure.tgt (aarch64*-*-rtems*): Remove. + (bfin-*-rtems*): Likewise. + (h8300-*-rtems*): Likewise. + (i386-*-rtems*): Likewise. + (m32c-*-rtems*): Likewise. + (m32r-*-rtems*): Likewise. + (m68k-*-rtems*): Likewise. + (mips-*-rtems*): Likewise. + (nios2-*-rtems*): Likewise. + (ppc-*-rtems*): Likewise. + (sh-*-rtems*): Likewise. + (sparc64-*-rtems*): Likewise. + (sparc-*-rtems*): Likewise. + (*-*-rtems*) Use ELF format. + +2017-01-25 Sebastian Huber <sebastian.huber@embedded-brains.de> + + * configure.tgt (arm-*-rtems*): Move to (arm-*-eabi*). + +2017-01-25 Sebastian Huber <sebastian.huber@embedded-brains.de> + + * configure.tgt (sh-*-rtemscoff*): Remove. + +2017-01-24 Sebastian Huber <sebastian.huber@embedded-brains.de> + + * configure.tgt (riscv*-*-*): Remove em=linux. + +2017-01-23 Sebastian Rasmussen <sebras@gmail.com> + + PR gas/21072 + * asintl.h: Fix spelling mistakes and typos. + * atof-generic.c: Likewise. + * bit_fix.h: Likewise. + * config/atof-ieee.c: Likewise. + * config/bfin-defs.h: Likewise. + * config/bfin-parse.y: Likewise. + * config/obj-coff-seh.h: Likewise. + * config/obj-coff.c: Likewise. + * config/obj-evax.c: Likewise. + * config/obj-macho.c: Likewise. + * config/rx-parse.y: Likewise. + * config/tc-aarch64.c: Likewise. + * config/tc-alpha.c: Likewise. + * config/tc-arc.c: Likewise. + * config/tc-arm.c: Likewise. + * config/tc-avr.c: Likewise. + * config/tc-bfin.c: Likewise. + * config/tc-cr16.c: Likewise. + * config/tc-cris.c: Likewise. + * config/tc-crx.c: Likewise. + * config/tc-d10v.c: Likewise. + * config/tc-d30v.c: Likewise. + * config/tc-dlx.c: Likewise. + * config/tc-epiphany.c: Likewise. + * config/tc-frv.c: Likewise. + * config/tc-hppa.c: Likewise. + * config/tc-i370.c: Likewise. + * config/tc-i386-intel.c: Likewise. + * config/tc-i386.c: Likewise. + * config/tc-i960.c: Likewise. + * config/tc-ia64.c: Likewise. + * config/tc-m32r.c: Likewise. + * config/tc-m68hc11.c: Likewise. + * config/tc-m68k.c: Likewise. + * config/tc-mcore.c: Likewise. + * config/tc-mep.c: Likewise. + * config/tc-mep.h: Likewise. + * config/tc-metag.c: Likewise. + * config/tc-microblaze.c: Likewise. + * config/tc-mips.c: Likewise. + * config/tc-mmix.c: Likewise. + * config/tc-mn10200.c: Likewise. + * config/tc-mn10300.c: Likewise. + * config/tc-msp430.c: Likewise. + * config/tc-msp430.h: Likewise. + * config/tc-nds32.c: Likewise. + * config/tc-nds32.h: Likewise. + * config/tc-nios2.c: Likewise. + * config/tc-nios2.h: Likewise. + * config/tc-ns32k.c: Likewise. + * config/tc-pdp11.c: Likewise. + * config/tc-ppc.c: Likewise. + * config/tc-pru.c: Likewise. + * config/tc-rx.c: Likewise. + * config/tc-s390.c: Likewise. + * config/tc-score.c: Likewise. + * config/tc-score7.c: Likewise. + * config/tc-sh.c: Likewise. + * config/tc-sh64.c: Likewise. + * config/tc-sparc.c: Likewise. + * config/tc-tic4x.c: Likewise. + * config/tc-tic54x.c: Likewise. + * config/tc-v850.c: Likewise. + * config/tc-vax.c: Likewise. + * config/tc-visium.c: Likewise. + * config/tc-xgate.c: Likewise. + * config/tc-xtensa.c: Likewise. + * config/tc-z80.c: Likewise. + * config/tc-z8k.c: Likewise. + * config/te-vms.c: Likewise. + * config/xtensa-relax.c: Likewise. + * doc/as.texinfo: Likewise. + * doc/c-arm.texi: Likewise. + * doc/c-hppa.texi: Likewise. + * doc/c-i370.texi: Likewise. + * doc/c-i386.texi: Likewise. + * doc/c-m32r.texi: Likewise. + * doc/c-m68k.texi: Likewise. + * doc/c-mmix.texi: Likewise. + * doc/c-msp430.texi: Likewise. + * doc/c-nds32.texi: Likewise. + * doc/c-ns32k.texi: Likewise. + * doc/c-riscv.texi: Likewise. + * doc/c-rx.texi: Likewise. + * doc/c-s390.texi: Likewise. + * doc/c-tic6x.texi: Likewise. + * doc/c-tilegx.texi: Likewise. + * doc/c-tilepro.texi: Likewise. + * doc/c-v850.texi: Likewise. + * doc/c-xgate.texi: Likewise. + * doc/c-xtensa.texi: Likewise. + * dwarf2dbg.c: Likewise. + * ecoff.c: Likewise. + * itbl-ops.c: Likewise. + * listing.c: Likewise. + * macro.c: Likewise. + * po/gas.pot: Likewise. + * read.c: Likewise. + * struc-symbol.h: Likewise. + * symbols.h: Likewise. + * testsuite/gas/arc/relocs-errors.err: Likewise. + * write.c: Likewise. + +2017-01-23 Nick Clifton <nickc@redhat.com> + + * po/sv.po: Updated Swedish translation. + +2017-01-20 Nick Clifton <nickc@redhat.com> + + * config/tc-i386.c (parse_operands): Check for operand overflow + before setting the unspecified bit. + +2017-01-18 Maciej W. Rozycki <macro@imgtec.com> + + PR gas/20649 + * config/tc-mips.c (pic_need_relax): Don't check for linkonce + symbols, remove the `segtype' parameter. + (mips_frob_file, md_estimate_size_before_relax): Adjust + accordingly. + (s_is_linkonce): Add an explanatory comment. + * testsuite/gas/mips/comdat-reloc.d: New test. + * testsuite/gas/mips/comdat-reloc.s: New test source. + * testsuite/gas/mips/mips.exp: Run the new test. + +2017-01-18 Szabolcs Nagy <szabolcs.nagy@arm.com> + + * testsuite/gas/arm/armv8_3-a-simd.s: Add vcmla tests. + * testsuite/gas/arm/armv8_3-a-simd.d: Update. + +2017-01-18 Bernhard Rosenkranzer <bero@lindev.ch> + + PR 21059 + * config/bfin-lex.l: Support processing with flex 2.6.3. + * itbl-lex.l: Likewise. + +2017-01-18 Nathan Sidwell <nathan@acm.org> + + * as.h (gas_assert): Use abort. + (as_assert): Remove. + (signal_init): Declare. + * as.c (main): Call signal_init. + * messages.c: #include <signal.h> + (as_assert): Delete. + (as_abort): Allow NULL FILE. + (signal_crash): New. + (signal_init): Register fatal signal handlers. + * configure.ac: Check for strsignal. + * config.in: Rebuilt. + * configure: Rebuilt. + +2017-01-17 Nick Clifton <nickc@redhat.com> + + * po/sv.po: Updated Swedish translation. + +2017-01-12 Igor Tsimbalist <igor.v.tsimbalist@intel.com> + + * config/tc-i386.c (cpu_arch): Add .avx512_vpopcntdq. + (cpu_noarch): Add noavx512_vpopcntdq. + * doc/c-i386.texi: Document avx512_vpopcntdq, noavx512_vpopcntdq. + * testsuite/gas/i386/i386.exp: Run AVX512_VPOPCNTDQ tests. + * testsuite/gas/i386/avx512_vpopcntdqd-intel.d: New file. + * testsuite/gas/i386/avx512_vpopcntdqd.d: Ditto. + * testsuite/gas/i386/avx512_vpopcntdqd.s: Ditto. + * testsuite/gas/i386/x86-64-avx512_vpopcntdqd-intel.d: Ditto. + * testsuite/gas/i386/x86-64-avx512_vpopcntdqd.d: Ditto. + * testsuite/gas/i386/x86-64-avx512_vpopcntdqd.s: Ditto. + +2017-01-12 Nick Clifton <nickc@redhat.com> + + * read.c (temp_ilp): New function. Installs a temporary input + line pointer. + (restore_ilp): New function. Restores the original input line + pointer. + * read.h (temp_ilp): Prototype. + (restore_ilp): Prototype. + * stabs.c (dot_func_p): Use bfd_boolean type. + (generate_asm_file): Use temp_ilp and restore_ilp. + (stabs_generate_asm_lineno): Likewise. + (stabs_generate_asm_endfunc): Likewise. + +2017-01-11 Jeremy Soller <jackpot51@gmail.com> + + * configure.tgt: Add entry for i386-redox. + +2017-01-10 Nick Clifton <nickc@redhat.com> + + * po/sv.po: Updated Swedish translation. + +2017-01-10 Tristan Gingold <gingold@adacore.com> + + * testsuite/gas/all/sleb128-8.d: Adjust test. + * testsuite/gas/all/gas.exp (test_cond): Likewise. + +2017-01-10 Tristan Gingold <gingold@adacore.com> + + * read.c (emit_leb128_expr): Extended unsigned big number for + sleb128. + * testsuite/gas/all/gas.exp (test_cond): Add sleb128-8 test. + * testsuite/gas/all/sleb128.d: New test. + * testsuite/gas/all/sleb128.s: New test source. + +2017-01-09 Andrew Waterman <andrew@sifive.com> + + * config/tc-riscv.c (append_insn): Don't eagerly apply relocations + against constants. + (md_apply_fix): Mark relocations against constants as "done." + +2017-01-09 Andrew Waterman <andrew@sifive.com> + + * config/tc-riscv.c (append_insn): Don't eagerly apply relocations + against constants. + (md_apply_fix): Mark relocations against constants as "done." + +2017-01-09 Palmer Dabbelt <palmer@dabbelt.com> + Kito Cheng <kito.cheng@gmail.com> + + * emulparams/elf32lriscv-defs.sh (INITIAL_READONLY_SECTIONS): + Removed. + (SDATA_START_SYMBOLS): Likewise. + +2017-01-09 Nick Clifton <nickc@redhat.com> + + * po/sv.po: New Swedish translation. + * configure.ac (ALL_LINGUAS): Add sv. + * configure: Regenerate. + +2017-01-09 Andrew Waterman <andrew@sifive.com> + + * config/tc-riscv.c (relaxed_branch_length): Use the long + sequence when the target is a weak symbol. + +2017-01-04 Szabolcs Nagy <szabolcs.nagy@arm.com> + + * config/tc-aarch64.c (aarch64_features): Add rcpc. + * doc/c-aarch64.texi (AArch64 Extensions): Document rcpc. + * testsuite/gas/aarch64/ldst-exclusive-armv8_3.d: Rename to ... + * testsuite/gas/aarch64/ldst-rcpc.d: This. + * testsuite/gas/aarch64/ldst-exclusive-armv8_3.s: Rename to ... + * testsuite/gas/aarch64/ldst-rcpc.s: This. + * testsuite/gas/aarch64/ldst-rcpc-armv8_2.d: New test. + +2017-01-04 Norm Jacobs <norm.jacobs@oracle.com> + + PR gas/20992 + * configure.tgt: Treat sparcv9 as sparc64. + +2017-01-03 Kito Cheng <kito.cheng@gmail.com> + + * config/tc-riscv.c (riscv_set_arch): Whitelist the "q" ISA + extension. + (riscv_after_parse_args): Set FLOAT_ABI_QUAD when the Q ISA is + enabled and no other ABI is specified. + +2017-01-03 Dimitar Dimitrov <dimitar@dinux.eu> + + * config/tc-pru.c (md_number_to_chars): Fix parameter to be + valueT, as declared in tc.h. + (md_apply_fix): Fix to work on 32-bit hosts. + +2017-01-02 Alan Modra <amodra@gmail.com> + + Update year range in copyright notice of all files. + +For older changes see ChangeLog-2016 + +Copyright (C) 2017 Free Software Foundation, Inc. + +Copying and distribution of this file, with or without modification, +are permitted in any medium without royalty provided the copyright +notice and this notice are preserved. + +Local Variables: +mode: change-log +left-margin: 8 +fill-column: 74 +version-control: never +End: |