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-rw-r--r--cpu/ChangeLog5
-rw-r--r--cpu/fr30.cpu8
2 files changed, 10 insertions, 3 deletions
diff --git a/cpu/ChangeLog b/cpu/ChangeLog
index 6882c45..e62e29f 100644
--- a/cpu/ChangeLog
+++ b/cpu/ChangeLog
@@ -1,3 +1,8 @@
+2016-03-03 Alan Modra <amodra@gmail.com>
+
+ * fr30.cpu (f-m4): Replace bogus comment with a better guess
+ at what is really going on.
+
2016-03-02 Alan Modra <amodra@gmail.com>
* fr30.cpu (f-m4): Replace -1 << 4 with -16.
diff --git a/cpu/fr30.cpu b/cpu/fr30.cpu
index 0124647..84c32cf 100644
--- a/cpu/fr30.cpu
+++ b/cpu/fr30.cpu
@@ -159,10 +159,12 @@
(dnf f-u4c "4 bit 0 extended" () 12 4)
(df f-i4 "4 bit sign extended" () 8 4 INT #f #f)
(df f-m4 "4 bit minus extended" () 8 4 UINT
+ ; ??? This field takes a value in the range [-16,-1] but there
+ ; doesn't seem a way to tell CGEN that. Use an unsigned field and
+ ; disable range checks on insertion by masking. Restore the sign
+ ; on extraction. CGEN generated documentation for insns that use
+ ; this field will be wrong.
((value pc) (and WI value (const #xf)))
- ; ??? On a 64 bit host this doesn't get completely sign extended
- ; if the value is recorded in a long, as it is during extraction.
- ; Various fixes exist, pick one.
((value pc) (or WI value (const -16)))
)
(dnf f-u8 "8 bit unsigned" () 8 8)