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-rw-r--r--cpu/ChangeLog13
-rw-r--r--cpu/or1korbis.cpu261
2 files changed, 181 insertions, 93 deletions
diff --git a/cpu/ChangeLog b/cpu/ChangeLog
index 55fccab..df03e60 100644
--- a/cpu/ChangeLog
+++ b/cpu/ChangeLog
@@ -1,4 +1,17 @@
2018-10-05 Richard Henderson <rth@twiddle.net>
+ Stafford Horne <shorne@gmail.com>
+
+ * or1korbis.cpu (insn-opcode-mac): Add opcodes for MACU and MSBU.
+ (insn-opcode-alu-regreg): Add opcodes for MULD and MULDU.
+ (l-mul): Fix overflow support and indentation.
+ (l-mulu): Fix overflow support and indentation.
+ (l-muld, l-muldu, l-msbu, l-macu): New instructions.
+ (l-div); Remove incorrect carry behavior.
+ (l-divu): Fix carry and overflow behavior.
+ (l-mac): Add overflow support.
+ (l-msb, l-msbu): Add carry and overflow support.
+
+2018-10-05 Richard Henderson <rth@twiddle.net>
* or1k.opc (parse_disp26): Add support for plta() relocations.
(parse_disp21): New function.
diff --git a/cpu/or1korbis.cpu b/cpu/or1korbis.cpu
index 6fbf40a..094f018 100644
--- a/cpu/or1korbis.cpu
+++ b/cpu/or1korbis.cpu
@@ -220,8 +220,10 @@
(define-normal-insn-enum insn-opcode-mac
"multiply/accumulate insn opcode enums" ((MACH ORBIS-MACHS))
OPC_MAC_ f-op-3-4
- (("MAC" #x1)
- ("MSB" #x2)
+ (("MAC" #x1)
+ ("MSB" #x2)
+ ("MACU" #x3)
+ ("MSBU" #x4)
)
)
@@ -263,12 +265,14 @@
("OR" #x4)
("XOR" #x5)
("MUL" #x6)
+ ("MULD" #x7)
("SHROT" #x8)
("DIV" #x9)
("DIVU" #xA)
("MULU" #xB)
("EXTBH" #xC)
("EXTW" #xD)
+ ("MULDU" #xD)
("CMOV" #xE)
("FFL1" #xF)
)
@@ -595,7 +599,7 @@
(set UWI mac-machi 0)
)
()
- )
+)
; System releated instructions
@@ -816,77 +820,93 @@
)
(dni (l-mul) "l.mul reg/reg/reg"
- ((MACH ORBIS-MACHS))
- ("l.mul $rD,$rA,$rB")
- (+ OPC_ALU rD rA rB (f-resv-10-7 #x30) OPC_ALU_REGREG_MUL)
- (sequence ()
- (sequence ()
- ; 2's complement overflow
- (set BI sys-sr-ov (mul-o2flag WI rA rB))
- ; 1's complement overflow
- (set BI sys-sr-cy (mul-o1flag WI rA rB))
- (set rD (mul WI rA rB))
- )
- (if (andif sys-sr-ov sys-sr-ove)
- (raise-exception EXCEPT-RANGE))
- )
- ()
+ ((MACH ORBIS-MACHS))
+ ("l.mul $rD,$rA,$rB")
+ (+ OPC_ALU rD rA rB (f-resv-10-7 #x30) OPC_ALU_REGREG_MUL)
+ (sequence ()
+ (sequence ()
+ (set BI sys-sr-ov (mul-o2flag WI rA rB))
+ (set rD (mul WI rA rB))
+ )
+ (if (andif sys-sr-ov sys-sr-ove)
+ (raise-exception EXCEPT-RANGE))
+ )
+ ()
+)
+
+(dni (l-muld) "l.muld reg/reg"
+ ((MACH ORBIS-MACHS))
+ ("l.muld $rA,$rB")
+ (+ OPC_ALU (f-resv-25-5 0) rA rB (f-resv-10-7 #x30) OPC_ALU_REGREG_MULD)
+ (sequence ((DI result))
+ (set DI result (mul DI (ext DI rA) (ext DI rB)))
+ (set SI mac-machi (subword SI result 0))
+ (set SI mac-maclo (subword SI result 1))
+ )
+ ()
)
(dni (l-mulu) "l.mulu reg/reg/reg"
- ((MACH ORBIS-MACHS))
- ("l.mulu $rD,$rA,$rB")
- (+ OPC_ALU rD rA rB (f-resv-10-7 #x30) OPC_ALU_REGREG_MULU)
- (sequence ()
- (sequence ()
- ; 2's complement overflow
- (set BI sys-sr-ov 0)
- ; 1's complement overflow
- (set BI sys-sr-cy (mul-o1flag UWI rA rB))
- (set rD (mul UWI rA rB))
- )
- (if (andif sys-sr-ov sys-sr-ove)
- (raise-exception EXCEPT-RANGE))
- )
- ()
+ ((MACH ORBIS-MACHS))
+ ("l.mulu $rD,$rA,$rB")
+ (+ OPC_ALU rD rA rB (f-resv-10-7 #x30) OPC_ALU_REGREG_MULU)
+ (sequence ()
+ (sequence ()
+ (set BI sys-sr-cy (mul-o1flag UWI rA rB))
+ (set rD (mul UWI rA rB))
+ )
+ (if (andif sys-sr-cy sys-sr-ove)
+ (raise-exception EXCEPT-RANGE))
+ )
+ ()
+)
+
+(dni (l-muldu) "l.muld reg/reg"
+ ((MACH ORBIS-MACHS))
+ ("l.muldu $rA,$rB")
+ (+ OPC_ALU (f-resv-25-5 0) rA rB (f-resv-10-7 #x30) OPC_ALU_REGREG_MULDU)
+ (sequence ((DI result))
+ (set DI result (mul DI (zext DI rA) (zext DI rB)))
+ (set SI mac-machi (subword SI result 0))
+ (set SI mac-maclo (subword SI result 1))
+ )
+ ()
)
(dni l-div "divide (signed)"
- ((MACH ORBIS-MACHS))
- "l.div $rD,$rA,$rB"
- (+ OPC_ALU rD rA rB (f-resv-10-7 #x30) OPC_ALU_REGREG_DIV)
- (sequence ()
- (if (ne rB 0)
- (sequence ()
- (set BI sys-sr-cy 0)
- (set WI rD (div WI rA rB))
- )
- (set BI sys-sr-cy 1)
- )
- (set BI sys-sr-ov 0)
- (if (andif sys-sr-cy sys-sr-ove)
- (raise-exception EXCEPT-RANGE))
- )
- ()
+ ((MACH ORBIS-MACHS))
+ "l.div $rD,$rA,$rB"
+ (+ OPC_ALU rD rA rB (f-resv-10-7 #x30) OPC_ALU_REGREG_DIV)
+ (if (ne rB 0)
+ (sequence ()
+ (set BI sys-sr-ov 0)
+ (set WI rD (div WI rA rB))
+ )
+ (sequence ()
+ (set BI sys-sr-ov 1)
+ (if sys-sr-ove
+ (raise-exception EXCEPT-RANGE))
+ )
+ )
+ ()
)
(dni l-divu "divide (unsigned)"
- ((MACH ORBIS-MACHS))
- "l.divu $rD,$rA,$rB"
- (+ OPC_ALU rD rA rB (f-resv-10-7 #x30) OPC_ALU_REGREG_DIVU)
- (sequence ()
- (if (ne rB 0)
- (sequence ()
- (set BI sys-sr-cy 0)
- (set rD (udiv UWI rA rB))
- )
- (set BI sys-sr-cy 1)
- )
- (set BI sys-sr-ov 0)
- (if (andif sys-sr-cy sys-sr-ove)
- (raise-exception EXCEPT-RANGE))
- )
- ()
+ ((MACH ORBIS-MACHS))
+ "l.divu $rD,$rA,$rB"
+ (+ OPC_ALU rD rA rB (f-resv-10-7 #x30) OPC_ALU_REGREG_DIVU)
+ (if (ne rB 0)
+ (sequence ()
+ (set BI sys-sr-cy 0)
+ (set rD (udiv UWI rA rB))
+ )
+ (sequence ()
+ (set BI sys-sr-cy 1)
+ (if sys-sr-ove
+ (raise-exception EXCEPT-RANGE))
+ )
+ )
+ ()
)
(dni l-ff1 "find first '1'"
@@ -984,17 +1004,14 @@
(+ OPC_MULI rD rA simm16)
(sequence ()
(sequence ()
- ; 2's complement overflow
(set sys-sr-ov (mul-o2flag WI rA (ext WI simm16)))
- ; 1's complement overflow
- (set sys-sr-cy (mul-o1flag UWI rA (ext UWI simm16)))
(set rD (mul WI rA (ext WI simm16)))
)
(if (andif sys-sr-ov sys-sr-ove)
(raise-exception EXCEPT-RANGE))
)
()
- )
+)
(define-pmacro (extbh-insn mnemonic extop extmode truncmode)
(begin
@@ -1118,42 +1135,100 @@
((MACH ORBIS-MACHS))
"l.mac $rA,$rB"
(+ OPC_MAC (f-op-25-5 0) rA rB (f-resv-10-7 0) OPC_MAC_MAC)
- (sequence ((WI prod) (DI result))
- (set WI prod (mul WI rA rB))
- (set DI result (add (join DI SI mac-machi mac-maclo) (ext DI prod)))
- (set SI mac-machi (subword SI result 0))
- (set SI mac-maclo (subword SI result 1))
- )
+ (sequence ()
+ (sequence ((DI prod) (DI mac) (DI result))
+ (set DI prod (mul DI (ext DI rA) (ext DI rB)))
+ (set DI mac (join DI SI mac-machi mac-maclo))
+ (set DI result (add prod mac))
+ (set SI mac-machi (subword SI result 0))
+ (set SI mac-maclo (subword SI result 1))
+ (set BI sys-sr-ov (addc-oflag prod mac 0))
+ )
+ (if (andif sys-sr-ov sys-sr-ove)
+ (raise-exception EXCEPT-RANGE))
+ )
()
+)
+
+(dni l-maci
+ "l.maci reg/simm16"
+ ((MACH ORBIS-MACHS))
+ "l.maci $rA,${simm16}"
+ (+ OPC_MACI (f-resv-25-5 0) rA simm16)
+ (sequence ()
+ (sequence ((DI prod) (DI mac) (DI result))
+ (set DI prod (mul DI (ext DI rA) (ext DI simm16)))
+ (set DI mac (join DI SI mac-machi mac-maclo))
+ (set DI result (add mac prod))
+ (set SI mac-machi (subword SI result 0))
+ (set SI mac-maclo (subword SI result 1))
+ (set BI sys-sr-ov (addc-oflag prod mac 0))
+ )
+ (if (andif sys-sr-ov sys-sr-ove)
+ (raise-exception EXCEPT-RANGE))
)
+ ()
+)
+
+(dni l-macu
+ "l.macu reg/reg"
+ ((MACH ORBIS-MACHS))
+ "l.macu $rA,$rB"
+ (+ OPC_MAC (f-op-25-5 0) rA rB (f-resv-10-7 0) OPC_MAC_MACU)
+ (sequence ()
+ (sequence ((DI prod) (DI mac) (DI result))
+ (set DI prod (mul DI (zext DI rA) (zext DI rB)))
+ (set DI mac (join DI SI mac-machi mac-maclo))
+ (set DI result (add prod mac))
+ (set SI mac-machi (subword SI result 0))
+ (set SI mac-maclo (subword SI result 1))
+ (set BI sys-sr-cy (addc-cflag prod mac 0))
+ )
+ (if (andif sys-sr-cy sys-sr-ove)
+ (raise-exception EXCEPT-RANGE))
+ )
+ ()
+)
(dni l-msb
"l.msb reg/reg"
((MACH ORBIS-MACHS))
"l.msb $rA,$rB"
(+ OPC_MAC (f-op-25-5 0) rA rB (f-resv-10-7 0) OPC_MAC_MSB)
- (sequence ((WI prod) (DI result))
- (set WI prod (mul WI rA rB))
- (set DI result (sub (join DI SI mac-machi mac-maclo) (ext DI prod)))
- (set SI mac-machi (subword SI result 0))
- (set SI mac-maclo (subword SI result 1))
- )
- ()
+ (sequence ()
+ (sequence ((DI prod) (DI mac) (DI result))
+ (set DI prod (mul DI (ext DI rA) (ext DI rB)))
+ (set DI mac (join DI SI mac-machi mac-maclo))
+ (set DI result (sub mac prod))
+ (set SI mac-machi (subword SI result 0))
+ (set SI mac-maclo (subword SI result 1))
+ (set BI sys-sr-ov (subc-oflag mac result 0))
+ )
+ (if (andif sys-sr-ov sys-sr-ove)
+ (raise-exception EXCEPT-RANGE))
)
+ ()
+)
-(dni l-maci
- "l.maci reg/simm16"
+(dni l-msbu
+ "l.msbu reg/reg"
((MACH ORBIS-MACHS))
- "l.maci $rA,${simm16}"
- (+ OPC_MACI (f-resv-25-5 0) rA simm16)
- (sequence ((WI prod) (DI result))
- (set WI prod (mul WI (ext WI simm16) rA))
- (set DI result (add (join DI SI mac-machi mac-maclo) (ext DI prod)))
- (set SI mac-machi (subword SI result 0))
- (set SI mac-maclo (subword SI result 1))
- )
- ()
+ "l.msbu $rA,$rB"
+ (+ OPC_MAC (f-op-25-5 0) rA rB (f-resv-10-7 0) OPC_MAC_MSBU)
+ (sequence ()
+ (sequence ((DI prod) (DI mac) (DI result))
+ (set DI prod (mul DI (zext DI rA) (zext DI rB)))
+ (set DI mac (join DI SI mac-machi mac-maclo))
+ (set DI result (sub mac prod))
+ (set SI mac-machi (subword SI result 0))
+ (set SI mac-maclo (subword SI result 1))
+ (set BI sys-sr-cy (subc-cflag mac result 0))
+ )
+ (if (andif sys-sr-cy sys-sr-ove)
+ (raise-exception EXCEPT-RANGE))
)
+ ()
+)
(define-pmacro (cust-insn cust-num)
(begin
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