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-rw-r--r--cpu/ChangeLog5
-rw-r--r--cpu/m32c.cpu9
2 files changed, 11 insertions, 3 deletions
diff --git a/cpu/ChangeLog b/cpu/ChangeLog
index 6ea2b0e..48311b2 100644
--- a/cpu/ChangeLog
+++ b/cpu/ChangeLog
@@ -1,3 +1,8 @@
+2005-10-25 DJ Delorie <dj@redhat.com>
+
+ * m32c.cpu (add16-bQ-sp,add16-wQ-sp): Fix to allow either width by
+ making one a macro of the other.
+
2005-10-21 DJ Delorie <dj@redhat.com>
* m32c.cpu (lde, ste): Add dsp[a0] and [a1a] addressing.
diff --git a/cpu/m32c.cpu b/cpu/m32c.cpu
index 93d2bfe..9ac7d78 100644
--- a/cpu/m32c.cpu
+++ b/cpu/m32c.cpu
@@ -5997,10 +5997,10 @@
;-------------------------------------------------------------
(define-pmacro (binary-arith16-Q-sp op opc1 opc2 opc3 sem)
- (dni (.sym op 16 -Q-sp)
- (.str op ":Q #imm4,sp")
+ (dni (.sym op 16 -wQ-sp)
+ (.str op ".w:q #imm4,sp")
((machine 16))
- (.str op "${size}$Q #${Imm-12-s4},sp")
+ (.str op ".w$Q #${Imm-12-s4},sp")
(+ opc1 opc2 opc3 Imm-12-s4)
(sem QI Imm-12-s4 sp)
())
@@ -7123,6 +7123,9 @@
(binary-arith16-b-S-imm8-dst3 add ".b" (f-0-4 8) (f-4-1 0) add-sem)
; add.BW:Q #imm4,sp (m16 #7)
(binary-arith16-Q-sp add (f-0-4 7) (f-4-4 #xD) (f-8-4 #xB) add-sem)
+(dnmi add16-bQ-sp "add16-bQ-sp" ()
+ "add.b:q #${Imm-12-s4},sp"
+ (emit add16-wQ-sp Imm-12-s4))
; add.BW:G #imm,sp (m16 #6)
(binary-arith16-G-sp add (f-0-4 7) (f-4-3 6) (f-8-4 #xE) (f-12-4 #xB) add-sem)
; add.BW:G src,dst (m16 #4 m32 #6)