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-rw-r--r--bfd/ChangeLog13
-rw-r--r--bfd/archures.c13
-rw-r--r--bfd/bfd-in2.h13
-rw-r--r--bfd/cpu-arm.c41
-rw-r--r--bfd/elf32-arm.c32
5 files changed, 98 insertions, 14 deletions
diff --git a/bfd/ChangeLog b/bfd/ChangeLog
index a4ee933..96d7a4d 100644
--- a/bfd/ChangeLog
+++ b/bfd/ChangeLog
@@ -1,5 +1,18 @@
2018-07-02 Thomas Preud'homme <thomas.preudhomme@arm.com>
+ * archures.c (bfd_mach_arm_5TEJ, bfd_mach_arm_6, bfd_mach_arm_6KZ,
+ bfd_mach_arm_6T2, bfd_mach_arm_6K, bfd_mach_arm_7, bfd_mach_arm_6M,
+ bfd_mach_arm_6SM, bfd_mach_arm_7EM, bfd_mach_arm_8, bfd_mach_arm_8R,
+ bfd_mach_arm_8M_BASE, bfd_mach_arm_8M_MAIN): Define.
+ * bfd-in2.h: Regenerate.
+ * cpu-arm.c (arch_info_struct): Add entries for above new
+ bfd_mach_arm values.
+ * elf32-arm.c (bfd_arm_get_mach_from_attributes): Add Tag_CPU_arch to
+ bfd_mach_arm mapping logic for pre Armv4 and Armv5TEJ and later
+ architectures. Force assert failure for any new Tag_CPU_arch value.
+
+2018-07-02 Thomas Preud'homme <thomas.preudhomme@arm.com>
+
* doc/bfdint.texi: Use command-line consistently when used in a
compount word.
* doc/bfdsumm.texi: Likewise.
diff --git a/bfd/archures.c b/bfd/archures.c
index 3af7ddd..282e983 100644
--- a/bfd/archures.c
+++ b/bfd/archures.c
@@ -326,6 +326,19 @@ DESCRIPTION
.#define bfd_mach_arm_ep9312 11
.#define bfd_mach_arm_iWMMXt 12
.#define bfd_mach_arm_iWMMXt2 13
+.#define bfd_mach_arm_5TEJ 14
+.#define bfd_mach_arm_6 15
+.#define bfd_mach_arm_6KZ 16
+.#define bfd_mach_arm_6T2 17
+.#define bfd_mach_arm_6K 18
+.#define bfd_mach_arm_7 19
+.#define bfd_mach_arm_6M 20
+.#define bfd_mach_arm_6SM 21
+.#define bfd_mach_arm_7EM 22
+.#define bfd_mach_arm_8 23
+.#define bfd_mach_arm_8R 24
+.#define bfd_mach_arm_8M_BASE 25
+.#define bfd_mach_arm_8M_MAIN 26
. bfd_arch_nds32, {* Andes NDS32. *}
.#define bfd_mach_n1 1
.#define bfd_mach_n1h 2
diff --git a/bfd/bfd-in2.h b/bfd/bfd-in2.h
index f53dbb5..93745bd 100644
--- a/bfd/bfd-in2.h
+++ b/bfd/bfd-in2.h
@@ -2197,6 +2197,19 @@ enum bfd_architecture
#define bfd_mach_arm_ep9312 11
#define bfd_mach_arm_iWMMXt 12
#define bfd_mach_arm_iWMMXt2 13
+#define bfd_mach_arm_5TEJ 14
+#define bfd_mach_arm_6 15
+#define bfd_mach_arm_6KZ 16
+#define bfd_mach_arm_6T2 17
+#define bfd_mach_arm_6K 18
+#define bfd_mach_arm_7 19
+#define bfd_mach_arm_6M 20
+#define bfd_mach_arm_6SM 21
+#define bfd_mach_arm_7EM 22
+#define bfd_mach_arm_8 23
+#define bfd_mach_arm_8R 24
+#define bfd_mach_arm_8M_BASE 25
+#define bfd_mach_arm_8M_MAIN 26
bfd_arch_nds32, /* Andes NDS32. */
#define bfd_mach_n1 1
#define bfd_mach_n1h 2
diff --git a/bfd/cpu-arm.c b/bfd/cpu-arm.c
index c6682d4..4ef409b 100644
--- a/bfd/cpu-arm.c
+++ b/bfd/cpu-arm.c
@@ -129,20 +129,33 @@ scan (const struct bfd_arch_info *info, const char *string)
static const bfd_arch_info_type arch_info_struct[] =
{
- N (bfd_mach_arm_2, "armv2", FALSE, & arch_info_struct[1]),
- N (bfd_mach_arm_2a, "armv2a", FALSE, & arch_info_struct[2]),
- N (bfd_mach_arm_3, "armv3", FALSE, & arch_info_struct[3]),
- N (bfd_mach_arm_3M, "armv3m", FALSE, & arch_info_struct[4]),
- N (bfd_mach_arm_4, "armv4", FALSE, & arch_info_struct[5]),
- N (bfd_mach_arm_4T, "armv4t", FALSE, & arch_info_struct[6]),
- N (bfd_mach_arm_5, "armv5", FALSE, & arch_info_struct[7]),
- N (bfd_mach_arm_5T, "armv5t", FALSE, & arch_info_struct[8]),
- N (bfd_mach_arm_5TE, "armv5te", FALSE, & arch_info_struct[9]),
- N (bfd_mach_arm_XScale, "xscale", FALSE, & arch_info_struct[10]),
- N (bfd_mach_arm_ep9312, "ep9312", FALSE, & arch_info_struct[11]),
- N (bfd_mach_arm_iWMMXt, "iwmmxt", FALSE, & arch_info_struct[12]),
- N (bfd_mach_arm_iWMMXt2, "iwmmxt2", FALSE, & arch_info_struct[13]),
- N (bfd_mach_arm_unknown, "arm_any", FALSE, NULL)
+ N (bfd_mach_arm_2, "armv2", FALSE, & arch_info_struct[1]),
+ N (bfd_mach_arm_2a, "armv2a", FALSE, & arch_info_struct[2]),
+ N (bfd_mach_arm_3, "armv3", FALSE, & arch_info_struct[3]),
+ N (bfd_mach_arm_3M, "armv3m", FALSE, & arch_info_struct[4]),
+ N (bfd_mach_arm_4, "armv4", FALSE, & arch_info_struct[5]),
+ N (bfd_mach_arm_4T, "armv4t", FALSE, & arch_info_struct[6]),
+ N (bfd_mach_arm_5, "armv5", FALSE, & arch_info_struct[7]),
+ N (bfd_mach_arm_5T, "armv5t", FALSE, & arch_info_struct[8]),
+ N (bfd_mach_arm_5TE, "armv5te", FALSE, & arch_info_struct[9]),
+ N (bfd_mach_arm_XScale, "xscale", FALSE, & arch_info_struct[10]),
+ N (bfd_mach_arm_ep9312, "ep9312", FALSE, & arch_info_struct[11]),
+ N (bfd_mach_arm_iWMMXt, "iwmmxt", FALSE, & arch_info_struct[12]),
+ N (bfd_mach_arm_iWMMXt2, "iwmmxt2", FALSE, & arch_info_struct[13]),
+ N (bfd_mach_arm_5TEJ, "armv5tej", FALSE, & arch_info_struct[14]),
+ N (bfd_mach_arm_6, "armv6", FALSE, & arch_info_struct[15]),
+ N (bfd_mach_arm_6KZ, "armv6kz", FALSE, & arch_info_struct[16]),
+ N (bfd_mach_arm_6T2, "armv6t2", FALSE, & arch_info_struct[17]),
+ N (bfd_mach_arm_6K, "armv6k", FALSE, & arch_info_struct[18]),
+ N (bfd_mach_arm_7, "armv7", FALSE, & arch_info_struct[19]),
+ N (bfd_mach_arm_6M, "armv6-m", FALSE, & arch_info_struct[20]),
+ N (bfd_mach_arm_6SM, "armv6s-m", FALSE, & arch_info_struct[21]),
+ N (bfd_mach_arm_7EM, "armv7e-m", FALSE, & arch_info_struct[22]),
+ N (bfd_mach_arm_8, "armv8-a", FALSE, & arch_info_struct[23]),
+ N (bfd_mach_arm_8R, "armv8-r", FALSE, & arch_info_struct[24]),
+ N (bfd_mach_arm_8M_BASE, "armv8-m.base", FALSE, & arch_info_struct[25]),
+ N (bfd_mach_arm_8M_MAIN, "armv8-m.main", FALSE, & arch_info_struct[26]),
+ N (bfd_mach_arm_unknown, "arm_any", FALSE, NULL)
};
const bfd_arch_info_type bfd_arm_arch =
diff --git a/bfd/elf32-arm.c b/bfd/elf32-arm.c
index 870111b..b21901c 100644
--- a/bfd/elf32-arm.c
+++ b/bfd/elf32-arm.c
@@ -13642,6 +13642,7 @@ bfd_arm_get_mach_from_attributes (bfd * abfd)
switch (arch)
{
+ case TAG_CPU_ARCH_PRE_V4: return bfd_mach_arm_3M;
case TAG_CPU_ARCH_V4: return bfd_mach_arm_4;
case TAG_CPU_ARCH_V4T: return bfd_mach_arm_4T;
case TAG_CPU_ARCH_V5T: return bfd_mach_arm_5T;
@@ -13679,7 +13680,38 @@ bfd_arm_get_mach_from_attributes (bfd * abfd)
return bfd_mach_arm_5TE;
}
+ case TAG_CPU_ARCH_V5TEJ:
+ return bfd_mach_arm_5TEJ;
+ case TAG_CPU_ARCH_V6:
+ return bfd_mach_arm_6;
+ case TAG_CPU_ARCH_V6KZ:
+ return bfd_mach_arm_6KZ;
+ case TAG_CPU_ARCH_V6T2:
+ return bfd_mach_arm_6T2;
+ case TAG_CPU_ARCH_V6K:
+ return bfd_mach_arm_6K;
+ case TAG_CPU_ARCH_V7:
+ return bfd_mach_arm_7;
+ case TAG_CPU_ARCH_V6_M:
+ return bfd_mach_arm_6M;
+ case TAG_CPU_ARCH_V6S_M:
+ return bfd_mach_arm_6SM;
+ case TAG_CPU_ARCH_V7E_M:
+ return bfd_mach_arm_7EM;
+ case TAG_CPU_ARCH_V8:
+ return bfd_mach_arm_8;
+ case TAG_CPU_ARCH_V8R:
+ return bfd_mach_arm_8R;
+ case TAG_CPU_ARCH_V8M_BASE:
+ return bfd_mach_arm_8M_BASE;
+ case TAG_CPU_ARCH_V8M_MAIN:
+ return bfd_mach_arm_8M_MAIN;
+
default:
+ /* Force entry to be added for any new known Tag_CPU_arch value. */
+ BFD_ASSERT (arch > MAX_TAG_CPU_ARCH);
+
+ /* Unknown Tag_CPU_arch value. */
return bfd_mach_arm_unknown;
}
}
generated by cgit v1.1 at 2024-12-12 20:12:24 +0000