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-rw-r--r--bfd/ChangeLog7
-rw-r--r--bfd/elf32-arm.c22
2 files changed, 29 insertions, 0 deletions
diff --git a/bfd/ChangeLog b/bfd/ChangeLog
index ab4a46f..6d8c673 100644
--- a/bfd/ChangeLog
+++ b/bfd/ChangeLog
@@ -1,3 +1,10 @@
+2007-05-18 Paul Brook <paul@codesourcery.com>
+
+ * elf32-arm.c (ARM2THUMB_V5_STATIC_GLUE_SIZE): Define.
+ (a2t1v5_ldr_insn, a2t1v5_ldr_insn): New.
+ (record_arm_to_thumb_glue): Add v5t non-pic glue.
+ (elf32_arm_create_thumb_stub): Ditto.
+
2007-05-16 H.J. Lu <hongjiu.lu@intel.com>
Alan Modra <amodra@bigpond.net.au>
diff --git a/bfd/elf32-arm.c b/bfd/elf32-arm.c
index 8b5d31e..d36c923e 100644
--- a/bfd/elf32-arm.c
+++ b/bfd/elf32-arm.c
@@ -2582,6 +2582,13 @@ find_arm_glue (struct bfd_link_info *link_info,
__func_addr:
.word func @ behave as if you saw a ARM_32 reloc.
+ (v5t static images)
+ .arm
+ __func_from_arm:
+ ldr pc, __func_addr
+ __func_addr:
+ .word func @ behave as if you saw a ARM_32 reloc.
+
(relocatable images)
.arm
__func_from_arm:
@@ -2597,6 +2604,10 @@ static const insn32 a2t1_ldr_insn = 0xe59fc000;
static const insn32 a2t2_bx_r12_insn = 0xe12fff1c;
static const insn32 a2t3_func_addr_insn = 0x00000001;
+#define ARM2THUMB_V5_STATIC_GLUE_SIZE 8
+static const insn32 a2t1v5_ldr_insn = 0xe51ff004;
+static const insn32 a2t2v5_func_addr_insn = 0x00000001;
+
#define ARM2THUMB_PIC_GLUE_SIZE 16
static const insn32 a2t1p_ldr_insn = 0xe59fc004;
static const insn32 a2t2p_add_pc_insn = 0xe08cc00f;
@@ -2745,6 +2756,8 @@ record_arm_to_thumb_glue (struct bfd_link_info * link_info,
if (link_info->shared || globals->root.is_relocatable_executable
|| globals->pic_veneer)
size = ARM2THUMB_PIC_GLUE_SIZE;
+ else if (globals->use_blx)
+ size = ARM2THUMB_V5_STATIC_GLUE_SIZE;
else
size = ARM2THUMB_STATIC_GLUE_SIZE;
@@ -4187,6 +4200,15 @@ elf32_arm_create_thumb_stub (struct bfd_link_info * info,
bfd_put_32 (output_bfd, ret_offset,
s->contents + my_offset + 12);
}
+ else if (globals->use_blx)
+ {
+ put_arm_insn (globals, output_bfd, (bfd_vma) a2t1v5_ldr_insn,
+ s->contents + my_offset);
+
+ /* It's a thumb address. Add the low order bit. */
+ bfd_put_32 (output_bfd, val | a2t2v5_func_addr_insn,
+ s->contents + my_offset + 4);
+ }
else
{
put_arm_insn (globals, output_bfd, (bfd_vma) a2t1_ldr_insn,