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Diffstat (limited to 'bfd/cpu-ia64-opc.c')
-rw-r--r--bfd/cpu-ia64-opc.c6
1 files changed, 3 insertions, 3 deletions
diff --git a/bfd/cpu-ia64-opc.c b/bfd/cpu-ia64-opc.c
index d3e8f6f..8e670e6 100644
--- a/bfd/cpu-ia64-opc.c
+++ b/bfd/cpu-ia64-opc.c
@@ -86,7 +86,7 @@ ins_immu (const struct ia64_operand *self, ia64_insn value, ia64_insn *code)
for (i = 0; i < NELEMS (self->field) && self->field[i].bits; ++i)
{
new_insn |= ((value & ((((ia64_insn) 1) << self->field[i].bits) - 1))
- << self->field[i].shift);
+ << self->field[i].shift);
value >>= self->field[i].bits;
}
if (value)
@@ -170,7 +170,7 @@ ins_imms_scaled (const struct ia64_operand *self, ia64_insn value,
for (i = 0; i < NELEMS (self->field) && self->field[i].bits; ++i)
{
new_insn |= ((svalue & ((((ia64_insn) 1) << self->field[i].bits) - 1))
- << self->field[i].shift);
+ << self->field[i].shift);
sign_bit = (svalue >> (self->field[i].bits - 1)) & 1;
svalue >>= self->field[i].bits;
}
@@ -657,7 +657,7 @@ const struct ia64_operand elf64_ia64_operands[IA64_OPND_COUNT] =
"a branch target" },
{ REL, ins_imms4, ext_imms4, 0, {{20, 13}, { 1, 36}}, 0, /* TGT25c */
"a branch target" },
- { REL, ins_rsvd, ext_rsvd, 0, {{0, 0}}, 0, /* TGT64 */
+ { REL, ins_rsvd, ext_rsvd, 0, {{0, 0}}, 0, /* TGT64 */
"a branch target" },
{ ABS, ins_const, ext_const, 0, {{0, 0}}, 0, /* LDXMOV */