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-rw-r--r--gdb/ChangeLog5
-rw-r--r--gdb/arm-tdep.c28
2 files changed, 19 insertions, 14 deletions
diff --git a/gdb/ChangeLog b/gdb/ChangeLog
index b15b505..7c6ec96 100644
--- a/gdb/ChangeLog
+++ b/gdb/ChangeLog
@@ -1,5 +1,10 @@
2021-05-11 Simon Marchi <simon.marchi@polymtl.ca>
+ * arm-tdep.c (arm_record_data_proc_misc_ld_str): Fix
+ indentation.
+
+2021-05-11 Simon Marchi <simon.marchi@polymtl.ca>
+
* cli/cli-decode.h (struct cmd_list_element): Fix indentation.
2021-05-10 Lancelot Six <lsix@lancelotsix.com>
diff --git a/gdb/arm-tdep.c b/gdb/arm-tdep.c
index 056973f..c473843 100644
--- a/gdb/arm-tdep.c
+++ b/gdb/arm-tdep.c
@@ -10302,20 +10302,20 @@ arm_record_data_proc_misc_ld_str (insn_decode_record *arm_insn_r)
/* Handle multiply instructions. */
/* MLA, MUL, SMLAL, SMULL, UMLAL, UMULL. */
if (0 == arm_insn_r->opcode || 1 == arm_insn_r->opcode)
- {
- /* Handle MLA and MUL. */
- record_buf[0] = bits (arm_insn_r->arm_insn, 16, 19);
- record_buf[1] = ARM_PS_REGNUM;
- arm_insn_r->reg_rec_count = 2;
- }
- else if (4 <= arm_insn_r->opcode && 7 >= arm_insn_r->opcode)
- {
- /* Handle SMLAL, SMULL, UMLAL, UMULL. */
- record_buf[0] = bits (arm_insn_r->arm_insn, 16, 19);
- record_buf[1] = bits (arm_insn_r->arm_insn, 12, 15);
- record_buf[2] = ARM_PS_REGNUM;
- arm_insn_r->reg_rec_count = 3;
- }
+ {
+ /* Handle MLA and MUL. */
+ record_buf[0] = bits (arm_insn_r->arm_insn, 16, 19);
+ record_buf[1] = ARM_PS_REGNUM;
+ arm_insn_r->reg_rec_count = 2;
+ }
+ else if (4 <= arm_insn_r->opcode && 7 >= arm_insn_r->opcode)
+ {
+ /* Handle SMLAL, SMULL, UMLAL, UMULL. */
+ record_buf[0] = bits (arm_insn_r->arm_insn, 16, 19);
+ record_buf[1] = bits (arm_insn_r->arm_insn, 12, 15);
+ record_buf[2] = ARM_PS_REGNUM;
+ arm_insn_r->reg_rec_count = 3;
+ }
}
else if (9 == arm_insn_r->decode && opcode1 > 0x10)
{