diff options
| -rw-r--r-- | gdb/ChangeLog | 26 | ||||
| -rw-r--r-- | gdb/ia64-hpux-nat.c | 37 | ||||
| -rw-r--r-- | gdb/ia64-hpux-tdep.c | 277 | ||||
| -rw-r--r-- | gdb/ia64-tdep.c | 99 | ||||
| -rw-r--r-- | gdb/ia64-tdep.h | 36 | ||||
| -rw-r--r-- | gdb/target.h | 6 |
6 files changed, 464 insertions, 17 deletions
diff --git a/gdb/ChangeLog b/gdb/ChangeLog index 54a8d05..a23aab9 100644 --- a/gdb/ChangeLog +++ b/gdb/ChangeLog @@ -1,5 +1,31 @@ 2011-01-13 Joel Brobecker <brobecker@adacore.com> + * ia64-tdep.h (struct regcache): Forward declare. + (struct ia64_infcall_ops): New struct type. + (struct gdbarch_tdep): New fields "find_global_pointer_from_solib" + and "infcall_ops". + * ia64-tdep.c (ia64_find_global_pointer_from_dynamic_section): + Renames ia64_find_global_pointer. + (ia64_find_global_pointer, ia64_allocate_new_rse_frame) + (ia64_store_argument_in_slot, ia64_set_function_addr: New function. + (ia64_push_dummy_call): Adjust to use the new tdep ia64_infocall_ops + methods. + (ia64_infcall_ops): New static global constant. + (ia64_gdbarch_init): Set tdep->infcall_ops. + * ia64-hpux-nat.c (ia64_hpux_xfer_solib_got): New function. + (ia64_hpux_xfer_partial): Add TARGET_OBJECT_HPUX_SOLIB_GOT handing. + * ia64-hpux-tdep.c: Include "regcache.h", "gdbcore.h" and "inferior.h". + (ia64_hpux_dummy_code): New static global constant. + (ia64_hpux_push_dummy_code, ia64_hpux_allocate_new_rse_frame) + (ia64_hpux_store_argument_in_slot, ia64_hpux_set_function_addr) + (ia64_hpux_dummy_id, ia64_hpux_find_global_pointer_from_solib): + New function. + (ia64_hpux_infcall_ops): New static global constant. + (ia64_hpux_init_abi): Install gdbarch and tdep methods needed + for inferior function calls to work properly on ia64-hpux. + +2011-01-13 Joel Brobecker <brobecker@adacore.com> + * target.h (enum target_object): Add TARGET_OBJECT_HPUX_UREGS. * ia64-tdep.h (struct frame_info): forward declaration. (struct gdbarch_tdep): Add field size_of_register_frame. diff --git a/gdb/ia64-hpux-nat.c b/gdb/ia64-hpux-nat.c index fd58bba..32160aa 100644 --- a/gdb/ia64-hpux-nat.c +++ b/gdb/ia64-hpux-nat.c @@ -590,6 +590,40 @@ ia64_hpux_xfer_uregs (struct target_ops *ops, const char *annex, return len; } +/* Handle the transfer of TARGET_OBJECT_HPUX_SOLIB_GOT objects on ia64-hpux. + + The current implementation does not support write transfers (because + we do not currently do not need these transfers), and will raise + a failed assertion if WRITEBUF is not NULL. */ + +static LONGEST +ia64_hpux_xfer_solib_got (struct target_ops *ops, const char *annex, + gdb_byte *readbuf, const gdb_byte *writebuf, + ULONGEST offset, LONGEST len) +{ + CORE_ADDR fun_addr; + /* The linkage pointer. We use a uint64_t to make sure that the size + of the object we are returning is always 64 bits long, as explained + in the description of the TARGET_OBJECT_HPUX_SOLIB_GOT object. + This is probably paranoia, but we do not use a CORE_ADDR because + it could conceivably be larger than uint64_t. */ + uint64_t got; + + gdb_assert (writebuf == NULL); + + if (offset > sizeof (got)) + return 0; + + fun_addr = string_to_core_addr (annex); + got = ia64_hpux_get_solib_linkage_addr (fun_addr); + + if (len > sizeof (got) - offset) + len = sizeof (got) - offset; + memcpy (readbuf, &got + offset, len); + + return len; +} + /* The "to_xfer_partial" target_ops routine for ia64-hpux. */ static LONGEST @@ -603,6 +637,9 @@ ia64_hpux_xfer_partial (struct target_ops *ops, enum target_object object, val = ia64_hpux_xfer_memory (ops, annex, readbuf, writebuf, offset, len); else if (object == TARGET_OBJECT_HPUX_UREGS) val = ia64_hpux_xfer_uregs (ops, annex, readbuf, writebuf, offset, len); + else if (object == TARGET_OBJECT_HPUX_SOLIB_GOT) + val = ia64_hpux_xfer_solib_got (ops, annex, readbuf, writebuf, offset, + len); else val = super_xfer_partial (ops, object, annex, readbuf, writebuf, offset, len); diff --git a/gdb/ia64-hpux-tdep.c b/gdb/ia64-hpux-tdep.c index a4d2fa7..c03a00e 100644 --- a/gdb/ia64-hpux-tdep.c +++ b/gdb/ia64-hpux-tdep.c @@ -25,6 +25,133 @@ #include "solib.h" #include "target.h" #include "frame.h" +#include "regcache.h" +#include "gdbcore.h" +#include "inferior.h" + +/* A sequence of instructions pushed on the stack when we want to perform + an inferior function call. The main purpose of this code is to save + the output region of the register frame belonging to the function + from which we are making the call. Normally, all registers are saved + prior to the call, but this does not include stacked registers because + they are seen by GDB as pseudo registers. + + On Linux, these stacked registers can be saved by simply creating + a new register frame, or in other words by moving the BSP. But the + HP/UX kernel does not allow this. So we rely on this code instead, + that makes functions calls whose only purpose is to create new + register frames. + + The array below is the result obtained after assembling the code + shown below. It's an array of bytes in order to make it independent + of the host endianess, in case it ends up being used on more than + one target. + + start: + // Save b0 before using it (into preserved reg: r4). + mov r4 = b0 + ;; + + br.call.dptk.few b0 = stub# + ;; + + // Add a nop bundle where we can insert our dummy breakpoint. + nop.m 0 + nop.i 0 + nop.i 0 + ;; + + stub: + // Alloc a new register stack frame. Here, we set the size + // of all regions to zero. Eventually, GDB will manually + // change the instruction to set the size of the local region + // to match size of the output region of the function from + // which we are making the function call. This is to protect + // the value of the output registers of the function from + // which we are making the call. + alloc r6 = ar.pfs, 0, 0, 0, 0 + + // Save b0 before using it again (into preserved reg: r5). + mov r5 = b0 + ;; + + // Now that we have protected the entire output region of the + // register stack frame, we can call our function that will + // setup the arguments, and call our target function. + br.call.dptk.few b0 = call_dummy# + ;; + + // Restore b0, ar.pfs, and return + mov b0 = r5 + mov.i ar.pfs = r6 + ;; + br.ret.dptk.few b0 + ;; + + call_dummy: + // Alloc a new frame, with 2 local registers, and 8 output registers + // (8 output registers for the maximum of 8 slots passed by register). + alloc r32 = ar.pfs, 2, 0, 8, 0 + + // Save b0 before using it to call our target function. + mov r33 = b0 + + // Load the argument values placed by GDB inside r14-r21 in their + // proper registers. + or r34 = r14, r0 + or r35 = r15, r0 + or r36 = r16, r0 + or r37 = r17, r0 + or r38 = r18, r0 + or r39 = r19, r0 + or r40 = r20, r0 + or r41 = r21, r0 + ;; + + // actual call + br.call.dptk.few b0 = b1 + ;; + + mov.i ar.pfs=r32 + mov b0=r33 + ;; + + br.ret.dptk.few b0 + ;; + +*/ + +static const gdb_byte ia64_hpux_dummy_code[] = +{ + 0x02, 0x00, 0x00, 0x00, 0x01, 0x00, 0x40, 0x00, + 0x00, 0x62, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, + 0x1d, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, + 0x00, 0x02, 0x00, 0x00, 0x20, 0x00, 0x00, 0x52, + 0x01, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, + 0x00, 0x02, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, + 0x02, 0x30, 0x00, 0x00, 0x80, 0x05, 0x50, 0x00, + 0x00, 0x62, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, + 0x1d, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, + 0x00, 0x02, 0x00, 0x00, 0x30, 0x00, 0x00, 0x52, + 0x01, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x28, + 0x04, 0x80, 0x03, 0x00, 0x60, 0x00, 0xaa, 0x00, + 0x1d, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, + 0x00, 0x02, 0x00, 0x80, 0x00, 0x00, 0x84, 0x02, + 0x00, 0x00, 0x29, 0x04, 0x80, 0x05, 0x10, 0x02, + 0x00, 0x62, 0x00, 0x40, 0xe4, 0x00, 0x38, 0x80, + 0x00, 0x18, 0x3d, 0x00, 0x0e, 0x20, 0x40, 0x82, + 0x00, 0x1c, 0x40, 0xa0, 0x14, 0x01, 0x38, 0x80, + 0x00, 0x30, 0x49, 0x00, 0x0e, 0x20, 0x70, 0x9a, + 0x00, 0x1c, 0x40, 0x00, 0x45, 0x01, 0x38, 0x80, + 0x0a, 0x48, 0x55, 0x00, 0x0e, 0x20, 0x00, 0x00, + 0x00, 0x02, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, + 0x1d, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, + 0x00, 0x02, 0x00, 0x00, 0x10, 0x00, 0x80, 0x12, + 0x01, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, + 0x01, 0x55, 0x00, 0x00, 0x10, 0x0a, 0x00, 0x07, + 0x1d, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, + 0x00, 0x02, 0x00, 0x80, 0x00, 0x00, 0x84, 0x02 +}; /* The offset to be used in order to get the __reason pseudo-register when using one of the *UREGS ttrace requests (see system header file @@ -126,12 +253,154 @@ ia64_hpux_size_of_register_frame (struct frame_info *this_frame, return sof; } +/* Implement the push_dummy_code gdbarch method. + + This function assumes that the SP is already 16-byte-aligned. */ + +static CORE_ADDR +ia64_hpux_push_dummy_code (struct gdbarch *gdbarch, CORE_ADDR sp, + CORE_ADDR funaddr, struct value **args, int nargs, + struct type *value_type, CORE_ADDR *real_pc, + CORE_ADDR *bp_addr, struct regcache *regcache) +{ + ULONGEST cfm; + int sof, sol, sor, soo; + char buf[16]; + + regcache_cooked_read_unsigned (regcache, IA64_CFM_REGNUM, &cfm); + sof = cfm & 0x7f; + sol = (cfm >> 7) & 0x7f; + sor = (cfm >> 14) & 0xf; + soo = sof - sol - sor; + + /* Reserve some space on the stack to hold the dummy code. */ + sp = sp - sizeof (ia64_hpux_dummy_code); + + /* Set the breakpoint address at the first instruction of the bundle + in the dummy code that has only nops. This is where the dummy code + expects us to break. */ + *bp_addr = sp + 0x20; + + /* Start the inferior function call from the dummy code. The dummy + code will then call our function. */ + *real_pc = sp; + + /* Transfer the dummy code to the inferior. */ + write_memory (sp, ia64_hpux_dummy_code, sizeof (ia64_hpux_dummy_code)); + + /* Update the size of the local portion of the register frame allocated + by ``stub'' to match the size of the output region of the current + register frame. This allows us to save the stacked registers. + + The "alloc" instruction is located at slot 0 of the bundle at +0x30. + Update the "sof" and "sol" portion of that instruction which are + respectively at bits 18-24 and 25-31 of the bundle. */ + memcpy (buf, ia64_hpux_dummy_code + 0x30, sizeof (buf)); + + buf[2] |= ((soo & 0x3f) << 2); + buf[3] |= (soo << 1); + if (soo > 63) + buf[3] |= 1; + + write_memory (sp + 0x30, buf, sizeof (buf)); + + /* Return the new (already properly aligned) SP. */ + return sp; +} + +/* The "allocate_new_rse_frame" ia64_infcall_ops routine for ia64-hpux. */ + +static void +ia64_hpux_allocate_new_rse_frame (struct regcache *regcache, ULONGEST bsp, + int sof) +{ + /* We cannot change the value of the BSP register on HP-UX, + so we can't allocate a new RSE frame. */ +} + +/* The "store_argument_in_slot" ia64_infcall_ops routine for ia64-hpux. */ + +static void +ia64_hpux_store_argument_in_slot (struct regcache *regcache, CORE_ADDR bsp, + int slotnum, gdb_byte *buf) +{ + /* The call sequence on this target expects us to place the arguments + inside r14 - r21. */ + regcache_cooked_write (regcache, IA64_GR0_REGNUM + 14 + slotnum, buf); +} + +/* The "set_function_addr" ia64_infcall_ops routine for ia64-hpux. */ + +static void +ia64_hpux_set_function_addr (struct regcache *regcache, CORE_ADDR func_addr) +{ + /* The calling sequence calls the function whose address is placed + in register b1. */ + regcache_cooked_write_unsigned (regcache, IA64_BR1_REGNUM, func_addr); +} + +/* The ia64_infcall_ops structure for ia64-hpux. */ + +static const struct ia64_infcall_ops ia64_hpux_infcall_ops = +{ + ia64_hpux_allocate_new_rse_frame, + ia64_hpux_store_argument_in_slot, + ia64_hpux_set_function_addr +}; + +/* The "dummy_id" gdbarch routine for ia64-hpux. */ + +static struct frame_id +ia64_hpux_dummy_id (struct gdbarch *gdbarch, struct frame_info *this_frame) +{ + CORE_ADDR sp, pc, bp_addr, bsp; + + sp = get_frame_register_unsigned (this_frame, IA64_GR12_REGNUM); + + /* Just double-check that the frame PC is within a certain region + of the stack that would be plausible for our dummy code (the dummy + code was pushed at SP + 16). If not, then return a null frame ID. + This is necessary in our case, because it is possible to produce + the same frame ID for a normal frame, if that frame corresponds + to the function called by our dummy code, and the function has not + modified the registers that we use to build the dummy frame ID. */ + pc = get_frame_pc (this_frame); + if (pc < sp + 16 || pc >= sp + 16 + sizeof (ia64_hpux_dummy_code)) + return null_frame_id; + + /* The call sequence is such that the address of the dummy breakpoint + we inserted is stored in r5. */ + bp_addr = get_frame_register_unsigned (this_frame, IA64_GR5_REGNUM); + + bsp = get_frame_register_unsigned (this_frame, IA64_BSP_REGNUM); + + return frame_id_build_special (sp, bp_addr, bsp); +} + /* Should be set to non-NULL if the ia64-hpux solib module is linked in. This may not be the case because the shared library support code can only be compiled on ia64-hpux. */ struct target_so_ops *ia64_hpux_so_ops = NULL; +/* The "find_global_pointer_from_solib" gdbarch_tdep routine for + ia64-hpux. */ + +static CORE_ADDR +ia64_hpux_find_global_pointer_from_solib (struct gdbarch *gdbarch, + CORE_ADDR faddr) +{ + enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); + struct target_ops *ops = ¤t_target; + gdb_byte buf[8]; + LONGEST len; + + len = target_read (ops, TARGET_OBJECT_HPUX_SOLIB_GOT, + paddress (gdbarch, faddr), buf, 0, sizeof (buf)); + + return extract_unsigned_integer (buf, len, byte_order); +} + static void ia64_hpux_init_abi (struct gdbarch_info info, struct gdbarch *gdbarch) { @@ -142,6 +411,14 @@ ia64_hpux_init_abi (struct gdbarch_info info, struct gdbarch *gdbarch) set_gdbarch_long_double_format (gdbarch, floatformats_ia64_quad); set_gdbarch_cannot_store_register (gdbarch, ia64_hpux_cannot_store_register); + /* Inferior functions must be called from stack. */ + set_gdbarch_call_dummy_location (gdbarch, ON_STACK); + set_gdbarch_push_dummy_code (gdbarch, ia64_hpux_push_dummy_code); + tdep->infcall_ops = ia64_hpux_infcall_ops; + tdep->find_global_pointer_from_solib + = ia64_hpux_find_global_pointer_from_solib; + set_gdbarch_dummy_id (gdbarch, ia64_hpux_dummy_id); + if (ia64_hpux_so_ops) set_solib_ops (gdbarch, ia64_hpux_so_ops); } diff --git a/gdb/ia64-tdep.c b/gdb/ia64-tdep.c index 2529897..ea6918c 100644 --- a/gdb/ia64-tdep.c +++ b/gdb/ia64-tdep.c @@ -3420,7 +3420,8 @@ slot_alignment_is_next_even (struct type *t) d_un.d_ptr value is the global pointer. */ static CORE_ADDR -ia64_find_global_pointer (struct gdbarch *gdbarch, CORE_ADDR faddr) +ia64_find_global_pointer_from_dynamic_section (struct gdbarch *gdbarch, + CORE_ADDR faddr) { enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); struct obj_section *faddr_sect; @@ -3478,6 +3479,24 @@ ia64_find_global_pointer (struct gdbarch *gdbarch, CORE_ADDR faddr) return 0; } +/* Attempt to find (and return) the global pointer for the given + function. We first try the find_global_pointer_from_solib routine + from the gdbarch tdep vector, if provided. And if that does not + work, then we try ia64_find_global_pointer_from_dynamic_section. */ + +static CORE_ADDR +ia64_find_global_pointer (struct gdbarch *gdbarch, CORE_ADDR faddr) +{ + struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); + CORE_ADDR addr = 0; + + if (tdep->find_global_pointer_from_solib) + addr = tdep->find_global_pointer_from_solib (gdbarch, faddr); + if (addr == 0) + addr = ia64_find_global_pointer_from_dynamic_section (gdbarch, faddr); + return addr; +} + /* Given a function's address, attempt to find (and return) the corresponding (canonical) function descriptor. Return 0 if not found. */ @@ -3617,12 +3636,53 @@ ia64_frame_align (struct gdbarch *gdbarch, CORE_ADDR sp) return sp & ~0xfLL; } +/* The default "allocate_new_rse_frame" ia64_infcall_ops routine for ia64. */ + +static void +ia64_allocate_new_rse_frame (struct regcache *regcache, ULONGEST bsp, int sof) +{ + ULONGEST cfm, pfs, new_bsp; + + regcache_cooked_read_unsigned (regcache, IA64_CFM_REGNUM, &cfm); + + new_bsp = rse_address_add (bsp, sof); + regcache_cooked_write_unsigned (regcache, IA64_BSP_REGNUM, new_bsp); + + regcache_cooked_read_unsigned (regcache, IA64_PFS_REGNUM, &pfs); + pfs &= 0xc000000000000000LL; + pfs |= (cfm & 0xffffffffffffLL); + regcache_cooked_write_unsigned (regcache, IA64_PFS_REGNUM, pfs); + + cfm &= 0xc000000000000000LL; + cfm |= sof; + regcache_cooked_write_unsigned (regcache, IA64_CFM_REGNUM, cfm); +} + +/* The default "store_argument_in_slot" ia64_infcall_ops routine for + ia64. */ + +static void +ia64_store_argument_in_slot (struct regcache *regcache, CORE_ADDR bsp, + int slotnum, gdb_byte *buf) +{ + write_memory (rse_address_add (bsp, slotnum), buf, 8); +} + +/* The default "set_function_addr" ia64_infcall_ops routine for ia64. */ + +static void +ia64_set_function_addr (struct regcache *regcache, CORE_ADDR func_addr) +{ + /* Nothing needed. */ +} + static CORE_ADDR ia64_push_dummy_call (struct gdbarch *gdbarch, struct value *function, struct regcache *regcache, CORE_ADDR bp_addr, int nargs, struct value **args, CORE_ADDR sp, int struct_return, CORE_ADDR struct_addr) { + struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); int argno; struct value *arg; @@ -3630,7 +3690,7 @@ ia64_push_dummy_call (struct gdbarch *gdbarch, struct value *function, int len, argoffset; int nslots, rseslots, memslots, slotnum, nfuncargs; int floatreg; - ULONGEST bsp, cfm, pfs, new_bsp; + ULONGEST bsp; CORE_ADDR funcdescaddr, pc, global_pointer; CORE_ADDR func_addr = find_function_addr (function, NULL); @@ -3657,20 +3717,8 @@ ia64_push_dummy_call (struct gdbarch *gdbarch, struct value *function, memslots = nslots - rseslots; /* Allocate a new RSE frame. */ - regcache_cooked_read_unsigned (regcache, IA64_CFM_REGNUM, &cfm); - regcache_cooked_read_unsigned (regcache, IA64_BSP_REGNUM, &bsp); - new_bsp = rse_address_add (bsp, rseslots); - regcache_cooked_write_unsigned (regcache, IA64_BSP_REGNUM, new_bsp); - - regcache_cooked_read_unsigned (regcache, IA64_PFS_REGNUM, &pfs); - pfs &= 0xc000000000000000LL; - pfs |= (cfm & 0xffffffffffffLL); - regcache_cooked_write_unsigned (regcache, IA64_PFS_REGNUM, pfs); - - cfm &= 0xc000000000000000LL; - cfm |= rseslots; - regcache_cooked_write_unsigned (regcache, IA64_CFM_REGNUM, cfm); + tdep->infcall_ops.allocate_new_rse_frame (regcache, bsp, rseslots); /* We will attempt to find function descriptors in the .opd segment, but if we can't we'll construct them ourselves. That being the @@ -3710,7 +3758,8 @@ ia64_push_dummy_call (struct gdbarch *gdbarch, struct value *function, find_func_descr (regcache, faddr, &funcdescaddr)); if (slotnum < rseslots) - write_memory (rse_address_add (bsp, slotnum), val_buf, 8); + tdep->infcall_ops.store_argument_in_slot (regcache, bsp, + slotnum, val_buf); else write_memory (sp + 16 + 8 * (slotnum - rseslots), val_buf, 8); slotnum++; @@ -3755,7 +3804,8 @@ ia64_push_dummy_call (struct gdbarch *gdbarch, struct value *function, } if (slotnum < rseslots) - write_memory (rse_address_add (bsp, slotnum), val_buf, 8); + tdep->infcall_ops.store_argument_in_slot (regcache, bsp, + slotnum, val_buf); else write_memory (sp + 16 + 8 * (slotnum - rseslots), val_buf, 8); @@ -3796,13 +3846,27 @@ ia64_push_dummy_call (struct gdbarch *gdbarch, struct value *function, if (global_pointer != 0) regcache_cooked_write_unsigned (regcache, IA64_GR1_REGNUM, global_pointer); + /* The following is not necessary on HP-UX, because we're using + a dummy code sequence pushed on the stack to make the call, and + this sequence doesn't need b0 to be set in order for our dummy + breakpoint to be hit. Nonetheless, this doesn't interfere, and + it's needed for other OSes, so we do this unconditionaly. */ regcache_cooked_write_unsigned (regcache, IA64_BR0_REGNUM, bp_addr); regcache_cooked_write_unsigned (regcache, sp_regnum, sp); + tdep->infcall_ops.set_function_addr (regcache, func_addr); + return sp; } +static const struct ia64_infcall_ops ia64_infcall_ops = +{ + ia64_allocate_new_rse_frame, + ia64_store_argument_in_slot, + ia64_set_function_addr +}; + static struct frame_id ia64_dummy_id (struct gdbarch *gdbarch, struct frame_info *this_frame) { @@ -3922,6 +3986,7 @@ ia64_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches) /* Settings for calling functions in the inferior. */ set_gdbarch_push_dummy_call (gdbarch, ia64_push_dummy_call); + tdep->infcall_ops = ia64_infcall_ops; set_gdbarch_frame_align (gdbarch, ia64_frame_align); set_gdbarch_dummy_id (gdbarch, ia64_dummy_id); diff --git a/gdb/ia64-tdep.h b/gdb/ia64-tdep.h index 384cb14..df0b4bb 100644 --- a/gdb/ia64-tdep.h +++ b/gdb/ia64-tdep.h @@ -196,6 +196,32 @@ #define IA64_NAT127_REGNUM (IA64_NAT0_REGNUM + 127) struct frame_info; +struct regcache; + +/* A struction containing pointers to all the target-dependent operations + performed to setup an inferior function call. */ + +struct ia64_infcall_ops +{ + /* Allocate a new register stack frame starting after the output + region of the current frame. The new frame will contain SOF + registers, all in the output region. This is one way of protecting + the stacked registers of the current frame. + + Should do nothing if this operation is not permitted by the OS. */ + void (*allocate_new_rse_frame) (struct regcache *regcache, ULONGEST bsp, + int sof); + + /* Store the argument stored in BUF into the appropriate location + given the BSP and the SLOTNUM. */ + void (*store_argument_in_slot) (struct regcache *regcache, CORE_ADDR bsp, + int slotnum, gdb_byte *buf); + + /* For targets where we cannot call the function directly, store + the address of the function we want to call at the location + expected by the calling sequence. */ + void (*set_function_addr) (struct regcache *regcache, CORE_ADDR func_addr); +}; struct gdbarch_tdep { @@ -209,8 +235,18 @@ struct gdbarch_tdep extracting the lowest 7 bits ("cfm & 0x7f"). */ int (*size_of_register_frame) (struct frame_info *this_frame, ULONGEST cfm); + /* Determine the function address FADDR belongs to a shared library. + If it does, then return the associated global pointer. If no shared + library was found to contain that function, then return zero. + + This pointer may be NULL. */ + CORE_ADDR (*find_global_pointer_from_solib) (struct gdbarch *gdbarch, + CORE_ADDR faddr); + /* ISA-specific data types. */ struct type *ia64_ext_type; + + struct ia64_infcall_ops infcall_ops; }; extern void ia64_write_pc (struct regcache *, CORE_ADDR); diff --git a/gdb/target.h b/gdb/target.h index 4b2e6a8..15a6680 100644 --- a/gdb/target.h +++ b/gdb/target.h @@ -269,6 +269,12 @@ enum target_object /* The HP-UX registers (those that can be obtained or modified by using the TT_LWP_RUREGS/TT_LWP_WUREGS ttrace requests). */ TARGET_OBJECT_HPUX_UREGS, + /* The HP-UX shared library linkage pointer. ANNEX should be a string + image of the code address whose linkage pointer we are looking for. + + The size of the data transfered is always 8 bytes (the size of an + address on ia64). */ + TARGET_OBJECT_HPUX_SOLIB_GOT, /* Possible future objects: TARGET_OBJECT_FILE, ... */ }; |