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-rw-r--r--sim/mcore/interp.c2
-rw-r--r--sim/testsuite/mcore/rotli.s31
2 files changed, 32 insertions, 1 deletions
diff --git a/sim/mcore/interp.c b/sim/mcore/interp.c
index 8bfb745..94e0a16 100644
--- a/sim/mcore/interp.c
+++ b/sim/mcore/interp.c
@@ -1015,7 +1015,7 @@ step_once (SIM_DESC sd, SIM_CPU *cpu)
case 0x38: case 0x39: /* xsr, rotli */
{
unsigned imm = IMM5;
- unsigned long tmp = gr[RD];
+ uint32_t tmp = gr[RD];
if (imm == 0)
{
int32_t cbit;
diff --git a/sim/testsuite/mcore/rotli.s b/sim/testsuite/mcore/rotli.s
new file mode 100644
index 0000000..fd9a899
--- /dev/null
+++ b/sim/testsuite/mcore/rotli.s
@@ -0,0 +1,31 @@
+# check that lsri works correctly
+# mach: mcore
+
+.include "testutils.inc"
+
+ start
+ # Construct -1
+ bmaski r2, 32
+
+ # Clear a couple bits
+ bclri r2, 0
+ bclri r2, 1
+
+ # rotate by 16
+ rotli r2, 16
+
+ # Construct 0xfffcffff
+ bmaski r1, 32
+ bclri r1, 16
+ bclri r1, 17
+
+ # Compare them, they should be equal
+ cmpne r2,r1
+ jbt .L1
+ pass
+.L1:
+ fail
+
+
+
+