diff options
| -rw-r--r-- | gas/ChangeLog | 6 | ||||
| -rw-r--r-- | gas/config/tc-i386.c | 17 |
2 files changed, 12 insertions, 11 deletions
diff --git a/gas/ChangeLog b/gas/ChangeLog index e8a501a..2ba5111 100644 --- a/gas/ChangeLog +++ b/gas/ChangeLog @@ -1,5 +1,11 @@ 2021-03-23 Jan Beulich <jbeulich@suse.com> + * config/tc-i386.c (load_insn_p): Use PREFIX_NONE. Fold two + if()-s. + (match_template, output_insn): Use PREFIX_NONE. + +2021-03-23 Jan Beulich <jbeulich@suse.com> + * config/tc-i386.c (i386_index_check): New local variable t. Correct MPX insn check. * config/tc-i386-intel.c (i386_intel_simplify_register): Correct diff --git a/gas/config/tc-i386.c b/gas/config/tc-i386.c index ee4d2bc..b1c7b50 100644 --- a/gas/config/tc-i386.c +++ b/gas/config/tc-i386.c @@ -4446,10 +4446,11 @@ load_insn_p (void) && i.tm.extension_opcode != 6) return 1; - /* cmpxchg8b, cmpxchg16b, xrstors. */ + /* cmpxchg8b, cmpxchg16b, xrstors, vmptrld. */ if (i.tm.base_opcode == 0xfc7 - && i.tm.opcode_modifier.opcodeprefix == 0 - && (i.tm.extension_opcode == 1 || i.tm.extension_opcode == 3)) + && i.tm.opcode_modifier.opcodeprefix == PREFIX_NONE + && (i.tm.extension_opcode == 1 || i.tm.extension_opcode == 3 + || i.tm.extension_opcode == 6)) return 1; /* fxrstor, ldmxcsr, xrstor. */ @@ -4466,12 +4467,6 @@ load_insn_p (void) || i.tm.extension_opcode == 6)) return 1; - /* vmptrld */ - if (i.tm.base_opcode == 0xfc7 - && i.tm.opcode_modifier.opcodeprefix == 0 - && i.tm.extension_opcode == 6) - return 1; - /* Check for x87 instructions. */ if (i.tm.base_opcode >= 0xd8 && i.tm.base_opcode <= 0xdf) { @@ -6337,7 +6332,7 @@ match_template (char mnem_suffix) if (((i.suffix == QWORD_MNEM_SUFFIX && flag_code != CODE_64BIT && !(t->base_opcode == 0xfc7 - && i.tm.opcode_modifier.opcodeprefix == 0 + && i.tm.opcode_modifier.opcodeprefix == PREFIX_NONE && t->extension_opcode == 1) /* cmpxchg8b */) || (i.suffix == LONG_MNEM_SUFFIX && !cpu_arch_flags.bitfield.cpui386)) @@ -9259,7 +9254,7 @@ output_insn (void) || i.tm.cpu_flags.bitfield.cpucmov || i.tm.cpu_flags.bitfield.cpusyscall || (i.tm.base_opcode == 0xfc7 - && i.tm.opcode_modifier.opcodeprefix == 0 + && i.tm.opcode_modifier.opcodeprefix == PREFIX_NONE && i.tm.extension_opcode == 1) /* cmpxchg8b */) x86_isa_1_used |= GNU_PROPERTY_X86_ISA_1_BASELINE; if (i.tm.cpu_flags.bitfield.cpusse3 |