diff options
| -rw-r--r-- | gas/ChangeLog | 6 | ||||
| -rw-r--r-- | gas/testsuite/gas/sparc/ldtxa.d | 33 | ||||
| -rw-r--r-- | gas/testsuite/gas/sparc/ldtxa.s | 26 | ||||
| -rw-r--r-- | gas/testsuite/gas/sparc/sparc.exp | 1 | ||||
| -rw-r--r-- | opcodes/ChangeLog | 8 | ||||
| -rw-r--r-- | opcodes/sparc-opc.c | 34 |
6 files changed, 108 insertions, 0 deletions
diff --git a/gas/ChangeLog b/gas/ChangeLog index da04199..991bb8d 100644 --- a/gas/ChangeLog +++ b/gas/ChangeLog @@ -1,3 +1,9 @@ +2016-07-12 Jose E. Marchesi <jose.marchesi@oracle.com> + + * testsuite/gas/sparc/ldtxa.s: New file. + * testsuite/gas/sparc/ldtxa.d: Likewise. + * testsuite/gas/sparc/sparc.exp: Execute the ldtxa test. + 2016-07-11 Claudiu Zissulescu <claziss@synopsys.com> * config/tc-arc.c (arc_reloc_op_tag): Allow complex ops for dtpoff. diff --git a/gas/testsuite/gas/sparc/ldtxa.d b/gas/testsuite/gas/sparc/ldtxa.d new file mode 100644 index 0000000..5aba1e7 --- /dev/null +++ b/gas/testsuite/gas/sparc/ldtxa.d @@ -0,0 +1,33 @@ +#as: -Av9c +#objdump: -dr +#name: sparc LDTXA + +.*: +file format .*sparc.* + +Disassembly of section .text: + +0+ <.text>: + 0: d4 98 c4 40 ldtxa \[ %g3 \] #ASI_TWINX_AIUP, %o2 + 4: d4 98 c4 42 ldtxa \[ %g3 \+ %g2 \] #ASI_TWINX_AIUP, %o2 + 8: d4 98 c4 60 ldtxa \[ %g3 \] #ASI_BLK_INIT_QUAD_LDD_AIUS, %o2 + c: d4 98 c4 62 ldtxa \[ %g3 \+ %g2 \] #ASI_BLK_INIT_QUAD_LDD_AIUS, %o2 + 10: d4 98 c4 c0 ldtxa \[ %g3 \] #ASI_QUAD_LDD_PHYS_4V, %o2 + 14: d4 98 c4 c2 ldtxa \[ %g3 \+ %g2 \] #ASI_QUAD_LDD_PHYS_4V, %o2 + 18: d4 98 c4 e0 ldtxa \[ %g3 \] #ASI_TWINX_N, %o2 + 1c: d4 98 c4 e2 ldtxa \[ %g3 \+ %g2 \] #ASI_TWINX_N, %o2 + 20: d4 98 c5 40 ldtxa \[ %g3 \] #ASI_TWINX_AIUP_L, %o2 + 24: d4 98 c5 42 ldtxa \[ %g3 \+ %g2 \] #ASI_TWINX_AIUP_L, %o2 + 28: d4 98 c5 60 ldtxa \[ %g3 \] #ASI_TWINX_AIUS_L, %o2 + 2c: d4 98 c5 62 ldtxa \[ %g3 \+ %g2 \] #ASI_TWINX_AIUS_L, %o2 + 30: d4 98 c5 c0 ldtxa \[ %g3 \] #ASI_TWINX_REAL_L, %o2 + 34: d4 98 c5 c2 ldtxa \[ %g3 \+ %g2 \] #ASI_TWINX_REAL_L, %o2 + 38: d4 98 c5 e0 ldtxa \[ %g3 \] #ASI_TWINX_NL, %o2 + 3c: d4 98 c5 e2 ldtxa \[ %g3 \+ %g2 \] #ASI_TWINX_NL, %o2 + 40: d4 98 dc 40 ldtxa \[ %g3 \] #ASI_BLK_INIT_QUAD_LDD_P, %o2 + 44: d4 98 dc 42 ldtxa \[ %g3 \+ %g2 \] #ASI_BLK_INIT_QUAD_LDD_P, %o2 + 48: d4 98 dc 60 ldtxa \[ %g3 \] #ASI_TWINX_S, %o2 + 4c: d4 98 dc 62 ldtxa \[ %g3 \+ %g2 \] #ASI_TWINX_S, %o2 + 50: d4 98 dd 40 ldtxa \[ %g3 \] #ASI_TWINX_PL, %o2 + 54: d4 98 dd 42 ldtxa \[ %g3 \+ %g2 \] #ASI_TWINX_PL, %o2 + 58: d4 98 dd 60 ldtxa \[ %g3 \] #ASI_TWINX_SL, %o2 + 5c: d4 98 dd 62 ldtxa \[ %g3 \+ %g2 \] #ASI_TWINX_SL, %o2
\ No newline at end of file diff --git a/gas/testsuite/gas/sparc/ldtxa.s b/gas/testsuite/gas/sparc/ldtxa.s new file mode 100644 index 0000000..10072dd --- /dev/null +++ b/gas/testsuite/gas/sparc/ldtxa.s @@ -0,0 +1,26 @@ +# Test ldtxa + .text + ldtxa [%g3] #ASI_TWINX_AIUP, %o2 + ldtxa [%g3+%g2] #ASI_TWINX_AIUP, %o2 + ldtxa [%g3] #ASI_TWINX_AIUS, %o2 + ldtxa [%g3+%g2] #ASI_TWINX_AIUS, %o2 + ldtxa [%g3] #ASI_TWINX_REAL, %o2 + ldtxa [%g3+%g2] #ASI_TWINX_REAL, %o2 + ldtxa [%g3] #ASI_TWINX_N, %o2 + ldtxa [%g3+%g2] #ASI_TWINX_N, %o2 + ldtxa [%g3] #ASI_TWINX_AIUP_L, %o2 + ldtxa [%g3+%g2] #ASI_TWINX_AIUP_L, %o2 + ldtxa [%g3] #ASI_TWINX_AIUS_L, %o2 + ldtxa [%g3+%g2] #ASI_TWINX_AIUS_L, %o2 + ldtxa [%g3] #ASI_TWINX_REAL_L, %o2 + ldtxa [%g3+%g2] #ASI_TWINX_REAL_L, %o2 + ldtxa [%g3] #ASI_TWINX_NL, %o2 + ldtxa [%g3+%g2] #ASI_TWINX_NL, %o2 + ldtxa [%g3] #ASI_TWINX_P, %o2 + ldtxa [%g3+%g2] #ASI_TWINX_P, %o2 + ldtxa [%g3] #ASI_TWINX_S, %o2 + ldtxa [%g3+%g2] #ASI_TWINX_S, %o2 + ldtxa [%g3] #ASI_TWINX_PL, %o2 + ldtxa [%g3+%g2] #ASI_TWINX_PL, %o2 + ldtxa [%g3] #ASI_TWINX_SL, %o2 + ldtxa [%g3+%g2] #ASI_TWINX_SL, %o2 diff --git a/gas/testsuite/gas/sparc/sparc.exp b/gas/testsuite/gas/sparc/sparc.exp index 0a6a494..f0a129d 100644 --- a/gas/testsuite/gas/sparc/sparc.exp +++ b/gas/testsuite/gas/sparc/sparc.exp @@ -86,6 +86,7 @@ if [istarget sparc*-*-*] { run_dump_test "pause" run_dump_test "cfr" run_dump_test "ldtw_sttw" + run_dump_test "ldtxa" run_dump_test "ldd_std" run_dump_test "ldx_stx" run_dump_test "ldx_efsr" diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog index 56f33b5..091d8d4 100644 --- a/opcodes/ChangeLog +++ b/opcodes/ChangeLog @@ -1,3 +1,11 @@ +2016-07-12 Jose E. Marchesi <jose.marchesi@oracle.com> + + * sparc-opc.c (ldtxa): New macro. + (sparc_opcodes): Use the macro defined above to add entries for + the LDTXA instructions. + (asi_table): Add the ASI_TWINX_* asis used in the LDTXA + instruction. + 2016-07-07 James Bowman <james.bowman@ftdichip.com> * ft32-opc.c (ft32_opc_info): Correct mask for "callc" diff --git a/opcodes/sparc-opc.c b/opcodes/sparc-opc.c index ec44fb0..9d68223 100644 --- a/opcodes/sparc-opc.c +++ b/opcodes/sparc-opc.c @@ -370,6 +370,28 @@ const struct sparc_opcode sparc_opcodes[] = { { "lda", F3(3, 0x30, 1), F3(~3, ~0x30, ~1)|RS1_G0, "[i]o,g", 0, 0, 0, v9 }, { "lda", F3(3, 0x30, 1), F3(~3, ~0x30, ~1)|SIMM13(~0), "[1]o,g", 0, 0, 0, v9 }, /* ld [rs1+0],d */ +/* Note that the LDTXA instructions share an opcode with the + (deprecated) LDTWA instructions below. They are differenciated by + the combination of the `i' instruction field and the ASI used in + the instruction. */ + +#define ldtxa(asi) \ +{ "ldtxa", F3(3, 0x13, 0)|ASI((asi)), F3(~3, ~0x13, ~0)|ASI(~(asi)), "[1+2]A,d", 0, HWCAP_ASI_BLK_INIT, 0, v9c }, \ +{ "ldtxa", F3(3, 0x13, 0)|ASI((asi)), F3(~3, ~0x13, ~0)|ASI(~(asi))|RS2_G0, "[1]A,d", 0, HWCAP_ASI_BLK_INIT, 0, v9c } + +ldtxa (0x22), /* #ASI_TWINX_AIUP */ +ldtxa (0x23), /* #ASI_TWINX_AIUS */ +ldtxa (0x26), /* #ASI_TWINX_REAL */ +ldtxa (0x27), /* #ASI_TWINX_N */ +ldtxa (0x2A), /* #ASI_TWINX_AIUP_L */ +ldtxa (0x2B), /* #ASI_TWINX_AIUS_L */ +ldtxa (0x2E), /* #ASI_TWINX_REAL_L */ +ldtxa (0x2F), /* #ASI_TWINX_NL */ +ldtxa (0xE2), /* #ASI_TWINX_P */ +ldtxa (0xE3), /* #ASI_TWINX_S */ +ldtxa (0xEA), /* #ASI_TWINX_PL */ +ldtxa (0xEB), /* #ASI_TWINX_SL */ + { "ldtwa", F3(3, 0x13, 0), F3(~3, ~0x13, ~0), "[1+2]A,d", 0, 0, 0, v9 }, { "ldtwa", F3(3, 0x13, 0), F3(~3, ~0x13, ~0)|RS2_G0, "[1]A,d", 0, 0, 0, v9 }, /* ldda [rs1+%g0],d */ { "ldtwa", F3(3, 0x13, 1), F3(~3, ~0x13, ~1), "[1+i]o,d", 0, 0, 0, v9 }, @@ -2421,6 +2443,18 @@ static arg asi_table[] = { 0xf1, "#ASI_BLK_S", }, { 0xf8, "#ASI_BLK_PL", }, { 0xf9, "#ASI_BLK_SL", }, + { 0x22, "#ASI_TWINX_AIUP", }, + { 0x23, "#ASI_TWINX_AIUS", }, + { 0x26, "#ASI_TWINX_REAL", }, + { 0x27, "#ASI_TWINX_N", }, + { 0x2A, "#ASI_TWINX_AIUP_L", }, + { 0x2B, "#ASI_TWINX_AIUS_L", }, + { 0x2E, "#ASI_TWINX_REAL_L", }, + { 0x2F, "#ASI_TWINX_NL", }, + { 0xE2, "#ASI_TWINX_P", }, + { 0xE3, "#ASI_TWINX_S", }, + { 0xEA, "#ASI_TWINX_PL", }, + { 0xEB, "#ASI_TWINX_SL", }, { 0, 0 } }; |