diff options
| -rw-r--r-- | opcodes/ChangeLog | 5 | ||||
| -rw-r--r-- | opcodes/v850-opc.c | 18 |
2 files changed, 18 insertions, 5 deletions
diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog index d12f127..496b0f6 100644 --- a/opcodes/ChangeLog +++ b/opcodes/ChangeLog @@ -1,3 +1,8 @@ +Tue Sep 16 09:48:50 1997 Nick Clifton <nickc@cygnus.com> + + * v850-opc.c (v850_opcodes): Fields reordered to allow assembler + parser to work. + Tue Sep 16 10:01:00 1997 Gavin Koch <gavin@cygnus.com> * mips-opc.c: Added tx39 insns sdbbp, rfe, and deret. diff --git a/opcodes/v850-opc.c b/opcodes/v850-opc.c index 36f2243..a0c2f9c 100644 --- a/opcodes/v850-opc.c +++ b/opcodes/v850-opc.c @@ -548,16 +548,24 @@ const struct v850_opcode v850_opcodes[] = /* load/store instructions */ /* start-sanitize-v850eq */ { "sld.bu", one (0x0300), one (0x0780), {D7, EP, R2_NOTR0}, 1, PROCESSOR_V850EQ }, -{ "sld.hu", one (0x0400), one (0x0780), {D8_7, EP, R2_NOTR0}, 1, PROCESSOR_V850EQ }, -{ "sld.b", one (0x0060), one (0x07f0), {D4, EP, R2}, 1, PROCESSOR_V850EQ }, -{ "sld.h", one (0x0070), one (0x07f0), {D5_4, EP, R2}, 1, PROCESSOR_V850EQ }, /* end-sanitize-v850eq */ -{ "sld.b", one (0x0300), one (0x0780), {D7, EP, R2}, 1, PROCESSOR_ALL }, -{ "sld.h", one (0x0400), one (0x0780), {D8_7, EP, R2}, 1, PROCESSOR_ALL }, /* start-sanitize-v850e */ { "sld.bu", one (0x0060), one (0x07f0), {D4, EP, R2_NOTR0}, 1, PROCESSOR_V850E }, +/* end-sanitize-v850e */ +/* start-sanitize-v850eq */ +{ "sld.hu", one (0x0400), one (0x0780), {D8_7, EP, R2_NOTR0}, 1, PROCESSOR_V850EQ }, +/* end-sanitize-v850eq */ +/* start-sanitize-v850e */ { "sld.hu", one (0x0070), one (0x07f0), {D5_4, EP, R2_NOTR0}, 1, PROCESSOR_V850E }, /* end-sanitize-v850e */ +/* start-sanitize-v850eq */ +{ "sld.b", one (0x0060), one (0x07f0), {D4, EP, R2}, 1, PROCESSOR_V850EQ }, +/* end-sanitize-v850eq */ +{ "sld.b", one (0x0300), one (0x0780), {D7, EP, R2}, 1, PROCESSOR_ALL }, +/* start-sanitize-v850eq */ +{ "sld.h", one (0x0070), one (0x07f0), {D5_4, EP, R2}, 1, PROCESSOR_V850EQ }, +/* end-sanitize-v850eq */ +{ "sld.h", one (0x0400), one (0x0780), {D8_7, EP, R2}, 1, PROCESSOR_ALL }, { "sld.w", one (0x0500), one (0x0781), {D8_6, EP, R2}, 1, PROCESSOR_ALL }, { "sst.b", one (0x0380), one (0x0780), {R2, D7, EP}, 2, PROCESSOR_ALL }, { "sst.h", one (0x0480), one (0x0780), {R2, D8_7, EP}, 2, PROCESSOR_ALL }, |