aboutsummaryrefslogtreecommitdiff
diff options
context:
space:
mode:
Diffstat
-rw-r--r--bfd/ChangeLog12
-rw-r--r--bfd/elf-bfd.h1
-rw-r--r--bfd/elfxx-mips.c214
-rw-r--r--gas/testsuite/ChangeLog6
-rw-r--r--gas/testsuite/gas/mips/mips.exp1
-rw-r--r--gas/testsuite/gas/mips/mips16-intermix.d164
-rw-r--r--gas/testsuite/gas/mips/mips16-intermix.s2631
-rw-r--r--ld/testsuite/ChangeLog6
-rw-r--r--ld/testsuite/ld-mips-elf/mips-elf.exp10
-rw-r--r--ld/testsuite/ld-mips-elf/mips16-intermix-1.s104
-rw-r--r--ld/testsuite/ld-mips-elf/mips16-intermix-2.s2631
-rw-r--r--ld/testsuite/ld-mips-elf/mips16-intermix.d132
12 files changed, 5846 insertions, 66 deletions
diff --git a/bfd/ChangeLog b/bfd/ChangeLog
index 2b3394a..052a2d1 100644
--- a/bfd/ChangeLog
+++ b/bfd/ChangeLog
@@ -1,3 +1,15 @@
+2006-11-01 Thiemo Seufer <ths@mips.com>
+ David Ung <davidu@mips.com>
+
+ * elf-bfd.h (local_call_stubs): New member.
+ * elfxx-mips.c (FN_STUB_P, CALL_STUB_P, CALL_FP_STUB_P): New macros.
+ (mips_elf_calculate_relocation): Handle local mips16 call stubs.
+ (mips16_stub_section_p): Rename from mips_elf_stub_section_p, use
+ the new stub macros.
+ (_bfd_mips_elf_check_relocs): Handle call stubs for code which
+ mixes mips16 and mips32 functions. Use mips16_stub_section_p. Mark
+ used stubs with SEC_KEEP. Use the new stub macros.
+
2006-11-01 Alan Modra <amodra@bigpond.net.au>
* elf32-arm.c (bfd_elf32_arm_process_before_allocation): Correct
diff --git a/bfd/elf-bfd.h b/bfd/elf-bfd.h
index 85a7693..4a7c0c8 100644
--- a/bfd/elf-bfd.h
+++ b/bfd/elf-bfd.h
@@ -1353,6 +1353,7 @@ struct elf_obj_tdata
MIPS ELF linker. FIXME: We should figure out some way to only
include this field for a MIPS ELF target. */
asection **local_stubs;
+ asection **local_call_stubs;
/* Used to determine if PT_GNU_EH_FRAME segment header should be
created. */
diff --git a/bfd/elfxx-mips.c b/bfd/elfxx-mips.c
index a1e09fd..747c91c 100644
--- a/bfd/elfxx-mips.c
+++ b/bfd/elfxx-mips.c
@@ -493,7 +493,7 @@ static bfd_boolean mips_elf_sort_hash_table_f
(struct mips_elf_link_hash_entry *, void *);
static bfd_vma mips_elf_high
(bfd_vma);
-static bfd_boolean mips_elf_stub_section_p
+static bfd_boolean mips16_stub_section_p
(bfd *, asection *);
static bfd_boolean mips_elf_create_dynamic_relocation
(bfd *, struct bfd_link_info *, const Elf_Internal_Rela *,
@@ -709,6 +709,10 @@ static bfd *reldyn_sorting_bfd;
#define FN_STUB ".mips16.fn."
#define CALL_STUB ".mips16.call."
#define CALL_FP_STUB ".mips16.call.fp."
+
+#define FN_STUB_P(name) CONST_STRNEQ (name, FN_STUB)
+#define CALL_STUB_P(name) CONST_STRNEQ (name, CALL_STUB)
+#define CALL_FP_STUB_P(name) CONST_STRNEQ (name, CALL_FP_STUB)
/* The format of the first PLT entry in a VxWorks executable. */
static const bfd_vma mips_vxworks_exec_plt0_entry[] = {
@@ -4078,9 +4082,10 @@ mips_elf_calculate_relocation (bfd *abfd, bfd *input_bfd,
a stub. */
if (r_type != R_MIPS16_26 && !info->relocatable
&& ((h != NULL && h->fn_stub != NULL)
- || (local_p && elf_tdata (input_bfd)->local_stubs != NULL
+ || (local_p
+ && elf_tdata (input_bfd)->local_stubs != NULL
&& elf_tdata (input_bfd)->local_stubs[r_symndx] != NULL))
- && !mips_elf_stub_section_p (input_bfd, input_section))
+ && !mips16_stub_section_p (input_bfd, input_section))
{
/* This is a 32- or 64-bit call to a 16-bit function. We should
have already noticed that we were going to need the
@@ -4101,33 +4106,40 @@ mips_elf_calculate_relocation (bfd *abfd, bfd *input_bfd,
need to redirect the call to the stub. */
else if (r_type == R_MIPS16_26 && !info->relocatable
&& h != NULL
- && (h->call_stub != NULL || h->call_fp_stub != NULL)
+ && ((h->call_stub != NULL || h->call_fp_stub != NULL)
+ || (local_p
+ && elf_tdata (input_bfd)->local_call_stubs != NULL
+ && elf_tdata (input_bfd)->local_call_stubs[r_symndx] != NULL))
&& !target_is_16_bit_code_p)
{
- /* If both call_stub and call_fp_stub are defined, we can figure
- out which one to use by seeing which one appears in the input
- file. */
- if (h->call_stub != NULL && h->call_fp_stub != NULL)
+ if (local_p)
+ sec = elf_tdata (input_bfd)->local_call_stubs[r_symndx];
+ else
{
- asection *o;
-
- sec = NULL;
- for (o = input_bfd->sections; o != NULL; o = o->next)
+ /* If both call_stub and call_fp_stub are defined, we can figure
+ out which one to use by checking which one appears in the input
+ file. */
+ if (h->call_stub != NULL && h->call_fp_stub != NULL)
{
- if (CONST_STRNEQ (bfd_get_section_name (input_bfd, o),
- CALL_FP_STUB))
+ asection *o;
+
+ sec = NULL;
+ for (o = input_bfd->sections; o != NULL; o = o->next)
{
- sec = h->call_fp_stub;
- break;
+ if (CALL_FP_STUB_P (bfd_get_section_name (input_bfd, o)))
+ {
+ sec = h->call_fp_stub;
+ break;
+ }
}
+ if (sec == NULL)
+ sec = h->call_stub;
}
- if (sec == NULL)
+ else if (h->call_stub != NULL)
sec = h->call_stub;
- }
- else if (h->call_stub != NULL)
- sec = h->call_stub;
- else
- sec = h->call_fp_stub;
+ else
+ sec = h->call_fp_stub;
+ }
BFD_ASSERT (sec->size > 0);
symbol = sec->output_section->vma + sec->output_offset;
@@ -4702,13 +4714,11 @@ mips_elf_perform_relocation (struct bfd_link_info *info,
/* Returns TRUE if SECTION is a MIPS16 stub section. */
static bfd_boolean
-mips_elf_stub_section_p (bfd *abfd ATTRIBUTE_UNUSED, asection *section)
+mips16_stub_section_p (bfd *abfd ATTRIBUTE_UNUSED, asection *section)
{
const char *name = bfd_get_section_name (abfd, section);
- return (CONST_STRNEQ (name, FN_STUB)
- || CONST_STRNEQ (name, CALL_STUB)
- || CONST_STRNEQ (name, CALL_FP_STUB));
+ return FN_STUB_P (name) || CALL_STUB_P (name) || CALL_FP_STUB_P (name);
}
/* Add room for N relocations to the .rel(a).dyn section in ABFD. */
@@ -6137,7 +6147,7 @@ _bfd_mips_elf_check_relocs (bfd *abfd, struct bfd_link_info *info,
/* Check for the mips16 stub sections. */
name = bfd_get_section_name (abfd, sec);
- if (CONST_STRNEQ (name, FN_STUB))
+ if (FN_STUB_P (name))
{
unsigned long r_symndx;
@@ -6162,9 +6172,7 @@ _bfd_mips_elf_check_relocs (bfd *abfd, struct bfd_link_info *info,
/* We can ignore stub sections when looking for relocs. */
if ((o->flags & SEC_RELOC) == 0
|| o->reloc_count == 0
- || CONST_STRNEQ (bfd_get_section_name (abfd, o), FN_STUB)
- || CONST_STRNEQ (bfd_get_section_name (abfd, o), CALL_STUB)
- || CONST_STRNEQ (bfd_get_section_name (abfd, o), CALL_FP_STUB))
+ || mips16_stub_section_p (abfd, o))
continue;
sec_relocs
@@ -6216,6 +6224,7 @@ _bfd_mips_elf_check_relocs (bfd *abfd, struct bfd_link_info *info,
elf_tdata (abfd)->local_stubs = n;
}
+ sec->flags |= SEC_KEEP;
elf_tdata (abfd)->local_stubs[r_symndx] = sec;
/* We don't need to set mips16_stubs_seen in this case.
@@ -6236,12 +6245,23 @@ _bfd_mips_elf_check_relocs (bfd *abfd, struct bfd_link_info *info,
/* H is the symbol this stub is for. */
+ /* If we already have an appropriate stub for this function, we
+ don't need another one, so we can discard this one. Since
+ this function is called before the linker maps input sections
+ to output sections, we can easily discard it by setting the
+ SEC_EXCLUDE flag. */
+ if (h->fn_stub != NULL)
+ {
+ sec->flags |= SEC_EXCLUDE;
+ return TRUE;
+ }
+
+ sec->flags |= SEC_KEEP;
h->fn_stub = sec;
mips_elf_hash_table (info)->mips16_stubs_seen = TRUE;
}
}
- else if (CONST_STRNEQ (name, CALL_STUB)
- || CONST_STRNEQ (name, CALL_FP_STUB))
+ else if (CALL_STUB_P (name) || CALL_FP_STUB_P (name))
{
unsigned long r_symndx;
struct mips_elf_link_hash_entry *h;
@@ -6255,42 +6275,106 @@ _bfd_mips_elf_check_relocs (bfd *abfd, struct bfd_link_info *info,
if (r_symndx < extsymoff
|| sym_hashes[r_symndx - extsymoff] == NULL)
{
- /* This stub was actually built for a static symbol defined
- in the same file. We assume that all static symbols in
- mips16 code are themselves mips16, so we can simply
- discard this stub. Since this function is called before
- the linker maps input sections to output sections, we can
- easily discard it by setting the SEC_EXCLUDE flag. */
- sec->flags |= SEC_EXCLUDE;
- return TRUE;
- }
+ asection *o;
- h = ((struct mips_elf_link_hash_entry *)
- sym_hashes[r_symndx - extsymoff]);
+ /* This stub is for a local symbol. This stub will only be
+ needed if there is some relocation (R_MIPS16_26) in this BFD
+ that refers to this symbol. */
+ for (o = abfd->sections; o != NULL; o = o->next)
+ {
+ Elf_Internal_Rela *sec_relocs;
+ const Elf_Internal_Rela *r, *rend;
- /* H is the symbol this stub is for. */
+ /* We can ignore stub sections when looking for relocs. */
+ if ((o->flags & SEC_RELOC) == 0
+ || o->reloc_count == 0
+ || mips16_stub_section_p (abfd, o))
+ continue;
- if (CONST_STRNEQ (name, CALL_FP_STUB))
- loc = &h->call_fp_stub;
- else
- loc = &h->call_stub;
-
- /* If we already have an appropriate stub for this function, we
- don't need another one, so we can discard this one. Since
- this function is called before the linker maps input sections
- to output sections, we can easily discard it by setting the
- SEC_EXCLUDE flag. We can also discard this section if we
- happen to already know that this is a mips16 function; it is
- not necessary to check this here, as it is checked later, but
- it is slightly faster to check now. */
- if (*loc != NULL || h->root.other == STO_MIPS16)
- {
- sec->flags |= SEC_EXCLUDE;
- return TRUE;
+ sec_relocs
+ = _bfd_elf_link_read_relocs (abfd, o, NULL, NULL,
+ info->keep_memory);
+ if (sec_relocs == NULL)
+ return FALSE;
+
+ rend = sec_relocs + o->reloc_count;
+ for (r = sec_relocs; r < rend; r++)
+ if (ELF_R_SYM (abfd, r->r_info) == r_symndx
+ && ELF_R_TYPE (abfd, r->r_info) == R_MIPS16_26)
+ break;
+
+ if (elf_section_data (o)->relocs != sec_relocs)
+ free (sec_relocs);
+
+ if (r < rend)
+ break;
+ }
+
+ if (o == NULL)
+ {
+ /* There is no non-call reloc for this stub, so we do
+ not need it. Since this function is called before
+ the linker maps input sections to output sections, we
+ can easily discard it by setting the SEC_EXCLUDE
+ flag. */
+ sec->flags |= SEC_EXCLUDE;
+ return TRUE;
+ }
+
+ /* Record this stub in an array of local symbol call_stubs for
+ this BFD. */
+ if (elf_tdata (abfd)->local_call_stubs == NULL)
+ {
+ unsigned long symcount;
+ asection **n;
+ bfd_size_type amt;
+
+ if (elf_bad_symtab (abfd))
+ symcount = NUM_SHDR_ENTRIES (symtab_hdr);
+ else
+ symcount = symtab_hdr->sh_info;
+ amt = symcount * sizeof (asection *);
+ n = bfd_zalloc (abfd, amt);
+ if (n == NULL)
+ return FALSE;
+ elf_tdata (abfd)->local_call_stubs = n;
+ }
+
+ sec->flags |= SEC_KEEP;
+ elf_tdata (abfd)->local_call_stubs[r_symndx] = sec;
+
+ /* We don't need to set mips16_stubs_seen in this case.
+ That flag is used to see whether we need to look through
+ the global symbol table for stubs. We don't need to set
+ it here, because we just have a local stub. */
}
+ else
+ {
+ h = ((struct mips_elf_link_hash_entry *)
+ sym_hashes[r_symndx - extsymoff]);
+
+ /* H is the symbol this stub is for. */
+
+ if (CALL_FP_STUB_P (name))
+ loc = &h->call_fp_stub;
+ else
+ loc = &h->call_stub;
+
+ /* If we already have an appropriate stub for this function, we
+ don't need another one, so we can discard this one. Since
+ this function is called before the linker maps input sections
+ to output sections, we can easily discard it by setting the
+ SEC_EXCLUDE flag. */
+ if (*loc != NULL)
+ {
+ sec->flags |= SEC_EXCLUDE;
+ return TRUE;
+ }
- *loc = sec;
- mips_elf_hash_table (info)->mips16_stubs_seen = TRUE;
+ sec->flags |= SEC_KEEP;
+ *loc = sec;
+ mips_elf_hash_table (info)->mips16_stubs_seen = TRUE;
+ }
}
if (dynobj == NULL)
@@ -6655,9 +6739,7 @@ _bfd_mips_elf_check_relocs (bfd *abfd, struct bfd_link_info *info,
References from a stub section do not count. */
if (h != NULL
&& r_type != R_MIPS16_26
- && ! CONST_STRNEQ (bfd_get_section_name (abfd, sec), FN_STUB)
- && ! CONST_STRNEQ (bfd_get_section_name (abfd, sec), CALL_STUB)
- && ! CONST_STRNEQ (bfd_get_section_name (abfd, sec), CALL_FP_STUB))
+ && !mips16_stub_section_p (abfd, sec))
{
struct mips_elf_link_hash_entry *mh;
diff --git a/gas/testsuite/ChangeLog b/gas/testsuite/ChangeLog
index 87cfb1a..bad5620 100644
--- a/gas/testsuite/ChangeLog
+++ b/gas/testsuite/ChangeLog
@@ -1,3 +1,9 @@
+2006-11-01 Thiemo Seufer <ths@mips.com>
+
+ * gas/mips/mips16-intermix.d, gas/mips/mips16-intermix.s: New
+ testcase.
+ * gas/mips/mips.exp: Run new testcase.
+
2006-11-01 Mei Ligang <ligang@sunnorth.com.cn>
* gas/score/rD_rA.d: Correct not! and not.c instruction disassembly.
diff --git a/gas/testsuite/gas/mips/mips.exp b/gas/testsuite/gas/mips/mips.exp
index 8e2e4e6..b6d8e7b 100644
--- a/gas/testsuite/gas/mips/mips.exp
+++ b/gas/testsuite/gas/mips/mips.exp
@@ -785,6 +785,7 @@ if { [istarget mips*-*-vxworks*] } {
run_dump_test "mips16e-save"
run_dump_test "mips16e-64"
run_list_test "mips16e-64" "-march=mips32 -32"
+ run_dump_test "mips16-intermix"
}
run_dump_test "vxworks1"
run_dump_test "vxworks1-xgot"
diff --git a/gas/testsuite/gas/mips/mips16-intermix.d b/gas/testsuite/gas/mips/mips16-intermix.d
new file mode 100644
index 0000000..9b541ee
--- /dev/null
+++ b/gas/testsuite/gas/mips/mips16-intermix.d
@@ -0,0 +1,164 @@
+#objdump: -t
+#as: -mips32r2
+#name: MIPS16 intermix
+
+.*: +file format .*mips.*
+
+SYMBOL TABLE:
+#...
+0+[0-9a-f]+ l F .text 0+[0-9a-f]+ m32_static_l
+0+[0-9a-f]+ l F .text 0+[0-9a-f]+ 0xf0 m16_static_l
+0+[0-9a-f]+ l F .text 0+[0-9a-f]+ m32_static1_l
+0+[0-9a-f]+ l F .text 0+[0-9a-f]+ 0xf0 m16_static1_l
+0+[0-9a-f]+ l F .text 0+[0-9a-f]+ m32_static32_l
+0+[0-9a-f]+ l F .text 0+[0-9a-f]+ 0xf0 m16_static32_l
+0+[0-9a-f]+ l F .text 0+[0-9a-f]+ m32_static16_l
+0+[0-9a-f]+ l F .text 0+[0-9a-f]+ 0xf0 m16_static16_l
+0+[0-9a-f]+ l d .mips16.fn.m16_d 0+[0-9a-f]+ .mips16.fn.m16_d
+0+[0-9a-f]+ l F .mips16.fn.m16_d 0+[0-9a-f]+ __fn_stub_m16_d
+0+[0-9a-f]+ l F .text 0+[0-9a-f]+ m32_static_d
+0+[0-9a-f]+ l F .text 0+[0-9a-f]+ 0xf0 m16_static_d
+0+[0-9a-f]+ l d .mips16.fn.m16_static_d 0+[0-9a-f]+ .mips16.fn.m16_static_d
+0+[0-9a-f]+ l F .mips16.fn.m16_static_d 0+[0-9a-f]+ __fn_stub_m16_static_d
+0+[0-9a-f]+ l F .text 0+[0-9a-f]+ m32_static1_d
+0+[0-9a-f]+ l F .text 0+[0-9a-f]+ 0xf0 m16_static1_d
+0+[0-9a-f]+ l d .mips16.fn.m16_static1_d 0+[0-9a-f]+ .mips16.fn.m16_static1_d
+0+[0-9a-f]+ l F .mips16.fn.m16_static1_d 0+[0-9a-f]+ __fn_stub_m16_static1_d
+0+[0-9a-f]+ l F .text 0+[0-9a-f]+ m32_static32_d
+0+[0-9a-f]+ l F .text 0+[0-9a-f]+ 0xf0 m16_static32_d
+0+[0-9a-f]+ l d .mips16.fn.m16_static32_d 0+[0-9a-f]+ .mips16.fn.m16_static32_d
+0+[0-9a-f]+ l F .mips16.fn.m16_static32_d 0+[0-9a-f]+ __fn_stub_m16_static32_d
+0+[0-9a-f]+ l F .text 0+[0-9a-f]+ m32_static16_d
+0+[0-9a-f]+ l F .text 0+[0-9a-f]+ 0xf0 m16_static16_d
+0+[0-9a-f]+ l d .mips16.fn.m16_static16_d 0+[0-9a-f]+ .mips16.fn.m16_static16_d
+0+[0-9a-f]+ l F .mips16.fn.m16_static16_d 0+[0-9a-f]+ __fn_stub_m16_static16_d
+0+[0-9a-f]+ l F .text 0+[0-9a-f]+ m32_static_ld
+0+[0-9a-f]+ l F .text 0+[0-9a-f]+ 0xf0 m16_static_ld
+0+[0-9a-f]+ l F .text 0+[0-9a-f]+ m32_static1_ld
+0+[0-9a-f]+ l F .text 0+[0-9a-f]+ 0xf0 m16_static1_ld
+0+[0-9a-f]+ l F .text 0+[0-9a-f]+ m32_static32_ld
+0+[0-9a-f]+ l F .text 0+[0-9a-f]+ 0xf0 m16_static32_ld
+0+[0-9a-f]+ l F .text 0+[0-9a-f]+ m32_static16_ld
+0+[0-9a-f]+ l F .text 0+[0-9a-f]+ 0xf0 m16_static16_ld
+0+[0-9a-f]+ l d .mips16.fn.m16_dl 0+[0-9a-f]+ .mips16.fn.m16_dl
+0+[0-9a-f]+ l F .mips16.fn.m16_dl 0+[0-9a-f]+ __fn_stub_m16_dl
+0+[0-9a-f]+ l F .text 0+[0-9a-f]+ m32_static_dl
+0+[0-9a-f]+ l F .text 0+[0-9a-f]+ 0xf0 m16_static_dl
+0+[0-9a-f]+ l d .mips16.fn.m16_static_dl 0+[0-9a-f]+ .mips16.fn.m16_static_dl
+0+[0-9a-f]+ l F .mips16.fn.m16_static_dl 0+[0-9a-f]+ __fn_stub_m16_static_dl
+0+[0-9a-f]+ l F .text 0+[0-9a-f]+ m32_static1_dl
+0+[0-9a-f]+ l F .text 0+[0-9a-f]+ 0xf0 m16_static1_dl
+0+[0-9a-f]+ l d .mips16.fn.m16_static1_dl 0+[0-9a-f]+ .mips16.fn.m16_static1_dl
+0+[0-9a-f]+ l F .mips16.fn.m16_static1_dl 0+[0-9a-f]+ __fn_stub_m16_static1_dl
+0+[0-9a-f]+ l F .text 0+[0-9a-f]+ m32_static32_dl
+0+[0-9a-f]+ l F .text 0+[0-9a-f]+ 0xf0 m16_static32_dl
+0+[0-9a-f]+ l d .mips16.fn.m16_static32_dl 0+[0-9a-f]+ .mips16.fn.m16_static32_dl
+0+[0-9a-f]+ l F .mips16.fn.m16_static32_dl 0+[0-9a-f]+ __fn_stub_m16_static32_dl
+0+[0-9a-f]+ l F .text 0+[0-9a-f]+ m32_static16_dl
+0+[0-9a-f]+ l F .text 0+[0-9a-f]+ 0xf0 m16_static16_dl
+0+[0-9a-f]+ l d .mips16.fn.m16_static16_dl 0+[0-9a-f]+ .mips16.fn.m16_static16_dl
+0+[0-9a-f]+ l F .mips16.fn.m16_static16_dl 0+[0-9a-f]+ __fn_stub_m16_static16_dl
+0+[0-9a-f]+ l d .mips16.fn.m16_dlld 0+[0-9a-f]+ .mips16.fn.m16_dlld
+0+[0-9a-f]+ l F .mips16.fn.m16_dlld 0+[0-9a-f]+ __fn_stub_m16_dlld
+0+[0-9a-f]+ l F .text 0+[0-9a-f]+ m32_static_dlld
+0+[0-9a-f]+ l F .text 0+[0-9a-f]+ 0xf0 m16_static_dlld
+0+[0-9a-f]+ l d .mips16.fn.m16_static_dlld 0+[0-9a-f]+ .mips16.fn.m16_static_dlld
+0+[0-9a-f]+ l F .mips16.fn.m16_static_dlld 0+[0-9a-f]+ __fn_stub_m16_static_dlld
+0+[0-9a-f]+ l F .text 0+[0-9a-f]+ m32_static1_dlld
+0+[0-9a-f]+ l F .text 0+[0-9a-f]+ 0xf0 m16_static1_dlld
+0+[0-9a-f]+ l d .mips16.fn.m16_static1_dlld 0+[0-9a-f]+ .mips16.fn.m16_static1_dlld
+0+[0-9a-f]+ l F .mips16.fn.m16_static1_dlld 0+[0-9a-f]+ __fn_stub_m16_static1_dlld
+0+[0-9a-f]+ l F .text 0+[0-9a-f]+ m32_static32_dlld
+0+[0-9a-f]+ l F .text 0+[0-9a-f]+ 0xf0 m16_static32_dlld
+0+[0-9a-f]+ l d .mips16.fn.m16_static32_dlld 0+[0-9a-f]+ .mips16.fn.m16_static32_dlld
+0+[0-9a-f]+ l F .mips16.fn.m16_static32_dlld 0+[0-9a-f]+ __fn_stub_m16_static32_dlld
+0+[0-9a-f]+ l F .text 0+[0-9a-f]+ m32_static16_dlld
+0+[0-9a-f]+ l F .text 0+[0-9a-f]+ 0xf0 m16_static16_dlld
+0+[0-9a-f]+ l d .mips16.fn.m16_static16_dlld 0+[0-9a-f]+ .mips16.fn.m16_static16_dlld
+0+[0-9a-f]+ l F .mips16.fn.m16_static16_dlld 0+[0-9a-f]+ __fn_stub_m16_static16_dlld
+0+[0-9a-f]+ l F .text 0+[0-9a-f]+ m32_static_d_l
+0+[0-9a-f]+ l F .text 0+[0-9a-f]+ 0xf0 m16_static_d_l
+0+[0-9a-f]+ l F .text 0+[0-9a-f]+ m32_static1_d_l
+0+[0-9a-f]+ l F .text 0+[0-9a-f]+ 0xf0 m16_static1_d_l
+0+[0-9a-f]+ l F .text 0+[0-9a-f]+ m32_static32_d_l
+0+[0-9a-f]+ l F .text 0+[0-9a-f]+ 0xf0 m16_static32_d_l
+0+[0-9a-f]+ l F .text 0+[0-9a-f]+ m32_static16_d_l
+0+[0-9a-f]+ l F .text 0+[0-9a-f]+ 0xf0 m16_static16_d_l
+0+[0-9a-f]+ l d .mips16.fn.m16_d_d 0+[0-9a-f]+ .mips16.fn.m16_d_d
+0+[0-9a-f]+ l F .mips16.fn.m16_d_d 0+[0-9a-f]+ __fn_stub_m16_d_d
+0+[0-9a-f]+ l F .text 0+[0-9a-f]+ m32_static_d_d
+0+[0-9a-f]+ l F .text 0+[0-9a-f]+ 0xf0 m16_static_d_d
+0+[0-9a-f]+ l d .mips16.fn.m16_static_d_d 0+[0-9a-f]+ .mips16.fn.m16_static_d_d
+0+[0-9a-f]+ l F .mips16.fn.m16_static_d_d 0+[0-9a-f]+ __fn_stub_m16_static_d_d
+0+[0-9a-f]+ l F .text 0+[0-9a-f]+ m32_static1_d_d
+0+[0-9a-f]+ l F .text 0+[0-9a-f]+ 0xf0 m16_static1_d_d
+0+[0-9a-f]+ l d .mips16.fn.m16_static1_d_d 0+[0-9a-f]+ .mips16.fn.m16_static1_d_d
+0+[0-9a-f]+ l F .mips16.fn.m16_static1_d_d 0+[0-9a-f]+ __fn_stub_m16_static1_d_d
+0+[0-9a-f]+ l F .text 0+[0-9a-f]+ m32_static32_d_d
+0+[0-9a-f]+ l F .text 0+[0-9a-f]+ 0xf0 m16_static32_d_d
+0+[0-9a-f]+ l d .mips16.fn.m16_static32_d_d 0+[0-9a-f]+ .mips16.fn.m16_static32_d_d
+0+[0-9a-f]+ l F .mips16.fn.m16_static32_d_d 0+[0-9a-f]+ __fn_stub_m16_static32_d_d
+0+[0-9a-f]+ l F .text 0+[0-9a-f]+ m32_static16_d_d
+0+[0-9a-f]+ l F .text 0+[0-9a-f]+ 0xf0 m16_static16_d_d
+0+[0-9a-f]+ l d .mips16.fn.m16_static16_d_d 0+[0-9a-f]+ .mips16.fn.m16_static16_d_d
+0+[0-9a-f]+ l F .mips16.fn.m16_static16_d_d 0+[0-9a-f]+ __fn_stub_m16_static16_d_d
+0+[0-9a-f]+ l d .mips16.call.m32_static1_d 0+[0-9a-f]+ .mips16.call.m32_static1_d
+0+[0-9a-f]+ l F .mips16.call.m32_static1_d 0+[0-9a-f]+ __call_stub_m32_static1_d
+0+[0-9a-f]+ l d .mips16.call.m16_static1_d 0+[0-9a-f]+ .mips16.call.m16_static1_d
+0+[0-9a-f]+ l F .mips16.call.m16_static1_d 0+[0-9a-f]+ __call_stub_m16_static1_d
+0+[0-9a-f]+ l d .mips16.call.m32_static1_dl 0+[0-9a-f]+ .mips16.call.m32_static1_dl
+0+[0-9a-f]+ l F .mips16.call.m32_static1_dl 0+[0-9a-f]+ __call_stub_m32_static1_dl
+0+[0-9a-f]+ l d .mips16.call.m16_static1_dl 0+[0-9a-f]+ .mips16.call.m16_static1_dl
+0+[0-9a-f]+ l F .mips16.call.m16_static1_dl 0+[0-9a-f]+ __call_stub_m16_static1_dl
+0+[0-9a-f]+ l d .mips16.call.m32_static1_dlld 0+[0-9a-f]+ .mips16.call.m32_static1_dlld
+0+[0-9a-f]+ l F .mips16.call.m32_static1_dlld 0+[0-9a-f]+ __call_stub_m32_static1_dlld
+0+[0-9a-f]+ l d .mips16.call.m16_static1_dlld 0+[0-9a-f]+ .mips16.call.m16_static1_dlld
+0+[0-9a-f]+ l F .mips16.call.m16_static1_dlld 0+[0-9a-f]+ __call_stub_m16_static1_dlld
+0+[0-9a-f]+ l d .mips16.call.fp.m32_static1_d_l 0+[0-9a-f]+ .mips16.call.fp.m32_static1_d_l
+0+[0-9a-f]+ l F .mips16.call.fp.m32_static1_d_l 0+[0-9a-f]+ __call_stub_fp_m32_static1_d_l
+0+[0-9a-f]+ l d .mips16.call.fp.m16_static1_d_l 0+[0-9a-f]+ .mips16.call.fp.m16_static1_d_l
+0+[0-9a-f]+ l F .mips16.call.fp.m16_static1_d_l 0+[0-9a-f]+ __call_stub_fp_m16_static1_d_l
+0+[0-9a-f]+ l d .mips16.call.fp.m32_static1_d_d 0+[0-9a-f]+ .mips16.call.fp.m32_static1_d_d
+0+[0-9a-f]+ l F .mips16.call.fp.m32_static1_d_d 0+[0-9a-f]+ __call_stub_fp_m32_static1_d_d
+0+[0-9a-f]+ l d .mips16.call.fp.m16_static1_d_d 0+[0-9a-f]+ .mips16.call.fp.m16_static1_d_d
+0+[0-9a-f]+ l F .mips16.call.fp.m16_static1_d_d 0+[0-9a-f]+ __call_stub_fp_m16_static1_d_d
+0+[0-9a-f]+ l d .mips16.call.m32_static16_d 0+[0-9a-f]+ .mips16.call.m32_static16_d
+0+[0-9a-f]+ l F .mips16.call.m32_static16_d 0+[0-9a-f]+ __call_stub_m32_static16_d
+0+[0-9a-f]+ l d .mips16.call.m16_static16_d 0+[0-9a-f]+ .mips16.call.m16_static16_d
+0+[0-9a-f]+ l F .mips16.call.m16_static16_d 0+[0-9a-f]+ __call_stub_m16_static16_d
+0+[0-9a-f]+ l d .mips16.call.m32_static16_dl 0+[0-9a-f]+ .mips16.call.m32_static16_dl
+0+[0-9a-f]+ l F .mips16.call.m32_static16_dl 0+[0-9a-f]+ __call_stub_m32_static16_dl
+0+[0-9a-f]+ l d .mips16.call.m16_static16_dl 0+[0-9a-f]+ .mips16.call.m16_static16_dl
+0+[0-9a-f]+ l F .mips16.call.m16_static16_dl 0+[0-9a-f]+ __call_stub_m16_static16_dl
+0+[0-9a-f]+ l d .mips16.call.m32_static16_dlld 0+[0-9a-f]+ .mips16.call.m32_static16_dlld
+0+[0-9a-f]+ l F .mips16.call.m32_static16_dlld 0+[0-9a-f]+ __call_stub_m32_static16_dlld
+0+[0-9a-f]+ l d .mips16.call.m16_static16_dlld 0+[0-9a-f]+ .mips16.call.m16_static16_dlld
+0+[0-9a-f]+ l F .mips16.call.m16_static16_dlld 0+[0-9a-f]+ __call_stub_m16_static16_dlld
+0+[0-9a-f]+ l d .mips16.call.fp.m32_static16_d_l 0+[0-9a-f]+ .mips16.call.fp.m32_static16_d_l
+0+[0-9a-f]+ l F .mips16.call.fp.m32_static16_d_l 0+[0-9a-f]+ __call_stub_fp_m32_static16_d_l
+0+[0-9a-f]+ l d .mips16.call.fp.m16_static16_d_l 0+[0-9a-f]+ .mips16.call.fp.m16_static16_d_l
+0+[0-9a-f]+ l F .mips16.call.fp.m16_static16_d_l 0+[0-9a-f]+ __call_stub_fp_m16_static16_d_l
+0+[0-9a-f]+ l d .mips16.call.fp.m32_static16_d_d 0+[0-9a-f]+ .mips16.call.fp.m32_static16_d_d
+0+[0-9a-f]+ l F .mips16.call.fp.m32_static16_d_d 0+[0-9a-f]+ __call_stub_fp_m32_static16_d_d
+0+[0-9a-f]+ l d .mips16.call.fp.m16_static16_d_d 0+[0-9a-f]+ .mips16.call.fp.m16_static16_d_d
+0+[0-9a-f]+ l F .mips16.call.fp.m16_static16_d_d 0+[0-9a-f]+ __call_stub_fp_m16_static16_d_d
+#...
+0+[0-9a-f]+ g F .text 0+[0-9a-f]+ m32_l
+0+[0-9a-f]+ g F .text 0+[0-9a-f]+ 0xf0 m16_l
+0+[0-9a-f]+ g F .text 0+[0-9a-f]+ m32_d
+0+[0-9a-f]+ g F .text 0+[0-9a-f]+ 0xf0 m16_d
+#...
+0+[0-9a-f]+ g F .text 0+[0-9a-f]+ m32_ld
+0+[0-9a-f]+ g F .text 0+[0-9a-f]+ 0xf0 m16_ld
+0+[0-9a-f]+ g F .text 0+[0-9a-f]+ m32_dl
+0+[0-9a-f]+ g F .text 0+[0-9a-f]+ 0xf0 m16_dl
+0+[0-9a-f]+ g F .text 0+[0-9a-f]+ m32_dlld
+0+[0-9a-f]+ g F .text 0+[0-9a-f]+ 0xf0 m16_dlld
+0+[0-9a-f]+ g F .text 0+[0-9a-f]+ m32_d_l
+0+[0-9a-f]+ g F .text 0+[0-9a-f]+ 0xf0 m16_d_l
+#...
+0+[0-9a-f]+ g F .text 0+[0-9a-f]+ m32_d_d
+0+[0-9a-f]+ g F .text 0+[0-9a-f]+ 0xf0 m16_d_d
+0+[0-9a-f]+ g F .text 0+[0-9a-f]+ f32
+0+[0-9a-f]+ g F .text 0+[0-9a-f]+ 0xf0 f16
+#pass
diff --git a/gas/testsuite/gas/mips/mips16-intermix.s b/gas/testsuite/gas/mips/mips16-intermix.s
new file mode 100644
index 0000000..49b0cc9
--- /dev/null
+++ b/gas/testsuite/gas/mips/mips16-intermix.s
@@ -0,0 +1,2631 @@
+ .text
+ .align 2
+ .globl m32_l
+ .set nomips16
+ .ent m32_l
+m32_l:
+ .frame $sp,0,$31 # vars= 0, regs= 0/0, args= 0, gp= 0
+ .mask 0x00000000,0
+ .fmask 0x00000000,0
+ .set noreorder
+ .set nomacro
+
+ j $31
+ move $2,$4
+
+ .set macro
+ .set reorder
+ .end m32_l
+
+ .align 2
+ .globl m16_l
+ .set mips16
+ .ent m16_l
+m16_l:
+ .frame $sp,0,$31 # vars= 0, regs= 0/0, args= 0, gp= 0
+ .mask 0x00000000,0
+ .fmask 0x00000000,0
+ .set noreorder
+ .set nomacro
+ j $31
+ move $2,$4
+ .set macro
+ .set reorder
+
+ .end m16_l
+
+ .align 2
+ .set nomips16
+ .ent m32_static_l
+m32_static_l:
+ .frame $sp,0,$31 # vars= 0, regs= 0/0, args= 0, gp= 0
+ .mask 0x00000000,0
+ .fmask 0x00000000,0
+ .set noreorder
+ .set nomacro
+
+ j $31
+ move $2,$4
+
+ .set macro
+ .set reorder
+ .end m32_static_l
+
+ .align 2
+ .set mips16
+ .ent m16_static_l
+m16_static_l:
+ .frame $sp,0,$31 # vars= 0, regs= 0/0, args= 0, gp= 0
+ .mask 0x00000000,0
+ .fmask 0x00000000,0
+ .set noreorder
+ .set nomacro
+ j $31
+ move $2,$4
+ .set macro
+ .set reorder
+
+ .end m16_static_l
+
+ .align 2
+ .set nomips16
+ .ent m32_static1_l
+m32_static1_l:
+ .frame $sp,0,$31 # vars= 0, regs= 0/0, args= 0, gp= 0
+ .mask 0x00000000,0
+ .fmask 0x00000000,0
+ .set noreorder
+ .set nomacro
+
+ j $31
+ move $2,$4
+
+ .set macro
+ .set reorder
+ .end m32_static1_l
+
+ .align 2
+ .set mips16
+ .ent m16_static1_l
+m16_static1_l:
+ .frame $sp,0,$31 # vars= 0, regs= 0/0, args= 0, gp= 0
+ .mask 0x00000000,0
+ .fmask 0x00000000,0
+ .set noreorder
+ .set nomacro
+ j $31
+ move $2,$4
+ .set macro
+ .set reorder
+
+ .end m16_static1_l
+
+ .align 2
+ .set nomips16
+ .ent m32_static32_l
+m32_static32_l:
+ .frame $sp,0,$31 # vars= 0, regs= 0/0, args= 0, gp= 0
+ .mask 0x00000000,0
+ .fmask 0x00000000,0
+ .set noreorder
+ .set nomacro
+
+ j $31
+ move $2,$4
+
+ .set macro
+ .set reorder
+ .end m32_static32_l
+
+ .align 2
+ .set mips16
+ .ent m16_static32_l
+m16_static32_l:
+ .frame $sp,0,$31 # vars= 0, regs= 0/0, args= 0, gp= 0
+ .mask 0x00000000,0
+ .fmask 0x00000000,0
+ .set noreorder
+ .set nomacro
+ j $31
+ move $2,$4
+ .set macro
+ .set reorder
+
+ .end m16_static32_l
+
+ .align 2
+ .set nomips16
+ .ent m32_static16_l
+m32_static16_l:
+ .frame $sp,0,$31 # vars= 0, regs= 0/0, args= 0, gp= 0
+ .mask 0x00000000,0
+ .fmask 0x00000000,0
+ .set noreorder
+ .set nomacro
+
+ j $31
+ move $2,$4
+
+ .set macro
+ .set reorder
+ .end m32_static16_l
+
+ .align 2
+ .set mips16
+ .ent m16_static16_l
+m16_static16_l:
+ .frame $sp,0,$31 # vars= 0, regs= 0/0, args= 0, gp= 0
+ .mask 0x00000000,0
+ .fmask 0x00000000,0
+ .set noreorder
+ .set nomacro
+ j $31
+ move $2,$4
+ .set macro
+ .set reorder
+
+ .end m16_static16_l
+
+ .align 2
+ .globl m32_d
+ .set nomips16
+ .ent m32_d
+m32_d:
+ .frame $sp,0,$31 # vars= 0, regs= 0/0, args= 0, gp= 0
+ .mask 0x00000000,0
+ .fmask 0x00000000,0
+ .set noreorder
+ .set nomacro
+
+ trunc.w.d $f12,$f12
+ j $31
+ mfc1 $2,$f12
+
+ .set macro
+ .set reorder
+ .end m32_d
+
+ .align 2
+ .globl m16_d
+ .set mips16
+ .ent m16_d
+m16_d:
+ .frame $sp,24,$31 # vars= 0, regs= 1/0, args= 16, gp= 0
+ .mask 0x80000000,-4
+ .fmask 0x00000000,0
+ save 24,$31
+ jal __mips16_fixdfsi
+ restore 24,$31
+ j $31
+ .end m16_d
+ # Stub function for m16_d (double)
+ .set nomips16
+ .section .mips16.fn.m16_d,"ax",@progbits
+ .align 2
+ .ent __fn_stub_m16_d
+__fn_stub_m16_d:
+ .set noreorder
+ mfc1 $4,$f13
+ mfc1 $5,$f12
+ .set noat
+ la $1,m16_d
+ jr $1
+ .set at
+ nop
+ .set reorder
+ .end __fn_stub_m16_d
+ .previous
+
+ .align 2
+ .set nomips16
+ .ent m32_static_d
+m32_static_d:
+ .frame $sp,0,$31 # vars= 0, regs= 0/0, args= 0, gp= 0
+ .mask 0x00000000,0
+ .fmask 0x00000000,0
+ .set noreorder
+ .set nomacro
+
+ trunc.w.d $f12,$f12
+ j $31
+ mfc1 $2,$f12
+
+ .set macro
+ .set reorder
+ .end m32_static_d
+
+ .align 2
+ .set mips16
+ .ent m16_static_d
+m16_static_d:
+ .frame $sp,24,$31 # vars= 0, regs= 1/0, args= 16, gp= 0
+ .mask 0x80000000,-4
+ .fmask 0x00000000,0
+ save 24,$31
+ jal __mips16_fixdfsi
+ restore 24,$31
+ j $31
+ .end m16_static_d
+ # Stub function for m16_static_d (double)
+ .set nomips16
+ .section .mips16.fn.m16_static_d,"ax",@progbits
+ .align 2
+ .ent __fn_stub_m16_static_d
+__fn_stub_m16_static_d:
+ .set noreorder
+ mfc1 $4,$f13
+ mfc1 $5,$f12
+ .set noat
+ la $1,m16_static_d
+ jr $1
+ .set at
+ nop
+ .set reorder
+ .end __fn_stub_m16_static_d
+ .previous
+
+ .align 2
+ .set nomips16
+ .ent m32_static1_d
+m32_static1_d:
+ .frame $sp,0,$31 # vars= 0, regs= 0/0, args= 0, gp= 0
+ .mask 0x00000000,0
+ .fmask 0x00000000,0
+ .set noreorder
+ .set nomacro
+
+ trunc.w.d $f12,$f12
+ j $31
+ mfc1 $2,$f12
+
+ .set macro
+ .set reorder
+ .end m32_static1_d
+
+ .align 2
+ .set mips16
+ .ent m16_static1_d
+m16_static1_d:
+ .frame $sp,24,$31 # vars= 0, regs= 1/0, args= 16, gp= 0
+ .mask 0x80000000,-4
+ .fmask 0x00000000,0
+ save 24,$31
+ jal __mips16_fixdfsi
+ restore 24,$31
+ j $31
+ .end m16_static1_d
+ # Stub function for m16_static1_d (double)
+ .set nomips16
+ .section .mips16.fn.m16_static1_d,"ax",@progbits
+ .align 2
+ .ent __fn_stub_m16_static1_d
+__fn_stub_m16_static1_d:
+ .set noreorder
+ mfc1 $4,$f13
+ mfc1 $5,$f12
+ .set noat
+ la $1,m16_static1_d
+ jr $1
+ .set at
+ nop
+ .set reorder
+ .end __fn_stub_m16_static1_d
+ .previous
+
+ .align 2
+ .set nomips16
+ .ent m32_static32_d
+m32_static32_d:
+ .frame $sp,0,$31 # vars= 0, regs= 0/0, args= 0, gp= 0
+ .mask 0x00000000,0
+ .fmask 0x00000000,0
+ .set noreorder
+ .set nomacro
+
+ trunc.w.d $f12,$f12
+ j $31
+ mfc1 $2,$f12
+
+ .set macro
+ .set reorder
+ .end m32_static32_d
+
+ .align 2
+ .set mips16
+ .ent m16_static32_d
+m16_static32_d:
+ .frame $sp,24,$31 # vars= 0, regs= 1/0, args= 16, gp= 0
+ .mask 0x80000000,-4
+ .fmask 0x00000000,0
+ save 24,$31
+ jal __mips16_fixdfsi
+ restore 24,$31
+ j $31
+ .end m16_static32_d
+ # Stub function for m16_static32_d (double)
+ .set nomips16
+ .section .mips16.fn.m16_static32_d,"ax",@progbits
+ .align 2
+ .ent __fn_stub_m16_static32_d
+__fn_stub_m16_static32_d:
+ .set noreorder
+ mfc1 $4,$f13
+ mfc1 $5,$f12
+ .set noat
+ la $1,m16_static32_d
+ jr $1
+ .set at
+ nop
+ .set reorder
+ .end __fn_stub_m16_static32_d
+ .previous
+
+ .align 2
+ .set nomips16
+ .ent m32_static16_d
+m32_static16_d:
+ .frame $sp,0,$31 # vars= 0, regs= 0/0, args= 0, gp= 0
+ .mask 0x00000000,0
+ .fmask 0x00000000,0
+ .set noreorder
+ .set nomacro
+
+ trunc.w.d $f12,$f12
+ j $31
+ mfc1 $2,$f12
+
+ .set macro
+ .set reorder
+ .end m32_static16_d
+
+ .align 2
+ .set mips16
+ .ent m16_static16_d
+m16_static16_d:
+ .frame $sp,24,$31 # vars= 0, regs= 1/0, args= 16, gp= 0
+ .mask 0x80000000,-4
+ .fmask 0x00000000,0
+ save 24,$31
+ jal __mips16_fixdfsi
+ restore 24,$31
+ j $31
+ .end m16_static16_d
+ # Stub function for m16_static16_d (double)
+ .set nomips16
+ .section .mips16.fn.m16_static16_d,"ax",@progbits
+ .align 2
+ .ent __fn_stub_m16_static16_d
+__fn_stub_m16_static16_d:
+ .set noreorder
+ mfc1 $4,$f13
+ mfc1 $5,$f12
+ .set noat
+ la $1,m16_static16_d
+ jr $1
+ .set at
+ nop
+ .set reorder
+ .end __fn_stub_m16_static16_d
+ .previous
+
+ .align 2
+ .globl m32_ld
+ .set nomips16
+ .ent m32_ld
+m32_ld:
+ .frame $sp,0,$31 # vars= 0, regs= 0/0, args= 0, gp= 0
+ .mask 0x00000000,0
+ .fmask 0x00000000,0
+ .set noreorder
+ .set nomacro
+
+ mtc1 $7,$f2
+ mtc1 $6,$f3
+ trunc.w.d $f0,$f2
+ mfc1 $24,$f0
+ j $31
+ addu $2,$24,$4
+
+ .set macro
+ .set reorder
+ .end m32_ld
+
+ .align 2
+ .globl m16_ld
+ .set mips16
+ .ent m16_ld
+m16_ld:
+ .frame $sp,24,$31 # vars= 0, regs= 2/0, args= 16, gp= 0
+ .mask 0x80010000,-4
+ .fmask 0x00000000,0
+ save 24,$16,$31
+ move $16,$4
+ move $5,$7
+ .set noreorder
+ .set nomacro
+ jal __mips16_fixdfsi
+ move $4,$6
+ .set macro
+ .set reorder
+
+ addu $2,$16
+ restore 24,$16,$31
+ j $31
+ .end m16_ld
+
+ .align 2
+ .set nomips16
+ .ent m32_static_ld
+m32_static_ld:
+ .frame $sp,0,$31 # vars= 0, regs= 0/0, args= 0, gp= 0
+ .mask 0x00000000,0
+ .fmask 0x00000000,0
+ .set noreorder
+ .set nomacro
+
+ mtc1 $7,$f2
+ mtc1 $6,$f3
+ trunc.w.d $f0,$f2
+ mfc1 $24,$f0
+ j $31
+ addu $2,$24,$4
+
+ .set macro
+ .set reorder
+ .end m32_static_ld
+
+ .align 2
+ .set mips16
+ .ent m16_static_ld
+m16_static_ld:
+ .frame $sp,24,$31 # vars= 0, regs= 2/0, args= 16, gp= 0
+ .mask 0x80010000,-4
+ .fmask 0x00000000,0
+ save 24,$16,$31
+ move $16,$4
+ move $5,$7
+ .set noreorder
+ .set nomacro
+ jal __mips16_fixdfsi
+ move $4,$6
+ .set macro
+ .set reorder
+
+ addu $2,$16
+ restore 24,$16,$31
+ j $31
+ .end m16_static_ld
+
+ .align 2
+ .set nomips16
+ .ent m32_static1_ld
+m32_static1_ld:
+ .frame $sp,0,$31 # vars= 0, regs= 0/0, args= 0, gp= 0
+ .mask 0x00000000,0
+ .fmask 0x00000000,0
+ .set noreorder
+ .set nomacro
+
+ mtc1 $7,$f2
+ mtc1 $6,$f3
+ trunc.w.d $f0,$f2
+ mfc1 $24,$f0
+ j $31
+ addu $2,$24,$4
+
+ .set macro
+ .set reorder
+ .end m32_static1_ld
+
+ .align 2
+ .set mips16
+ .ent m16_static1_ld
+m16_static1_ld:
+ .frame $sp,24,$31 # vars= 0, regs= 2/0, args= 16, gp= 0
+ .mask 0x80010000,-4
+ .fmask 0x00000000,0
+ save 24,$16,$31
+ move $16,$4
+ move $5,$7
+ .set noreorder
+ .set nomacro
+ jal __mips16_fixdfsi
+ move $4,$6
+ .set macro
+ .set reorder
+
+ addu $2,$16
+ restore 24,$16,$31
+ j $31
+ .end m16_static1_ld
+
+ .align 2
+ .set nomips16
+ .ent m32_static32_ld
+m32_static32_ld:
+ .frame $sp,0,$31 # vars= 0, regs= 0/0, args= 0, gp= 0
+ .mask 0x00000000,0
+ .fmask 0x00000000,0
+ .set noreorder
+ .set nomacro
+
+ mtc1 $7,$f2
+ mtc1 $6,$f3
+ trunc.w.d $f0,$f2
+ mfc1 $24,$f0
+ j $31
+ addu $2,$24,$4
+
+ .set macro
+ .set reorder
+ .end m32_static32_ld
+
+ .align 2
+ .set mips16
+ .ent m16_static32_ld
+m16_static32_ld:
+ .frame $sp,24,$31 # vars= 0, regs= 2/0, args= 16, gp= 0
+ .mask 0x80010000,-4
+ .fmask 0x00000000,0
+ save 24,$16,$31
+ move $16,$4
+ move $5,$7
+ .set noreorder
+ .set nomacro
+ jal __mips16_fixdfsi
+ move $4,$6
+ .set macro
+ .set reorder
+
+ addu $2,$16
+ restore 24,$16,$31
+ j $31
+ .end m16_static32_ld
+
+ .align 2
+ .set nomips16
+ .ent m32_static16_ld
+m32_static16_ld:
+ .frame $sp,0,$31 # vars= 0, regs= 0/0, args= 0, gp= 0
+ .mask 0x00000000,0
+ .fmask 0x00000000,0
+ .set noreorder
+ .set nomacro
+
+ mtc1 $7,$f2
+ mtc1 $6,$f3
+ trunc.w.d $f0,$f2
+ mfc1 $24,$f0
+ j $31
+ addu $2,$24,$4
+
+ .set macro
+ .set reorder
+ .end m32_static16_ld
+
+ .align 2
+ .set mips16
+ .ent m16_static16_ld
+m16_static16_ld:
+ .frame $sp,24,$31 # vars= 0, regs= 2/0, args= 16, gp= 0
+ .mask 0x80010000,-4
+ .fmask 0x00000000,0
+ save 24,$16,$31
+ move $16,$4
+ move $5,$7
+ .set noreorder
+ .set nomacro
+ jal __mips16_fixdfsi
+ move $4,$6
+ .set macro
+ .set reorder
+
+ addu $2,$16
+ restore 24,$16,$31
+ j $31
+ .end m16_static16_ld
+
+ .align 2
+ .globl m32_dl
+ .set nomips16
+ .ent m32_dl
+m32_dl:
+ .frame $sp,0,$31 # vars= 0, regs= 0/0, args= 0, gp= 0
+ .mask 0x00000000,0
+ .fmask 0x00000000,0
+ .set noreorder
+ .set nomacro
+
+ trunc.w.d $f0,$f12
+ mfc1 $24,$f0
+ j $31
+ addu $2,$24,$6
+
+ .set macro
+ .set reorder
+ .end m32_dl
+
+ .align 2
+ .globl m16_dl
+ .set mips16
+ .ent m16_dl
+m16_dl:
+ .frame $sp,24,$31 # vars= 0, regs= 2/0, args= 16, gp= 0
+ .mask 0x80010000,-4
+ .fmask 0x00000000,0
+ save 24,$16,$31
+ .set noreorder
+ .set nomacro
+ jal __mips16_fixdfsi
+ move $16,$6
+ .set macro
+ .set reorder
+
+ addu $2,$16
+ restore 24,$16,$31
+ j $31
+ .end m16_dl
+ # Stub function for m16_dl (double)
+ .set nomips16
+ .section .mips16.fn.m16_dl,"ax",@progbits
+ .align 2
+ .ent __fn_stub_m16_dl
+__fn_stub_m16_dl:
+ .set noreorder
+ mfc1 $4,$f13
+ mfc1 $5,$f12
+ .set noat
+ la $1,m16_dl
+ jr $1
+ .set at
+ nop
+ .set reorder
+ .end __fn_stub_m16_dl
+ .previous
+
+ .align 2
+ .set nomips16
+ .ent m32_static_dl
+m32_static_dl:
+ .frame $sp,0,$31 # vars= 0, regs= 0/0, args= 0, gp= 0
+ .mask 0x00000000,0
+ .fmask 0x00000000,0
+ .set noreorder
+ .set nomacro
+
+ trunc.w.d $f0,$f12
+ mfc1 $24,$f0
+ j $31
+ addu $2,$24,$6
+
+ .set macro
+ .set reorder
+ .end m32_static_dl
+
+ .align 2
+ .set mips16
+ .ent m16_static_dl
+m16_static_dl:
+ .frame $sp,24,$31 # vars= 0, regs= 2/0, args= 16, gp= 0
+ .mask 0x80010000,-4
+ .fmask 0x00000000,0
+ save 24,$16,$31
+ .set noreorder
+ .set nomacro
+ jal __mips16_fixdfsi
+ move $16,$6
+ .set macro
+ .set reorder
+
+ addu $2,$16
+ restore 24,$16,$31
+ j $31
+ .end m16_static_dl
+ # Stub function for m16_static_dl (double)
+ .set nomips16
+ .section .mips16.fn.m16_static_dl,"ax",@progbits
+ .align 2
+ .ent __fn_stub_m16_static_dl
+__fn_stub_m16_static_dl:
+ .set noreorder
+ mfc1 $4,$f13
+ mfc1 $5,$f12
+ .set noat
+ la $1,m16_static_dl
+ jr $1
+ .set at
+ nop
+ .set reorder
+ .end __fn_stub_m16_static_dl
+ .previous
+
+ .align 2
+ .set nomips16
+ .ent m32_static1_dl
+m32_static1_dl:
+ .frame $sp,0,$31 # vars= 0, regs= 0/0, args= 0, gp= 0
+ .mask 0x00000000,0
+ .fmask 0x00000000,0
+ .set noreorder
+ .set nomacro
+
+ trunc.w.d $f0,$f12
+ mfc1 $24,$f0
+ j $31
+ addu $2,$24,$6
+
+ .set macro
+ .set reorder
+ .end m32_static1_dl
+
+ .align 2
+ .set mips16
+ .ent m16_static1_dl
+m16_static1_dl:
+ .frame $sp,24,$31 # vars= 0, regs= 2/0, args= 16, gp= 0
+ .mask 0x80010000,-4
+ .fmask 0x00000000,0
+ save 24,$16,$31
+ .set noreorder
+ .set nomacro
+ jal __mips16_fixdfsi
+ move $16,$6
+ .set macro
+ .set reorder
+
+ addu $2,$16
+ restore 24,$16,$31
+ j $31
+ .end m16_static1_dl
+ # Stub function for m16_static1_dl (double)
+ .set nomips16
+ .section .mips16.fn.m16_static1_dl,"ax",@progbits
+ .align 2
+ .ent __fn_stub_m16_static1_dl
+__fn_stub_m16_static1_dl:
+ .set noreorder
+ mfc1 $4,$f13
+ mfc1 $5,$f12
+ .set noat
+ la $1,m16_static1_dl
+ jr $1
+ .set at
+ nop
+ .set reorder
+ .end __fn_stub_m16_static1_dl
+ .previous
+
+ .align 2
+ .set nomips16
+ .ent m32_static32_dl
+m32_static32_dl:
+ .frame $sp,0,$31 # vars= 0, regs= 0/0, args= 0, gp= 0
+ .mask 0x00000000,0
+ .fmask 0x00000000,0
+ .set noreorder
+ .set nomacro
+
+ trunc.w.d $f0,$f12
+ mfc1 $24,$f0
+ j $31
+ addu $2,$24,$6
+
+ .set macro
+ .set reorder
+ .end m32_static32_dl
+
+ .align 2
+ .set mips16
+ .ent m16_static32_dl
+m16_static32_dl:
+ .frame $sp,24,$31 # vars= 0, regs= 2/0, args= 16, gp= 0
+ .mask 0x80010000,-4
+ .fmask 0x00000000,0
+ save 24,$16,$31
+ .set noreorder
+ .set nomacro
+ jal __mips16_fixdfsi
+ move $16,$6
+ .set macro
+ .set reorder
+
+ addu $2,$16
+ restore 24,$16,$31
+ j $31
+ .end m16_static32_dl
+ # Stub function for m16_static32_dl (double)
+ .set nomips16
+ .section .mips16.fn.m16_static32_dl,"ax",@progbits
+ .align 2
+ .ent __fn_stub_m16_static32_dl
+__fn_stub_m16_static32_dl:
+ .set noreorder
+ mfc1 $4,$f13
+ mfc1 $5,$f12
+ .set noat
+ la $1,m16_static32_dl
+ jr $1
+ .set at
+ nop
+ .set reorder
+ .end __fn_stub_m16_static32_dl
+ .previous
+
+ .align 2
+ .set nomips16
+ .ent m32_static16_dl
+m32_static16_dl:
+ .frame $sp,0,$31 # vars= 0, regs= 0/0, args= 0, gp= 0
+ .mask 0x00000000,0
+ .fmask 0x00000000,0
+ .set noreorder
+ .set nomacro
+
+ trunc.w.d $f0,$f12
+ mfc1 $24,$f0
+ j $31
+ addu $2,$24,$6
+
+ .set macro
+ .set reorder
+ .end m32_static16_dl
+
+ .align 2
+ .set mips16
+ .ent m16_static16_dl
+m16_static16_dl:
+ .frame $sp,24,$31 # vars= 0, regs= 2/0, args= 16, gp= 0
+ .mask 0x80010000,-4
+ .fmask 0x00000000,0
+ save 24,$16,$31
+ .set noreorder
+ .set nomacro
+ jal __mips16_fixdfsi
+ move $16,$6
+ .set macro
+ .set reorder
+
+ addu $2,$16
+ restore 24,$16,$31
+ j $31
+ .end m16_static16_dl
+ # Stub function for m16_static16_dl (double)
+ .set nomips16
+ .section .mips16.fn.m16_static16_dl,"ax",@progbits
+ .align 2
+ .ent __fn_stub_m16_static16_dl
+__fn_stub_m16_static16_dl:
+ .set noreorder
+ mfc1 $4,$f13
+ mfc1 $5,$f12
+ .set noat
+ la $1,m16_static16_dl
+ jr $1
+ .set at
+ nop
+ .set reorder
+ .end __fn_stub_m16_static16_dl
+ .previous
+
+ .align 2
+ .globl m32_dlld
+ .set nomips16
+ .ent m32_dlld
+m32_dlld:
+ .frame $sp,0,$31 # vars= 0, regs= 0/0, args= 0, gp= 0
+ .mask 0x00000000,0
+ .fmask 0x00000000,0
+ .set noreorder
+ .set nomacro
+
+ trunc.w.d $f1,$f12
+ mfc1 $4,$f1
+ addu $3,$4,$6
+ addu $2,$3,$7
+ ldc1 $f0,16($sp)
+ trunc.w.d $f2,$f0
+ mfc1 $24,$f2
+ j $31
+ addu $2,$2,$24
+
+ .set macro
+ .set reorder
+ .end m32_dlld
+
+ .align 2
+ .globl m16_dlld
+ .set mips16
+ .ent m16_dlld
+m16_dlld:
+ .frame $sp,32,$31 # vars= 0, regs= 3/0, args= 16, gp= 0
+ .mask 0x80030000,-4
+ .fmask 0x00000000,0
+ save 32,$16,$17,$31
+ move $16,$6
+ .set noreorder
+ .set nomacro
+ jal __mips16_fixdfsi
+ move $17,$7
+ .set macro
+ .set reorder
+
+ lw $5,52($sp)
+ lw $4,48($sp)
+ addu $16,$2,$16
+ .set noreorder
+ .set nomacro
+ jal __mips16_fixdfsi
+ addu $16,$17
+ .set macro
+ .set reorder
+
+ addu $2,$16,$2
+ restore 32,$16,$17,$31
+ j $31
+ .end m16_dlld
+ # Stub function for m16_dlld (double)
+ .set nomips16
+ .section .mips16.fn.m16_dlld,"ax",@progbits
+ .align 2
+ .ent __fn_stub_m16_dlld
+__fn_stub_m16_dlld:
+ .set noreorder
+ mfc1 $4,$f13
+ mfc1 $5,$f12
+ .set noat
+ la $1,m16_dlld
+ jr $1
+ .set at
+ nop
+ .set reorder
+ .end __fn_stub_m16_dlld
+ .previous
+
+ .align 2
+ .set nomips16
+ .ent m32_static_dlld
+m32_static_dlld:
+ .frame $sp,0,$31 # vars= 0, regs= 0/0, args= 0, gp= 0
+ .mask 0x00000000,0
+ .fmask 0x00000000,0
+ .set noreorder
+ .set nomacro
+
+ trunc.w.d $f1,$f12
+ mfc1 $4,$f1
+ addu $3,$4,$6
+ addu $2,$3,$7
+ ldc1 $f0,16($sp)
+ trunc.w.d $f2,$f0
+ mfc1 $24,$f2
+ j $31
+ addu $2,$2,$24
+
+ .set macro
+ .set reorder
+ .end m32_static_dlld
+
+ .align 2
+ .set mips16
+ .ent m16_static_dlld
+m16_static_dlld:
+ .frame $sp,32,$31 # vars= 0, regs= 3/0, args= 16, gp= 0
+ .mask 0x80030000,-4
+ .fmask 0x00000000,0
+ save 32,$16,$17,$31
+ move $16,$6
+ .set noreorder
+ .set nomacro
+ jal __mips16_fixdfsi
+ move $17,$7
+ .set macro
+ .set reorder
+
+ lw $5,52($sp)
+ lw $4,48($sp)
+ addu $16,$2,$16
+ .set noreorder
+ .set nomacro
+ jal __mips16_fixdfsi
+ addu $16,$17
+ .set macro
+ .set reorder
+
+ addu $2,$16,$2
+ restore 32,$16,$17,$31
+ j $31
+ .end m16_static_dlld
+ # Stub function for m16_static_dlld (double)
+ .set nomips16
+ .section .mips16.fn.m16_static_dlld,"ax",@progbits
+ .align 2
+ .ent __fn_stub_m16_static_dlld
+__fn_stub_m16_static_dlld:
+ .set noreorder
+ mfc1 $4,$f13
+ mfc1 $5,$f12
+ .set noat
+ la $1,m16_static_dlld
+ jr $1
+ .set at
+ nop
+ .set reorder
+ .end __fn_stub_m16_static_dlld
+ .previous
+
+ .align 2
+ .set nomips16
+ .ent m32_static1_dlld
+m32_static1_dlld:
+ .frame $sp,0,$31 # vars= 0, regs= 0/0, args= 0, gp= 0
+ .mask 0x00000000,0
+ .fmask 0x00000000,0
+ .set noreorder
+ .set nomacro
+
+ trunc.w.d $f1,$f12
+ mfc1 $4,$f1
+ addu $3,$4,$6
+ addu $2,$3,$7
+ ldc1 $f0,16($sp)
+ trunc.w.d $f2,$f0
+ mfc1 $24,$f2
+ j $31
+ addu $2,$2,$24
+
+ .set macro
+ .set reorder
+ .end m32_static1_dlld
+
+ .align 2
+ .set mips16
+ .ent m16_static1_dlld
+m16_static1_dlld:
+ .frame $sp,32,$31 # vars= 0, regs= 3/0, args= 16, gp= 0
+ .mask 0x80030000,-4
+ .fmask 0x00000000,0
+ save 32,$16,$17,$31
+ move $16,$6
+ .set noreorder
+ .set nomacro
+ jal __mips16_fixdfsi
+ move $17,$7
+ .set macro
+ .set reorder
+
+ lw $5,52($sp)
+ lw $4,48($sp)
+ addu $16,$2,$16
+ .set noreorder
+ .set nomacro
+ jal __mips16_fixdfsi
+ addu $16,$17
+ .set macro
+ .set reorder
+
+ addu $2,$16,$2
+ restore 32,$16,$17,$31
+ j $31
+ .end m16_static1_dlld
+ # Stub function for m16_static1_dlld (double)
+ .set nomips16
+ .section .mips16.fn.m16_static1_dlld,"ax",@progbits
+ .align 2
+ .ent __fn_stub_m16_static1_dlld
+__fn_stub_m16_static1_dlld:
+ .set noreorder
+ mfc1 $4,$f13
+ mfc1 $5,$f12
+ .set noat
+ la $1,m16_static1_dlld
+ jr $1
+ .set at
+ nop
+ .set reorder
+ .end __fn_stub_m16_static1_dlld
+ .previous
+
+ .align 2
+ .set nomips16
+ .ent m32_static32_dlld
+m32_static32_dlld:
+ .frame $sp,0,$31 # vars= 0, regs= 0/0, args= 0, gp= 0
+ .mask 0x00000000,0
+ .fmask 0x00000000,0
+ .set noreorder
+ .set nomacro
+
+ trunc.w.d $f1,$f12
+ mfc1 $4,$f1
+ addu $3,$4,$6
+ addu $2,$3,$7
+ ldc1 $f0,16($sp)
+ trunc.w.d $f2,$f0
+ mfc1 $24,$f2
+ j $31
+ addu $2,$2,$24
+
+ .set macro
+ .set reorder
+ .end m32_static32_dlld
+
+ .align 2
+ .set mips16
+ .ent m16_static32_dlld
+m16_static32_dlld:
+ .frame $sp,32,$31 # vars= 0, regs= 3/0, args= 16, gp= 0
+ .mask 0x80030000,-4
+ .fmask 0x00000000,0
+ save 32,$16,$17,$31
+ move $16,$6
+ .set noreorder
+ .set nomacro
+ jal __mips16_fixdfsi
+ move $17,$7
+ .set macro
+ .set reorder
+
+ lw $5,52($sp)
+ lw $4,48($sp)
+ addu $16,$2,$16
+ .set noreorder
+ .set nomacro
+ jal __mips16_fixdfsi
+ addu $16,$17
+ .set macro
+ .set reorder
+
+ addu $2,$16,$2
+ restore 32,$16,$17,$31
+ j $31
+ .end m16_static32_dlld
+ # Stub function for m16_static32_dlld (double)
+ .set nomips16
+ .section .mips16.fn.m16_static32_dlld,"ax",@progbits
+ .align 2
+ .ent __fn_stub_m16_static32_dlld
+__fn_stub_m16_static32_dlld:
+ .set noreorder
+ mfc1 $4,$f13
+ mfc1 $5,$f12
+ .set noat
+ la $1,m16_static32_dlld
+ jr $1
+ .set at
+ nop
+ .set reorder
+ .end __fn_stub_m16_static32_dlld
+ .previous
+
+ .align 2
+ .set nomips16
+ .ent m32_static16_dlld
+m32_static16_dlld:
+ .frame $sp,0,$31 # vars= 0, regs= 0/0, args= 0, gp= 0
+ .mask 0x00000000,0
+ .fmask 0x00000000,0
+ .set noreorder
+ .set nomacro
+
+ trunc.w.d $f1,$f12
+ mfc1 $4,$f1
+ addu $3,$4,$6
+ addu $2,$3,$7
+ ldc1 $f0,16($sp)
+ trunc.w.d $f2,$f0
+ mfc1 $24,$f2
+ j $31
+ addu $2,$2,$24
+
+ .set macro
+ .set reorder
+ .end m32_static16_dlld
+
+ .align 2
+ .set mips16
+ .ent m16_static16_dlld
+m16_static16_dlld:
+ .frame $sp,32,$31 # vars= 0, regs= 3/0, args= 16, gp= 0
+ .mask 0x80030000,-4
+ .fmask 0x00000000,0
+ save 32,$16,$17,$31
+ move $16,$6
+ .set noreorder
+ .set nomacro
+ jal __mips16_fixdfsi
+ move $17,$7
+ .set macro
+ .set reorder
+
+ lw $5,52($sp)
+ lw $4,48($sp)
+ addu $16,$2,$16
+ .set noreorder
+ .set nomacro
+ jal __mips16_fixdfsi
+ addu $16,$17
+ .set macro
+ .set reorder
+
+ addu $2,$16,$2
+ restore 32,$16,$17,$31
+ j $31
+ .end m16_static16_dlld
+ # Stub function for m16_static16_dlld (double)
+ .set nomips16
+ .section .mips16.fn.m16_static16_dlld,"ax",@progbits
+ .align 2
+ .ent __fn_stub_m16_static16_dlld
+__fn_stub_m16_static16_dlld:
+ .set noreorder
+ mfc1 $4,$f13
+ mfc1 $5,$f12
+ .set noat
+ la $1,m16_static16_dlld
+ jr $1
+ .set at
+ nop
+ .set reorder
+ .end __fn_stub_m16_static16_dlld
+ .previous
+
+ .align 2
+ .globl m32_d_l
+ .set nomips16
+ .ent m32_d_l
+m32_d_l:
+ .frame $sp,0,$31 # vars= 0, regs= 0/0, args= 0, gp= 0
+ .mask 0x00000000,0
+ .fmask 0x00000000,0
+ .set noreorder
+ .set nomacro
+
+ mtc1 $4,$f2
+ j $31
+ cvt.d.w $f0,$f2
+
+ .set macro
+ .set reorder
+ .end m32_d_l
+
+ .align 2
+ .globl m16_d_l
+ .set mips16
+ .ent m16_d_l
+m16_d_l:
+ .frame $sp,24,$31 # vars= 0, regs= 1/0, args= 16, gp= 0
+ .mask 0x80000000,-4
+ .fmask 0x00000000,0
+ save 24,$31
+ jal __mips16_floatsidf
+ jal __mips16_ret_df
+ restore 24,$31
+ j $31
+ .end m16_d_l
+
+ .align 2
+ .set nomips16
+ .ent m32_static_d_l
+m32_static_d_l:
+ .frame $sp,0,$31 # vars= 0, regs= 0/0, args= 0, gp= 0
+ .mask 0x00000000,0
+ .fmask 0x00000000,0
+ .set noreorder
+ .set nomacro
+
+ mtc1 $4,$f2
+ j $31
+ cvt.d.w $f0,$f2
+
+ .set macro
+ .set reorder
+ .end m32_static_d_l
+
+ .align 2
+ .set mips16
+ .ent m16_static_d_l
+m16_static_d_l:
+ .frame $sp,24,$31 # vars= 0, regs= 1/0, args= 16, gp= 0
+ .mask 0x80000000,-4
+ .fmask 0x00000000,0
+ save 24,$31
+ jal __mips16_floatsidf
+ jal __mips16_ret_df
+ restore 24,$31
+ j $31
+ .end m16_static_d_l
+
+ .align 2
+ .set nomips16
+ .ent m32_static1_d_l
+m32_static1_d_l:
+ .frame $sp,0,$31 # vars= 0, regs= 0/0, args= 0, gp= 0
+ .mask 0x00000000,0
+ .fmask 0x00000000,0
+ .set noreorder
+ .set nomacro
+
+ mtc1 $4,$f2
+ j $31
+ cvt.d.w $f0,$f2
+
+ .set macro
+ .set reorder
+ .end m32_static1_d_l
+
+ .align 2
+ .set mips16
+ .ent m16_static1_d_l
+m16_static1_d_l:
+ .frame $sp,24,$31 # vars= 0, regs= 1/0, args= 16, gp= 0
+ .mask 0x80000000,-4
+ .fmask 0x00000000,0
+ save 24,$31
+ jal __mips16_floatsidf
+ jal __mips16_ret_df
+ restore 24,$31
+ j $31
+ .end m16_static1_d_l
+
+ .align 2
+ .set nomips16
+ .ent m32_static32_d_l
+m32_static32_d_l:
+ .frame $sp,0,$31 # vars= 0, regs= 0/0, args= 0, gp= 0
+ .mask 0x00000000,0
+ .fmask 0x00000000,0
+ .set noreorder
+ .set nomacro
+
+ mtc1 $4,$f2
+ j $31
+ cvt.d.w $f0,$f2
+
+ .set macro
+ .set reorder
+ .end m32_static32_d_l
+
+ .align 2
+ .set mips16
+ .ent m16_static32_d_l
+m16_static32_d_l:
+ .frame $sp,24,$31 # vars= 0, regs= 1/0, args= 16, gp= 0
+ .mask 0x80000000,-4
+ .fmask 0x00000000,0
+ save 24,$31
+ jal __mips16_floatsidf
+ jal __mips16_ret_df
+ restore 24,$31
+ j $31
+ .end m16_static32_d_l
+
+ .align 2
+ .set nomips16
+ .ent m32_static16_d_l
+m32_static16_d_l:
+ .frame $sp,0,$31 # vars= 0, regs= 0/0, args= 0, gp= 0
+ .mask 0x00000000,0
+ .fmask 0x00000000,0
+ .set noreorder
+ .set nomacro
+
+ mtc1 $4,$f2
+ j $31
+ cvt.d.w $f0,$f2
+
+ .set macro
+ .set reorder
+ .end m32_static16_d_l
+
+ .align 2
+ .set mips16
+ .ent m16_static16_d_l
+m16_static16_d_l:
+ .frame $sp,24,$31 # vars= 0, regs= 1/0, args= 16, gp= 0
+ .mask 0x80000000,-4
+ .fmask 0x00000000,0
+ save 24,$31
+ jal __mips16_floatsidf
+ jal __mips16_ret_df
+ restore 24,$31
+ j $31
+ .end m16_static16_d_l
+
+ .align 2
+ .globl m32_d_d
+ .set nomips16
+ .ent m32_d_d
+m32_d_d:
+ .frame $sp,0,$31 # vars= 0, regs= 0/0, args= 0, gp= 0
+ .mask 0x00000000,0
+ .fmask 0x00000000,0
+ .set noreorder
+ .set nomacro
+
+ j $31
+ mov.d $f0,$f12
+
+ .set macro
+ .set reorder
+ .end m32_d_d
+
+ .align 2
+ .globl m16_d_d
+ .set mips16
+ .ent m16_d_d
+m16_d_d:
+ .frame $sp,8,$31 # vars= 0, regs= 1/0, args= 0, gp= 0
+ .mask 0x80000000,-4
+ .fmask 0x00000000,0
+ save 8,$31
+ move $3,$5
+ .set noreorder
+ .set nomacro
+ jal __mips16_ret_df
+ move $2,$4
+ .set macro
+ .set reorder
+
+ restore 8,$31
+ j $31
+ .end m16_d_d
+ # Stub function for m16_d_d (double)
+ .set nomips16
+ .section .mips16.fn.m16_d_d,"ax",@progbits
+ .align 2
+ .ent __fn_stub_m16_d_d
+__fn_stub_m16_d_d:
+ .set noreorder
+ mfc1 $4,$f13
+ mfc1 $5,$f12
+ .set noat
+ la $1,m16_d_d
+ jr $1
+ .set at
+ nop
+ .set reorder
+ .end __fn_stub_m16_d_d
+ .previous
+
+ .align 2
+ .set nomips16
+ .ent m32_static_d_d
+m32_static_d_d:
+ .frame $sp,0,$31 # vars= 0, regs= 0/0, args= 0, gp= 0
+ .mask 0x00000000,0
+ .fmask 0x00000000,0
+ .set noreorder
+ .set nomacro
+
+ j $31
+ mov.d $f0,$f12
+
+ .set macro
+ .set reorder
+ .end m32_static_d_d
+
+ .align 2
+ .set mips16
+ .ent m16_static_d_d
+m16_static_d_d:
+ .frame $sp,8,$31 # vars= 0, regs= 1/0, args= 0, gp= 0
+ .mask 0x80000000,-4
+ .fmask 0x00000000,0
+ save 8,$31
+ move $3,$5
+ .set noreorder
+ .set nomacro
+ jal __mips16_ret_df
+ move $2,$4
+ .set macro
+ .set reorder
+
+ restore 8,$31
+ j $31
+ .end m16_static_d_d
+ # Stub function for m16_static_d_d (double)
+ .set nomips16
+ .section .mips16.fn.m16_static_d_d,"ax",@progbits
+ .align 2
+ .ent __fn_stub_m16_static_d_d
+__fn_stub_m16_static_d_d:
+ .set noreorder
+ mfc1 $4,$f13
+ mfc1 $5,$f12
+ .set noat
+ la $1,m16_static_d_d
+ jr $1
+ .set at
+ nop
+ .set reorder
+ .end __fn_stub_m16_static_d_d
+ .previous
+
+ .align 2
+ .set nomips16
+ .ent m32_static1_d_d
+m32_static1_d_d:
+ .frame $sp,0,$31 # vars= 0, regs= 0/0, args= 0, gp= 0
+ .mask 0x00000000,0
+ .fmask 0x00000000,0
+ .set noreorder
+ .set nomacro
+
+ j $31
+ mov.d $f0,$f12
+
+ .set macro
+ .set reorder
+ .end m32_static1_d_d
+
+ .align 2
+ .set mips16
+ .ent m16_static1_d_d
+m16_static1_d_d:
+ .frame $sp,8,$31 # vars= 0, regs= 1/0, args= 0, gp= 0
+ .mask 0x80000000,-4
+ .fmask 0x00000000,0
+ save 8,$31
+ move $3,$5
+ .set noreorder
+ .set nomacro
+ jal __mips16_ret_df
+ move $2,$4
+ .set macro
+ .set reorder
+
+ restore 8,$31
+ j $31
+ .end m16_static1_d_d
+ # Stub function for m16_static1_d_d (double)
+ .set nomips16
+ .section .mips16.fn.m16_static1_d_d,"ax",@progbits
+ .align 2
+ .ent __fn_stub_m16_static1_d_d
+__fn_stub_m16_static1_d_d:
+ .set noreorder
+ mfc1 $4,$f13
+ mfc1 $5,$f12
+ .set noat
+ la $1,m16_static1_d_d
+ jr $1
+ .set at
+ nop
+ .set reorder
+ .end __fn_stub_m16_static1_d_d
+ .previous
+
+ .align 2
+ .set nomips16
+ .ent m32_static32_d_d
+m32_static32_d_d:
+ .frame $sp,0,$31 # vars= 0, regs= 0/0, args= 0, gp= 0
+ .mask 0x00000000,0
+ .fmask 0x00000000,0
+ .set noreorder
+ .set nomacro
+
+ j $31
+ mov.d $f0,$f12
+
+ .set macro
+ .set reorder
+ .end m32_static32_d_d
+
+ .align 2
+ .set mips16
+ .ent m16_static32_d_d
+m16_static32_d_d:
+ .frame $sp,8,$31 # vars= 0, regs= 1/0, args= 0, gp= 0
+ .mask 0x80000000,-4
+ .fmask 0x00000000,0
+ save 8,$31
+ move $3,$5
+ .set noreorder
+ .set nomacro
+ jal __mips16_ret_df
+ move $2,$4
+ .set macro
+ .set reorder
+
+ restore 8,$31
+ j $31
+ .end m16_static32_d_d
+ # Stub function for m16_static32_d_d (double)
+ .set nomips16
+ .section .mips16.fn.m16_static32_d_d,"ax",@progbits
+ .align 2
+ .ent __fn_stub_m16_static32_d_d
+__fn_stub_m16_static32_d_d:
+ .set noreorder
+ mfc1 $4,$f13
+ mfc1 $5,$f12
+ .set noat
+ la $1,m16_static32_d_d
+ jr $1
+ .set at
+ nop
+ .set reorder
+ .end __fn_stub_m16_static32_d_d
+ .previous
+
+ .align 2
+ .set nomips16
+ .ent m32_static16_d_d
+m32_static16_d_d:
+ .frame $sp,0,$31 # vars= 0, regs= 0/0, args= 0, gp= 0
+ .mask 0x00000000,0
+ .fmask 0x00000000,0
+ .set noreorder
+ .set nomacro
+
+ j $31
+ mov.d $f0,$f12
+
+ .set macro
+ .set reorder
+ .end m32_static16_d_d
+
+ .align 2
+ .set mips16
+ .ent m16_static16_d_d
+m16_static16_d_d:
+ .frame $sp,8,$31 # vars= 0, regs= 1/0, args= 0, gp= 0
+ .mask 0x80000000,-4
+ .fmask 0x00000000,0
+ save 8,$31
+ move $3,$5
+ .set noreorder
+ .set nomacro
+ jal __mips16_ret_df
+ move $2,$4
+ .set macro
+ .set reorder
+
+ restore 8,$31
+ j $31
+ .end m16_static16_d_d
+ # Stub function for m16_static16_d_d (double)
+ .set nomips16
+ .section .mips16.fn.m16_static16_d_d,"ax",@progbits
+ .align 2
+ .ent __fn_stub_m16_static16_d_d
+__fn_stub_m16_static16_d_d:
+ .set noreorder
+ mfc1 $4,$f13
+ mfc1 $5,$f12
+ .set noat
+ la $1,m16_static16_d_d
+ jr $1
+ .set at
+ nop
+ .set reorder
+ .end __fn_stub_m16_static16_d_d
+ .previous
+
+ .align 2
+ .globl f32
+ .set nomips16
+ .ent f32
+f32:
+ .frame $sp,64,$31 # vars= 0, regs= 3/3, args= 24, gp= 0
+ .mask 0x80030000,-32
+ .fmask 0x03f00000,-8
+ .set noreorder
+ .set nomacro
+
+ addiu $sp,$sp,-64
+ sw $17,28($sp)
+ move $17,$4
+ sw $31,32($sp)
+ sdc1 $f24,56($sp)
+ sw $16,24($sp)
+ sdc1 $f22,48($sp)
+ sdc1 $f20,40($sp)
+ mtc1 $7,$f22
+ jal m32_static1_l
+ mtc1 $6,$f23
+
+ move $4,$17
+ jal m16_static1_l
+ move $16,$2
+
+ addu $16,$16,$2
+ jal m32_static1_d
+ mov.d $f12,$f22
+
+ addu $16,$16,$2
+ jal m16_static1_d
+ mov.d $f12,$f22
+
+ move $4,$17
+ mfc1 $7,$f22
+ mfc1 $6,$f23
+ jal m32_static1_ld
+ addu $16,$16,$2
+
+ move $4,$17
+ mfc1 $7,$f22
+ mfc1 $6,$f23
+ jal m16_static1_ld
+ addu $16,$16,$2
+
+ move $6,$17
+ mov.d $f12,$f22
+ jal m32_static1_dl
+ addu $16,$16,$2
+
+ move $6,$17
+ mov.d $f12,$f22
+ jal m16_static1_dl
+ addu $16,$16,$2
+
+ move $6,$17
+ move $7,$17
+ sdc1 $f22,16($sp)
+ mov.d $f12,$f22
+ jal m32_static1_dlld
+ addu $16,$16,$2
+
+ move $6,$17
+ move $7,$17
+ mov.d $f12,$f22
+ sdc1 $f22,16($sp)
+ jal m16_static1_dlld
+ addu $16,$16,$2
+
+ move $4,$17
+ jal m32_static1_d_l
+ addu $16,$16,$2
+
+ move $4,$17
+ jal m16_static1_d_l
+ mov.d $f20,$f0
+
+ add.d $f20,$f20,$f0
+ jal m32_static1_d_d
+ mov.d $f12,$f22
+
+ add.d $f20,$f20,$f0
+ jal m16_static1_d_d
+ mov.d $f12,$f22
+
+ move $4,$17
+ jal m32_static32_l
+ add.d $f20,$f20,$f0
+
+ move $4,$17
+ jal m16_static32_l
+ addu $16,$16,$2
+
+ addu $16,$16,$2
+ jal m32_static32_d
+ mov.d $f12,$f22
+
+ addu $16,$16,$2
+ jal m16_static32_d
+ mov.d $f12,$f22
+
+ move $4,$17
+ mfc1 $7,$f22
+ mfc1 $6,$f23
+ jal m32_static32_ld
+ addu $16,$16,$2
+
+ move $4,$17
+ mfc1 $7,$f22
+ mfc1 $6,$f23
+ jal m16_static32_ld
+ addu $16,$16,$2
+
+ move $6,$17
+ mov.d $f12,$f22
+ jal m32_static32_dl
+ addu $16,$16,$2
+
+ move $6,$17
+ mov.d $f12,$f22
+ jal m16_static32_dl
+ addu $16,$16,$2
+
+ move $6,$17
+ move $7,$17
+ sdc1 $f22,16($sp)
+ mov.d $f12,$f22
+ jal m32_static32_dlld
+ addu $16,$16,$2
+
+ move $6,$17
+ move $7,$17
+ mov.d $f12,$f22
+ sdc1 $f22,16($sp)
+ jal m16_static32_dlld
+ addu $16,$16,$2
+
+ move $4,$17
+ jal m32_static32_d_l
+ addu $16,$16,$2
+
+ move $4,$17
+ jal m16_static32_d_l
+ add.d $f20,$f20,$f0
+
+ add.d $f20,$f20,$f0
+ jal m32_static32_d_d
+ mov.d $f12,$f22
+
+ mtc1 $16,$f24
+ add.d $f20,$f20,$f0
+ jal m16_static32_d_d
+ mov.d $f12,$f22
+
+ lw $31,32($sp)
+ lw $17,28($sp)
+ lw $16,24($sp)
+ add.d $f20,$f20,$f0
+ ldc1 $f22,48($sp)
+ cvt.d.w $f0,$f24
+ ldc1 $f24,56($sp)
+ add.d $f0,$f0,$f20
+ ldc1 $f20,40($sp)
+ j $31
+ addiu $sp,$sp,64
+
+ .set macro
+ .set reorder
+ .end f32
+
+ # Stub function to call m32_static1_d (double)
+ .set nomips16
+ .section .mips16.call.m32_static1_d,"ax",@progbits
+ .align 2
+ .ent __call_stub_m32_static1_d
+__call_stub_m32_static1_d:
+ .set noreorder
+ mtc1 $4,$f13
+ mtc1 $5,$f12
+ .set noat
+ la $1,m32_static1_d
+ jr $1
+ .set at
+ nop
+ .set reorder
+ .end __call_stub_m32_static1_d
+ .previous
+
+ # Stub function to call m16_static1_d (double)
+ .set nomips16
+ .section .mips16.call.m16_static1_d,"ax",@progbits
+ .align 2
+ .ent __call_stub_m16_static1_d
+__call_stub_m16_static1_d:
+ .set noreorder
+ mtc1 $4,$f13
+ mtc1 $5,$f12
+ .set noat
+ la $1,m16_static1_d
+ jr $1
+ .set at
+ nop
+ .set reorder
+ .end __call_stub_m16_static1_d
+ .previous
+
+ # Stub function to call m32_static1_dl (double)
+ .set nomips16
+ .section .mips16.call.m32_static1_dl,"ax",@progbits
+ .align 2
+ .ent __call_stub_m32_static1_dl
+__call_stub_m32_static1_dl:
+ .set noreorder
+ mtc1 $4,$f13
+ mtc1 $5,$f12
+ .set noat
+ la $1,m32_static1_dl
+ jr $1
+ .set at
+ nop
+ .set reorder
+ .end __call_stub_m32_static1_dl
+ .previous
+
+ # Stub function to call m16_static1_dl (double)
+ .set nomips16
+ .section .mips16.call.m16_static1_dl,"ax",@progbits
+ .align 2
+ .ent __call_stub_m16_static1_dl
+__call_stub_m16_static1_dl:
+ .set noreorder
+ mtc1 $4,$f13
+ mtc1 $5,$f12
+ .set noat
+ la $1,m16_static1_dl
+ jr $1
+ .set at
+ nop
+ .set reorder
+ .end __call_stub_m16_static1_dl
+ .previous
+
+ # Stub function to call m32_static1_dlld (double)
+ .set nomips16
+ .section .mips16.call.m32_static1_dlld,"ax",@progbits
+ .align 2
+ .ent __call_stub_m32_static1_dlld
+__call_stub_m32_static1_dlld:
+ .set noreorder
+ mtc1 $4,$f13
+ mtc1 $5,$f12
+ .set noat
+ la $1,m32_static1_dlld
+ jr $1
+ .set at
+ nop
+ .set reorder
+ .end __call_stub_m32_static1_dlld
+ .previous
+
+ # Stub function to call m16_static1_dlld (double)
+ .set nomips16
+ .section .mips16.call.m16_static1_dlld,"ax",@progbits
+ .align 2
+ .ent __call_stub_m16_static1_dlld
+__call_stub_m16_static1_dlld:
+ .set noreorder
+ mtc1 $4,$f13
+ mtc1 $5,$f12
+ .set noat
+ la $1,m16_static1_dlld
+ jr $1
+ .set at
+ nop
+ .set reorder
+ .end __call_stub_m16_static1_dlld
+ .previous
+
+ # Stub function to call double m32_static1_d_l ()
+ .set nomips16
+ .section .mips16.call.fp.m32_static1_d_l,"ax",@progbits
+ .align 2
+ .ent __call_stub_fp_m32_static1_d_l
+__call_stub_fp_m32_static1_d_l:
+ .set noreorder
+ move $18,$31
+ jal m32_static1_d_l
+ nop
+ mfc1 $2,$f1
+ mfc1 $3,$f0
+ j $18
+ nop
+ .set reorder
+ .end __call_stub_fp_m32_static1_d_l
+ .previous
+
+ # Stub function to call double m16_static1_d_l ()
+ .set nomips16
+ .section .mips16.call.fp.m16_static1_d_l,"ax",@progbits
+ .align 2
+ .ent __call_stub_fp_m16_static1_d_l
+__call_stub_fp_m16_static1_d_l:
+ .set noreorder
+ move $18,$31
+ jal m16_static1_d_l
+ nop
+ mfc1 $2,$f1
+ mfc1 $3,$f0
+ j $18
+ nop
+ .set reorder
+ .end __call_stub_fp_m16_static1_d_l
+ .previous
+
+ # Stub function to call double m32_static1_d_d (double)
+ .set nomips16
+ .section .mips16.call.fp.m32_static1_d_d,"ax",@progbits
+ .align 2
+ .ent __call_stub_fp_m32_static1_d_d
+__call_stub_fp_m32_static1_d_d:
+ .set noreorder
+ mtc1 $4,$f13
+ mtc1 $5,$f12
+ move $18,$31
+ jal m32_static1_d_d
+ nop
+ mfc1 $2,$f1
+ mfc1 $3,$f0
+ j $18
+ nop
+ .set reorder
+ .end __call_stub_fp_m32_static1_d_d
+ .previous
+
+ # Stub function to call double m16_static1_d_d (double)
+ .set nomips16
+ .section .mips16.call.fp.m16_static1_d_d,"ax",@progbits
+ .align 2
+ .ent __call_stub_fp_m16_static1_d_d
+__call_stub_fp_m16_static1_d_d:
+ .set noreorder
+ mtc1 $4,$f13
+ mtc1 $5,$f12
+ move $18,$31
+ jal m16_static1_d_d
+ nop
+ mfc1 $2,$f1
+ mfc1 $3,$f0
+ j $18
+ nop
+ .set reorder
+ .end __call_stub_fp_m16_static1_d_d
+ .previous
+
+ # Stub function to call m32_static16_d (double)
+ .set nomips16
+ .section .mips16.call.m32_static16_d,"ax",@progbits
+ .align 2
+ .ent __call_stub_m32_static16_d
+__call_stub_m32_static16_d:
+ .set noreorder
+ mtc1 $4,$f13
+ mtc1 $5,$f12
+ .set noat
+ la $1,m32_static16_d
+ jr $1
+ .set at
+ nop
+ .set reorder
+ .end __call_stub_m32_static16_d
+ .previous
+
+ # Stub function to call m16_static16_d (double)
+ .set nomips16
+ .section .mips16.call.m16_static16_d,"ax",@progbits
+ .align 2
+ .ent __call_stub_m16_static16_d
+__call_stub_m16_static16_d:
+ .set noreorder
+ mtc1 $4,$f13
+ mtc1 $5,$f12
+ .set noat
+ la $1,m16_static16_d
+ jr $1
+ .set at
+ nop
+ .set reorder
+ .end __call_stub_m16_static16_d
+ .previous
+
+ # Stub function to call m32_static16_dl (double)
+ .set nomips16
+ .section .mips16.call.m32_static16_dl,"ax",@progbits
+ .align 2
+ .ent __call_stub_m32_static16_dl
+__call_stub_m32_static16_dl:
+ .set noreorder
+ mtc1 $4,$f13
+ mtc1 $5,$f12
+ .set noat
+ la $1,m32_static16_dl
+ jr $1
+ .set at
+ nop
+ .set reorder
+ .end __call_stub_m32_static16_dl
+ .previous
+
+ # Stub function to call m16_static16_dl (double)
+ .set nomips16
+ .section .mips16.call.m16_static16_dl,"ax",@progbits
+ .align 2
+ .ent __call_stub_m16_static16_dl
+__call_stub_m16_static16_dl:
+ .set noreorder
+ mtc1 $4,$f13
+ mtc1 $5,$f12
+ .set noat
+ la $1,m16_static16_dl
+ jr $1
+ .set at
+ nop
+ .set reorder
+ .end __call_stub_m16_static16_dl
+ .previous
+
+ # Stub function to call m32_static16_dlld (double)
+ .set nomips16
+ .section .mips16.call.m32_static16_dlld,"ax",@progbits
+ .align 2
+ .ent __call_stub_m32_static16_dlld
+__call_stub_m32_static16_dlld:
+ .set noreorder
+ mtc1 $4,$f13
+ mtc1 $5,$f12
+ .set noat
+ la $1,m32_static16_dlld
+ jr $1
+ .set at
+ nop
+ .set reorder
+ .end __call_stub_m32_static16_dlld
+ .previous
+
+ # Stub function to call m16_static16_dlld (double)
+ .set nomips16
+ .section .mips16.call.m16_static16_dlld,"ax",@progbits
+ .align 2
+ .ent __call_stub_m16_static16_dlld
+__call_stub_m16_static16_dlld:
+ .set noreorder
+ mtc1 $4,$f13
+ mtc1 $5,$f12
+ .set noat
+ la $1,m16_static16_dlld
+ jr $1
+ .set at
+ nop
+ .set reorder
+ .end __call_stub_m16_static16_dlld
+ .previous
+
+ # Stub function to call double m32_static16_d_l ()
+ .set nomips16
+ .section .mips16.call.fp.m32_static16_d_l,"ax",@progbits
+ .align 2
+ .ent __call_stub_fp_m32_static16_d_l
+__call_stub_fp_m32_static16_d_l:
+ .set noreorder
+ move $18,$31
+ jal m32_static16_d_l
+ nop
+ mfc1 $2,$f1
+ mfc1 $3,$f0
+ j $18
+ nop
+ .set reorder
+ .end __call_stub_fp_m32_static16_d_l
+ .previous
+
+ # Stub function to call double m16_static16_d_l ()
+ .set nomips16
+ .section .mips16.call.fp.m16_static16_d_l,"ax",@progbits
+ .align 2
+ .ent __call_stub_fp_m16_static16_d_l
+__call_stub_fp_m16_static16_d_l:
+ .set noreorder
+ move $18,$31
+ jal m16_static16_d_l
+ nop
+ mfc1 $2,$f1
+ mfc1 $3,$f0
+ j $18
+ nop
+ .set reorder
+ .end __call_stub_fp_m16_static16_d_l
+ .previous
+
+ # Stub function to call double m32_static16_d_d (double)
+ .set nomips16
+ .section .mips16.call.fp.m32_static16_d_d,"ax",@progbits
+ .align 2
+ .ent __call_stub_fp_m32_static16_d_d
+__call_stub_fp_m32_static16_d_d:
+ .set noreorder
+ mtc1 $4,$f13
+ mtc1 $5,$f12
+ move $18,$31
+ jal m32_static16_d_d
+ nop
+ mfc1 $2,$f1
+ mfc1 $3,$f0
+ j $18
+ nop
+ .set reorder
+ .end __call_stub_fp_m32_static16_d_d
+ .previous
+
+ # Stub function to call double m16_static16_d_d (double)
+ .set nomips16
+ .section .mips16.call.fp.m16_static16_d_d,"ax",@progbits
+ .align 2
+ .ent __call_stub_fp_m16_static16_d_d
+__call_stub_fp_m16_static16_d_d:
+ .set noreorder
+ mtc1 $4,$f13
+ mtc1 $5,$f12
+ move $18,$31
+ jal m16_static16_d_d
+ nop
+ mfc1 $2,$f1
+ mfc1 $3,$f0
+ j $18
+ nop
+ .set reorder
+ .end __call_stub_fp_m16_static16_d_d
+ .previous
+
+ .align 2
+ .globl f16
+ .set mips16
+ .ent f16
+f16:
+ .frame $sp,104,$31 # vars= 64, regs= 4/0, args= 24, gp= 0
+ .mask 0x80070000,-4
+ .fmask 0x00000000,0
+ save 104,$16,$17,$18,$31
+ move $17,$4
+ sw $7,116($sp)
+ .set noreorder
+ .set nomacro
+ jal m32_static1_l
+ sw $6,112($sp)
+ .set macro
+ .set reorder
+
+ move $4,$17
+ .set noreorder
+ .set nomacro
+ jal m16_static1_l
+ move $16,$2
+ .set macro
+ .set reorder
+
+ lw $5,116($sp)
+ lw $4,112($sp)
+ .set noreorder
+ .set nomacro
+ jal m32_static1_d
+ addu $16,$2
+ .set macro
+ .set reorder
+
+ lw $5,116($sp)
+ lw $4,112($sp)
+ .set noreorder
+ .set nomacro
+ jal m16_static1_d
+ addu $16,$2
+ .set macro
+ .set reorder
+
+ lw $7,116($sp)
+ lw $6,112($sp)
+ move $4,$17
+ .set noreorder
+ .set nomacro
+ jal m32_static1_ld
+ addu $16,$2
+ .set macro
+ .set reorder
+
+ lw $7,116($sp)
+ lw $6,112($sp)
+ move $4,$17
+ .set noreorder
+ .set nomacro
+ jal m16_static1_ld
+ addu $16,$2
+ .set macro
+ .set reorder
+
+ lw $5,116($sp)
+ lw $4,112($sp)
+ move $6,$17
+ .set noreorder
+ .set nomacro
+ jal m32_static1_dl
+ addu $16,$2
+ .set macro
+ .set reorder
+
+ lw $5,116($sp)
+ lw $4,112($sp)
+ move $6,$17
+ .set noreorder
+ .set nomacro
+ jal m16_static1_dl
+ addu $16,$2
+ .set macro
+ .set reorder
+
+ lw $3,116($sp)
+ lw $6,112($sp)
+ sw $3,20($sp)
+ move $5,$3
+ sw $6,16($sp)
+ move $4,$6
+ move $7,$17
+ move $6,$17
+ .set noreorder
+ .set nomacro
+ jal m32_static1_dlld
+ addu $16,$2
+ .set macro
+ .set reorder
+
+ addu $16,$2
+ lw $7,112($sp)
+ lw $2,116($sp)
+ move $6,$17
+ move $5,$2
+ sw $7,16($sp)
+ move $4,$7
+ sw $2,20($sp)
+ .set noreorder
+ .set nomacro
+ jal m16_static1_dlld
+ move $7,$17
+ .set macro
+ .set reorder
+
+ move $4,$17
+ .set noreorder
+ .set nomacro
+ jal m32_static1_d_l
+ addu $16,$2
+ .set macro
+ .set reorder
+
+ move $4,$17
+ sw $3,28($sp)
+ .set noreorder
+ .set nomacro
+ jal m16_static1_d_l
+ sw $2,24($sp)
+ .set macro
+ .set reorder
+
+ lw $5,28($sp)
+ lw $4,24($sp)
+ move $7,$3
+ .set noreorder
+ .set nomacro
+ jal __mips16_adddf3
+ move $6,$2
+ .set macro
+ .set reorder
+
+ lw $5,116($sp)
+ lw $4,112($sp)
+ sw $3,36($sp)
+ .set noreorder
+ .set nomacro
+ jal m32_static1_d_d
+ sw $2,32($sp)
+ .set macro
+ .set reorder
+
+ lw $5,36($sp)
+ lw $4,32($sp)
+ move $7,$3
+ .set noreorder
+ .set nomacro
+ jal __mips16_adddf3
+ move $6,$2
+ .set macro
+ .set reorder
+
+ lw $5,116($sp)
+ lw $4,112($sp)
+ sw $3,44($sp)
+ .set noreorder
+ .set nomacro
+ jal m16_static1_d_d
+ sw $2,40($sp)
+ .set macro
+ .set reorder
+
+ lw $5,44($sp)
+ lw $4,40($sp)
+ move $7,$3
+ .set noreorder
+ .set nomacro
+ jal __mips16_adddf3
+ move $6,$2
+ .set macro
+ .set reorder
+
+ move $4,$17
+ sw $3,52($sp)
+ .set noreorder
+ .set nomacro
+ jal m32_static16_l
+ sw $2,48($sp)
+ .set macro
+ .set reorder
+
+ move $4,$17
+ .set noreorder
+ .set nomacro
+ jal m16_static16_l
+ addu $16,$2
+ .set macro
+ .set reorder
+
+ lw $5,116($sp)
+ lw $4,112($sp)
+ .set noreorder
+ .set nomacro
+ jal m32_static16_d
+ addu $16,$2
+ .set macro
+ .set reorder
+
+ lw $5,116($sp)
+ lw $4,112($sp)
+ .set noreorder
+ .set nomacro
+ jal m16_static16_d
+ addu $16,$2
+ .set macro
+ .set reorder
+
+ lw $7,116($sp)
+ lw $6,112($sp)
+ move $4,$17
+ .set noreorder
+ .set nomacro
+ jal m32_static16_ld
+ addu $16,$2
+ .set macro
+ .set reorder
+
+ lw $7,116($sp)
+ lw $6,112($sp)
+ move $4,$17
+ .set noreorder
+ .set nomacro
+ jal m16_static16_ld
+ addu $16,$2
+ .set macro
+ .set reorder
+
+ lw $5,116($sp)
+ lw $4,112($sp)
+ move $6,$17
+ .set noreorder
+ .set nomacro
+ jal m32_static16_dl
+ addu $16,$2
+ .set macro
+ .set reorder
+
+ lw $5,116($sp)
+ lw $4,112($sp)
+ move $6,$17
+ .set noreorder
+ .set nomacro
+ jal m16_static16_dl
+ addu $16,$2
+ .set macro
+ .set reorder
+
+ lw $4,116($sp)
+ lw $6,112($sp)
+ sw $4,20($sp)
+ sw $6,16($sp)
+ move $5,$4
+ move $7,$17
+ move $4,$6
+ move $6,$17
+ .set noreorder
+ .set nomacro
+ jal m32_static16_dlld
+ addu $16,$2
+ .set macro
+ .set reorder
+
+ addu $16,$2
+ lw $3,116($sp)
+ lw $2,112($sp)
+ move $6,$17
+ move $7,$17
+ sw $3,20($sp)
+ move $5,$3
+ sw $2,16($sp)
+ .set noreorder
+ .set nomacro
+ jal m16_static16_dlld
+ move $4,$2
+ .set macro
+ .set reorder
+
+ move $4,$17
+ .set noreorder
+ .set nomacro
+ jal m32_static16_d_l
+ addu $16,$2
+ .set macro
+ .set reorder
+
+ lw $5,52($sp)
+ lw $4,48($sp)
+ move $7,$3
+ .set noreorder
+ .set nomacro
+ jal __mips16_adddf3
+ move $6,$2
+ .set macro
+ .set reorder
+
+ move $4,$17
+ sw $3,60($sp)
+ .set noreorder
+ .set nomacro
+ jal m16_static16_d_l
+ sw $2,56($sp)
+ .set macro
+ .set reorder
+
+ lw $5,60($sp)
+ lw $4,56($sp)
+ move $7,$3
+ .set noreorder
+ .set nomacro
+ jal __mips16_adddf3
+ move $6,$2
+ .set macro
+ .set reorder
+
+ lw $5,116($sp)
+ lw $4,112($sp)
+ sw $3,68($sp)
+ .set noreorder
+ .set nomacro
+ jal m32_static16_d_d
+ sw $2,64($sp)
+ .set macro
+ .set reorder
+
+ lw $5,68($sp)
+ lw $4,64($sp)
+ move $7,$3
+ .set noreorder
+ .set nomacro
+ jal __mips16_adddf3
+ move $6,$2
+ .set macro
+ .set reorder
+
+ lw $5,116($sp)
+ lw $4,112($sp)
+ sw $3,76($sp)
+ .set noreorder
+ .set nomacro
+ jal m16_static16_d_d
+ sw $2,72($sp)
+ .set macro
+ .set reorder
+
+ lw $5,76($sp)
+ lw $4,72($sp)
+ move $7,$3
+ .set noreorder
+ .set nomacro
+ jal __mips16_adddf3
+ move $6,$2
+ .set macro
+ .set reorder
+
+ move $4,$16
+ sw $3,84($sp)
+ .set noreorder
+ .set nomacro
+ jal __mips16_floatsidf
+ sw $2,80($sp)
+ .set macro
+ .set reorder
+
+ lw $7,84($sp)
+ lw $6,80($sp)
+ move $5,$3
+ .set noreorder
+ .set nomacro
+ jal __mips16_adddf3
+ move $4,$2
+ .set macro
+ .set reorder
+
+ jal __mips16_ret_df
+ restore 104,$16,$17,$18,$31
+ j $31
+ .end f16
diff --git a/ld/testsuite/ChangeLog b/ld/testsuite/ChangeLog
index 7e8c199..42fd441 100644
--- a/ld/testsuite/ChangeLog
+++ b/ld/testsuite/ChangeLog
@@ -1,3 +1,9 @@
+2006-11-01 Thiemo Seufer <ths@mips.com>
+
+ * ld-mips-elf/mips16-intermix-1.s, ld-mips-elf/mips16-intermix-2.s,
+ ld-mips-elf/mips16-intermix.d: New testcase.
+ * ld-mips-elf/mips-elf.exp (mips16_intermix_test): Run new testcases.
+
2006-10-29 Kaz Kojima <kkojima@rr.iij4u.or.jp>
* ld-sh/sh64/abi32.xd, ld-sh/sh64/abi64.xd, ld-sh/sh64/cmpct1.xd,
diff --git a/ld/testsuite/ld-mips-elf/mips-elf.exp b/ld/testsuite/ld-mips-elf/mips-elf.exp
index f3d4707..5bb5c38 100644
--- a/ld/testsuite/ld-mips-elf/mips-elf.exp
+++ b/ld/testsuite/ld-mips-elf/mips-elf.exp
@@ -259,3 +259,13 @@ set mips16_call_global_test {
}
run_ld_link_tests $mips16_call_global_test
+
+set mips16_intermix_test {
+ {"Intermixing mips32 and mips16 functions"
+ ""
+ "-mips32r2" {mips16-intermix-1.s mips16-intermix-2.s}
+ {{objdump -t mips16-intermix.d}}
+ "mips16-intermix"}
+}
+
+run_ld_link_tests $mips16_intermix_test
diff --git a/ld/testsuite/ld-mips-elf/mips16-intermix-1.s b/ld/testsuite/ld-mips-elf/mips16-intermix-1.s
new file mode 100644
index 0000000..c596619
--- /dev/null
+++ b/ld/testsuite/ld-mips-elf/mips16-intermix-1.s
@@ -0,0 +1,104 @@
+ .text
+ .align 2
+ .globl __start
+ .set nomips16
+ .ent __start
+__start:
+ .frame $sp,56,$31 # vars= 0, regs= 3/2, args= 24, gp= 0
+ .mask 0x80030000,-24
+ .fmask 0x00f00000,-8
+ .set noreorder
+ .set nomacro
+
+ addiu $sp,$sp,-56
+ sw $31,32($sp)
+ sw $17,28($sp)
+ sw $16,24($sp)
+ sdc1 $f22,48($sp)
+ sdc1 $f20,40($sp)
+ jal m32_l
+ move $4,$17
+
+ move $4,$17
+ jal m16_l
+ move $16,$2
+
+ addu $16,$16,$2
+ jal m32_d
+ mov.d $f12,$f22
+
+ addu $16,$16,$2
+ jal m16_d
+ mov.d $f12,$f22
+
+ move $4,$17
+ mfc1 $7,$f22
+ mfc1 $6,$f23
+ jal m32_ld
+ addu $16,$16,$2
+
+ move $4,$17
+ mfc1 $7,$f22
+ mfc1 $6,$f23
+ jal m16_ld
+ addu $16,$16,$2
+
+ move $6,$17
+ mov.d $f12,$f22
+ jal m32_dl
+ addu $16,$16,$2
+
+ move $6,$17
+ mov.d $f12,$f22
+ jal m16_dl
+ addu $16,$16,$2
+
+ move $6,$17
+ move $7,$17
+ sdc1 $f22,16($sp)
+ mov.d $f12,$f22
+ jal m32_dlld
+ addu $16,$16,$2
+
+ move $6,$17
+ move $7,$17
+ mov.d $f12,$f22
+ sdc1 $f22,16($sp)
+ jal m16_dlld
+ addu $16,$16,$2
+
+ move $4,$17
+ jal m32_d_l
+ addu $16,$16,$2
+
+ move $4,$17
+ jal m16_d_l
+ mov.d $f20,$f0
+
+ move $4,$17
+ mfc1 $7,$f22
+ mfc1 $6,$f23
+ jal f32
+ add.d $f20,$f20,$f0
+
+ move $4,$17
+ add.d $f20,$f20,$f0
+ mfc1 $7,$f22
+ jal f16
+ mfc1 $6,$f23
+
+ add.d $f20,$f20,$f0
+ lw $31,32($sp)
+ trunc.w.d $f0,$f20
+ lw $17,28($sp)
+ mfc1 $3,$f0
+ addu $2,$3,$16
+ lw $16,24($sp)
+ ldc1 $f22,48($sp)
+ ldc1 $f20,40($sp)
+ j $31
+ addiu $sp,$sp,56
+
+ .set macro
+ .set reorder
+ .end __start
diff --git a/ld/testsuite/ld-mips-elf/mips16-intermix-2.s b/ld/testsuite/ld-mips-elf/mips16-intermix-2.s
new file mode 100644
index 0000000..472f0c9
--- /dev/null
+++ b/ld/testsuite/ld-mips-elf/mips16-intermix-2.s
@@ -0,0 +1,2631 @@
+ .text
+ .align 2
+ .globl m32_l
+ .set nomips16
+ .ent m32_l
+m32_l:
+ .frame $sp,0,$31 # vars= 0, regs= 0/0, args= 0, gp= 0
+ .mask 0x00000000,0
+ .fmask 0x00000000,0
+ .set noreorder
+ .set nomacro
+
+ j $31
+ move $2,$4
+
+ .set macro
+ .set reorder
+ .end m32_l
+
+ .align 2
+ .globl m16_l
+ .set mips16
+ .ent m16_l
+m16_l:
+ .frame $sp,0,$31 # vars= 0, regs= 0/0, args= 0, gp= 0
+ .mask 0x00000000,0
+ .fmask 0x00000000,0
+ .set noreorder
+ .set nomacro
+ j $31
+ move $2,$4
+ .set macro
+ .set reorder
+
+ .end m16_l
+
+ .align 2
+ .set nomips16
+ .ent m32_static_l
+m32_static_l:
+ .frame $sp,0,$31 # vars= 0, regs= 0/0, args= 0, gp= 0
+ .mask 0x00000000,0
+ .fmask 0x00000000,0
+ .set noreorder
+ .set nomacro
+
+ j $31
+ move $2,$4
+
+ .set macro
+ .set reorder
+ .end m32_static_l
+
+ .align 2
+ .set mips16
+ .ent m16_static_l
+m16_static_l:
+ .frame $sp,0,$31 # vars= 0, regs= 0/0, args= 0, gp= 0
+ .mask 0x00000000,0
+ .fmask 0x00000000,0
+ .set noreorder
+ .set nomacro
+ j $31
+ move $2,$4
+ .set macro
+ .set reorder
+
+ .end m16_static_l
+
+ .align 2
+ .set nomips16
+ .ent m32_static1_l
+m32_static1_l:
+ .frame $sp,0,$31 # vars= 0, regs= 0/0, args= 0, gp= 0
+ .mask 0x00000000,0
+ .fmask 0x00000000,0
+ .set noreorder
+ .set nomacro
+
+ j $31
+ move $2,$4
+
+ .set macro
+ .set reorder
+ .end m32_static1_l
+
+ .align 2
+ .set mips16
+ .ent m16_static1_l
+m16_static1_l:
+ .frame $sp,0,$31 # vars= 0, regs= 0/0, args= 0, gp= 0
+ .mask 0x00000000,0
+ .fmask 0x00000000,0
+ .set noreorder
+ .set nomacro
+ j $31
+ move $2,$4
+ .set macro
+ .set reorder
+
+ .end m16_static1_l
+
+ .align 2
+ .set nomips16
+ .ent m32_static32_l
+m32_static32_l:
+ .frame $sp,0,$31 # vars= 0, regs= 0/0, args= 0, gp= 0
+ .mask 0x00000000,0
+ .fmask 0x00000000,0
+ .set noreorder
+ .set nomacro
+
+ j $31
+ move $2,$4
+
+ .set macro
+ .set reorder
+ .end m32_static32_l
+
+ .align 2
+ .set mips16
+ .ent m16_static32_l
+m16_static32_l:
+ .frame $sp,0,$31 # vars= 0, regs= 0/0, args= 0, gp= 0
+ .mask 0x00000000,0
+ .fmask 0x00000000,0
+ .set noreorder
+ .set nomacro
+ j $31
+ move $2,$4
+ .set macro
+ .set reorder
+
+ .end m16_static32_l
+
+ .align 2
+ .set nomips16
+ .ent m32_static16_l
+m32_static16_l:
+ .frame $sp,0,$31 # vars= 0, regs= 0/0, args= 0, gp= 0
+ .mask 0x00000000,0
+ .fmask 0x00000000,0
+ .set noreorder
+ .set nomacro
+
+ j $31
+ move $2,$4
+
+ .set macro
+ .set reorder
+ .end m32_static16_l
+
+ .align 2
+ .set mips16
+ .ent m16_static16_l
+m16_static16_l:
+ .frame $sp,0,$31 # vars= 0, regs= 0/0, args= 0, gp= 0
+ .mask 0x00000000,0
+ .fmask 0x00000000,0
+ .set noreorder
+ .set nomacro
+ j $31
+ move $2,$4
+ .set macro
+ .set reorder
+
+ .end m16_static16_l
+
+ .align 2
+ .globl m32_d
+ .set nomips16
+ .ent m32_d
+m32_d:
+ .frame $sp,0,$31 # vars= 0, regs= 0/0, args= 0, gp= 0
+ .mask 0x00000000,0
+ .fmask 0x00000000,0
+ .set noreorder
+ .set nomacro
+
+ trunc.w.d $f12,$f12
+ j $31
+ mfc1 $2,$f12
+
+ .set macro
+ .set reorder
+ .end m32_d
+
+ .align 2
+ .globl m16_d
+ .set mips16
+ .ent m16_d
+m16_d:
+ .frame $sp,24,$31 # vars= 0, regs= 1/0, args= 16, gp= 0
+ .mask 0x80000000,-4
+ .fmask 0x00000000,0
+ save 24,$31
+ #jal __mips16_fixdfsi
+ restore 24,$31
+ j $31
+ .end m16_d
+ # Stub function for m16_d (double)
+ .set nomips16
+ .section .mips16.fn.m16_d,"ax",@progbits
+ .align 2
+ .ent __fn_stub_m16_d
+__fn_stub_m16_d:
+ .set noreorder
+ mfc1 $4,$f13
+ mfc1 $5,$f12
+ .set noat
+ la $1,m16_d
+ jr $1
+ .set at
+ nop
+ .set reorder
+ .end __fn_stub_m16_d
+ .previous
+
+ .align 2
+ .set nomips16
+ .ent m32_static_d
+m32_static_d:
+ .frame $sp,0,$31 # vars= 0, regs= 0/0, args= 0, gp= 0
+ .mask 0x00000000,0
+ .fmask 0x00000000,0
+ .set noreorder
+ .set nomacro
+
+ trunc.w.d $f12,$f12
+ j $31
+ mfc1 $2,$f12
+
+ .set macro
+ .set reorder
+ .end m32_static_d
+
+ .align 2
+ .set mips16
+ .ent m16_static_d
+m16_static_d:
+ .frame $sp,24,$31 # vars= 0, regs= 1/0, args= 16, gp= 0
+ .mask 0x80000000,-4
+ .fmask 0x00000000,0
+ save 24,$31
+ #jal __mips16_fixdfsi
+ restore 24,$31
+ j $31
+ .end m16_static_d
+ # Stub function for m16_static_d (double)
+ .set nomips16
+ .section .mips16.fn.m16_static_d,"ax",@progbits
+ .align 2
+ .ent __fn_stub_m16_static_d
+__fn_stub_m16_static_d:
+ .set noreorder
+ mfc1 $4,$f13
+ mfc1 $5,$f12
+ .set noat
+ la $1,m16_static_d
+ jr $1
+ .set at
+ nop
+ .set reorder
+ .end __fn_stub_m16_static_d
+ .previous
+
+ .align 2
+ .set nomips16
+ .ent m32_static1_d
+m32_static1_d:
+ .frame $sp,0,$31 # vars= 0, regs= 0/0, args= 0, gp= 0
+ .mask 0x00000000,0
+ .fmask 0x00000000,0
+ .set noreorder
+ .set nomacro
+
+ trunc.w.d $f12,$f12
+ j $31
+ mfc1 $2,$f12
+
+ .set macro
+ .set reorder
+ .end m32_static1_d
+
+ .align 2
+ .set mips16
+ .ent m16_static1_d
+m16_static1_d:
+ .frame $sp,24,$31 # vars= 0, regs= 1/0, args= 16, gp= 0
+ .mask 0x80000000,-4
+ .fmask 0x00000000,0
+ save 24,$31
+ #jal __mips16_fixdfsi
+ restore 24,$31
+ j $31
+ .end m16_static1_d
+ # Stub function for m16_static1_d (double)
+ .set nomips16
+ .section .mips16.fn.m16_static1_d,"ax",@progbits
+ .align 2
+ .ent __fn_stub_m16_static1_d
+__fn_stub_m16_static1_d:
+ .set noreorder
+ mfc1 $4,$f13
+ mfc1 $5,$f12
+ .set noat
+ la $1,m16_static1_d
+ jr $1
+ .set at
+ nop
+ .set reorder
+ .end __fn_stub_m16_static1_d
+ .previous
+
+ .align 2
+ .set nomips16
+ .ent m32_static32_d
+m32_static32_d:
+ .frame $sp,0,$31 # vars= 0, regs= 0/0, args= 0, gp= 0
+ .mask 0x00000000,0
+ .fmask 0x00000000,0
+ .set noreorder
+ .set nomacro
+
+ trunc.w.d $f12,$f12
+ j $31
+ mfc1 $2,$f12
+
+ .set macro
+ .set reorder
+ .end m32_static32_d
+
+ .align 2
+ .set mips16
+ .ent m16_static32_d
+m16_static32_d:
+ .frame $sp,24,$31 # vars= 0, regs= 1/0, args= 16, gp= 0
+ .mask 0x80000000,-4
+ .fmask 0x00000000,0
+ save 24,$31
+ #jal __mips16_fixdfsi
+ restore 24,$31
+ j $31
+ .end m16_static32_d
+ # Stub function for m16_static32_d (double)
+ .set nomips16
+ .section .mips16.fn.m16_static32_d,"ax",@progbits
+ .align 2
+ .ent __fn_stub_m16_static32_d
+__fn_stub_m16_static32_d:
+ .set noreorder
+ mfc1 $4,$f13
+ mfc1 $5,$f12
+ .set noat
+ la $1,m16_static32_d
+ jr $1
+ .set at
+ nop
+ .set reorder
+ .end __fn_stub_m16_static32_d
+ .previous
+
+ .align 2
+ .set nomips16
+ .ent m32_static16_d
+m32_static16_d:
+ .frame $sp,0,$31 # vars= 0, regs= 0/0, args= 0, gp= 0
+ .mask 0x00000000,0
+ .fmask 0x00000000,0
+ .set noreorder
+ .set nomacro
+
+ trunc.w.d $f12,$f12
+ j $31
+ mfc1 $2,$f12
+
+ .set macro
+ .set reorder
+ .end m32_static16_d
+
+ .align 2
+ .set mips16
+ .ent m16_static16_d
+m16_static16_d:
+ .frame $sp,24,$31 # vars= 0, regs= 1/0, args= 16, gp= 0
+ .mask 0x80000000,-4
+ .fmask 0x00000000,0
+ save 24,$31
+ #jal __mips16_fixdfsi
+ restore 24,$31
+ j $31
+ .end m16_static16_d
+ # Stub function for m16_static16_d (double)
+ .set nomips16
+ .section .mips16.fn.m16_static16_d,"ax",@progbits
+ .align 2
+ .ent __fn_stub_m16_static16_d
+__fn_stub_m16_static16_d:
+ .set noreorder
+ mfc1 $4,$f13
+ mfc1 $5,$f12
+ .set noat
+ la $1,m16_static16_d
+ jr $1
+ .set at
+ nop
+ .set reorder
+ .end __fn_stub_m16_static16_d
+ .previous
+
+ .align 2
+ .globl m32_ld
+ .set nomips16
+ .ent m32_ld
+m32_ld:
+ .frame $sp,0,$31 # vars= 0, regs= 0/0, args= 0, gp= 0
+ .mask 0x00000000,0
+ .fmask 0x00000000,0
+ .set noreorder
+ .set nomacro
+
+ mtc1 $7,$f2
+ mtc1 $6,$f3
+ trunc.w.d $f0,$f2
+ mfc1 $24,$f0
+ j $31
+ addu $2,$24,$4
+
+ .set macro
+ .set reorder
+ .end m32_ld
+
+ .align 2
+ .globl m16_ld
+ .set mips16
+ .ent m16_ld
+m16_ld:
+ .frame $sp,24,$31 # vars= 0, regs= 2/0, args= 16, gp= 0
+ .mask 0x80010000,-4
+ .fmask 0x00000000,0
+ save 24,$16,$31
+ move $16,$4
+ move $5,$7
+ .set noreorder
+ .set nomacro
+ #jal __mips16_fixdfsi
+ move $4,$6
+ .set macro
+ .set reorder
+
+ addu $2,$16
+ restore 24,$16,$31
+ j $31
+ .end m16_ld
+
+ .align 2
+ .set nomips16
+ .ent m32_static_ld
+m32_static_ld:
+ .frame $sp,0,$31 # vars= 0, regs= 0/0, args= 0, gp= 0
+ .mask 0x00000000,0
+ .fmask 0x00000000,0
+ .set noreorder
+ .set nomacro
+
+ mtc1 $7,$f2
+ mtc1 $6,$f3
+ trunc.w.d $f0,$f2
+ mfc1 $24,$f0
+ j $31
+ addu $2,$24,$4
+
+ .set macro
+ .set reorder
+ .end m32_static_ld
+
+ .align 2
+ .set mips16
+ .ent m16_static_ld
+m16_static_ld:
+ .frame $sp,24,$31 # vars= 0, regs= 2/0, args= 16, gp= 0
+ .mask 0x80010000,-4
+ .fmask 0x00000000,0
+ save 24,$16,$31
+ move $16,$4
+ move $5,$7
+ .set noreorder
+ .set nomacro
+ #jal __mips16_fixdfsi
+ move $4,$6
+ .set macro
+ .set reorder
+
+ addu $2,$16
+ restore 24,$16,$31
+ j $31
+ .end m16_static_ld
+
+ .align 2
+ .set nomips16
+ .ent m32_static1_ld
+m32_static1_ld:
+ .frame $sp,0,$31 # vars= 0, regs= 0/0, args= 0, gp= 0
+ .mask 0x00000000,0
+ .fmask 0x00000000,0
+ .set noreorder
+ .set nomacro
+
+ mtc1 $7,$f2
+ mtc1 $6,$f3
+ trunc.w.d $f0,$f2
+ mfc1 $24,$f0
+ j $31
+ addu $2,$24,$4
+
+ .set macro
+ .set reorder
+ .end m32_static1_ld
+
+ .align 2
+ .set mips16
+ .ent m16_static1_ld
+m16_static1_ld:
+ .frame $sp,24,$31 # vars= 0, regs= 2/0, args= 16, gp= 0
+ .mask 0x80010000,-4
+ .fmask 0x00000000,0
+ save 24,$16,$31
+ move $16,$4
+ move $5,$7
+ .set noreorder
+ .set nomacro
+ #jal __mips16_fixdfsi
+ move $4,$6
+ .set macro
+ .set reorder
+
+ addu $2,$16
+ restore 24,$16,$31
+ j $31
+ .end m16_static1_ld
+
+ .align 2
+ .set nomips16
+ .ent m32_static32_ld
+m32_static32_ld:
+ .frame $sp,0,$31 # vars= 0, regs= 0/0, args= 0, gp= 0
+ .mask 0x00000000,0
+ .fmask 0x00000000,0
+ .set noreorder
+ .set nomacro
+
+ mtc1 $7,$f2
+ mtc1 $6,$f3
+ trunc.w.d $f0,$f2
+ mfc1 $24,$f0
+ j $31
+ addu $2,$24,$4
+
+ .set macro
+ .set reorder
+ .end m32_static32_ld
+
+ .align 2
+ .set mips16
+ .ent m16_static32_ld
+m16_static32_ld:
+ .frame $sp,24,$31 # vars= 0, regs= 2/0, args= 16, gp= 0
+ .mask 0x80010000,-4
+ .fmask 0x00000000,0
+ save 24,$16,$31
+ move $16,$4
+ move $5,$7
+ .set noreorder
+ .set nomacro
+ #jal __mips16_fixdfsi
+ move $4,$6
+ .set macro
+ .set reorder
+
+ addu $2,$16
+ restore 24,$16,$31
+ j $31
+ .end m16_static32_ld
+
+ .align 2
+ .set nomips16
+ .ent m32_static16_ld
+m32_static16_ld:
+ .frame $sp,0,$31 # vars= 0, regs= 0/0, args= 0, gp= 0
+ .mask 0x00000000,0
+ .fmask 0x00000000,0
+ .set noreorder
+ .set nomacro
+
+ mtc1 $7,$f2
+ mtc1 $6,$f3
+ trunc.w.d $f0,$f2
+ mfc1 $24,$f0
+ j $31
+ addu $2,$24,$4
+
+ .set macro
+ .set reorder
+ .end m32_static16_ld
+
+ .align 2
+ .set mips16
+ .ent m16_static16_ld
+m16_static16_ld:
+ .frame $sp,24,$31 # vars= 0, regs= 2/0, args= 16, gp= 0
+ .mask 0x80010000,-4
+ .fmask 0x00000000,0
+ save 24,$16,$31
+ move $16,$4
+ move $5,$7
+ .set noreorder
+ .set nomacro
+ #jal __mips16_fixdfsi
+ move $4,$6
+ .set macro
+ .set reorder
+
+ addu $2,$16
+ restore 24,$16,$31
+ j $31
+ .end m16_static16_ld
+
+ .align 2
+ .globl m32_dl
+ .set nomips16
+ .ent m32_dl
+m32_dl:
+ .frame $sp,0,$31 # vars= 0, regs= 0/0, args= 0, gp= 0
+ .mask 0x00000000,0
+ .fmask 0x00000000,0
+ .set noreorder
+ .set nomacro
+
+ trunc.w.d $f0,$f12
+ mfc1 $24,$f0
+ j $31
+ addu $2,$24,$6
+
+ .set macro
+ .set reorder
+ .end m32_dl
+
+ .align 2
+ .globl m16_dl
+ .set mips16
+ .ent m16_dl
+m16_dl:
+ .frame $sp,24,$31 # vars= 0, regs= 2/0, args= 16, gp= 0
+ .mask 0x80010000,-4
+ .fmask 0x00000000,0
+ save 24,$16,$31
+ .set noreorder
+ .set nomacro
+ #jal __mips16_fixdfsi
+ move $16,$6
+ .set macro
+ .set reorder
+
+ addu $2,$16
+ restore 24,$16,$31
+ j $31
+ .end m16_dl
+ # Stub function for m16_dl (double)
+ .set nomips16
+ .section .mips16.fn.m16_dl,"ax",@progbits
+ .align 2
+ .ent __fn_stub_m16_dl
+__fn_stub_m16_dl:
+ .set noreorder
+ mfc1 $4,$f13
+ mfc1 $5,$f12
+ .set noat
+ la $1,m16_dl
+ jr $1
+ .set at
+ nop
+ .set reorder
+ .end __fn_stub_m16_dl
+ .previous
+
+ .align 2
+ .set nomips16
+ .ent m32_static_dl
+m32_static_dl:
+ .frame $sp,0,$31 # vars= 0, regs= 0/0, args= 0, gp= 0
+ .mask 0x00000000,0
+ .fmask 0x00000000,0
+ .set noreorder
+ .set nomacro
+
+ trunc.w.d $f0,$f12
+ mfc1 $24,$f0
+ j $31
+ addu $2,$24,$6
+
+ .set macro
+ .set reorder
+ .end m32_static_dl
+
+ .align 2
+ .set mips16
+ .ent m16_static_dl
+m16_static_dl:
+ .frame $sp,24,$31 # vars= 0, regs= 2/0, args= 16, gp= 0
+ .mask 0x80010000,-4
+ .fmask 0x00000000,0
+ save 24,$16,$31
+ .set noreorder
+ .set nomacro
+ #jal __mips16_fixdfsi
+ move $16,$6
+ .set macro
+ .set reorder
+
+ addu $2,$16
+ restore 24,$16,$31
+ j $31
+ .end m16_static_dl
+ # Stub function for m16_static_dl (double)
+ .set nomips16
+ .section .mips16.fn.m16_static_dl,"ax",@progbits
+ .align 2
+ .ent __fn_stub_m16_static_dl
+__fn_stub_m16_static_dl:
+ .set noreorder
+ mfc1 $4,$f13
+ mfc1 $5,$f12
+ .set noat
+ la $1,m16_static_dl
+ jr $1
+ .set at
+ nop
+ .set reorder
+ .end __fn_stub_m16_static_dl
+ .previous
+
+ .align 2
+ .set nomips16
+ .ent m32_static1_dl
+m32_static1_dl:
+ .frame $sp,0,$31 # vars= 0, regs= 0/0, args= 0, gp= 0
+ .mask 0x00000000,0
+ .fmask 0x00000000,0
+ .set noreorder
+ .set nomacro
+
+ trunc.w.d $f0,$f12
+ mfc1 $24,$f0
+ j $31
+ addu $2,$24,$6
+
+ .set macro
+ .set reorder
+ .end m32_static1_dl
+
+ .align 2
+ .set mips16
+ .ent m16_static1_dl
+m16_static1_dl:
+ .frame $sp,24,$31 # vars= 0, regs= 2/0, args= 16, gp= 0
+ .mask 0x80010000,-4
+ .fmask 0x00000000,0
+ save 24,$16,$31
+ .set noreorder
+ .set nomacro
+ #jal __mips16_fixdfsi
+ move $16,$6
+ .set macro
+ .set reorder
+
+ addu $2,$16
+ restore 24,$16,$31
+ j $31
+ .end m16_static1_dl
+ # Stub function for m16_static1_dl (double)
+ .set nomips16
+ .section .mips16.fn.m16_static1_dl,"ax",@progbits
+ .align 2
+ .ent __fn_stub_m16_static1_dl
+__fn_stub_m16_static1_dl:
+ .set noreorder
+ mfc1 $4,$f13
+ mfc1 $5,$f12
+ .set noat
+ la $1,m16_static1_dl
+ jr $1
+ .set at
+ nop
+ .set reorder
+ .end __fn_stub_m16_static1_dl
+ .previous
+
+ .align 2
+ .set nomips16
+ .ent m32_static32_dl
+m32_static32_dl:
+ .frame $sp,0,$31 # vars= 0, regs= 0/0, args= 0, gp= 0
+ .mask 0x00000000,0
+ .fmask 0x00000000,0
+ .set noreorder
+ .set nomacro
+
+ trunc.w.d $f0,$f12
+ mfc1 $24,$f0
+ j $31
+ addu $2,$24,$6
+
+ .set macro
+ .set reorder
+ .end m32_static32_dl
+
+ .align 2
+ .set mips16
+ .ent m16_static32_dl
+m16_static32_dl:
+ .frame $sp,24,$31 # vars= 0, regs= 2/0, args= 16, gp= 0
+ .mask 0x80010000,-4
+ .fmask 0x00000000,0
+ save 24,$16,$31
+ .set noreorder
+ .set nomacro
+ #jal __mips16_fixdfsi
+ move $16,$6
+ .set macro
+ .set reorder
+
+ addu $2,$16
+ restore 24,$16,$31
+ j $31
+ .end m16_static32_dl
+ # Stub function for m16_static32_dl (double)
+ .set nomips16
+ .section .mips16.fn.m16_static32_dl,"ax",@progbits
+ .align 2
+ .ent __fn_stub_m16_static32_dl
+__fn_stub_m16_static32_dl:
+ .set noreorder
+ mfc1 $4,$f13
+ mfc1 $5,$f12
+ .set noat
+ la $1,m16_static32_dl
+ jr $1
+ .set at
+ nop
+ .set reorder
+ .end __fn_stub_m16_static32_dl
+ .previous
+
+ .align 2
+ .set nomips16
+ .ent m32_static16_dl
+m32_static16_dl:
+ .frame $sp,0,$31 # vars= 0, regs= 0/0, args= 0, gp= 0
+ .mask 0x00000000,0
+ .fmask 0x00000000,0
+ .set noreorder
+ .set nomacro
+
+ trunc.w.d $f0,$f12
+ mfc1 $24,$f0
+ j $31
+ addu $2,$24,$6
+
+ .set macro
+ .set reorder
+ .end m32_static16_dl
+
+ .align 2
+ .set mips16
+ .ent m16_static16_dl
+m16_static16_dl:
+ .frame $sp,24,$31 # vars= 0, regs= 2/0, args= 16, gp= 0
+ .mask 0x80010000,-4
+ .fmask 0x00000000,0
+ save 24,$16,$31
+ .set noreorder
+ .set nomacro
+ #jal __mips16_fixdfsi
+ move $16,$6
+ .set macro
+ .set reorder
+
+ addu $2,$16
+ restore 24,$16,$31
+ j $31
+ .end m16_static16_dl
+ # Stub function for m16_static16_dl (double)
+ .set nomips16
+ .section .mips16.fn.m16_static16_dl,"ax",@progbits
+ .align 2
+ .ent __fn_stub_m16_static16_dl
+__fn_stub_m16_static16_dl:
+ .set noreorder
+ mfc1 $4,$f13
+ mfc1 $5,$f12
+ .set noat
+ la $1,m16_static16_dl
+ jr $1
+ .set at
+ nop
+ .set reorder
+ .end __fn_stub_m16_static16_dl
+ .previous
+
+ .align 2
+ .globl m32_dlld
+ .set nomips16
+ .ent m32_dlld
+m32_dlld:
+ .frame $sp,0,$31 # vars= 0, regs= 0/0, args= 0, gp= 0
+ .mask 0x00000000,0
+ .fmask 0x00000000,0
+ .set noreorder
+ .set nomacro
+
+ trunc.w.d $f1,$f12
+ mfc1 $4,$f1
+ addu $3,$4,$6
+ addu $2,$3,$7
+ ldc1 $f0,16($sp)
+ trunc.w.d $f2,$f0
+ mfc1 $24,$f2
+ j $31
+ addu $2,$2,$24
+
+ .set macro
+ .set reorder
+ .end m32_dlld
+
+ .align 2
+ .globl m16_dlld
+ .set mips16
+ .ent m16_dlld
+m16_dlld:
+ .frame $sp,32,$31 # vars= 0, regs= 3/0, args= 16, gp= 0
+ .mask 0x80030000,-4
+ .fmask 0x00000000,0
+ save 32,$16,$17,$31
+ move $16,$6
+ .set noreorder
+ .set nomacro
+ #jal __mips16_fixdfsi
+ move $17,$7
+ .set macro
+ .set reorder
+
+ lw $5,52($sp)
+ lw $4,48($sp)
+ addu $16,$2,$16
+ .set noreorder
+ .set nomacro
+ #jal __mips16_fixdfsi
+ addu $16,$17
+ .set macro
+ .set reorder
+
+ addu $2,$16,$2
+ restore 32,$16,$17,$31
+ j $31
+ .end m16_dlld
+ # Stub function for m16_dlld (double)
+ .set nomips16
+ .section .mips16.fn.m16_dlld,"ax",@progbits
+ .align 2
+ .ent __fn_stub_m16_dlld
+__fn_stub_m16_dlld:
+ .set noreorder
+ mfc1 $4,$f13
+ mfc1 $5,$f12
+ .set noat
+ la $1,m16_dlld
+ jr $1
+ .set at
+ nop
+ .set reorder
+ .end __fn_stub_m16_dlld
+ .previous
+
+ .align 2
+ .set nomips16
+ .ent m32_static_dlld
+m32_static_dlld:
+ .frame $sp,0,$31 # vars= 0, regs= 0/0, args= 0, gp= 0
+ .mask 0x00000000,0
+ .fmask 0x00000000,0
+ .set noreorder
+ .set nomacro
+
+ trunc.w.d $f1,$f12
+ mfc1 $4,$f1
+ addu $3,$4,$6
+ addu $2,$3,$7
+ ldc1 $f0,16($sp)
+ trunc.w.d $f2,$f0
+ mfc1 $24,$f2
+ j $31
+ addu $2,$2,$24
+
+ .set macro
+ .set reorder
+ .end m32_static_dlld
+
+ .align 2
+ .set mips16
+ .ent m16_static_dlld
+m16_static_dlld:
+ .frame $sp,32,$31 # vars= 0, regs= 3/0, args= 16, gp= 0
+ .mask 0x80030000,-4
+ .fmask 0x00000000,0
+ save 32,$16,$17,$31
+ move $16,$6
+ .set noreorder
+ .set nomacro
+ #jal __mips16_fixdfsi
+ move $17,$7
+ .set macro
+ .set reorder
+
+ lw $5,52($sp)
+ lw $4,48($sp)
+ addu $16,$2,$16
+ .set noreorder
+ .set nomacro
+ #jal __mips16_fixdfsi
+ addu $16,$17
+ .set macro
+ .set reorder
+
+ addu $2,$16,$2
+ restore 32,$16,$17,$31
+ j $31
+ .end m16_static_dlld
+ # Stub function for m16_static_dlld (double)
+ .set nomips16
+ .section .mips16.fn.m16_static_dlld,"ax",@progbits
+ .align 2
+ .ent __fn_stub_m16_static_dlld
+__fn_stub_m16_static_dlld:
+ .set noreorder
+ mfc1 $4,$f13
+ mfc1 $5,$f12
+ .set noat
+ la $1,m16_static_dlld
+ jr $1
+ .set at
+ nop
+ .set reorder
+ .end __fn_stub_m16_static_dlld
+ .previous
+
+ .align 2
+ .set nomips16
+ .ent m32_static1_dlld
+m32_static1_dlld:
+ .frame $sp,0,$31 # vars= 0, regs= 0/0, args= 0, gp= 0
+ .mask 0x00000000,0
+ .fmask 0x00000000,0
+ .set noreorder
+ .set nomacro
+
+ trunc.w.d $f1,$f12
+ mfc1 $4,$f1
+ addu $3,$4,$6
+ addu $2,$3,$7
+ ldc1 $f0,16($sp)
+ trunc.w.d $f2,$f0
+ mfc1 $24,$f2
+ j $31
+ addu $2,$2,$24
+
+ .set macro
+ .set reorder
+ .end m32_static1_dlld
+
+ .align 2
+ .set mips16
+ .ent m16_static1_dlld
+m16_static1_dlld:
+ .frame $sp,32,$31 # vars= 0, regs= 3/0, args= 16, gp= 0
+ .mask 0x80030000,-4
+ .fmask 0x00000000,0
+ save 32,$16,$17,$31
+ move $16,$6
+ .set noreorder
+ .set nomacro
+ #jal __mips16_fixdfsi
+ move $17,$7
+ .set macro
+ .set reorder
+
+ lw $5,52($sp)
+ lw $4,48($sp)
+ addu $16,$2,$16
+ .set noreorder
+ .set nomacro
+ #jal __mips16_fixdfsi
+ addu $16,$17
+ .set macro
+ .set reorder
+
+ addu $2,$16,$2
+ restore 32,$16,$17,$31
+ j $31
+ .end m16_static1_dlld
+ # Stub function for m16_static1_dlld (double)
+ .set nomips16
+ .section .mips16.fn.m16_static1_dlld,"ax",@progbits
+ .align 2
+ .ent __fn_stub_m16_static1_dlld
+__fn_stub_m16_static1_dlld:
+ .set noreorder
+ mfc1 $4,$f13
+ mfc1 $5,$f12
+ .set noat
+ la $1,m16_static1_dlld
+ jr $1
+ .set at
+ nop
+ .set reorder
+ .end __fn_stub_m16_static1_dlld
+ .previous
+
+ .align 2
+ .set nomips16
+ .ent m32_static32_dlld
+m32_static32_dlld:
+ .frame $sp,0,$31 # vars= 0, regs= 0/0, args= 0, gp= 0
+ .mask 0x00000000,0
+ .fmask 0x00000000,0
+ .set noreorder
+ .set nomacro
+
+ trunc.w.d $f1,$f12
+ mfc1 $4,$f1
+ addu $3,$4,$6
+ addu $2,$3,$7
+ ldc1 $f0,16($sp)
+ trunc.w.d $f2,$f0
+ mfc1 $24,$f2
+ j $31
+ addu $2,$2,$24
+
+ .set macro
+ .set reorder
+ .end m32_static32_dlld
+
+ .align 2
+ .set mips16
+ .ent m16_static32_dlld
+m16_static32_dlld:
+ .frame $sp,32,$31 # vars= 0, regs= 3/0, args= 16, gp= 0
+ .mask 0x80030000,-4
+ .fmask 0x00000000,0
+ save 32,$16,$17,$31
+ move $16,$6
+ .set noreorder
+ .set nomacro
+ #jal __mips16_fixdfsi
+ move $17,$7
+ .set macro
+ .set reorder
+
+ lw $5,52($sp)
+ lw $4,48($sp)
+ addu $16,$2,$16
+ .set noreorder
+ .set nomacro
+ #jal __mips16_fixdfsi
+ addu $16,$17
+ .set macro
+ .set reorder
+
+ addu $2,$16,$2
+ restore 32,$16,$17,$31
+ j $31
+ .end m16_static32_dlld
+ # Stub function for m16_static32_dlld (double)
+ .set nomips16
+ .section .mips16.fn.m16_static32_dlld,"ax",@progbits
+ .align 2
+ .ent __fn_stub_m16_static32_dlld
+__fn_stub_m16_static32_dlld:
+ .set noreorder
+ mfc1 $4,$f13
+ mfc1 $5,$f12
+ .set noat
+ la $1,m16_static32_dlld
+ jr $1
+ .set at
+ nop
+ .set reorder
+ .end __fn_stub_m16_static32_dlld
+ .previous
+
+ .align 2
+ .set nomips16
+ .ent m32_static16_dlld
+m32_static16_dlld:
+ .frame $sp,0,$31 # vars= 0, regs= 0/0, args= 0, gp= 0
+ .mask 0x00000000,0
+ .fmask 0x00000000,0
+ .set noreorder
+ .set nomacro
+
+ trunc.w.d $f1,$f12
+ mfc1 $4,$f1
+ addu $3,$4,$6
+ addu $2,$3,$7
+ ldc1 $f0,16($sp)
+ trunc.w.d $f2,$f0
+ mfc1 $24,$f2
+ j $31
+ addu $2,$2,$24
+
+ .set macro
+ .set reorder
+ .end m32_static16_dlld
+
+ .align 2
+ .set mips16
+ .ent m16_static16_dlld
+m16_static16_dlld:
+ .frame $sp,32,$31 # vars= 0, regs= 3/0, args= 16, gp= 0
+ .mask 0x80030000,-4
+ .fmask 0x00000000,0
+ save 32,$16,$17,$31
+ move $16,$6
+ .set noreorder
+ .set nomacro
+ #jal __mips16_fixdfsi
+ move $17,$7
+ .set macro
+ .set reorder
+
+ lw $5,52($sp)
+ lw $4,48($sp)
+ addu $16,$2,$16
+ .set noreorder
+ .set nomacro
+ #jal __mips16_fixdfsi
+ addu $16,$17
+ .set macro
+ .set reorder
+
+ addu $2,$16,$2
+ restore 32,$16,$17,$31
+ j $31
+ .end m16_static16_dlld
+ # Stub function for m16_static16_dlld (double)
+ .set nomips16
+ .section .mips16.fn.m16_static16_dlld,"ax",@progbits
+ .align 2
+ .ent __fn_stub_m16_static16_dlld
+__fn_stub_m16_static16_dlld:
+ .set noreorder
+ mfc1 $4,$f13
+ mfc1 $5,$f12
+ .set noat
+ la $1,m16_static16_dlld
+ jr $1
+ .set at
+ nop
+ .set reorder
+ .end __fn_stub_m16_static16_dlld
+ .previous
+
+ .align 2
+ .globl m32_d_l
+ .set nomips16
+ .ent m32_d_l
+m32_d_l:
+ .frame $sp,0,$31 # vars= 0, regs= 0/0, args= 0, gp= 0
+ .mask 0x00000000,0
+ .fmask 0x00000000,0
+ .set noreorder
+ .set nomacro
+
+ mtc1 $4,$f2
+ j $31
+ cvt.d.w $f0,$f2
+
+ .set macro
+ .set reorder
+ .end m32_d_l
+
+ .align 2
+ .globl m16_d_l
+ .set mips16
+ .ent m16_d_l
+m16_d_l:
+ .frame $sp,24,$31 # vars= 0, regs= 1/0, args= 16, gp= 0
+ .mask 0x80000000,-4
+ .fmask 0x00000000,0
+ save 24,$31
+ #jal __mips16_floatsidf
+ #jal __mips16_ret_df
+ restore 24,$31
+ j $31
+ .end m16_d_l
+
+ .align 2
+ .set nomips16
+ .ent m32_static_d_l
+m32_static_d_l:
+ .frame $sp,0,$31 # vars= 0, regs= 0/0, args= 0, gp= 0
+ .mask 0x00000000,0
+ .fmask 0x00000000,0
+ .set noreorder
+ .set nomacro
+
+ mtc1 $4,$f2
+ j $31
+ cvt.d.w $f0,$f2
+
+ .set macro
+ .set reorder
+ .end m32_static_d_l
+
+ .align 2
+ .set mips16
+ .ent m16_static_d_l
+m16_static_d_l:
+ .frame $sp,24,$31 # vars= 0, regs= 1/0, args= 16, gp= 0
+ .mask 0x80000000,-4
+ .fmask 0x00000000,0
+ save 24,$31
+ #jal __mips16_floatsidf
+ #jal __mips16_ret_df
+ restore 24,$31
+ j $31
+ .end m16_static_d_l
+
+ .align 2
+ .set nomips16
+ .ent m32_static1_d_l
+m32_static1_d_l:
+ .frame $sp,0,$31 # vars= 0, regs= 0/0, args= 0, gp= 0
+ .mask 0x00000000,0
+ .fmask 0x00000000,0
+ .set noreorder
+ .set nomacro
+
+ mtc1 $4,$f2
+ j $31
+ cvt.d.w $f0,$f2
+
+ .set macro
+ .set reorder
+ .end m32_static1_d_l
+
+ .align 2
+ .set mips16
+ .ent m16_static1_d_l
+m16_static1_d_l:
+ .frame $sp,24,$31 # vars= 0, regs= 1/0, args= 16, gp= 0
+ .mask 0x80000000,-4
+ .fmask 0x00000000,0
+ save 24,$31
+ #jal __mips16_floatsidf
+ #jal __mips16_ret_df
+ restore 24,$31
+ j $31
+ .end m16_static1_d_l
+
+ .align 2
+ .set nomips16
+ .ent m32_static32_d_l
+m32_static32_d_l:
+ .frame $sp,0,$31 # vars= 0, regs= 0/0, args= 0, gp= 0
+ .mask 0x00000000,0
+ .fmask 0x00000000,0
+ .set noreorder
+ .set nomacro
+
+ mtc1 $4,$f2
+ j $31
+ cvt.d.w $f0,$f2
+
+ .set macro
+ .set reorder
+ .end m32_static32_d_l
+
+ .align 2
+ .set mips16
+ .ent m16_static32_d_l
+m16_static32_d_l:
+ .frame $sp,24,$31 # vars= 0, regs= 1/0, args= 16, gp= 0
+ .mask 0x80000000,-4
+ .fmask 0x00000000,0
+ save 24,$31
+ #jal __mips16_floatsidf
+ #jal __mips16_ret_df
+ restore 24,$31
+ j $31
+ .end m16_static32_d_l
+
+ .align 2
+ .set nomips16
+ .ent m32_static16_d_l
+m32_static16_d_l:
+ .frame $sp,0,$31 # vars= 0, regs= 0/0, args= 0, gp= 0
+ .mask 0x00000000,0
+ .fmask 0x00000000,0
+ .set noreorder
+ .set nomacro
+
+ mtc1 $4,$f2
+ j $31
+ cvt.d.w $f0,$f2
+
+ .set macro
+ .set reorder
+ .end m32_static16_d_l
+
+ .align 2
+ .set mips16
+ .ent m16_static16_d_l
+m16_static16_d_l:
+ .frame $sp,24,$31 # vars= 0, regs= 1/0, args= 16, gp= 0
+ .mask 0x80000000,-4
+ .fmask 0x00000000,0
+ save 24,$31
+ #jal __mips16_floatsidf
+ #jal __mips16_ret_df
+ restore 24,$31
+ j $31
+ .end m16_static16_d_l
+
+ .align 2
+ .globl m32_d_d
+ .set nomips16
+ .ent m32_d_d
+m32_d_d:
+ .frame $sp,0,$31 # vars= 0, regs= 0/0, args= 0, gp= 0
+ .mask 0x00000000,0
+ .fmask 0x00000000,0
+ .set noreorder
+ .set nomacro
+
+ j $31
+ mov.d $f0,$f12
+
+ .set macro
+ .set reorder
+ .end m32_d_d
+
+ .align 2
+ .globl m16_d_d
+ .set mips16
+ .ent m16_d_d
+m16_d_d:
+ .frame $sp,8,$31 # vars= 0, regs= 1/0, args= 0, gp= 0
+ .mask 0x80000000,-4
+ .fmask 0x00000000,0
+ save 8,$31
+ move $3,$5
+ .set noreorder
+ .set nomacro
+ #jal __mips16_ret_df
+ move $2,$4
+ .set macro
+ .set reorder
+
+ restore 8,$31
+ j $31
+ .end m16_d_d
+ # Stub function for m16_d_d (double)
+ .set nomips16
+ .section .mips16.fn.m16_d_d,"ax",@progbits
+ .align 2
+ .ent __fn_stub_m16_d_d
+__fn_stub_m16_d_d:
+ .set noreorder
+ mfc1 $4,$f13
+ mfc1 $5,$f12
+ .set noat
+ la $1,m16_d_d
+ jr $1
+ .set at
+ nop
+ .set reorder
+ .end __fn_stub_m16_d_d
+ .previous
+
+ .align 2
+ .set nomips16
+ .ent m32_static_d_d
+m32_static_d_d:
+ .frame $sp,0,$31 # vars= 0, regs= 0/0, args= 0, gp= 0
+ .mask 0x00000000,0
+ .fmask 0x00000000,0
+ .set noreorder
+ .set nomacro
+
+ j $31
+ mov.d $f0,$f12
+
+ .set macro
+ .set reorder
+ .end m32_static_d_d
+
+ .align 2
+ .set mips16
+ .ent m16_static_d_d
+m16_static_d_d:
+ .frame $sp,8,$31 # vars= 0, regs= 1/0, args= 0, gp= 0
+ .mask 0x80000000,-4
+ .fmask 0x00000000,0
+ save 8,$31
+ move $3,$5
+ .set noreorder
+ .set nomacro
+ #jal __mips16_ret_df
+ move $2,$4
+ .set macro
+ .set reorder
+
+ restore 8,$31
+ j $31
+ .end m16_static_d_d
+ # Stub function for m16_static_d_d (double)
+ .set nomips16
+ .section .mips16.fn.m16_static_d_d,"ax",@progbits
+ .align 2
+ .ent __fn_stub_m16_static_d_d
+__fn_stub_m16_static_d_d:
+ .set noreorder
+ mfc1 $4,$f13
+ mfc1 $5,$f12
+ .set noat
+ la $1,m16_static_d_d
+ jr $1
+ .set at
+ nop
+ .set reorder
+ .end __fn_stub_m16_static_d_d
+ .previous
+
+ .align 2
+ .set nomips16
+ .ent m32_static1_d_d
+m32_static1_d_d:
+ .frame $sp,0,$31 # vars= 0, regs= 0/0, args= 0, gp= 0
+ .mask 0x00000000,0
+ .fmask 0x00000000,0
+ .set noreorder
+ .set nomacro
+
+ j $31
+ mov.d $f0,$f12
+
+ .set macro
+ .set reorder
+ .end m32_static1_d_d
+
+ .align 2
+ .set mips16
+ .ent m16_static1_d_d
+m16_static1_d_d:
+ .frame $sp,8,$31 # vars= 0, regs= 1/0, args= 0, gp= 0
+ .mask 0x80000000,-4
+ .fmask 0x00000000,0
+ save 8,$31
+ move $3,$5
+ .set noreorder
+ .set nomacro
+ #jal __mips16_ret_df
+ move $2,$4
+ .set macro
+ .set reorder
+
+ restore 8,$31
+ j $31
+ .end m16_static1_d_d
+ # Stub function for m16_static1_d_d (double)
+ .set nomips16
+ .section .mips16.fn.m16_static1_d_d,"ax",@progbits
+ .align 2
+ .ent __fn_stub_m16_static1_d_d
+__fn_stub_m16_static1_d_d:
+ .set noreorder
+ mfc1 $4,$f13
+ mfc1 $5,$f12
+ .set noat
+ la $1,m16_static1_d_d
+ jr $1
+ .set at
+ nop
+ .set reorder
+ .end __fn_stub_m16_static1_d_d
+ .previous
+
+ .align 2
+ .set nomips16
+ .ent m32_static32_d_d
+m32_static32_d_d:
+ .frame $sp,0,$31 # vars= 0, regs= 0/0, args= 0, gp= 0
+ .mask 0x00000000,0
+ .fmask 0x00000000,0
+ .set noreorder
+ .set nomacro
+
+ j $31
+ mov.d $f0,$f12
+
+ .set macro
+ .set reorder
+ .end m32_static32_d_d
+
+ .align 2
+ .set mips16
+ .ent m16_static32_d_d
+m16_static32_d_d:
+ .frame $sp,8,$31 # vars= 0, regs= 1/0, args= 0, gp= 0
+ .mask 0x80000000,-4
+ .fmask 0x00000000,0
+ save 8,$31
+ move $3,$5
+ .set noreorder
+ .set nomacro
+ #jal __mips16_ret_df
+ move $2,$4
+ .set macro
+ .set reorder
+
+ restore 8,$31
+ j $31
+ .end m16_static32_d_d
+ # Stub function for m16_static32_d_d (double)
+ .set nomips16
+ .section .mips16.fn.m16_static32_d_d,"ax",@progbits
+ .align 2
+ .ent __fn_stub_m16_static32_d_d
+__fn_stub_m16_static32_d_d:
+ .set noreorder
+ mfc1 $4,$f13
+ mfc1 $5,$f12
+ .set noat
+ la $1,m16_static32_d_d
+ jr $1
+ .set at
+ nop
+ .set reorder
+ .end __fn_stub_m16_static32_d_d
+ .previous
+
+ .align 2
+ .set nomips16
+ .ent m32_static16_d_d
+m32_static16_d_d:
+ .frame $sp,0,$31 # vars= 0, regs= 0/0, args= 0, gp= 0
+ .mask 0x00000000,0
+ .fmask 0x00000000,0
+ .set noreorder
+ .set nomacro
+
+ j $31
+ mov.d $f0,$f12
+
+ .set macro
+ .set reorder
+ .end m32_static16_d_d
+
+ .align 2
+ .set mips16
+ .ent m16_static16_d_d
+m16_static16_d_d:
+ .frame $sp,8,$31 # vars= 0, regs= 1/0, args= 0, gp= 0
+ .mask 0x80000000,-4
+ .fmask 0x00000000,0
+ save 8,$31
+ move $3,$5
+ .set noreorder
+ .set nomacro
+ #jal __mips16_ret_df
+ move $2,$4
+ .set macro
+ .set reorder
+
+ restore 8,$31
+ j $31
+ .end m16_static16_d_d
+ # Stub function for m16_static16_d_d (double)
+ .set nomips16
+ .section .mips16.fn.m16_static16_d_d,"ax",@progbits
+ .align 2
+ .ent __fn_stub_m16_static16_d_d
+__fn_stub_m16_static16_d_d:
+ .set noreorder
+ mfc1 $4,$f13
+ mfc1 $5,$f12
+ .set noat
+ la $1,m16_static16_d_d
+ jr $1
+ .set at
+ nop
+ .set reorder
+ .end __fn_stub_m16_static16_d_d
+ .previous
+
+ .align 2
+ .globl f32
+ .set nomips16
+ .ent f32
+f32:
+ .frame $sp,64,$31 # vars= 0, regs= 3/3, args= 24, gp= 0
+ .mask 0x80030000,-32
+ .fmask 0x03f00000,-8
+ .set noreorder
+ .set nomacro
+
+ addiu $sp,$sp,-64
+ sw $17,28($sp)
+ move $17,$4
+ sw $31,32($sp)
+ sdc1 $f24,56($sp)
+ sw $16,24($sp)
+ sdc1 $f22,48($sp)
+ sdc1 $f20,40($sp)
+ mtc1 $7,$f22
+ jal m32_static1_l
+ mtc1 $6,$f23
+
+ move $4,$17
+ jal m16_static1_l
+ move $16,$2
+
+ addu $16,$16,$2
+ jal m32_static1_d
+ mov.d $f12,$f22
+
+ addu $16,$16,$2
+ jal m16_static1_d
+ mov.d $f12,$f22
+
+ move $4,$17
+ mfc1 $7,$f22
+ mfc1 $6,$f23
+ jal m32_static1_ld
+ addu $16,$16,$2
+
+ move $4,$17
+ mfc1 $7,$f22
+ mfc1 $6,$f23
+ jal m16_static1_ld
+ addu $16,$16,$2
+
+ move $6,$17
+ mov.d $f12,$f22
+ jal m32_static1_dl
+ addu $16,$16,$2
+
+ move $6,$17
+ mov.d $f12,$f22
+ jal m16_static1_dl
+ addu $16,$16,$2
+
+ move $6,$17
+ move $7,$17
+ sdc1 $f22,16($sp)
+ mov.d $f12,$f22
+ jal m32_static1_dlld
+ addu $16,$16,$2
+
+ move $6,$17
+ move $7,$17
+ mov.d $f12,$f22
+ sdc1 $f22,16($sp)
+ jal m16_static1_dlld
+ addu $16,$16,$2
+
+ move $4,$17
+ jal m32_static1_d_l
+ addu $16,$16,$2
+
+ move $4,$17
+ jal m16_static1_d_l
+ mov.d $f20,$f0
+
+ add.d $f20,$f20,$f0
+ jal m32_static1_d_d
+ mov.d $f12,$f22
+
+ add.d $f20,$f20,$f0
+ jal m16_static1_d_d
+ mov.d $f12,$f22
+
+ move $4,$17
+ jal m32_static32_l
+ add.d $f20,$f20,$f0
+
+ move $4,$17
+ jal m16_static32_l
+ addu $16,$16,$2
+
+ addu $16,$16,$2
+ jal m32_static32_d
+ mov.d $f12,$f22
+
+ addu $16,$16,$2
+ jal m16_static32_d
+ mov.d $f12,$f22
+
+ move $4,$17
+ mfc1 $7,$f22
+ mfc1 $6,$f23
+ jal m32_static32_ld
+ addu $16,$16,$2
+
+ move $4,$17
+ mfc1 $7,$f22
+ mfc1 $6,$f23
+ jal m16_static32_ld
+ addu $16,$16,$2
+
+ move $6,$17
+ mov.d $f12,$f22
+ jal m32_static32_dl
+ addu $16,$16,$2
+
+ move $6,$17
+ mov.d $f12,$f22
+ jal m16_static32_dl
+ addu $16,$16,$2
+
+ move $6,$17
+ move $7,$17
+ sdc1 $f22,16($sp)
+ mov.d $f12,$f22
+ jal m32_static32_dlld
+ addu $16,$16,$2
+
+ move $6,$17
+ move $7,$17
+ mov.d $f12,$f22
+ sdc1 $f22,16($sp)
+ jal m16_static32_dlld
+ addu $16,$16,$2
+
+ move $4,$17
+ jal m32_static32_d_l
+ addu $16,$16,$2
+
+ move $4,$17
+ jal m16_static32_d_l
+ add.d $f20,$f20,$f0
+
+ add.d $f20,$f20,$f0
+ jal m32_static32_d_d
+ mov.d $f12,$f22
+
+ mtc1 $16,$f24
+ add.d $f20,$f20,$f0
+ jal m16_static32_d_d
+ mov.d $f12,$f22
+
+ lw $31,32($sp)
+ lw $17,28($sp)
+ lw $16,24($sp)
+ add.d $f20,$f20,$f0
+ ldc1 $f22,48($sp)
+ cvt.d.w $f0,$f24
+ ldc1 $f24,56($sp)
+ add.d $f0,$f0,$f20
+ ldc1 $f20,40($sp)
+ j $31
+ addiu $sp,$sp,64
+
+ .set macro
+ .set reorder
+ .end f32
+
+ # Stub function to call m32_static1_d (double)
+ .set nomips16
+ .section .mips16.call.m32_static1_d,"ax",@progbits
+ .align 2
+ .ent __call_stub_m32_static1_d
+__call_stub_m32_static1_d:
+ .set noreorder
+ mtc1 $4,$f13
+ mtc1 $5,$f12
+ .set noat
+ la $1,m32_static1_d
+ jr $1
+ .set at
+ nop
+ .set reorder
+ .end __call_stub_m32_static1_d
+ .previous
+
+ # Stub function to call m16_static1_d (double)
+ .set nomips16
+ .section .mips16.call.m16_static1_d,"ax",@progbits
+ .align 2
+ .ent __call_stub_m16_static1_d
+__call_stub_m16_static1_d:
+ .set noreorder
+ mtc1 $4,$f13
+ mtc1 $5,$f12
+ .set noat
+ la $1,m16_static1_d
+ jr $1
+ .set at
+ nop
+ .set reorder
+ .end __call_stub_m16_static1_d
+ .previous
+
+ # Stub function to call m32_static1_dl (double)
+ .set nomips16
+ .section .mips16.call.m32_static1_dl,"ax",@progbits
+ .align 2
+ .ent __call_stub_m32_static1_dl
+__call_stub_m32_static1_dl:
+ .set noreorder
+ mtc1 $4,$f13
+ mtc1 $5,$f12
+ .set noat
+ la $1,m32_static1_dl
+ jr $1
+ .set at
+ nop
+ .set reorder
+ .end __call_stub_m32_static1_dl
+ .previous
+
+ # Stub function to call m16_static1_dl (double)
+ .set nomips16
+ .section .mips16.call.m16_static1_dl,"ax",@progbits
+ .align 2
+ .ent __call_stub_m16_static1_dl
+__call_stub_m16_static1_dl:
+ .set noreorder
+ mtc1 $4,$f13
+ mtc1 $5,$f12
+ .set noat
+ la $1,m16_static1_dl
+ jr $1
+ .set at
+ nop
+ .set reorder
+ .end __call_stub_m16_static1_dl
+ .previous
+
+ # Stub function to call m32_static1_dlld (double)
+ .set nomips16
+ .section .mips16.call.m32_static1_dlld,"ax",@progbits
+ .align 2
+ .ent __call_stub_m32_static1_dlld
+__call_stub_m32_static1_dlld:
+ .set noreorder
+ mtc1 $4,$f13
+ mtc1 $5,$f12
+ .set noat
+ la $1,m32_static1_dlld
+ jr $1
+ .set at
+ nop
+ .set reorder
+ .end __call_stub_m32_static1_dlld
+ .previous
+
+ # Stub function to call m16_static1_dlld (double)
+ .set nomips16
+ .section .mips16.call.m16_static1_dlld,"ax",@progbits
+ .align 2
+ .ent __call_stub_m16_static1_dlld
+__call_stub_m16_static1_dlld:
+ .set noreorder
+ mtc1 $4,$f13
+ mtc1 $5,$f12
+ .set noat
+ la $1,m16_static1_dlld
+ jr $1
+ .set at
+ nop
+ .set reorder
+ .end __call_stub_m16_static1_dlld
+ .previous
+
+ # Stub function to call double m32_static1_d_l ()
+ .set nomips16
+ .section .mips16.call.fp.m32_static1_d_l,"ax",@progbits
+ .align 2
+ .ent __call_stub_fp_m32_static1_d_l
+__call_stub_fp_m32_static1_d_l:
+ .set noreorder
+ move $18,$31
+ jal m32_static1_d_l
+ nop
+ mfc1 $2,$f1
+ mfc1 $3,$f0
+ j $18
+ nop
+ .set reorder
+ .end __call_stub_fp_m32_static1_d_l
+ .previous
+
+ # Stub function to call double m16_static1_d_l ()
+ .set nomips16
+ .section .mips16.call.fp.m16_static1_d_l,"ax",@progbits
+ .align 2
+ .ent __call_stub_fp_m16_static1_d_l
+__call_stub_fp_m16_static1_d_l:
+ .set noreorder
+ move $18,$31
+ jal m16_static1_d_l
+ nop
+ mfc1 $2,$f1
+ mfc1 $3,$f0
+ j $18
+ nop
+ .set reorder
+ .end __call_stub_fp_m16_static1_d_l
+ .previous
+
+ # Stub function to call double m32_static1_d_d (double)
+ .set nomips16
+ .section .mips16.call.fp.m32_static1_d_d,"ax",@progbits
+ .align 2
+ .ent __call_stub_fp_m32_static1_d_d
+__call_stub_fp_m32_static1_d_d:
+ .set noreorder
+ mtc1 $4,$f13
+ mtc1 $5,$f12
+ move $18,$31
+ jal m32_static1_d_d
+ nop
+ mfc1 $2,$f1
+ mfc1 $3,$f0
+ j $18
+ nop
+ .set reorder
+ .end __call_stub_fp_m32_static1_d_d
+ .previous
+
+ # Stub function to call double m16_static1_d_d (double)
+ .set nomips16
+ .section .mips16.call.fp.m16_static1_d_d,"ax",@progbits
+ .align 2
+ .ent __call_stub_fp_m16_static1_d_d
+__call_stub_fp_m16_static1_d_d:
+ .set noreorder
+ mtc1 $4,$f13
+ mtc1 $5,$f12
+ move $18,$31
+ jal m16_static1_d_d
+ nop
+ mfc1 $2,$f1
+ mfc1 $3,$f0
+ j $18
+ nop
+ .set reorder
+ .end __call_stub_fp_m16_static1_d_d
+ .previous
+
+ # Stub function to call m32_static16_d (double)
+ .set nomips16
+ .section .mips16.call.m32_static16_d,"ax",@progbits
+ .align 2
+ .ent __call_stub_m32_static16_d
+__call_stub_m32_static16_d:
+ .set noreorder
+ mtc1 $4,$f13
+ mtc1 $5,$f12
+ .set noat
+ la $1,m32_static16_d
+ jr $1
+ .set at
+ nop
+ .set reorder
+ .end __call_stub_m32_static16_d
+ .previous
+
+ # Stub function to call m16_static16_d (double)
+ .set nomips16
+ .section .mips16.call.m16_static16_d,"ax",@progbits
+ .align 2
+ .ent __call_stub_m16_static16_d
+__call_stub_m16_static16_d:
+ .set noreorder
+ mtc1 $4,$f13
+ mtc1 $5,$f12
+ .set noat
+ la $1,m16_static16_d
+ jr $1
+ .set at
+ nop
+ .set reorder
+ .end __call_stub_m16_static16_d
+ .previous
+
+ # Stub function to call m32_static16_dl (double)
+ .set nomips16
+ .section .mips16.call.m32_static16_dl,"ax",@progbits
+ .align 2
+ .ent __call_stub_m32_static16_dl
+__call_stub_m32_static16_dl:
+ .set noreorder
+ mtc1 $4,$f13
+ mtc1 $5,$f12
+ .set noat
+ la $1,m32_static16_dl
+ jr $1
+ .set at
+ nop
+ .set reorder
+ .end __call_stub_m32_static16_dl
+ .previous
+
+ # Stub function to call m16_static16_dl (double)
+ .set nomips16
+ .section .mips16.call.m16_static16_dl,"ax",@progbits
+ .align 2
+ .ent __call_stub_m16_static16_dl
+__call_stub_m16_static16_dl:
+ .set noreorder
+ mtc1 $4,$f13
+ mtc1 $5,$f12
+ .set noat
+ la $1,m16_static16_dl
+ jr $1
+ .set at
+ nop
+ .set reorder
+ .end __call_stub_m16_static16_dl
+ .previous
+
+ # Stub function to call m32_static16_dlld (double)
+ .set nomips16
+ .section .mips16.call.m32_static16_dlld,"ax",@progbits
+ .align 2
+ .ent __call_stub_m32_static16_dlld
+__call_stub_m32_static16_dlld:
+ .set noreorder
+ mtc1 $4,$f13
+ mtc1 $5,$f12
+ .set noat
+ la $1,m32_static16_dlld
+ jr $1
+ .set at
+ nop
+ .set reorder
+ .end __call_stub_m32_static16_dlld
+ .previous
+
+ # Stub function to call m16_static16_dlld (double)
+ .set nomips16
+ .section .mips16.call.m16_static16_dlld,"ax",@progbits
+ .align 2
+ .ent __call_stub_m16_static16_dlld
+__call_stub_m16_static16_dlld:
+ .set noreorder
+ mtc1 $4,$f13
+ mtc1 $5,$f12
+ .set noat
+ la $1,m16_static16_dlld
+ jr $1
+ .set at
+ nop
+ .set reorder
+ .end __call_stub_m16_static16_dlld
+ .previous
+
+ # Stub function to call double m32_static16_d_l ()
+ .set nomips16
+ .section .mips16.call.fp.m32_static16_d_l,"ax",@progbits
+ .align 2
+ .ent __call_stub_fp_m32_static16_d_l
+__call_stub_fp_m32_static16_d_l:
+ .set noreorder
+ move $18,$31
+ jal m32_static16_d_l
+ nop
+ mfc1 $2,$f1
+ mfc1 $3,$f0
+ j $18
+ nop
+ .set reorder
+ .end __call_stub_fp_m32_static16_d_l
+ .previous
+
+ # Stub function to call double m16_static16_d_l ()
+ .set nomips16
+ .section .mips16.call.fp.m16_static16_d_l,"ax",@progbits
+ .align 2
+ .ent __call_stub_fp_m16_static16_d_l
+__call_stub_fp_m16_static16_d_l:
+ .set noreorder
+ move $18,$31
+ jal m16_static16_d_l
+ nop
+ mfc1 $2,$f1
+ mfc1 $3,$f0
+ j $18
+ nop
+ .set reorder
+ .end __call_stub_fp_m16_static16_d_l
+ .previous
+
+ # Stub function to call double m32_static16_d_d (double)
+ .set nomips16
+ .section .mips16.call.fp.m32_static16_d_d,"ax",@progbits
+ .align 2
+ .ent __call_stub_fp_m32_static16_d_d
+__call_stub_fp_m32_static16_d_d:
+ .set noreorder
+ mtc1 $4,$f13
+ mtc1 $5,$f12
+ move $18,$31
+ jal m32_static16_d_d
+ nop
+ mfc1 $2,$f1
+ mfc1 $3,$f0
+ j $18
+ nop
+ .set reorder
+ .end __call_stub_fp_m32_static16_d_d
+ .previous
+
+ # Stub function to call double m16_static16_d_d (double)
+ .set nomips16
+ .section .mips16.call.fp.m16_static16_d_d,"ax",@progbits
+ .align 2
+ .ent __call_stub_fp_m16_static16_d_d
+__call_stub_fp_m16_static16_d_d:
+ .set noreorder
+ mtc1 $4,$f13
+ mtc1 $5,$f12
+ move $18,$31
+ jal m16_static16_d_d
+ nop
+ mfc1 $2,$f1
+ mfc1 $3,$f0
+ j $18
+ nop
+ .set reorder
+ .end __call_stub_fp_m16_static16_d_d
+ .previous
+
+ .align 2
+ .globl f16
+ .set mips16
+ .ent f16
+f16:
+ .frame $sp,104,$31 # vars= 64, regs= 4/0, args= 24, gp= 0
+ .mask 0x80070000,-4
+ .fmask 0x00000000,0
+ save 104,$16,$17,$18,$31
+ move $17,$4
+ sw $7,116($sp)
+ .set noreorder
+ .set nomacro
+ jal m32_static1_l
+ sw $6,112($sp)
+ .set macro
+ .set reorder
+
+ move $4,$17
+ .set noreorder
+ .set nomacro
+ jal m16_static1_l
+ move $16,$2
+ .set macro
+ .set reorder
+
+ lw $5,116($sp)
+ lw $4,112($sp)
+ .set noreorder
+ .set nomacro
+ jal m32_static1_d
+ addu $16,$2
+ .set macro
+ .set reorder
+
+ lw $5,116($sp)
+ lw $4,112($sp)
+ .set noreorder
+ .set nomacro
+ jal m16_static1_d
+ addu $16,$2
+ .set macro
+ .set reorder
+
+ lw $7,116($sp)
+ lw $6,112($sp)
+ move $4,$17
+ .set noreorder
+ .set nomacro
+ jal m32_static1_ld
+ addu $16,$2
+ .set macro
+ .set reorder
+
+ lw $7,116($sp)
+ lw $6,112($sp)
+ move $4,$17
+ .set noreorder
+ .set nomacro
+ jal m16_static1_ld
+ addu $16,$2
+ .set macro
+ .set reorder
+
+ lw $5,116($sp)
+ lw $4,112($sp)
+ move $6,$17
+ .set noreorder
+ .set nomacro
+ jal m32_static1_dl
+ addu $16,$2
+ .set macro
+ .set reorder
+
+ lw $5,116($sp)
+ lw $4,112($sp)
+ move $6,$17
+ .set noreorder
+ .set nomacro
+ jal m16_static1_dl
+ addu $16,$2
+ .set macro
+ .set reorder
+
+ lw $3,116($sp)
+ lw $6,112($sp)
+ sw $3,20($sp)
+ move $5,$3
+ sw $6,16($sp)
+ move $4,$6
+ move $7,$17
+ move $6,$17
+ .set noreorder
+ .set nomacro
+ jal m32_static1_dlld
+ addu $16,$2
+ .set macro
+ .set reorder
+
+ addu $16,$2
+ lw $7,112($sp)
+ lw $2,116($sp)
+ move $6,$17
+ move $5,$2
+ sw $7,16($sp)
+ move $4,$7
+ sw $2,20($sp)
+ .set noreorder
+ .set nomacro
+ jal m16_static1_dlld
+ move $7,$17
+ .set macro
+ .set reorder
+
+ move $4,$17
+ .set noreorder
+ .set nomacro
+ jal m32_static1_d_l
+ addu $16,$2
+ .set macro
+ .set reorder
+
+ move $4,$17
+ sw $3,28($sp)
+ .set noreorder
+ .set nomacro
+ jal m16_static1_d_l
+ sw $2,24($sp)
+ .set macro
+ .set reorder
+
+ lw $5,28($sp)
+ lw $4,24($sp)
+ move $7,$3
+ .set noreorder
+ .set nomacro
+ #jal __mips16_adddf3
+ move $6,$2
+ .set macro
+ .set reorder
+
+ lw $5,116($sp)
+ lw $4,112($sp)
+ sw $3,36($sp)
+ .set noreorder
+ .set nomacro
+ jal m32_static1_d_d
+ sw $2,32($sp)
+ .set macro
+ .set reorder
+
+ lw $5,36($sp)
+ lw $4,32($sp)
+ move $7,$3
+ .set noreorder
+ .set nomacro
+ #jal __mips16_adddf3
+ move $6,$2
+ .set macro
+ .set reorder
+
+ lw $5,116($sp)
+ lw $4,112($sp)
+ sw $3,44($sp)
+ .set noreorder
+ .set nomacro
+ jal m16_static1_d_d
+ sw $2,40($sp)
+ .set macro
+ .set reorder
+
+ lw $5,44($sp)
+ lw $4,40($sp)
+ move $7,$3
+ .set noreorder
+ .set nomacro
+ #jal __mips16_adddf3
+ move $6,$2
+ .set macro
+ .set reorder
+
+ move $4,$17
+ sw $3,52($sp)
+ .set noreorder
+ .set nomacro
+ jal m32_static16_l
+ sw $2,48($sp)
+ .set macro
+ .set reorder
+
+ move $4,$17
+ .set noreorder
+ .set nomacro
+ jal m16_static16_l
+ addu $16,$2
+ .set macro
+ .set reorder
+
+ lw $5,116($sp)
+ lw $4,112($sp)
+ .set noreorder
+ .set nomacro
+ jal m32_static16_d
+ addu $16,$2
+ .set macro
+ .set reorder
+
+ lw $5,116($sp)
+ lw $4,112($sp)
+ .set noreorder
+ .set nomacro
+ jal m16_static16_d
+ addu $16,$2
+ .set macro
+ .set reorder
+
+ lw $7,116($sp)
+ lw $6,112($sp)
+ move $4,$17
+ .set noreorder
+ .set nomacro
+ jal m32_static16_ld
+ addu $16,$2
+ .set macro
+ .set reorder
+
+ lw $7,116($sp)
+ lw $6,112($sp)
+ move $4,$17
+ .set noreorder
+ .set nomacro
+ jal m16_static16_ld
+ addu $16,$2
+ .set macro
+ .set reorder
+
+ lw $5,116($sp)
+ lw $4,112($sp)
+ move $6,$17
+ .set noreorder
+ .set nomacro
+ jal m32_static16_dl
+ addu $16,$2
+ .set macro
+ .set reorder
+
+ lw $5,116($sp)
+ lw $4,112($sp)
+ move $6,$17
+ .set noreorder
+ .set nomacro
+ jal m16_static16_dl
+ addu $16,$2
+ .set macro
+ .set reorder
+
+ lw $4,116($sp)
+ lw $6,112($sp)
+ sw $4,20($sp)
+ sw $6,16($sp)
+ move $5,$4
+ move $7,$17
+ move $4,$6
+ move $6,$17
+ .set noreorder
+ .set nomacro
+ jal m32_static16_dlld
+ addu $16,$2
+ .set macro
+ .set reorder
+
+ addu $16,$2
+ lw $3,116($sp)
+ lw $2,112($sp)
+ move $6,$17
+ move $7,$17
+ sw $3,20($sp)
+ move $5,$3
+ sw $2,16($sp)
+ .set noreorder
+ .set nomacro
+ jal m16_static16_dlld
+ move $4,$2
+ .set macro
+ .set reorder
+
+ move $4,$17
+ .set noreorder
+ .set nomacro
+ jal m32_static16_d_l
+ addu $16,$2
+ .set macro
+ .set reorder
+
+ lw $5,52($sp)
+ lw $4,48($sp)
+ move $7,$3
+ .set noreorder
+ .set nomacro
+ #jal __mips16_adddf3
+ move $6,$2
+ .set macro
+ .set reorder
+
+ move $4,$17
+ sw $3,60($sp)
+ .set noreorder
+ .set nomacro
+ jal m16_static16_d_l
+ sw $2,56($sp)
+ .set macro
+ .set reorder
+
+ lw $5,60($sp)
+ lw $4,56($sp)
+ move $7,$3
+ .set noreorder
+ .set nomacro
+ #jal __mips16_adddf3
+ move $6,$2
+ .set macro
+ .set reorder
+
+ lw $5,116($sp)
+ lw $4,112($sp)
+ sw $3,68($sp)
+ .set noreorder
+ .set nomacro
+ jal m32_static16_d_d
+ sw $2,64($sp)
+ .set macro
+ .set reorder
+
+ lw $5,68($sp)
+ lw $4,64($sp)
+ move $7,$3
+ .set noreorder
+ .set nomacro
+ #jal __mips16_adddf3
+ move $6,$2
+ .set macro
+ .set reorder
+
+ lw $5,116($sp)
+ lw $4,112($sp)
+ sw $3,76($sp)
+ .set noreorder
+ .set nomacro
+ jal m16_static16_d_d
+ sw $2,72($sp)
+ .set macro
+ .set reorder
+
+ lw $5,76($sp)
+ lw $4,72($sp)
+ move $7,$3
+ .set noreorder
+ .set nomacro
+ #jal __mips16_adddf3
+ move $6,$2
+ .set macro
+ .set reorder
+
+ move $4,$16
+ sw $3,84($sp)
+ .set noreorder
+ .set nomacro
+ #jal __mips16_floatsidf
+ sw $2,80($sp)
+ .set macro
+ .set reorder
+
+ lw $7,84($sp)
+ lw $6,80($sp)
+ move $5,$3
+ .set noreorder
+ .set nomacro
+ #jal __mips16_adddf3
+ move $4,$2
+ .set macro
+ .set reorder
+
+ #jal __mips16_ret_df
+ restore 104,$16,$17,$18,$31
+ j $31
+ .end f16
diff --git a/ld/testsuite/ld-mips-elf/mips16-intermix.d b/ld/testsuite/ld-mips-elf/mips16-intermix.d
new file mode 100644
index 0000000..5c6ee68
--- /dev/null
+++ b/ld/testsuite/ld-mips-elf/mips16-intermix.d
@@ -0,0 +1,132 @@
+
+.*: +file format elf.*mips
+
+SYMBOL TABLE:
+#...
+.* l F .text 0+[0-9a-f]+ m32_static_l
+.* l F .text 0+[0-9a-f]+ 0xf0 m16_static_l
+.* l F .text 0+[0-9a-f]+ m32_static1_l
+.* l F .text 0+[0-9a-f]+ 0xf0 m16_static1_l
+.* l F .text 0+[0-9a-f]+ m32_static32_l
+.* l F .text 0+[0-9a-f]+ 0xf0 m16_static32_l
+.* l F .text 0+[0-9a-f]+ m32_static16_l
+.* l F .text 0+[0-9a-f]+ 0xf0 m16_static16_l
+.* l F .text 0+[0-9a-f]+ __fn_stub_m16_d
+.* l F .text 0+[0-9a-f]+ m32_static_d
+.* l F .text 0+[0-9a-f]+ 0xf0 m16_static_d
+.* l F .text 0+[0-9a-f]+ __fn_stub_m16_static_d
+.* l F .text 0+[0-9a-f]+ m32_static1_d
+.* l F .text 0+[0-9a-f]+ 0xf0 m16_static1_d
+.* l F .text 0+[0-9a-f]+ __fn_stub_m16_static1_d
+.* l F .text 0+[0-9a-f]+ m32_static32_d
+.* l F .text 0+[0-9a-f]+ 0xf0 m16_static32_d
+.* l F .text 0+[0-9a-f]+ __fn_stub_m16_static32_d
+.* l F .text 0+[0-9a-f]+ m32_static16_d
+.* l F .text 0+[0-9a-f]+ 0xf0 m16_static16_d
+.* l F .text 0+[0-9a-f]+ __fn_stub_m16_static16_d
+.* l F .text 0+[0-9a-f]+ m32_static_ld
+.* l F .text 0+[0-9a-f]+ 0xf0 m16_static_ld
+.* l F .text 0+[0-9a-f]+ m32_static1_ld
+.* l F .text 0+[0-9a-f]+ 0xf0 m16_static1_ld
+.* l F .text 0+[0-9a-f]+ m32_static32_ld
+.* l F .text 0+[0-9a-f]+ 0xf0 m16_static32_ld
+.* l F .text 0+[0-9a-f]+ m32_static16_ld
+.* l F .text 0+[0-9a-f]+ 0xf0 m16_static16_ld
+.* l F .text 0+[0-9a-f]+ __fn_stub_m16_dl
+.* l F .text 0+[0-9a-f]+ m32_static_dl
+.* l F .text 0+[0-9a-f]+ 0xf0 m16_static_dl
+.* l F .text 0+[0-9a-f]+ __fn_stub_m16_static_dl
+.* l F .text 0+[0-9a-f]+ m32_static1_dl
+.* l F .text 0+[0-9a-f]+ 0xf0 m16_static1_dl
+.* l F .text 0+[0-9a-f]+ __fn_stub_m16_static1_dl
+.* l F .text 0+[0-9a-f]+ m32_static32_dl
+.* l F .text 0+[0-9a-f]+ 0xf0 m16_static32_dl
+.* l F .text 0+[0-9a-f]+ __fn_stub_m16_static32_dl
+.* l F .text 0+[0-9a-f]+ m32_static16_dl
+.* l F .text 0+[0-9a-f]+ 0xf0 m16_static16_dl
+.* l F .text 0+[0-9a-f]+ __fn_stub_m16_static16_dl
+.* l F .text 0+[0-9a-f]+ __fn_stub_m16_dlld
+.* l F .text 0+[0-9a-f]+ m32_static_dlld
+.* l F .text 0+[0-9a-f]+ 0xf0 m16_static_dlld
+.* l F .text 0+[0-9a-f]+ __fn_stub_m16_static_dlld
+.* l F .text 0+[0-9a-f]+ m32_static1_dlld
+.* l F .text 0+[0-9a-f]+ 0xf0 m16_static1_dlld
+.* l F .text 0+[0-9a-f]+ __fn_stub_m16_static1_dlld
+.* l F .text 0+[0-9a-f]+ m32_static32_dlld
+.* l F .text 0+[0-9a-f]+ 0xf0 m16_static32_dlld
+.* l F .text 0+[0-9a-f]+ __fn_stub_m16_static32_dlld
+.* l F .text 0+[0-9a-f]+ m32_static16_dlld
+.* l F .text 0+[0-9a-f]+ 0xf0 m16_static16_dlld
+.* l F .text 0+[0-9a-f]+ __fn_stub_m16_static16_dlld
+.* l F .text 0+[0-9a-f]+ m32_static_d_l
+.* l F .text 0+[0-9a-f]+ 0xf0 m16_static_d_l
+.* l F .text 0+[0-9a-f]+ m32_static1_d_l
+.* l F .text 0+[0-9a-f]+ 0xf0 m16_static1_d_l
+.* l F .text 0+[0-9a-f]+ m32_static32_d_l
+.* l F .text 0+[0-9a-f]+ 0xf0 m16_static32_d_l
+.* l F .text 0+[0-9a-f]+ m32_static16_d_l
+.* l F .text 0+[0-9a-f]+ 0xf0 m16_static16_d_l
+.* l F .text 0+[0-9a-f]+ __fn_stub_m16_d_d
+.* l F .text 0+[0-9a-f]+ m32_static_d_d
+.* l F .text 0+[0-9a-f]+ 0xf0 m16_static_d_d
+.* l F .text 0+[0-9a-f]+ __fn_stub_m16_static_d_d
+.* l F .text 0+[0-9a-f]+ m32_static1_d_d
+.* l F .text 0+[0-9a-f]+ 0xf0 m16_static1_d_d
+.* l F .text 0+[0-9a-f]+ __fn_stub_m16_static1_d_d
+.* l F .text 0+[0-9a-f]+ m32_static32_d_d
+.* l F .text 0+[0-9a-f]+ 0xf0 m16_static32_d_d
+.* l F .text 0+[0-9a-f]+ __fn_stub_m16_static32_d_d
+.* l F .text 0+[0-9a-f]+ m32_static16_d_d
+.* l F .text 0+[0-9a-f]+ 0xf0 m16_static16_d_d
+.* l F .text 0+[0-9a-f]+ __fn_stub_m16_static16_d_d
+#...
+.* l F .text 0+[0-9a-f]+ __call_stub_m32_static1_d
+.* l F .text 0+[0-9a-f]+ __call_stub_m16_static1_d
+.* l F .text 0+[0-9a-f]+ __call_stub_m32_static1_dl
+.* l F .text 0+[0-9a-f]+ __call_stub_m16_static1_dl
+.* l F .text 0+[0-9a-f]+ __call_stub_m32_static1_dlld
+.* l F .text 0+[0-9a-f]+ __call_stub_m16_static1_dlld
+.* l F .text 0+[0-9a-f]+ __call_stub_fp_m32_static1_d_l
+.* l F .text 0+[0-9a-f]+ __call_stub_fp_m16_static1_d_l
+.* l F .text 0+[0-9a-f]+ __call_stub_fp_m32_static1_d_d
+.* l F .text 0+[0-9a-f]+ __call_stub_fp_m16_static1_d_d
+.* l F .text 0+[0-9a-f]+ __call_stub_m32_static16_d
+.* l F .text 0+[0-9a-f]+ __call_stub_m16_static16_d
+.* l F .text 0+[0-9a-f]+ __call_stub_m32_static16_dl
+.* l F .text 0+[0-9a-f]+ __call_stub_m16_static16_dl
+.* l F .text 0+[0-9a-f]+ __call_stub_m32_static16_dlld
+.* l F .text 0+[0-9a-f]+ __call_stub_m16_static16_dlld
+.* l F .text 0+[0-9a-f]+ __call_stub_fp_m32_static16_d_l
+.* l F .text 0+[0-9a-f]+ __call_stub_fp_m16_static16_d_l
+.* l F .text 0+[0-9a-f]+ __call_stub_fp_m32_static16_d_d
+.* l F .text 0+[0-9a-f]+ __call_stub_fp_m16_static16_d_d
+#...
+.* g F .text 0+[0-9a-f]+ m32_ld
+#...
+.* g F .text 0+[0-9a-f]+ m32_d_l
+.* g F .text 0+[0-9a-f]+ 0xf0 m16_d_d
+.* g F .text 0+[0-9a-f]+ 0xf0 m16_d
+#...
+.* g F .text 0+[0-9a-f]+ 0xf0 f16
+#...
+.* g F .text 0+[0-9a-f]+ m32_d
+#...
+.* g F .text 0+[0-9a-f]+ 0xf0 m16_dl
+#...
+.* g F .text 0+[0-9a-f]+ f32
+#...
+.* g F .text 0+[0-9a-f]+ 0xf0 m16_l
+#...
+.* g F .text 0+[0-9a-f]+ 0xf0 m16_ld
+#...
+.* g F .text 0+[0-9a-f]+ 0xf0 m16_dlld
+.* g F .text 0+[0-9a-f]+ m32_d_d
+#...
+.* g F .text 0+[0-9a-f]+ m32_dl
+#...
+.* g F .text 0+[0-9a-f]+ m32_dlld
+#...
+.* g F .text 0+[0-9a-f]+ 0xf0 m16_d_l
+#...
+.* g F .text 0+[0-9a-f]+ m32_l
+#pass
generated by cgit v1.1 at 2024-12-21 15:20:06 +0000