diff options
-rw-r--r-- | gas/doc/c-bpf.texi | 44 | ||||
-rw-r--r-- | gas/testsuite/gas/bpf/atomic-be-pseudoc.d | 4 | ||||
-rw-r--r-- | gas/testsuite/gas/bpf/atomic-be.d | 4 | ||||
-rw-r--r-- | gas/testsuite/gas/bpf/atomic-pseudoc.d | 4 | ||||
-rw-r--r-- | gas/testsuite/gas/bpf/atomic-pseudoc.s | 4 | ||||
-rw-r--r-- | gas/testsuite/gas/bpf/atomic.d | 4 | ||||
-rw-r--r-- | gas/testsuite/gas/bpf/atomic.s | 5 | ||||
-rw-r--r-- | include/opcode/bpf.h | 6 | ||||
-rw-r--r-- | opcodes/bpf-opc.c | 12 |
9 files changed, 82 insertions, 5 deletions
diff --git a/gas/doc/c-bpf.texi b/gas/doc/c-bpf.texi index 689786e..8f39ab3 100644 --- a/gas/doc/c-bpf.texi +++ b/gas/doc/c-bpf.texi @@ -745,8 +745,26 @@ Jump if signed lesser or equal. @subsection Atomic instructions -Atomic exchange-and-add instructions are provided in two flavors: one -for swapping 64-bit quantities and another for 32-bit quantities. +Atomic exchange instructions are provided in two flavors: one for +compare-and-swap, one for unconditional exchange. + +@table @code +@item acmp [rd + offset16], rs +@itemx r0 = cmpxchg_64 (rd + offset16, r0, rs) +Atomic compare-and-swap. Compares value in @code{r0} to value +addressed by @code{rd + offset16}. On match, the value addressed by +@code{rd + offset16} is replaced with the value in @code{rs}. +Regardless, the value that was at @code{rd + offset16} is +zero-extended and loaded into @code{r0}. + +@item axchg [rd + offset16], rs +@itemx rs = xchg_64 (rd + offset16, rs) +Atomic exchange. Atomically exchanges the value in @code{rs} with +the value addressed by @code{rd + offset16}. +@end table + +@noindent +The following instructions provide atomic arithmetic operations. @table @code @item aadd [rd + offset16], rs @@ -798,8 +816,26 @@ Alias to @code{aadd}. @subsection 32-bit atomic instructions -Atomic exchange-and-add instructions are provided in two flavors: one -for swapping 32-bit quantities and another for 32-bit quantities. +32-bit atomic exchange instructions are provided in two flavors: one +for compare-and-swap, one for unconditional exchange. + +@table @code +@item acmp32 [rd + offset16], rs +@itemx w0 = cmpxchg32_32 (rd + offset16, w0, ws) +Atomic compare-and-swap. Compares value in @code{w0} to value +addressed by @code{rd + offset16}. On match, the value addressed by +@code{rd + offset16} is replaced with the value in @code{ws}. +Regardless, the value that was at @code{rd + offset16} is +zero-extended and loaded into @code{w0}. + +@item axchg [rd + offset16], rs +@itemx ws = xchg32_32 (rd + offset16, ws) +Atomic exchange. Atomically exchanges the value in @code{ws} with +the value addressed by @code{rd + offset16}. +@end table + +@noindent +The following instructions provide 32-bit atomic arithmetic operations. @table @code @item aadd32 [rd + offset16], rs diff --git a/gas/testsuite/gas/bpf/atomic-be-pseudoc.d b/gas/testsuite/gas/bpf/atomic-be-pseudoc.d index e0da408..30c40fa 100644 --- a/gas/testsuite/gas/bpf/atomic-be-pseudoc.d +++ b/gas/testsuite/gas/bpf/atomic-be-pseudoc.d @@ -26,3 +26,7 @@ Disassembly of section .text: 78: c3 12 1e ef 00 00 00 41 w2=atomic_fetch_or\(\(u32\*\)\(r1\+0x1eef\),w2\) 80: db 12 1e ef 00 00 00 a1 r2=atomic_fetch_xor\(\(u64\*\)\(r1\+0x1eef\),r2\) 88: c3 12 1e ef 00 00 00 a1 w2=atomic_fetch_xor\(\(u32\*\)\(r1\+0x1eef\),w2\) + 90: db 12 00 04 00 00 00 f1 r0=cmpxchg_64\(r1\+0x4,r0,r2\) + 98: c3 23 00 04 00 00 00 f1 w0=cmpxchg32_32\(r2\+0x4,w0,w3\) + a0: db 12 00 08 00 00 00 e1 r2=xchg_64\(r1\+0x8,r2\) + a8: c3 13 00 08 00 00 00 e1 w3=xchg32_32\(r1\+0x8,w3\) diff --git a/gas/testsuite/gas/bpf/atomic-be.d b/gas/testsuite/gas/bpf/atomic-be.d index 42a0037..7a04753 100644 --- a/gas/testsuite/gas/bpf/atomic-be.d +++ b/gas/testsuite/gas/bpf/atomic-be.d @@ -24,3 +24,7 @@ Disassembly of section .text: 68: c3 12 1e ef 00 00 00 41 afor32 \[%r1\+0x1eef\],%r2 70: db 12 1e ef 00 00 00 a1 afxor \[%r1\+0x1eef\],%r2 78: c3 12 1e ef 00 00 00 a1 afxor32 \[%r1\+0x1eef\],%r2 + 80: db 12 00 04 00 00 00 f1 acmp \[%r1\+0x4\],%r2 + 88: c3 23 00 04 00 00 00 f1 acmp32 \[%r2\+0x4\],%r3 + 90: db 12 00 08 00 00 00 e1 axchg \[%r1\+0x8\],%r2 + 98: c3 13 00 08 00 00 00 e1 axchg32 \[%r1\+0x8\],%r3 diff --git a/gas/testsuite/gas/bpf/atomic-pseudoc.d b/gas/testsuite/gas/bpf/atomic-pseudoc.d index 30bfba6..2b3739e 100644 --- a/gas/testsuite/gas/bpf/atomic-pseudoc.d +++ b/gas/testsuite/gas/bpf/atomic-pseudoc.d @@ -26,3 +26,7 @@ Disassembly of section .text: 78: c3 21 ef 1e 41 00 00 00 w2=atomic_fetch_or\(\(u32\*\)\(r1\+0x1eef\),w2\) 80: db 21 ef 1e a1 00 00 00 r2=atomic_fetch_xor\(\(u64\*\)\(r1\+0x1eef\),r2\) 88: c3 21 ef 1e a1 00 00 00 w2=atomic_fetch_xor\(\(u32\*\)\(r1\+0x1eef\),w2\) + 90: db 21 04 00 f1 00 00 00 r0=cmpxchg_64\(r1\+0x4,r0,r2\) + 98: c3 32 04 00 f1 00 00 00 w0=cmpxchg32_32\(r2\+0x4,w0,w3\) + a0: db 21 08 00 e1 00 00 00 r2=xchg_64\(r1\+0x8,r2\) + a8: c3 31 08 00 e1 00 00 00 w3=xchg32_32\(r1\+0x8,w3\) diff --git a/gas/testsuite/gas/bpf/atomic-pseudoc.s b/gas/testsuite/gas/bpf/atomic-pseudoc.s index 514cfa9..6994fd1 100644 --- a/gas/testsuite/gas/bpf/atomic-pseudoc.s +++ b/gas/testsuite/gas/bpf/atomic-pseudoc.s @@ -18,3 +18,7 @@ w2 = atomic_fetch_or((u32*)(r1+0x1eef),w2) r2 = atomic_fetch_xor((u64*)(r1+0x1eef),r2) w2 = atomic_fetch_xor((u32*)(r1+0x1eef),w2) + r0 = cmpxchg_64(r1+0x4,r0,r2) + w0 = cmpxchg32_32(r2+0x4,w0,w3) + r2 = xchg_64(r1+0x8,r2) + w3 = xchg32_32(r1+0x8,w3) diff --git a/gas/testsuite/gas/bpf/atomic.d b/gas/testsuite/gas/bpf/atomic.d index f7925b3..121ab35 100644 --- a/gas/testsuite/gas/bpf/atomic.d +++ b/gas/testsuite/gas/bpf/atomic.d @@ -24,3 +24,7 @@ Disassembly of section .text: 68: c3 21 ef 1e 41 00 00 00 afor32 \[%r1\+0x1eef\],%r2 70: db 21 ef 1e a1 00 00 00 afxor \[%r1\+0x1eef\],%r2 78: c3 21 ef 1e a1 00 00 00 afxor32 \[%r1\+0x1eef\],%r2 + 80: db 21 04 00 f1 00 00 00 acmp \[%r1\+0x4\],%r2 + 88: c3 32 04 00 f1 00 00 00 acmp32 \[%r2\+0x4\],%r3 + 90: db 21 08 00 e1 00 00 00 axchg \[%r1\+0x8\],%r2 + 98: c3 31 08 00 e1 00 00 00 axchg32 \[%r1\+0x8\],%r3 diff --git a/gas/testsuite/gas/bpf/atomic.s b/gas/testsuite/gas/bpf/atomic.s index 781a2e9..39ad5ce 100644 --- a/gas/testsuite/gas/bpf/atomic.s +++ b/gas/testsuite/gas/bpf/atomic.s @@ -17,3 +17,8 @@ afor32 [%r1+0x1eef], %r2 afxor [%r1+0x1eef], %r2 afxor32 [%r1+0x1eef], %r2 + + acmp [%r1+4], %r2 + acmp32 [%r2+4], %r3 + axchg [%r1+8], %r2 + axchg32 [%r1+8], %r3 diff --git a/include/opcode/bpf.h b/include/opcode/bpf.h index ed34442..20e323a 100644 --- a/include/opcode/bpf.h +++ b/include/opcode/bpf.h @@ -153,7 +153,7 @@ typedef uint64_t bpf_insn_word; #define BPF_IMM32_AFAND ((uint64_t)0x00000051) #define BPF_IMM32_AFXOR ((uint64_t)0x000000a1) #define BPF_IMM32_AXCHG ((uint64_t)0x000000e1) -#define BPF_IMM32_ACMP ((uint64_t)b0x000000f1) +#define BPF_IMM32_ACMP ((uint64_t)0x000000f1) /* Unique identifiers for BPF instructions. */ @@ -225,6 +225,10 @@ enum bpf_insn_id BPF_INSN_AADD32, BPF_INSN_AOR32, BPF_INSN_AAND32, BPF_INSN_AXOR32, /* Atomic instructions with fetching (32-bit.) */ BPF_INSN_AFADD32, BPF_INSN_AFOR32, BPF_INSN_AFAND32, BPF_INSN_AFXOR32, + /* Atomic compare-and-swap, atomic exchange. */ + BPF_INSN_ACMP, BPF_INSN_AXCHG, + /* Atomic compare-and-swap, atomic exchange (32-bit). */ + BPF_INSN_ACMP32, BPF_INSN_AXCHG32, /* GNU simulator specific instruction. */ BPF_INSN_BRKPT, }; diff --git a/opcodes/bpf-opc.c b/opcodes/bpf-opc.c index ee6719b..26db795 100644 --- a/opcodes/bpf-opc.c +++ b/opcodes/bpf-opc.c @@ -403,6 +403,18 @@ const struct bpf_opcode bpf_opcodes[] = {BPF_INSN_AFXOR32, "afxor32%W[ %dr %o16 ] , %sr", "%sw = atomic_fetch_xor ( ( u32 * ) ( %dr %o16 ) , %sw )", BPF_V3, BPF_CODE|BPF_IMM32, BPF_CLASS_STX|BPF_SIZE_W|BPF_MODE_ATOMIC|BPF_IMM32_AFXOR}, + /* Atomic compare-and-swap, atomic exchange. */ + {BPF_INSN_ACMP, "acmp%W[ %dr %o16 ] , %sr", "r0 = cmpxchg_64 ( %dr %o16 , r0 , %sr )", + BPF_V3, BPF_CODE|BPF_IMM32, BPF_CLASS_STX|BPF_SIZE_DW|BPF_MODE_ATOMIC|BPF_IMM32_ACMP}, + {BPF_INSN_AXCHG, "axchg%W[ %dr %o16 ] , %sr", "%sr = xchg_64 ( %dr %o16 , %sr )", + BPF_V3, BPF_CODE|BPF_IMM32, BPF_CLASS_STX|BPF_SIZE_DW|BPF_MODE_ATOMIC|BPF_IMM32_AXCHG}, + + /* Atomic compare-and-swap, atomic exchange (32-bit). */ + {BPF_INSN_ACMP32, "acmp32%W[ %dr %o16 ], %sr", "w0 = cmpxchg32_32 ( %dr %o16 , w0 , %sw )", + BPF_V3, BPF_CODE|BPF_IMM32, BPF_CLASS_STX|BPF_SIZE_W|BPF_MODE_ATOMIC|BPF_IMM32_ACMP}, + {BPF_INSN_AXCHG32, "axchg32%W[ %dr %o16 ], %sr", "%sw = xchg32_32 ( %dr %o16 , %sw )", + BPF_V3, BPF_CODE|BPF_IMM32, BPF_CLASS_STX|BPF_SIZE_W|BPF_MODE_ATOMIC|BPF_IMM32_AXCHG}, + /* Old versions of aadd and aadd32. */ {BPF_INSN_AADD, "xadddw%W[ %dr %o16 ] , %sr", "* ( u64 * ) ( %dr %o16 ) += %sr", BPF_V1, BPF_CODE|BPF_IMM32, BPF_CLASS_STX|BPF_SIZE_DW|BPF_MODE_ATOMIC|BPF_IMM32_AADD}, |