diff options
| -rw-r--r-- | ld/ChangeLog | 8 | ||||
| -rw-r--r-- | ld/testsuite/ld-mips-elf/vxworks-forced-local-1.d | 6 | ||||
| -rw-r--r-- | ld/testsuite/ld-mips-elf/vxworks1-lib.rd | 6 | ||||
| -rw-r--r-- | ld/testsuite/ld-mips-elf/vxworks1.dd | 8 | ||||
| -rw-r--r-- | ld/testsuite/ld-mips-elf/vxworks1.rd | 8 |
5 files changed, 22 insertions, 14 deletions
diff --git a/ld/ChangeLog b/ld/ChangeLog index 445b080..6b0484f 100644 --- a/ld/ChangeLog +++ b/ld/ChangeLog @@ -1,5 +1,13 @@ 2017-02-01 Maciej W. Rozycki <macro@imgtec.com> + * testsuite/ld-mips-elf/vxworks-forced-local-1.d: Correct the + presentation of relocation addends. + * testsuite/ld-mips-elf/vxworks1-lib.rd: Likewise. + * testsuite/ld-mips-elf/vxworks1.dd: Likewise. + * testsuite/ld-mips-elf/vxworks1.rd: Likewise. + +2017-02-01 Maciej W. Rozycki <macro@imgtec.com> + * testsuite/ld-mips-elf/tls-multi-got-1-1.s: Place `tlsvar_ld' in `.tdata' section. * testsuite/ld-mips-elf/tls-multi-got-1.got: Adjust accordingly. diff --git a/ld/testsuite/ld-mips-elf/vxworks-forced-local-1.d b/ld/testsuite/ld-mips-elf/vxworks-forced-local-1.d index dc02a3b..766987f 100644 --- a/ld/testsuite/ld-mips-elf/vxworks-forced-local-1.d +++ b/ld/testsuite/ld-mips-elf/vxworks-forced-local-1.d @@ -5,8 +5,8 @@ Relocation section '\.rela\.dyn' .* .* -0008140c 00000002 R_MIPS_32 *00080810 -00081410 00000002 R_MIPS_32 *00080814 -00081414 00000002 R_MIPS_32 *00080818 +0008140c 00000002 R_MIPS_32 *80810 +00081410 00000002 R_MIPS_32 *80814 +00081414 00000002 R_MIPS_32 *80818 00081418 00000302 R_MIPS_32 *00000000 *bar \+ 0 #pass diff --git a/ld/testsuite/ld-mips-elf/vxworks1-lib.rd b/ld/testsuite/ld-mips-elf/vxworks1-lib.rd index 12ceb00..c66b1bf 100644 --- a/ld/testsuite/ld-mips-elf/vxworks1-lib.rd +++ b/ld/testsuite/ld-mips-elf/vxworks1-lib.rd @@ -4,9 +4,9 @@ Relocation section '\.rela\.dyn' at offset .* contains .* entries: 00080c0c .*05 R_MIPS_HI16 00000000 __GOTT_BASE__ \+ 0 00080c10 .*06 R_MIPS_LO16 00000000 __GOTT_BASE__ \+ 0 00080c14 .*01 R_MIPS_16 00000000 __GOTT_INDEX__ \+ 0 -0008141c 00000002 R_MIPS_32 00080c5c -00081800 00000002 R_MIPS_32 00080c5c -00081804 00000002 R_MIPS_32 00081800 +0008141c 00000002 R_MIPS_32 80c5c +00081800 00000002 R_MIPS_32 80c5c +00081804 00000002 R_MIPS_32 81800 00081808 .*02 R_MIPS_32 00081808 dglobal \+ 0 0008180c .*02 R_MIPS_32 00000000 dexternal \+ 0 00081420 .*02 R_MIPS_32 00081c00 x \+ 0 diff --git a/ld/testsuite/ld-mips-elf/vxworks1.dd b/ld/testsuite/ld-mips-elf/vxworks1.dd index af9e354..ca4c106 100644 --- a/ld/testsuite/ld-mips-elf/vxworks1.dd +++ b/ld/testsuite/ld-mips-elf/vxworks1.dd @@ -15,9 +15,9 @@ Disassembly of section \.plt: 80818: 1000fff9 b 80800 <_PROCEDURE_LINKAGE_TABLE_> 8081c: 24180000 li t8,0 80820: 3c190008 lui t9,0x8 - 80820: R_MIPS_HI16 _GLOBAL_OFFSET_TABLE_\+0xfffffff0 + 80820: R_MIPS_HI16 _GLOBAL_OFFSET_TABLE_-0x10 80824: 27391400 addiu t9,t9,5120 - 80824: R_MIPS_LO16 _GLOBAL_OFFSET_TABLE_\+0xfffffff0 + 80824: R_MIPS_LO16 _GLOBAL_OFFSET_TABLE_-0x10 80828: 8f390000 lw t9,0\(t9\) 8082c: 00000000 nop 80830: 03200008 jr t9 @@ -25,9 +25,9 @@ Disassembly of section \.plt: 80838: 1000fff1 b 80800 <_PROCEDURE_LINKAGE_TABLE_> 8083c: 24180001 li t8,1 80840: 3c190008 lui t9,0x8 - 80840: R_MIPS_HI16 _GLOBAL_OFFSET_TABLE_\+0xfffffff4 + 80840: R_MIPS_HI16 _GLOBAL_OFFSET_TABLE_-0xc 80844: 27391404 addiu t9,t9,5124 - 80844: R_MIPS_LO16 _GLOBAL_OFFSET_TABLE_\+0xfffffff4 + 80844: R_MIPS_LO16 _GLOBAL_OFFSET_TABLE_-0xc 80848: 8f390000 lw t9,0\(t9\) 8084c: 00000000 nop 80850: 03200008 jr t9 diff --git a/ld/testsuite/ld-mips-elf/vxworks1.rd b/ld/testsuite/ld-mips-elf/vxworks1.rd index f4455f5..05c2bfa 100644 --- a/ld/testsuite/ld-mips-elf/vxworks1.rd +++ b/ld/testsuite/ld-mips-elf/vxworks1.rd @@ -25,8 +25,8 @@ Relocation section '\.rela\.plt\.unloaded' at offset .* contains 8 entries: 00080800 .*05 R_MIPS_HI16 00081410 _GLOBAL_OFFSET_TABLE_ \+ 0 00080804 .*06 R_MIPS_LO16 00081410 _GLOBAL_OFFSET_TABLE_ \+ 0 00081400 .*02 R_MIPS_32 00080800 _PROCEDURE_LINKAGE_TAB.* \+ 18 -00080820 .*05 R_MIPS_HI16 00081410 _GLOBAL_OFFSET_TABLE_ \+ fffffff0 -00080824 .*06 R_MIPS_LO16 00081410 _GLOBAL_OFFSET_TABLE_ \+ fffffff0 +00080820 .*05 R_MIPS_HI16 00081410 _GLOBAL_OFFSET_TABLE_ - 10 +00080824 .*06 R_MIPS_LO16 00081410 _GLOBAL_OFFSET_TABLE_ - 10 00081404 .*02 R_MIPS_32 00080800 _PROCEDURE_LINKAGE_TAB.* \+ 38 -00080840 .*05 R_MIPS_HI16 00081410 _GLOBAL_OFFSET_TABLE_ \+ fffffff4 -00080844 .*06 R_MIPS_LO16 00081410 _GLOBAL_OFFSET_TABLE_ \+ fffffff4 +00080840 .*05 R_MIPS_HI16 00081410 _GLOBAL_OFFSET_TABLE_ - c +00080844 .*06 R_MIPS_LO16 00081410 _GLOBAL_OFFSET_TABLE_ - c |