diff options
| -rw-r--r-- | gdb/ChangeLog | 48 | ||||
| -rw-r--r-- | gdb/config/h8300/tm-h8300.h | 9 | ||||
| -rw-r--r-- | gdb/config/sh/tm-sh.h | 319 | ||||
| -rw-r--r-- | gdb/remote-e7000.c | 239 | ||||
| -rw-r--r-- | gdb/sh-tdep.c | 1312 | ||||
| -rw-r--r-- | gdb/sh3-rom.c | 8 |
6 files changed, 1273 insertions, 662 deletions
diff --git a/gdb/ChangeLog b/gdb/ChangeLog index 7e6a02d..9624c4a 100644 --- a/gdb/ChangeLog +++ b/gdb/ChangeLog @@ -1,3 +1,51 @@ +2000-07-19 Elena Zannoni <ezannoni@kwikemart.cygnus.com> + + Multiarch the sh target. + * sh-tdep.c: + (sh_generic_reg_names, sh_reg_names,sh3_reg_names, sh3e_reg_names, + sh_dsp_reg_names, sh3_dsp_reg_names, sh_processor_type_table): + Remove. + (XMALLOC): Define. + (struct frame_extra_info): Define. + (sh_register_raw_size, sh_register_virtual_size, + sh_register_virtual_type, sh_register_byte, sh_breakpoint_from_pc, + sh_frame_saved_pc, sh_skip_prologue, + sh_nofp_frame_init_saved_regs, sh_fp_frame_init_saved_regs, + sh_extract_struct_value_address, sh_use_struct_convention, + sh_store_struct_return, sh_push_arguments, sh_push_return_address, + sh_saved_pc_after_call, sh_generic_register_name, + sh_sh_register_name, sh_sh3_register_name, sh_sh3e_register_name, + sh_sh_dsp_register_name, sh_sh3_dsp_register_name, + sh_frame_args_address, sh_frame_locals_address, + sh_coerce_float_to_double, sh_default_store_return_value, + sh3e_sh4_store_return_value, sh_generic_show_regs, + sh3_show_regs,sh3e_show_regs, sh3_dsp_show_regs, sh4_show_regs, + sh_dsp_show_regs, sh_register_byte, sh_register_raw_size, + sh_register_virtual_size, sh_sh3e_register_virtual_type, + sh_default_register_virtual_type, sh_gdbarch_init): New functions. + (sh_target_architecture_hook, sh_frame_find_saved_regs, + sh_show_regs): Delete functions. + (sh_frame_chain, sh_find_callers_reg, sh_init_extra_frame_info, + sh_pop_frame, sh_extract_return_value): Update + + * config/sh/tm-sh.h (GDB_MULTI_ARCH): Define to 1. + (struct gdbarch_tdep): Define. + Remove all unnecessary defines. + + * remote-e7000.c ({PR,GBR,SR,MACL,VBR,MACH}_REGNUM): Define to -1, + for h8300 case. + (want_sh,want_nopc_sh,want_nopc_sh3): Make nomenclature + consistent. + (e7000_fetch_registers): Remove ifdef GDB_TARGET_IS_SH, use + runtime check instead. + (e7000_wait): Ditto. + + * sh3-rom.c (sh3_supply_register): Use gdbarch_tdep to get the SSR + and SPC register numbers. + (sh3_regnames, sh3e_regnames): Don't specify a size. + + * config/h8300/tm-h8300.h: Add comment. + Wed Jul 19 12:50:16 2000 Andrew Cagney <cagney@b1.cygnus.com> * solib.c (elf_locate_base, info_sharedlibrary_command): Rename diff --git a/gdb/config/h8300/tm-h8300.h b/gdb/config/h8300/tm-h8300.h index 27a79d7..1223373 100644 --- a/gdb/config/h8300/tm-h8300.h +++ b/gdb/config/h8300/tm-h8300.h @@ -1,5 +1,5 @@ /* Parameters for execution on a H8/300 series machine. - Copyright 1992, 1993 Free Software Foundation, Inc. + Copyright 1992, 1993, 2000 Free Software Foundation, Inc. This file is part of GDB. @@ -25,7 +25,12 @@ struct frame_saved_regs; struct value; struct type; -/* 1 if debugging H8/300H application */ +/* 1 if debugging H8/300H application */ + +/* NOTE: ezannoni 2000-07-18: these variables are part of sim, defined + in sim/h8300/compile.c. They really should not be used this + way. Because of this we cannot get rid of the macro + GDB_TARGET_IS_H8300 in remote-e7000.c */ extern int h8300hmode; extern int h8300smode; diff --git a/gdb/config/sh/tm-sh.h b/gdb/config/sh/tm-sh.h index bb03f53..d7438fe 100644 --- a/gdb/config/sh/tm-sh.h +++ b/gdb/config/sh/tm-sh.h @@ -20,274 +20,53 @@ /* Contributed by Steve Chamberlain sac@cygnus.com */ -struct frame_info; -struct frame_saved_regs; -struct value; -struct type; +#define GDB_MULTI_ARCH 1 + +/* Information that is dependent on the processor variant. */ +struct gdbarch_tdep + { + int FPUL_REGNUM; /* sh3e, sh4 */ + int FPSCR_REGNUM; /* sh3e, sh4 */ + int DSR_REGNUM; /* sh-dsp, sh3-dsp */ + int FP15_REGNUM; /* sh3e, sh4 */ + int A0G_REGNUM; /* sh-dsp, sh3-dsp */ + int A0_REGNUM; /* sh-dsp, sh3-dsp */ + int A1G_REGNUM; /* sh-dsp, sh3-dsp */ + int A1_REGNUM; /* sh-dsp, sh3-dsp */ + int M0_REGNUM; /* sh-dsp, sh3-dsp */ + int M1_REGNUM; /* sh-dsp, sh3-dsp */ + int X0_REGNUM; /* sh-dsp, sh3-dsp */ + int X1_REGNUM; /* sh-dsp, sh3-dsp */ + int Y0_REGNUM; /* sh-dsp, sh3-dsp */ + int Y1_REGNUM; /* sh-dsp, sh3-dsp */ + int MOD_REGNUM; /* sh-dsp, sh3-dsp */ + int SSR_REGNUM; /* sh3, sh3-dsp, sh3e, sh4 */ + int SPC_REGNUM; /* sh3, sh3-dsp, sh3e, sh4 */ + int RS_REGNUM; /* sh-dsp, sh3-dsp */ + int RE_REGNUM; /* sh-dsp, sh3-dsp */ + }; + +/* Registers common to all the SH variants. */ +enum + { + R0_REGNUM = 0, + STRUCT_RETURN_REGNUM = 2, + ARG0_REGNUM = 4, + ARGLAST_REGNUM = 7, + PR_REGNUM = 17, + GBR_REGNUM = 18, + VBR_REGNUM = 19, + MACH_REGNUM = 20, + MACL_REGNUM = 21, + SR_REGNUM = 22 + }; + +#define NUM_REALREGS 59 /* used in remote-e7000.c which is not multiarched. */ + +#define REGISTER_TYPE long /* used in standalone.c */ + +#define BIG_REMOTE_BREAKPOINT { 0xc3, 0x20 } /* Used in remote.c */ +#define LITTLE_REMOTE_BREAKPOINT { 0x20, 0xc3 } /* Used in remote.c */ + +/*#define NOP {0x20, 0x0b}*/ /* Who uses this???*/ -#define GDB_TARGET_IS_SH - -#define IEEE_FLOAT (1) - -/* Define the bit, byte, and word ordering of the machine. */ - -#define TARGET_BYTE_ORDER_SELECTABLE - - -/* Offset from address of function to start of its code. - Zero on most machines. */ - -#define FUNCTION_START_OFFSET 0 - -/* Advance PC across any function entry prologue instructions - to reach some "real" code. */ - -extern CORE_ADDR sh_skip_prologue (CORE_ADDR); -#define SKIP_PROLOGUE(ip) (sh_skip_prologue (ip)) - -/* Immediately after a function call, return the saved pc. - Can't always go through the frames for this because on some machines - the new frame is not set up until the new function executes - some instructions. - - The return address is the value saved in the PR register + 4 */ - -#define SAVED_PC_AFTER_CALL(frame) (ADDR_BITS_REMOVE(read_register(PR_REGNUM))) - -/* Stack grows downward. */ - -#define INNER_THAN(lhs,rhs) ((lhs) < (rhs)) - -/* Illegal instruction - used by the simulator for breakpoint - detection */ - -#define BREAKPOINT {0xc3, 0xc3} /* 0xc3c3 is trapa #c3, and it works in big - and little endian modes */ - -#define BIG_REMOTE_BREAKPOINT { 0xc3, 0x20 } -#define LITTLE_REMOTE_BREAKPOINT { 0x20, 0xc3 } - -/* If your kernel resets the pc after the trap happens you may need to - define this before including this file. */ -#define DECR_PC_AFTER_BREAK 0 - -/* Say how long registers are. */ -#define REGISTER_TYPE long - -/* Say how much memory is needed to store a copy of the register set */ -#define REGISTER_BYTES (NUM_REGS*4) - -/* Index within `registers' of the first byte of the space for - register N. */ - -#define REGISTER_BYTE(N) ((N)*4) - -/* Number of bytes of storage in the actual machine representation - for register N. */ - -#define REGISTER_RAW_SIZE(N) 4 - -#define REGISTER_VIRTUAL_SIZE(N) 4 - -/* Largest value REGISTER_RAW_SIZE can have. */ - -#define MAX_REGISTER_RAW_SIZE 4 - -/* Largest value REGISTER_VIRTUAL_SIZE can have. */ - -#define MAX_REGISTER_VIRTUAL_SIZE 4 - -/* Return the GDB type object for the "standard" data type - of data in register N. */ - -#define REGISTER_VIRTUAL_TYPE(N) \ - (((((N) >= FP0_REGNUM && (N) <= FP15_REGNUM) \ - || (N) == FPUL_REGNUM) \ - && TARGET_ARCHITECTURE->mach != bfd_mach_sh_dsp \ - && TARGET_ARCHITECTURE->mach != bfd_mach_sh3_dsp) \ - ? builtin_type_float : builtin_type_int) - -/* Initializer for an array of names of registers. - Entries beyond the first NUM_REGS are ignored. */ - -extern char **sh_register_names; -#define REGISTER_NAME(i) sh_register_names[i] - -#define NUM_REGS 59 - -/* Register numbers of various important registers. Note that some of - these values are "real" register numbers, and correspond to the - general registers of the machine, and some are "phony" register - numbers which are too large to be actual register numbers as far as - the user is concerned but do serve to get the desired values when - passed to read_register. */ - -#define R0_REGNUM 0 -#define STRUCT_RETURN_REGNUM 2 -#define ARG0_REGNUM 4 -#define ARGLAST_REGNUM 7 -#define FP_REGNUM 14 -#define SP_REGNUM 15 -#define PC_REGNUM 16 -#define PR_REGNUM 17 -#define GBR_REGNUM 18 -#define VBR_REGNUM 19 -#define MACH_REGNUM 20 -#define MACL_REGNUM 21 -#define SR_REGNUM 22 -#define FPUL_REGNUM 23 -#define FPSCR_REGNUM 24 -#define DSR_REGNUM 24 -#define FP0_REGNUM 25 -#define FP15_REGNUM 40 -#define A0G_REGNUM 25 -#define A0_REGNUM 26 -#define A1G_REGNUM 27 -#define A1_REGNUM 28 -#define M0_REGNUM 29 -#define M1_REGNUM 30 -#define X0_REGNUM 31 -#define X1_REGNUM 32 -#define Y0_REGNUM 33 -#define Y1_REGNUM 34 -#define MOD_REGNUM 40 -#define SSR_REGNUM 41 -#define SPC_REGNUM 42 -#define R0B0_REGNUM 43 -#define R0B1_REGNUM 51 -#define RS_REGNUM 43 -#define RE_REGNUM 44 -#define R0B_REGNUM 51 - -#define NUM_REALREGS 59 - -/* Store the address of the place in which to copy the structure the - subroutine will return. This is called from call_function. - - We store structs through a pointer passed in R0 */ - -#define STORE_STRUCT_RETURN(ADDR, SP) \ - { write_register (STRUCT_RETURN_REGNUM, (ADDR)); } - -extern use_struct_convention_fn sh_use_struct_convention; -#define USE_STRUCT_CONVENTION(gcc_p, type) sh_use_struct_convention (gcc_p, type) - -/* Extract from an array REGBUF containing the (raw) register state - a function return value of type TYPE, and copy that, in virtual format, - into VALBUF. */ - -extern void sh_extract_return_value (struct type *, void *, void *); -#define EXTRACT_RETURN_VALUE(TYPE,REGBUF,VALBUF) \ - sh_extract_return_value (TYPE, REGBUF, VALBUF) - -/* Write into appropriate registers a function return value - of type TYPE, given in virtual format. */ - -extern void sh_store_return_value (struct type *, void *); -#define STORE_RETURN_VALUE(TYPE,VALBUF) \ - sh_store_return_value (TYPE, VALBUF) - -/* Extract from an array REGBUF containing the (raw) register state - the address in which a function should return its structure value, - as a CORE_ADDR (or an expression that can be used as one). */ - -#define EXTRACT_STRUCT_VALUE_ADDRESS(REGBUF) \ - extract_address (REGBUF, REGISTER_RAW_SIZE (0)) - - -/* Define other aspects of the stack frame. - we keep a copy of the worked out return pc lying around, since it - is a useful bit of info */ - -#define EXTRA_FRAME_INFO \ - CORE_ADDR return_pc; \ - int leaf_function; \ - int f_offset; - -#define INIT_EXTRA_FRAME_INFO(fromleaf, fi) \ - sh_init_extra_frame_info(fromleaf, fi) -extern void sh_init_extra_frame_info (int, struct frame_info *); - -/* A macro that tells us whether the function invocation represented - by FI does not have a frame on the stack associated with it. If it - does not, FRAMELESS is set to 1, else 0. */ - -#define FRAMELESS_FUNCTION_INVOCATION(FI) \ - (frameless_look_for_prologue(FI)) - -#define FRAME_SAVED_PC(FRAME) ((FRAME)->return_pc) -#define FRAME_ARGS_ADDRESS(fi) ((fi)->frame) -#define FRAME_LOCALS_ADDRESS(fi) ((fi)->frame) - -/* Set VAL to the number of args passed to frame described by FI. - Can set VAL to -1, meaning no way to tell. */ - -/* We can't tell how many args there are */ - -#define FRAME_NUM_ARGS(fi) (-1) - -/* Return number of bytes at start of arglist that are not really args. */ - -#define FRAME_ARGS_SKIP 0 - -extern void sh_frame_find_saved_regs (struct frame_info *fi, - struct frame_saved_regs *fsr); - -/* Put here the code to store, into a struct frame_saved_regs, - the addresses of the saved registers of frame described by FRAME_INFO. - This includes special registers such as pc and fp saved in special - ways in the stack frame. sp is even more special: - the address we return for it IS the sp for the next frame. */ - -#define FRAME_FIND_SAVED_REGS(frame_info, frame_saved_regs) \ - sh_frame_find_saved_regs(frame_info, &(frame_saved_regs)) - -typedef unsigned short INSN_WORD; - -extern CORE_ADDR sh_push_arguments (int nargs, - struct value **args, - CORE_ADDR sp, - unsigned char struct_return, - CORE_ADDR struct_addr); - -#define USE_GENERIC_DUMMY_FRAMES 1 -#define CALL_DUMMY {0} -#define CALL_DUMMY_LENGTH (0) -#define CALL_DUMMY_START_OFFSET (0) -#define CALL_DUMMY_BREAKPOINT_OFFSET (0) -#define FIX_CALL_DUMMY(DUMMY, STARTADDR, FUNADDR, NARGS, ARGS, TYPE, GCCP) -#define CALL_DUMMY_LOCATION AT_ENTRY_POINT -#define CALL_DUMMY_ADDRESS() entry_point_address () -extern CORE_ADDR sh_push_return_address (CORE_ADDR, CORE_ADDR); -#define PUSH_RETURN_ADDRESS(PC, SP) sh_push_return_address (PC, SP) - - -extern CORE_ADDR sh_frame_chain (struct frame_info *); -#define FRAME_CHAIN(FRAME) sh_frame_chain(FRAME) -#define PUSH_DUMMY_FRAME generic_push_dummy_frame () -#define FRAME_CHAIN_VALID(FP, FRAME) generic_file_frame_chain_valid (FP, FRAME) -#define PC_IN_CALL_DUMMY(PC, SP, FP) generic_pc_in_call_dummy (PC, SP, FP) -#define PUSH_ARGUMENTS(NARGS, ARGS, SP, STRUCT_RETURN, STRUCT_ADDR) \ - (sh_push_arguments (NARGS, ARGS, SP, STRUCT_RETURN, STRUCT_ADDR)) - -/* override the standard get_saved_register function with - one that takes account of generic CALL_DUMMY frames */ -#define GET_SAVED_REGISTER(raw_buffer, optimized, addrp, frame, regnum, lval) \ - generic_get_saved_register (raw_buffer, optimized, addrp, frame, regnum, lval) - -/* Discard from the stack the innermost frame, restoring all saved - registers. */ - -extern void sh_pop_frame (void); -#define POP_FRAME sh_pop_frame(); - -#define NOP {0x20, 0x0b} - -#define REGISTER_SIZE 4 - -#define COERCE_FLOAT_TO_DOUBLE(formal, actual) (1) - -#define BELIEVE_PCC_PROMOTION 1 - -/* Need this for WinGDB. See gdb/mswin/{regdoc.h, gdbwin.c, gui.cpp}. */ -#define TARGET_SH diff --git a/gdb/remote-e7000.c b/gdb/remote-e7000.c index 6de0315..dcc1384 100644 --- a/gdb/remote-e7000.c +++ b/gdb/remote-e7000.c @@ -1,5 +1,5 @@ /* Remote debugging interface for Hitachi E7000 ICE, for GDB - Copyright 1993, 1994, 1996, 1997, 1998 Free Software Foundation, Inc. + Copyright 1993, 1994, 1996, 1997, 1998, 2000 Free Software Foundation, Inc. Contributed by Cygnus Support. Written by Steve Chamberlain for Cygnus Support. @@ -61,6 +61,31 @@ #define ACK 0x06 #define CTRLZ 0x1a +/* This file is used by 2 different targets, sh-elf and h8300. The + h8300 is not multiarched and doesn't use the registers defined in + tm-sh.h. To avoid using a macro GDB_TARGET_IS_SH, we do runtime check + of the target, which requires that these namse below are always + defined also in the h8300 case. */ + +#if !defined (PR_REGNUM) +#define PR_REGNUM -1 +#endif +#if !defined (GBR_REGNUM) +#define GBR_REGNUM -1 +#endif +#if !defined (VBR_REGNUM) +#define VBR_REGNUM -1 +#endif +#if !defined (MACH_REGNUM) +#define MACH_REGNUM -1 +#endif +#if !defined (MACL_REGNUM) +#define MACL_REGNUM -1 +#endif +#if !defined (SR_REGNUM) +#define SR_REGNUM -1 +#endif + extern void notice_quit (void); extern void report_transfer_performance (unsigned long, time_t, time_t); @@ -732,8 +757,6 @@ e7000_resume (pid, step, sig) BREAK POINT */ -#ifdef GDB_TARGET_IS_H8300 - char *want_h8300h = "PC=%p CCR=%c\n\ ER0 - ER3 %0 %1 %2 %3\n\ ER4 - ER7 %4 %5 %6 %7\n"; @@ -751,17 +774,13 @@ char *want_nopc_h8300s = "%p CCR=%c EXR=%9\n\ ER0 - ER3 %0 %1 %2 %3\n\ ER4 - ER7 %4 %5 %6 %7"; -#endif - -#ifdef GDB_TARGET_IS_SH - -char *want = "PC=%16 SR=%22\n\ +char *want_sh = "PC=%16 SR=%22\n\ PR=%17 GBR=%18 VBR=%19\n\ MACH=%20 MACL=%21\n\ R0-7 %0 %1 %2 %3 %4 %5 %6 %7\n\ R8-15 %8 %9 %10 %11 %12 %13 %14 %15\n"; -char *want_nopc = "%16 SR=%22\n\ +char *want_nopc_sh = "%16 SR=%22\n\ PR=%17 GBR=%18 VBR=%19\n\ MACH=%20 MACL=%21\n\ R0-7 %0 %1 %2 %3 %4 %5 %6 %7\n\ @@ -777,7 +796,7 @@ R4_BANK0-R7_BANK0 %29 %30 %31 %32\n\ R0_BANK1-R3_BANK1 %33 %34 %35 %36\n\ R4_BANK1-R7_BANK1 %37 %38 %39 %40"; -char *want_sh3_nopc = "%16 SR=%22\n\ +char *want_nopc_sh3 = "%16 SR=%22\n\ PR=%17 GBR=%18 VBR=%19\n\ MACH=%20 MACL=%21 SSR=%22 SPC=%23\n\ R0-7 %0 %1 %2 %3 %4 %5 %6 %7\n\ @@ -787,8 +806,6 @@ char *want_sh3_nopc = "%16 SR=%22\n\ R0_BANK1-R3_BANK1 %33 %34 %35 %36\n\ R4_BANK1-R7_BANK1 %37 %38 %39 %40"; -#endif - static int gch () { @@ -920,22 +937,27 @@ e7000_fetch_registers () puts_e7000debug ("R\r"); -#ifdef GDB_TARGET_IS_SH - wanted = want; if (TARGET_ARCHITECTURE->arch == bfd_arch_sh) - switch (TARGET_ARCHITECTURE->mach) - { - case bfd_mach_sh3: - case bfd_mach_sh3e: - case bfd_mach_sh4: - wanted = want_sh3; - } -#else - if (h8300smode) - wanted = want_h8300s; - else - wanted = want_h8300h; + { + wanted = want_sh; + switch (TARGET_ARCHITECTURE->mach) + { + case bfd_mach_sh3: + case bfd_mach_sh3e: + case bfd_mach_sh4: + wanted = want_sh3; + } + } +#ifdef GDB_TARGET_IS_H8300 + if (TARGET_ARCHITECTURE->arch == bfd_arch_h8300) + { + if (h8300smode) + wanted = want_h8300s; + else + wanted = want_h8300h; + } #endif + fetch_regs_from_dump (gch, wanted); /* And supply the extra ones the simulator uses */ @@ -984,70 +1006,77 @@ e7000_store_register (regno) return; } -#ifdef GDB_TARGET_IS_H8300 - if (regno <= 7) + if (TARGET_ARCHITECTURE->arch == bfd_arch_h8300) { - sprintf (buf, ".ER%d %x\r", regno, read_register (regno)); - puts_e7000debug (buf); - } - else if (regno == PC_REGNUM) - { - sprintf (buf, ".PC %x\r", read_register (regno)); - puts_e7000debug (buf); - } - else if (regno == CCR_REGNUM) - { - sprintf (buf, ".CCR %x\r", read_register (regno)); - puts_e7000debug (buf); + if (regno <= 7) + { + sprintf (buf, ".ER%d %lx\r", regno, read_register (regno)); + puts_e7000debug (buf); + } + else if (regno == PC_REGNUM) + { + sprintf (buf, ".PC %lx\r", read_register (regno)); + puts_e7000debug (buf); + } +#ifdef CCR_REGNUM + else if (regno == CCR_REGNUM) + { + sprintf (buf, ".CCR %lx\r", read_register (regno)); + puts_e7000debug (buf); + } +#endif } -#endif /* GDB_TARGET_IS_H8300 */ -#ifdef GDB_TARGET_IS_SH - switch (regno) + else if (TARGET_ARCHITECTURE->arch == bfd_arch_sh) { - default: - sprintf (buf, ".R%d %x\r", regno, read_register (regno)); - puts_e7000debug (buf); - break; - - case PC_REGNUM: - sprintf (buf, ".PC %x\r", read_register (regno)); - puts_e7000debug (buf); - break; + if (regno == PC_REGNUM) + { + sprintf (buf, ".PC %lx\r", read_register (regno)); + puts_e7000debug (buf); + } - case SR_REGNUM: - sprintf (buf, ".SR %x\r", read_register (regno)); - puts_e7000debug (buf); - break; + else if (regno == SR_REGNUM) + { + sprintf (buf, ".SR %lx\r", read_register (regno)); + puts_e7000debug (buf); + } - case PR_REGNUM: - sprintf (buf, ".PR %x\r", read_register (regno)); - puts_e7000debug (buf); - break; + else if (regno == PR_REGNUM) + { + sprintf (buf, ".PR %lx\r", read_register (regno)); + puts_e7000debug (buf); + } - case GBR_REGNUM: - sprintf (buf, ".GBR %x\r", read_register (regno)); - puts_e7000debug (buf); - break; + else if (regno == GBR_REGNUM) + { + sprintf (buf, ".GBR %lx\r", read_register (regno)); + puts_e7000debug (buf); + } - case VBR_REGNUM: - sprintf (buf, ".VBR %x\r", read_register (regno)); - puts_e7000debug (buf); - break; + else if (regno == VBR_REGNUM) + { + sprintf (buf, ".VBR %lx\r", read_register (regno)); + puts_e7000debug (buf); + } - case MACH_REGNUM: - sprintf (buf, ".MACH %x\r", read_register (regno)); - puts_e7000debug (buf); - break; + else if (regno == MACH_REGNUM) + { + sprintf (buf, ".MACH %lx\r", read_register (regno)); + puts_e7000debug (buf); + } - case MACL_REGNUM: - sprintf (buf, ".MACL %x\r", read_register (regno)); - puts_e7000debug (buf); - break; + else if (regno == MACL_REGNUM) + { + sprintf (buf, ".MACL %lx\r", read_register (regno)); + puts_e7000debug (buf); + } + else + { + sprintf (buf, ".R%d %lx\r", regno, read_register (regno)); + puts_e7000debug (buf); + } } -#endif /* GDB_TARGET_IS_SH */ - expect_prompt (); } @@ -1098,7 +1127,7 @@ write_small (memaddr, myaddr, len) if (((memaddr + i) & 3) == 0 && (i + 3 < len)) { /* Can be done with a long word */ - sprintf (buf, "m %x %x%02x%02x%02x;l\r", + sprintf (buf, "m %lx %x%02x%02x%02x;l\r", memaddr + i, myaddr[i], myaddr[i + 1], myaddr[i + 2], myaddr[i + 3]); puts_e7000debug (buf); @@ -1106,7 +1135,7 @@ write_small (memaddr, myaddr, len) } else { - sprintf (buf, "m %x %x\r", memaddr + i, myaddr[i]); + sprintf (buf, "m %lx %x\r", memaddr + i, myaddr[i]); puts_e7000debug (buf); } } @@ -1268,7 +1297,7 @@ e7000_read_inferior_memory (memaddr, myaddr, len) return 0; } - sprintf (buf, "m %x;l\r", memaddr); + sprintf (buf, "m %lx;l\r", memaddr); puts_e7000debug (buf); for (count = 0; count < len; count += 4) @@ -1349,7 +1378,7 @@ e7000_read_inferior_memory_large (memaddr, myaddr, len) return 0; } - sprintf (buf, "d %x %x\r", memaddr, memaddr + len - 1); + sprintf (buf, "d %lx %lx\r", memaddr, memaddr + len - 1); puts_e7000debug (buf); count = 0; @@ -1603,7 +1632,7 @@ e7000_load (args, from_tty) section_size = bfd_get_section_size_before_reloc (section); if (!quiet) - printf_filtered ("[Loading section %s at 0x%x (%d bytes)]\n", + printf_filtered ("[Loading section %s at 0x%x (%ud bytes)]\n", bfd_get_section_name (pbfd, section), section_address, section_size); @@ -1736,12 +1765,12 @@ e7000_insert_breakpoint (addr, shadow) #ifdef HARD_BREAKPOINTS if (BC_BREAKPOINTS) { - sprintf (buf, "BC%d A=%x\r", i + 1, addr); + sprintf (buf, "BC%d A=%lx\r", i + 1, addr); puts_e7000debug (buf); } else { - sprintf (buf, "B %x\r", addr); + sprintf (buf, "B %lx\r", addr); puts_e7000debug (buf); } #else @@ -1782,12 +1811,12 @@ e7000_remove_breakpoint (addr, shadow) } else { - sprintf (buf, "B - %x\r", addr); + sprintf (buf, "B - %lx\r", addr); puts_e7000debug (buf); } expect_prompt (); #else - sprintf (buf, "B - %x\r", addr); + sprintf (buf, "B - %lx\r", addr); puts_e7000debug (buf); expect_prompt (); @@ -1800,7 +1829,7 @@ e7000_remove_breakpoint (addr, shadow) return 0; } - warning ("Can't find breakpoint associated with 0x%x\n", addr); + warning ("Can't find breakpoint associated with 0x%lx\n", addr); return 1; } @@ -2008,7 +2037,7 @@ sub2_from_pc () REGISTER_RAW_SIZE (PC_REGNUM), read_register (PC_REGNUM) - 2); supply_register (PC_REGNUM, buf); - sprintf (buf2, ".PC %x\r", read_register (PC_REGNUM)); + sprintf (buf2, ".PC %lx\r", read_register (PC_REGNUM)); puts_e7000debug (buf2); } @@ -2078,21 +2107,25 @@ e7000_wait (pid, status) /* Skip till the PC= */ expect ("="); -#ifdef GDB_TARGET_IS_SH - wanted_nopc = want_nopc; if (TARGET_ARCHITECTURE->arch == bfd_arch_sh) - switch (TARGET_ARCHITECTURE->mach) - { - case bfd_mach_sh3: - case bfd_mach_sh3e: - case bfd_mach_sh4: - wanted_nopc = want_sh3_nopc; - } -#else - if (h8300smode) - wanted_nopc = want_nopc_h8300s; - else - wanted_nopc = want_nopc_h8300h; + { + wanted_nopc = want_nopc_sh; + switch (TARGET_ARCHITECTURE->mach) + { + case bfd_mach_sh3: + case bfd_mach_sh3e: + case bfd_mach_sh4: + wanted_nopc = want_nopc_sh3; + } + } +#ifdef GDB_TARGET_IS_H8300 + if (TARGET_ARCHITECTURE->arch == bfd_arch_h8300) + { + if (h8300smode) + wanted_nopc = want_nopc_h8300s; + else + wanted_nopc = want_nopc_h8300h; + } #endif fetch_regs_from_dump (gch, wanted_nopc); diff --git a/gdb/sh-tdep.c b/gdb/sh-tdep.c index 19bfa8e..d00c904 100644 --- a/gdb/sh-tdep.c +++ b/gdb/sh-tdep.c @@ -38,123 +38,220 @@ #include "gdb_string.h" #include "arch-utils.h" -/* A set of original names, to be used when restoring back to generic - registers from a specific set. */ -/* *INDENT-OFF* */ -static char *sh_generic_reg_names[] = { - "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", - "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15", - "pc", "pr", "gbr", "vbr", "mach", "macl", "sr", - "fpul", "fpscr", - "fr0", "fr1", "fr2", "fr3", "fr4", "fr5", "fr6", "fr7", - "fr8", "fr9", "fr10", "fr11", "fr12", "fr13", "fr14", "fr15", - "ssr", "spc", - "r0b0", "r1b0", "r2b0", "r3b0", "r4b0", "r5b0", "r6b0", "r7b0", - "r0b1", "r1b1", "r2b1", "r3b1", "r4b1", "r5b1", "r6b1", "r7b1", -}; - -static char *sh_reg_names[] = { - "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", - "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15", - "pc", "pr", "gbr", "vbr", "mach", "macl", "sr", - "", "", - "", "", "", "", "", "", "", "", - "", "", "", "", "", "", "", "", - "", "", - "", "", "", "", "", "", "", "", - "", "", "", "", "", "", "", "", -}; - -static char *sh3_reg_names[] = { - "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", - "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15", - "pc", "pr", "gbr", "vbr", "mach", "macl", "sr", - "", "", - "", "", "", "", "", "", "", "", - "", "", "", "", "", "", "", "", - "ssr", "spc", - "r0b0", "r1b0", "r2b0", "r3b0", "r4b0", "r5b0", "r6b0", "r7b0", - "r0b1", "r1b1", "r2b1", "r3b1", "r4b1", "r5b1", "r6b1", "r7b1" -}; - -static char *sh3e_reg_names[] = { - "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", - "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15", - "pc", "pr", "gbr", "vbr", "mach", "macl", "sr", - "fpul", "fpscr", - "fr0", "fr1", "fr2", "fr3", "fr4", "fr5", "fr6", "fr7", - "fr8", "fr9", "fr10", "fr11", "fr12", "fr13", "fr14", "fr15", - "ssr", "spc", - "r0b0", "r1b0", "r2b0", "r3b0", "r4b0", "r5b0", "r6b0", "r7b0", - "r0b1", "r1b1", "r2b1", "r3b1", "r4b1", "r5b1", "r6b1", "r7b1", -}; - -static char *sh_dsp_reg_names[] = { - "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", - "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15", - "pc", "pr", "gbr", "vbr", "mach", "macl", "sr", - "", "dsr", - "a0g", "a0", "a1g", "a1", "m0", "m1", "x0", "x1", - "y0", "y1", "", "", "", "", "", "mod", - "", "", - "rs", "re", "", "", "", "", "", "", - "", "", "", "", "", "", "", "", -}; - -static char *sh3_dsp_reg_names[] = { - "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", - "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15", - "pc", "pr", "gbr", "vbr", "mach", "macl", "sr", - "", "dsr", - "a0g", "a0", "a1g", "a1", "m0", "m1", "x0", "x1", - "y0", "y1", "", "", "", "", "", "mod", - "ssr", "spc", - "rs", "re", "", "", "", "", "", "", - "r0b", "r1b", "r2b", "r3b", "r4b", "r5b", "r6b", "r7b", +#undef XMALLOC +#define XMALLOC(TYPE) ((TYPE*) xmalloc (sizeof (TYPE))) + +static gdbarch_register_raw_size_ftype sh_register_raw_size; +static gdbarch_register_virtual_size_ftype sh_register_virtual_size; +static gdbarch_register_virtual_type_ftype sh_register_virtual_type; +static gdbarch_register_byte_ftype sh_register_byte; +static gdbarch_breakpoint_from_pc_ftype sh_breakpoint_from_pc; +static gdbarch_frame_chain_ftype sh_frame_chain; +static gdbarch_frame_saved_pc_ftype sh_frame_saved_pc; +static gdbarch_skip_prologue_ftype sh_skip_prologue; +static gdbarch_frame_init_saved_regs_ftype sh_nofp_frame_init_saved_regs; +static gdbarch_frame_init_saved_regs_ftype sh_fp_frame_init_saved_regs; +static gdbarch_extract_return_value_ftype sh_extract_return_value; +static gdbarch_extract_struct_value_address_ftype sh_extract_struct_value_address; +static gdbarch_use_struct_convention_ftype sh_use_struct_convention; +static gdbarch_init_extra_frame_info_ftype sh_init_extra_frame_info; +static gdbarch_store_struct_return_ftype sh_store_struct_return; +static gdbarch_push_arguments_ftype sh_push_arguments; +static gdbarch_push_return_address_ftype sh_push_return_address; +static gdbarch_pop_frame_ftype sh_pop_frame; +static gdbarch_saved_pc_after_call_ftype sh_saved_pc_after_call; + +static gdbarch_register_name_ftype sh_generic_register_name; +static gdbarch_register_name_ftype sh_sh_register_name; +static gdbarch_register_name_ftype sh_sh3_register_name; +static gdbarch_register_name_ftype sh_sh3e_register_name; +static gdbarch_register_name_ftype sh_sh_dsp_register_name; +static gdbarch_register_name_ftype sh_sh3_dsp_register_name; + +static gdbarch_frame_args_address_ftype sh_frame_args_address; +static gdbarch_frame_locals_address_ftype sh_frame_locals_address; +static gdbarch_coerce_float_to_double_ftype sh_coerce_float_to_double; +static gdbarch_store_return_value_ftype sh_default_store_return_value; +static gdbarch_store_return_value_ftype sh3e_sh4_store_return_value; + +static gdbarch_register_byte_ftype sh_register_byte; +static gdbarch_register_raw_size_ftypesh_register_raw_size; +static gdbarch_register_virtual_size_ftype sh_register_virtual_size; +static gdbarch_register_virtual_type_ftype sh_sh3e_register_virtual_type; +static gdbarch_register_virtual_type_ftype sh_default_register_virtual_type; + +static void sh_generic_show_regs (char *, int); +static void sh3_show_regs (char *, int); +static void sh3e_show_regs (char *, int); +static void sh3_dsp_show_regs (char *, int); +static void sh_dsp_show_regs (char *, int); +static void sh4_show_regs (char *, int); + +void (*sh_show_regs) (char *, int); + +/* Define other aspects of the stack frame. + we keep a copy of the worked out return pc lying around, since it + is a useful bit of info */ + +struct frame_extra_info +{ + CORE_ADDR return_pc; + int leaf_function; + int f_offset; }; -/* *INDENT-ON* */ +#if 0 #ifdef _WIN32_WCE char **sh_register_names = sh3_reg_names; #else char **sh_register_names = sh_generic_reg_names; #endif +#endif -struct - { - char **regnames; - int mach; - } -sh_processor_type_table[] = +static char * +sh_generic_register_name (int reg_nr) { + static char *register_names[] = { - sh_reg_names, bfd_mach_sh - } - , - { - sh_reg_names, bfd_mach_sh2 - } - , + "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", + "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15", + "pc", "pr", "gbr", "vbr", "mach", "macl", "sr", + "fpul", "fpscr", + "fr0", "fr1", "fr2", "fr3", "fr4", "fr5", "fr6", "fr7", + "fr8", "fr9", "fr10", "fr11", "fr12", "fr13", "fr14", "fr15", + "ssr", "spc", + "r0b0", "r1b0", "r2b0", "r3b0", "r4b0", "r5b0", "r6b0", "r7b0", + "r0b1", "r1b1", "r2b1", "r3b1", "r4b1", "r5b1", "r6b1", "r7b1", + }; + if (reg_nr < 0) + return NULL; + if (reg_nr >= (sizeof (register_names) / sizeof (*register_names))) + return NULL; + return register_names[reg_nr]; +} + +static char * +sh_sh_register_name (int reg_nr) +{ + static char *register_names[] = { - sh_dsp_reg_names, bfd_mach_sh_dsp - } - , + "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", + "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15", + "pc", "pr", "gbr", "vbr", "mach", "macl", "sr", + "", "", + "", "", "", "", "", "", "", "", + "", "", "", "", "", "", "", "", + "", "", + "", "", "", "", "", "", "", "", + "", "", "", "", "", "", "", "", + }; + if (reg_nr < 0) + return NULL; + if (reg_nr >= (sizeof (register_names) / sizeof (*register_names))) + return NULL; + return register_names[reg_nr]; +} + +static char * +sh_sh3_register_name (int reg_nr) +{ + static char *register_names[] = { - sh3_reg_names, bfd_mach_sh3 - } - , + "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", + "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15", + "pc", "pr", "gbr", "vbr", "mach", "macl", "sr", + "", "", + "", "", "", "", "", "", "", "", + "", "", "", "", "", "", "", "", + "ssr", "spc", + "r0b0", "r1b0", "r2b0", "r3b0", "r4b0", "r5b0", "r6b0", "r7b0", + "r0b1", "r1b1", "r2b1", "r3b1", "r4b1", "r5b1", "r6b1", "r7b1" + }; + if (reg_nr < 0) + return NULL; + if (reg_nr >= (sizeof (register_names) / sizeof (*register_names))) + return NULL; + return register_names[reg_nr]; +} + +static char * +sh_sh3e_register_name (int reg_nr) +{ + static char *register_names[] = { - sh3_dsp_reg_names, bfd_mach_sh3_dsp - } - , + "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", + "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15", + "pc", "pr", "gbr", "vbr", "mach", "macl", "sr", + "fpul", "fpscr", + "fr0", "fr1", "fr2", "fr3", "fr4", "fr5", "fr6", "fr7", + "fr8", "fr9", "fr10", "fr11", "fr12", "fr13", "fr14", "fr15", + "ssr", "spc", + "r0b0", "r1b0", "r2b0", "r3b0", "r4b0", "r5b0", "r6b0", "r7b0", + "r0b1", "r1b1", "r2b1", "r3b1", "r4b1", "r5b1", "r6b1", "r7b1", + }; + if (reg_nr < 0) + return NULL; + if (reg_nr >= (sizeof (register_names) / sizeof (*register_names))) + return NULL; + return register_names[reg_nr]; +} + +static char * +sh_sh_dsp_register_name (int reg_nr) +{ + static char *register_names[] = { - sh3e_reg_names, bfd_mach_sh3e - } - , + "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", + "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15", + "pc", "pr", "gbr", "vbr", "mach", "macl", "sr", + "", "dsr", + "a0g", "a0", "a1g", "a1", "m0", "m1", "x0", "x1", + "y0", "y1", "", "", "", "", "", "mod", + "", "", + "rs", "re", "", "", "", "", "", "", + "", "", "", "", "", "", "", "", + }; + if (reg_nr < 0) + return NULL; + if (reg_nr >= (sizeof (register_names) / sizeof (*register_names))) + return NULL; + return register_names[reg_nr]; +} + +static char * +sh_sh3_dsp_register_name (int reg_nr) +{ + static char *register_names[] = { - NULL, 0 - } -}; + "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", + "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15", + "pc", "pr", "gbr", "vbr", "mach", "macl", "sr", + "", "dsr", + "a0g", "a0", "a1g", "a1", "m0", "m1", "x0", "x1", + "y0", "y1", "", "", "", "", "", "mod", + "ssr", "spc", + "rs", "re", "", "", "", "", "", "", + "r0b", "r1b", "r2b", "r3b", "r4b", "r5b", "r6b", "r7b" + "", "", "", "", "", "", "", "", + }; + if (reg_nr < 0) + return NULL; + if (reg_nr >= (sizeof (register_names) / sizeof (*register_names))) + return NULL; + return register_names[reg_nr]; +} + +static unsigned char * +sh_breakpoint_from_pc (pcptr, lenptr) + CORE_ADDR *pcptr; + int *lenptr; +{ + /* 0xc3c3 is trapa #c3, and it works in big and little endian modes */ + static unsigned char breakpoint[] = {0xc3, 0xc3}; + + *lenptr = sizeof (breakpoint); + return breakpoint; +} /* Prologue looks like [mov.l <regs>,@-r15]... @@ -220,25 +317,16 @@ sh_processor_type_table[] = where Rm is one of r4,r5,r6,r7 which are the argument registers. */ #define IS_ARG_MOV(x) \ (((((x) & 0xf00f) == 0x6003) && (((x) & 0x00f0) >= 0x0040 && ((x) & 0x00f0) <= 0x0070)) \ -|| ((((x) & 0xf000) == 0x1000) && (((x) & 0x00f0) >= 0x0040 && ((x) & 0x00f0) <= 0x0070)) \ -|| ((((x) & 0xf00f) == 0x2002) && (((x) & 0x00f0) >= 0x0040 && ((x) & 0x00f0) <= 0x0070))) + || ((((x) & 0xf000) == 0x1000) && (((x) & 0x00f0) >= 0x0040 && ((x) & 0x00f0) <= 0x0070)) \ + || ((((x) & 0xf00f) == 0x2002) && (((x) & 0x00f0) >= 0x0040 && ((x) & 0x00f0) <= 0x0070))) /* MOV.L Rm,@(disp,r14) 00011110mmmmdddd Rm-->(dispx4+r14) where Rm is one of r4,r5,r6,r7 */ #define IS_MOV_R14(x) \ -((((x) & 0xff00) == 0x1e) && (((x) & 0x00f0) >= 0x0040 && ((x) & 0x00f0) <= 0x0070)) + ((((x) & 0xff00) == 0x1e) && (((x) & 0x00f0) >= 0x0040 && ((x) & 0x00f0) <= 0x0070)) #define FPSCR_SZ (1 << 20) -/* Should call_function allocate stack space for a struct return? */ -int -sh_use_struct_convention (gcc_p, type) - int gcc_p; - struct type *type; -{ - return (TYPE_LENGTH (type) > 1); -} - /* Skip any prologue before the guts of a function */ /* Skip the prologue using the debug information. If this fails we'll @@ -307,7 +395,7 @@ skip_prologue_hard_way (start_pc) return start_pc; } -CORE_ADDR +static CORE_ADDR sh_skip_prologue (pc) CORE_ADDR pc; { @@ -327,9 +415,42 @@ sh_skip_prologue (pc) return (skip_prologue_hard_way (pc)); } -/* Disassemble an instruction. */ +/* Immediately after a function call, return the saved pc. + Can't always go through the frames for this because on some machines + the new frame is not set up until the new function executes + some instructions. + + The return address is the value saved in the PR register + 4 */ +static CORE_ADDR +sh_saved_pc_after_call (frame) + struct frame_info *frame; +{ + return (ADDR_BITS_REMOVE(read_register(PR_REGNUM))); +} + +/* Should call_function allocate stack space for a struct return? */ +static int +sh_use_struct_convention (gcc_p, type) + int gcc_p; + struct type *type; +{ + return (TYPE_LENGTH (type) > 1); +} + +/* Store the address of the place in which to copy the structure the + subroutine will return. This is called from call_function. + + We store structs through a pointer passed in R0 */ +static void +sh_store_struct_return (addr, sp) + CORE_ADDR addr; + CORE_ADDR sp; +{ + write_register (STRUCT_RETURN_REGNUM, (addr)); +} -int +/* Disassemble an instruction. */ +static int gdb_print_insn_sh (memaddr, info) bfd_vma memaddr; disassemble_info *info; @@ -346,15 +467,14 @@ gdb_print_insn_sh (memaddr, info) For us, the frame address is its stack pointer value, so we look up the function prologue to determine the caller's sp value, and return it. */ - -CORE_ADDR +static CORE_ADDR sh_frame_chain (frame) struct frame_info *frame; { if (PC_IN_CALL_DUMMY (frame->pc, frame->frame, frame->frame)) return frame->frame; /* dummy frame same as caller's frame */ if (frame->pc && !inside_entry_file (frame->pc)) - return read_memory_integer (FRAME_FP (frame) + frame->f_offset, 4); + return read_memory_integer (FRAME_FP (frame) + frame->extra_info->f_offset, 4); else return 0; } @@ -365,13 +485,11 @@ sh_frame_chain (frame) would provide a graceful failure mode when trying to get the value of caller-saves registers for an inner frame. */ -CORE_ADDR +static CORE_ADDR sh_find_callers_reg (fi, regnum) struct frame_info *fi; int regnum; { - struct frame_saved_regs fsr; - for (; fi; fi = fi->next) if (PC_IN_CALL_DUMMY (fi->pc, fi->frame, fi->frame)) /* When the caller requests PR from the dummy frame, we return PC because @@ -379,11 +497,11 @@ sh_find_callers_reg (fi, regnum) return generic_read_register_dummy (fi->pc, fi->frame, regnum); else { - FRAME_FIND_SAVED_REGS (fi, fsr); + FRAME_INIT_SAVED_REGS (fi); if (!fi->pc) return 0; - if (fsr.regs[regnum] != 0) - return read_memory_integer (fsr.regs[regnum], + if (fi->saved_regs[regnum] != 0) + return read_memory_integer (fi->saved_regs[regnum], REGISTER_RAW_SIZE (regnum)); } return read_register (regnum); @@ -394,11 +512,9 @@ sh_find_callers_reg (fi, regnum) This includes special registers such as pc and fp saved in special ways in the stack frame. sp is even more special: the address we return for it IS the sp for the next frame. */ - -void -sh_frame_find_saved_regs (fi, fsr) +static void +sh_nofp_frame_init_saved_regs (fi) struct frame_info *fi; - struct frame_saved_regs *fsr; { int where[NUM_REGS]; int rn; @@ -409,18 +525,144 @@ sh_frame_find_saved_regs (fi, fsr) int insn; int r3_val = 0; char *dummy_regs = generic_find_dummy_frame (fi->pc, fi->frame); + + if (fi->saved_regs == NULL) + frame_saved_regs_zalloc (fi); + else + memset (fi->saved_regs, 0, SIZEOF_FRAME_SAVED_REGS); + + if (dummy_regs) + { + /* DANGER! This is ONLY going to work if the char buffer format of + the saved registers is byte-for-byte identical to the + CORE_ADDR regs[NUM_REGS] format used by struct frame_saved_regs! */ + memcpy (fi->saved_regs, dummy_regs, sizeof (fi->saved_regs)); + return; + } + + fi->extra_info->leaf_function = 1; + fi->extra_info->f_offset = 0; + + for (rn = 0; rn < NUM_REGS; rn++) + where[rn] = -1; + + depth = 0; + + /* Loop around examining the prologue insns until we find something + that does not appear to be part of the prologue. But give up + after 20 of them, since we're getting silly then. */ + + pc = get_pc_function_start (fi->pc); + if (!pc) + { + fi->pc = 0; + return; + } + + for (opc = pc + (2 * 28); pc < opc; pc += 2) + { + insn = read_memory_integer (pc, 2); + /* See where the registers will be saved to */ + if (IS_PUSH (insn)) + { + rn = GET_PUSHED_REG (insn); + where[rn] = depth; + depth += 4; + } + else if (IS_STS (insn)) + { + where[PR_REGNUM] = depth; + /* If we're storing the pr then this isn't a leaf */ + fi->extra_info->leaf_function = 0; + depth += 4; + } + else if (IS_MOV_R3 (insn)) + { + r3_val = ((insn & 0xff) ^ 0x80) - 0x80; + } + else if (IS_SHLL_R3 (insn)) + { + r3_val <<= 1; + } + else if (IS_ADD_R3SP (insn)) + { + depth += -r3_val; + } + else if (IS_ADD_SP (insn)) + { + depth -= ((insn & 0xff) ^ 0x80) - 0x80; + } + else if (IS_MOV_SP_FP (insn)) + break; +#if 0 /* This used to just stop when it found an instruction that + was not considered part of the prologue. Now, we just + keep going looking for likely instructions. */ + else + break; +#endif + } + + /* Now we know how deep things are, we can work out their addresses */ + + for (rn = 0; rn < NUM_REGS; rn++) + { + if (where[rn] >= 0) + { + if (rn == FP_REGNUM) + have_fp = 1; + fi->saved_regs[rn] = fi->frame - where[rn] + depth - 4; + } + else + { + fi->saved_regs[rn] = 0; + } + } + + if (have_fp) + { + fi->saved_regs[SP_REGNUM] = read_memory_integer (fi->saved_regs[FP_REGNUM], 4); + } + else + { + fi->saved_regs[SP_REGNUM] = fi->frame - 4; + } + + fi->extra_info->f_offset = depth - where[FP_REGNUM] - 4; + /* Work out the return pc - either from the saved pr or the pr + value */ +} + +static void +sh_fp_frame_init_saved_regs (fi) + struct frame_info *fi; +{ + int where[NUM_REGS]; + int rn; + int have_fp = 0; + int depth; + int pc; + int opc; + int insn; + int r3_val = 0; + char *dummy_regs = generic_find_dummy_frame (fi->pc, fi->frame); + + if (fi->saved_regs == NULL) + frame_saved_regs_zalloc (fi); + else + memset (fi->saved_regs, 0, SIZEOF_FRAME_SAVED_REGS); + if (dummy_regs) { /* DANGER! This is ONLY going to work if the char buffer format of the saved registers is byte-for-byte identical to the CORE_ADDR regs[NUM_REGS] format used by struct frame_saved_regs! */ - memcpy (&fsr->regs, dummy_regs, sizeof (fsr)); + memcpy (fi->saved_regs, dummy_regs, sizeof (fi->saved_regs)); return; } - fi->leaf_function = 1; - fi->f_offset = 0; + fi->extra_info->leaf_function = 1; + fi->extra_info->f_offset = 0; for (rn = 0; rn < NUM_REGS; rn++) where[rn] = -1; @@ -452,7 +694,7 @@ sh_frame_find_saved_regs (fi, fsr) { where[PR_REGNUM] = depth; /* If we're storing the pr then this isn't a leaf */ - fi->leaf_function = 0; + fi->extra_info->leaf_function = 0; depth += 4; } else if (IS_MOV_R3 (insn)) @@ -473,7 +715,7 @@ sh_frame_find_saved_regs (fi, fsr) } else if (IS_FMOV (insn)) { - if (read_register (FPSCR_REGNUM) & FPSCR_SZ) + if (read_register (gdbarch_tdep (current_gdbarch)->FPSCR_REGNUM) & FPSCR_SZ) { depth += 8; } @@ -501,36 +743,37 @@ sh_frame_find_saved_regs (fi, fsr) if (rn == FP_REGNUM) have_fp = 1; - fsr->regs[rn] = fi->frame - where[rn] + depth - 4; + fi->saved_regs[rn] = fi->frame - where[rn] + depth - 4; } else { - fsr->regs[rn] = 0; + fi->saved_regs[rn] = 0; } } if (have_fp) { - fsr->regs[SP_REGNUM] = read_memory_integer (fsr->regs[FP_REGNUM], 4); + fi->saved_regs[SP_REGNUM] = read_memory_integer (fi->saved_regs[FP_REGNUM], 4); } else { - fsr->regs[SP_REGNUM] = fi->frame - 4; + fi->saved_regs[SP_REGNUM] = fi->frame - 4; } - fi->f_offset = depth - where[FP_REGNUM] - 4; + fi->extra_info->f_offset = depth - where[FP_REGNUM] - 4; /* Work out the return pc - either from the saved pr or the pr value */ } -/* initialize the extra info saved in a FRAME */ - -void +/* Initialize the extra info saved in a FRAME */ +static void sh_init_extra_frame_info (fromleaf, fi) int fromleaf; struct frame_info *fi; { - struct frame_saved_regs fsr; + + fi->extra_info = (struct frame_extra_info *) + frame_obstack_alloc (sizeof (struct frame_extra_info)); if (fi->next) fi->pc = FRAME_SAVED_PC (fi->next); @@ -541,43 +784,72 @@ sh_init_extra_frame_info (fromleaf, fi) by assuming it's always FP. */ fi->frame = generic_read_register_dummy (fi->pc, fi->frame, SP_REGNUM); - fi->return_pc = generic_read_register_dummy (fi->pc, fi->frame, - PC_REGNUM); - fi->f_offset = -(CALL_DUMMY_LENGTH + 4); - fi->leaf_function = 0; + fi->extra_info->return_pc = generic_read_register_dummy (fi->pc, fi->frame, + PC_REGNUM); + fi->extra_info->f_offset = -(CALL_DUMMY_LENGTH + 4); + fi->extra_info->leaf_function = 0; return; } else { - FRAME_FIND_SAVED_REGS (fi, fsr); - fi->return_pc = sh_find_callers_reg (fi, PR_REGNUM); + FRAME_INIT_SAVED_REGS (fi); + fi->extra_info->return_pc = sh_find_callers_reg (fi, PR_REGNUM); } } +/* Extract from an array REGBUF containing the (raw) register state + the address in which a function should return its structure value, + as a CORE_ADDR (or an expression that can be used as one). */ +CORE_ADDR +static sh_extract_struct_value_address (regbuf) + char *regbuf; +{ + return (extract_address ((regbuf), REGISTER_RAW_SIZE (0))); +} + +static CORE_ADDR +sh_frame_saved_pc (frame) + struct frame_info *frame; +{ + return ((frame)->extra_info->return_pc); +} + +static CORE_ADDR +sh_frame_args_address (fi) + struct frame_info *fi; +{ + return (fi)->frame; +} + +static CORE_ADDR +sh_frame_locals_address (fi) + struct frame_info *fi; +{ + return (fi)->frame; +} + /* Discard from the stack the innermost frame, restoring all saved registers. */ - -void +static void sh_pop_frame () { register struct frame_info *frame = get_current_frame (); register CORE_ADDR fp; register int regnum; - struct frame_saved_regs fsr; if (PC_IN_CALL_DUMMY (frame->pc, frame->frame, frame->frame)) generic_pop_dummy_frame (); else { fp = FRAME_FP (frame); - get_frame_saved_regs (frame, &fsr); + FRAME_INIT_SAVED_REGS (frame); /* Copy regs from where they were saved in the frame */ for (regnum = 0; regnum < NUM_REGS; regnum++) - if (fsr.regs[regnum]) - write_register (regnum, read_memory_integer (fsr.regs[regnum], 4)); + if (frame->saved_regs[regnum]) + write_register (regnum, read_memory_integer (frame->saved_regs[regnum], 4)); - write_register (PC_REGNUM, frame->return_pc); + write_register (PC_REGNUM, frame->extra_info->return_pc); write_register (SP_REGNUM, fp + 4); } flush_cached_frames (); @@ -617,7 +889,6 @@ sh_pop_frame () word (as opposed to arguments smaller than 4 bytes, which are right-justified). - If the function is to return an aggregate type such as a struct, it is either returned in the normal return value register R0 (if its size is no greater than one byte), or else the caller must allocate @@ -627,7 +898,7 @@ sh_pop_frame () not displace any of the other arguments passed in via registers R4 to R7. */ -CORE_ADDR +static CORE_ADDR sh_push_arguments (nargs, args, sp, struct_return, struct_addr) int nargs; value_ptr *args; @@ -654,12 +925,10 @@ sh_push_arguments (nargs, args, sp, struct_return, struct_addr) write_register (STRUCT_RETURN_REGNUM, struct_addr); /* Now make sure there's space on the stack */ - for (argnum = 0, stack_alloc = 0; - argnum < nargs; argnum++) + for (argnum = 0, stack_alloc = 0; argnum < nargs; argnum++) stack_alloc += ((TYPE_LENGTH (VALUE_TYPE (args[argnum])) + 3) & ~3); sp -= stack_alloc; /* make room on stack for args */ - /* Now load as many as possible of the first arguments into registers, and push the rest onto the stack. There are 16 bytes in four registers available. Loop thru args from first to last. */ @@ -671,7 +940,8 @@ sh_push_arguments (nargs, args, sp, struct_return, struct_addr) len = TYPE_LENGTH (type); memset (valbuf, 0, sizeof (valbuf)); if (len < 4) - { /* value gets right-justified in the register or stack word */ + { + /* value gets right-justified in the register or stack word */ memcpy (valbuf + (4 - len), (char *) VALUE_CONTENTS (args[argnum]), len); val = valbuf; @@ -712,7 +982,7 @@ sh_push_arguments (nargs, args, sp, struct_return, struct_addr) Set up the return address for the inferior function call. Needed for targets where we don't actually execute a JSR/BSR instruction */ -CORE_ADDR +static CORE_ADDR sh_push_return_address (pc, sp) CORE_ADDR pc; CORE_ADDR sp; @@ -750,43 +1020,100 @@ sh_fix_call_dummy (dummy, pc, fun, nargs, args, type, gcc_p) } #endif +static int +sh_coerce_float_to_double (struct type *formal, struct type *actual) +{ + return 1; +} -/* Modify the actual processor type. */ - -int -sh_target_architecture_hook (ap) - const bfd_arch_info_type *ap; +/* Find a function's return value in the appropriate registers (in + regbuf), and copy it into valbuf. Extract from an array REGBUF + containing the (raw) register state a function return value of type + TYPE, and copy that, in virtual format, into VALBUF. */ +static void +sh_extract_return_value (type, regbuf, valbuf) + struct type *type; + char *regbuf; + char *valbuf; { - int i, j; + int len = TYPE_LENGTH (type); - if (ap->arch != bfd_arch_sh) - return 0; + if (len <= 4) + memcpy (valbuf, ((char *) regbuf) + 4 - len, len); + else if (len <= 8) + memcpy (valbuf, ((char *) regbuf) + 8 - len, len); + else + error ("bad size for return value"); +} - for (i = 0; sh_processor_type_table[i].regnames != NULL; i++) - { - if (sh_processor_type_table[i].mach == ap->mach) - { - sh_register_names = sh_processor_type_table[i].regnames; - return 1; - } - } +/* Write into appropriate registers a function return value + of type TYPE, given in virtual format. + If the architecture is sh4 or sh3e, store a function's return value + in the R0 general register or in the FP0 floating point register, + depending on the type of the return value. In all the other cases + the result is stored in r0. */ +static void +sh_default_store_return_value (struct type *type, char *valbuf) +{ + write_register_bytes (REGISTER_BYTE (0), + valbuf, TYPE_LENGTH (type)); +} - internal_error ("Architecture `%s' unreconized", ap->printable_name); +static void +sh3e_sh4_store_return_value (struct type *type, char *valbuf) +{ + if (TYPE_CODE (type) == TYPE_CODE_FLT) + write_register_bytes (REGISTER_BYTE (FP0_REGNUM), + valbuf, TYPE_LENGTH (type)); + else + write_register_bytes (REGISTER_BYTE (0), + valbuf, TYPE_LENGTH (type)); } + /* Print the registers in a form similar to the E7000 */ static void -sh_show_regs (args, from_tty) +sh_generic_show_regs (args, from_tty) char *args; int from_tty; { - int cpu; - if (TARGET_ARCHITECTURE->arch == bfd_arch_sh) - cpu = TARGET_ARCHITECTURE->mach; - else - cpu = 0; + printf_filtered ("PC=%s SR=%08lx PR=%08lx MACH=%08lx MACHL=%08lx\n", + paddr (read_register (PC_REGNUM)), + (long) read_register (SR_REGNUM), + (long) read_register (PR_REGNUM), + (long) read_register (MACH_REGNUM), + (long) read_register (MACL_REGNUM)); + + printf_filtered ("GBR=%08lx VBR=%08lx", + (long) read_register (GBR_REGNUM), + (long) read_register (VBR_REGNUM)); + + printf_filtered ("\nR0-R7 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n", + (long) read_register (0), + (long) read_register (1), + (long) read_register (2), + (long) read_register (3), + (long) read_register (4), + (long) read_register (5), + (long) read_register (6), + (long) read_register (7)); + printf_filtered ("R8-R15 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n", + (long) read_register (8), + (long) read_register (9), + (long) read_register (10), + (long) read_register (11), + (long) read_register (12), + (long) read_register (13), + (long) read_register (14), + (long) read_register (15)); +} +static void +sh3_show_regs (args, from_tty) + char *args; + int from_tty; +{ printf_filtered ("PC=%s SR=%08lx PR=%08lx MACH=%08lx MACHL=%08lx\n", paddr (read_register (PC_REGNUM)), (long) read_register (SR_REGNUM), @@ -797,21 +1124,9 @@ sh_show_regs (args, from_tty) printf_filtered ("GBR=%08lx VBR=%08lx", (long) read_register (GBR_REGNUM), (long) read_register (VBR_REGNUM)); - if (cpu == bfd_mach_sh3 || cpu == bfd_mach_sh3e || cpu == bfd_mach_sh3_dsp - || cpu == bfd_mach_sh4) - { - printf_filtered (" SSR=%08lx SPC=%08lx", - (long) read_register (SSR_REGNUM), - (long) read_register (SPC_REGNUM)); - if (cpu == bfd_mach_sh3e || cpu == bfd_mach_sh4) - { - printf_filtered (" FPUL=%08lx FPSCR=%08lx", - (long) read_register (FPUL_REGNUM), - (long) read_register (FPSCR_REGNUM)); - } - } - if (cpu == bfd_mach_sh_dsp || cpu == bfd_mach_sh3_dsp) - printf_filtered (" DSR=%08lx", (long) read_register (DSR_REGNUM)); + printf_filtered (" SSR=%08lx SPC=%08lx", + (long) read_register (gdbarch_tdep (current_gdbarch)->SSR_REGNUM), + (long) read_register (gdbarch_tdep (current_gdbarch)->SPC_REGNUM)); printf_filtered ("\nR0-R7 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n", (long) read_register (0), @@ -831,105 +1146,536 @@ sh_show_regs (args, from_tty) (long) read_register (13), (long) read_register (14), (long) read_register (15)); - if (cpu == bfd_mach_sh3e || cpu == bfd_mach_sh4) - { - int pr = cpu == bfd_mach_sh4 && (read_register (FPSCR_REGNUM) & 0x80000); - - printf_filtered ((pr - ? "DR0-DR6 %08lx%08lx %08lx%08lx %08lx%08lx %08lx%08lx\n" - : "FP0-FP7 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n"), - (long) read_register (FP0_REGNUM + 0), - (long) read_register (FP0_REGNUM + 1), - (long) read_register (FP0_REGNUM + 2), - (long) read_register (FP0_REGNUM + 3), - (long) read_register (FP0_REGNUM + 4), - (long) read_register (FP0_REGNUM + 5), - (long) read_register (FP0_REGNUM + 6), - (long) read_register (FP0_REGNUM + 7)); - printf_filtered ((pr - ? "DR8-DR14 %08lx%08lx %08lx%08lx %08lx%08lx %08lx%08lx\n" - : "FP8-FP15 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n"), - (long) read_register (FP0_REGNUM + 8), - (long) read_register (FP0_REGNUM + 9), - (long) read_register (FP0_REGNUM + 10), - (long) read_register (FP0_REGNUM + 11), - (long) read_register (FP0_REGNUM + 12), - (long) read_register (FP0_REGNUM + 13), - (long) read_register (FP0_REGNUM + 14), - (long) read_register (FP0_REGNUM + 15)); - } - /* FIXME: sh4 has more registers */ - if (cpu == bfd_mach_sh_dsp || cpu == bfd_mach_sh3_dsp) - { - printf_filtered ("A0G=%02lx A0=%08lx M0=%08lx X0=%08lx Y0=%08lx RS=%08lx MOD=%08lx\n", - (long) read_register (A0G_REGNUM) & 0xff, - (long) read_register (A0_REGNUM), - (long) read_register (M0_REGNUM), - (long) read_register (X0_REGNUM), - (long) read_register (Y0_REGNUM), - (long) read_register (RS_REGNUM), - (long) read_register (MOD_REGNUM)); - printf_filtered ("A1G=%02lx A1=%08lx M1=%08lx X1=%08lx Y1=%08lx RE=%08lx\n", - (long) read_register (A1G_REGNUM) & 0xff, - (long) read_register (A1_REGNUM), - (long) read_register (M1_REGNUM), - (long) read_register (X1_REGNUM), - (long) read_register (Y1_REGNUM), - (long) read_register (RE_REGNUM)); - } } -/* Function: extract_return_value - Find a function's return value in the appropriate registers (in regbuf), - and copy it into valbuf. */ +static void +sh3e_show_regs (args, from_tty) + char *args; + int from_tty; +{ + printf_filtered ("PC=%s SR=%08lx PR=%08lx MACH=%08lx MACHL=%08lx\n", + paddr (read_register (PC_REGNUM)), + (long) read_register (SR_REGNUM), + (long) read_register (PR_REGNUM), + (long) read_register (MACH_REGNUM), + (long) read_register (MACL_REGNUM)); + + printf_filtered ("GBR=%08lx VBR=%08lx", + (long) read_register (GBR_REGNUM), + (long) read_register (VBR_REGNUM)); + printf_filtered (" SSR=%08lx SPC=%08lx", + (long) read_register (gdbarch_tdep (current_gdbarch)->SSR_REGNUM), + (long) read_register (gdbarch_tdep (current_gdbarch)->SPC_REGNUM)); + printf_filtered (" FPUL=%08lx FPSCR=%08lx", + (long) read_register (gdbarch_tdep (current_gdbarch)->FPUL_REGNUM), + (long) read_register (gdbarch_tdep (current_gdbarch)->FPSCR_REGNUM)); -void -sh_extract_return_value (type, regbuf, valbuf) - struct type *type; - void *regbuf; - void *valbuf; + printf_filtered ("\nR0-R7 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n", + (long) read_register (0), + (long) read_register (1), + (long) read_register (2), + (long) read_register (3), + (long) read_register (4), + (long) read_register (5), + (long) read_register (6), + (long) read_register (7)); + printf_filtered ("R8-R15 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n", + (long) read_register (8), + (long) read_register (9), + (long) read_register (10), + (long) read_register (11), + (long) read_register (12), + (long) read_register (13), + (long) read_register (14), + (long) read_register (15)); + + printf_filtered (("FP0-FP7 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n"), + (long) read_register (FP0_REGNUM + 0), + (long) read_register (FP0_REGNUM + 1), + (long) read_register (FP0_REGNUM + 2), + (long) read_register (FP0_REGNUM + 3), + (long) read_register (FP0_REGNUM + 4), + (long) read_register (FP0_REGNUM + 5), + (long) read_register (FP0_REGNUM + 6), + (long) read_register (FP0_REGNUM + 7)); + printf_filtered (("FP8-FP15 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n"), + (long) read_register (FP0_REGNUM + 8), + (long) read_register (FP0_REGNUM + 9), + (long) read_register (FP0_REGNUM + 10), + (long) read_register (FP0_REGNUM + 11), + (long) read_register (FP0_REGNUM + 12), + (long) read_register (FP0_REGNUM + 13), + (long) read_register (FP0_REGNUM + 14), + (long) read_register (FP0_REGNUM + 15)); +} + +static void +sh3_dsp_show_regs (args, from_tty) + char *args; + int from_tty; { - int len = TYPE_LENGTH (type); + printf_filtered ("PC=%s SR=%08lx PR=%08lx MACH=%08lx MACHL=%08lx\n", + paddr (read_register (PC_REGNUM)), + (long) read_register (SR_REGNUM), + (long) read_register (PR_REGNUM), + (long) read_register (MACH_REGNUM), + (long) read_register (MACL_REGNUM)); - if (len <= 4) - memcpy (valbuf, ((char *) regbuf) + 4 - len, len); - else if (len <= 8) - memcpy (valbuf, ((char *) regbuf) + 8 - len, len); - else - error ("bad size for return value"); + printf_filtered ("GBR=%08lx VBR=%08lx", + (long) read_register (GBR_REGNUM), + (long) read_register (VBR_REGNUM)); + + printf_filtered (" SSR=%08lx SPC=%08lx", + (long) read_register (gdbarch_tdep (current_gdbarch)->SSR_REGNUM), + (long) read_register (gdbarch_tdep (current_gdbarch)->SPC_REGNUM)); + + printf_filtered (" DSR=%08lx", + (long) read_register (gdbarch_tdep (current_gdbarch)->DSR_REGNUM)); + + printf_filtered ("\nR0-R7 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n", + (long) read_register (0), + (long) read_register (1), + (long) read_register (2), + (long) read_register (3), + (long) read_register (4), + (long) read_register (5), + (long) read_register (6), + (long) read_register (7)); + printf_filtered ("R8-R15 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n", + (long) read_register (8), + (long) read_register (9), + (long) read_register (10), + (long) read_register (11), + (long) read_register (12), + (long) read_register (13), + (long) read_register (14), + (long) read_register (15)); + + printf_filtered ("A0G=%02lx A0=%08lx M0=%08lx X0=%08lx Y0=%08lx RS=%08lx MOD=%08lx\n", + (long) read_register (gdbarch_tdep (current_gdbarch)->A0G_REGNUM) & 0xff, + (long) read_register (gdbarch_tdep (current_gdbarch)->A0_REGNUM), + (long) read_register (gdbarch_tdep (current_gdbarch)->M0_REGNUM), + (long) read_register (gdbarch_tdep (current_gdbarch)->X0_REGNUM), + (long) read_register (gdbarch_tdep (current_gdbarch)->Y0_REGNUM), + (long) read_register (gdbarch_tdep (current_gdbarch)->RS_REGNUM), + (long) read_register (gdbarch_tdep (current_gdbarch)->MOD_REGNUM)); + printf_filtered ("A1G=%02lx A1=%08lx M1=%08lx X1=%08lx Y1=%08lx RE=%08lx\n", + (long) read_register (gdbarch_tdep (current_gdbarch)->A1G_REGNUM) & 0xff, + (long) read_register (gdbarch_tdep (current_gdbarch)->A1_REGNUM), + (long) read_register (gdbarch_tdep (current_gdbarch)->M1_REGNUM), + (long) read_register (gdbarch_tdep (current_gdbarch)->X1_REGNUM), + (long) read_register (gdbarch_tdep (current_gdbarch)->Y1_REGNUM), + (long) read_register (gdbarch_tdep (current_gdbarch)->RE_REGNUM)); } -/* If the architecture is sh4 or sh3e, store a function's return value - in the R0 general register or in the FP0 floating point register, - depending on the type of the return value. In all the other cases - the result is stored in r0. */ -void -sh_store_return_value (struct type *type, void *valbuf) +static void +sh4_show_regs (args, from_tty) + char *args; + int from_tty; +{ + int pr = read_register (gdbarch_tdep (current_gdbarch)->FPSCR_REGNUM) & 0x80000; + printf_filtered ("PC=%s SR=%08lx PR=%08lx MACH=%08lx MACHL=%08lx\n", + paddr (read_register (PC_REGNUM)), + (long) read_register (SR_REGNUM), + (long) read_register (PR_REGNUM), + (long) read_register (MACH_REGNUM), + (long) read_register (MACL_REGNUM)); + + printf_filtered ("GBR=%08lx VBR=%08lx", + (long) read_register (GBR_REGNUM), + (long) read_register (VBR_REGNUM)); + printf_filtered (" SSR=%08lx SPC=%08lx", + (long) read_register (gdbarch_tdep (current_gdbarch)->SSR_REGNUM), + (long) read_register (gdbarch_tdep (current_gdbarch)->SPC_REGNUM)); + printf_filtered (" FPUL=%08lx FPSCR=%08lx", + (long) read_register (gdbarch_tdep (current_gdbarch)->FPUL_REGNUM), + (long) read_register (gdbarch_tdep (current_gdbarch)->FPSCR_REGNUM)); + + printf_filtered ("\nR0-R7 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n", + (long) read_register (0), + (long) read_register (1), + (long) read_register (2), + (long) read_register (3), + (long) read_register (4), + (long) read_register (5), + (long) read_register (6), + (long) read_register (7)); + printf_filtered ("R8-R15 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n", + (long) read_register (8), + (long) read_register (9), + (long) read_register (10), + (long) read_register (11), + (long) read_register (12), + (long) read_register (13), + (long) read_register (14), + (long) read_register (15)); + + printf_filtered ((pr + ? "DR0-DR6 %08lx%08lx %08lx%08lx %08lx%08lx %08lx%08lx\n" + : "FP0-FP7 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n"), + (long) read_register (FP0_REGNUM + 0), + (long) read_register (FP0_REGNUM + 1), + (long) read_register (FP0_REGNUM + 2), + (long) read_register (FP0_REGNUM + 3), + (long) read_register (FP0_REGNUM + 4), + (long) read_register (FP0_REGNUM + 5), + (long) read_register (FP0_REGNUM + 6), + (long) read_register (FP0_REGNUM + 7)); + printf_filtered ((pr + ? "DR8-DR14 %08lx%08lx %08lx%08lx %08lx%08lx %08lx%08lx\n" + : "FP8-FP15 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n"), + (long) read_register (FP0_REGNUM + 8), + (long) read_register (FP0_REGNUM + 9), + (long) read_register (FP0_REGNUM + 10), + (long) read_register (FP0_REGNUM + 11), + (long) read_register (FP0_REGNUM + 12), + (long) read_register (FP0_REGNUM + 13), + (long) read_register (FP0_REGNUM + 14), + (long) read_register (FP0_REGNUM + 15)); +} + +static void +sh_dsp_show_regs (args, from_tty) + char *args; + int from_tty; +{ + printf_filtered ("PC=%s SR=%08lx PR=%08lx MACH=%08lx MACHL=%08lx\n", + paddr (read_register (PC_REGNUM)), + (long) read_register (SR_REGNUM), + (long) read_register (PR_REGNUM), + (long) read_register (MACH_REGNUM), + (long) read_register (MACL_REGNUM)); + + printf_filtered ("GBR=%08lx VBR=%08lx", + (long) read_register (GBR_REGNUM), + (long) read_register (VBR_REGNUM)); + + printf_filtered (" DSR=%08lx", + (long) read_register (gdbarch_tdep (current_gdbarch)->DSR_REGNUM)); + + printf_filtered ("\nR0-R7 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n", + (long) read_register (0), + (long) read_register (1), + (long) read_register (2), + (long) read_register (3), + (long) read_register (4), + (long) read_register (5), + (long) read_register (6), + (long) read_register (7)); + printf_filtered ("R8-R15 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n", + (long) read_register (8), + (long) read_register (9), + (long) read_register (10), + (long) read_register (11), + (long) read_register (12), + (long) read_register (13), + (long) read_register (14), + (long) read_register (15)); + + printf_filtered ("A0G=%02lx A0=%08lx M0=%08lx X0=%08lx Y0=%08lx RS=%08lx MOD=%08lx\n", + (long) read_register (gdbarch_tdep (current_gdbarch)->A0G_REGNUM) & 0xff, + (long) read_register (gdbarch_tdep (current_gdbarch)->A0_REGNUM), + (long) read_register (gdbarch_tdep (current_gdbarch)->M0_REGNUM), + (long) read_register (gdbarch_tdep (current_gdbarch)->X0_REGNUM), + (long) read_register (gdbarch_tdep (current_gdbarch)->Y0_REGNUM), + (long) read_register (gdbarch_tdep (current_gdbarch)->RS_REGNUM), + (long) read_register (gdbarch_tdep (current_gdbarch)->MOD_REGNUM)); + printf_filtered ("A1G=%02lx A1=%08lx M1=%08lx X1=%08lx Y1=%08lx RE=%08lx\n", + (long) read_register (gdbarch_tdep (current_gdbarch)->A1G_REGNUM) & 0xff, + (long) read_register (gdbarch_tdep (current_gdbarch)->A1_REGNUM), + (long) read_register (gdbarch_tdep (current_gdbarch)->M1_REGNUM), + (long) read_register (gdbarch_tdep (current_gdbarch)->X1_REGNUM), + (long) read_register (gdbarch_tdep (current_gdbarch)->Y1_REGNUM), + (long) read_register (gdbarch_tdep (current_gdbarch)->RE_REGNUM)); +} + +/* Index within `registers' of the first byte of the space for + register N. */ +static int +sh_register_byte (reg_nr) + int reg_nr; { - int cpu; - if (TARGET_ARCHITECTURE->arch == bfd_arch_sh) - cpu = TARGET_ARCHITECTURE->mach; + return (reg_nr * 4); +} + +/* Number of bytes of storage in the actual machine representation for + register REG_NR. */ +static int +sh_register_raw_size (reg_nr) + int reg_nr; +{ + return 4; +} + +/* Number of bytes of storage in the program's representation + for register N. */ +static int +sh_register_virtual_size (reg_nr) + int reg_nr; +{ + return 4; +} + +/* Return the GDB type object for the "standard" data type + of data in register N. */ + +static struct type * +sh_sh3e_register_virtual_type (reg_nr) + int reg_nr; +{ + if ((reg_nr >= FP0_REGNUM + && (reg_nr <= gdbarch_tdep (current_gdbarch)->FP15_REGNUM)) + || (reg_nr == gdbarch_tdep (current_gdbarch)->FPUL_REGNUM)) + return builtin_type_float; else - cpu = 0; - if (cpu == bfd_mach_sh3e || cpu == bfd_mach_sh4) + return builtin_type_int; +} + +static struct type * +sh_default_register_virtual_type (reg_nr) + int reg_nr; +{ + return builtin_type_int; +} + +static gdbarch_init_ftype sh_gdbarch_init; + +static struct gdbarch * +sh_gdbarch_init (info, arches) + struct gdbarch_info info; + struct gdbarch_list *arches; +{ + static LONGEST sh_call_dummy_words[] = {0}; + struct gdbarch *gdbarch; + struct gdbarch_tdep *tdep; + gdbarch_register_name_ftype *sh_register_name; + gdbarch_store_return_value_ftype *sh_store_return_value; + gdbarch_register_virtual_type_ftype *sh_register_virtual_type; + + /* Find a candidate among the list of pre-declared architectures. */ + arches = gdbarch_list_lookup_by_info (arches, &info); + if (arches != NULL) + return arches->gdbarch; + + /* None found, create a new architecture from the information + provided. */ + tdep = XMALLOC (struct gdbarch_tdep); + gdbarch = gdbarch_alloc (&info, tdep); + + /* Initialize the register numbers that are not common to all the + variants to -1, if necessary thse will be overwritten in the case + statement below. */ + tdep->FPUL_REGNUM = -1; + tdep->FPSCR_REGNUM = -1; + tdep->DSR_REGNUM = -1; + tdep->FP15_REGNUM = -1; + tdep->A0G_REGNUM = -1; + tdep->A0_REGNUM = -1; + tdep->A1G_REGNUM = -1; + tdep->A1_REGNUM = -1; + tdep->M0_REGNUM = -1; + tdep->M1_REGNUM = -1; + tdep->X0_REGNUM = -1; + tdep->X1_REGNUM = -1; + tdep->Y0_REGNUM = -1; + tdep->Y1_REGNUM = -1; + tdep->MOD_REGNUM = -1; + tdep->RS_REGNUM = -1; + tdep->RE_REGNUM = -1; + tdep->SSR_REGNUM = -1; + tdep->SPC_REGNUM = -1; + set_gdbarch_fp0_regnum (gdbarch, -1); + + switch (info.bfd_arch_info->mach) { - if (TYPE_CODE (type) == TYPE_CODE_FLT) - write_register_bytes (REGISTER_BYTE (FP0_REGNUM), valbuf, TYPE_LENGTH (type)); - else - write_register_bytes (REGISTER_BYTE (0), valbuf, TYPE_LENGTH (type)); + case bfd_mach_sh: + sh_register_name = sh_sh_register_name; + sh_show_regs = sh_generic_show_regs; + sh_store_return_value = sh_default_store_return_value; + sh_register_virtual_type = sh_default_register_virtual_type; + set_gdbarch_frame_init_saved_regs (gdbarch, sh_nofp_frame_init_saved_regs); + break; + case bfd_mach_sh2: + sh_register_name = sh_sh_register_name; + sh_show_regs = sh_generic_show_regs; + sh_store_return_value = sh_default_store_return_value; + sh_register_virtual_type = sh_default_register_virtual_type; + set_gdbarch_frame_init_saved_regs (gdbarch, sh_nofp_frame_init_saved_regs); + break; + case bfd_mach_sh_dsp: + sh_register_name = sh_sh_dsp_register_name; + sh_show_regs = sh_dsp_show_regs; + sh_store_return_value = sh_default_store_return_value; + sh_register_virtual_type = sh_default_register_virtual_type; + set_gdbarch_frame_init_saved_regs (gdbarch, sh_nofp_frame_init_saved_regs); + tdep->DSR_REGNUM = 24; + tdep->A0G_REGNUM = 25; + tdep->A0_REGNUM = 26; + tdep->A1G_REGNUM = 27; + tdep->A1_REGNUM = 28; + tdep->M0_REGNUM = 29; + tdep->M1_REGNUM = 30; + tdep->X0_REGNUM = 31; + tdep->X1_REGNUM = 32; + tdep->Y0_REGNUM = 33; + tdep->Y1_REGNUM = 34; + tdep->MOD_REGNUM = 40; + tdep->RS_REGNUM = 43; + tdep->RE_REGNUM = 44; + break; + case bfd_mach_sh3: + sh_register_name = sh_sh3_register_name; + sh_show_regs = sh3_show_regs; + sh_store_return_value = sh_default_store_return_value; + sh_register_virtual_type = sh_default_register_virtual_type; + set_gdbarch_frame_init_saved_regs (gdbarch, sh_nofp_frame_init_saved_regs); + tdep->SSR_REGNUM = 41; + tdep->SPC_REGNUM = 42; + break; + case bfd_mach_sh3e: + sh_register_name = sh_sh3e_register_name; + sh_show_regs = sh3e_show_regs; + sh_store_return_value = sh3e_sh4_store_return_value; + sh_register_virtual_type = sh_sh3e_register_virtual_type; + set_gdbarch_frame_init_saved_regs (gdbarch, sh_fp_frame_init_saved_regs); + set_gdbarch_fp0_regnum (gdbarch, 25); + tdep->FPUL_REGNUM = 23; + tdep->FPSCR_REGNUM = 24; + tdep->FP15_REGNUM = 40; + tdep->SSR_REGNUM = 41; + tdep->SPC_REGNUM = 42; + break; + case bfd_mach_sh3_dsp: + sh_register_name = sh_sh3_dsp_register_name; + sh_show_regs = sh3_dsp_show_regs; + sh_store_return_value = sh_default_store_return_value; + sh_register_virtual_type = sh_default_register_virtual_type; + set_gdbarch_frame_init_saved_regs (gdbarch, sh_nofp_frame_init_saved_regs); + tdep->DSR_REGNUM = 24; + tdep->A0G_REGNUM = 25; + tdep->A0_REGNUM = 26; + tdep->A1G_REGNUM = 27; + tdep->A1_REGNUM = 28; + tdep->M0_REGNUM = 29; + tdep->M1_REGNUM = 30; + tdep->X0_REGNUM = 31; + tdep->X1_REGNUM = 32; + tdep->Y0_REGNUM = 33; + tdep->Y1_REGNUM = 34; + tdep->MOD_REGNUM = 40; + tdep->RS_REGNUM = 43; + tdep->RE_REGNUM = 44; + tdep->SSR_REGNUM = 41; + tdep->SPC_REGNUM = 42; + break; + case bfd_mach_sh4: + sh_register_name = sh_generic_register_name; + sh_show_regs = sh_generic_show_regs; + sh_store_return_value = sh3e_sh4_store_return_value; + sh_register_virtual_type = sh_sh3e_register_virtual_type; + set_gdbarch_frame_init_saved_regs (gdbarch, sh_fp_frame_init_saved_regs); + set_gdbarch_fp0_regnum (gdbarch, 25); + tdep->FPUL_REGNUM = 23; + tdep->FPSCR_REGNUM = 24; + tdep->FP15_REGNUM = 40; + tdep->SSR_REGNUM = 41; + tdep->SPC_REGNUM = 42; + break; + default: + sh_register_name = sh_generic_register_name; + sh_show_regs = sh_generic_show_regs; + sh_store_return_value = sh_default_store_return_value; + sh_register_virtual_type = sh_default_register_virtual_type; + set_gdbarch_frame_init_saved_regs (gdbarch, sh_nofp_frame_init_saved_regs); + break; } - else - write_register_bytes (REGISTER_BYTE (0), valbuf, TYPE_LENGTH (type)); + + set_gdbarch_read_pc (gdbarch, generic_target_read_pc); + set_gdbarch_write_pc (gdbarch, generic_target_write_pc); + set_gdbarch_read_fp (gdbarch, generic_target_read_fp); + set_gdbarch_write_fp (gdbarch, generic_target_write_fp); + set_gdbarch_read_sp (gdbarch, generic_target_read_sp); + set_gdbarch_write_sp (gdbarch, generic_target_write_sp); + + set_gdbarch_num_regs (gdbarch, 59); + set_gdbarch_sp_regnum (gdbarch, 15); + set_gdbarch_fp_regnum (gdbarch, 14); + set_gdbarch_pc_regnum (gdbarch, 16); + set_gdbarch_register_name (gdbarch, sh_register_name); + set_gdbarch_register_size (gdbarch, 4); + set_gdbarch_register_bytes (gdbarch, NUM_REGS * 4); + set_gdbarch_register_byte (gdbarch, sh_register_byte); + set_gdbarch_register_raw_size (gdbarch, sh_register_raw_size); + set_gdbarch_max_register_raw_size (gdbarch, 4); + set_gdbarch_register_virtual_size (gdbarch, sh_register_virtual_size); + set_gdbarch_max_register_virtual_size (gdbarch, 4); + set_gdbarch_register_virtual_type (gdbarch, sh_register_virtual_type); + + set_gdbarch_ptr_bit (gdbarch, 4 * TARGET_CHAR_BIT); + set_gdbarch_short_bit (gdbarch, 2 * TARGET_CHAR_BIT); + set_gdbarch_int_bit (gdbarch, 4 * TARGET_CHAR_BIT); + set_gdbarch_long_bit (gdbarch, 4 * TARGET_CHAR_BIT); + set_gdbarch_long_long_bit (gdbarch, 8 * TARGET_CHAR_BIT); + set_gdbarch_float_bit (gdbarch, 4 * TARGET_CHAR_BIT); + set_gdbarch_double_bit (gdbarch, 8 * TARGET_CHAR_BIT); + set_gdbarch_long_double_bit (gdbarch, 16 * TARGET_CHAR_BIT); + + set_gdbarch_use_generic_dummy_frames (gdbarch, 1); + set_gdbarch_call_dummy_length (gdbarch, 0); + set_gdbarch_call_dummy_location (gdbarch, AT_ENTRY_POINT); + set_gdbarch_call_dummy_address (gdbarch, entry_point_address); + set_gdbarch_call_dummy_breakpoint_offset_p (gdbarch, 1); /*???*/ + set_gdbarch_call_dummy_breakpoint_offset (gdbarch, 0); + set_gdbarch_call_dummy_start_offset (gdbarch, 0); + set_gdbarch_pc_in_call_dummy (gdbarch, generic_pc_in_call_dummy); + set_gdbarch_call_dummy_words (gdbarch, sh_call_dummy_words); + set_gdbarch_sizeof_call_dummy_words (gdbarch, sizeof (sh_call_dummy_words)); + set_gdbarch_call_dummy_p (gdbarch, 1); + set_gdbarch_call_dummy_stack_adjust_p (gdbarch, 0); + set_gdbarch_get_saved_register (gdbarch, generic_get_saved_register); + set_gdbarch_fix_call_dummy (gdbarch, generic_fix_call_dummy); + set_gdbarch_coerce_float_to_double (gdbarch, + sh_coerce_float_to_double); + + set_gdbarch_extract_return_value (gdbarch, sh_extract_return_value); + set_gdbarch_push_arguments (gdbarch, sh_push_arguments); + set_gdbarch_push_dummy_frame (gdbarch, generic_push_dummy_frame); + set_gdbarch_push_return_address (gdbarch, sh_push_return_address); + + set_gdbarch_store_struct_return (gdbarch, sh_store_struct_return); + set_gdbarch_store_return_value (gdbarch, sh_store_return_value); + set_gdbarch_extract_struct_value_address (gdbarch, sh_extract_struct_value_address); + set_gdbarch_use_struct_convention (gdbarch, sh_use_struct_convention); + set_gdbarch_init_extra_frame_info (gdbarch, sh_init_extra_frame_info); + set_gdbarch_pop_frame (gdbarch, sh_pop_frame); + set_gdbarch_skip_prologue (gdbarch, sh_skip_prologue); + set_gdbarch_inner_than (gdbarch, core_addr_lessthan); + set_gdbarch_decr_pc_after_break (gdbarch, 0); + set_gdbarch_function_start_offset (gdbarch, 0); + set_gdbarch_breakpoint_from_pc (gdbarch, sh_breakpoint_from_pc); + + set_gdbarch_frame_args_skip (gdbarch, 0); + set_gdbarch_frameless_function_invocation (gdbarch, frameless_look_for_prologue); + set_gdbarch_frame_chain (gdbarch, sh_frame_chain); + set_gdbarch_frame_chain_valid (gdbarch, generic_file_frame_chain_valid); + set_gdbarch_frame_saved_pc (gdbarch, sh_frame_saved_pc); + set_gdbarch_frame_args_address (gdbarch, sh_frame_args_address); + set_gdbarch_frame_locals_address (gdbarch, sh_frame_locals_address); + set_gdbarch_saved_pc_after_call (gdbarch, sh_saved_pc_after_call); + set_gdbarch_frame_num_args (gdbarch, frame_num_args_unknown); + set_gdbarch_believe_pcc_promotion (gdbarch, 1); + set_gdbarch_ieee_float (gdbarch, 1); + + return gdbarch; } void _initialize_sh_tdep () { struct cmd_list_element *c; - + + register_gdbarch_init (bfd_arch_sh, sh_gdbarch_init); tm_print_insn = gdb_print_insn_sh; - target_architecture_hook = sh_target_architecture_hook; - add_com ("regs", class_vars, sh_show_regs, "Print all registers"); } diff --git a/gdb/sh3-rom.c b/gdb/sh3-rom.c index 030452c..825f8e9 100644 --- a/gdb/sh3-rom.c +++ b/gdb/sh3-rom.c @@ -76,9 +76,9 @@ sh3_supply_register (regname, regnamelen, val, vallen) break; case 'S': if (regname[1] == 'S' && regname[2] == 'R') - regno = SSR_REGNUM; + regno = gdbarch_tdep (current_gdbarch)->SSR_REGNUM; else if (regname[1] == 'P' && regname[2] == 'C') - regno = SPC_REGNUM; + regno = gdbarch_tdep (current_gdbarch)->SPC_REGNUM; break; } } @@ -153,7 +153,7 @@ sh3_load (desc, file, hashmark) than does GDB, and don't necessarily support all the registers either. So, typing "info reg sp" becomes a "r30". */ -static char *sh3_regnames[NUM_REGS] = +static char *sh3_regnames[] = { "R0", "R1", "R2", "R3", "R4", "R5", "R6", "R7", "R8", "R9", "R10", "R11", "R12", "R13", "R14", "R15", @@ -168,7 +168,7 @@ static char *sh3_regnames[NUM_REGS] = "R4_BANK1", "R5_BANK1", "R6_BANK1", "R7_BANK1" }; -static char *sh3e_regnames[NUM_REGS] = +static char *sh3e_regnames[] = { "R0", "R1", "R2", "R3", "R4", "R5", "R6", "R7", "R8", "R9", "R10", "R11", "R12", "R13", "R14", "R15", |