diff options
| -rw-r--r-- | gas/testsuite/ChangeLog | 4 | ||||
| -rw-r--r-- | gas/testsuite/gas/i386/opcode-suffix.d | 64 | ||||
| -rw-r--r-- | opcodes/ChangeLog | 4 | ||||
| -rw-r--r-- | opcodes/i386-dis.c | 32 |
4 files changed, 56 insertions, 48 deletions
diff --git a/gas/testsuite/ChangeLog b/gas/testsuite/ChangeLog index 5bb281a..35037cb 100644 --- a/gas/testsuite/ChangeLog +++ b/gas/testsuite/ChangeLog @@ -1,3 +1,7 @@ +2008-08-28 Jan Beulich <jbeulich@novell.com> + + * gas/i386/gas/i386/opcode-suffix.d: Add suffixes to cmovXX. + 2008-08-28 H.J. Lu <hongjiu.lu@intel.com> * gas/ia64/dv-raw-err.s: Add tests for cr.iib0 and cr.iib1. diff --git a/gas/testsuite/gas/i386/opcode-suffix.d b/gas/testsuite/gas/i386/opcode-suffix.d index 9db7e67..1c9eaed 100644 --- a/gas/testsuite/gas/i386/opcode-suffix.d +++ b/gas/testsuite/gas/i386/opcode-suffix.d @@ -266,22 +266,22 @@ Disassembly of section .text: *[0-9a-f]+: 0f 31[ ]+rdtsc[ ]+ *[0-9a-f]+: 0f 32[ ]+rdmsr[ ]+ *[0-9a-f]+: 0f 33[ ]+rdpmc[ ]+ - *[0-9a-f]+: 0f 40 90 90 90 90 90[ ]+cmovo[ ]+-0x6f6f6f70\(%eax\),%edx - *[0-9a-f]+: 0f 41 90 90 90 90 90[ ]+cmovno -0x6f6f6f70\(%eax\),%edx - *[0-9a-f]+: 0f 42 90 90 90 90 90[ ]+cmovb[ ]+-0x6f6f6f70\(%eax\),%edx - *[0-9a-f]+: 0f 43 90 90 90 90 90[ ]+cmovae -0x6f6f6f70\(%eax\),%edx - *[0-9a-f]+: 0f 44 90 90 90 90 90[ ]+cmove[ ]+-0x6f6f6f70\(%eax\),%edx - *[0-9a-f]+: 0f 45 90 90 90 90 90[ ]+cmovne -0x6f6f6f70\(%eax\),%edx - *[0-9a-f]+: 0f 46 90 90 90 90 90[ ]+cmovbe -0x6f6f6f70\(%eax\),%edx - *[0-9a-f]+: 0f 47 90 90 90 90 90[ ]+cmova[ ]+-0x6f6f6f70\(%eax\),%edx - *[0-9a-f]+: 0f 48 90 90 90 90 90[ ]+cmovs[ ]+-0x6f6f6f70\(%eax\),%edx - *[0-9a-f]+: 0f 49 90 90 90 90 90[ ]+cmovns -0x6f6f6f70\(%eax\),%edx - *[0-9a-f]+: 0f 4a 90 90 90 90 90[ ]+cmovp[ ]+-0x6f6f6f70\(%eax\),%edx - *[0-9a-f]+: 0f 4b 90 90 90 90 90[ ]+cmovnp -0x6f6f6f70\(%eax\),%edx - *[0-9a-f]+: 0f 4c 90 90 90 90 90[ ]+cmovl[ ]+-0x6f6f6f70\(%eax\),%edx - *[0-9a-f]+: 0f 4d 90 90 90 90 90[ ]+cmovge -0x6f6f6f70\(%eax\),%edx - *[0-9a-f]+: 0f 4e 90 90 90 90 90[ ]+cmovle -0x6f6f6f70\(%eax\),%edx - *[0-9a-f]+: 0f 4f 90 90 90 90 90[ ]+cmovg[ ]+-0x6f6f6f70\(%eax\),%edx + *[0-9a-f]+: 0f 40 90 90 90 90 90[ ]+cmovol[ ]+-0x6f6f6f70\(%eax\),%edx + *[0-9a-f]+: 0f 41 90 90 90 90 90[ ]+cmovnol -0x6f6f6f70\(%eax\),%edx + *[0-9a-f]+: 0f 42 90 90 90 90 90[ ]+cmovbl[ ]+-0x6f6f6f70\(%eax\),%edx + *[0-9a-f]+: 0f 43 90 90 90 90 90[ ]+cmovael -0x6f6f6f70\(%eax\),%edx + *[0-9a-f]+: 0f 44 90 90 90 90 90[ ]+cmovel[ ]+-0x6f6f6f70\(%eax\),%edx + *[0-9a-f]+: 0f 45 90 90 90 90 90[ ]+cmovnel -0x6f6f6f70\(%eax\),%edx + *[0-9a-f]+: 0f 46 90 90 90 90 90[ ]+cmovbel -0x6f6f6f70\(%eax\),%edx + *[0-9a-f]+: 0f 47 90 90 90 90 90[ ]+cmoval[ ]+-0x6f6f6f70\(%eax\),%edx + *[0-9a-f]+: 0f 48 90 90 90 90 90[ ]+cmovsl[ ]+-0x6f6f6f70\(%eax\),%edx + *[0-9a-f]+: 0f 49 90 90 90 90 90[ ]+cmovnsl -0x6f6f6f70\(%eax\),%edx + *[0-9a-f]+: 0f 4a 90 90 90 90 90[ ]+cmovpl[ ]+-0x6f6f6f70\(%eax\),%edx + *[0-9a-f]+: 0f 4b 90 90 90 90 90[ ]+cmovnpl -0x6f6f6f70\(%eax\),%edx + *[0-9a-f]+: 0f 4c 90 90 90 90 90[ ]+cmovll[ ]+-0x6f6f6f70\(%eax\),%edx + *[0-9a-f]+: 0f 4d 90 90 90 90 90[ ]+cmovgel -0x6f6f6f70\(%eax\),%edx + *[0-9a-f]+: 0f 4e 90 90 90 90 90[ ]+cmovlel -0x6f6f6f70\(%eax\),%edx + *[0-9a-f]+: 0f 4f 90 90 90 90 90[ ]+cmovgl[ ]+-0x6f6f6f70\(%eax\),%edx *[0-9a-f]+: 0f 60 90 90 90 90 90[ ]+punpcklbw -0x6f6f6f70\(%eax\),%mm2 *[0-9a-f]+: 0f 61 90 90 90 90 90[ ]+punpcklwd -0x6f6f6f70\(%eax\),%mm2 *[0-9a-f]+: 0f 62 90 90 90 90 90[ ]+punpckldq -0x6f6f6f70\(%eax\),%mm2 @@ -535,22 +535,22 @@ Disassembly of section .text: *[0-9a-f]+: 66 ff 90 90 90 90 90[ ]+callw[ ]+\*-0x6f6f6f70\(%eax\) *[0-9a-f]+: 66 0f 02 90 90 90 90 90[ ]+larw[ ]+-0x6f6f6f70\(%eax\),%dx *[0-9a-f]+: 66 0f 03 90 90 90 90 90[ ]+lslw[ ]+-0x6f6f6f70\(%eax\),%dx - *[0-9a-f]+: 66 0f 40 90 90 90 90 90[ ]+cmovo[ ]+-0x6f6f6f70\(%eax\),%dx - *[0-9a-f]+: 66 0f 41 90 90 90 90 90[ ]+cmovno -0x6f6f6f70\(%eax\),%dx - *[0-9a-f]+: 66 0f 42 90 90 90 90 90[ ]+cmovb[ ]+-0x6f6f6f70\(%eax\),%dx - *[0-9a-f]+: 66 0f 43 90 90 90 90 90[ ]+cmovae -0x6f6f6f70\(%eax\),%dx - *[0-9a-f]+: 66 0f 44 90 90 90 90 90[ ]+cmove[ ]+-0x6f6f6f70\(%eax\),%dx - *[0-9a-f]+: 66 0f 45 90 90 90 90 90[ ]+cmovne -0x6f6f6f70\(%eax\),%dx - *[0-9a-f]+: 66 0f 46 90 90 90 90 90[ ]+cmovbe -0x6f6f6f70\(%eax\),%dx - *[0-9a-f]+: 66 0f 47 90 90 90 90 90[ ]+cmova[ ]+-0x6f6f6f70\(%eax\),%dx - *[0-9a-f]+: 66 0f 48 90 90 90 90 90[ ]+cmovs[ ]+-0x6f6f6f70\(%eax\),%dx - *[0-9a-f]+: 66 0f 49 90 90 90 90 90[ ]+cmovns -0x6f6f6f70\(%eax\),%dx - *[0-9a-f]+: 66 0f 4a 90 90 90 90 90[ ]+cmovp[ ]+-0x6f6f6f70\(%eax\),%dx - *[0-9a-f]+: 66 0f 4b 90 90 90 90 90[ ]+cmovnp -0x6f6f6f70\(%eax\),%dx - *[0-9a-f]+: 66 0f 4c 90 90 90 90 90[ ]+cmovl[ ]+-0x6f6f6f70\(%eax\),%dx - *[0-9a-f]+: 66 0f 4d 90 90 90 90 90[ ]+cmovge -0x6f6f6f70\(%eax\),%dx - *[0-9a-f]+: 66 0f 4e 90 90 90 90 90[ ]+cmovle -0x6f6f6f70\(%eax\),%dx - *[0-9a-f]+: 66 0f 4f 90 90 90 90 90[ ]+cmovg[ ]+-0x6f6f6f70\(%eax\),%dx + *[0-9a-f]+: 66 0f 40 90 90 90 90 90[ ]+cmovow[ ]+-0x6f6f6f70\(%eax\),%dx + *[0-9a-f]+: 66 0f 41 90 90 90 90 90[ ]+cmovnow -0x6f6f6f70\(%eax\),%dx + *[0-9a-f]+: 66 0f 42 90 90 90 90 90[ ]+cmovbw[ ]+-0x6f6f6f70\(%eax\),%dx + *[0-9a-f]+: 66 0f 43 90 90 90 90 90[ ]+cmovaew -0x6f6f6f70\(%eax\),%dx + *[0-9a-f]+: 66 0f 44 90 90 90 90 90[ ]+cmovew[ ]+-0x6f6f6f70\(%eax\),%dx + *[0-9a-f]+: 66 0f 45 90 90 90 90 90[ ]+cmovnew -0x6f6f6f70\(%eax\),%dx + *[0-9a-f]+: 66 0f 46 90 90 90 90 90[ ]+cmovbew -0x6f6f6f70\(%eax\),%dx + *[0-9a-f]+: 66 0f 47 90 90 90 90 90[ ]+cmovaw[ ]+-0x6f6f6f70\(%eax\),%dx + *[0-9a-f]+: 66 0f 48 90 90 90 90 90[ ]+cmovsw[ ]+-0x6f6f6f70\(%eax\),%dx + *[0-9a-f]+: 66 0f 49 90 90 90 90 90[ ]+cmovnsw -0x6f6f6f70\(%eax\),%dx + *[0-9a-f]+: 66 0f 4a 90 90 90 90 90[ ]+cmovpw[ ]+-0x6f6f6f70\(%eax\),%dx + *[0-9a-f]+: 66 0f 4b 90 90 90 90 90[ ]+cmovnpw -0x6f6f6f70\(%eax\),%dx + *[0-9a-f]+: 66 0f 4c 90 90 90 90 90[ ]+cmovlw[ ]+-0x6f6f6f70\(%eax\),%dx + *[0-9a-f]+: 66 0f 4d 90 90 90 90 90[ ]+cmovgew -0x6f6f6f70\(%eax\),%dx + *[0-9a-f]+: 66 0f 4e 90 90 90 90 90[ ]+cmovlew -0x6f6f6f70\(%eax\),%dx + *[0-9a-f]+: 66 0f 4f 90 90 90 90 90[ ]+cmovgw[ ]+-0x6f6f6f70\(%eax\),%dx *[0-9a-f]+: 66 0f a0[ ]+pushw[ ]+%fs *[0-9a-f]+: 66 0f a1[ ]+popw[ ]+%fs *[0-9a-f]+: 66 0f a3 90 90 90 90 90[ ]+btw[ ]+%dx,-0x6f6f6f70\(%eax\) diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog index e41e5dc..a671b8c 100644 --- a/opcodes/ChangeLog +++ b/opcodes/ChangeLog @@ -1,3 +1,7 @@ +2008-08-28 Jan Beulich <jbeulich@novell.com> + + * i386-dis.c (dis386_twobyte): Adjust cmovXX mnemonics. + 2008-08-28 H.J. Lu <hongjiu.lu@intel.com> * ia64-dis.c (print_insn_ia64): Handle cr.iib0 and cr.iib1. diff --git a/opcodes/i386-dis.c b/opcodes/i386-dis.c index 6c2b513..9fd384e 100644 --- a/opcodes/i386-dis.c +++ b/opcodes/i386-dis.c @@ -1666,23 +1666,23 @@ static const struct dis386 dis386_twobyte[] = { { "(bad)", { XX } }, { "(bad)", { XX } }, /* 40 */ - { "cmovo", { Gv, Ev } }, - { "cmovno", { Gv, Ev } }, - { "cmovb", { Gv, Ev } }, - { "cmovae", { Gv, Ev } }, - { "cmove", { Gv, Ev } }, - { "cmovne", { Gv, Ev } }, - { "cmovbe", { Gv, Ev } }, - { "cmova", { Gv, Ev } }, + { "cmovoS", { Gv, Ev } }, + { "cmovnoS", { Gv, Ev } }, + { "cmovbS", { Gv, Ev } }, + { "cmovaeS", { Gv, Ev } }, + { "cmoveS", { Gv, Ev } }, + { "cmovneS", { Gv, Ev } }, + { "cmovbeS", { Gv, Ev } }, + { "cmovaS", { Gv, Ev } }, /* 48 */ - { "cmovs", { Gv, Ev } }, - { "cmovns", { Gv, Ev } }, - { "cmovp", { Gv, Ev } }, - { "cmovnp", { Gv, Ev } }, - { "cmovl", { Gv, Ev } }, - { "cmovge", { Gv, Ev } }, - { "cmovle", { Gv, Ev } }, - { "cmovg", { Gv, Ev } }, + { "cmovsS", { Gv, Ev } }, + { "cmovnsS", { Gv, Ev } }, + { "cmovpS", { Gv, Ev } }, + { "cmovnpS", { Gv, Ev } }, + { "cmovlS", { Gv, Ev } }, + { "cmovgeS", { Gv, Ev } }, + { "cmovleS", { Gv, Ev } }, + { "cmovgS", { Gv, Ev } }, /* 50 */ { MOD_TABLE (MOD_0F51) }, { PREFIX_TABLE (PREFIX_0F51) }, |