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-rw-r--r--opcodes/ChangeLog5
-rw-r--r--opcodes/v850-opc.c4
2 files changed, 7 insertions, 2 deletions
diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog
index c4ecb12..4ff0041 100644
--- a/opcodes/ChangeLog
+++ b/opcodes/ChangeLog
@@ -1,4 +1,9 @@
start-sanitize-v850
+Fri Aug 30 18:01:02 1996 J.T. Conklin <jtc@hippo.cygnus.com>
+
+ * v850-opc.c (v850_operands): Add V850_OPERAND_SIGNED flag
+ and set bits field to D9 and D22 operands.
+
Thu Aug 29 11:10:46 1996 Jeffrey A Law (law@cygnus.com)
* v850-opc.c (v850_operands): Define SR2 operand.
diff --git a/opcodes/v850-opc.c b/opcodes/v850-opc.c
index 2bdbc83..2cd98e8 100644
--- a/opcodes/v850-opc.c
+++ b/opcodes/v850-opc.c
@@ -50,7 +50,7 @@ const struct v850_operand v850_operands[] = {
/* The DISP9 field in a format 3 insn. */
#define D9 (D7S+1)
- { 0, 0, insert_d9, extract_d9, V850_OPERAND_SIGNED },
+ { 9, 0, insert_d9, extract_d9, V850_OPERAND_SIGNED },
/* The DISP16 field in a format 6 insn. */
#define D16 (D9+1)
@@ -58,7 +58,7 @@ const struct v850_operand v850_operands[] = {
/* The DISP22 field in a format 4 insn. */
#define D22 (D16+1)
- { 16, 0, 0, 0, 0 },
+ { 22, 0, 0, 0, V850_OPERAND_SIGNED },
#define B3 (D22+1)
/* The 3 bit immediate field in format 8 insn. */