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-rw-r--r--gas/ChangeLog14
-rw-r--r--gas/config/m68k-parse.h2
-rw-r--r--gas/config/tc-m68k.c65
-rw-r--r--gas/testsuite/ChangeLog6
-rw-r--r--gas/testsuite/gas/m68k/all.exp3
-rw-r--r--gas/testsuite/gas/m68k/ctrl-1.d12
-rw-r--r--gas/testsuite/gas/m68k/ctrl-1.s2
-rw-r--r--gas/testsuite/gas/m68k/ctrl-2.d11
-rw-r--r--gas/testsuite/gas/m68k/ctrl-2.s2
-rw-r--r--opcodes/ChangeLog5
-rw-r--r--opcodes/m68k-dis.c4
11 files changed, 102 insertions, 24 deletions
diff --git a/gas/ChangeLog b/gas/ChangeLog
index 33f9bf64..0d97c45 100644
--- a/gas/ChangeLog
+++ b/gas/ChangeLog
@@ -1,3 +1,17 @@
+2007-04-20 Nathan Sidwell <nathan@codesourcery.com>
+
+ * config/m68k-parse.h (RAMBAR_ALT): New.
+ * config/tc-m68k.c (mcf5206_ctrl, mcf5307_ctrl): New.
+ (mcf_ctrl, mcf5208_ctrl, mcf5210a_ctrl, mcf5213_ctrl, mcf52235_ctrl,
+ mcf5225_ctrl, mcf5235_ctrl, mcf5271_ctrl, mcf5275_ctrl,
+ mcf5282_ctrl, mcf5329_ctrl, mcf5373_ctrl, mcfv4e_ctrl,
+ mcf5475_ctrl, mcf5485_ctrl): Add RAMBAR synonym for
+ RAMBAR1.
+ (mcf5272_ctrl): Add RAMBAR0, replace add RAMBAR with RAMBAR_ALT.
+ (m68k_cpus): Adjust 5206, 5206e & 5307 entries.
+ (m68k_ip) <Case J>: Detect when RAMBAR_ALT should be used. Add it
+ to control register mapping.
+
2007-04-20 Alan Modra <amodra@bigpond.net.au>
* messages.c (as_internal_value_out_of_range): Fix typo in
diff --git a/gas/config/m68k-parse.h b/gas/config/m68k-parse.h
index 6bd85cd..4351609 100644
--- a/gas/config/m68k-parse.h
+++ b/gas/config/m68k-parse.h
@@ -113,6 +113,8 @@ enum m68k_register
BUSCR, /* 68060 added these. */
PCR,
ROMBAR, /* mcf5200 added these. */
+ RAMBAR_ALT, /* Some CF chips have RAMBAR using
+ RAMBAR0's number */
RAMBAR0,
RAMBAR1,
MMUBAR, /* mcfv4e added these. */
diff --git a/gas/config/tc-m68k.c b/gas/config/tc-m68k.c
index bc35fda..4e7391e 100644
--- a/gas/config/tc-m68k.c
+++ b/gas/config/tc-m68k.c
@@ -173,39 +173,43 @@ static const enum m68k_register m68060_ctrl[] = {
};
static const enum m68k_register mcf_ctrl[] = {
CACR, TC, ACR0, ACR1, ACR2, ACR3, VBR, ROMBAR,
- RAMBAR0, RAMBAR1, MBAR,
+ RAMBAR0, RAMBAR1, RAMBAR, MBAR,
+ 0
+};
+static const enum m68k_register mcf5206_ctrl[] = {
+ CACR, ACR0, ACR1, VBR, RAMBAR0, RAMBAR_ALT, MBAR,
0
};
static const enum m68k_register mcf5208_ctrl[] = {
- CACR, ACR0, ACR1, VBR, RAMBAR1,
+ CACR, ACR0, ACR1, VBR, RAMBAR, RAMBAR1,
0
};
static const enum m68k_register mcf5210a_ctrl[] = {
- VBR, CACR, ACR0, ACR1, ROMBAR, RAMBAR, MBAR,
+ VBR, CACR, ACR0, ACR1, ROMBAR, RAMBAR, RAMBAR1, MBAR,
0
};
static const enum m68k_register mcf5213_ctrl[] = {
- VBR, RAMBAR, FLASHBAR,
+ VBR, RAMBAR, RAMBAR1, FLASHBAR,
0
};
static const enum m68k_register mcf5216_ctrl[] = {
- VBR, CACR, ACR0, ACR1, FLASHBAR, RAMBAR,
+ VBR, CACR, ACR0, ACR1, FLASHBAR, RAMBAR, RAMBAR1,
0
};
static const enum m68k_register mcf52235_ctrl[] = {
- VBR, FLASHBAR, RAMBAR,
+ VBR, FLASHBAR, RAMBAR, RAMBAR1,
0
};
static const enum m68k_register mcf5225_ctrl[] = {
- VBR, CACR, ACR0, ACR1, FLASHBAR, RAMBAR, MBAR,
+ VBR, CACR, ACR0, ACR1, FLASHBAR, RAMBAR, MBAR, RAMBAR1,
0
};
static const enum m68k_register mcf5235_ctrl[] = {
- VBR, CACR, ACR0, ACR1, RAMBAR,
+ VBR, CACR, ACR0, ACR1, RAMBAR, RAMBAR1,
0
};
static const enum m68k_register mcf5249_ctrl[] = {
- VBR, CACR, ACR0, ACR1, RAMBAR0, RAMBAR1, MBAR, MBAR2,
+ VBR, CACR, ACR0, ACR1, RAMBAR0, RAMBAR1, RAMBAR, MBAR, MBAR2,
0
};
static const enum m68k_register mcf5250_ctrl[] = {
@@ -213,27 +217,31 @@ static const enum m68k_register mcf5250_ctrl[] = {
0
};
static const enum m68k_register mcf5271_ctrl[] = {
- VBR, CACR, ACR0, ACR1, RAMBAR,
+ VBR, CACR, ACR0, ACR1, RAMBAR, RAMBAR1,
0
};
static const enum m68k_register mcf5272_ctrl[] = {
- VBR, CACR, ACR0, ACR1, ROMBAR, RAMBAR, MBAR,
+ VBR, CACR, ACR0, ACR1, ROMBAR, RAMBAR_ALT, RAMBAR0, MBAR,
0
};
static const enum m68k_register mcf5275_ctrl[] = {
- VBR, CACR, ACR0, ACR1, RAMBAR,
+ VBR, CACR, ACR0, ACR1, RAMBAR, RAMBAR1,
0
};
static const enum m68k_register mcf5282_ctrl[] = {
- VBR, CACR, ACR0, ACR1, FLASHBAR, RAMBAR,
+ VBR, CACR, ACR0, ACR1, FLASHBAR, RAMBAR, RAMBAR1,
+ 0
+};
+static const enum m68k_register mcf5307_ctrl[] = {
+ CACR, ACR0, ACR1, VBR, RAMBAR0, RAMBAR_ALT, MBAR,
0
};
static const enum m68k_register mcf5329_ctrl[] = {
- VBR, CACR, ACR0, ACR1, RAMBAR,
+ VBR, CACR, ACR0, ACR1, RAMBAR, RAMBAR1,
0
};
static const enum m68k_register mcf5373_ctrl[] = {
- VBR, CACR, ACR0, ACR1, RAMBAR,
+ VBR, CACR, ACR0, ACR1, RAMBAR, RAMBAR1,
0
};
static const enum m68k_register mcfv4e_ctrl[] = {
@@ -249,7 +257,7 @@ static const enum m68k_register mcfv4e_ctrl[] = {
TC /* ASID */, BUSCR /* MMUBAR */,
ITT0 /* ACR0 */, ITT1 /* ACR1 */, DTT0 /* ACR2 */, DTT1 /* ACR3 */,
MBAR1 /* MBAR */, MBAR2 /* SECMBAR */, MBAR0 /* SECMBAR */,
- ROMBAR /* ROMBAR0 */,
+ ROMBAR /* ROMBAR0 */, RAMBAR /* RAMBAR1 */,
0
};
static const enum m68k_register mcf5475_ctrl[] = {
@@ -258,7 +266,7 @@ static const enum m68k_register mcf5475_ctrl[] = {
/* Legacy names */
TC /* ASID */, BUSCR /* MMUBAR */,
ITT0 /* ACR0 */, ITT1 /* ACR1 */, DTT0 /* ACR2 */, DTT1 /* ACR3 */,
- MBAR1 /* MBAR */, ROMBAR /* ROMBAR0 */,
+ MBAR1 /* MBAR */, RAMBAR /* RAMBAR1 */,
0
};
static const enum m68k_register mcf5485_ctrl[] = {
@@ -267,7 +275,7 @@ static const enum m68k_register mcf5485_ctrl[] = {
/* Legacy names */
TC /* ASID */, BUSCR /* MMUBAR */,
ITT0 /* ACR0 */, ITT1 /* ACR1 */, DTT0 /* ACR2 */, DTT1 /* ACR3 */,
- MBAR1 /* MBAR */, ROMBAR /* ROMBAR0 */,
+ MBAR1 /* MBAR */, RAMBAR /* RAMBAR1 */,
0
};
static const enum m68k_register fido_ctrl[] = {
@@ -530,9 +538,9 @@ static const struct m68k_cpu m68k_cpus[] =
{mcfisa_a, mcf_ctrl, "5200", 0},
{mcfisa_a, mcf_ctrl, "5202", 1},
{mcfisa_a, mcf_ctrl, "5204", 1},
- {mcfisa_a, mcf_ctrl, "5206", 1},
+ {mcfisa_a, mcf5206_ctrl, "5206", 1},
- {mcfisa_a|mcfhwdiv|mcfmac, mcf_ctrl, "5206e", 0},
+ {mcfisa_a|mcfhwdiv|mcfmac, mcf5206_ctrl, "5206e", 0},
{mcfisa_a|mcfisa_aa|mcfhwdiv|mcfemac|mcfusp, mcf5208_ctrl, "5207", -1},
{mcfisa_a|mcfisa_aa|mcfhwdiv|mcfemac|mcfusp, mcf5208_ctrl, "5208", 0},
@@ -578,7 +586,7 @@ static const struct m68k_cpu m68k_cpus[] =
{mcfisa_a|mcfisa_aa|mcfhwdiv|mcfemac|mcfusp, mcf5282_ctrl, "5282", -1},
{mcfisa_a|mcfisa_aa|mcfhwdiv|mcfemac|mcfusp, mcf5282_ctrl, "528x", 0},
- {mcfisa_a|mcfhwdiv|mcfmac, mcf_ctrl, "5307", 0},
+ {mcfisa_a|mcfhwdiv|mcfmac, mcf5307_ctrl, "5307", 0},
{mcfisa_a|mcfisa_aa|mcfhwdiv|mcfemac|mcfusp, mcf5329_ctrl, "5327", -1},
{mcfisa_a|mcfisa_aa|mcfhwdiv|mcfemac|mcfusp, mcf5329_ctrl, "5328", -1},
@@ -1743,8 +1751,18 @@ m68k_ip (char *instring)
const enum m68k_register *rp;
for (rp = control_regs; *rp; rp++)
- if (*rp == opP->reg)
- break;
+ {
+ if (*rp == opP->reg)
+ break;
+ /* In most CPUs RAMBAR refers to control reg
+ c05 (RAMBAR1), but a few CPUs have it
+ refer to c04 (RAMBAR0). */
+ else if (*rp == RAMBAR_ALT && opP->reg == RAMBAR)
+ {
+ opP->reg = RAMBAR_ALT;
+ break;
+ }
+ }
if (*rp == 0)
losing++;
}
@@ -3075,6 +3093,7 @@ m68k_ip (char *instring)
break;
case FLASHBAR:
case RAMBAR0:
+ case RAMBAR_ALT:
tmpreg = 0xC04;
break;
case RAMBAR:
diff --git a/gas/testsuite/ChangeLog b/gas/testsuite/ChangeLog
index 19cc782..5d24705 100644
--- a/gas/testsuite/ChangeLog
+++ b/gas/testsuite/ChangeLog
@@ -1,3 +1,9 @@
+2007-04-20 Nathan Sidwell <nathan@codesourcery.com>
+
+ * gas/m68k/ctrl-1.d, gas/m68k/ctrl-1.s: New.
+ * gas/m68k/ctrl-2.d, gas/m68k/ctrl-2.s: New.
+ * gas/m68k/all.exp: Add them.
+
2007-04-20 Alan Modra <amodra@bigpond.net.au>
* gas/ppc/range64.s: New.
diff --git a/gas/testsuite/gas/m68k/all.exp b/gas/testsuite/gas/m68k/all.exp
index 88a3088..62badbc 100644
--- a/gas/testsuite/gas/m68k/all.exp
+++ b/gas/testsuite/gas/m68k/all.exp
@@ -52,6 +52,9 @@ if { [istarget m68*-*-*] || [istarget fido*-*-*] } then {
run_dump_test arch-cpu-1
run_dump_test cpu32
+ run_dump_test ctrl-1
+ run_dump_test ctrl-2
+
set testname "68000 operands"
gas_run "operands.s" "-m68000" "2>err.out"
if ![string match "child process exited abnormally" $comp_output] then {
diff --git a/gas/testsuite/gas/m68k/ctrl-1.d b/gas/testsuite/gas/m68k/ctrl-1.d
new file mode 100644
index 0000000..d434728
--- /dev/null
+++ b/gas/testsuite/gas/m68k/ctrl-1.d
@@ -0,0 +1,12 @@
+#name: ctrl-1.d
+#objdump: -d
+#as: -mcpu=5307
+
+.*: file format .*
+
+Disassembly of section .text:
+
+0+ <.text>:
+ 0: 4e7b 0c04 movec %d0,%rambar0
+ 4: 4e7b 0c04 movec %d0,%rambar0
+
diff --git a/gas/testsuite/gas/m68k/ctrl-1.s b/gas/testsuite/gas/m68k/ctrl-1.s
new file mode 100644
index 0000000..cac82d9
--- /dev/null
+++ b/gas/testsuite/gas/m68k/ctrl-1.s
@@ -0,0 +1,2 @@
+ movec %d0,%rambar
+ movec %d0,%rambar0
diff --git a/gas/testsuite/gas/m68k/ctrl-2.d b/gas/testsuite/gas/m68k/ctrl-2.d
new file mode 100644
index 0000000..00b8aa3
--- /dev/null
+++ b/gas/testsuite/gas/m68k/ctrl-2.d
@@ -0,0 +1,11 @@
+#name: ctrl-2.d
+#objdump: -d
+#as: -mcpu=5208
+
+.*: file format .*
+
+Disassembly of section .text:
+
+0+ <.text>:
+ 0: 4e7b 0c05 movec %d0,%rambar1
+ 4: 4e7b 0c05 movec %d0,%rambar1
diff --git a/gas/testsuite/gas/m68k/ctrl-2.s b/gas/testsuite/gas/m68k/ctrl-2.s
new file mode 100644
index 0000000..3a36db0
--- /dev/null
+++ b/gas/testsuite/gas/m68k/ctrl-2.s
@@ -0,0 +1,2 @@
+ movec %d0,%rambar
+ movec %d0,%rambar1
diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog
index 329126c..f92ffcc 100644
--- a/opcodes/ChangeLog
+++ b/opcodes/ChangeLog
@@ -1,3 +1,8 @@
+2007-04-20 Nathan Sidwell <nathan@codesourcery.com>
+
+ * m68k-dis.c (print_insn_arg): Show c04 as rambar0 and c05 as
+ rambar1.
+
2007-04-20 Alan Modra <amodra@bigpond.net.au>
* ppc-dis.c (print_insn_powerpc): Adjust for struct powerpc_operand
diff --git a/opcodes/m68k-dis.c b/opcodes/m68k-dis.c
index 16ad7e4..d964ef4 100644
--- a/opcodes/m68k-dis.c
+++ b/opcodes/m68k-dis.c
@@ -645,7 +645,9 @@ print_insn_arg (const char *d,
{"%dtt0",0x006}, {"%dtt1",0x007}, {"%buscr",0x008},
{"%usp", 0x800}, {"%vbr", 0x801}, {"%caar", 0x802},
{"%msp", 0x803}, {"%isp", 0x804},
- {"%flashbar", 0xc04}, {"%rambar", 0xc05}, /* mcf528x added these. */
+ /* reg c04 is sometimes called flashbar or rambar.
+ rec c05 is also sometimes called rambar. */
+ {"%rambar0", 0xc04}, {"%rambar1", 0xc05},
/* Should we be calling this psr like we do in case 'Y'? */
{"%mmusr",0x805},
generated by cgit v1.1 at 2024-12-23 02:03:05 +0000