diff options
-rw-r--r-- | gas/ChangeLog | 5 | ||||
-rw-r--r-- | gas/config/tc-h8300.c | 1 | ||||
-rw-r--r-- | gas/testsuite/ChangeLog | 4 | ||||
-rw-r--r-- | gas/testsuite/gas/h8300/h8sx_mov_imm.d | 14 | ||||
-rw-r--r-- | gas/testsuite/gas/h8300/h8sx_mov_imm.s | 12 | ||||
-rw-r--r-- | include/opcode/ChangeLog | 10 | ||||
-rw-r--r-- | include/opcode/h8300.h | 10 |
7 files changed, 49 insertions, 7 deletions
diff --git a/gas/ChangeLog b/gas/ChangeLog index 0769843..810841a 100644 --- a/gas/ChangeLog +++ b/gas/ChangeLog @@ -1,3 +1,8 @@ +2003-06-25 Richard Sandiford <rsandifo@redhat.com> + + * config/tc-h8300.c (get_specific): Allow ':8' to be used for + unsigned 8-bit operands. + 2003-06-24 Nick Clifton <nickc@redhat.com> * read.c (s_comm): Change error message to assume an unsigned size diff --git a/gas/config/tc-h8300.c b/gas/config/tc-h8300.c index 6a6e3a8..646b69e 100644 --- a/gas/config/tc-h8300.c +++ b/gas/config/tc-h8300.c @@ -1302,6 +1302,7 @@ get_specific (instruction, operands, size) #endif if (((x_size == L_16 && op_size == L_16U) + || (x_size == L_8 && op_size == L_8U) || (x_size == L_3 && op_size == L_3NZ)) /* We're deliberately more permissive for ABS modes. */ && (op_mode == ABS diff --git a/gas/testsuite/ChangeLog b/gas/testsuite/ChangeLog index 4245fd2..57a7903 100644 --- a/gas/testsuite/ChangeLog +++ b/gas/testsuite/ChangeLog @@ -1,3 +1,7 @@ +2003-06-25 Richard Sandiford <rsandifo@redhat.com> + + * gas/h8300/h8sx_mov_imm.[sd]: Add tests for mov.[wl] #xx:8,@yy. + 2003-06-24 Richard Sandiford <rsandifo@redhat.com> * gas/h8300/h8300.exp (h8sx_disp2, h8sx_rtsl, h8sx_mov_imm): Move... diff --git a/gas/testsuite/gas/h8300/h8sx_mov_imm.d b/gas/testsuite/gas/h8300/h8sx_mov_imm.d index 84fc12a..15a5ff9 100644 --- a/gas/testsuite/gas/h8300/h8sx_mov_imm.d +++ b/gas/testsuite/gas/h8300/h8sx_mov_imm.d @@ -289,5 +289,19 @@ Disassembly of section \.text: .*: 00 00 48 00 * .*: 00 01 80 00 * .*: R_H8_DIR32 bar +.*: 79 74 ff ff * 79 74 ff ff 00 00 * mov.w #0xffff,@r0 +.*: 00 00 * +.*: 01 5d 00 00 * 01 5d 00 00 * mov.w #0x0,@r0 +.*: 01 5d 00 01 * 01 5d 00 01 * mov.w #0x1,@r0 +.*: 01 5d 00 ff * 01 5d 00 ff * mov.w #0xff,@r0 +.*: 79 74 01 00 * 79 74 01 00 00 00 * mov.w #0x100,@r0 +.*: 00 00 * +.*: 7a 74 ff ff * 7a 74 ff ff ff ff 00 00 * mov.l #0xffffffff,@r0 +.*: ff ff 00 00 * +.*: 01 0d 00 00 * 01 0d 00 00 * mov.l #0x0,@r0 +.*: 01 0d 00 01 * 01 0d 00 01 * mov.l #0x1,@r0 +.*: 01 0d 00 ff * 01 0d 00 ff * mov.l #0xff,@r0 +.*: 7a 7c 01 00 * 7a 7c 01 00 00 00 * mov.l #0x100,@r0 +.*: 00 00 * .* <.*>: \.\.\. diff --git a/gas/testsuite/gas/h8300/h8sx_mov_imm.s b/gas/testsuite/gas/h8300/h8sx_mov_imm.s index b2e29b8..8ec8e85 100644 --- a/gas/testsuite/gas/h8300/h8sx_mov_imm.s +++ b/gas/testsuite/gas/h8300/h8sx_mov_imm.s @@ -93,6 +93,18 @@ mov.l #.L1,@0x18000 mov.l #bar,@0x18000 + mov.w #-1,@er0 + mov.w #0,@er0 + mov.w #1,@er0 + mov.w #0xff,@er0 + mov.w #0x100,@er0 + + mov.l #-1,@er0 + mov.l #0,@er0 + mov.l #1,@er0 + mov.l #0xff,@er0 + mov.l #0x100,@er0 + .globl bar bar: .space 16 diff --git a/include/opcode/ChangeLog b/include/opcode/ChangeLog index bc80126..e100c11 100644 --- a/include/opcode/ChangeLog +++ b/include/opcode/ChangeLog @@ -1,7 +1,13 @@ 2003-06-25 Richard Sandiford <rsandifo@redhat.com> - * include/opcode/h8300.h (h8_opcodes): Fix the mov.l @(dd:32,ERs),ERd - and mov.l ERs,@(dd:32,ERd) entries. + * h8300.h (IMM2_NS, IMM8_NS, IMM16_NS): Remove. + (IMM8U, IMM8U_NS): Define. + (h8_opcodes): Use IMM8U_NS for mov.[wl] #xx:8,@yy. + +2003-06-25 Richard Sandiford <rsandifo@redhat.com> + + * h8300.h (h8_opcodes): Fix the mov.l @(dd:32,ERs),ERd and + mov.l ERs,@(dd:32,ERd) entries. 2003-06-23 H.J. Lu <hongjiu.lu@intel.com> diff --git a/include/opcode/h8300.h b/include/opcode/h8300.h index 9dd8105..bfac3f8 100644 --- a/include/opcode/h8300.h +++ b/include/opcode/h8300.h @@ -117,6 +117,7 @@ enum h8_flags { B31 = 0x40000000, /* Bit 3 must be high. */ E = 0x80000000, /* End of nibble sequence. */ + /* Immediates smaller than 8 bits are always unsigned. */ IMM3 = IMM | L_3, IMM4 = IMM | L_4, IMM5 = IMM | L_5, @@ -124,15 +125,14 @@ enum h8_flags { IMM2 = IMM | L_2, IMM8 = IMM | SRC | L_8, + IMM8U = IMM | SRC | L_8U, IMM16 = IMM | SRC | L_16, IMM16U = IMM | SRC | L_16U, IMM32 = IMM | SRC | L_32, IMM3NZ_NS = IMM3NZ | NO_SYMBOLS, - IMM2_NS = IMM2 | NO_SYMBOLS, IMM4_NS = IMM4 | NO_SYMBOLS, - IMM8_NS = IMM8 | NO_SYMBOLS, - IMM16_NS = IMM16 | NO_SYMBOLS, + IMM8U_NS = IMM8U | NO_SYMBOLS, IMM16U_NS = IMM16U | NO_SYMBOLS, RD8 = DST | L_8 | REG, @@ -1475,7 +1475,7 @@ struct h8_opcode h8_opcodes[] = {O (O_MOV, SW), AV_H8SX, 0, "mov.w", {{IMM4_NS, ABS16DST, E}}, {{0x6, 0xb, 0xd, IMM4, DSTABS16LIST, E}}}, {O (O_MOV, SW), AV_H8SX, 0, "mov.w", {{IMM4_NS, ABS32DST, E}}, {{0x6, 0xb, 0xf, IMM4, DSTABS32LIST, E}}}, - MOVFROM_IMM8 (O (O_MOV, SW), PREFIX_015D, "mov.w", IMM8_NS), + MOVFROM_IMM8 (O (O_MOV, SW), PREFIX_015D, "mov.w", IMM8U_NS), MOVFROM_IMM (O (O_MOV, SW), PREFIX_7974, "mov.w", IMM16, IMM16LIST), {O (O_MOV, SW), AV_H8, 2, "mov.w", {{RS16, RD16, E}}, {{0x0, 0xD, RS16, RD16, E}}}, @@ -1501,7 +1501,7 @@ struct h8_opcode h8_opcodes[] = {O (O_MOV, SL), AV_H8SX, 0, "mov.l", {{IMM3NZ_NS, RD32, E}}, {{0x0, 0xf, B31 | IMM3NZ, B31 | RD32, E}}}, - MOVFROM_IMM8 (O (O_MOV, SL), PREFIX_010D, "mov.l", IMM8_NS), + MOVFROM_IMM8 (O (O_MOV, SL), PREFIX_010D, "mov.l", IMM8U_NS), MOVFROM_IMM (O (O_MOV, SL), PREFIX_7A7C, "mov.l", IMM16U_NS, IMM16ULIST), {O (O_MOV, SL), AV_H8SX, 0, "mov.l", {{IMM16U_NS, RD32, E}}, {{0x7, 0xa, 0x0, B31 | RD32, IMM16ULIST, E}}}, |