diff options
| -rw-r--r-- | gas/ChangeLog | 20 | ||||
| -rw-r--r-- | gas/config/tc-mips.c | 21 | ||||
| -rw-r--r-- | gas/testsuite/gas/mips/elf-rel28-lldscd-micromips-n32.d | 138 | ||||
| -rw-r--r-- | gas/testsuite/gas/mips/elf-rel28-lldscd-micromips-n64.d | 222 | ||||
| -rw-r--r-- | gas/testsuite/gas/mips/elf-rel28-lldscd-n32.d | 96 | ||||
| -rw-r--r-- | gas/testsuite/gas/mips/elf-rel28-lldscd-n64.d | 180 | ||||
| -rw-r--r-- | gas/testsuite/gas/mips/elf-rel28.s | 12 | ||||
| -rw-r--r-- | gas/testsuite/gas/mips/mips.exp | 4 |
8 files changed, 692 insertions, 1 deletions
diff --git a/gas/ChangeLog b/gas/ChangeLog index bf5368c..badbcf6 100644 --- a/gas/ChangeLog +++ b/gas/ChangeLog @@ -1,5 +1,25 @@ 2018-07-02 Maciej W. Rozycki <macro@mips.com> + * config/tc-mips.c (macro_build) <'i', 'j'>: Also accept + BFD_RELOC_16, BFD_RELOC_MIPS_GOT16, BFD_RELOC_MIPS_CALL16, + BFD_RELOC_MIPS_GOT_HI16, BFD_RELOC_MIPS_GOT_LO16, + BFD_RELOC_MIPS_CALL_HI16, BFD_RELOC_MIPS_CALL_LO16, + BFD_RELOC_MIPS_SUB, BFD_RELOC_MIPS_GOT_PAGE, + BFD_RELOC_MIPS_HIGHEST, BFD_RELOC_MIPS_GOT_DISP, + BFD_RELOC_MIPS_TLS_GD, BFD_RELOC_MIPS_TLS_LDM, + BFD_RELOC_MIPS_TLS_DTPREL_HI16, BFD_RELOC_MIPS_TLS_DTPREL_LO16, + BFD_RELOC_MIPS_TLS_GOTTPREL, BFD_RELOC_MIPS_TLS_TPREL_HI16 and + BFD_RELOC_MIPS_TLS_TPREL_LO16 relocations if in the microMIPS + mode. + * testsuite/gas/mips/elf-rel28-lldscd-n32.d: New test. + * testsuite/gas/mips/elf-rel28-lldscd-micromips-n32.d: New test. + * testsuite/gas/mips/elf-rel28-lldscd-n64.d: New test. + * testsuite/gas/mips/elf-rel28-lldscd-micromips-n64.d: New test. + * testsuite/gas/mips/elf-rel28.s: Add instruction selection. + * testsuite/gas/mips/mips.exp: Run the new tests. + +2018-07-02 Maciej W. Rozycki <macro@mips.com> + * testsuite/gas/mips/elf-rel28-micromips-n32.d: New test. * testsuite/gas/mips/elf-rel28-micromips-n64.d: New test. * testsuite/gas/mips/mips.exp: Run the new tests. diff --git a/gas/config/tc-mips.c b/gas/config/tc-mips.c index 8dfc1f5..59df787 100644 --- a/gas/config/tc-mips.c +++ b/gas/config/tc-mips.c @@ -8851,7 +8851,26 @@ macro_build (expressionS *ep, const char *name, const char *fmt, ...) || *r == BFD_RELOC_MIPS_HIGHER || *r == BFD_RELOC_HI16_S || *r == BFD_RELOC_LO16 - || *r == BFD_RELOC_MIPS_GOT_OFST); + || *r == BFD_RELOC_MIPS_GOT_OFST + || (mips_opts.micromips + && (*r == BFD_RELOC_16 + || *r == BFD_RELOC_MIPS_GOT16 + || *r == BFD_RELOC_MIPS_CALL16 + || *r == BFD_RELOC_MIPS_GOT_HI16 + || *r == BFD_RELOC_MIPS_GOT_LO16 + || *r == BFD_RELOC_MIPS_CALL_HI16 + || *r == BFD_RELOC_MIPS_CALL_LO16 + || *r == BFD_RELOC_MIPS_SUB + || *r == BFD_RELOC_MIPS_GOT_PAGE + || *r == BFD_RELOC_MIPS_HIGHEST + || *r == BFD_RELOC_MIPS_GOT_DISP + || *r == BFD_RELOC_MIPS_TLS_GD + || *r == BFD_RELOC_MIPS_TLS_LDM + || *r == BFD_RELOC_MIPS_TLS_DTPREL_HI16 + || *r == BFD_RELOC_MIPS_TLS_DTPREL_LO16 + || *r == BFD_RELOC_MIPS_TLS_GOTTPREL + || *r == BFD_RELOC_MIPS_TLS_TPREL_HI16 + || *r == BFD_RELOC_MIPS_TLS_TPREL_LO16))); break; case 'o': diff --git a/gas/testsuite/gas/mips/elf-rel28-lldscd-micromips-n32.d b/gas/testsuite/gas/mips/elf-rel28-lldscd-micromips-n32.d new file mode 100644 index 0000000..e593e8b --- /dev/null +++ b/gas/testsuite/gas/mips/elf-rel28-lldscd-micromips-n32.d @@ -0,0 +1,138 @@ +#source: elf-rel28.s +#as: -march=from-abi -mmicromips -n32 --defsym tlldscd=1 +#objdump: -dr +#name: MIPS ELF reloc 28 (LLD/SCD, microMIPS, n32) + +.*: file format .* + + +Disassembly of section \.text: + +.* <foo>: +.*: 3024 0000 addiu at,a0,0 + .*: R_MICROMIPS_CALL_HI16 bar +.*: 6081 7000 lld a0,0\(at\) +.*: 3024 0000 addiu at,a0,0 + .*: R_MICROMIPS_CALL_LO16 bar +.*: 6081 7000 lld a0,0\(at\) +.*: 3024 0000 addiu at,a0,0 + .*: R_MICROMIPS_CALL16 bar +.*: 6081 7000 lld a0,0\(at\) +.*: 3024 0000 addiu at,a0,0 + .*: R_MICROMIPS_GOT_DISP bar +.*: 6081 7000 lld a0,0\(at\) +.*: 3024 0000 addiu at,a0,0 + .*: R_MICROMIPS_GOT_PAGE bar +.*: 6081 7000 lld a0,0\(at\) +.*: 3024 0000 addiu at,a0,0 + .*: R_MICROMIPS_GOT_OFST bar +.*: 6081 7000 lld a0,0\(at\) +.*: 3024 0000 addiu at,a0,0 + .*: R_MICROMIPS_GOT_HI16 bar +.*: 6081 7000 lld a0,0\(at\) +.*: 3024 0000 addiu at,a0,0 + .*: R_MICROMIPS_GOT_LO16 bar +.*: 6081 7000 lld a0,0\(at\) +.*: 3024 0000 addiu at,a0,0 + .*: R_MICROMIPS_GOT16 bar +.*: 6081 7000 lld a0,0\(at\) +.*: 3024 0000 addiu at,a0,0 + .*: R_MICROMIPS_GPREL16 bar +.*: 6081 7000 lld a0,0\(at\) +.*: 3024 0000 addiu at,a0,0 + .*: R_MIPS_16 bar +.*: 6081 7000 lld a0,0\(at\) +.*: 3024 0000 addiu at,a0,0 + .*: R_MICROMIPS_HIGHEST bar +.*: 6081 7000 lld a0,0\(at\) +.*: 3024 0000 addiu at,a0,0 + .*: R_MICROMIPS_HIGHER bar +.*: 6081 7000 lld a0,0\(at\) +.*: 3024 0000 addiu at,a0,0 + .*: R_MICROMIPS_SUB bar +.*: 6081 7000 lld a0,0\(at\) +.*: 3024 0000 addiu at,a0,0 + .*: R_MICROMIPS_TLS_GD bar +.*: 6081 7000 lld a0,0\(at\) +.*: 3024 0000 addiu at,a0,0 + .*: R_MICROMIPS_TLS_LDM bar +.*: 6081 7000 lld a0,0\(at\) +.*: 3024 0000 addiu at,a0,0 + .*: R_MICROMIPS_TLS_DTPREL_HI16 bar +.*: 6081 7000 lld a0,0\(at\) +.*: 3024 0000 addiu at,a0,0 + .*: R_MICROMIPS_TLS_DTPREL_LO16 bar +.*: 6081 7000 lld a0,0\(at\) +.*: 3024 0000 addiu at,a0,0 + .*: R_MICROMIPS_TLS_TPREL_HI16 bar +.*: 6081 7000 lld a0,0\(at\) +.*: 3024 0000 addiu at,a0,0 + .*: R_MICROMIPS_TLS_TPREL_LO16 bar +.*: 6081 7000 lld a0,0\(at\) +.*: 3024 0000 addiu at,a0,0 + .*: R_MICROMIPS_TLS_GOTTPREL bar +.*: 6081 7000 lld a0,0\(at\) +.*: 3024 0000 addiu at,a0,0 + .*: R_MICROMIPS_CALL_HI16 bar +.*: 6081 f000 scd a0,0\(at\) +.*: 3024 0000 addiu at,a0,0 + .*: R_MICROMIPS_CALL_LO16 bar +.*: 6081 f000 scd a0,0\(at\) +.*: 3024 0000 addiu at,a0,0 + .*: R_MICROMIPS_CALL16 bar +.*: 6081 f000 scd a0,0\(at\) +.*: 3024 0000 addiu at,a0,0 + .*: R_MICROMIPS_GOT_DISP bar +.*: 6081 f000 scd a0,0\(at\) +.*: 3024 0000 addiu at,a0,0 + .*: R_MICROMIPS_GOT_PAGE bar +.*: 6081 f000 scd a0,0\(at\) +.*: 3024 0000 addiu at,a0,0 + .*: R_MICROMIPS_GOT_OFST bar +.*: 6081 f000 scd a0,0\(at\) +.*: 3024 0000 addiu at,a0,0 + .*: R_MICROMIPS_GOT_HI16 bar +.*: 6081 f000 scd a0,0\(at\) +.*: 3024 0000 addiu at,a0,0 + .*: R_MICROMIPS_GOT_LO16 bar +.*: 6081 f000 scd a0,0\(at\) +.*: 3024 0000 addiu at,a0,0 + .*: R_MICROMIPS_GOT16 bar +.*: 6081 f000 scd a0,0\(at\) +.*: 3024 0000 addiu at,a0,0 + .*: R_MICROMIPS_GPREL16 bar +.*: 6081 f000 scd a0,0\(at\) +.*: 3024 0000 addiu at,a0,0 + .*: R_MIPS_16 bar +.*: 6081 f000 scd a0,0\(at\) +.*: 3024 0000 addiu at,a0,0 + .*: R_MICROMIPS_HIGHEST bar +.*: 6081 f000 scd a0,0\(at\) +.*: 3024 0000 addiu at,a0,0 + .*: R_MICROMIPS_HIGHER bar +.*: 6081 f000 scd a0,0\(at\) +.*: 3024 0000 addiu at,a0,0 + .*: R_MICROMIPS_SUB bar +.*: 6081 f000 scd a0,0\(at\) +.*: 3024 0000 addiu at,a0,0 + .*: R_MICROMIPS_TLS_GD bar +.*: 6081 f000 scd a0,0\(at\) +.*: 3024 0000 addiu at,a0,0 + .*: R_MICROMIPS_TLS_LDM bar +.*: 6081 f000 scd a0,0\(at\) +.*: 3024 0000 addiu at,a0,0 + .*: R_MICROMIPS_TLS_DTPREL_HI16 bar +.*: 6081 f000 scd a0,0\(at\) +.*: 3024 0000 addiu at,a0,0 + .*: R_MICROMIPS_TLS_DTPREL_LO16 bar +.*: 6081 f000 scd a0,0\(at\) +.*: 3024 0000 addiu at,a0,0 + .*: R_MICROMIPS_TLS_TPREL_HI16 bar +.*: 6081 f000 scd a0,0\(at\) +.*: 3024 0000 addiu at,a0,0 + .*: R_MICROMIPS_TLS_TPREL_LO16 bar +.*: 6081 f000 scd a0,0\(at\) +.*: 3024 0000 addiu at,a0,0 + .*: R_MICROMIPS_TLS_GOTTPREL bar +.*: 6081 f000 scd a0,0\(at\) + \.\.\. diff --git a/gas/testsuite/gas/mips/elf-rel28-lldscd-micromips-n64.d b/gas/testsuite/gas/mips/elf-rel28-lldscd-micromips-n64.d new file mode 100644 index 0000000..fb41634 --- /dev/null +++ b/gas/testsuite/gas/mips/elf-rel28-lldscd-micromips-n64.d @@ -0,0 +1,222 @@ +#source: elf-rel28.s +#as: -march=from-abi -mmicromips -64 --defsym tlldscd=1 +#objdump: -dr +#name: MIPS ELF reloc 28 (LLD/SCD, microMIPS, n64) + +.*: file format .* + + +Disassembly of section \.text: + +.* <foo>: +.*: 5c24 0000 daddiu at,a0,0 + .*: R_MICROMIPS_CALL_HI16 bar + .*: R_MIPS_NONE \*ABS\* + .*: R_MIPS_NONE \*ABS\* +.*: 6081 7000 lld a0,0\(at\) +.*: 5c24 0000 daddiu at,a0,0 + .*: R_MICROMIPS_CALL_LO16 bar + .*: R_MIPS_NONE \*ABS\* + .*: R_MIPS_NONE \*ABS\* +.*: 6081 7000 lld a0,0\(at\) +.*: 5c24 0000 daddiu at,a0,0 + .*: R_MICROMIPS_CALL16 bar + .*: R_MIPS_NONE \*ABS\* + .*: R_MIPS_NONE \*ABS\* +.*: 6081 7000 lld a0,0\(at\) +.*: 5c24 0000 daddiu at,a0,0 + .*: R_MICROMIPS_GOT_DISP bar + .*: R_MIPS_NONE \*ABS\* + .*: R_MIPS_NONE \*ABS\* +.*: 6081 7000 lld a0,0\(at\) +.*: 5c24 0000 daddiu at,a0,0 + .*: R_MICROMIPS_GOT_PAGE bar + .*: R_MIPS_NONE \*ABS\* + .*: R_MIPS_NONE \*ABS\* +.*: 6081 7000 lld a0,0\(at\) +.*: 5c24 0000 daddiu at,a0,0 + .*: R_MICROMIPS_GOT_OFST bar + .*: R_MIPS_NONE \*ABS\* + .*: R_MIPS_NONE \*ABS\* +.*: 6081 7000 lld a0,0\(at\) +.*: 5c24 0000 daddiu at,a0,0 + .*: R_MICROMIPS_GOT_HI16 bar + .*: R_MIPS_NONE \*ABS\* + .*: R_MIPS_NONE \*ABS\* +.*: 6081 7000 lld a0,0\(at\) +.*: 5c24 0000 daddiu at,a0,0 + .*: R_MICROMIPS_GOT_LO16 bar + .*: R_MIPS_NONE \*ABS\* + .*: R_MIPS_NONE \*ABS\* +.*: 6081 7000 lld a0,0\(at\) +.*: 5c24 0000 daddiu at,a0,0 + .*: R_MICROMIPS_GOT16 bar + .*: R_MIPS_NONE \*ABS\* + .*: R_MIPS_NONE \*ABS\* +.*: 6081 7000 lld a0,0\(at\) +.*: 5c24 0000 daddiu at,a0,0 + .*: R_MICROMIPS_GPREL16 bar + .*: R_MIPS_NONE \*ABS\* + .*: R_MIPS_NONE \*ABS\* +.*: 6081 7000 lld a0,0\(at\) +.*: 5c24 0000 daddiu at,a0,0 + .*: R_MIPS_16 bar + .*: R_MIPS_NONE \*ABS\* + .*: R_MIPS_NONE \*ABS\* +.*: 6081 7000 lld a0,0\(at\) +.*: 5c24 0000 daddiu at,a0,0 + .*: R_MICROMIPS_HIGHEST bar + .*: R_MIPS_NONE \*ABS\* + .*: R_MIPS_NONE \*ABS\* +.*: 6081 7000 lld a0,0\(at\) +.*: 5c24 0000 daddiu at,a0,0 + .*: R_MICROMIPS_HIGHER bar + .*: R_MIPS_NONE \*ABS\* + .*: R_MIPS_NONE \*ABS\* +.*: 6081 7000 lld a0,0\(at\) +.*: 5c24 0000 daddiu at,a0,0 + .*: R_MICROMIPS_SUB bar + .*: R_MIPS_NONE \*ABS\* + .*: R_MIPS_NONE \*ABS\* +.*: 6081 7000 lld a0,0\(at\) +.*: 5c24 0000 daddiu at,a0,0 + .*: R_MICROMIPS_TLS_GD bar + .*: R_MIPS_NONE \*ABS\* + .*: R_MIPS_NONE \*ABS\* +.*: 6081 7000 lld a0,0\(at\) +.*: 5c24 0000 daddiu at,a0,0 + .*: R_MICROMIPS_TLS_LDM bar + .*: R_MIPS_NONE \*ABS\* + .*: R_MIPS_NONE \*ABS\* +.*: 6081 7000 lld a0,0\(at\) +.*: 5c24 0000 daddiu at,a0,0 + .*: R_MICROMIPS_TLS_DTPREL_HI16 bar + .*: R_MIPS_NONE \*ABS\* + .*: R_MIPS_NONE \*ABS\* +.*: 6081 7000 lld a0,0\(at\) +.*: 5c24 0000 daddiu at,a0,0 + .*: R_MICROMIPS_TLS_DTPREL_LO16 bar + .*: R_MIPS_NONE \*ABS\* + .*: R_MIPS_NONE \*ABS\* +.*: 6081 7000 lld a0,0\(at\) +.*: 5c24 0000 daddiu at,a0,0 + .*: R_MICROMIPS_TLS_TPREL_HI16 bar + .*: R_MIPS_NONE \*ABS\* + .*: R_MIPS_NONE \*ABS\* +.*: 6081 7000 lld a0,0\(at\) +.*: 5c24 0000 daddiu at,a0,0 + .*: R_MICROMIPS_TLS_TPREL_LO16 bar + .*: R_MIPS_NONE \*ABS\* + .*: R_MIPS_NONE \*ABS\* +.*: 6081 7000 lld a0,0\(at\) +.*: 5c24 0000 daddiu at,a0,0 + .*: R_MICROMIPS_TLS_GOTTPREL bar + .*: R_MIPS_NONE \*ABS\* + .*: R_MIPS_NONE \*ABS\* +.*: 6081 7000 lld a0,0\(at\) +.*: 5c24 0000 daddiu at,a0,0 + .*: R_MICROMIPS_CALL_HI16 bar + .*: R_MIPS_NONE \*ABS\* + .*: R_MIPS_NONE \*ABS\* +.*: 6081 f000 scd a0,0\(at\) +.*: 5c24 0000 daddiu at,a0,0 + .*: R_MICROMIPS_CALL_LO16 bar + .*: R_MIPS_NONE \*ABS\* + .*: R_MIPS_NONE \*ABS\* +.*: 6081 f000 scd a0,0\(at\) +.*: 5c24 0000 daddiu at,a0,0 + .*: R_MICROMIPS_CALL16 bar + .*: R_MIPS_NONE \*ABS\* + .*: R_MIPS_NONE \*ABS\* +.*: 6081 f000 scd a0,0\(at\) +.*: 5c24 0000 daddiu at,a0,0 + .*: R_MICROMIPS_GOT_DISP bar + .*: R_MIPS_NONE \*ABS\* + .*: R_MIPS_NONE \*ABS\* +.*: 6081 f000 scd a0,0\(at\) +.*: 5c24 0000 daddiu at,a0,0 + .*: R_MICROMIPS_GOT_PAGE bar + .*: R_MIPS_NONE \*ABS\* + .*: R_MIPS_NONE \*ABS\* +.*: 6081 f000 scd a0,0\(at\) +.*: 5c24 0000 daddiu at,a0,0 + .*: R_MICROMIPS_GOT_OFST bar + .*: R_MIPS_NONE \*ABS\* + .*: R_MIPS_NONE \*ABS\* +.*: 6081 f000 scd a0,0\(at\) +.*: 5c24 0000 daddiu at,a0,0 + .*: R_MICROMIPS_GOT_HI16 bar + .*: R_MIPS_NONE \*ABS\* + .*: R_MIPS_NONE \*ABS\* +.*: 6081 f000 scd a0,0\(at\) +.*: 5c24 0000 daddiu at,a0,0 + .*: R_MICROMIPS_GOT_LO16 bar + .*: R_MIPS_NONE \*ABS\* + .*: R_MIPS_NONE \*ABS\* +.*: 6081 f000 scd a0,0\(at\) +.*: 5c24 0000 daddiu at,a0,0 + .*: R_MICROMIPS_GOT16 bar + .*: R_MIPS_NONE \*ABS\* + .*: R_MIPS_NONE \*ABS\* +.*: 6081 f000 scd a0,0\(at\) +.*: 5c24 0000 daddiu at,a0,0 + .*: R_MICROMIPS_GPREL16 bar + .*: R_MIPS_NONE \*ABS\* + .*: R_MIPS_NONE \*ABS\* +.*: 6081 f000 scd a0,0\(at\) +.*: 5c24 0000 daddiu at,a0,0 + .*: R_MIPS_16 bar + .*: R_MIPS_NONE \*ABS\* + .*: R_MIPS_NONE \*ABS\* +.*: 6081 f000 scd a0,0\(at\) +.*: 5c24 0000 daddiu at,a0,0 + .*: R_MICROMIPS_HIGHEST bar + .*: R_MIPS_NONE \*ABS\* + .*: R_MIPS_NONE \*ABS\* +.*: 6081 f000 scd a0,0\(at\) +.*: 5c24 0000 daddiu at,a0,0 + .*: R_MICROMIPS_HIGHER bar + .*: R_MIPS_NONE \*ABS\* + .*: R_MIPS_NONE \*ABS\* +.*: 6081 f000 scd a0,0\(at\) +.*: 5c24 0000 daddiu at,a0,0 + .*: R_MICROMIPS_SUB bar + .*: R_MIPS_NONE \*ABS\* + .*: R_MIPS_NONE \*ABS\* +.*: 6081 f000 scd a0,0\(at\) +.*: 5c24 0000 daddiu at,a0,0 + .*: R_MICROMIPS_TLS_GD bar + .*: R_MIPS_NONE \*ABS\* + .*: R_MIPS_NONE \*ABS\* +.*: 6081 f000 scd a0,0\(at\) +.*: 5c24 0000 daddiu at,a0,0 + .*: R_MICROMIPS_TLS_LDM bar + .*: R_MIPS_NONE \*ABS\* + .*: R_MIPS_NONE \*ABS\* +.*: 6081 f000 scd a0,0\(at\) +.*: 5c24 0000 daddiu at,a0,0 + .*: R_MICROMIPS_TLS_DTPREL_HI16 bar + .*: R_MIPS_NONE \*ABS\* + .*: R_MIPS_NONE \*ABS\* +.*: 6081 f000 scd a0,0\(at\) +.*: 5c24 0000 daddiu at,a0,0 + .*: R_MICROMIPS_TLS_DTPREL_LO16 bar + .*: R_MIPS_NONE \*ABS\* + .*: R_MIPS_NONE \*ABS\* +.*: 6081 f000 scd a0,0\(at\) +.*: 5c24 0000 daddiu at,a0,0 + .*: R_MICROMIPS_TLS_TPREL_HI16 bar + .*: R_MIPS_NONE \*ABS\* + .*: R_MIPS_NONE \*ABS\* +.*: 6081 f000 scd a0,0\(at\) +.*: 5c24 0000 daddiu at,a0,0 + .*: R_MICROMIPS_TLS_TPREL_LO16 bar + .*: R_MIPS_NONE \*ABS\* + .*: R_MIPS_NONE \*ABS\* +.*: 6081 f000 scd a0,0\(at\) +.*: 5c24 0000 daddiu at,a0,0 + .*: R_MICROMIPS_TLS_GOTTPREL bar + .*: R_MIPS_NONE \*ABS\* + .*: R_MIPS_NONE \*ABS\* +.*: 6081 f000 scd a0,0\(at\) + \.\.\. diff --git a/gas/testsuite/gas/mips/elf-rel28-lldscd-n32.d b/gas/testsuite/gas/mips/elf-rel28-lldscd-n32.d new file mode 100644 index 0000000..beaf2dd --- /dev/null +++ b/gas/testsuite/gas/mips/elf-rel28-lldscd-n32.d @@ -0,0 +1,96 @@ +#source: elf-rel28.s +#as: -march=from-abi -n32 --defsym tlldscd=1 +#objdump: -dr +#name: MIPS ELF reloc 28 (LLD/SCD, n32) + +.*: file format .* + + +Disassembly of section \.text: + +.* <foo>: +.*: d0840000 lld a0,0\(a0\) + .*: R_MIPS_CALL_HI16 bar +.*: d0840000 lld a0,0\(a0\) + .*: R_MIPS_CALL_LO16 bar +.*: d0840000 lld a0,0\(a0\) + .*: R_MIPS_CALL16 bar +.*: d0840000 lld a0,0\(a0\) + .*: R_MIPS_GOT_DISP bar +.*: d0840000 lld a0,0\(a0\) + .*: R_MIPS_GOT_PAGE bar +.*: d0840000 lld a0,0\(a0\) + .*: R_MIPS_GOT_OFST bar +.*: d0840000 lld a0,0\(a0\) + .*: R_MIPS_GOT_HI16 bar +.*: d0840000 lld a0,0\(a0\) + .*: R_MIPS_GOT_LO16 bar +.*: d0840000 lld a0,0\(a0\) + .*: R_MIPS_GOT16 bar +.*: d0840000 lld a0,0\(a0\) + .*: R_MIPS_GPREL16 bar +.*: d0840000 lld a0,0\(a0\) + .*: R_MIPS_16 bar +.*: d0840000 lld a0,0\(a0\) + .*: R_MIPS_HIGHEST bar +.*: d0840000 lld a0,0\(a0\) + .*: R_MIPS_HIGHER bar +.*: d0840000 lld a0,0\(a0\) + .*: R_MIPS_SUB bar +.*: d0840000 lld a0,0\(a0\) + .*: R_MIPS_TLS_GD bar +.*: d0840000 lld a0,0\(a0\) + .*: R_MIPS_TLS_LDM bar +.*: d0840000 lld a0,0\(a0\) + .*: R_MIPS_TLS_DTPREL_HI16 bar +.*: d0840000 lld a0,0\(a0\) + .*: R_MIPS_TLS_DTPREL_LO16 bar +.*: d0840000 lld a0,0\(a0\) + .*: R_MIPS_TLS_TPREL_HI16 bar +.*: d0840000 lld a0,0\(a0\) + .*: R_MIPS_TLS_TPREL_LO16 bar +.*: d0840000 lld a0,0\(a0\) + .*: R_MIPS_TLS_GOTTPREL bar +.*: f0840000 scd a0,0\(a0\) + .*: R_MIPS_CALL_HI16 bar +.*: f0840000 scd a0,0\(a0\) + .*: R_MIPS_CALL_LO16 bar +.*: f0840000 scd a0,0\(a0\) + .*: R_MIPS_CALL16 bar +.*: f0840000 scd a0,0\(a0\) + .*: R_MIPS_GOT_DISP bar +.*: f0840000 scd a0,0\(a0\) + .*: R_MIPS_GOT_PAGE bar +.*: f0840000 scd a0,0\(a0\) + .*: R_MIPS_GOT_OFST bar +.*: f0840000 scd a0,0\(a0\) + .*: R_MIPS_GOT_HI16 bar +.*: f0840000 scd a0,0\(a0\) + .*: R_MIPS_GOT_LO16 bar +.*: f0840000 scd a0,0\(a0\) + .*: R_MIPS_GOT16 bar +.*: f0840000 scd a0,0\(a0\) + .*: R_MIPS_GPREL16 bar +.*: f0840000 scd a0,0\(a0\) + .*: R_MIPS_16 bar +.*: f0840000 scd a0,0\(a0\) + .*: R_MIPS_HIGHEST bar +.*: f0840000 scd a0,0\(a0\) + .*: R_MIPS_HIGHER bar +.*: f0840000 scd a0,0\(a0\) + .*: R_MIPS_SUB bar +.*: f0840000 scd a0,0\(a0\) + .*: R_MIPS_TLS_GD bar +.*: f0840000 scd a0,0\(a0\) + .*: R_MIPS_TLS_LDM bar +.*: f0840000 scd a0,0\(a0\) + .*: R_MIPS_TLS_DTPREL_HI16 bar +.*: f0840000 scd a0,0\(a0\) + .*: R_MIPS_TLS_DTPREL_LO16 bar +.*: f0840000 scd a0,0\(a0\) + .*: R_MIPS_TLS_TPREL_HI16 bar +.*: f0840000 scd a0,0\(a0\) + .*: R_MIPS_TLS_TPREL_LO16 bar +.*: f0840000 scd a0,0\(a0\) + .*: R_MIPS_TLS_GOTTPREL bar + \.\.\. diff --git a/gas/testsuite/gas/mips/elf-rel28-lldscd-n64.d b/gas/testsuite/gas/mips/elf-rel28-lldscd-n64.d new file mode 100644 index 0000000..a204e47 --- /dev/null +++ b/gas/testsuite/gas/mips/elf-rel28-lldscd-n64.d @@ -0,0 +1,180 @@ +#source: elf-rel28.s +#as: -march=from-abi -64 --defsym tlldscd=1 +#objdump: -dr +#name: MIPS ELF reloc 28 (LLD/SCD, n64) + +.*: file format .* + + +Disassembly of section \.text: + +.* <foo>: +.*: d0840000 lld a0,0\(a0\) + .*: R_MIPS_CALL_HI16 bar + .*: R_MIPS_NONE \*ABS\* + .*: R_MIPS_NONE \*ABS\* +.*: d0840000 lld a0,0\(a0\) + .*: R_MIPS_CALL_LO16 bar + .*: R_MIPS_NONE \*ABS\* + .*: R_MIPS_NONE \*ABS\* +.*: d0840000 lld a0,0\(a0\) + .*: R_MIPS_CALL16 bar + .*: R_MIPS_NONE \*ABS\* + .*: R_MIPS_NONE \*ABS\* +.*: d0840000 lld a0,0\(a0\) + .*: R_MIPS_GOT_DISP bar + .*: R_MIPS_NONE \*ABS\* + .*: R_MIPS_NONE \*ABS\* +.*: d0840000 lld a0,0\(a0\) + .*: R_MIPS_GOT_PAGE bar + .*: R_MIPS_NONE \*ABS\* + .*: R_MIPS_NONE \*ABS\* +.*: d0840000 lld a0,0\(a0\) + .*: R_MIPS_GOT_OFST bar + .*: R_MIPS_NONE \*ABS\* + .*: R_MIPS_NONE \*ABS\* +.*: d0840000 lld a0,0\(a0\) + .*: R_MIPS_GOT_HI16 bar + .*: R_MIPS_NONE \*ABS\* + .*: R_MIPS_NONE \*ABS\* +.*: d0840000 lld a0,0\(a0\) + .*: R_MIPS_GOT_LO16 bar + .*: R_MIPS_NONE \*ABS\* + .*: R_MIPS_NONE \*ABS\* +.*: d0840000 lld a0,0\(a0\) + .*: R_MIPS_GOT16 bar + .*: R_MIPS_NONE \*ABS\* + .*: R_MIPS_NONE \*ABS\* +.*: d0840000 lld a0,0\(a0\) + .*: R_MIPS_GPREL16 bar + .*: R_MIPS_NONE \*ABS\* + .*: R_MIPS_NONE \*ABS\* +.*: d0840000 lld a0,0\(a0\) + .*: R_MIPS_16 bar + .*: R_MIPS_NONE \*ABS\* + .*: R_MIPS_NONE \*ABS\* +.*: d0840000 lld a0,0\(a0\) + .*: R_MIPS_HIGHEST bar + .*: R_MIPS_NONE \*ABS\* + .*: R_MIPS_NONE \*ABS\* +.*: d0840000 lld a0,0\(a0\) + .*: R_MIPS_HIGHER bar + .*: R_MIPS_NONE \*ABS\* + .*: R_MIPS_NONE \*ABS\* +.*: d0840000 lld a0,0\(a0\) + .*: R_MIPS_SUB bar + .*: R_MIPS_NONE \*ABS\* + .*: R_MIPS_NONE \*ABS\* +.*: d0840000 lld a0,0\(a0\) + .*: R_MIPS_TLS_GD bar + .*: R_MIPS_NONE \*ABS\* + .*: R_MIPS_NONE \*ABS\* +.*: d0840000 lld a0,0\(a0\) + .*: R_MIPS_TLS_LDM bar + .*: R_MIPS_NONE \*ABS\* + .*: R_MIPS_NONE \*ABS\* +.*: d0840000 lld a0,0\(a0\) + .*: R_MIPS_TLS_DTPREL_HI16 bar + .*: R_MIPS_NONE \*ABS\* + .*: R_MIPS_NONE \*ABS\* +.*: d0840000 lld a0,0\(a0\) + .*: R_MIPS_TLS_DTPREL_LO16 bar + .*: R_MIPS_NONE \*ABS\* + .*: R_MIPS_NONE \*ABS\* +.*: d0840000 lld a0,0\(a0\) + .*: R_MIPS_TLS_TPREL_HI16 bar + .*: R_MIPS_NONE \*ABS\* + .*: R_MIPS_NONE \*ABS\* +.*: d0840000 lld a0,0\(a0\) + .*: R_MIPS_TLS_TPREL_LO16 bar + .*: R_MIPS_NONE \*ABS\* + .*: R_MIPS_NONE \*ABS\* +.*: d0840000 lld a0,0\(a0\) + .*: R_MIPS_TLS_GOTTPREL bar + .*: R_MIPS_NONE \*ABS\* + .*: R_MIPS_NONE \*ABS\* +.*: f0840000 scd a0,0\(a0\) + .*: R_MIPS_CALL_HI16 bar + .*: R_MIPS_NONE \*ABS\* + .*: R_MIPS_NONE \*ABS\* +.*: f0840000 scd a0,0\(a0\) + .*: R_MIPS_CALL_LO16 bar + .*: R_MIPS_NONE \*ABS\* + .*: R_MIPS_NONE \*ABS\* +.*: f0840000 scd a0,0\(a0\) + .*: R_MIPS_CALL16 bar + .*: R_MIPS_NONE \*ABS\* + .*: R_MIPS_NONE \*ABS\* +.*: f0840000 scd a0,0\(a0\) + .*: R_MIPS_GOT_DISP bar + .*: R_MIPS_NONE \*ABS\* + .*: R_MIPS_NONE \*ABS\* +.*: f0840000 scd a0,0\(a0\) + .*: R_MIPS_GOT_PAGE bar + .*: R_MIPS_NONE \*ABS\* + .*: R_MIPS_NONE \*ABS\* +.*: f0840000 scd a0,0\(a0\) + .*: R_MIPS_GOT_OFST bar + .*: R_MIPS_NONE \*ABS\* + .*: R_MIPS_NONE \*ABS\* +.*: f0840000 scd a0,0\(a0\) + .*: R_MIPS_GOT_HI16 bar + .*: R_MIPS_NONE \*ABS\* + .*: R_MIPS_NONE \*ABS\* +.*: f0840000 scd a0,0\(a0\) + .*: R_MIPS_GOT_LO16 bar + .*: R_MIPS_NONE \*ABS\* + .*: R_MIPS_NONE \*ABS\* +.*: f0840000 scd a0,0\(a0\) + .*: R_MIPS_GOT16 bar + .*: R_MIPS_NONE \*ABS\* + .*: R_MIPS_NONE \*ABS\* +.*: f0840000 scd a0,0\(a0\) + .*: R_MIPS_GPREL16 bar + .*: R_MIPS_NONE \*ABS\* + .*: R_MIPS_NONE \*ABS\* +.*: f0840000 scd a0,0\(a0\) + .*: R_MIPS_16 bar + .*: R_MIPS_NONE \*ABS\* + .*: R_MIPS_NONE \*ABS\* +.*: f0840000 scd a0,0\(a0\) + .*: R_MIPS_HIGHEST bar + .*: R_MIPS_NONE \*ABS\* + .*: R_MIPS_NONE \*ABS\* +.*: f0840000 scd a0,0\(a0\) + .*: R_MIPS_HIGHER bar + .*: R_MIPS_NONE \*ABS\* + .*: R_MIPS_NONE \*ABS\* +.*: f0840000 scd a0,0\(a0\) + .*: R_MIPS_SUB bar + .*: R_MIPS_NONE \*ABS\* + .*: R_MIPS_NONE \*ABS\* +.*: f0840000 scd a0,0\(a0\) + .*: R_MIPS_TLS_GD bar + .*: R_MIPS_NONE \*ABS\* + .*: R_MIPS_NONE \*ABS\* +.*: f0840000 scd a0,0\(a0\) + .*: R_MIPS_TLS_LDM bar + .*: R_MIPS_NONE \*ABS\* + .*: R_MIPS_NONE \*ABS\* +.*: f0840000 scd a0,0\(a0\) + .*: R_MIPS_TLS_DTPREL_HI16 bar + .*: R_MIPS_NONE \*ABS\* + .*: R_MIPS_NONE \*ABS\* +.*: f0840000 scd a0,0\(a0\) + .*: R_MIPS_TLS_DTPREL_LO16 bar + .*: R_MIPS_NONE \*ABS\* + .*: R_MIPS_NONE \*ABS\* +.*: f0840000 scd a0,0\(a0\) + .*: R_MIPS_TLS_TPREL_HI16 bar + .*: R_MIPS_NONE \*ABS\* + .*: R_MIPS_NONE \*ABS\* +.*: f0840000 scd a0,0\(a0\) + .*: R_MIPS_TLS_TPREL_LO16 bar + .*: R_MIPS_NONE \*ABS\* + .*: R_MIPS_NONE \*ABS\* +.*: f0840000 scd a0,0\(a0\) + .*: R_MIPS_TLS_GOTTPREL bar + .*: R_MIPS_NONE \*ABS\* + .*: R_MIPS_NONE \*ABS\* + \.\.\. diff --git a/gas/testsuite/gas/mips/elf-rel28.s b/gas/testsuite/gas/mips/elf-rel28.s index c6dcb71..fa2f847 100644 --- a/gas/testsuite/gas/mips/elf-rel28.s +++ b/gas/testsuite/gas/mips/elf-rel28.s @@ -1,3 +1,15 @@ +# By default test ld/sd. + +# If defined, test lld/scd instead. + .ifdef tlldscd + .macro ld ops:vararg + lld \ops + .endm + .macro sd ops:vararg + scd \ops + .endm + .endif + .ent foo foo: # Many of these do not make conceptual sense, but they should diff --git a/gas/testsuite/gas/mips/mips.exp b/gas/testsuite/gas/mips/mips.exp index 49b4386..78969ff 100644 --- a/gas/testsuite/gas/mips/mips.exp +++ b/gas/testsuite/gas/mips/mips.exp @@ -1224,6 +1224,10 @@ if { [istarget mips*-*-vxworks*] } { run_dump_test "elf-rel28-micromips-n32" run_dump_test "elf-rel28-n64" run_dump_test "elf-rel28-micromips-n64" + run_dump_test "elf-rel28-lldscd-n32" + run_dump_test "elf-rel28-lldscd-micromips-n32" + run_dump_test "elf-rel28-lldscd-n64" + run_dump_test "elf-rel28-lldscd-micromips-n64" run_dump_test_arches "elf-rel29" [mips_arch_list_matching mips3] } run_list_test_arches "elf-rel30" "-32" [mips_arch_list_all] |