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-rw-r--r--gas/ChangeLog4
-rw-r--r--gas/config/tc-arm.c2
2 files changed, 5 insertions, 1 deletions
diff --git a/gas/ChangeLog b/gas/ChangeLog
index 147b11f..9225ad0 100644
--- a/gas/ChangeLog
+++ b/gas/ChangeLog
@@ -1,3 +1,7 @@
+2007-05-31 Paul Brook <paul@codesourcery.com>
+
+ * config/tc-arm.c (insns): Allow strex on M profile cores.
+
2007-05-29 David S. Miller <davem@davemloft.net>
Jakub Jelinek <jakub@redhat.com>
diff --git a/gas/config/tc-arm.c b/gas/config/tc-arm.c
index 2cb28d4..03f97d7 100644
--- a/gas/config/tc-arm.c
+++ b/gas/config/tc-arm.c
@@ -15045,6 +15045,7 @@ static const struct asm_opcode insns[] =
#undef THUMB_VARIANT
#define THUMB_VARIANT &arm_ext_v6t2
TCE(ldrex, 1900f9f, e8500f00, 2, (RRnpc, ADDR), ldrex, t_ldrex),
+ TCE(strex, 1800f90, e8400000, 3, (RRnpc, RRnpc, ADDR), strex, t_strex),
TUF(mcrr2, c400000, fc400000, 5, (RCP, I15b, RRnpc, RRnpc, RCN), co_reg2c, co_reg2c),
TUF(mrrc2, c500000, fc500000, 5, (RCP, I15b, RRnpc, RRnpc, RCN), co_reg2c, co_reg2c),
@@ -15133,7 +15134,6 @@ static const struct asm_opcode insns[] =
UF(srsda, 8400500, 2, (oRRw, I31w), srs),
TUF(srsdb, 9400500, e800c000, 2, (oRRw, I31w), srs, srs),
TCE(ssat16, 6a00f30, f3200000, 3, (RRnpc, I16, RRnpc), ssat16, t_ssat16),
- TCE(strex, 1800f90, e8400000, 3, (RRnpc, RRnpc, ADDR), strex, t_strex),
TCE(umaal, 0400090, fbe00060, 4, (RRnpc, RRnpc, RRnpc, RRnpc),smlal, t_mlal),
TCE(usad8, 780f010, fb70f000, 3, (RRnpc, RRnpc, RRnpc), smul, t_simd),
TCE(usada8, 7800010, fb700000, 4, (RRnpc, RRnpc, RRnpc, RRnpc),smla, t_mla),