diff options
| -rw-r--r-- | bfd/ChangeLog | 11 | ||||
| -rw-r--r-- | bfd/elfxx-riscv.c | 21 | ||||
| -rw-r--r-- | bfd/elfxx-riscv.h | 1 | ||||
| -rw-r--r-- | gas/ChangeLog | 10 | ||||
| -rw-r--r-- | gas/testsuite/gas/riscv/march-fail-order-z.d | 3 | ||||
| -rw-r--r-- | gas/testsuite/gas/riscv/march-fail-order-z.l | 2 | ||||
| -rw-r--r-- | gas/testsuite/gas/riscv/march-fail-single-char-h.d | 3 | ||||
| -rw-r--r-- | gas/testsuite/gas/riscv/march-fail-single-char.l | 2 | ||||
| -rw-r--r-- | gas/testsuite/gas/riscv/march-fail-unknown-h.d | 3 | ||||
| -rw-r--r-- | gas/testsuite/gas/riscv/march-fail-unknown.l | 2 | ||||
| -rw-r--r-- | opcodes/ChangeLog | 4 | ||||
| -rw-r--r-- | opcodes/riscv-opc.c | 3 |
12 files changed, 61 insertions, 4 deletions
diff --git a/bfd/ChangeLog b/bfd/ChangeLog index 3ac2719..726a377 100644 --- a/bfd/ChangeLog +++ b/bfd/ChangeLog @@ -1,5 +1,16 @@ 2020-12-01 Nelson Chu <nelson.chu@sifive.com> + * elfxx-riscv.c (riscv_parse_std_ext): Stop parsing standard + extensions when parsed h keyword. + (riscv_get_prefix_class): Support prefixed h class. + (riscv_std_h_ext_strtab): Likewise. + (riscv_ext_h_valid_p): Likewise. + (parse_config): Likewise. + (riscv_std_z_ext_strtab): Add zifencei. + * elfxx-riscv.h (riscv_isa_ext_class): Add RV_ISA_CLASS_H. + +2020-12-01 Nelson Chu <nelson.chu@sifive.com> + * elfxx-riscv.c (riscv_parse_subset): ISA string cannot contain any uppercase letter. diff --git a/bfd/elfxx-riscv.c b/bfd/elfxx-riscv.c index 69f3a43..24eafcd 100644 --- a/bfd/elfxx-riscv.c +++ b/bfd/elfxx-riscv.c @@ -1225,7 +1225,7 @@ riscv_parse_std_ext (riscv_parse_subset_t *rps, while (p != NULL && *p != '\0') { - if (*p == 'x' || *p == 's' || *p == 'z') + if (*p == 'x' || *p == 's' || *p == 'h' || *p == 'z') break; if (*p == '_') @@ -1281,6 +1281,7 @@ riscv_get_prefix_class (const char *arch) switch (*arch) { case 's': return RV_ISA_CLASS_S; + case 'h': return RV_ISA_CLASS_H; case 'x': return RV_ISA_CLASS_X; case 'z': return RV_ISA_CLASS_Z; default: return RV_ISA_CLASS_UNKNOWN; @@ -1362,6 +1363,7 @@ riscv_parse_prefixed_ext (riscv_parse_subset_t *rps, /* Check that the prefix extension is known. For 'x', anything goes but it cannot simply be 'x'. For 's', it must be known from a list and cannot simply be 's'. + For 'h', it must be known from a list and cannot simply be 'h'. For 'z', it must be known from a list and cannot simply be 'z'. */ /* Check that the extension name is well-formed. */ @@ -1432,7 +1434,7 @@ riscv_parse_prefixed_ext (riscv_parse_subset_t *rps, static const char * const riscv_std_z_ext_strtab[] = { - "zicsr", NULL + "zicsr", "zifencei", NULL }; static const char * const riscv_std_s_ext_strtab[] = @@ -1440,6 +1442,11 @@ static const char * const riscv_std_s_ext_strtab[] = NULL }; +static const char * const riscv_std_h_ext_strtab[] = +{ + NULL +}; + /* For the extension `ext`, search through the list of known extensions `known_exts` for a match, and return TRUE if found. */ @@ -1486,12 +1493,22 @@ riscv_ext_s_valid_p (const char *arg) return riscv_multi_letter_ext_valid_p (arg, riscv_std_s_ext_strtab); } +/* Predicator function for 'h' prefixed extensions. + Only known h-extensions are permitted. */ + +static bfd_boolean +riscv_ext_h_valid_p (const char *arg) +{ + return riscv_multi_letter_ext_valid_p (arg, riscv_std_h_ext_strtab); +} + /* Parsing order of the prefixed extensions that is specified by the ISA spec. */ static const riscv_parse_config_t parse_config[] = { {RV_ISA_CLASS_S, "s", riscv_ext_s_valid_p}, + {RV_ISA_CLASS_H, "h", riscv_ext_h_valid_p}, {RV_ISA_CLASS_Z, "z", riscv_ext_z_valid_p}, {RV_ISA_CLASS_X, "x", riscv_ext_x_valid_p}, {RV_ISA_CLASS_UNKNOWN, NULL, NULL} diff --git a/bfd/elfxx-riscv.h b/bfd/elfxx-riscv.h index b5b17d1..6b7cc5b 100644 --- a/bfd/elfxx-riscv.h +++ b/bfd/elfxx-riscv.h @@ -102,6 +102,7 @@ riscv_estimate_digit (unsigned); typedef enum riscv_isa_ext_class { RV_ISA_CLASS_S, + RV_ISA_CLASS_H, RV_ISA_CLASS_Z, RV_ISA_CLASS_X, RV_ISA_CLASS_UNKNOWN diff --git a/gas/ChangeLog b/gas/ChangeLog index 2a2b593..64d2fa7 100644 --- a/gas/ChangeLog +++ b/gas/ChangeLog @@ -1,5 +1,15 @@ 2020-12-01 Nelson Chu <nelson.chu@sifive.com> + * testsuite/gas/riscv/march-fail-order-z.d: New testcase, check + orders of prefixed z extensions. + * testsuite/gas/riscv/march-fail-order-z.l: Likewise. + * testsuite/gas/riscv/march-fail-single-char-h.d: New testcase. + * testsuite/gas/riscv/march-fail-single-char.l: Updated. + * testsuite/gas/riscv/march-fail-unknown-h.d: New testcase. + * testsuite/gas/riscv/march-fail-unknown.l: Updated. + +2020-12-01 Nelson Chu <nelson.chu@sifive.com> + * testsuite/gas/riscv/march-fail-uppercase-base.d: Updated. * testsuite/gas/riscv/march-fail-uppercase.l: Updated. * testsuite/gas/riscv/march-fail-uppercase-x.d: New testcase. diff --git a/gas/testsuite/gas/riscv/march-fail-order-z.d b/gas/testsuite/gas/riscv/march-fail-order-z.d new file mode 100644 index 0000000..dd076c6 --- /dev/null +++ b/gas/testsuite/gas/riscv/march-fail-order-z.d @@ -0,0 +1,3 @@ +#as: -march=rv32i_zifencei2p0_zicsr2p0 +#source: empty.s +#error_output: march-fail-order-z.l diff --git a/gas/testsuite/gas/riscv/march-fail-order-z.l b/gas/testsuite/gas/riscv/march-fail-order-z.l new file mode 100644 index 0000000..1129219 --- /dev/null +++ b/gas/testsuite/gas/riscv/march-fail-order-z.l @@ -0,0 +1,2 @@ +.*Assembler messages: +.*Fatal error: .*z ISA extension `zicsr' is not in alphabetical order. It must come before `zifencei' diff --git a/gas/testsuite/gas/riscv/march-fail-single-char-h.d b/gas/testsuite/gas/riscv/march-fail-single-char-h.d new file mode 100644 index 0000000..7fca957 --- /dev/null +++ b/gas/testsuite/gas/riscv/march-fail-single-char-h.d @@ -0,0 +1,3 @@ +#as: -march=rv32ih +#source: empty.s +#error_output: march-fail-single-char.l diff --git a/gas/testsuite/gas/riscv/march-fail-single-char.l b/gas/testsuite/gas/riscv/march-fail-single-char.l index aa87a8d..6466e16 100644 --- a/gas/testsuite/gas/riscv/march-fail-single-char.l +++ b/gas/testsuite/gas/riscv/march-fail-single-char.l @@ -1,2 +1,2 @@ .*Assembler messages: -.*Fatal error: .*unknown (s|z|x) ISA extension `(s|z|x)' +.*Fatal error: .*unknown (s|h|z|x) ISA extension `(s|h|z|x)' diff --git a/gas/testsuite/gas/riscv/march-fail-unknown-h.d b/gas/testsuite/gas/riscv/march-fail-unknown-h.d new file mode 100644 index 0000000..b0b8323 --- /dev/null +++ b/gas/testsuite/gas/riscv/march-fail-unknown-h.d @@ -0,0 +1,3 @@ +#as: -march=rv32ihfoo2p0 +#source: empty.s +#error_output: march-fail-unknown.l diff --git a/gas/testsuite/gas/riscv/march-fail-unknown.l b/gas/testsuite/gas/riscv/march-fail-unknown.l index ac22fe6..28a864d 100644 --- a/gas/testsuite/gas/riscv/march-fail-unknown.l +++ b/gas/testsuite/gas/riscv/march-fail-unknown.l @@ -1,2 +1,2 @@ .*Assembler messages: -.*Fatal error: .*unknown (s|z) ISA extension `(s|z)foo' +.*Fatal error: .*unknown (s|h|z) ISA extension `(s|h|z)foo' diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog index 02fd2f5..4f6160d 100644 --- a/opcodes/ChangeLog +++ b/opcodes/ChangeLog @@ -1,3 +1,7 @@ +2020-12-01 Nelson Chu <nelson.chu@sifive.com> + + * riscv-opc.c (riscv_ext_version_table): Add zifencei. + 2020-11-28 Borislav Petkov <bp@suse.de> * i386-dis.c (print_insn): Set active_seg_prefix for branch hint insns diff --git a/opcodes/riscv-opc.c b/opcodes/riscv-opc.c index 03e3bd7..121f3fe 100644 --- a/opcodes/riscv-opc.c +++ b/opcodes/riscv-opc.c @@ -935,6 +935,9 @@ const struct riscv_ext_version riscv_ext_version_table[] = {"zicsr", ISA_SPEC_CLASS_20191213, 2, 0}, {"zicsr", ISA_SPEC_CLASS_20190608, 2, 0}, +{"zifencei", ISA_SPEC_CLASS_20191213, 2, 0}, +{"zifencei", ISA_SPEC_CLASS_20190608, 2, 0}, + /* Terminate the list. */ {NULL, 0, 0, 0} }; |